EstervQrCode
1.1.1
Library for qr code manipulation
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opencv-src
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intrin_rvv_010_compat_non-policy.hpp
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// This file is part of OpenCV project.
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// It is subject to the license terms in the LICENSE file found in the top-level directory
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// of this distribution and at http://opencv.org/license.html.
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// Copied from
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// https://github.com/riscv-non-isa/rvv-intrinsic-doc/tree/master/auto-generated/rvv-v0p10-compatible-headers
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#ifndef __RVV_0P10_COMPATIBLE_HEADERS_NON_OVERLOADED_NON_POLICY_H
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#define __RVV_0P10_COMPATIBLE_HEADERS_NON_OVERLOADED_NON_POLICY_H
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#if __has_include ("riscv_vector.h"
)
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#include <riscv_vector.h>
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#endif
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#ifndef __RISCV_VECTOR_H
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#include_next <riscv_vector.h>
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#endif
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#define vsetvl_e8mf8(...) __riscv_vsetvl_e8mf8(__VA_ARGS__)
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#define vsetvl_e8mf4(...) __riscv_vsetvl_e8mf4(__VA_ARGS__)
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#define vsetvl_e8mf2(...) __riscv_vsetvl_e8mf2(__VA_ARGS__)
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#define vsetvl_e8m1(...) __riscv_vsetvl_e8m1(__VA_ARGS__)
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#define vsetvl_e8m2(...) __riscv_vsetvl_e8m2(__VA_ARGS__)
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#define vsetvl_e8m4(...) __riscv_vsetvl_e8m4(__VA_ARGS__)
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#define vsetvl_e8m8(...) __riscv_vsetvl_e8m8(__VA_ARGS__)
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#define vsetvl_e16mf4(...) __riscv_vsetvl_e16mf4(__VA_ARGS__)
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#define vsetvl_e16mf2(...) __riscv_vsetvl_e16mf2(__VA_ARGS__)
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#define vsetvl_e16m1(...) __riscv_vsetvl_e16m1(__VA_ARGS__)
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#define vsetvl_e16m2(...) __riscv_vsetvl_e16m2(__VA_ARGS__)
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#define vsetvl_e16m4(...) __riscv_vsetvl_e16m4(__VA_ARGS__)
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#define vsetvl_e16m8(...) __riscv_vsetvl_e16m8(__VA_ARGS__)
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#define vsetvl_e32mf2(...) __riscv_vsetvl_e32mf2(__VA_ARGS__)
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#define vsetvl_e32m1(...) __riscv_vsetvl_e32m1(__VA_ARGS__)
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#define vsetvl_e32m2(...) __riscv_vsetvl_e32m2(__VA_ARGS__)
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#define vsetvl_e32m4(...) __riscv_vsetvl_e32m4(__VA_ARGS__)
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#define vsetvl_e32m8(...) __riscv_vsetvl_e32m8(__VA_ARGS__)
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#define vsetvl_e64m1(...) __riscv_vsetvl_e64m1(__VA_ARGS__)
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#define vsetvl_e64m2(...) __riscv_vsetvl_e64m2(__VA_ARGS__)
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#define vsetvl_e64m4(...) __riscv_vsetvl_e64m4(__VA_ARGS__)
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#define vsetvl_e64m8(...) __riscv_vsetvl_e64m8(__VA_ARGS__)
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#define vsetvlmax_e8mf8(...) __riscv_vsetvlmax_e8mf8(__VA_ARGS__)
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#define vsetvlmax_e8mf4(...) __riscv_vsetvlmax_e8mf4(__VA_ARGS__)
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#define vsetvlmax_e8mf2(...) __riscv_vsetvlmax_e8mf2(__VA_ARGS__)
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#define vsetvlmax_e8m1(...) __riscv_vsetvlmax_e8m1(__VA_ARGS__)
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#define vsetvlmax_e8m2(...) __riscv_vsetvlmax_e8m2(__VA_ARGS__)
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#define vsetvlmax_e8m4(...) __riscv_vsetvlmax_e8m4(__VA_ARGS__)
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#define vsetvlmax_e8m8(...) __riscv_vsetvlmax_e8m8(__VA_ARGS__)
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#define vsetvlmax_e16mf4(...) __riscv_vsetvlmax_e16mf4(__VA_ARGS__)
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#define vsetvlmax_e16mf2(...) __riscv_vsetvlmax_e16mf2(__VA_ARGS__)
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#define vsetvlmax_e16m1(...) __riscv_vsetvlmax_e16m1(__VA_ARGS__)
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#define vsetvlmax_e16m2(...) __riscv_vsetvlmax_e16m2(__VA_ARGS__)
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#define vsetvlmax_e16m4(...) __riscv_vsetvlmax_e16m4(__VA_ARGS__)
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#define vsetvlmax_e16m8(...) __riscv_vsetvlmax_e16m8(__VA_ARGS__)
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#define vsetvlmax_e32mf2(...) __riscv_vsetvlmax_e32mf2(__VA_ARGS__)
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#define vsetvlmax_e32m1(...) __riscv_vsetvlmax_e32m1(__VA_ARGS__)
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#define vsetvlmax_e32m2(...) __riscv_vsetvlmax_e32m2(__VA_ARGS__)
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#define vsetvlmax_e32m4(...) __riscv_vsetvlmax_e32m4(__VA_ARGS__)
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#define vsetvlmax_e32m8(...) __riscv_vsetvlmax_e32m8(__VA_ARGS__)
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#define vsetvlmax_e64m1(...) __riscv_vsetvlmax_e64m1(__VA_ARGS__)
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#define vsetvlmax_e64m2(...) __riscv_vsetvlmax_e64m2(__VA_ARGS__)
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#define vsetvlmax_e64m4(...) __riscv_vsetvlmax_e64m4(__VA_ARGS__)
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#define vsetvlmax_e64m8(...) __riscv_vsetvlmax_e64m8(__VA_ARGS__)
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#define vle16_v_f16mf4(...) __riscv_vle16_v_f16mf4(__VA_ARGS__)
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#define vle16_v_f16mf2(...) __riscv_vle16_v_f16mf2(__VA_ARGS__)
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#define vle16_v_f16m1(...) __riscv_vle16_v_f16m1(__VA_ARGS__)
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#define vle16_v_f16m2(...) __riscv_vle16_v_f16m2(__VA_ARGS__)
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#define vle16_v_f16m4(...) __riscv_vle16_v_f16m4(__VA_ARGS__)
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#define vle16_v_f16m8(...) __riscv_vle16_v_f16m8(__VA_ARGS__)
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#define vle32_v_f32mf2(...) __riscv_vle32_v_f32mf2(__VA_ARGS__)
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#define vle32_v_f32m1(...) __riscv_vle32_v_f32m1(__VA_ARGS__)
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#define vle32_v_f32m2(...) __riscv_vle32_v_f32m2(__VA_ARGS__)
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#define vle32_v_f32m4(...) __riscv_vle32_v_f32m4(__VA_ARGS__)
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#define vle32_v_f32m8(...) __riscv_vle32_v_f32m8(__VA_ARGS__)
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#define vle64_v_f64m1(...) __riscv_vle64_v_f64m1(__VA_ARGS__)
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#define vle64_v_f64m2(...) __riscv_vle64_v_f64m2(__VA_ARGS__)
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#define vle64_v_f64m4(...) __riscv_vle64_v_f64m4(__VA_ARGS__)
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#define vle64_v_f64m8(...) __riscv_vle64_v_f64m8(__VA_ARGS__)
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#define vle8_v_i8mf8(...) __riscv_vle8_v_i8mf8(__VA_ARGS__)
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#define vle8_v_i8mf4(...) __riscv_vle8_v_i8mf4(__VA_ARGS__)
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#define vle8_v_i8mf2(...) __riscv_vle8_v_i8mf2(__VA_ARGS__)
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#define vle8_v_i8m1(...) __riscv_vle8_v_i8m1(__VA_ARGS__)
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#define vle8_v_i8m2(...) __riscv_vle8_v_i8m2(__VA_ARGS__)
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#define vle8_v_i8m4(...) __riscv_vle8_v_i8m4(__VA_ARGS__)
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#define vle8_v_i8m8(...) __riscv_vle8_v_i8m8(__VA_ARGS__)
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#define vle16_v_i16mf4(...) __riscv_vle16_v_i16mf4(__VA_ARGS__)
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#define vle16_v_i16mf2(...) __riscv_vle16_v_i16mf2(__VA_ARGS__)
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#define vle16_v_i16m1(...) __riscv_vle16_v_i16m1(__VA_ARGS__)
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#define vle16_v_i16m2(...) __riscv_vle16_v_i16m2(__VA_ARGS__)
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#define vle16_v_i16m4(...) __riscv_vle16_v_i16m4(__VA_ARGS__)
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#define vle16_v_i16m8(...) __riscv_vle16_v_i16m8(__VA_ARGS__)
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#define vle32_v_i32mf2(...) __riscv_vle32_v_i32mf2(__VA_ARGS__)
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#define vle32_v_i32m1(...) __riscv_vle32_v_i32m1(__VA_ARGS__)
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#define vle32_v_i32m2(...) __riscv_vle32_v_i32m2(__VA_ARGS__)
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#define vle32_v_i32m4(...) __riscv_vle32_v_i32m4(__VA_ARGS__)
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#define vle32_v_i32m8(...) __riscv_vle32_v_i32m8(__VA_ARGS__)
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#define vle64_v_i64m1(...) __riscv_vle64_v_i64m1(__VA_ARGS__)
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#define vle64_v_i64m2(...) __riscv_vle64_v_i64m2(__VA_ARGS__)
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#define vle64_v_i64m4(...) __riscv_vle64_v_i64m4(__VA_ARGS__)
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#define vle64_v_i64m8(...) __riscv_vle64_v_i64m8(__VA_ARGS__)
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#define vle8_v_u8mf8(...) __riscv_vle8_v_u8mf8(__VA_ARGS__)
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#define vle8_v_u8mf4(...) __riscv_vle8_v_u8mf4(__VA_ARGS__)
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#define vle8_v_u8mf2(...) __riscv_vle8_v_u8mf2(__VA_ARGS__)
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#define vle8_v_u8m1(...) __riscv_vle8_v_u8m1(__VA_ARGS__)
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#define vle8_v_u8m2(...) __riscv_vle8_v_u8m2(__VA_ARGS__)
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#define vle8_v_u8m4(...) __riscv_vle8_v_u8m4(__VA_ARGS__)
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#define vle8_v_u8m8(...) __riscv_vle8_v_u8m8(__VA_ARGS__)
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#define vle16_v_u16mf4(...) __riscv_vle16_v_u16mf4(__VA_ARGS__)
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#define vle16_v_u16mf2(...) __riscv_vle16_v_u16mf2(__VA_ARGS__)
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#define vle16_v_u16m1(...) __riscv_vle16_v_u16m1(__VA_ARGS__)
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#define vle16_v_u16m2(...) __riscv_vle16_v_u16m2(__VA_ARGS__)
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#define vle16_v_u16m4(...) __riscv_vle16_v_u16m4(__VA_ARGS__)
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#define vle16_v_u16m8(...) __riscv_vle16_v_u16m8(__VA_ARGS__)
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#define vle32_v_u32mf2(...) __riscv_vle32_v_u32mf2(__VA_ARGS__)
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#define vle32_v_u32m1(...) __riscv_vle32_v_u32m1(__VA_ARGS__)
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#define vle32_v_u32m2(...) __riscv_vle32_v_u32m2(__VA_ARGS__)
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#define vle32_v_u32m4(...) __riscv_vle32_v_u32m4(__VA_ARGS__)
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#define vle32_v_u32m8(...) __riscv_vle32_v_u32m8(__VA_ARGS__)
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#define vle64_v_u64m1(...) __riscv_vle64_v_u64m1(__VA_ARGS__)
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#define vle64_v_u64m2(...) __riscv_vle64_v_u64m2(__VA_ARGS__)
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#define vle64_v_u64m4(...) __riscv_vle64_v_u64m4(__VA_ARGS__)
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#define vle64_v_u64m8(...) __riscv_vle64_v_u64m8(__VA_ARGS__)
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// masked functions
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#define vle16_v_f16mf4_m(...) __riscv_vle16_v_f16mf4_tumu(__VA_ARGS__)
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#define vle16_v_f16mf2_m(...) __riscv_vle16_v_f16mf2_tumu(__VA_ARGS__)
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#define vle16_v_f16m1_m(...) __riscv_vle16_v_f16m1_tumu(__VA_ARGS__)
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#define vle16_v_f16m2_m(...) __riscv_vle16_v_f16m2_tumu(__VA_ARGS__)
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#define vle16_v_f16m4_m(...) __riscv_vle16_v_f16m4_tumu(__VA_ARGS__)
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#define vle16_v_f16m8_m(...) __riscv_vle16_v_f16m8_tumu(__VA_ARGS__)
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#define vle32_v_f32mf2_m(...) __riscv_vle32_v_f32mf2_tumu(__VA_ARGS__)
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#define vle32_v_f32m1_m(...) __riscv_vle32_v_f32m1_tumu(__VA_ARGS__)
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#define vle32_v_f32m2_m(...) __riscv_vle32_v_f32m2_tumu(__VA_ARGS__)
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#define vle32_v_f32m4_m(...) __riscv_vle32_v_f32m4_tumu(__VA_ARGS__)
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#define vle32_v_f32m8_m(...) __riscv_vle32_v_f32m8_tumu(__VA_ARGS__)
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#define vle64_v_f64m1_m(...) __riscv_vle64_v_f64m1_tumu(__VA_ARGS__)
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#define vle64_v_f64m2_m(...) __riscv_vle64_v_f64m2_tumu(__VA_ARGS__)
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#define vle64_v_f64m4_m(...) __riscv_vle64_v_f64m4_tumu(__VA_ARGS__)
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#define vle64_v_f64m8_m(...) __riscv_vle64_v_f64m8_tumu(__VA_ARGS__)
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#define vle8_v_i8mf8_m(...) __riscv_vle8_v_i8mf8_tumu(__VA_ARGS__)
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#define vle8_v_i8mf4_m(...) __riscv_vle8_v_i8mf4_tumu(__VA_ARGS__)
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#define vle8_v_i8mf2_m(...) __riscv_vle8_v_i8mf2_tumu(__VA_ARGS__)
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#define vle8_v_i8m1_m(...) __riscv_vle8_v_i8m1_tumu(__VA_ARGS__)
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#define vle8_v_i8m2_m(...) __riscv_vle8_v_i8m2_tumu(__VA_ARGS__)
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#define vle8_v_i8m4_m(...) __riscv_vle8_v_i8m4_tumu(__VA_ARGS__)
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#define vle8_v_i8m8_m(...) __riscv_vle8_v_i8m8_tumu(__VA_ARGS__)
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#define vle16_v_i16mf4_m(...) __riscv_vle16_v_i16mf4_tumu(__VA_ARGS__)
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#define vle16_v_i16mf2_m(...) __riscv_vle16_v_i16mf2_tumu(__VA_ARGS__)
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#define vle16_v_i16m1_m(...) __riscv_vle16_v_i16m1_tumu(__VA_ARGS__)
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#define vle16_v_i16m2_m(...) __riscv_vle16_v_i16m2_tumu(__VA_ARGS__)
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#define vle16_v_i16m4_m(...) __riscv_vle16_v_i16m4_tumu(__VA_ARGS__)
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#define vle16_v_i16m8_m(...) __riscv_vle16_v_i16m8_tumu(__VA_ARGS__)
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#define vle32_v_i32mf2_m(...) __riscv_vle32_v_i32mf2_tumu(__VA_ARGS__)
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#define vle32_v_i32m1_m(...) __riscv_vle32_v_i32m1_tumu(__VA_ARGS__)
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#define vle32_v_i32m2_m(...) __riscv_vle32_v_i32m2_tumu(__VA_ARGS__)
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#define vle32_v_i32m4_m(...) __riscv_vle32_v_i32m4_tumu(__VA_ARGS__)
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#define vle32_v_i32m8_m(...) __riscv_vle32_v_i32m8_tumu(__VA_ARGS__)
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#define vle64_v_i64m1_m(...) __riscv_vle64_v_i64m1_tumu(__VA_ARGS__)
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#define vle64_v_i64m2_m(...) __riscv_vle64_v_i64m2_tumu(__VA_ARGS__)
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#define vle64_v_i64m4_m(...) __riscv_vle64_v_i64m4_tumu(__VA_ARGS__)
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#define vle64_v_i64m8_m(...) __riscv_vle64_v_i64m8_tumu(__VA_ARGS__)
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#define vle8_v_u8mf8_m(...) __riscv_vle8_v_u8mf8_tumu(__VA_ARGS__)
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#define vle8_v_u8mf4_m(...) __riscv_vle8_v_u8mf4_tumu(__VA_ARGS__)
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#define vle8_v_u8mf2_m(...) __riscv_vle8_v_u8mf2_tumu(__VA_ARGS__)
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#define vle8_v_u8m1_m(...) __riscv_vle8_v_u8m1_tumu(__VA_ARGS__)
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#define vle8_v_u8m2_m(...) __riscv_vle8_v_u8m2_tumu(__VA_ARGS__)
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#define vle8_v_u8m4_m(...) __riscv_vle8_v_u8m4_tumu(__VA_ARGS__)
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#define vle8_v_u8m8_m(...) __riscv_vle8_v_u8m8_tumu(__VA_ARGS__)
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#define vle16_v_u16mf4_m(...) __riscv_vle16_v_u16mf4_tumu(__VA_ARGS__)
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#define vle16_v_u16mf2_m(...) __riscv_vle16_v_u16mf2_tumu(__VA_ARGS__)
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#define vle16_v_u16m1_m(...) __riscv_vle16_v_u16m1_tumu(__VA_ARGS__)
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#define vle16_v_u16m2_m(...) __riscv_vle16_v_u16m2_tumu(__VA_ARGS__)
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#define vle16_v_u16m4_m(...) __riscv_vle16_v_u16m4_tumu(__VA_ARGS__)
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#define vle16_v_u16m8_m(...) __riscv_vle16_v_u16m8_tumu(__VA_ARGS__)
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#define vle32_v_u32mf2_m(...) __riscv_vle32_v_u32mf2_tumu(__VA_ARGS__)
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#define vle32_v_u32m1_m(...) __riscv_vle32_v_u32m1_tumu(__VA_ARGS__)
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#define vle32_v_u32m2_m(...) __riscv_vle32_v_u32m2_tumu(__VA_ARGS__)
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#define vle32_v_u32m4_m(...) __riscv_vle32_v_u32m4_tumu(__VA_ARGS__)
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#define vle32_v_u32m8_m(...) __riscv_vle32_v_u32m8_tumu(__VA_ARGS__)
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#define vle64_v_u64m1_m(...) __riscv_vle64_v_u64m1_tumu(__VA_ARGS__)
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#define vle64_v_u64m2_m(...) __riscv_vle64_v_u64m2_tumu(__VA_ARGS__)
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#define vle64_v_u64m4_m(...) __riscv_vle64_v_u64m4_tumu(__VA_ARGS__)
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#define vle64_v_u64m8_m(...) __riscv_vle64_v_u64m8_tumu(__VA_ARGS__)
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#define vse16_v_f16mf4(...) __riscv_vse16_v_f16mf4(__VA_ARGS__)
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#define vse16_v_f16mf2(...) __riscv_vse16_v_f16mf2(__VA_ARGS__)
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#define vse16_v_f16m1(...) __riscv_vse16_v_f16m1(__VA_ARGS__)
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#define vse16_v_f16m2(...) __riscv_vse16_v_f16m2(__VA_ARGS__)
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#define vse16_v_f16m4(...) __riscv_vse16_v_f16m4(__VA_ARGS__)
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#define vse16_v_f16m8(...) __riscv_vse16_v_f16m8(__VA_ARGS__)
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#define vse32_v_f32mf2(...) __riscv_vse32_v_f32mf2(__VA_ARGS__)
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#define vse32_v_f32m1(...) __riscv_vse32_v_f32m1(__VA_ARGS__)
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#define vse32_v_f32m2(...) __riscv_vse32_v_f32m2(__VA_ARGS__)
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#define vse32_v_f32m4(...) __riscv_vse32_v_f32m4(__VA_ARGS__)
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#define vse32_v_f32m8(...) __riscv_vse32_v_f32m8(__VA_ARGS__)
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#define vse64_v_f64m1(...) __riscv_vse64_v_f64m1(__VA_ARGS__)
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#define vse64_v_f64m2(...) __riscv_vse64_v_f64m2(__VA_ARGS__)
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#define vse64_v_f64m4(...) __riscv_vse64_v_f64m4(__VA_ARGS__)
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#define vse64_v_f64m8(...) __riscv_vse64_v_f64m8(__VA_ARGS__)
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#define vse8_v_i8mf8(...) __riscv_vse8_v_i8mf8(__VA_ARGS__)
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#define vse8_v_i8mf4(...) __riscv_vse8_v_i8mf4(__VA_ARGS__)
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#define vse8_v_i8mf2(...) __riscv_vse8_v_i8mf2(__VA_ARGS__)
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#define vse8_v_i8m1(...) __riscv_vse8_v_i8m1(__VA_ARGS__)
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#define vse8_v_i8m2(...) __riscv_vse8_v_i8m2(__VA_ARGS__)
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#define vse8_v_i8m4(...) __riscv_vse8_v_i8m4(__VA_ARGS__)
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#define vse8_v_i8m8(...) __riscv_vse8_v_i8m8(__VA_ARGS__)
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#define vse16_v_i16mf4(...) __riscv_vse16_v_i16mf4(__VA_ARGS__)
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#define vse16_v_i16mf2(...) __riscv_vse16_v_i16mf2(__VA_ARGS__)
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#define vse16_v_i16m1(...) __riscv_vse16_v_i16m1(__VA_ARGS__)
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#define vse16_v_i16m2(...) __riscv_vse16_v_i16m2(__VA_ARGS__)
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#define vse16_v_i16m4(...) __riscv_vse16_v_i16m4(__VA_ARGS__)
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#define vse16_v_i16m8(...) __riscv_vse16_v_i16m8(__VA_ARGS__)
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#define vse32_v_i32mf2(...) __riscv_vse32_v_i32mf2(__VA_ARGS__)
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#define vse32_v_i32m1(...) __riscv_vse32_v_i32m1(__VA_ARGS__)
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#define vse32_v_i32m2(...) __riscv_vse32_v_i32m2(__VA_ARGS__)
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#define vse32_v_i32m4(...) __riscv_vse32_v_i32m4(__VA_ARGS__)
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#define vse32_v_i32m8(...) __riscv_vse32_v_i32m8(__VA_ARGS__)
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#define vse64_v_i64m1(...) __riscv_vse64_v_i64m1(__VA_ARGS__)
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#define vse64_v_i64m2(...) __riscv_vse64_v_i64m2(__VA_ARGS__)
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#define vse64_v_i64m4(...) __riscv_vse64_v_i64m4(__VA_ARGS__)
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#define vse64_v_i64m8(...) __riscv_vse64_v_i64m8(__VA_ARGS__)
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#define vse8_v_u8mf8(...) __riscv_vse8_v_u8mf8(__VA_ARGS__)
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#define vse8_v_u8mf4(...) __riscv_vse8_v_u8mf4(__VA_ARGS__)
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#define vse8_v_u8mf2(...) __riscv_vse8_v_u8mf2(__VA_ARGS__)
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#define vse8_v_u8m1(...) __riscv_vse8_v_u8m1(__VA_ARGS__)
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#define vse8_v_u8m2(...) __riscv_vse8_v_u8m2(__VA_ARGS__)
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#define vse8_v_u8m4(...) __riscv_vse8_v_u8m4(__VA_ARGS__)
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#define vse8_v_u8m8(...) __riscv_vse8_v_u8m8(__VA_ARGS__)
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#define vse16_v_u16mf4(...) __riscv_vse16_v_u16mf4(__VA_ARGS__)
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#define vse16_v_u16mf2(...) __riscv_vse16_v_u16mf2(__VA_ARGS__)
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#define vse16_v_u16m1(...) __riscv_vse16_v_u16m1(__VA_ARGS__)
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#define vse16_v_u16m2(...) __riscv_vse16_v_u16m2(__VA_ARGS__)
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#define vse16_v_u16m4(...) __riscv_vse16_v_u16m4(__VA_ARGS__)
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#define vse16_v_u16m8(...) __riscv_vse16_v_u16m8(__VA_ARGS__)
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#define vse32_v_u32mf2(...) __riscv_vse32_v_u32mf2(__VA_ARGS__)
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#define vse32_v_u32m1(...) __riscv_vse32_v_u32m1(__VA_ARGS__)
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#define vse32_v_u32m2(...) __riscv_vse32_v_u32m2(__VA_ARGS__)
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#define vse32_v_u32m4(...) __riscv_vse32_v_u32m4(__VA_ARGS__)
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#define vse32_v_u32m8(...) __riscv_vse32_v_u32m8(__VA_ARGS__)
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#define vse64_v_u64m1(...) __riscv_vse64_v_u64m1(__VA_ARGS__)
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#define vse64_v_u64m2(...) __riscv_vse64_v_u64m2(__VA_ARGS__)
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#define vse64_v_u64m4(...) __riscv_vse64_v_u64m4(__VA_ARGS__)
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#define vse64_v_u64m8(...) __riscv_vse64_v_u64m8(__VA_ARGS__)
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// masked functions
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#define vse16_v_f16mf4_m(...) __riscv_vse16_v_f16mf4_m(__VA_ARGS__)
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#define vse16_v_f16mf2_m(...) __riscv_vse16_v_f16mf2_m(__VA_ARGS__)
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#define vse16_v_f16m1_m(...) __riscv_vse16_v_f16m1_m(__VA_ARGS__)
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#define vse16_v_f16m2_m(...) __riscv_vse16_v_f16m2_m(__VA_ARGS__)
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#define vse16_v_f16m4_m(...) __riscv_vse16_v_f16m4_m(__VA_ARGS__)
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#define vse16_v_f16m8_m(...) __riscv_vse16_v_f16m8_m(__VA_ARGS__)
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#define vse32_v_f32mf2_m(...) __riscv_vse32_v_f32mf2_m(__VA_ARGS__)
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#define vse32_v_f32m1_m(...) __riscv_vse32_v_f32m1_m(__VA_ARGS__)
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#define vse32_v_f32m2_m(...) __riscv_vse32_v_f32m2_m(__VA_ARGS__)
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#define vse32_v_f32m4_m(...) __riscv_vse32_v_f32m4_m(__VA_ARGS__)
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#define vse32_v_f32m8_m(...) __riscv_vse32_v_f32m8_m(__VA_ARGS__)
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#define vse64_v_f64m1_m(...) __riscv_vse64_v_f64m1_m(__VA_ARGS__)
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#define vse64_v_f64m2_m(...) __riscv_vse64_v_f64m2_m(__VA_ARGS__)
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#define vse64_v_f64m4_m(...) __riscv_vse64_v_f64m4_m(__VA_ARGS__)
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#define vse64_v_f64m8_m(...) __riscv_vse64_v_f64m8_m(__VA_ARGS__)
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#define vse8_v_i8mf8_m(...) __riscv_vse8_v_i8mf8_m(__VA_ARGS__)
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#define vse8_v_i8mf4_m(...) __riscv_vse8_v_i8mf4_m(__VA_ARGS__)
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#define vse8_v_i8mf2_m(...) __riscv_vse8_v_i8mf2_m(__VA_ARGS__)
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#define vse8_v_i8m1_m(...) __riscv_vse8_v_i8m1_m(__VA_ARGS__)
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#define vse8_v_i8m2_m(...) __riscv_vse8_v_i8m2_m(__VA_ARGS__)
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#define vse8_v_i8m4_m(...) __riscv_vse8_v_i8m4_m(__VA_ARGS__)
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#define vse8_v_i8m8_m(...) __riscv_vse8_v_i8m8_m(__VA_ARGS__)
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#define vse16_v_i16mf4_m(...) __riscv_vse16_v_i16mf4_m(__VA_ARGS__)
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#define vse16_v_i16mf2_m(...) __riscv_vse16_v_i16mf2_m(__VA_ARGS__)
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#define vse16_v_i16m1_m(...) __riscv_vse16_v_i16m1_m(__VA_ARGS__)
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#define vse16_v_i16m2_m(...) __riscv_vse16_v_i16m2_m(__VA_ARGS__)
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#define vse16_v_i16m4_m(...) __riscv_vse16_v_i16m4_m(__VA_ARGS__)
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#define vse16_v_i16m8_m(...) __riscv_vse16_v_i16m8_m(__VA_ARGS__)
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#define vse32_v_i32mf2_m(...) __riscv_vse32_v_i32mf2_m(__VA_ARGS__)
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#define vse32_v_i32m1_m(...) __riscv_vse32_v_i32m1_m(__VA_ARGS__)
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#define vse32_v_i32m2_m(...) __riscv_vse32_v_i32m2_m(__VA_ARGS__)
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#define vse32_v_i32m4_m(...) __riscv_vse32_v_i32m4_m(__VA_ARGS__)
274
#define vse32_v_i32m8_m(...) __riscv_vse32_v_i32m8_m(__VA_ARGS__)
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#define vse64_v_i64m1_m(...) __riscv_vse64_v_i64m1_m(__VA_ARGS__)
276
#define vse64_v_i64m2_m(...) __riscv_vse64_v_i64m2_m(__VA_ARGS__)
277
#define vse64_v_i64m4_m(...) __riscv_vse64_v_i64m4_m(__VA_ARGS__)
278
#define vse64_v_i64m8_m(...) __riscv_vse64_v_i64m8_m(__VA_ARGS__)
279
#define vse8_v_u8mf8_m(...) __riscv_vse8_v_u8mf8_m(__VA_ARGS__)
280
#define vse8_v_u8mf4_m(...) __riscv_vse8_v_u8mf4_m(__VA_ARGS__)
281
#define vse8_v_u8mf2_m(...) __riscv_vse8_v_u8mf2_m(__VA_ARGS__)
282
#define vse8_v_u8m1_m(...) __riscv_vse8_v_u8m1_m(__VA_ARGS__)
283
#define vse8_v_u8m2_m(...) __riscv_vse8_v_u8m2_m(__VA_ARGS__)
284
#define vse8_v_u8m4_m(...) __riscv_vse8_v_u8m4_m(__VA_ARGS__)
285
#define vse8_v_u8m8_m(...) __riscv_vse8_v_u8m8_m(__VA_ARGS__)
286
#define vse16_v_u16mf4_m(...) __riscv_vse16_v_u16mf4_m(__VA_ARGS__)
287
#define vse16_v_u16mf2_m(...) __riscv_vse16_v_u16mf2_m(__VA_ARGS__)
288
#define vse16_v_u16m1_m(...) __riscv_vse16_v_u16m1_m(__VA_ARGS__)
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#define vse16_v_u16m2_m(...) __riscv_vse16_v_u16m2_m(__VA_ARGS__)
290
#define vse16_v_u16m4_m(...) __riscv_vse16_v_u16m4_m(__VA_ARGS__)
291
#define vse16_v_u16m8_m(...) __riscv_vse16_v_u16m8_m(__VA_ARGS__)
292
#define vse32_v_u32mf2_m(...) __riscv_vse32_v_u32mf2_m(__VA_ARGS__)
293
#define vse32_v_u32m1_m(...) __riscv_vse32_v_u32m1_m(__VA_ARGS__)
294
#define vse32_v_u32m2_m(...) __riscv_vse32_v_u32m2_m(__VA_ARGS__)
295
#define vse32_v_u32m4_m(...) __riscv_vse32_v_u32m4_m(__VA_ARGS__)
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#define vse32_v_u32m8_m(...) __riscv_vse32_v_u32m8_m(__VA_ARGS__)
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#define vse64_v_u64m1_m(...) __riscv_vse64_v_u64m1_m(__VA_ARGS__)
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#define vse64_v_u64m2_m(...) __riscv_vse64_v_u64m2_m(__VA_ARGS__)
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#define vse64_v_u64m4_m(...) __riscv_vse64_v_u64m4_m(__VA_ARGS__)
300
#define vse64_v_u64m8_m(...) __riscv_vse64_v_u64m8_m(__VA_ARGS__)
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#define vlse16_v_f16mf4(...) __riscv_vlse16_v_f16mf4(__VA_ARGS__)
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#define vlse16_v_f16mf2(...) __riscv_vlse16_v_f16mf2(__VA_ARGS__)
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#define vlse16_v_f16m1(...) __riscv_vlse16_v_f16m1(__VA_ARGS__)
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#define vlse16_v_f16m2(...) __riscv_vlse16_v_f16m2(__VA_ARGS__)
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#define vlse16_v_f16m4(...) __riscv_vlse16_v_f16m4(__VA_ARGS__)
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#define vlse16_v_f16m8(...) __riscv_vlse16_v_f16m8(__VA_ARGS__)
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#define vlse32_v_f32mf2(...) __riscv_vlse32_v_f32mf2(__VA_ARGS__)
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#define vlse32_v_f32m1(...) __riscv_vlse32_v_f32m1(__VA_ARGS__)
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#define vlse32_v_f32m2(...) __riscv_vlse32_v_f32m2(__VA_ARGS__)
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#define vlse32_v_f32m4(...) __riscv_vlse32_v_f32m4(__VA_ARGS__)
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#define vlse32_v_f32m8(...) __riscv_vlse32_v_f32m8(__VA_ARGS__)
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#define vlse64_v_f64m1(...) __riscv_vlse64_v_f64m1(__VA_ARGS__)
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#define vlse64_v_f64m2(...) __riscv_vlse64_v_f64m2(__VA_ARGS__)
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#define vlse64_v_f64m4(...) __riscv_vlse64_v_f64m4(__VA_ARGS__)
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#define vlse64_v_f64m8(...) __riscv_vlse64_v_f64m8(__VA_ARGS__)
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#define vlse8_v_i8mf8(...) __riscv_vlse8_v_i8mf8(__VA_ARGS__)
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#define vlse8_v_i8mf4(...) __riscv_vlse8_v_i8mf4(__VA_ARGS__)
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#define vlse8_v_i8mf2(...) __riscv_vlse8_v_i8mf2(__VA_ARGS__)
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#define vlse8_v_i8m1(...) __riscv_vlse8_v_i8m1(__VA_ARGS__)
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#define vlse8_v_i8m2(...) __riscv_vlse8_v_i8m2(__VA_ARGS__)
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#define vlse8_v_i8m4(...) __riscv_vlse8_v_i8m4(__VA_ARGS__)
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#define vlse8_v_i8m8(...) __riscv_vlse8_v_i8m8(__VA_ARGS__)
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#define vlse16_v_i16mf4(...) __riscv_vlse16_v_i16mf4(__VA_ARGS__)
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#define vlse16_v_i16mf2(...) __riscv_vlse16_v_i16mf2(__VA_ARGS__)
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#define vlse16_v_i16m1(...) __riscv_vlse16_v_i16m1(__VA_ARGS__)
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#define vlse16_v_i16m2(...) __riscv_vlse16_v_i16m2(__VA_ARGS__)
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#define vlse16_v_i16m4(...) __riscv_vlse16_v_i16m4(__VA_ARGS__)
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#define vlse16_v_i16m8(...) __riscv_vlse16_v_i16m8(__VA_ARGS__)
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#define vlse32_v_i32mf2(...) __riscv_vlse32_v_i32mf2(__VA_ARGS__)
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#define vlse32_v_i32m1(...) __riscv_vlse32_v_i32m1(__VA_ARGS__)
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#define vlse32_v_i32m2(...) __riscv_vlse32_v_i32m2(__VA_ARGS__)
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#define vlse32_v_i32m4(...) __riscv_vlse32_v_i32m4(__VA_ARGS__)
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#define vlse32_v_i32m8(...) __riscv_vlse32_v_i32m8(__VA_ARGS__)
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#define vlse64_v_i64m1(...) __riscv_vlse64_v_i64m1(__VA_ARGS__)
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#define vlse64_v_i64m2(...) __riscv_vlse64_v_i64m2(__VA_ARGS__)
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#define vlse64_v_i64m4(...) __riscv_vlse64_v_i64m4(__VA_ARGS__)
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#define vlse64_v_i64m8(...) __riscv_vlse64_v_i64m8(__VA_ARGS__)
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#define vlse8_v_u8mf8(...) __riscv_vlse8_v_u8mf8(__VA_ARGS__)
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#define vlse8_v_u8mf4(...) __riscv_vlse8_v_u8mf4(__VA_ARGS__)
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#define vlse8_v_u8mf2(...) __riscv_vlse8_v_u8mf2(__VA_ARGS__)
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#define vlse8_v_u8m1(...) __riscv_vlse8_v_u8m1(__VA_ARGS__)
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#define vlse8_v_u8m2(...) __riscv_vlse8_v_u8m2(__VA_ARGS__)
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#define vlse8_v_u8m4(...) __riscv_vlse8_v_u8m4(__VA_ARGS__)
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#define vlse8_v_u8m8(...) __riscv_vlse8_v_u8m8(__VA_ARGS__)
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#define vlse16_v_u16mf4(...) __riscv_vlse16_v_u16mf4(__VA_ARGS__)
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#define vlse16_v_u16mf2(...) __riscv_vlse16_v_u16mf2(__VA_ARGS__)
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#define vlse16_v_u16m1(...) __riscv_vlse16_v_u16m1(__VA_ARGS__)
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#define vlse16_v_u16m2(...) __riscv_vlse16_v_u16m2(__VA_ARGS__)
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#define vlse16_v_u16m4(...) __riscv_vlse16_v_u16m4(__VA_ARGS__)
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#define vlse16_v_u16m8(...) __riscv_vlse16_v_u16m8(__VA_ARGS__)
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#define vlse32_v_u32mf2(...) __riscv_vlse32_v_u32mf2(__VA_ARGS__)
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#define vlse32_v_u32m1(...) __riscv_vlse32_v_u32m1(__VA_ARGS__)
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#define vlse32_v_u32m2(...) __riscv_vlse32_v_u32m2(__VA_ARGS__)
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#define vlse32_v_u32m4(...) __riscv_vlse32_v_u32m4(__VA_ARGS__)
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#define vlse32_v_u32m8(...) __riscv_vlse32_v_u32m8(__VA_ARGS__)
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#define vlse64_v_u64m1(...) __riscv_vlse64_v_u64m1(__VA_ARGS__)
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#define vlse64_v_u64m2(...) __riscv_vlse64_v_u64m2(__VA_ARGS__)
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#define vlse64_v_u64m4(...) __riscv_vlse64_v_u64m4(__VA_ARGS__)
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#define vlse64_v_u64m8(...) __riscv_vlse64_v_u64m8(__VA_ARGS__)
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// masked functions
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#define vlse16_v_f16mf4_m(...) __riscv_vlse16_v_f16mf4_tumu(__VA_ARGS__)
362
#define vlse16_v_f16mf2_m(...) __riscv_vlse16_v_f16mf2_tumu(__VA_ARGS__)
363
#define vlse16_v_f16m1_m(...) __riscv_vlse16_v_f16m1_tumu(__VA_ARGS__)
364
#define vlse16_v_f16m2_m(...) __riscv_vlse16_v_f16m2_tumu(__VA_ARGS__)
365
#define vlse16_v_f16m4_m(...) __riscv_vlse16_v_f16m4_tumu(__VA_ARGS__)
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#define vlse16_v_f16m8_m(...) __riscv_vlse16_v_f16m8_tumu(__VA_ARGS__)
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#define vlse32_v_f32mf2_m(...) __riscv_vlse32_v_f32mf2_tumu(__VA_ARGS__)
368
#define vlse32_v_f32m1_m(...) __riscv_vlse32_v_f32m1_tumu(__VA_ARGS__)
369
#define vlse32_v_f32m2_m(...) __riscv_vlse32_v_f32m2_tumu(__VA_ARGS__)
370
#define vlse32_v_f32m4_m(...) __riscv_vlse32_v_f32m4_tumu(__VA_ARGS__)
371
#define vlse32_v_f32m8_m(...) __riscv_vlse32_v_f32m8_tumu(__VA_ARGS__)
372
#define vlse64_v_f64m1_m(...) __riscv_vlse64_v_f64m1_tumu(__VA_ARGS__)
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#define vlse64_v_f64m2_m(...) __riscv_vlse64_v_f64m2_tumu(__VA_ARGS__)
374
#define vlse64_v_f64m4_m(...) __riscv_vlse64_v_f64m4_tumu(__VA_ARGS__)
375
#define vlse64_v_f64m8_m(...) __riscv_vlse64_v_f64m8_tumu(__VA_ARGS__)
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#define vlse8_v_i8mf8_m(...) __riscv_vlse8_v_i8mf8_tumu(__VA_ARGS__)
377
#define vlse8_v_i8mf4_m(...) __riscv_vlse8_v_i8mf4_tumu(__VA_ARGS__)
378
#define vlse8_v_i8mf2_m(...) __riscv_vlse8_v_i8mf2_tumu(__VA_ARGS__)
379
#define vlse8_v_i8m1_m(...) __riscv_vlse8_v_i8m1_tumu(__VA_ARGS__)
380
#define vlse8_v_i8m2_m(...) __riscv_vlse8_v_i8m2_tumu(__VA_ARGS__)
381
#define vlse8_v_i8m4_m(...) __riscv_vlse8_v_i8m4_tumu(__VA_ARGS__)
382
#define vlse8_v_i8m8_m(...) __riscv_vlse8_v_i8m8_tumu(__VA_ARGS__)
383
#define vlse16_v_i16mf4_m(...) __riscv_vlse16_v_i16mf4_tumu(__VA_ARGS__)
384
#define vlse16_v_i16mf2_m(...) __riscv_vlse16_v_i16mf2_tumu(__VA_ARGS__)
385
#define vlse16_v_i16m1_m(...) __riscv_vlse16_v_i16m1_tumu(__VA_ARGS__)
386
#define vlse16_v_i16m2_m(...) __riscv_vlse16_v_i16m2_tumu(__VA_ARGS__)
387
#define vlse16_v_i16m4_m(...) __riscv_vlse16_v_i16m4_tumu(__VA_ARGS__)
388
#define vlse16_v_i16m8_m(...) __riscv_vlse16_v_i16m8_tumu(__VA_ARGS__)
389
#define vlse32_v_i32mf2_m(...) __riscv_vlse32_v_i32mf2_tumu(__VA_ARGS__)
390
#define vlse32_v_i32m1_m(...) __riscv_vlse32_v_i32m1_tumu(__VA_ARGS__)
391
#define vlse32_v_i32m2_m(...) __riscv_vlse32_v_i32m2_tumu(__VA_ARGS__)
392
#define vlse32_v_i32m4_m(...) __riscv_vlse32_v_i32m4_tumu(__VA_ARGS__)
393
#define vlse32_v_i32m8_m(...) __riscv_vlse32_v_i32m8_tumu(__VA_ARGS__)
394
#define vlse64_v_i64m1_m(...) __riscv_vlse64_v_i64m1_tumu(__VA_ARGS__)
395
#define vlse64_v_i64m2_m(...) __riscv_vlse64_v_i64m2_tumu(__VA_ARGS__)
396
#define vlse64_v_i64m4_m(...) __riscv_vlse64_v_i64m4_tumu(__VA_ARGS__)
397
#define vlse64_v_i64m8_m(...) __riscv_vlse64_v_i64m8_tumu(__VA_ARGS__)
398
#define vlse8_v_u8mf8_m(...) __riscv_vlse8_v_u8mf8_tumu(__VA_ARGS__)
399
#define vlse8_v_u8mf4_m(...) __riscv_vlse8_v_u8mf4_tumu(__VA_ARGS__)
400
#define vlse8_v_u8mf2_m(...) __riscv_vlse8_v_u8mf2_tumu(__VA_ARGS__)
401
#define vlse8_v_u8m1_m(...) __riscv_vlse8_v_u8m1_tumu(__VA_ARGS__)
402
#define vlse8_v_u8m2_m(...) __riscv_vlse8_v_u8m2_tumu(__VA_ARGS__)
403
#define vlse8_v_u8m4_m(...) __riscv_vlse8_v_u8m4_tumu(__VA_ARGS__)
404
#define vlse8_v_u8m8_m(...) __riscv_vlse8_v_u8m8_tumu(__VA_ARGS__)
405
#define vlse16_v_u16mf4_m(...) __riscv_vlse16_v_u16mf4_tumu(__VA_ARGS__)
406
#define vlse16_v_u16mf2_m(...) __riscv_vlse16_v_u16mf2_tumu(__VA_ARGS__)
407
#define vlse16_v_u16m1_m(...) __riscv_vlse16_v_u16m1_tumu(__VA_ARGS__)
408
#define vlse16_v_u16m2_m(...) __riscv_vlse16_v_u16m2_tumu(__VA_ARGS__)
409
#define vlse16_v_u16m4_m(...) __riscv_vlse16_v_u16m4_tumu(__VA_ARGS__)
410
#define vlse16_v_u16m8_m(...) __riscv_vlse16_v_u16m8_tumu(__VA_ARGS__)
411
#define vlse32_v_u32mf2_m(...) __riscv_vlse32_v_u32mf2_tumu(__VA_ARGS__)
412
#define vlse32_v_u32m1_m(...) __riscv_vlse32_v_u32m1_tumu(__VA_ARGS__)
413
#define vlse32_v_u32m2_m(...) __riscv_vlse32_v_u32m2_tumu(__VA_ARGS__)
414
#define vlse32_v_u32m4_m(...) __riscv_vlse32_v_u32m4_tumu(__VA_ARGS__)
415
#define vlse32_v_u32m8_m(...) __riscv_vlse32_v_u32m8_tumu(__VA_ARGS__)
416
#define vlse64_v_u64m1_m(...) __riscv_vlse64_v_u64m1_tumu(__VA_ARGS__)
417
#define vlse64_v_u64m2_m(...) __riscv_vlse64_v_u64m2_tumu(__VA_ARGS__)
418
#define vlse64_v_u64m4_m(...) __riscv_vlse64_v_u64m4_tumu(__VA_ARGS__)
419
#define vlse64_v_u64m8_m(...) __riscv_vlse64_v_u64m8_tumu(__VA_ARGS__)
420
#define vsse16_v_f16mf4(...) __riscv_vsse16_v_f16mf4(__VA_ARGS__)
421
#define vsse16_v_f16mf2(...) __riscv_vsse16_v_f16mf2(__VA_ARGS__)
422
#define vsse16_v_f16m1(...) __riscv_vsse16_v_f16m1(__VA_ARGS__)
423
#define vsse16_v_f16m2(...) __riscv_vsse16_v_f16m2(__VA_ARGS__)
424
#define vsse16_v_f16m4(...) __riscv_vsse16_v_f16m4(__VA_ARGS__)
425
#define vsse16_v_f16m8(...) __riscv_vsse16_v_f16m8(__VA_ARGS__)
426
#define vsse32_v_f32mf2(...) __riscv_vsse32_v_f32mf2(__VA_ARGS__)
427
#define vsse32_v_f32m1(...) __riscv_vsse32_v_f32m1(__VA_ARGS__)
428
#define vsse32_v_f32m2(...) __riscv_vsse32_v_f32m2(__VA_ARGS__)
429
#define vsse32_v_f32m4(...) __riscv_vsse32_v_f32m4(__VA_ARGS__)
430
#define vsse32_v_f32m8(...) __riscv_vsse32_v_f32m8(__VA_ARGS__)
431
#define vsse64_v_f64m1(...) __riscv_vsse64_v_f64m1(__VA_ARGS__)
432
#define vsse64_v_f64m2(...) __riscv_vsse64_v_f64m2(__VA_ARGS__)
433
#define vsse64_v_f64m4(...) __riscv_vsse64_v_f64m4(__VA_ARGS__)
434
#define vsse64_v_f64m8(...) __riscv_vsse64_v_f64m8(__VA_ARGS__)
435
#define vsse8_v_i8mf8(...) __riscv_vsse8_v_i8mf8(__VA_ARGS__)
436
#define vsse8_v_i8mf4(...) __riscv_vsse8_v_i8mf4(__VA_ARGS__)
437
#define vsse8_v_i8mf2(...) __riscv_vsse8_v_i8mf2(__VA_ARGS__)
438
#define vsse8_v_i8m1(...) __riscv_vsse8_v_i8m1(__VA_ARGS__)
439
#define vsse8_v_i8m2(...) __riscv_vsse8_v_i8m2(__VA_ARGS__)
440
#define vsse8_v_i8m4(...) __riscv_vsse8_v_i8m4(__VA_ARGS__)
441
#define vsse8_v_i8m8(...) __riscv_vsse8_v_i8m8(__VA_ARGS__)
442
#define vsse16_v_i16mf4(...) __riscv_vsse16_v_i16mf4(__VA_ARGS__)
443
#define vsse16_v_i16mf2(...) __riscv_vsse16_v_i16mf2(__VA_ARGS__)
444
#define vsse16_v_i16m1(...) __riscv_vsse16_v_i16m1(__VA_ARGS__)
445
#define vsse16_v_i16m2(...) __riscv_vsse16_v_i16m2(__VA_ARGS__)
446
#define vsse16_v_i16m4(...) __riscv_vsse16_v_i16m4(__VA_ARGS__)
447
#define vsse16_v_i16m8(...) __riscv_vsse16_v_i16m8(__VA_ARGS__)
448
#define vsse32_v_i32mf2(...) __riscv_vsse32_v_i32mf2(__VA_ARGS__)
449
#define vsse32_v_i32m1(...) __riscv_vsse32_v_i32m1(__VA_ARGS__)
450
#define vsse32_v_i32m2(...) __riscv_vsse32_v_i32m2(__VA_ARGS__)
451
#define vsse32_v_i32m4(...) __riscv_vsse32_v_i32m4(__VA_ARGS__)
452
#define vsse32_v_i32m8(...) __riscv_vsse32_v_i32m8(__VA_ARGS__)
453
#define vsse64_v_i64m1(...) __riscv_vsse64_v_i64m1(__VA_ARGS__)
454
#define vsse64_v_i64m2(...) __riscv_vsse64_v_i64m2(__VA_ARGS__)
455
#define vsse64_v_i64m4(...) __riscv_vsse64_v_i64m4(__VA_ARGS__)
456
#define vsse64_v_i64m8(...) __riscv_vsse64_v_i64m8(__VA_ARGS__)
457
#define vsse8_v_u8mf8(...) __riscv_vsse8_v_u8mf8(__VA_ARGS__)
458
#define vsse8_v_u8mf4(...) __riscv_vsse8_v_u8mf4(__VA_ARGS__)
459
#define vsse8_v_u8mf2(...) __riscv_vsse8_v_u8mf2(__VA_ARGS__)
460
#define vsse8_v_u8m1(...) __riscv_vsse8_v_u8m1(__VA_ARGS__)
461
#define vsse8_v_u8m2(...) __riscv_vsse8_v_u8m2(__VA_ARGS__)
462
#define vsse8_v_u8m4(...) __riscv_vsse8_v_u8m4(__VA_ARGS__)
463
#define vsse8_v_u8m8(...) __riscv_vsse8_v_u8m8(__VA_ARGS__)
464
#define vsse16_v_u16mf4(...) __riscv_vsse16_v_u16mf4(__VA_ARGS__)
465
#define vsse16_v_u16mf2(...) __riscv_vsse16_v_u16mf2(__VA_ARGS__)
466
#define vsse16_v_u16m1(...) __riscv_vsse16_v_u16m1(__VA_ARGS__)
467
#define vsse16_v_u16m2(...) __riscv_vsse16_v_u16m2(__VA_ARGS__)
468
#define vsse16_v_u16m4(...) __riscv_vsse16_v_u16m4(__VA_ARGS__)
469
#define vsse16_v_u16m8(...) __riscv_vsse16_v_u16m8(__VA_ARGS__)
470
#define vsse32_v_u32mf2(...) __riscv_vsse32_v_u32mf2(__VA_ARGS__)
471
#define vsse32_v_u32m1(...) __riscv_vsse32_v_u32m1(__VA_ARGS__)
472
#define vsse32_v_u32m2(...) __riscv_vsse32_v_u32m2(__VA_ARGS__)
473
#define vsse32_v_u32m4(...) __riscv_vsse32_v_u32m4(__VA_ARGS__)
474
#define vsse32_v_u32m8(...) __riscv_vsse32_v_u32m8(__VA_ARGS__)
475
#define vsse64_v_u64m1(...) __riscv_vsse64_v_u64m1(__VA_ARGS__)
476
#define vsse64_v_u64m2(...) __riscv_vsse64_v_u64m2(__VA_ARGS__)
477
#define vsse64_v_u64m4(...) __riscv_vsse64_v_u64m4(__VA_ARGS__)
478
#define vsse64_v_u64m8(...) __riscv_vsse64_v_u64m8(__VA_ARGS__)
479
// masked functions
480
#define vsse16_v_f16mf4_m(...) __riscv_vsse16_v_f16mf4_m(__VA_ARGS__)
481
#define vsse16_v_f16mf2_m(...) __riscv_vsse16_v_f16mf2_m(__VA_ARGS__)
482
#define vsse16_v_f16m1_m(...) __riscv_vsse16_v_f16m1_m(__VA_ARGS__)
483
#define vsse16_v_f16m2_m(...) __riscv_vsse16_v_f16m2_m(__VA_ARGS__)
484
#define vsse16_v_f16m4_m(...) __riscv_vsse16_v_f16m4_m(__VA_ARGS__)
485
#define vsse16_v_f16m8_m(...) __riscv_vsse16_v_f16m8_m(__VA_ARGS__)
486
#define vsse32_v_f32mf2_m(...) __riscv_vsse32_v_f32mf2_m(__VA_ARGS__)
487
#define vsse32_v_f32m1_m(...) __riscv_vsse32_v_f32m1_m(__VA_ARGS__)
488
#define vsse32_v_f32m2_m(...) __riscv_vsse32_v_f32m2_m(__VA_ARGS__)
489
#define vsse32_v_f32m4_m(...) __riscv_vsse32_v_f32m4_m(__VA_ARGS__)
490
#define vsse32_v_f32m8_m(...) __riscv_vsse32_v_f32m8_m(__VA_ARGS__)
491
#define vsse64_v_f64m1_m(...) __riscv_vsse64_v_f64m1_m(__VA_ARGS__)
492
#define vsse64_v_f64m2_m(...) __riscv_vsse64_v_f64m2_m(__VA_ARGS__)
493
#define vsse64_v_f64m4_m(...) __riscv_vsse64_v_f64m4_m(__VA_ARGS__)
494
#define vsse64_v_f64m8_m(...) __riscv_vsse64_v_f64m8_m(__VA_ARGS__)
495
#define vsse8_v_i8mf8_m(...) __riscv_vsse8_v_i8mf8_m(__VA_ARGS__)
496
#define vsse8_v_i8mf4_m(...) __riscv_vsse8_v_i8mf4_m(__VA_ARGS__)
497
#define vsse8_v_i8mf2_m(...) __riscv_vsse8_v_i8mf2_m(__VA_ARGS__)
498
#define vsse8_v_i8m1_m(...) __riscv_vsse8_v_i8m1_m(__VA_ARGS__)
499
#define vsse8_v_i8m2_m(...) __riscv_vsse8_v_i8m2_m(__VA_ARGS__)
500
#define vsse8_v_i8m4_m(...) __riscv_vsse8_v_i8m4_m(__VA_ARGS__)
501
#define vsse8_v_i8m8_m(...) __riscv_vsse8_v_i8m8_m(__VA_ARGS__)
502
#define vsse16_v_i16mf4_m(...) __riscv_vsse16_v_i16mf4_m(__VA_ARGS__)
503
#define vsse16_v_i16mf2_m(...) __riscv_vsse16_v_i16mf2_m(__VA_ARGS__)
504
#define vsse16_v_i16m1_m(...) __riscv_vsse16_v_i16m1_m(__VA_ARGS__)
505
#define vsse16_v_i16m2_m(...) __riscv_vsse16_v_i16m2_m(__VA_ARGS__)
506
#define vsse16_v_i16m4_m(...) __riscv_vsse16_v_i16m4_m(__VA_ARGS__)
507
#define vsse16_v_i16m8_m(...) __riscv_vsse16_v_i16m8_m(__VA_ARGS__)
508
#define vsse32_v_i32mf2_m(...) __riscv_vsse32_v_i32mf2_m(__VA_ARGS__)
509
#define vsse32_v_i32m1_m(...) __riscv_vsse32_v_i32m1_m(__VA_ARGS__)
510
#define vsse32_v_i32m2_m(...) __riscv_vsse32_v_i32m2_m(__VA_ARGS__)
511
#define vsse32_v_i32m4_m(...) __riscv_vsse32_v_i32m4_m(__VA_ARGS__)
512
#define vsse32_v_i32m8_m(...) __riscv_vsse32_v_i32m8_m(__VA_ARGS__)
513
#define vsse64_v_i64m1_m(...) __riscv_vsse64_v_i64m1_m(__VA_ARGS__)
514
#define vsse64_v_i64m2_m(...) __riscv_vsse64_v_i64m2_m(__VA_ARGS__)
515
#define vsse64_v_i64m4_m(...) __riscv_vsse64_v_i64m4_m(__VA_ARGS__)
516
#define vsse64_v_i64m8_m(...) __riscv_vsse64_v_i64m8_m(__VA_ARGS__)
517
#define vsse8_v_u8mf8_m(...) __riscv_vsse8_v_u8mf8_m(__VA_ARGS__)
518
#define vsse8_v_u8mf4_m(...) __riscv_vsse8_v_u8mf4_m(__VA_ARGS__)
519
#define vsse8_v_u8mf2_m(...) __riscv_vsse8_v_u8mf2_m(__VA_ARGS__)
520
#define vsse8_v_u8m1_m(...) __riscv_vsse8_v_u8m1_m(__VA_ARGS__)
521
#define vsse8_v_u8m2_m(...) __riscv_vsse8_v_u8m2_m(__VA_ARGS__)
522
#define vsse8_v_u8m4_m(...) __riscv_vsse8_v_u8m4_m(__VA_ARGS__)
523
#define vsse8_v_u8m8_m(...) __riscv_vsse8_v_u8m8_m(__VA_ARGS__)
524
#define vsse16_v_u16mf4_m(...) __riscv_vsse16_v_u16mf4_m(__VA_ARGS__)
525
#define vsse16_v_u16mf2_m(...) __riscv_vsse16_v_u16mf2_m(__VA_ARGS__)
526
#define vsse16_v_u16m1_m(...) __riscv_vsse16_v_u16m1_m(__VA_ARGS__)
527
#define vsse16_v_u16m2_m(...) __riscv_vsse16_v_u16m2_m(__VA_ARGS__)
528
#define vsse16_v_u16m4_m(...) __riscv_vsse16_v_u16m4_m(__VA_ARGS__)
529
#define vsse16_v_u16m8_m(...) __riscv_vsse16_v_u16m8_m(__VA_ARGS__)
530
#define vsse32_v_u32mf2_m(...) __riscv_vsse32_v_u32mf2_m(__VA_ARGS__)
531
#define vsse32_v_u32m1_m(...) __riscv_vsse32_v_u32m1_m(__VA_ARGS__)
532
#define vsse32_v_u32m2_m(...) __riscv_vsse32_v_u32m2_m(__VA_ARGS__)
533
#define vsse32_v_u32m4_m(...) __riscv_vsse32_v_u32m4_m(__VA_ARGS__)
534
#define vsse32_v_u32m8_m(...) __riscv_vsse32_v_u32m8_m(__VA_ARGS__)
535
#define vsse64_v_u64m1_m(...) __riscv_vsse64_v_u64m1_m(__VA_ARGS__)
536
#define vsse64_v_u64m2_m(...) __riscv_vsse64_v_u64m2_m(__VA_ARGS__)
537
#define vsse64_v_u64m4_m(...) __riscv_vsse64_v_u64m4_m(__VA_ARGS__)
538
#define vsse64_v_u64m8_m(...) __riscv_vsse64_v_u64m8_m(__VA_ARGS__)
539
#define vloxei8_v_f16mf4(...) __riscv_vloxei8_v_f16mf4(__VA_ARGS__)
540
#define vloxei8_v_f16mf2(...) __riscv_vloxei8_v_f16mf2(__VA_ARGS__)
541
#define vloxei8_v_f16m1(...) __riscv_vloxei8_v_f16m1(__VA_ARGS__)
542
#define vloxei8_v_f16m2(...) __riscv_vloxei8_v_f16m2(__VA_ARGS__)
543
#define vloxei8_v_f16m4(...) __riscv_vloxei8_v_f16m4(__VA_ARGS__)
544
#define vloxei8_v_f16m8(...) __riscv_vloxei8_v_f16m8(__VA_ARGS__)
545
#define vloxei16_v_f16mf4(...) __riscv_vloxei16_v_f16mf4(__VA_ARGS__)
546
#define vloxei16_v_f16mf2(...) __riscv_vloxei16_v_f16mf2(__VA_ARGS__)
547
#define vloxei16_v_f16m1(...) __riscv_vloxei16_v_f16m1(__VA_ARGS__)
548
#define vloxei16_v_f16m2(...) __riscv_vloxei16_v_f16m2(__VA_ARGS__)
549
#define vloxei16_v_f16m4(...) __riscv_vloxei16_v_f16m4(__VA_ARGS__)
550
#define vloxei16_v_f16m8(...) __riscv_vloxei16_v_f16m8(__VA_ARGS__)
551
#define vloxei32_v_f16mf4(...) __riscv_vloxei32_v_f16mf4(__VA_ARGS__)
552
#define vloxei32_v_f16mf2(...) __riscv_vloxei32_v_f16mf2(__VA_ARGS__)
553
#define vloxei32_v_f16m1(...) __riscv_vloxei32_v_f16m1(__VA_ARGS__)
554
#define vloxei32_v_f16m2(...) __riscv_vloxei32_v_f16m2(__VA_ARGS__)
555
#define vloxei32_v_f16m4(...) __riscv_vloxei32_v_f16m4(__VA_ARGS__)
556
#define vloxei64_v_f16mf4(...) __riscv_vloxei64_v_f16mf4(__VA_ARGS__)
557
#define vloxei64_v_f16mf2(...) __riscv_vloxei64_v_f16mf2(__VA_ARGS__)
558
#define vloxei64_v_f16m1(...) __riscv_vloxei64_v_f16m1(__VA_ARGS__)
559
#define vloxei64_v_f16m2(...) __riscv_vloxei64_v_f16m2(__VA_ARGS__)
560
#define vloxei8_v_f32mf2(...) __riscv_vloxei8_v_f32mf2(__VA_ARGS__)
561
#define vloxei8_v_f32m1(...) __riscv_vloxei8_v_f32m1(__VA_ARGS__)
562
#define vloxei8_v_f32m2(...) __riscv_vloxei8_v_f32m2(__VA_ARGS__)
563
#define vloxei8_v_f32m4(...) __riscv_vloxei8_v_f32m4(__VA_ARGS__)
564
#define vloxei8_v_f32m8(...) __riscv_vloxei8_v_f32m8(__VA_ARGS__)
565
#define vloxei16_v_f32mf2(...) __riscv_vloxei16_v_f32mf2(__VA_ARGS__)
566
#define vloxei16_v_f32m1(...) __riscv_vloxei16_v_f32m1(__VA_ARGS__)
567
#define vloxei16_v_f32m2(...) __riscv_vloxei16_v_f32m2(__VA_ARGS__)
568
#define vloxei16_v_f32m4(...) __riscv_vloxei16_v_f32m4(__VA_ARGS__)
569
#define vloxei16_v_f32m8(...) __riscv_vloxei16_v_f32m8(__VA_ARGS__)
570
#define vloxei32_v_f32mf2(...) __riscv_vloxei32_v_f32mf2(__VA_ARGS__)
571
#define vloxei32_v_f32m1(...) __riscv_vloxei32_v_f32m1(__VA_ARGS__)
572
#define vloxei32_v_f32m2(...) __riscv_vloxei32_v_f32m2(__VA_ARGS__)
573
#define vloxei32_v_f32m4(...) __riscv_vloxei32_v_f32m4(__VA_ARGS__)
574
#define vloxei32_v_f32m8(...) __riscv_vloxei32_v_f32m8(__VA_ARGS__)
575
#define vloxei64_v_f32mf2(...) __riscv_vloxei64_v_f32mf2(__VA_ARGS__)
576
#define vloxei64_v_f32m1(...) __riscv_vloxei64_v_f32m1(__VA_ARGS__)
577
#define vloxei64_v_f32m2(...) __riscv_vloxei64_v_f32m2(__VA_ARGS__)
578
#define vloxei64_v_f32m4(...) __riscv_vloxei64_v_f32m4(__VA_ARGS__)
579
#define vloxei8_v_f64m1(...) __riscv_vloxei8_v_f64m1(__VA_ARGS__)
580
#define vloxei8_v_f64m2(...) __riscv_vloxei8_v_f64m2(__VA_ARGS__)
581
#define vloxei8_v_f64m4(...) __riscv_vloxei8_v_f64m4(__VA_ARGS__)
582
#define vloxei8_v_f64m8(...) __riscv_vloxei8_v_f64m8(__VA_ARGS__)
583
#define vloxei16_v_f64m1(...) __riscv_vloxei16_v_f64m1(__VA_ARGS__)
584
#define vloxei16_v_f64m2(...) __riscv_vloxei16_v_f64m2(__VA_ARGS__)
585
#define vloxei16_v_f64m4(...) __riscv_vloxei16_v_f64m4(__VA_ARGS__)
586
#define vloxei16_v_f64m8(...) __riscv_vloxei16_v_f64m8(__VA_ARGS__)
587
#define vloxei32_v_f64m1(...) __riscv_vloxei32_v_f64m1(__VA_ARGS__)
588
#define vloxei32_v_f64m2(...) __riscv_vloxei32_v_f64m2(__VA_ARGS__)
589
#define vloxei32_v_f64m4(...) __riscv_vloxei32_v_f64m4(__VA_ARGS__)
590
#define vloxei32_v_f64m8(...) __riscv_vloxei32_v_f64m8(__VA_ARGS__)
591
#define vloxei64_v_f64m1(...) __riscv_vloxei64_v_f64m1(__VA_ARGS__)
592
#define vloxei64_v_f64m2(...) __riscv_vloxei64_v_f64m2(__VA_ARGS__)
593
#define vloxei64_v_f64m4(...) __riscv_vloxei64_v_f64m4(__VA_ARGS__)
594
#define vloxei64_v_f64m8(...) __riscv_vloxei64_v_f64m8(__VA_ARGS__)
595
#define vluxei8_v_f16mf4(...) __riscv_vluxei8_v_f16mf4(__VA_ARGS__)
596
#define vluxei8_v_f16mf2(...) __riscv_vluxei8_v_f16mf2(__VA_ARGS__)
597
#define vluxei8_v_f16m1(...) __riscv_vluxei8_v_f16m1(__VA_ARGS__)
598
#define vluxei8_v_f16m2(...) __riscv_vluxei8_v_f16m2(__VA_ARGS__)
599
#define vluxei8_v_f16m4(...) __riscv_vluxei8_v_f16m4(__VA_ARGS__)
600
#define vluxei8_v_f16m8(...) __riscv_vluxei8_v_f16m8(__VA_ARGS__)
601
#define vluxei16_v_f16mf4(...) __riscv_vluxei16_v_f16mf4(__VA_ARGS__)
602
#define vluxei16_v_f16mf2(...) __riscv_vluxei16_v_f16mf2(__VA_ARGS__)
603
#define vluxei16_v_f16m1(...) __riscv_vluxei16_v_f16m1(__VA_ARGS__)
604
#define vluxei16_v_f16m2(...) __riscv_vluxei16_v_f16m2(__VA_ARGS__)
605
#define vluxei16_v_f16m4(...) __riscv_vluxei16_v_f16m4(__VA_ARGS__)
606
#define vluxei16_v_f16m8(...) __riscv_vluxei16_v_f16m8(__VA_ARGS__)
607
#define vluxei32_v_f16mf4(...) __riscv_vluxei32_v_f16mf4(__VA_ARGS__)
608
#define vluxei32_v_f16mf2(...) __riscv_vluxei32_v_f16mf2(__VA_ARGS__)
609
#define vluxei32_v_f16m1(...) __riscv_vluxei32_v_f16m1(__VA_ARGS__)
610
#define vluxei32_v_f16m2(...) __riscv_vluxei32_v_f16m2(__VA_ARGS__)
611
#define vluxei32_v_f16m4(...) __riscv_vluxei32_v_f16m4(__VA_ARGS__)
612
#define vluxei64_v_f16mf4(...) __riscv_vluxei64_v_f16mf4(__VA_ARGS__)
613
#define vluxei64_v_f16mf2(...) __riscv_vluxei64_v_f16mf2(__VA_ARGS__)
614
#define vluxei64_v_f16m1(...) __riscv_vluxei64_v_f16m1(__VA_ARGS__)
615
#define vluxei64_v_f16m2(...) __riscv_vluxei64_v_f16m2(__VA_ARGS__)
616
#define vluxei8_v_f32mf2(...) __riscv_vluxei8_v_f32mf2(__VA_ARGS__)
617
#define vluxei8_v_f32m1(...) __riscv_vluxei8_v_f32m1(__VA_ARGS__)
618
#define vluxei8_v_f32m2(...) __riscv_vluxei8_v_f32m2(__VA_ARGS__)
619
#define vluxei8_v_f32m4(...) __riscv_vluxei8_v_f32m4(__VA_ARGS__)
620
#define vluxei8_v_f32m8(...) __riscv_vluxei8_v_f32m8(__VA_ARGS__)
621
#define vluxei16_v_f32mf2(...) __riscv_vluxei16_v_f32mf2(__VA_ARGS__)
622
#define vluxei16_v_f32m1(...) __riscv_vluxei16_v_f32m1(__VA_ARGS__)
623
#define vluxei16_v_f32m2(...) __riscv_vluxei16_v_f32m2(__VA_ARGS__)
624
#define vluxei16_v_f32m4(...) __riscv_vluxei16_v_f32m4(__VA_ARGS__)
625
#define vluxei16_v_f32m8(...) __riscv_vluxei16_v_f32m8(__VA_ARGS__)
626
#define vluxei32_v_f32mf2(...) __riscv_vluxei32_v_f32mf2(__VA_ARGS__)
627
#define vluxei32_v_f32m1(...) __riscv_vluxei32_v_f32m1(__VA_ARGS__)
628
#define vluxei32_v_f32m2(...) __riscv_vluxei32_v_f32m2(__VA_ARGS__)
629
#define vluxei32_v_f32m4(...) __riscv_vluxei32_v_f32m4(__VA_ARGS__)
630
#define vluxei32_v_f32m8(...) __riscv_vluxei32_v_f32m8(__VA_ARGS__)
631
#define vluxei64_v_f32mf2(...) __riscv_vluxei64_v_f32mf2(__VA_ARGS__)
632
#define vluxei64_v_f32m1(...) __riscv_vluxei64_v_f32m1(__VA_ARGS__)
633
#define vluxei64_v_f32m2(...) __riscv_vluxei64_v_f32m2(__VA_ARGS__)
634
#define vluxei64_v_f32m4(...) __riscv_vluxei64_v_f32m4(__VA_ARGS__)
635
#define vluxei8_v_f64m1(...) __riscv_vluxei8_v_f64m1(__VA_ARGS__)
636
#define vluxei8_v_f64m2(...) __riscv_vluxei8_v_f64m2(__VA_ARGS__)
637
#define vluxei8_v_f64m4(...) __riscv_vluxei8_v_f64m4(__VA_ARGS__)
638
#define vluxei8_v_f64m8(...) __riscv_vluxei8_v_f64m8(__VA_ARGS__)
639
#define vluxei16_v_f64m1(...) __riscv_vluxei16_v_f64m1(__VA_ARGS__)
640
#define vluxei16_v_f64m2(...) __riscv_vluxei16_v_f64m2(__VA_ARGS__)
641
#define vluxei16_v_f64m4(...) __riscv_vluxei16_v_f64m4(__VA_ARGS__)
642
#define vluxei16_v_f64m8(...) __riscv_vluxei16_v_f64m8(__VA_ARGS__)
643
#define vluxei32_v_f64m1(...) __riscv_vluxei32_v_f64m1(__VA_ARGS__)
644
#define vluxei32_v_f64m2(...) __riscv_vluxei32_v_f64m2(__VA_ARGS__)
645
#define vluxei32_v_f64m4(...) __riscv_vluxei32_v_f64m4(__VA_ARGS__)
646
#define vluxei32_v_f64m8(...) __riscv_vluxei32_v_f64m8(__VA_ARGS__)
647
#define vluxei64_v_f64m1(...) __riscv_vluxei64_v_f64m1(__VA_ARGS__)
648
#define vluxei64_v_f64m2(...) __riscv_vluxei64_v_f64m2(__VA_ARGS__)
649
#define vluxei64_v_f64m4(...) __riscv_vluxei64_v_f64m4(__VA_ARGS__)
650
#define vluxei64_v_f64m8(...) __riscv_vluxei64_v_f64m8(__VA_ARGS__)
651
#define vloxei8_v_i8mf8(...) __riscv_vloxei8_v_i8mf8(__VA_ARGS__)
652
#define vloxei8_v_i8mf4(...) __riscv_vloxei8_v_i8mf4(__VA_ARGS__)
653
#define vloxei8_v_i8mf2(...) __riscv_vloxei8_v_i8mf2(__VA_ARGS__)
654
#define vloxei8_v_i8m1(...) __riscv_vloxei8_v_i8m1(__VA_ARGS__)
655
#define vloxei8_v_i8m2(...) __riscv_vloxei8_v_i8m2(__VA_ARGS__)
656
#define vloxei8_v_i8m4(...) __riscv_vloxei8_v_i8m4(__VA_ARGS__)
657
#define vloxei8_v_i8m8(...) __riscv_vloxei8_v_i8m8(__VA_ARGS__)
658
#define vloxei16_v_i8mf8(...) __riscv_vloxei16_v_i8mf8(__VA_ARGS__)
659
#define vloxei16_v_i8mf4(...) __riscv_vloxei16_v_i8mf4(__VA_ARGS__)
660
#define vloxei16_v_i8mf2(...) __riscv_vloxei16_v_i8mf2(__VA_ARGS__)
661
#define vloxei16_v_i8m1(...) __riscv_vloxei16_v_i8m1(__VA_ARGS__)
662
#define vloxei16_v_i8m2(...) __riscv_vloxei16_v_i8m2(__VA_ARGS__)
663
#define vloxei16_v_i8m4(...) __riscv_vloxei16_v_i8m4(__VA_ARGS__)
664
#define vloxei32_v_i8mf8(...) __riscv_vloxei32_v_i8mf8(__VA_ARGS__)
665
#define vloxei32_v_i8mf4(...) __riscv_vloxei32_v_i8mf4(__VA_ARGS__)
666
#define vloxei32_v_i8mf2(...) __riscv_vloxei32_v_i8mf2(__VA_ARGS__)
667
#define vloxei32_v_i8m1(...) __riscv_vloxei32_v_i8m1(__VA_ARGS__)
668
#define vloxei32_v_i8m2(...) __riscv_vloxei32_v_i8m2(__VA_ARGS__)
669
#define vloxei64_v_i8mf8(...) __riscv_vloxei64_v_i8mf8(__VA_ARGS__)
670
#define vloxei64_v_i8mf4(...) __riscv_vloxei64_v_i8mf4(__VA_ARGS__)
671
#define vloxei64_v_i8mf2(...) __riscv_vloxei64_v_i8mf2(__VA_ARGS__)
672
#define vloxei64_v_i8m1(...) __riscv_vloxei64_v_i8m1(__VA_ARGS__)
673
#define vloxei8_v_i16mf4(...) __riscv_vloxei8_v_i16mf4(__VA_ARGS__)
674
#define vloxei8_v_i16mf2(...) __riscv_vloxei8_v_i16mf2(__VA_ARGS__)
675
#define vloxei8_v_i16m1(...) __riscv_vloxei8_v_i16m1(__VA_ARGS__)
676
#define vloxei8_v_i16m2(...) __riscv_vloxei8_v_i16m2(__VA_ARGS__)
677
#define vloxei8_v_i16m4(...) __riscv_vloxei8_v_i16m4(__VA_ARGS__)
678
#define vloxei8_v_i16m8(...) __riscv_vloxei8_v_i16m8(__VA_ARGS__)
679
#define vloxei16_v_i16mf4(...) __riscv_vloxei16_v_i16mf4(__VA_ARGS__)
680
#define vloxei16_v_i16mf2(...) __riscv_vloxei16_v_i16mf2(__VA_ARGS__)
681
#define vloxei16_v_i16m1(...) __riscv_vloxei16_v_i16m1(__VA_ARGS__)
682
#define vloxei16_v_i16m2(...) __riscv_vloxei16_v_i16m2(__VA_ARGS__)
683
#define vloxei16_v_i16m4(...) __riscv_vloxei16_v_i16m4(__VA_ARGS__)
684
#define vloxei16_v_i16m8(...) __riscv_vloxei16_v_i16m8(__VA_ARGS__)
685
#define vloxei32_v_i16mf4(...) __riscv_vloxei32_v_i16mf4(__VA_ARGS__)
686
#define vloxei32_v_i16mf2(...) __riscv_vloxei32_v_i16mf2(__VA_ARGS__)
687
#define vloxei32_v_i16m1(...) __riscv_vloxei32_v_i16m1(__VA_ARGS__)
688
#define vloxei32_v_i16m2(...) __riscv_vloxei32_v_i16m2(__VA_ARGS__)
689
#define vloxei32_v_i16m4(...) __riscv_vloxei32_v_i16m4(__VA_ARGS__)
690
#define vloxei64_v_i16mf4(...) __riscv_vloxei64_v_i16mf4(__VA_ARGS__)
691
#define vloxei64_v_i16mf2(...) __riscv_vloxei64_v_i16mf2(__VA_ARGS__)
692
#define vloxei64_v_i16m1(...) __riscv_vloxei64_v_i16m1(__VA_ARGS__)
693
#define vloxei64_v_i16m2(...) __riscv_vloxei64_v_i16m2(__VA_ARGS__)
694
#define vloxei8_v_i32mf2(...) __riscv_vloxei8_v_i32mf2(__VA_ARGS__)
695
#define vloxei8_v_i32m1(...) __riscv_vloxei8_v_i32m1(__VA_ARGS__)
696
#define vloxei8_v_i32m2(...) __riscv_vloxei8_v_i32m2(__VA_ARGS__)
697
#define vloxei8_v_i32m4(...) __riscv_vloxei8_v_i32m4(__VA_ARGS__)
698
#define vloxei8_v_i32m8(...) __riscv_vloxei8_v_i32m8(__VA_ARGS__)
699
#define vloxei16_v_i32mf2(...) __riscv_vloxei16_v_i32mf2(__VA_ARGS__)
700
#define vloxei16_v_i32m1(...) __riscv_vloxei16_v_i32m1(__VA_ARGS__)
701
#define vloxei16_v_i32m2(...) __riscv_vloxei16_v_i32m2(__VA_ARGS__)
702
#define vloxei16_v_i32m4(...) __riscv_vloxei16_v_i32m4(__VA_ARGS__)
703
#define vloxei16_v_i32m8(...) __riscv_vloxei16_v_i32m8(__VA_ARGS__)
704
#define vloxei32_v_i32mf2(...) __riscv_vloxei32_v_i32mf2(__VA_ARGS__)
705
#define vloxei32_v_i32m1(...) __riscv_vloxei32_v_i32m1(__VA_ARGS__)
706
#define vloxei32_v_i32m2(...) __riscv_vloxei32_v_i32m2(__VA_ARGS__)
707
#define vloxei32_v_i32m4(...) __riscv_vloxei32_v_i32m4(__VA_ARGS__)
708
#define vloxei32_v_i32m8(...) __riscv_vloxei32_v_i32m8(__VA_ARGS__)
709
#define vloxei64_v_i32mf2(...) __riscv_vloxei64_v_i32mf2(__VA_ARGS__)
710
#define vloxei64_v_i32m1(...) __riscv_vloxei64_v_i32m1(__VA_ARGS__)
711
#define vloxei64_v_i32m2(...) __riscv_vloxei64_v_i32m2(__VA_ARGS__)
712
#define vloxei64_v_i32m4(...) __riscv_vloxei64_v_i32m4(__VA_ARGS__)
713
#define vloxei8_v_i64m1(...) __riscv_vloxei8_v_i64m1(__VA_ARGS__)
714
#define vloxei8_v_i64m2(...) __riscv_vloxei8_v_i64m2(__VA_ARGS__)
715
#define vloxei8_v_i64m4(...) __riscv_vloxei8_v_i64m4(__VA_ARGS__)
716
#define vloxei8_v_i64m8(...) __riscv_vloxei8_v_i64m8(__VA_ARGS__)
717
#define vloxei16_v_i64m1(...) __riscv_vloxei16_v_i64m1(__VA_ARGS__)
718
#define vloxei16_v_i64m2(...) __riscv_vloxei16_v_i64m2(__VA_ARGS__)
719
#define vloxei16_v_i64m4(...) __riscv_vloxei16_v_i64m4(__VA_ARGS__)
720
#define vloxei16_v_i64m8(...) __riscv_vloxei16_v_i64m8(__VA_ARGS__)
721
#define vloxei32_v_i64m1(...) __riscv_vloxei32_v_i64m1(__VA_ARGS__)
722
#define vloxei32_v_i64m2(...) __riscv_vloxei32_v_i64m2(__VA_ARGS__)
723
#define vloxei32_v_i64m4(...) __riscv_vloxei32_v_i64m4(__VA_ARGS__)
724
#define vloxei32_v_i64m8(...) __riscv_vloxei32_v_i64m8(__VA_ARGS__)
725
#define vloxei64_v_i64m1(...) __riscv_vloxei64_v_i64m1(__VA_ARGS__)
726
#define vloxei64_v_i64m2(...) __riscv_vloxei64_v_i64m2(__VA_ARGS__)
727
#define vloxei64_v_i64m4(...) __riscv_vloxei64_v_i64m4(__VA_ARGS__)
728
#define vloxei64_v_i64m8(...) __riscv_vloxei64_v_i64m8(__VA_ARGS__)
729
#define vluxei8_v_i8mf8(...) __riscv_vluxei8_v_i8mf8(__VA_ARGS__)
730
#define vluxei8_v_i8mf4(...) __riscv_vluxei8_v_i8mf4(__VA_ARGS__)
731
#define vluxei8_v_i8mf2(...) __riscv_vluxei8_v_i8mf2(__VA_ARGS__)
732
#define vluxei8_v_i8m1(...) __riscv_vluxei8_v_i8m1(__VA_ARGS__)
733
#define vluxei8_v_i8m2(...) __riscv_vluxei8_v_i8m2(__VA_ARGS__)
734
#define vluxei8_v_i8m4(...) __riscv_vluxei8_v_i8m4(__VA_ARGS__)
735
#define vluxei8_v_i8m8(...) __riscv_vluxei8_v_i8m8(__VA_ARGS__)
736
#define vluxei16_v_i8mf8(...) __riscv_vluxei16_v_i8mf8(__VA_ARGS__)
737
#define vluxei16_v_i8mf4(...) __riscv_vluxei16_v_i8mf4(__VA_ARGS__)
738
#define vluxei16_v_i8mf2(...) __riscv_vluxei16_v_i8mf2(__VA_ARGS__)
739
#define vluxei16_v_i8m1(...) __riscv_vluxei16_v_i8m1(__VA_ARGS__)
740
#define vluxei16_v_i8m2(...) __riscv_vluxei16_v_i8m2(__VA_ARGS__)
741
#define vluxei16_v_i8m4(...) __riscv_vluxei16_v_i8m4(__VA_ARGS__)
742
#define vluxei32_v_i8mf8(...) __riscv_vluxei32_v_i8mf8(__VA_ARGS__)
743
#define vluxei32_v_i8mf4(...) __riscv_vluxei32_v_i8mf4(__VA_ARGS__)
744
#define vluxei32_v_i8mf2(...) __riscv_vluxei32_v_i8mf2(__VA_ARGS__)
745
#define vluxei32_v_i8m1(...) __riscv_vluxei32_v_i8m1(__VA_ARGS__)
746
#define vluxei32_v_i8m2(...) __riscv_vluxei32_v_i8m2(__VA_ARGS__)
747
#define vluxei64_v_i8mf8(...) __riscv_vluxei64_v_i8mf8(__VA_ARGS__)
748
#define vluxei64_v_i8mf4(...) __riscv_vluxei64_v_i8mf4(__VA_ARGS__)
749
#define vluxei64_v_i8mf2(...) __riscv_vluxei64_v_i8mf2(__VA_ARGS__)
750
#define vluxei64_v_i8m1(...) __riscv_vluxei64_v_i8m1(__VA_ARGS__)
751
#define vluxei8_v_i16mf4(...) __riscv_vluxei8_v_i16mf4(__VA_ARGS__)
752
#define vluxei8_v_i16mf2(...) __riscv_vluxei8_v_i16mf2(__VA_ARGS__)
753
#define vluxei8_v_i16m1(...) __riscv_vluxei8_v_i16m1(__VA_ARGS__)
754
#define vluxei8_v_i16m2(...) __riscv_vluxei8_v_i16m2(__VA_ARGS__)
755
#define vluxei8_v_i16m4(...) __riscv_vluxei8_v_i16m4(__VA_ARGS__)
756
#define vluxei8_v_i16m8(...) __riscv_vluxei8_v_i16m8(__VA_ARGS__)
757
#define vluxei16_v_i16mf4(...) __riscv_vluxei16_v_i16mf4(__VA_ARGS__)
758
#define vluxei16_v_i16mf2(...) __riscv_vluxei16_v_i16mf2(__VA_ARGS__)
759
#define vluxei16_v_i16m1(...) __riscv_vluxei16_v_i16m1(__VA_ARGS__)
760
#define vluxei16_v_i16m2(...) __riscv_vluxei16_v_i16m2(__VA_ARGS__)
761
#define vluxei16_v_i16m4(...) __riscv_vluxei16_v_i16m4(__VA_ARGS__)
762
#define vluxei16_v_i16m8(...) __riscv_vluxei16_v_i16m8(__VA_ARGS__)
763
#define vluxei32_v_i16mf4(...) __riscv_vluxei32_v_i16mf4(__VA_ARGS__)
764
#define vluxei32_v_i16mf2(...) __riscv_vluxei32_v_i16mf2(__VA_ARGS__)
765
#define vluxei32_v_i16m1(...) __riscv_vluxei32_v_i16m1(__VA_ARGS__)
766
#define vluxei32_v_i16m2(...) __riscv_vluxei32_v_i16m2(__VA_ARGS__)
767
#define vluxei32_v_i16m4(...) __riscv_vluxei32_v_i16m4(__VA_ARGS__)
768
#define vluxei64_v_i16mf4(...) __riscv_vluxei64_v_i16mf4(__VA_ARGS__)
769
#define vluxei64_v_i16mf2(...) __riscv_vluxei64_v_i16mf2(__VA_ARGS__)
770
#define vluxei64_v_i16m1(...) __riscv_vluxei64_v_i16m1(__VA_ARGS__)
771
#define vluxei64_v_i16m2(...) __riscv_vluxei64_v_i16m2(__VA_ARGS__)
772
#define vluxei8_v_i32mf2(...) __riscv_vluxei8_v_i32mf2(__VA_ARGS__)
773
#define vluxei8_v_i32m1(...) __riscv_vluxei8_v_i32m1(__VA_ARGS__)
774
#define vluxei8_v_i32m2(...) __riscv_vluxei8_v_i32m2(__VA_ARGS__)
775
#define vluxei8_v_i32m4(...) __riscv_vluxei8_v_i32m4(__VA_ARGS__)
776
#define vluxei8_v_i32m8(...) __riscv_vluxei8_v_i32m8(__VA_ARGS__)
777
#define vluxei16_v_i32mf2(...) __riscv_vluxei16_v_i32mf2(__VA_ARGS__)
778
#define vluxei16_v_i32m1(...) __riscv_vluxei16_v_i32m1(__VA_ARGS__)
779
#define vluxei16_v_i32m2(...) __riscv_vluxei16_v_i32m2(__VA_ARGS__)
780
#define vluxei16_v_i32m4(...) __riscv_vluxei16_v_i32m4(__VA_ARGS__)
781
#define vluxei16_v_i32m8(...) __riscv_vluxei16_v_i32m8(__VA_ARGS__)
782
#define vluxei32_v_i32mf2(...) __riscv_vluxei32_v_i32mf2(__VA_ARGS__)
783
#define vluxei32_v_i32m1(...) __riscv_vluxei32_v_i32m1(__VA_ARGS__)
784
#define vluxei32_v_i32m2(...) __riscv_vluxei32_v_i32m2(__VA_ARGS__)
785
#define vluxei32_v_i32m4(...) __riscv_vluxei32_v_i32m4(__VA_ARGS__)
786
#define vluxei32_v_i32m8(...) __riscv_vluxei32_v_i32m8(__VA_ARGS__)
787
#define vluxei64_v_i32mf2(...) __riscv_vluxei64_v_i32mf2(__VA_ARGS__)
788
#define vluxei64_v_i32m1(...) __riscv_vluxei64_v_i32m1(__VA_ARGS__)
789
#define vluxei64_v_i32m2(...) __riscv_vluxei64_v_i32m2(__VA_ARGS__)
790
#define vluxei64_v_i32m4(...) __riscv_vluxei64_v_i32m4(__VA_ARGS__)
791
#define vluxei8_v_i64m1(...) __riscv_vluxei8_v_i64m1(__VA_ARGS__)
792
#define vluxei8_v_i64m2(...) __riscv_vluxei8_v_i64m2(__VA_ARGS__)
793
#define vluxei8_v_i64m4(...) __riscv_vluxei8_v_i64m4(__VA_ARGS__)
794
#define vluxei8_v_i64m8(...) __riscv_vluxei8_v_i64m8(__VA_ARGS__)
795
#define vluxei16_v_i64m1(...) __riscv_vluxei16_v_i64m1(__VA_ARGS__)
796
#define vluxei16_v_i64m2(...) __riscv_vluxei16_v_i64m2(__VA_ARGS__)
797
#define vluxei16_v_i64m4(...) __riscv_vluxei16_v_i64m4(__VA_ARGS__)
798
#define vluxei16_v_i64m8(...) __riscv_vluxei16_v_i64m8(__VA_ARGS__)
799
#define vluxei32_v_i64m1(...) __riscv_vluxei32_v_i64m1(__VA_ARGS__)
800
#define vluxei32_v_i64m2(...) __riscv_vluxei32_v_i64m2(__VA_ARGS__)
801
#define vluxei32_v_i64m4(...) __riscv_vluxei32_v_i64m4(__VA_ARGS__)
802
#define vluxei32_v_i64m8(...) __riscv_vluxei32_v_i64m8(__VA_ARGS__)
803
#define vluxei64_v_i64m1(...) __riscv_vluxei64_v_i64m1(__VA_ARGS__)
804
#define vluxei64_v_i64m2(...) __riscv_vluxei64_v_i64m2(__VA_ARGS__)
805
#define vluxei64_v_i64m4(...) __riscv_vluxei64_v_i64m4(__VA_ARGS__)
806
#define vluxei64_v_i64m8(...) __riscv_vluxei64_v_i64m8(__VA_ARGS__)
807
#define vloxei8_v_u8mf8(...) __riscv_vloxei8_v_u8mf8(__VA_ARGS__)
808
#define vloxei8_v_u8mf4(...) __riscv_vloxei8_v_u8mf4(__VA_ARGS__)
809
#define vloxei8_v_u8mf2(...) __riscv_vloxei8_v_u8mf2(__VA_ARGS__)
810
#define vloxei8_v_u8m1(...) __riscv_vloxei8_v_u8m1(__VA_ARGS__)
811
#define vloxei8_v_u8m2(...) __riscv_vloxei8_v_u8m2(__VA_ARGS__)
812
#define vloxei8_v_u8m4(...) __riscv_vloxei8_v_u8m4(__VA_ARGS__)
813
#define vloxei8_v_u8m8(...) __riscv_vloxei8_v_u8m8(__VA_ARGS__)
814
#define vloxei16_v_u8mf8(...) __riscv_vloxei16_v_u8mf8(__VA_ARGS__)
815
#define vloxei16_v_u8mf4(...) __riscv_vloxei16_v_u8mf4(__VA_ARGS__)
816
#define vloxei16_v_u8mf2(...) __riscv_vloxei16_v_u8mf2(__VA_ARGS__)
817
#define vloxei16_v_u8m1(...) __riscv_vloxei16_v_u8m1(__VA_ARGS__)
818
#define vloxei16_v_u8m2(...) __riscv_vloxei16_v_u8m2(__VA_ARGS__)
819
#define vloxei16_v_u8m4(...) __riscv_vloxei16_v_u8m4(__VA_ARGS__)
820
#define vloxei32_v_u8mf8(...) __riscv_vloxei32_v_u8mf8(__VA_ARGS__)
821
#define vloxei32_v_u8mf4(...) __riscv_vloxei32_v_u8mf4(__VA_ARGS__)
822
#define vloxei32_v_u8mf2(...) __riscv_vloxei32_v_u8mf2(__VA_ARGS__)
823
#define vloxei32_v_u8m1(...) __riscv_vloxei32_v_u8m1(__VA_ARGS__)
824
#define vloxei32_v_u8m2(...) __riscv_vloxei32_v_u8m2(__VA_ARGS__)
825
#define vloxei64_v_u8mf8(...) __riscv_vloxei64_v_u8mf8(__VA_ARGS__)
826
#define vloxei64_v_u8mf4(...) __riscv_vloxei64_v_u8mf4(__VA_ARGS__)
827
#define vloxei64_v_u8mf2(...) __riscv_vloxei64_v_u8mf2(__VA_ARGS__)
828
#define vloxei64_v_u8m1(...) __riscv_vloxei64_v_u8m1(__VA_ARGS__)
829
#define vloxei8_v_u16mf4(...) __riscv_vloxei8_v_u16mf4(__VA_ARGS__)
830
#define vloxei8_v_u16mf2(...) __riscv_vloxei8_v_u16mf2(__VA_ARGS__)
831
#define vloxei8_v_u16m1(...) __riscv_vloxei8_v_u16m1(__VA_ARGS__)
832
#define vloxei8_v_u16m2(...) __riscv_vloxei8_v_u16m2(__VA_ARGS__)
833
#define vloxei8_v_u16m4(...) __riscv_vloxei8_v_u16m4(__VA_ARGS__)
834
#define vloxei8_v_u16m8(...) __riscv_vloxei8_v_u16m8(__VA_ARGS__)
835
#define vloxei16_v_u16mf4(...) __riscv_vloxei16_v_u16mf4(__VA_ARGS__)
836
#define vloxei16_v_u16mf2(...) __riscv_vloxei16_v_u16mf2(__VA_ARGS__)
837
#define vloxei16_v_u16m1(...) __riscv_vloxei16_v_u16m1(__VA_ARGS__)
838
#define vloxei16_v_u16m2(...) __riscv_vloxei16_v_u16m2(__VA_ARGS__)
839
#define vloxei16_v_u16m4(...) __riscv_vloxei16_v_u16m4(__VA_ARGS__)
840
#define vloxei16_v_u16m8(...) __riscv_vloxei16_v_u16m8(__VA_ARGS__)
841
#define vloxei32_v_u16mf4(...) __riscv_vloxei32_v_u16mf4(__VA_ARGS__)
842
#define vloxei32_v_u16mf2(...) __riscv_vloxei32_v_u16mf2(__VA_ARGS__)
843
#define vloxei32_v_u16m1(...) __riscv_vloxei32_v_u16m1(__VA_ARGS__)
844
#define vloxei32_v_u16m2(...) __riscv_vloxei32_v_u16m2(__VA_ARGS__)
845
#define vloxei32_v_u16m4(...) __riscv_vloxei32_v_u16m4(__VA_ARGS__)
846
#define vloxei64_v_u16mf4(...) __riscv_vloxei64_v_u16mf4(__VA_ARGS__)
847
#define vloxei64_v_u16mf2(...) __riscv_vloxei64_v_u16mf2(__VA_ARGS__)
848
#define vloxei64_v_u16m1(...) __riscv_vloxei64_v_u16m1(__VA_ARGS__)
849
#define vloxei64_v_u16m2(...) __riscv_vloxei64_v_u16m2(__VA_ARGS__)
850
#define vloxei8_v_u32mf2(...) __riscv_vloxei8_v_u32mf2(__VA_ARGS__)
851
#define vloxei8_v_u32m1(...) __riscv_vloxei8_v_u32m1(__VA_ARGS__)
852
#define vloxei8_v_u32m2(...) __riscv_vloxei8_v_u32m2(__VA_ARGS__)
853
#define vloxei8_v_u32m4(...) __riscv_vloxei8_v_u32m4(__VA_ARGS__)
854
#define vloxei8_v_u32m8(...) __riscv_vloxei8_v_u32m8(__VA_ARGS__)
855
#define vloxei16_v_u32mf2(...) __riscv_vloxei16_v_u32mf2(__VA_ARGS__)
856
#define vloxei16_v_u32m1(...) __riscv_vloxei16_v_u32m1(__VA_ARGS__)
857
#define vloxei16_v_u32m2(...) __riscv_vloxei16_v_u32m2(__VA_ARGS__)
858
#define vloxei16_v_u32m4(...) __riscv_vloxei16_v_u32m4(__VA_ARGS__)
859
#define vloxei16_v_u32m8(...) __riscv_vloxei16_v_u32m8(__VA_ARGS__)
860
#define vloxei32_v_u32mf2(...) __riscv_vloxei32_v_u32mf2(__VA_ARGS__)
861
#define vloxei32_v_u32m1(...) __riscv_vloxei32_v_u32m1(__VA_ARGS__)
862
#define vloxei32_v_u32m2(...) __riscv_vloxei32_v_u32m2(__VA_ARGS__)
863
#define vloxei32_v_u32m4(...) __riscv_vloxei32_v_u32m4(__VA_ARGS__)
864
#define vloxei32_v_u32m8(...) __riscv_vloxei32_v_u32m8(__VA_ARGS__)
865
#define vloxei64_v_u32mf2(...) __riscv_vloxei64_v_u32mf2(__VA_ARGS__)
866
#define vloxei64_v_u32m1(...) __riscv_vloxei64_v_u32m1(__VA_ARGS__)
867
#define vloxei64_v_u32m2(...) __riscv_vloxei64_v_u32m2(__VA_ARGS__)
868
#define vloxei64_v_u32m4(...) __riscv_vloxei64_v_u32m4(__VA_ARGS__)
869
#define vloxei8_v_u64m1(...) __riscv_vloxei8_v_u64m1(__VA_ARGS__)
870
#define vloxei8_v_u64m2(...) __riscv_vloxei8_v_u64m2(__VA_ARGS__)
871
#define vloxei8_v_u64m4(...) __riscv_vloxei8_v_u64m4(__VA_ARGS__)
872
#define vloxei8_v_u64m8(...) __riscv_vloxei8_v_u64m8(__VA_ARGS__)
873
#define vloxei16_v_u64m1(...) __riscv_vloxei16_v_u64m1(__VA_ARGS__)
874
#define vloxei16_v_u64m2(...) __riscv_vloxei16_v_u64m2(__VA_ARGS__)
875
#define vloxei16_v_u64m4(...) __riscv_vloxei16_v_u64m4(__VA_ARGS__)
876
#define vloxei16_v_u64m8(...) __riscv_vloxei16_v_u64m8(__VA_ARGS__)
877
#define vloxei32_v_u64m1(...) __riscv_vloxei32_v_u64m1(__VA_ARGS__)
878
#define vloxei32_v_u64m2(...) __riscv_vloxei32_v_u64m2(__VA_ARGS__)
879
#define vloxei32_v_u64m4(...) __riscv_vloxei32_v_u64m4(__VA_ARGS__)
880
#define vloxei32_v_u64m8(...) __riscv_vloxei32_v_u64m8(__VA_ARGS__)
881
#define vloxei64_v_u64m1(...) __riscv_vloxei64_v_u64m1(__VA_ARGS__)
882
#define vloxei64_v_u64m2(...) __riscv_vloxei64_v_u64m2(__VA_ARGS__)
883
#define vloxei64_v_u64m4(...) __riscv_vloxei64_v_u64m4(__VA_ARGS__)
884
#define vloxei64_v_u64m8(...) __riscv_vloxei64_v_u64m8(__VA_ARGS__)
885
#define vluxei8_v_u8mf8(...) __riscv_vluxei8_v_u8mf8(__VA_ARGS__)
886
#define vluxei8_v_u8mf4(...) __riscv_vluxei8_v_u8mf4(__VA_ARGS__)
887
#define vluxei8_v_u8mf2(...) __riscv_vluxei8_v_u8mf2(__VA_ARGS__)
888
#define vluxei8_v_u8m1(...) __riscv_vluxei8_v_u8m1(__VA_ARGS__)
889
#define vluxei8_v_u8m2(...) __riscv_vluxei8_v_u8m2(__VA_ARGS__)
890
#define vluxei8_v_u8m4(...) __riscv_vluxei8_v_u8m4(__VA_ARGS__)
891
#define vluxei8_v_u8m8(...) __riscv_vluxei8_v_u8m8(__VA_ARGS__)
892
#define vluxei16_v_u8mf8(...) __riscv_vluxei16_v_u8mf8(__VA_ARGS__)
893
#define vluxei16_v_u8mf4(...) __riscv_vluxei16_v_u8mf4(__VA_ARGS__)
894
#define vluxei16_v_u8mf2(...) __riscv_vluxei16_v_u8mf2(__VA_ARGS__)
895
#define vluxei16_v_u8m1(...) __riscv_vluxei16_v_u8m1(__VA_ARGS__)
896
#define vluxei16_v_u8m2(...) __riscv_vluxei16_v_u8m2(__VA_ARGS__)
897
#define vluxei16_v_u8m4(...) __riscv_vluxei16_v_u8m4(__VA_ARGS__)
898
#define vluxei32_v_u8mf8(...) __riscv_vluxei32_v_u8mf8(__VA_ARGS__)
899
#define vluxei32_v_u8mf4(...) __riscv_vluxei32_v_u8mf4(__VA_ARGS__)
900
#define vluxei32_v_u8mf2(...) __riscv_vluxei32_v_u8mf2(__VA_ARGS__)
901
#define vluxei32_v_u8m1(...) __riscv_vluxei32_v_u8m1(__VA_ARGS__)
902
#define vluxei32_v_u8m2(...) __riscv_vluxei32_v_u8m2(__VA_ARGS__)
903
#define vluxei64_v_u8mf8(...) __riscv_vluxei64_v_u8mf8(__VA_ARGS__)
904
#define vluxei64_v_u8mf4(...) __riscv_vluxei64_v_u8mf4(__VA_ARGS__)
905
#define vluxei64_v_u8mf2(...) __riscv_vluxei64_v_u8mf2(__VA_ARGS__)
906
#define vluxei64_v_u8m1(...) __riscv_vluxei64_v_u8m1(__VA_ARGS__)
907
#define vluxei8_v_u16mf4(...) __riscv_vluxei8_v_u16mf4(__VA_ARGS__)
908
#define vluxei8_v_u16mf2(...) __riscv_vluxei8_v_u16mf2(__VA_ARGS__)
909
#define vluxei8_v_u16m1(...) __riscv_vluxei8_v_u16m1(__VA_ARGS__)
910
#define vluxei8_v_u16m2(...) __riscv_vluxei8_v_u16m2(__VA_ARGS__)
911
#define vluxei8_v_u16m4(...) __riscv_vluxei8_v_u16m4(__VA_ARGS__)
912
#define vluxei8_v_u16m8(...) __riscv_vluxei8_v_u16m8(__VA_ARGS__)
913
#define vluxei16_v_u16mf4(...) __riscv_vluxei16_v_u16mf4(__VA_ARGS__)
914
#define vluxei16_v_u16mf2(...) __riscv_vluxei16_v_u16mf2(__VA_ARGS__)
915
#define vluxei16_v_u16m1(...) __riscv_vluxei16_v_u16m1(__VA_ARGS__)
916
#define vluxei16_v_u16m2(...) __riscv_vluxei16_v_u16m2(__VA_ARGS__)
917
#define vluxei16_v_u16m4(...) __riscv_vluxei16_v_u16m4(__VA_ARGS__)
918
#define vluxei16_v_u16m8(...) __riscv_vluxei16_v_u16m8(__VA_ARGS__)
919
#define vluxei32_v_u16mf4(...) __riscv_vluxei32_v_u16mf4(__VA_ARGS__)
920
#define vluxei32_v_u16mf2(...) __riscv_vluxei32_v_u16mf2(__VA_ARGS__)
921
#define vluxei32_v_u16m1(...) __riscv_vluxei32_v_u16m1(__VA_ARGS__)
922
#define vluxei32_v_u16m2(...) __riscv_vluxei32_v_u16m2(__VA_ARGS__)
923
#define vluxei32_v_u16m4(...) __riscv_vluxei32_v_u16m4(__VA_ARGS__)
924
#define vluxei64_v_u16mf4(...) __riscv_vluxei64_v_u16mf4(__VA_ARGS__)
925
#define vluxei64_v_u16mf2(...) __riscv_vluxei64_v_u16mf2(__VA_ARGS__)
926
#define vluxei64_v_u16m1(...) __riscv_vluxei64_v_u16m1(__VA_ARGS__)
927
#define vluxei64_v_u16m2(...) __riscv_vluxei64_v_u16m2(__VA_ARGS__)
928
#define vluxei8_v_u32mf2(...) __riscv_vluxei8_v_u32mf2(__VA_ARGS__)
929
#define vluxei8_v_u32m1(...) __riscv_vluxei8_v_u32m1(__VA_ARGS__)
930
#define vluxei8_v_u32m2(...) __riscv_vluxei8_v_u32m2(__VA_ARGS__)
931
#define vluxei8_v_u32m4(...) __riscv_vluxei8_v_u32m4(__VA_ARGS__)
932
#define vluxei8_v_u32m8(...) __riscv_vluxei8_v_u32m8(__VA_ARGS__)
933
#define vluxei16_v_u32mf2(...) __riscv_vluxei16_v_u32mf2(__VA_ARGS__)
934
#define vluxei16_v_u32m1(...) __riscv_vluxei16_v_u32m1(__VA_ARGS__)
935
#define vluxei16_v_u32m2(...) __riscv_vluxei16_v_u32m2(__VA_ARGS__)
936
#define vluxei16_v_u32m4(...) __riscv_vluxei16_v_u32m4(__VA_ARGS__)
937
#define vluxei16_v_u32m8(...) __riscv_vluxei16_v_u32m8(__VA_ARGS__)
938
#define vluxei32_v_u32mf2(...) __riscv_vluxei32_v_u32mf2(__VA_ARGS__)
939
#define vluxei32_v_u32m1(...) __riscv_vluxei32_v_u32m1(__VA_ARGS__)
940
#define vluxei32_v_u32m2(...) __riscv_vluxei32_v_u32m2(__VA_ARGS__)
941
#define vluxei32_v_u32m4(...) __riscv_vluxei32_v_u32m4(__VA_ARGS__)
942
#define vluxei32_v_u32m8(...) __riscv_vluxei32_v_u32m8(__VA_ARGS__)
943
#define vluxei64_v_u32mf2(...) __riscv_vluxei64_v_u32mf2(__VA_ARGS__)
944
#define vluxei64_v_u32m1(...) __riscv_vluxei64_v_u32m1(__VA_ARGS__)
945
#define vluxei64_v_u32m2(...) __riscv_vluxei64_v_u32m2(__VA_ARGS__)
946
#define vluxei64_v_u32m4(...) __riscv_vluxei64_v_u32m4(__VA_ARGS__)
947
#define vluxei8_v_u64m1(...) __riscv_vluxei8_v_u64m1(__VA_ARGS__)
948
#define vluxei8_v_u64m2(...) __riscv_vluxei8_v_u64m2(__VA_ARGS__)
949
#define vluxei8_v_u64m4(...) __riscv_vluxei8_v_u64m4(__VA_ARGS__)
950
#define vluxei8_v_u64m8(...) __riscv_vluxei8_v_u64m8(__VA_ARGS__)
951
#define vluxei16_v_u64m1(...) __riscv_vluxei16_v_u64m1(__VA_ARGS__)
952
#define vluxei16_v_u64m2(...) __riscv_vluxei16_v_u64m2(__VA_ARGS__)
953
#define vluxei16_v_u64m4(...) __riscv_vluxei16_v_u64m4(__VA_ARGS__)
954
#define vluxei16_v_u64m8(...) __riscv_vluxei16_v_u64m8(__VA_ARGS__)
955
#define vluxei32_v_u64m1(...) __riscv_vluxei32_v_u64m1(__VA_ARGS__)
956
#define vluxei32_v_u64m2(...) __riscv_vluxei32_v_u64m2(__VA_ARGS__)
957
#define vluxei32_v_u64m4(...) __riscv_vluxei32_v_u64m4(__VA_ARGS__)
958
#define vluxei32_v_u64m8(...) __riscv_vluxei32_v_u64m8(__VA_ARGS__)
959
#define vluxei64_v_u64m1(...) __riscv_vluxei64_v_u64m1(__VA_ARGS__)
960
#define vluxei64_v_u64m2(...) __riscv_vluxei64_v_u64m2(__VA_ARGS__)
961
#define vluxei64_v_u64m4(...) __riscv_vluxei64_v_u64m4(__VA_ARGS__)
962
#define vluxei64_v_u64m8(...) __riscv_vluxei64_v_u64m8(__VA_ARGS__)
963
// masked functions
964
#define vloxei8_v_f16mf4_m(...) __riscv_vloxei8_v_f16mf4_tumu(__VA_ARGS__)
965
#define vloxei8_v_f16mf2_m(...) __riscv_vloxei8_v_f16mf2_tumu(__VA_ARGS__)
966
#define vloxei8_v_f16m1_m(...) __riscv_vloxei8_v_f16m1_tumu(__VA_ARGS__)
967
#define vloxei8_v_f16m2_m(...) __riscv_vloxei8_v_f16m2_tumu(__VA_ARGS__)
968
#define vloxei8_v_f16m4_m(...) __riscv_vloxei8_v_f16m4_tumu(__VA_ARGS__)
969
#define vloxei8_v_f16m8_m(...) __riscv_vloxei8_v_f16m8_tumu(__VA_ARGS__)
970
#define vloxei16_v_f16mf4_m(...) __riscv_vloxei16_v_f16mf4_tumu(__VA_ARGS__)
971
#define vloxei16_v_f16mf2_m(...) __riscv_vloxei16_v_f16mf2_tumu(__VA_ARGS__)
972
#define vloxei16_v_f16m1_m(...) __riscv_vloxei16_v_f16m1_tumu(__VA_ARGS__)
973
#define vloxei16_v_f16m2_m(...) __riscv_vloxei16_v_f16m2_tumu(__VA_ARGS__)
974
#define vloxei16_v_f16m4_m(...) __riscv_vloxei16_v_f16m4_tumu(__VA_ARGS__)
975
#define vloxei16_v_f16m8_m(...) __riscv_vloxei16_v_f16m8_tumu(__VA_ARGS__)
976
#define vloxei32_v_f16mf4_m(...) __riscv_vloxei32_v_f16mf4_tumu(__VA_ARGS__)
977
#define vloxei32_v_f16mf2_m(...) __riscv_vloxei32_v_f16mf2_tumu(__VA_ARGS__)
978
#define vloxei32_v_f16m1_m(...) __riscv_vloxei32_v_f16m1_tumu(__VA_ARGS__)
979
#define vloxei32_v_f16m2_m(...) __riscv_vloxei32_v_f16m2_tumu(__VA_ARGS__)
980
#define vloxei32_v_f16m4_m(...) __riscv_vloxei32_v_f16m4_tumu(__VA_ARGS__)
981
#define vloxei64_v_f16mf4_m(...) __riscv_vloxei64_v_f16mf4_tumu(__VA_ARGS__)
982
#define vloxei64_v_f16mf2_m(...) __riscv_vloxei64_v_f16mf2_tumu(__VA_ARGS__)
983
#define vloxei64_v_f16m1_m(...) __riscv_vloxei64_v_f16m1_tumu(__VA_ARGS__)
984
#define vloxei64_v_f16m2_m(...) __riscv_vloxei64_v_f16m2_tumu(__VA_ARGS__)
985
#define vloxei8_v_f32mf2_m(...) __riscv_vloxei8_v_f32mf2_tumu(__VA_ARGS__)
986
#define vloxei8_v_f32m1_m(...) __riscv_vloxei8_v_f32m1_tumu(__VA_ARGS__)
987
#define vloxei8_v_f32m2_m(...) __riscv_vloxei8_v_f32m2_tumu(__VA_ARGS__)
988
#define vloxei8_v_f32m4_m(...) __riscv_vloxei8_v_f32m4_tumu(__VA_ARGS__)
989
#define vloxei8_v_f32m8_m(...) __riscv_vloxei8_v_f32m8_tumu(__VA_ARGS__)
990
#define vloxei16_v_f32mf2_m(...) __riscv_vloxei16_v_f32mf2_tumu(__VA_ARGS__)
991
#define vloxei16_v_f32m1_m(...) __riscv_vloxei16_v_f32m1_tumu(__VA_ARGS__)
992
#define vloxei16_v_f32m2_m(...) __riscv_vloxei16_v_f32m2_tumu(__VA_ARGS__)
993
#define vloxei16_v_f32m4_m(...) __riscv_vloxei16_v_f32m4_tumu(__VA_ARGS__)
994
#define vloxei16_v_f32m8_m(...) __riscv_vloxei16_v_f32m8_tumu(__VA_ARGS__)
995
#define vloxei32_v_f32mf2_m(...) __riscv_vloxei32_v_f32mf2_tumu(__VA_ARGS__)
996
#define vloxei32_v_f32m1_m(...) __riscv_vloxei32_v_f32m1_tumu(__VA_ARGS__)
997
#define vloxei32_v_f32m2_m(...) __riscv_vloxei32_v_f32m2_tumu(__VA_ARGS__)
998
#define vloxei32_v_f32m4_m(...) __riscv_vloxei32_v_f32m4_tumu(__VA_ARGS__)
999
#define vloxei32_v_f32m8_m(...) __riscv_vloxei32_v_f32m8_tumu(__VA_ARGS__)
1000
#define vloxei64_v_f32mf2_m(...) __riscv_vloxei64_v_f32mf2_tumu(__VA_ARGS__)
1001
#define vloxei64_v_f32m1_m(...) __riscv_vloxei64_v_f32m1_tumu(__VA_ARGS__)
1002
#define vloxei64_v_f32m2_m(...) __riscv_vloxei64_v_f32m2_tumu(__VA_ARGS__)
1003
#define vloxei64_v_f32m4_m(...) __riscv_vloxei64_v_f32m4_tumu(__VA_ARGS__)
1004
#define vloxei8_v_f64m1_m(...) __riscv_vloxei8_v_f64m1_tumu(__VA_ARGS__)
1005
#define vloxei8_v_f64m2_m(...) __riscv_vloxei8_v_f64m2_tumu(__VA_ARGS__)
1006
#define vloxei8_v_f64m4_m(...) __riscv_vloxei8_v_f64m4_tumu(__VA_ARGS__)
1007
#define vloxei8_v_f64m8_m(...) __riscv_vloxei8_v_f64m8_tumu(__VA_ARGS__)
1008
#define vloxei16_v_f64m1_m(...) __riscv_vloxei16_v_f64m1_tumu(__VA_ARGS__)
1009
#define vloxei16_v_f64m2_m(...) __riscv_vloxei16_v_f64m2_tumu(__VA_ARGS__)
1010
#define vloxei16_v_f64m4_m(...) __riscv_vloxei16_v_f64m4_tumu(__VA_ARGS__)
1011
#define vloxei16_v_f64m8_m(...) __riscv_vloxei16_v_f64m8_tumu(__VA_ARGS__)
1012
#define vloxei32_v_f64m1_m(...) __riscv_vloxei32_v_f64m1_tumu(__VA_ARGS__)
1013
#define vloxei32_v_f64m2_m(...) __riscv_vloxei32_v_f64m2_tumu(__VA_ARGS__)
1014
#define vloxei32_v_f64m4_m(...) __riscv_vloxei32_v_f64m4_tumu(__VA_ARGS__)
1015
#define vloxei32_v_f64m8_m(...) __riscv_vloxei32_v_f64m8_tumu(__VA_ARGS__)
1016
#define vloxei64_v_f64m1_m(...) __riscv_vloxei64_v_f64m1_tumu(__VA_ARGS__)
1017
#define vloxei64_v_f64m2_m(...) __riscv_vloxei64_v_f64m2_tumu(__VA_ARGS__)
1018
#define vloxei64_v_f64m4_m(...) __riscv_vloxei64_v_f64m4_tumu(__VA_ARGS__)
1019
#define vloxei64_v_f64m8_m(...) __riscv_vloxei64_v_f64m8_tumu(__VA_ARGS__)
1020
#define vluxei8_v_f16mf4_m(...) __riscv_vluxei8_v_f16mf4_tumu(__VA_ARGS__)
1021
#define vluxei8_v_f16mf2_m(...) __riscv_vluxei8_v_f16mf2_tumu(__VA_ARGS__)
1022
#define vluxei8_v_f16m1_m(...) __riscv_vluxei8_v_f16m1_tumu(__VA_ARGS__)
1023
#define vluxei8_v_f16m2_m(...) __riscv_vluxei8_v_f16m2_tumu(__VA_ARGS__)
1024
#define vluxei8_v_f16m4_m(...) __riscv_vluxei8_v_f16m4_tumu(__VA_ARGS__)
1025
#define vluxei8_v_f16m8_m(...) __riscv_vluxei8_v_f16m8_tumu(__VA_ARGS__)
1026
#define vluxei16_v_f16mf4_m(...) __riscv_vluxei16_v_f16mf4_tumu(__VA_ARGS__)
1027
#define vluxei16_v_f16mf2_m(...) __riscv_vluxei16_v_f16mf2_tumu(__VA_ARGS__)
1028
#define vluxei16_v_f16m1_m(...) __riscv_vluxei16_v_f16m1_tumu(__VA_ARGS__)
1029
#define vluxei16_v_f16m2_m(...) __riscv_vluxei16_v_f16m2_tumu(__VA_ARGS__)
1030
#define vluxei16_v_f16m4_m(...) __riscv_vluxei16_v_f16m4_tumu(__VA_ARGS__)
1031
#define vluxei16_v_f16m8_m(...) __riscv_vluxei16_v_f16m8_tumu(__VA_ARGS__)
1032
#define vluxei32_v_f16mf4_m(...) __riscv_vluxei32_v_f16mf4_tumu(__VA_ARGS__)
1033
#define vluxei32_v_f16mf2_m(...) __riscv_vluxei32_v_f16mf2_tumu(__VA_ARGS__)
1034
#define vluxei32_v_f16m1_m(...) __riscv_vluxei32_v_f16m1_tumu(__VA_ARGS__)
1035
#define vluxei32_v_f16m2_m(...) __riscv_vluxei32_v_f16m2_tumu(__VA_ARGS__)
1036
#define vluxei32_v_f16m4_m(...) __riscv_vluxei32_v_f16m4_tumu(__VA_ARGS__)
1037
#define vluxei64_v_f16mf4_m(...) __riscv_vluxei64_v_f16mf4_tumu(__VA_ARGS__)
1038
#define vluxei64_v_f16mf2_m(...) __riscv_vluxei64_v_f16mf2_tumu(__VA_ARGS__)
1039
#define vluxei64_v_f16m1_m(...) __riscv_vluxei64_v_f16m1_tumu(__VA_ARGS__)
1040
#define vluxei64_v_f16m2_m(...) __riscv_vluxei64_v_f16m2_tumu(__VA_ARGS__)
1041
#define vluxei8_v_f32mf2_m(...) __riscv_vluxei8_v_f32mf2_tumu(__VA_ARGS__)
1042
#define vluxei8_v_f32m1_m(...) __riscv_vluxei8_v_f32m1_tumu(__VA_ARGS__)
1043
#define vluxei8_v_f32m2_m(...) __riscv_vluxei8_v_f32m2_tumu(__VA_ARGS__)
1044
#define vluxei8_v_f32m4_m(...) __riscv_vluxei8_v_f32m4_tumu(__VA_ARGS__)
1045
#define vluxei8_v_f32m8_m(...) __riscv_vluxei8_v_f32m8_tumu(__VA_ARGS__)
1046
#define vluxei16_v_f32mf2_m(...) __riscv_vluxei16_v_f32mf2_tumu(__VA_ARGS__)
1047
#define vluxei16_v_f32m1_m(...) __riscv_vluxei16_v_f32m1_tumu(__VA_ARGS__)
1048
#define vluxei16_v_f32m2_m(...) __riscv_vluxei16_v_f32m2_tumu(__VA_ARGS__)
1049
#define vluxei16_v_f32m4_m(...) __riscv_vluxei16_v_f32m4_tumu(__VA_ARGS__)
1050
#define vluxei16_v_f32m8_m(...) __riscv_vluxei16_v_f32m8_tumu(__VA_ARGS__)
1051
#define vluxei32_v_f32mf2_m(...) __riscv_vluxei32_v_f32mf2_tumu(__VA_ARGS__)
1052
#define vluxei32_v_f32m1_m(...) __riscv_vluxei32_v_f32m1_tumu(__VA_ARGS__)
1053
#define vluxei32_v_f32m2_m(...) __riscv_vluxei32_v_f32m2_tumu(__VA_ARGS__)
1054
#define vluxei32_v_f32m4_m(...) __riscv_vluxei32_v_f32m4_tumu(__VA_ARGS__)
1055
#define vluxei32_v_f32m8_m(...) __riscv_vluxei32_v_f32m8_tumu(__VA_ARGS__)
1056
#define vluxei64_v_f32mf2_m(...) __riscv_vluxei64_v_f32mf2_tumu(__VA_ARGS__)
1057
#define vluxei64_v_f32m1_m(...) __riscv_vluxei64_v_f32m1_tumu(__VA_ARGS__)
1058
#define vluxei64_v_f32m2_m(...) __riscv_vluxei64_v_f32m2_tumu(__VA_ARGS__)
1059
#define vluxei64_v_f32m4_m(...) __riscv_vluxei64_v_f32m4_tumu(__VA_ARGS__)
1060
#define vluxei8_v_f64m1_m(...) __riscv_vluxei8_v_f64m1_tumu(__VA_ARGS__)
1061
#define vluxei8_v_f64m2_m(...) __riscv_vluxei8_v_f64m2_tumu(__VA_ARGS__)
1062
#define vluxei8_v_f64m4_m(...) __riscv_vluxei8_v_f64m4_tumu(__VA_ARGS__)
1063
#define vluxei8_v_f64m8_m(...) __riscv_vluxei8_v_f64m8_tumu(__VA_ARGS__)
1064
#define vluxei16_v_f64m1_m(...) __riscv_vluxei16_v_f64m1_tumu(__VA_ARGS__)
1065
#define vluxei16_v_f64m2_m(...) __riscv_vluxei16_v_f64m2_tumu(__VA_ARGS__)
1066
#define vluxei16_v_f64m4_m(...) __riscv_vluxei16_v_f64m4_tumu(__VA_ARGS__)
1067
#define vluxei16_v_f64m8_m(...) __riscv_vluxei16_v_f64m8_tumu(__VA_ARGS__)
1068
#define vluxei32_v_f64m1_m(...) __riscv_vluxei32_v_f64m1_tumu(__VA_ARGS__)
1069
#define vluxei32_v_f64m2_m(...) __riscv_vluxei32_v_f64m2_tumu(__VA_ARGS__)
1070
#define vluxei32_v_f64m4_m(...) __riscv_vluxei32_v_f64m4_tumu(__VA_ARGS__)
1071
#define vluxei32_v_f64m8_m(...) __riscv_vluxei32_v_f64m8_tumu(__VA_ARGS__)
1072
#define vluxei64_v_f64m1_m(...) __riscv_vluxei64_v_f64m1_tumu(__VA_ARGS__)
1073
#define vluxei64_v_f64m2_m(...) __riscv_vluxei64_v_f64m2_tumu(__VA_ARGS__)
1074
#define vluxei64_v_f64m4_m(...) __riscv_vluxei64_v_f64m4_tumu(__VA_ARGS__)
1075
#define vluxei64_v_f64m8_m(...) __riscv_vluxei64_v_f64m8_tumu(__VA_ARGS__)
1076
#define vloxei8_v_i8mf8_m(...) __riscv_vloxei8_v_i8mf8_tumu(__VA_ARGS__)
1077
#define vloxei8_v_i8mf4_m(...) __riscv_vloxei8_v_i8mf4_tumu(__VA_ARGS__)
1078
#define vloxei8_v_i8mf2_m(...) __riscv_vloxei8_v_i8mf2_tumu(__VA_ARGS__)
1079
#define vloxei8_v_i8m1_m(...) __riscv_vloxei8_v_i8m1_tumu(__VA_ARGS__)
1080
#define vloxei8_v_i8m2_m(...) __riscv_vloxei8_v_i8m2_tumu(__VA_ARGS__)
1081
#define vloxei8_v_i8m4_m(...) __riscv_vloxei8_v_i8m4_tumu(__VA_ARGS__)
1082
#define vloxei8_v_i8m8_m(...) __riscv_vloxei8_v_i8m8_tumu(__VA_ARGS__)
1083
#define vloxei16_v_i8mf8_m(...) __riscv_vloxei16_v_i8mf8_tumu(__VA_ARGS__)
1084
#define vloxei16_v_i8mf4_m(...) __riscv_vloxei16_v_i8mf4_tumu(__VA_ARGS__)
1085
#define vloxei16_v_i8mf2_m(...) __riscv_vloxei16_v_i8mf2_tumu(__VA_ARGS__)
1086
#define vloxei16_v_i8m1_m(...) __riscv_vloxei16_v_i8m1_tumu(__VA_ARGS__)
1087
#define vloxei16_v_i8m2_m(...) __riscv_vloxei16_v_i8m2_tumu(__VA_ARGS__)
1088
#define vloxei16_v_i8m4_m(...) __riscv_vloxei16_v_i8m4_tumu(__VA_ARGS__)
1089
#define vloxei32_v_i8mf8_m(...) __riscv_vloxei32_v_i8mf8_tumu(__VA_ARGS__)
1090
#define vloxei32_v_i8mf4_m(...) __riscv_vloxei32_v_i8mf4_tumu(__VA_ARGS__)
1091
#define vloxei32_v_i8mf2_m(...) __riscv_vloxei32_v_i8mf2_tumu(__VA_ARGS__)
1092
#define vloxei32_v_i8m1_m(...) __riscv_vloxei32_v_i8m1_tumu(__VA_ARGS__)
1093
#define vloxei32_v_i8m2_m(...) __riscv_vloxei32_v_i8m2_tumu(__VA_ARGS__)
1094
#define vloxei64_v_i8mf8_m(...) __riscv_vloxei64_v_i8mf8_tumu(__VA_ARGS__)
1095
#define vloxei64_v_i8mf4_m(...) __riscv_vloxei64_v_i8mf4_tumu(__VA_ARGS__)
1096
#define vloxei64_v_i8mf2_m(...) __riscv_vloxei64_v_i8mf2_tumu(__VA_ARGS__)
1097
#define vloxei64_v_i8m1_m(...) __riscv_vloxei64_v_i8m1_tumu(__VA_ARGS__)
1098
#define vloxei8_v_i16mf4_m(...) __riscv_vloxei8_v_i16mf4_tumu(__VA_ARGS__)
1099
#define vloxei8_v_i16mf2_m(...) __riscv_vloxei8_v_i16mf2_tumu(__VA_ARGS__)
1100
#define vloxei8_v_i16m1_m(...) __riscv_vloxei8_v_i16m1_tumu(__VA_ARGS__)
1101
#define vloxei8_v_i16m2_m(...) __riscv_vloxei8_v_i16m2_tumu(__VA_ARGS__)
1102
#define vloxei8_v_i16m4_m(...) __riscv_vloxei8_v_i16m4_tumu(__VA_ARGS__)
1103
#define vloxei8_v_i16m8_m(...) __riscv_vloxei8_v_i16m8_tumu(__VA_ARGS__)
1104
#define vloxei16_v_i16mf4_m(...) __riscv_vloxei16_v_i16mf4_tumu(__VA_ARGS__)
1105
#define vloxei16_v_i16mf2_m(...) __riscv_vloxei16_v_i16mf2_tumu(__VA_ARGS__)
1106
#define vloxei16_v_i16m1_m(...) __riscv_vloxei16_v_i16m1_tumu(__VA_ARGS__)
1107
#define vloxei16_v_i16m2_m(...) __riscv_vloxei16_v_i16m2_tumu(__VA_ARGS__)
1108
#define vloxei16_v_i16m4_m(...) __riscv_vloxei16_v_i16m4_tumu(__VA_ARGS__)
1109
#define vloxei16_v_i16m8_m(...) __riscv_vloxei16_v_i16m8_tumu(__VA_ARGS__)
1110
#define vloxei32_v_i16mf4_m(...) __riscv_vloxei32_v_i16mf4_tumu(__VA_ARGS__)
1111
#define vloxei32_v_i16mf2_m(...) __riscv_vloxei32_v_i16mf2_tumu(__VA_ARGS__)
1112
#define vloxei32_v_i16m1_m(...) __riscv_vloxei32_v_i16m1_tumu(__VA_ARGS__)
1113
#define vloxei32_v_i16m2_m(...) __riscv_vloxei32_v_i16m2_tumu(__VA_ARGS__)
1114
#define vloxei32_v_i16m4_m(...) __riscv_vloxei32_v_i16m4_tumu(__VA_ARGS__)
1115
#define vloxei64_v_i16mf4_m(...) __riscv_vloxei64_v_i16mf4_tumu(__VA_ARGS__)
1116
#define vloxei64_v_i16mf2_m(...) __riscv_vloxei64_v_i16mf2_tumu(__VA_ARGS__)
1117
#define vloxei64_v_i16m1_m(...) __riscv_vloxei64_v_i16m1_tumu(__VA_ARGS__)
1118
#define vloxei64_v_i16m2_m(...) __riscv_vloxei64_v_i16m2_tumu(__VA_ARGS__)
1119
#define vloxei8_v_i32mf2_m(...) __riscv_vloxei8_v_i32mf2_tumu(__VA_ARGS__)
1120
#define vloxei8_v_i32m1_m(...) __riscv_vloxei8_v_i32m1_tumu(__VA_ARGS__)
1121
#define vloxei8_v_i32m2_m(...) __riscv_vloxei8_v_i32m2_tumu(__VA_ARGS__)
1122
#define vloxei8_v_i32m4_m(...) __riscv_vloxei8_v_i32m4_tumu(__VA_ARGS__)
1123
#define vloxei8_v_i32m8_m(...) __riscv_vloxei8_v_i32m8_tumu(__VA_ARGS__)
1124
#define vloxei16_v_i32mf2_m(...) __riscv_vloxei16_v_i32mf2_tumu(__VA_ARGS__)
1125
#define vloxei16_v_i32m1_m(...) __riscv_vloxei16_v_i32m1_tumu(__VA_ARGS__)
1126
#define vloxei16_v_i32m2_m(...) __riscv_vloxei16_v_i32m2_tumu(__VA_ARGS__)
1127
#define vloxei16_v_i32m4_m(...) __riscv_vloxei16_v_i32m4_tumu(__VA_ARGS__)
1128
#define vloxei16_v_i32m8_m(...) __riscv_vloxei16_v_i32m8_tumu(__VA_ARGS__)
1129
#define vloxei32_v_i32mf2_m(...) __riscv_vloxei32_v_i32mf2_tumu(__VA_ARGS__)
1130
#define vloxei32_v_i32m1_m(...) __riscv_vloxei32_v_i32m1_tumu(__VA_ARGS__)
1131
#define vloxei32_v_i32m2_m(...) __riscv_vloxei32_v_i32m2_tumu(__VA_ARGS__)
1132
#define vloxei32_v_i32m4_m(...) __riscv_vloxei32_v_i32m4_tumu(__VA_ARGS__)
1133
#define vloxei32_v_i32m8_m(...) __riscv_vloxei32_v_i32m8_tumu(__VA_ARGS__)
1134
#define vloxei64_v_i32mf2_m(...) __riscv_vloxei64_v_i32mf2_tumu(__VA_ARGS__)
1135
#define vloxei64_v_i32m1_m(...) __riscv_vloxei64_v_i32m1_tumu(__VA_ARGS__)
1136
#define vloxei64_v_i32m2_m(...) __riscv_vloxei64_v_i32m2_tumu(__VA_ARGS__)
1137
#define vloxei64_v_i32m4_m(...) __riscv_vloxei64_v_i32m4_tumu(__VA_ARGS__)
1138
#define vloxei8_v_i64m1_m(...) __riscv_vloxei8_v_i64m1_tumu(__VA_ARGS__)
1139
#define vloxei8_v_i64m2_m(...) __riscv_vloxei8_v_i64m2_tumu(__VA_ARGS__)
1140
#define vloxei8_v_i64m4_m(...) __riscv_vloxei8_v_i64m4_tumu(__VA_ARGS__)
1141
#define vloxei8_v_i64m8_m(...) __riscv_vloxei8_v_i64m8_tumu(__VA_ARGS__)
1142
#define vloxei16_v_i64m1_m(...) __riscv_vloxei16_v_i64m1_tumu(__VA_ARGS__)
1143
#define vloxei16_v_i64m2_m(...) __riscv_vloxei16_v_i64m2_tumu(__VA_ARGS__)
1144
#define vloxei16_v_i64m4_m(...) __riscv_vloxei16_v_i64m4_tumu(__VA_ARGS__)
1145
#define vloxei16_v_i64m8_m(...) __riscv_vloxei16_v_i64m8_tumu(__VA_ARGS__)
1146
#define vloxei32_v_i64m1_m(...) __riscv_vloxei32_v_i64m1_tumu(__VA_ARGS__)
1147
#define vloxei32_v_i64m2_m(...) __riscv_vloxei32_v_i64m2_tumu(__VA_ARGS__)
1148
#define vloxei32_v_i64m4_m(...) __riscv_vloxei32_v_i64m4_tumu(__VA_ARGS__)
1149
#define vloxei32_v_i64m8_m(...) __riscv_vloxei32_v_i64m8_tumu(__VA_ARGS__)
1150
#define vloxei64_v_i64m1_m(...) __riscv_vloxei64_v_i64m1_tumu(__VA_ARGS__)
1151
#define vloxei64_v_i64m2_m(...) __riscv_vloxei64_v_i64m2_tumu(__VA_ARGS__)
1152
#define vloxei64_v_i64m4_m(...) __riscv_vloxei64_v_i64m4_tumu(__VA_ARGS__)
1153
#define vloxei64_v_i64m8_m(...) __riscv_vloxei64_v_i64m8_tumu(__VA_ARGS__)
1154
#define vluxei8_v_i8mf8_m(...) __riscv_vluxei8_v_i8mf8_tumu(__VA_ARGS__)
1155
#define vluxei8_v_i8mf4_m(...) __riscv_vluxei8_v_i8mf4_tumu(__VA_ARGS__)
1156
#define vluxei8_v_i8mf2_m(...) __riscv_vluxei8_v_i8mf2_tumu(__VA_ARGS__)
1157
#define vluxei8_v_i8m1_m(...) __riscv_vluxei8_v_i8m1_tumu(__VA_ARGS__)
1158
#define vluxei8_v_i8m2_m(...) __riscv_vluxei8_v_i8m2_tumu(__VA_ARGS__)
1159
#define vluxei8_v_i8m4_m(...) __riscv_vluxei8_v_i8m4_tumu(__VA_ARGS__)
1160
#define vluxei8_v_i8m8_m(...) __riscv_vluxei8_v_i8m8_tumu(__VA_ARGS__)
1161
#define vluxei16_v_i8mf8_m(...) __riscv_vluxei16_v_i8mf8_tumu(__VA_ARGS__)
1162
#define vluxei16_v_i8mf4_m(...) __riscv_vluxei16_v_i8mf4_tumu(__VA_ARGS__)
1163
#define vluxei16_v_i8mf2_m(...) __riscv_vluxei16_v_i8mf2_tumu(__VA_ARGS__)
1164
#define vluxei16_v_i8m1_m(...) __riscv_vluxei16_v_i8m1_tumu(__VA_ARGS__)
1165
#define vluxei16_v_i8m2_m(...) __riscv_vluxei16_v_i8m2_tumu(__VA_ARGS__)
1166
#define vluxei16_v_i8m4_m(...) __riscv_vluxei16_v_i8m4_tumu(__VA_ARGS__)
1167
#define vluxei32_v_i8mf8_m(...) __riscv_vluxei32_v_i8mf8_tumu(__VA_ARGS__)
1168
#define vluxei32_v_i8mf4_m(...) __riscv_vluxei32_v_i8mf4_tumu(__VA_ARGS__)
1169
#define vluxei32_v_i8mf2_m(...) __riscv_vluxei32_v_i8mf2_tumu(__VA_ARGS__)
1170
#define vluxei32_v_i8m1_m(...) __riscv_vluxei32_v_i8m1_tumu(__VA_ARGS__)
1171
#define vluxei32_v_i8m2_m(...) __riscv_vluxei32_v_i8m2_tumu(__VA_ARGS__)
1172
#define vluxei64_v_i8mf8_m(...) __riscv_vluxei64_v_i8mf8_tumu(__VA_ARGS__)
1173
#define vluxei64_v_i8mf4_m(...) __riscv_vluxei64_v_i8mf4_tumu(__VA_ARGS__)
1174
#define vluxei64_v_i8mf2_m(...) __riscv_vluxei64_v_i8mf2_tumu(__VA_ARGS__)
1175
#define vluxei64_v_i8m1_m(...) __riscv_vluxei64_v_i8m1_tumu(__VA_ARGS__)
1176
#define vluxei8_v_i16mf4_m(...) __riscv_vluxei8_v_i16mf4_tumu(__VA_ARGS__)
1177
#define vluxei8_v_i16mf2_m(...) __riscv_vluxei8_v_i16mf2_tumu(__VA_ARGS__)
1178
#define vluxei8_v_i16m1_m(...) __riscv_vluxei8_v_i16m1_tumu(__VA_ARGS__)
1179
#define vluxei8_v_i16m2_m(...) __riscv_vluxei8_v_i16m2_tumu(__VA_ARGS__)
1180
#define vluxei8_v_i16m4_m(...) __riscv_vluxei8_v_i16m4_tumu(__VA_ARGS__)
1181
#define vluxei8_v_i16m8_m(...) __riscv_vluxei8_v_i16m8_tumu(__VA_ARGS__)
1182
#define vluxei16_v_i16mf4_m(...) __riscv_vluxei16_v_i16mf4_tumu(__VA_ARGS__)
1183
#define vluxei16_v_i16mf2_m(...) __riscv_vluxei16_v_i16mf2_tumu(__VA_ARGS__)
1184
#define vluxei16_v_i16m1_m(...) __riscv_vluxei16_v_i16m1_tumu(__VA_ARGS__)
1185
#define vluxei16_v_i16m2_m(...) __riscv_vluxei16_v_i16m2_tumu(__VA_ARGS__)
1186
#define vluxei16_v_i16m4_m(...) __riscv_vluxei16_v_i16m4_tumu(__VA_ARGS__)
1187
#define vluxei16_v_i16m8_m(...) __riscv_vluxei16_v_i16m8_tumu(__VA_ARGS__)
1188
#define vluxei32_v_i16mf4_m(...) __riscv_vluxei32_v_i16mf4_tumu(__VA_ARGS__)
1189
#define vluxei32_v_i16mf2_m(...) __riscv_vluxei32_v_i16mf2_tumu(__VA_ARGS__)
1190
#define vluxei32_v_i16m1_m(...) __riscv_vluxei32_v_i16m1_tumu(__VA_ARGS__)
1191
#define vluxei32_v_i16m2_m(...) __riscv_vluxei32_v_i16m2_tumu(__VA_ARGS__)
1192
#define vluxei32_v_i16m4_m(...) __riscv_vluxei32_v_i16m4_tumu(__VA_ARGS__)
1193
#define vluxei64_v_i16mf4_m(...) __riscv_vluxei64_v_i16mf4_tumu(__VA_ARGS__)
1194
#define vluxei64_v_i16mf2_m(...) __riscv_vluxei64_v_i16mf2_tumu(__VA_ARGS__)
1195
#define vluxei64_v_i16m1_m(...) __riscv_vluxei64_v_i16m1_tumu(__VA_ARGS__)
1196
#define vluxei64_v_i16m2_m(...) __riscv_vluxei64_v_i16m2_tumu(__VA_ARGS__)
1197
#define vluxei8_v_i32mf2_m(...) __riscv_vluxei8_v_i32mf2_tumu(__VA_ARGS__)
1198
#define vluxei8_v_i32m1_m(...) __riscv_vluxei8_v_i32m1_tumu(__VA_ARGS__)
1199
#define vluxei8_v_i32m2_m(...) __riscv_vluxei8_v_i32m2_tumu(__VA_ARGS__)
1200
#define vluxei8_v_i32m4_m(...) __riscv_vluxei8_v_i32m4_tumu(__VA_ARGS__)
1201
#define vluxei8_v_i32m8_m(...) __riscv_vluxei8_v_i32m8_tumu(__VA_ARGS__)
1202
#define vluxei16_v_i32mf2_m(...) __riscv_vluxei16_v_i32mf2_tumu(__VA_ARGS__)
1203
#define vluxei16_v_i32m1_m(...) __riscv_vluxei16_v_i32m1_tumu(__VA_ARGS__)
1204
#define vluxei16_v_i32m2_m(...) __riscv_vluxei16_v_i32m2_tumu(__VA_ARGS__)
1205
#define vluxei16_v_i32m4_m(...) __riscv_vluxei16_v_i32m4_tumu(__VA_ARGS__)
1206
#define vluxei16_v_i32m8_m(...) __riscv_vluxei16_v_i32m8_tumu(__VA_ARGS__)
1207
#define vluxei32_v_i32mf2_m(...) __riscv_vluxei32_v_i32mf2_tumu(__VA_ARGS__)
1208
#define vluxei32_v_i32m1_m(...) __riscv_vluxei32_v_i32m1_tumu(__VA_ARGS__)
1209
#define vluxei32_v_i32m2_m(...) __riscv_vluxei32_v_i32m2_tumu(__VA_ARGS__)
1210
#define vluxei32_v_i32m4_m(...) __riscv_vluxei32_v_i32m4_tumu(__VA_ARGS__)
1211
#define vluxei32_v_i32m8_m(...) __riscv_vluxei32_v_i32m8_tumu(__VA_ARGS__)
1212
#define vluxei64_v_i32mf2_m(...) __riscv_vluxei64_v_i32mf2_tumu(__VA_ARGS__)
1213
#define vluxei64_v_i32m1_m(...) __riscv_vluxei64_v_i32m1_tumu(__VA_ARGS__)
1214
#define vluxei64_v_i32m2_m(...) __riscv_vluxei64_v_i32m2_tumu(__VA_ARGS__)
1215
#define vluxei64_v_i32m4_m(...) __riscv_vluxei64_v_i32m4_tumu(__VA_ARGS__)
1216
#define vluxei8_v_i64m1_m(...) __riscv_vluxei8_v_i64m1_tumu(__VA_ARGS__)
1217
#define vluxei8_v_i64m2_m(...) __riscv_vluxei8_v_i64m2_tumu(__VA_ARGS__)
1218
#define vluxei8_v_i64m4_m(...) __riscv_vluxei8_v_i64m4_tumu(__VA_ARGS__)
1219
#define vluxei8_v_i64m8_m(...) __riscv_vluxei8_v_i64m8_tumu(__VA_ARGS__)
1220
#define vluxei16_v_i64m1_m(...) __riscv_vluxei16_v_i64m1_tumu(__VA_ARGS__)
1221
#define vluxei16_v_i64m2_m(...) __riscv_vluxei16_v_i64m2_tumu(__VA_ARGS__)
1222
#define vluxei16_v_i64m4_m(...) __riscv_vluxei16_v_i64m4_tumu(__VA_ARGS__)
1223
#define vluxei16_v_i64m8_m(...) __riscv_vluxei16_v_i64m8_tumu(__VA_ARGS__)
1224
#define vluxei32_v_i64m1_m(...) __riscv_vluxei32_v_i64m1_tumu(__VA_ARGS__)
1225
#define vluxei32_v_i64m2_m(...) __riscv_vluxei32_v_i64m2_tumu(__VA_ARGS__)
1226
#define vluxei32_v_i64m4_m(...) __riscv_vluxei32_v_i64m4_tumu(__VA_ARGS__)
1227
#define vluxei32_v_i64m8_m(...) __riscv_vluxei32_v_i64m8_tumu(__VA_ARGS__)
1228
#define vluxei64_v_i64m1_m(...) __riscv_vluxei64_v_i64m1_tumu(__VA_ARGS__)
1229
#define vluxei64_v_i64m2_m(...) __riscv_vluxei64_v_i64m2_tumu(__VA_ARGS__)
1230
#define vluxei64_v_i64m4_m(...) __riscv_vluxei64_v_i64m4_tumu(__VA_ARGS__)
1231
#define vluxei64_v_i64m8_m(...) __riscv_vluxei64_v_i64m8_tumu(__VA_ARGS__)
1232
#define vloxei8_v_u8mf8_m(...) __riscv_vloxei8_v_u8mf8_tumu(__VA_ARGS__)
1233
#define vloxei8_v_u8mf4_m(...) __riscv_vloxei8_v_u8mf4_tumu(__VA_ARGS__)
1234
#define vloxei8_v_u8mf2_m(...) __riscv_vloxei8_v_u8mf2_tumu(__VA_ARGS__)
1235
#define vloxei8_v_u8m1_m(...) __riscv_vloxei8_v_u8m1_tumu(__VA_ARGS__)
1236
#define vloxei8_v_u8m2_m(...) __riscv_vloxei8_v_u8m2_tumu(__VA_ARGS__)
1237
#define vloxei8_v_u8m4_m(...) __riscv_vloxei8_v_u8m4_tumu(__VA_ARGS__)
1238
#define vloxei8_v_u8m8_m(...) __riscv_vloxei8_v_u8m8_tumu(__VA_ARGS__)
1239
#define vloxei16_v_u8mf8_m(...) __riscv_vloxei16_v_u8mf8_tumu(__VA_ARGS__)
1240
#define vloxei16_v_u8mf4_m(...) __riscv_vloxei16_v_u8mf4_tumu(__VA_ARGS__)
1241
#define vloxei16_v_u8mf2_m(...) __riscv_vloxei16_v_u8mf2_tumu(__VA_ARGS__)
1242
#define vloxei16_v_u8m1_m(...) __riscv_vloxei16_v_u8m1_tumu(__VA_ARGS__)
1243
#define vloxei16_v_u8m2_m(...) __riscv_vloxei16_v_u8m2_tumu(__VA_ARGS__)
1244
#define vloxei16_v_u8m4_m(...) __riscv_vloxei16_v_u8m4_tumu(__VA_ARGS__)
1245
#define vloxei32_v_u8mf8_m(...) __riscv_vloxei32_v_u8mf8_tumu(__VA_ARGS__)
1246
#define vloxei32_v_u8mf4_m(...) __riscv_vloxei32_v_u8mf4_tumu(__VA_ARGS__)
1247
#define vloxei32_v_u8mf2_m(...) __riscv_vloxei32_v_u8mf2_tumu(__VA_ARGS__)
1248
#define vloxei32_v_u8m1_m(...) __riscv_vloxei32_v_u8m1_tumu(__VA_ARGS__)
1249
#define vloxei32_v_u8m2_m(...) __riscv_vloxei32_v_u8m2_tumu(__VA_ARGS__)
1250
#define vloxei64_v_u8mf8_m(...) __riscv_vloxei64_v_u8mf8_tumu(__VA_ARGS__)
1251
#define vloxei64_v_u8mf4_m(...) __riscv_vloxei64_v_u8mf4_tumu(__VA_ARGS__)
1252
#define vloxei64_v_u8mf2_m(...) __riscv_vloxei64_v_u8mf2_tumu(__VA_ARGS__)
1253
#define vloxei64_v_u8m1_m(...) __riscv_vloxei64_v_u8m1_tumu(__VA_ARGS__)
1254
#define vloxei8_v_u16mf4_m(...) __riscv_vloxei8_v_u16mf4_tumu(__VA_ARGS__)
1255
#define vloxei8_v_u16mf2_m(...) __riscv_vloxei8_v_u16mf2_tumu(__VA_ARGS__)
1256
#define vloxei8_v_u16m1_m(...) __riscv_vloxei8_v_u16m1_tumu(__VA_ARGS__)
1257
#define vloxei8_v_u16m2_m(...) __riscv_vloxei8_v_u16m2_tumu(__VA_ARGS__)
1258
#define vloxei8_v_u16m4_m(...) __riscv_vloxei8_v_u16m4_tumu(__VA_ARGS__)
1259
#define vloxei8_v_u16m8_m(...) __riscv_vloxei8_v_u16m8_tumu(__VA_ARGS__)
1260
#define vloxei16_v_u16mf4_m(...) __riscv_vloxei16_v_u16mf4_tumu(__VA_ARGS__)
1261
#define vloxei16_v_u16mf2_m(...) __riscv_vloxei16_v_u16mf2_tumu(__VA_ARGS__)
1262
#define vloxei16_v_u16m1_m(...) __riscv_vloxei16_v_u16m1_tumu(__VA_ARGS__)
1263
#define vloxei16_v_u16m2_m(...) __riscv_vloxei16_v_u16m2_tumu(__VA_ARGS__)
1264
#define vloxei16_v_u16m4_m(...) __riscv_vloxei16_v_u16m4_tumu(__VA_ARGS__)
1265
#define vloxei16_v_u16m8_m(...) __riscv_vloxei16_v_u16m8_tumu(__VA_ARGS__)
1266
#define vloxei32_v_u16mf4_m(...) __riscv_vloxei32_v_u16mf4_tumu(__VA_ARGS__)
1267
#define vloxei32_v_u16mf2_m(...) __riscv_vloxei32_v_u16mf2_tumu(__VA_ARGS__)
1268
#define vloxei32_v_u16m1_m(...) __riscv_vloxei32_v_u16m1_tumu(__VA_ARGS__)
1269
#define vloxei32_v_u16m2_m(...) __riscv_vloxei32_v_u16m2_tumu(__VA_ARGS__)
1270
#define vloxei32_v_u16m4_m(...) __riscv_vloxei32_v_u16m4_tumu(__VA_ARGS__)
1271
#define vloxei64_v_u16mf4_m(...) __riscv_vloxei64_v_u16mf4_tumu(__VA_ARGS__)
1272
#define vloxei64_v_u16mf2_m(...) __riscv_vloxei64_v_u16mf2_tumu(__VA_ARGS__)
1273
#define vloxei64_v_u16m1_m(...) __riscv_vloxei64_v_u16m1_tumu(__VA_ARGS__)
1274
#define vloxei64_v_u16m2_m(...) __riscv_vloxei64_v_u16m2_tumu(__VA_ARGS__)
1275
#define vloxei8_v_u32mf2_m(...) __riscv_vloxei8_v_u32mf2_tumu(__VA_ARGS__)
1276
#define vloxei8_v_u32m1_m(...) __riscv_vloxei8_v_u32m1_tumu(__VA_ARGS__)
1277
#define vloxei8_v_u32m2_m(...) __riscv_vloxei8_v_u32m2_tumu(__VA_ARGS__)
1278
#define vloxei8_v_u32m4_m(...) __riscv_vloxei8_v_u32m4_tumu(__VA_ARGS__)
1279
#define vloxei8_v_u32m8_m(...) __riscv_vloxei8_v_u32m8_tumu(__VA_ARGS__)
1280
#define vloxei16_v_u32mf2_m(...) __riscv_vloxei16_v_u32mf2_tumu(__VA_ARGS__)
1281
#define vloxei16_v_u32m1_m(...) __riscv_vloxei16_v_u32m1_tumu(__VA_ARGS__)
1282
#define vloxei16_v_u32m2_m(...) __riscv_vloxei16_v_u32m2_tumu(__VA_ARGS__)
1283
#define vloxei16_v_u32m4_m(...) __riscv_vloxei16_v_u32m4_tumu(__VA_ARGS__)
1284
#define vloxei16_v_u32m8_m(...) __riscv_vloxei16_v_u32m8_tumu(__VA_ARGS__)
1285
#define vloxei32_v_u32mf2_m(...) __riscv_vloxei32_v_u32mf2_tumu(__VA_ARGS__)
1286
#define vloxei32_v_u32m1_m(...) __riscv_vloxei32_v_u32m1_tumu(__VA_ARGS__)
1287
#define vloxei32_v_u32m2_m(...) __riscv_vloxei32_v_u32m2_tumu(__VA_ARGS__)
1288
#define vloxei32_v_u32m4_m(...) __riscv_vloxei32_v_u32m4_tumu(__VA_ARGS__)
1289
#define vloxei32_v_u32m8_m(...) __riscv_vloxei32_v_u32m8_tumu(__VA_ARGS__)
1290
#define vloxei64_v_u32mf2_m(...) __riscv_vloxei64_v_u32mf2_tumu(__VA_ARGS__)
1291
#define vloxei64_v_u32m1_m(...) __riscv_vloxei64_v_u32m1_tumu(__VA_ARGS__)
1292
#define vloxei64_v_u32m2_m(...) __riscv_vloxei64_v_u32m2_tumu(__VA_ARGS__)
1293
#define vloxei64_v_u32m4_m(...) __riscv_vloxei64_v_u32m4_tumu(__VA_ARGS__)
1294
#define vloxei8_v_u64m1_m(...) __riscv_vloxei8_v_u64m1_tumu(__VA_ARGS__)
1295
#define vloxei8_v_u64m2_m(...) __riscv_vloxei8_v_u64m2_tumu(__VA_ARGS__)
1296
#define vloxei8_v_u64m4_m(...) __riscv_vloxei8_v_u64m4_tumu(__VA_ARGS__)
1297
#define vloxei8_v_u64m8_m(...) __riscv_vloxei8_v_u64m8_tumu(__VA_ARGS__)
1298
#define vloxei16_v_u64m1_m(...) __riscv_vloxei16_v_u64m1_tumu(__VA_ARGS__)
1299
#define vloxei16_v_u64m2_m(...) __riscv_vloxei16_v_u64m2_tumu(__VA_ARGS__)
1300
#define vloxei16_v_u64m4_m(...) __riscv_vloxei16_v_u64m4_tumu(__VA_ARGS__)
1301
#define vloxei16_v_u64m8_m(...) __riscv_vloxei16_v_u64m8_tumu(__VA_ARGS__)
1302
#define vloxei32_v_u64m1_m(...) __riscv_vloxei32_v_u64m1_tumu(__VA_ARGS__)
1303
#define vloxei32_v_u64m2_m(...) __riscv_vloxei32_v_u64m2_tumu(__VA_ARGS__)
1304
#define vloxei32_v_u64m4_m(...) __riscv_vloxei32_v_u64m4_tumu(__VA_ARGS__)
1305
#define vloxei32_v_u64m8_m(...) __riscv_vloxei32_v_u64m8_tumu(__VA_ARGS__)
1306
#define vloxei64_v_u64m1_m(...) __riscv_vloxei64_v_u64m1_tumu(__VA_ARGS__)
1307
#define vloxei64_v_u64m2_m(...) __riscv_vloxei64_v_u64m2_tumu(__VA_ARGS__)
1308
#define vloxei64_v_u64m4_m(...) __riscv_vloxei64_v_u64m4_tumu(__VA_ARGS__)
1309
#define vloxei64_v_u64m8_m(...) __riscv_vloxei64_v_u64m8_tumu(__VA_ARGS__)
1310
#define vluxei8_v_u8mf8_m(...) __riscv_vluxei8_v_u8mf8_tumu(__VA_ARGS__)
1311
#define vluxei8_v_u8mf4_m(...) __riscv_vluxei8_v_u8mf4_tumu(__VA_ARGS__)
1312
#define vluxei8_v_u8mf2_m(...) __riscv_vluxei8_v_u8mf2_tumu(__VA_ARGS__)
1313
#define vluxei8_v_u8m1_m(...) __riscv_vluxei8_v_u8m1_tumu(__VA_ARGS__)
1314
#define vluxei8_v_u8m2_m(...) __riscv_vluxei8_v_u8m2_tumu(__VA_ARGS__)
1315
#define vluxei8_v_u8m4_m(...) __riscv_vluxei8_v_u8m4_tumu(__VA_ARGS__)
1316
#define vluxei8_v_u8m8_m(...) __riscv_vluxei8_v_u8m8_tumu(__VA_ARGS__)
1317
#define vluxei16_v_u8mf8_m(...) __riscv_vluxei16_v_u8mf8_tumu(__VA_ARGS__)
1318
#define vluxei16_v_u8mf4_m(...) __riscv_vluxei16_v_u8mf4_tumu(__VA_ARGS__)
1319
#define vluxei16_v_u8mf2_m(...) __riscv_vluxei16_v_u8mf2_tumu(__VA_ARGS__)
1320
#define vluxei16_v_u8m1_m(...) __riscv_vluxei16_v_u8m1_tumu(__VA_ARGS__)
1321
#define vluxei16_v_u8m2_m(...) __riscv_vluxei16_v_u8m2_tumu(__VA_ARGS__)
1322
#define vluxei16_v_u8m4_m(...) __riscv_vluxei16_v_u8m4_tumu(__VA_ARGS__)
1323
#define vluxei32_v_u8mf8_m(...) __riscv_vluxei32_v_u8mf8_tumu(__VA_ARGS__)
1324
#define vluxei32_v_u8mf4_m(...) __riscv_vluxei32_v_u8mf4_tumu(__VA_ARGS__)
1325
#define vluxei32_v_u8mf2_m(...) __riscv_vluxei32_v_u8mf2_tumu(__VA_ARGS__)
1326
#define vluxei32_v_u8m1_m(...) __riscv_vluxei32_v_u8m1_tumu(__VA_ARGS__)
1327
#define vluxei32_v_u8m2_m(...) __riscv_vluxei32_v_u8m2_tumu(__VA_ARGS__)
1328
#define vluxei64_v_u8mf8_m(...) __riscv_vluxei64_v_u8mf8_tumu(__VA_ARGS__)
1329
#define vluxei64_v_u8mf4_m(...) __riscv_vluxei64_v_u8mf4_tumu(__VA_ARGS__)
1330
#define vluxei64_v_u8mf2_m(...) __riscv_vluxei64_v_u8mf2_tumu(__VA_ARGS__)
1331
#define vluxei64_v_u8m1_m(...) __riscv_vluxei64_v_u8m1_tumu(__VA_ARGS__)
1332
#define vluxei8_v_u16mf4_m(...) __riscv_vluxei8_v_u16mf4_tumu(__VA_ARGS__)
1333
#define vluxei8_v_u16mf2_m(...) __riscv_vluxei8_v_u16mf2_tumu(__VA_ARGS__)
1334
#define vluxei8_v_u16m1_m(...) __riscv_vluxei8_v_u16m1_tumu(__VA_ARGS__)
1335
#define vluxei8_v_u16m2_m(...) __riscv_vluxei8_v_u16m2_tumu(__VA_ARGS__)
1336
#define vluxei8_v_u16m4_m(...) __riscv_vluxei8_v_u16m4_tumu(__VA_ARGS__)
1337
#define vluxei8_v_u16m8_m(...) __riscv_vluxei8_v_u16m8_tumu(__VA_ARGS__)
1338
#define vluxei16_v_u16mf4_m(...) __riscv_vluxei16_v_u16mf4_tumu(__VA_ARGS__)
1339
#define vluxei16_v_u16mf2_m(...) __riscv_vluxei16_v_u16mf2_tumu(__VA_ARGS__)
1340
#define vluxei16_v_u16m1_m(...) __riscv_vluxei16_v_u16m1_tumu(__VA_ARGS__)
1341
#define vluxei16_v_u16m2_m(...) __riscv_vluxei16_v_u16m2_tumu(__VA_ARGS__)
1342
#define vluxei16_v_u16m4_m(...) __riscv_vluxei16_v_u16m4_tumu(__VA_ARGS__)
1343
#define vluxei16_v_u16m8_m(...) __riscv_vluxei16_v_u16m8_tumu(__VA_ARGS__)
1344
#define vluxei32_v_u16mf4_m(...) __riscv_vluxei32_v_u16mf4_tumu(__VA_ARGS__)
1345
#define vluxei32_v_u16mf2_m(...) __riscv_vluxei32_v_u16mf2_tumu(__VA_ARGS__)
1346
#define vluxei32_v_u16m1_m(...) __riscv_vluxei32_v_u16m1_tumu(__VA_ARGS__)
1347
#define vluxei32_v_u16m2_m(...) __riscv_vluxei32_v_u16m2_tumu(__VA_ARGS__)
1348
#define vluxei32_v_u16m4_m(...) __riscv_vluxei32_v_u16m4_tumu(__VA_ARGS__)
1349
#define vluxei64_v_u16mf4_m(...) __riscv_vluxei64_v_u16mf4_tumu(__VA_ARGS__)
1350
#define vluxei64_v_u16mf2_m(...) __riscv_vluxei64_v_u16mf2_tumu(__VA_ARGS__)
1351
#define vluxei64_v_u16m1_m(...) __riscv_vluxei64_v_u16m1_tumu(__VA_ARGS__)
1352
#define vluxei64_v_u16m2_m(...) __riscv_vluxei64_v_u16m2_tumu(__VA_ARGS__)
1353
#define vluxei8_v_u32mf2_m(...) __riscv_vluxei8_v_u32mf2_tumu(__VA_ARGS__)
1354
#define vluxei8_v_u32m1_m(...) __riscv_vluxei8_v_u32m1_tumu(__VA_ARGS__)
1355
#define vluxei8_v_u32m2_m(...) __riscv_vluxei8_v_u32m2_tumu(__VA_ARGS__)
1356
#define vluxei8_v_u32m4_m(...) __riscv_vluxei8_v_u32m4_tumu(__VA_ARGS__)
1357
#define vluxei8_v_u32m8_m(...) __riscv_vluxei8_v_u32m8_tumu(__VA_ARGS__)
1358
#define vluxei16_v_u32mf2_m(...) __riscv_vluxei16_v_u32mf2_tumu(__VA_ARGS__)
1359
#define vluxei16_v_u32m1_m(...) __riscv_vluxei16_v_u32m1_tumu(__VA_ARGS__)
1360
#define vluxei16_v_u32m2_m(...) __riscv_vluxei16_v_u32m2_tumu(__VA_ARGS__)
1361
#define vluxei16_v_u32m4_m(...) __riscv_vluxei16_v_u32m4_tumu(__VA_ARGS__)
1362
#define vluxei16_v_u32m8_m(...) __riscv_vluxei16_v_u32m8_tumu(__VA_ARGS__)
1363
#define vluxei32_v_u32mf2_m(...) __riscv_vluxei32_v_u32mf2_tumu(__VA_ARGS__)
1364
#define vluxei32_v_u32m1_m(...) __riscv_vluxei32_v_u32m1_tumu(__VA_ARGS__)
1365
#define vluxei32_v_u32m2_m(...) __riscv_vluxei32_v_u32m2_tumu(__VA_ARGS__)
1366
#define vluxei32_v_u32m4_m(...) __riscv_vluxei32_v_u32m4_tumu(__VA_ARGS__)
1367
#define vluxei32_v_u32m8_m(...) __riscv_vluxei32_v_u32m8_tumu(__VA_ARGS__)
1368
#define vluxei64_v_u32mf2_m(...) __riscv_vluxei64_v_u32mf2_tumu(__VA_ARGS__)
1369
#define vluxei64_v_u32m1_m(...) __riscv_vluxei64_v_u32m1_tumu(__VA_ARGS__)
1370
#define vluxei64_v_u32m2_m(...) __riscv_vluxei64_v_u32m2_tumu(__VA_ARGS__)
1371
#define vluxei64_v_u32m4_m(...) __riscv_vluxei64_v_u32m4_tumu(__VA_ARGS__)
1372
#define vluxei8_v_u64m1_m(...) __riscv_vluxei8_v_u64m1_tumu(__VA_ARGS__)
1373
#define vluxei8_v_u64m2_m(...) __riscv_vluxei8_v_u64m2_tumu(__VA_ARGS__)
1374
#define vluxei8_v_u64m4_m(...) __riscv_vluxei8_v_u64m4_tumu(__VA_ARGS__)
1375
#define vluxei8_v_u64m8_m(...) __riscv_vluxei8_v_u64m8_tumu(__VA_ARGS__)
1376
#define vluxei16_v_u64m1_m(...) __riscv_vluxei16_v_u64m1_tumu(__VA_ARGS__)
1377
#define vluxei16_v_u64m2_m(...) __riscv_vluxei16_v_u64m2_tumu(__VA_ARGS__)
1378
#define vluxei16_v_u64m4_m(...) __riscv_vluxei16_v_u64m4_tumu(__VA_ARGS__)
1379
#define vluxei16_v_u64m8_m(...) __riscv_vluxei16_v_u64m8_tumu(__VA_ARGS__)
1380
#define vluxei32_v_u64m1_m(...) __riscv_vluxei32_v_u64m1_tumu(__VA_ARGS__)
1381
#define vluxei32_v_u64m2_m(...) __riscv_vluxei32_v_u64m2_tumu(__VA_ARGS__)
1382
#define vluxei32_v_u64m4_m(...) __riscv_vluxei32_v_u64m4_tumu(__VA_ARGS__)
1383
#define vluxei32_v_u64m8_m(...) __riscv_vluxei32_v_u64m8_tumu(__VA_ARGS__)
1384
#define vluxei64_v_u64m1_m(...) __riscv_vluxei64_v_u64m1_tumu(__VA_ARGS__)
1385
#define vluxei64_v_u64m2_m(...) __riscv_vluxei64_v_u64m2_tumu(__VA_ARGS__)
1386
#define vluxei64_v_u64m4_m(...) __riscv_vluxei64_v_u64m4_tumu(__VA_ARGS__)
1387
#define vluxei64_v_u64m8_m(...) __riscv_vluxei64_v_u64m8_tumu(__VA_ARGS__)
1388
#define vsoxei8_v_f16mf4(...) __riscv_vsoxei8_v_f16mf4(__VA_ARGS__)
1389
#define vsoxei8_v_f16mf2(...) __riscv_vsoxei8_v_f16mf2(__VA_ARGS__)
1390
#define vsoxei8_v_f16m1(...) __riscv_vsoxei8_v_f16m1(__VA_ARGS__)
1391
#define vsoxei8_v_f16m2(...) __riscv_vsoxei8_v_f16m2(__VA_ARGS__)
1392
#define vsoxei8_v_f16m4(...) __riscv_vsoxei8_v_f16m4(__VA_ARGS__)
1393
#define vsoxei8_v_f16m8(...) __riscv_vsoxei8_v_f16m8(__VA_ARGS__)
1394
#define vsoxei16_v_f16mf4(...) __riscv_vsoxei16_v_f16mf4(__VA_ARGS__)
1395
#define vsoxei16_v_f16mf2(...) __riscv_vsoxei16_v_f16mf2(__VA_ARGS__)
1396
#define vsoxei16_v_f16m1(...) __riscv_vsoxei16_v_f16m1(__VA_ARGS__)
1397
#define vsoxei16_v_f16m2(...) __riscv_vsoxei16_v_f16m2(__VA_ARGS__)
1398
#define vsoxei16_v_f16m4(...) __riscv_vsoxei16_v_f16m4(__VA_ARGS__)
1399
#define vsoxei16_v_f16m8(...) __riscv_vsoxei16_v_f16m8(__VA_ARGS__)
1400
#define vsoxei32_v_f16mf4(...) __riscv_vsoxei32_v_f16mf4(__VA_ARGS__)
1401
#define vsoxei32_v_f16mf2(...) __riscv_vsoxei32_v_f16mf2(__VA_ARGS__)
1402
#define vsoxei32_v_f16m1(...) __riscv_vsoxei32_v_f16m1(__VA_ARGS__)
1403
#define vsoxei32_v_f16m2(...) __riscv_vsoxei32_v_f16m2(__VA_ARGS__)
1404
#define vsoxei32_v_f16m4(...) __riscv_vsoxei32_v_f16m4(__VA_ARGS__)
1405
#define vsoxei64_v_f16mf4(...) __riscv_vsoxei64_v_f16mf4(__VA_ARGS__)
1406
#define vsoxei64_v_f16mf2(...) __riscv_vsoxei64_v_f16mf2(__VA_ARGS__)
1407
#define vsoxei64_v_f16m1(...) __riscv_vsoxei64_v_f16m1(__VA_ARGS__)
1408
#define vsoxei64_v_f16m2(...) __riscv_vsoxei64_v_f16m2(__VA_ARGS__)
1409
#define vsoxei8_v_f32mf2(...) __riscv_vsoxei8_v_f32mf2(__VA_ARGS__)
1410
#define vsoxei8_v_f32m1(...) __riscv_vsoxei8_v_f32m1(__VA_ARGS__)
1411
#define vsoxei8_v_f32m2(...) __riscv_vsoxei8_v_f32m2(__VA_ARGS__)
1412
#define vsoxei8_v_f32m4(...) __riscv_vsoxei8_v_f32m4(__VA_ARGS__)
1413
#define vsoxei8_v_f32m8(...) __riscv_vsoxei8_v_f32m8(__VA_ARGS__)
1414
#define vsoxei16_v_f32mf2(...) __riscv_vsoxei16_v_f32mf2(__VA_ARGS__)
1415
#define vsoxei16_v_f32m1(...) __riscv_vsoxei16_v_f32m1(__VA_ARGS__)
1416
#define vsoxei16_v_f32m2(...) __riscv_vsoxei16_v_f32m2(__VA_ARGS__)
1417
#define vsoxei16_v_f32m4(...) __riscv_vsoxei16_v_f32m4(__VA_ARGS__)
1418
#define vsoxei16_v_f32m8(...) __riscv_vsoxei16_v_f32m8(__VA_ARGS__)
1419
#define vsoxei32_v_f32mf2(...) __riscv_vsoxei32_v_f32mf2(__VA_ARGS__)
1420
#define vsoxei32_v_f32m1(...) __riscv_vsoxei32_v_f32m1(__VA_ARGS__)
1421
#define vsoxei32_v_f32m2(...) __riscv_vsoxei32_v_f32m2(__VA_ARGS__)
1422
#define vsoxei32_v_f32m4(...) __riscv_vsoxei32_v_f32m4(__VA_ARGS__)
1423
#define vsoxei32_v_f32m8(...) __riscv_vsoxei32_v_f32m8(__VA_ARGS__)
1424
#define vsoxei64_v_f32mf2(...) __riscv_vsoxei64_v_f32mf2(__VA_ARGS__)
1425
#define vsoxei64_v_f32m1(...) __riscv_vsoxei64_v_f32m1(__VA_ARGS__)
1426
#define vsoxei64_v_f32m2(...) __riscv_vsoxei64_v_f32m2(__VA_ARGS__)
1427
#define vsoxei64_v_f32m4(...) __riscv_vsoxei64_v_f32m4(__VA_ARGS__)
1428
#define vsoxei8_v_f64m1(...) __riscv_vsoxei8_v_f64m1(__VA_ARGS__)
1429
#define vsoxei8_v_f64m2(...) __riscv_vsoxei8_v_f64m2(__VA_ARGS__)
1430
#define vsoxei8_v_f64m4(...) __riscv_vsoxei8_v_f64m4(__VA_ARGS__)
1431
#define vsoxei8_v_f64m8(...) __riscv_vsoxei8_v_f64m8(__VA_ARGS__)
1432
#define vsoxei16_v_f64m1(...) __riscv_vsoxei16_v_f64m1(__VA_ARGS__)
1433
#define vsoxei16_v_f64m2(...) __riscv_vsoxei16_v_f64m2(__VA_ARGS__)
1434
#define vsoxei16_v_f64m4(...) __riscv_vsoxei16_v_f64m4(__VA_ARGS__)
1435
#define vsoxei16_v_f64m8(...) __riscv_vsoxei16_v_f64m8(__VA_ARGS__)
1436
#define vsoxei32_v_f64m1(...) __riscv_vsoxei32_v_f64m1(__VA_ARGS__)
1437
#define vsoxei32_v_f64m2(...) __riscv_vsoxei32_v_f64m2(__VA_ARGS__)
1438
#define vsoxei32_v_f64m4(...) __riscv_vsoxei32_v_f64m4(__VA_ARGS__)
1439
#define vsoxei32_v_f64m8(...) __riscv_vsoxei32_v_f64m8(__VA_ARGS__)
1440
#define vsoxei64_v_f64m1(...) __riscv_vsoxei64_v_f64m1(__VA_ARGS__)
1441
#define vsoxei64_v_f64m2(...) __riscv_vsoxei64_v_f64m2(__VA_ARGS__)
1442
#define vsoxei64_v_f64m4(...) __riscv_vsoxei64_v_f64m4(__VA_ARGS__)
1443
#define vsoxei64_v_f64m8(...) __riscv_vsoxei64_v_f64m8(__VA_ARGS__)
1444
#define vsuxei8_v_f16mf4(...) __riscv_vsuxei8_v_f16mf4(__VA_ARGS__)
1445
#define vsuxei8_v_f16mf2(...) __riscv_vsuxei8_v_f16mf2(__VA_ARGS__)
1446
#define vsuxei8_v_f16m1(...) __riscv_vsuxei8_v_f16m1(__VA_ARGS__)
1447
#define vsuxei8_v_f16m2(...) __riscv_vsuxei8_v_f16m2(__VA_ARGS__)
1448
#define vsuxei8_v_f16m4(...) __riscv_vsuxei8_v_f16m4(__VA_ARGS__)
1449
#define vsuxei8_v_f16m8(...) __riscv_vsuxei8_v_f16m8(__VA_ARGS__)
1450
#define vsuxei16_v_f16mf4(...) __riscv_vsuxei16_v_f16mf4(__VA_ARGS__)
1451
#define vsuxei16_v_f16mf2(...) __riscv_vsuxei16_v_f16mf2(__VA_ARGS__)
1452
#define vsuxei16_v_f16m1(...) __riscv_vsuxei16_v_f16m1(__VA_ARGS__)
1453
#define vsuxei16_v_f16m2(...) __riscv_vsuxei16_v_f16m2(__VA_ARGS__)
1454
#define vsuxei16_v_f16m4(...) __riscv_vsuxei16_v_f16m4(__VA_ARGS__)
1455
#define vsuxei16_v_f16m8(...) __riscv_vsuxei16_v_f16m8(__VA_ARGS__)
1456
#define vsuxei32_v_f16mf4(...) __riscv_vsuxei32_v_f16mf4(__VA_ARGS__)
1457
#define vsuxei32_v_f16mf2(...) __riscv_vsuxei32_v_f16mf2(__VA_ARGS__)
1458
#define vsuxei32_v_f16m1(...) __riscv_vsuxei32_v_f16m1(__VA_ARGS__)
1459
#define vsuxei32_v_f16m2(...) __riscv_vsuxei32_v_f16m2(__VA_ARGS__)
1460
#define vsuxei32_v_f16m4(...) __riscv_vsuxei32_v_f16m4(__VA_ARGS__)
1461
#define vsuxei64_v_f16mf4(...) __riscv_vsuxei64_v_f16mf4(__VA_ARGS__)
1462
#define vsuxei64_v_f16mf2(...) __riscv_vsuxei64_v_f16mf2(__VA_ARGS__)
1463
#define vsuxei64_v_f16m1(...) __riscv_vsuxei64_v_f16m1(__VA_ARGS__)
1464
#define vsuxei64_v_f16m2(...) __riscv_vsuxei64_v_f16m2(__VA_ARGS__)
1465
#define vsuxei8_v_f32mf2(...) __riscv_vsuxei8_v_f32mf2(__VA_ARGS__)
1466
#define vsuxei8_v_f32m1(...) __riscv_vsuxei8_v_f32m1(__VA_ARGS__)
1467
#define vsuxei8_v_f32m2(...) __riscv_vsuxei8_v_f32m2(__VA_ARGS__)
1468
#define vsuxei8_v_f32m4(...) __riscv_vsuxei8_v_f32m4(__VA_ARGS__)
1469
#define vsuxei8_v_f32m8(...) __riscv_vsuxei8_v_f32m8(__VA_ARGS__)
1470
#define vsuxei16_v_f32mf2(...) __riscv_vsuxei16_v_f32mf2(__VA_ARGS__)
1471
#define vsuxei16_v_f32m1(...) __riscv_vsuxei16_v_f32m1(__VA_ARGS__)
1472
#define vsuxei16_v_f32m2(...) __riscv_vsuxei16_v_f32m2(__VA_ARGS__)
1473
#define vsuxei16_v_f32m4(...) __riscv_vsuxei16_v_f32m4(__VA_ARGS__)
1474
#define vsuxei16_v_f32m8(...) __riscv_vsuxei16_v_f32m8(__VA_ARGS__)
1475
#define vsuxei32_v_f32mf2(...) __riscv_vsuxei32_v_f32mf2(__VA_ARGS__)
1476
#define vsuxei32_v_f32m1(...) __riscv_vsuxei32_v_f32m1(__VA_ARGS__)
1477
#define vsuxei32_v_f32m2(...) __riscv_vsuxei32_v_f32m2(__VA_ARGS__)
1478
#define vsuxei32_v_f32m4(...) __riscv_vsuxei32_v_f32m4(__VA_ARGS__)
1479
#define vsuxei32_v_f32m8(...) __riscv_vsuxei32_v_f32m8(__VA_ARGS__)
1480
#define vsuxei64_v_f32mf2(...) __riscv_vsuxei64_v_f32mf2(__VA_ARGS__)
1481
#define vsuxei64_v_f32m1(...) __riscv_vsuxei64_v_f32m1(__VA_ARGS__)
1482
#define vsuxei64_v_f32m2(...) __riscv_vsuxei64_v_f32m2(__VA_ARGS__)
1483
#define vsuxei64_v_f32m4(...) __riscv_vsuxei64_v_f32m4(__VA_ARGS__)
1484
#define vsuxei8_v_f64m1(...) __riscv_vsuxei8_v_f64m1(__VA_ARGS__)
1485
#define vsuxei8_v_f64m2(...) __riscv_vsuxei8_v_f64m2(__VA_ARGS__)
1486
#define vsuxei8_v_f64m4(...) __riscv_vsuxei8_v_f64m4(__VA_ARGS__)
1487
#define vsuxei8_v_f64m8(...) __riscv_vsuxei8_v_f64m8(__VA_ARGS__)
1488
#define vsuxei16_v_f64m1(...) __riscv_vsuxei16_v_f64m1(__VA_ARGS__)
1489
#define vsuxei16_v_f64m2(...) __riscv_vsuxei16_v_f64m2(__VA_ARGS__)
1490
#define vsuxei16_v_f64m4(...) __riscv_vsuxei16_v_f64m4(__VA_ARGS__)
1491
#define vsuxei16_v_f64m8(...) __riscv_vsuxei16_v_f64m8(__VA_ARGS__)
1492
#define vsuxei32_v_f64m1(...) __riscv_vsuxei32_v_f64m1(__VA_ARGS__)
1493
#define vsuxei32_v_f64m2(...) __riscv_vsuxei32_v_f64m2(__VA_ARGS__)
1494
#define vsuxei32_v_f64m4(...) __riscv_vsuxei32_v_f64m4(__VA_ARGS__)
1495
#define vsuxei32_v_f64m8(...) __riscv_vsuxei32_v_f64m8(__VA_ARGS__)
1496
#define vsuxei64_v_f64m1(...) __riscv_vsuxei64_v_f64m1(__VA_ARGS__)
1497
#define vsuxei64_v_f64m2(...) __riscv_vsuxei64_v_f64m2(__VA_ARGS__)
1498
#define vsuxei64_v_f64m4(...) __riscv_vsuxei64_v_f64m4(__VA_ARGS__)
1499
#define vsuxei64_v_f64m8(...) __riscv_vsuxei64_v_f64m8(__VA_ARGS__)
1500
#define vsoxei8_v_i8mf8(...) __riscv_vsoxei8_v_i8mf8(__VA_ARGS__)
1501
#define vsoxei8_v_i8mf4(...) __riscv_vsoxei8_v_i8mf4(__VA_ARGS__)
1502
#define vsoxei8_v_i8mf2(...) __riscv_vsoxei8_v_i8mf2(__VA_ARGS__)
1503
#define vsoxei8_v_i8m1(...) __riscv_vsoxei8_v_i8m1(__VA_ARGS__)
1504
#define vsoxei8_v_i8m2(...) __riscv_vsoxei8_v_i8m2(__VA_ARGS__)
1505
#define vsoxei8_v_i8m4(...) __riscv_vsoxei8_v_i8m4(__VA_ARGS__)
1506
#define vsoxei8_v_i8m8(...) __riscv_vsoxei8_v_i8m8(__VA_ARGS__)
1507
#define vsoxei16_v_i8mf8(...) __riscv_vsoxei16_v_i8mf8(__VA_ARGS__)
1508
#define vsoxei16_v_i8mf4(...) __riscv_vsoxei16_v_i8mf4(__VA_ARGS__)
1509
#define vsoxei16_v_i8mf2(...) __riscv_vsoxei16_v_i8mf2(__VA_ARGS__)
1510
#define vsoxei16_v_i8m1(...) __riscv_vsoxei16_v_i8m1(__VA_ARGS__)
1511
#define vsoxei16_v_i8m2(...) __riscv_vsoxei16_v_i8m2(__VA_ARGS__)
1512
#define vsoxei16_v_i8m4(...) __riscv_vsoxei16_v_i8m4(__VA_ARGS__)
1513
#define vsoxei32_v_i8mf8(...) __riscv_vsoxei32_v_i8mf8(__VA_ARGS__)
1514
#define vsoxei32_v_i8mf4(...) __riscv_vsoxei32_v_i8mf4(__VA_ARGS__)
1515
#define vsoxei32_v_i8mf2(...) __riscv_vsoxei32_v_i8mf2(__VA_ARGS__)
1516
#define vsoxei32_v_i8m1(...) __riscv_vsoxei32_v_i8m1(__VA_ARGS__)
1517
#define vsoxei32_v_i8m2(...) __riscv_vsoxei32_v_i8m2(__VA_ARGS__)
1518
#define vsoxei64_v_i8mf8(...) __riscv_vsoxei64_v_i8mf8(__VA_ARGS__)
1519
#define vsoxei64_v_i8mf4(...) __riscv_vsoxei64_v_i8mf4(__VA_ARGS__)
1520
#define vsoxei64_v_i8mf2(...) __riscv_vsoxei64_v_i8mf2(__VA_ARGS__)
1521
#define vsoxei64_v_i8m1(...) __riscv_vsoxei64_v_i8m1(__VA_ARGS__)
1522
#define vsoxei8_v_i16mf4(...) __riscv_vsoxei8_v_i16mf4(__VA_ARGS__)
1523
#define vsoxei8_v_i16mf2(...) __riscv_vsoxei8_v_i16mf2(__VA_ARGS__)
1524
#define vsoxei8_v_i16m1(...) __riscv_vsoxei8_v_i16m1(__VA_ARGS__)
1525
#define vsoxei8_v_i16m2(...) __riscv_vsoxei8_v_i16m2(__VA_ARGS__)
1526
#define vsoxei8_v_i16m4(...) __riscv_vsoxei8_v_i16m4(__VA_ARGS__)
1527
#define vsoxei8_v_i16m8(...) __riscv_vsoxei8_v_i16m8(__VA_ARGS__)
1528
#define vsoxei16_v_i16mf4(...) __riscv_vsoxei16_v_i16mf4(__VA_ARGS__)
1529
#define vsoxei16_v_i16mf2(...) __riscv_vsoxei16_v_i16mf2(__VA_ARGS__)
1530
#define vsoxei16_v_i16m1(...) __riscv_vsoxei16_v_i16m1(__VA_ARGS__)
1531
#define vsoxei16_v_i16m2(...) __riscv_vsoxei16_v_i16m2(__VA_ARGS__)
1532
#define vsoxei16_v_i16m4(...) __riscv_vsoxei16_v_i16m4(__VA_ARGS__)
1533
#define vsoxei16_v_i16m8(...) __riscv_vsoxei16_v_i16m8(__VA_ARGS__)
1534
#define vsoxei32_v_i16mf4(...) __riscv_vsoxei32_v_i16mf4(__VA_ARGS__)
1535
#define vsoxei32_v_i16mf2(...) __riscv_vsoxei32_v_i16mf2(__VA_ARGS__)
1536
#define vsoxei32_v_i16m1(...) __riscv_vsoxei32_v_i16m1(__VA_ARGS__)
1537
#define vsoxei32_v_i16m2(...) __riscv_vsoxei32_v_i16m2(__VA_ARGS__)
1538
#define vsoxei32_v_i16m4(...) __riscv_vsoxei32_v_i16m4(__VA_ARGS__)
1539
#define vsoxei64_v_i16mf4(...) __riscv_vsoxei64_v_i16mf4(__VA_ARGS__)
1540
#define vsoxei64_v_i16mf2(...) __riscv_vsoxei64_v_i16mf2(__VA_ARGS__)
1541
#define vsoxei64_v_i16m1(...) __riscv_vsoxei64_v_i16m1(__VA_ARGS__)
1542
#define vsoxei64_v_i16m2(...) __riscv_vsoxei64_v_i16m2(__VA_ARGS__)
1543
#define vsoxei8_v_i32mf2(...) __riscv_vsoxei8_v_i32mf2(__VA_ARGS__)
1544
#define vsoxei8_v_i32m1(...) __riscv_vsoxei8_v_i32m1(__VA_ARGS__)
1545
#define vsoxei8_v_i32m2(...) __riscv_vsoxei8_v_i32m2(__VA_ARGS__)
1546
#define vsoxei8_v_i32m4(...) __riscv_vsoxei8_v_i32m4(__VA_ARGS__)
1547
#define vsoxei8_v_i32m8(...) __riscv_vsoxei8_v_i32m8(__VA_ARGS__)
1548
#define vsoxei16_v_i32mf2(...) __riscv_vsoxei16_v_i32mf2(__VA_ARGS__)
1549
#define vsoxei16_v_i32m1(...) __riscv_vsoxei16_v_i32m1(__VA_ARGS__)
1550
#define vsoxei16_v_i32m2(...) __riscv_vsoxei16_v_i32m2(__VA_ARGS__)
1551
#define vsoxei16_v_i32m4(...) __riscv_vsoxei16_v_i32m4(__VA_ARGS__)
1552
#define vsoxei16_v_i32m8(...) __riscv_vsoxei16_v_i32m8(__VA_ARGS__)
1553
#define vsoxei32_v_i32mf2(...) __riscv_vsoxei32_v_i32mf2(__VA_ARGS__)
1554
#define vsoxei32_v_i32m1(...) __riscv_vsoxei32_v_i32m1(__VA_ARGS__)
1555
#define vsoxei32_v_i32m2(...) __riscv_vsoxei32_v_i32m2(__VA_ARGS__)
1556
#define vsoxei32_v_i32m4(...) __riscv_vsoxei32_v_i32m4(__VA_ARGS__)
1557
#define vsoxei32_v_i32m8(...) __riscv_vsoxei32_v_i32m8(__VA_ARGS__)
1558
#define vsoxei64_v_i32mf2(...) __riscv_vsoxei64_v_i32mf2(__VA_ARGS__)
1559
#define vsoxei64_v_i32m1(...) __riscv_vsoxei64_v_i32m1(__VA_ARGS__)
1560
#define vsoxei64_v_i32m2(...) __riscv_vsoxei64_v_i32m2(__VA_ARGS__)
1561
#define vsoxei64_v_i32m4(...) __riscv_vsoxei64_v_i32m4(__VA_ARGS__)
1562
#define vsoxei8_v_i64m1(...) __riscv_vsoxei8_v_i64m1(__VA_ARGS__)
1563
#define vsoxei8_v_i64m2(...) __riscv_vsoxei8_v_i64m2(__VA_ARGS__)
1564
#define vsoxei8_v_i64m4(...) __riscv_vsoxei8_v_i64m4(__VA_ARGS__)
1565
#define vsoxei8_v_i64m8(...) __riscv_vsoxei8_v_i64m8(__VA_ARGS__)
1566
#define vsoxei16_v_i64m1(...) __riscv_vsoxei16_v_i64m1(__VA_ARGS__)
1567
#define vsoxei16_v_i64m2(...) __riscv_vsoxei16_v_i64m2(__VA_ARGS__)
1568
#define vsoxei16_v_i64m4(...) __riscv_vsoxei16_v_i64m4(__VA_ARGS__)
1569
#define vsoxei16_v_i64m8(...) __riscv_vsoxei16_v_i64m8(__VA_ARGS__)
1570
#define vsoxei32_v_i64m1(...) __riscv_vsoxei32_v_i64m1(__VA_ARGS__)
1571
#define vsoxei32_v_i64m2(...) __riscv_vsoxei32_v_i64m2(__VA_ARGS__)
1572
#define vsoxei32_v_i64m4(...) __riscv_vsoxei32_v_i64m4(__VA_ARGS__)
1573
#define vsoxei32_v_i64m8(...) __riscv_vsoxei32_v_i64m8(__VA_ARGS__)
1574
#define vsoxei64_v_i64m1(...) __riscv_vsoxei64_v_i64m1(__VA_ARGS__)
1575
#define vsoxei64_v_i64m2(...) __riscv_vsoxei64_v_i64m2(__VA_ARGS__)
1576
#define vsoxei64_v_i64m4(...) __riscv_vsoxei64_v_i64m4(__VA_ARGS__)
1577
#define vsoxei64_v_i64m8(...) __riscv_vsoxei64_v_i64m8(__VA_ARGS__)
1578
#define vsuxei8_v_i8mf8(...) __riscv_vsuxei8_v_i8mf8(__VA_ARGS__)
1579
#define vsuxei8_v_i8mf4(...) __riscv_vsuxei8_v_i8mf4(__VA_ARGS__)
1580
#define vsuxei8_v_i8mf2(...) __riscv_vsuxei8_v_i8mf2(__VA_ARGS__)
1581
#define vsuxei8_v_i8m1(...) __riscv_vsuxei8_v_i8m1(__VA_ARGS__)
1582
#define vsuxei8_v_i8m2(...) __riscv_vsuxei8_v_i8m2(__VA_ARGS__)
1583
#define vsuxei8_v_i8m4(...) __riscv_vsuxei8_v_i8m4(__VA_ARGS__)
1584
#define vsuxei8_v_i8m8(...) __riscv_vsuxei8_v_i8m8(__VA_ARGS__)
1585
#define vsuxei16_v_i8mf8(...) __riscv_vsuxei16_v_i8mf8(__VA_ARGS__)
1586
#define vsuxei16_v_i8mf4(...) __riscv_vsuxei16_v_i8mf4(__VA_ARGS__)
1587
#define vsuxei16_v_i8mf2(...) __riscv_vsuxei16_v_i8mf2(__VA_ARGS__)
1588
#define vsuxei16_v_i8m1(...) __riscv_vsuxei16_v_i8m1(__VA_ARGS__)
1589
#define vsuxei16_v_i8m2(...) __riscv_vsuxei16_v_i8m2(__VA_ARGS__)
1590
#define vsuxei16_v_i8m4(...) __riscv_vsuxei16_v_i8m4(__VA_ARGS__)
1591
#define vsuxei32_v_i8mf8(...) __riscv_vsuxei32_v_i8mf8(__VA_ARGS__)
1592
#define vsuxei32_v_i8mf4(...) __riscv_vsuxei32_v_i8mf4(__VA_ARGS__)
1593
#define vsuxei32_v_i8mf2(...) __riscv_vsuxei32_v_i8mf2(__VA_ARGS__)
1594
#define vsuxei32_v_i8m1(...) __riscv_vsuxei32_v_i8m1(__VA_ARGS__)
1595
#define vsuxei32_v_i8m2(...) __riscv_vsuxei32_v_i8m2(__VA_ARGS__)
1596
#define vsuxei64_v_i8mf8(...) __riscv_vsuxei64_v_i8mf8(__VA_ARGS__)
1597
#define vsuxei64_v_i8mf4(...) __riscv_vsuxei64_v_i8mf4(__VA_ARGS__)
1598
#define vsuxei64_v_i8mf2(...) __riscv_vsuxei64_v_i8mf2(__VA_ARGS__)
1599
#define vsuxei64_v_i8m1(...) __riscv_vsuxei64_v_i8m1(__VA_ARGS__)
1600
#define vsuxei8_v_i16mf4(...) __riscv_vsuxei8_v_i16mf4(__VA_ARGS__)
1601
#define vsuxei8_v_i16mf2(...) __riscv_vsuxei8_v_i16mf2(__VA_ARGS__)
1602
#define vsuxei8_v_i16m1(...) __riscv_vsuxei8_v_i16m1(__VA_ARGS__)
1603
#define vsuxei8_v_i16m2(...) __riscv_vsuxei8_v_i16m2(__VA_ARGS__)
1604
#define vsuxei8_v_i16m4(...) __riscv_vsuxei8_v_i16m4(__VA_ARGS__)
1605
#define vsuxei8_v_i16m8(...) __riscv_vsuxei8_v_i16m8(__VA_ARGS__)
1606
#define vsuxei16_v_i16mf4(...) __riscv_vsuxei16_v_i16mf4(__VA_ARGS__)
1607
#define vsuxei16_v_i16mf2(...) __riscv_vsuxei16_v_i16mf2(__VA_ARGS__)
1608
#define vsuxei16_v_i16m1(...) __riscv_vsuxei16_v_i16m1(__VA_ARGS__)
1609
#define vsuxei16_v_i16m2(...) __riscv_vsuxei16_v_i16m2(__VA_ARGS__)
1610
#define vsuxei16_v_i16m4(...) __riscv_vsuxei16_v_i16m4(__VA_ARGS__)
1611
#define vsuxei16_v_i16m8(...) __riscv_vsuxei16_v_i16m8(__VA_ARGS__)
1612
#define vsuxei32_v_i16mf4(...) __riscv_vsuxei32_v_i16mf4(__VA_ARGS__)
1613
#define vsuxei32_v_i16mf2(...) __riscv_vsuxei32_v_i16mf2(__VA_ARGS__)
1614
#define vsuxei32_v_i16m1(...) __riscv_vsuxei32_v_i16m1(__VA_ARGS__)
1615
#define vsuxei32_v_i16m2(...) __riscv_vsuxei32_v_i16m2(__VA_ARGS__)
1616
#define vsuxei32_v_i16m4(...) __riscv_vsuxei32_v_i16m4(__VA_ARGS__)
1617
#define vsuxei64_v_i16mf4(...) __riscv_vsuxei64_v_i16mf4(__VA_ARGS__)
1618
#define vsuxei64_v_i16mf2(...) __riscv_vsuxei64_v_i16mf2(__VA_ARGS__)
1619
#define vsuxei64_v_i16m1(...) __riscv_vsuxei64_v_i16m1(__VA_ARGS__)
1620
#define vsuxei64_v_i16m2(...) __riscv_vsuxei64_v_i16m2(__VA_ARGS__)
1621
#define vsuxei8_v_i32mf2(...) __riscv_vsuxei8_v_i32mf2(__VA_ARGS__)
1622
#define vsuxei8_v_i32m1(...) __riscv_vsuxei8_v_i32m1(__VA_ARGS__)
1623
#define vsuxei8_v_i32m2(...) __riscv_vsuxei8_v_i32m2(__VA_ARGS__)
1624
#define vsuxei8_v_i32m4(...) __riscv_vsuxei8_v_i32m4(__VA_ARGS__)
1625
#define vsuxei8_v_i32m8(...) __riscv_vsuxei8_v_i32m8(__VA_ARGS__)
1626
#define vsuxei16_v_i32mf2(...) __riscv_vsuxei16_v_i32mf2(__VA_ARGS__)
1627
#define vsuxei16_v_i32m1(...) __riscv_vsuxei16_v_i32m1(__VA_ARGS__)
1628
#define vsuxei16_v_i32m2(...) __riscv_vsuxei16_v_i32m2(__VA_ARGS__)
1629
#define vsuxei16_v_i32m4(...) __riscv_vsuxei16_v_i32m4(__VA_ARGS__)
1630
#define vsuxei16_v_i32m8(...) __riscv_vsuxei16_v_i32m8(__VA_ARGS__)
1631
#define vsuxei32_v_i32mf2(...) __riscv_vsuxei32_v_i32mf2(__VA_ARGS__)
1632
#define vsuxei32_v_i32m1(...) __riscv_vsuxei32_v_i32m1(__VA_ARGS__)
1633
#define vsuxei32_v_i32m2(...) __riscv_vsuxei32_v_i32m2(__VA_ARGS__)
1634
#define vsuxei32_v_i32m4(...) __riscv_vsuxei32_v_i32m4(__VA_ARGS__)
1635
#define vsuxei32_v_i32m8(...) __riscv_vsuxei32_v_i32m8(__VA_ARGS__)
1636
#define vsuxei64_v_i32mf2(...) __riscv_vsuxei64_v_i32mf2(__VA_ARGS__)
1637
#define vsuxei64_v_i32m1(...) __riscv_vsuxei64_v_i32m1(__VA_ARGS__)
1638
#define vsuxei64_v_i32m2(...) __riscv_vsuxei64_v_i32m2(__VA_ARGS__)
1639
#define vsuxei64_v_i32m4(...) __riscv_vsuxei64_v_i32m4(__VA_ARGS__)
1640
#define vsuxei8_v_i64m1(...) __riscv_vsuxei8_v_i64m1(__VA_ARGS__)
1641
#define vsuxei8_v_i64m2(...) __riscv_vsuxei8_v_i64m2(__VA_ARGS__)
1642
#define vsuxei8_v_i64m4(...) __riscv_vsuxei8_v_i64m4(__VA_ARGS__)
1643
#define vsuxei8_v_i64m8(...) __riscv_vsuxei8_v_i64m8(__VA_ARGS__)
1644
#define vsuxei16_v_i64m1(...) __riscv_vsuxei16_v_i64m1(__VA_ARGS__)
1645
#define vsuxei16_v_i64m2(...) __riscv_vsuxei16_v_i64m2(__VA_ARGS__)
1646
#define vsuxei16_v_i64m4(...) __riscv_vsuxei16_v_i64m4(__VA_ARGS__)
1647
#define vsuxei16_v_i64m8(...) __riscv_vsuxei16_v_i64m8(__VA_ARGS__)
1648
#define vsuxei32_v_i64m1(...) __riscv_vsuxei32_v_i64m1(__VA_ARGS__)
1649
#define vsuxei32_v_i64m2(...) __riscv_vsuxei32_v_i64m2(__VA_ARGS__)
1650
#define vsuxei32_v_i64m4(...) __riscv_vsuxei32_v_i64m4(__VA_ARGS__)
1651
#define vsuxei32_v_i64m8(...) __riscv_vsuxei32_v_i64m8(__VA_ARGS__)
1652
#define vsuxei64_v_i64m1(...) __riscv_vsuxei64_v_i64m1(__VA_ARGS__)
1653
#define vsuxei64_v_i64m2(...) __riscv_vsuxei64_v_i64m2(__VA_ARGS__)
1654
#define vsuxei64_v_i64m4(...) __riscv_vsuxei64_v_i64m4(__VA_ARGS__)
1655
#define vsuxei64_v_i64m8(...) __riscv_vsuxei64_v_i64m8(__VA_ARGS__)
1656
#define vsoxei8_v_u8mf8(...) __riscv_vsoxei8_v_u8mf8(__VA_ARGS__)
1657
#define vsoxei8_v_u8mf4(...) __riscv_vsoxei8_v_u8mf4(__VA_ARGS__)
1658
#define vsoxei8_v_u8mf2(...) __riscv_vsoxei8_v_u8mf2(__VA_ARGS__)
1659
#define vsoxei8_v_u8m1(...) __riscv_vsoxei8_v_u8m1(__VA_ARGS__)
1660
#define vsoxei8_v_u8m2(...) __riscv_vsoxei8_v_u8m2(__VA_ARGS__)
1661
#define vsoxei8_v_u8m4(...) __riscv_vsoxei8_v_u8m4(__VA_ARGS__)
1662
#define vsoxei8_v_u8m8(...) __riscv_vsoxei8_v_u8m8(__VA_ARGS__)
1663
#define vsoxei16_v_u8mf8(...) __riscv_vsoxei16_v_u8mf8(__VA_ARGS__)
1664
#define vsoxei16_v_u8mf4(...) __riscv_vsoxei16_v_u8mf4(__VA_ARGS__)
1665
#define vsoxei16_v_u8mf2(...) __riscv_vsoxei16_v_u8mf2(__VA_ARGS__)
1666
#define vsoxei16_v_u8m1(...) __riscv_vsoxei16_v_u8m1(__VA_ARGS__)
1667
#define vsoxei16_v_u8m2(...) __riscv_vsoxei16_v_u8m2(__VA_ARGS__)
1668
#define vsoxei16_v_u8m4(...) __riscv_vsoxei16_v_u8m4(__VA_ARGS__)
1669
#define vsoxei32_v_u8mf8(...) __riscv_vsoxei32_v_u8mf8(__VA_ARGS__)
1670
#define vsoxei32_v_u8mf4(...) __riscv_vsoxei32_v_u8mf4(__VA_ARGS__)
1671
#define vsoxei32_v_u8mf2(...) __riscv_vsoxei32_v_u8mf2(__VA_ARGS__)
1672
#define vsoxei32_v_u8m1(...) __riscv_vsoxei32_v_u8m1(__VA_ARGS__)
1673
#define vsoxei32_v_u8m2(...) __riscv_vsoxei32_v_u8m2(__VA_ARGS__)
1674
#define vsoxei64_v_u8mf8(...) __riscv_vsoxei64_v_u8mf8(__VA_ARGS__)
1675
#define vsoxei64_v_u8mf4(...) __riscv_vsoxei64_v_u8mf4(__VA_ARGS__)
1676
#define vsoxei64_v_u8mf2(...) __riscv_vsoxei64_v_u8mf2(__VA_ARGS__)
1677
#define vsoxei64_v_u8m1(...) __riscv_vsoxei64_v_u8m1(__VA_ARGS__)
1678
#define vsoxei8_v_u16mf4(...) __riscv_vsoxei8_v_u16mf4(__VA_ARGS__)
1679
#define vsoxei8_v_u16mf2(...) __riscv_vsoxei8_v_u16mf2(__VA_ARGS__)
1680
#define vsoxei8_v_u16m1(...) __riscv_vsoxei8_v_u16m1(__VA_ARGS__)
1681
#define vsoxei8_v_u16m2(...) __riscv_vsoxei8_v_u16m2(__VA_ARGS__)
1682
#define vsoxei8_v_u16m4(...) __riscv_vsoxei8_v_u16m4(__VA_ARGS__)
1683
#define vsoxei8_v_u16m8(...) __riscv_vsoxei8_v_u16m8(__VA_ARGS__)
1684
#define vsoxei16_v_u16mf4(...) __riscv_vsoxei16_v_u16mf4(__VA_ARGS__)
1685
#define vsoxei16_v_u16mf2(...) __riscv_vsoxei16_v_u16mf2(__VA_ARGS__)
1686
#define vsoxei16_v_u16m1(...) __riscv_vsoxei16_v_u16m1(__VA_ARGS__)
1687
#define vsoxei16_v_u16m2(...) __riscv_vsoxei16_v_u16m2(__VA_ARGS__)
1688
#define vsoxei16_v_u16m4(...) __riscv_vsoxei16_v_u16m4(__VA_ARGS__)
1689
#define vsoxei16_v_u16m8(...) __riscv_vsoxei16_v_u16m8(__VA_ARGS__)
1690
#define vsoxei32_v_u16mf4(...) __riscv_vsoxei32_v_u16mf4(__VA_ARGS__)
1691
#define vsoxei32_v_u16mf2(...) __riscv_vsoxei32_v_u16mf2(__VA_ARGS__)
1692
#define vsoxei32_v_u16m1(...) __riscv_vsoxei32_v_u16m1(__VA_ARGS__)
1693
#define vsoxei32_v_u16m2(...) __riscv_vsoxei32_v_u16m2(__VA_ARGS__)
1694
#define vsoxei32_v_u16m4(...) __riscv_vsoxei32_v_u16m4(__VA_ARGS__)
1695
#define vsoxei64_v_u16mf4(...) __riscv_vsoxei64_v_u16mf4(__VA_ARGS__)
1696
#define vsoxei64_v_u16mf2(...) __riscv_vsoxei64_v_u16mf2(__VA_ARGS__)
1697
#define vsoxei64_v_u16m1(...) __riscv_vsoxei64_v_u16m1(__VA_ARGS__)
1698
#define vsoxei64_v_u16m2(...) __riscv_vsoxei64_v_u16m2(__VA_ARGS__)
1699
#define vsoxei8_v_u32mf2(...) __riscv_vsoxei8_v_u32mf2(__VA_ARGS__)
1700
#define vsoxei8_v_u32m1(...) __riscv_vsoxei8_v_u32m1(__VA_ARGS__)
1701
#define vsoxei8_v_u32m2(...) __riscv_vsoxei8_v_u32m2(__VA_ARGS__)
1702
#define vsoxei8_v_u32m4(...) __riscv_vsoxei8_v_u32m4(__VA_ARGS__)
1703
#define vsoxei8_v_u32m8(...) __riscv_vsoxei8_v_u32m8(__VA_ARGS__)
1704
#define vsoxei16_v_u32mf2(...) __riscv_vsoxei16_v_u32mf2(__VA_ARGS__)
1705
#define vsoxei16_v_u32m1(...) __riscv_vsoxei16_v_u32m1(__VA_ARGS__)
1706
#define vsoxei16_v_u32m2(...) __riscv_vsoxei16_v_u32m2(__VA_ARGS__)
1707
#define vsoxei16_v_u32m4(...) __riscv_vsoxei16_v_u32m4(__VA_ARGS__)
1708
#define vsoxei16_v_u32m8(...) __riscv_vsoxei16_v_u32m8(__VA_ARGS__)
1709
#define vsoxei32_v_u32mf2(...) __riscv_vsoxei32_v_u32mf2(__VA_ARGS__)
1710
#define vsoxei32_v_u32m1(...) __riscv_vsoxei32_v_u32m1(__VA_ARGS__)
1711
#define vsoxei32_v_u32m2(...) __riscv_vsoxei32_v_u32m2(__VA_ARGS__)
1712
#define vsoxei32_v_u32m4(...) __riscv_vsoxei32_v_u32m4(__VA_ARGS__)
1713
#define vsoxei32_v_u32m8(...) __riscv_vsoxei32_v_u32m8(__VA_ARGS__)
1714
#define vsoxei64_v_u32mf2(...) __riscv_vsoxei64_v_u32mf2(__VA_ARGS__)
1715
#define vsoxei64_v_u32m1(...) __riscv_vsoxei64_v_u32m1(__VA_ARGS__)
1716
#define vsoxei64_v_u32m2(...) __riscv_vsoxei64_v_u32m2(__VA_ARGS__)
1717
#define vsoxei64_v_u32m4(...) __riscv_vsoxei64_v_u32m4(__VA_ARGS__)
1718
#define vsoxei8_v_u64m1(...) __riscv_vsoxei8_v_u64m1(__VA_ARGS__)
1719
#define vsoxei8_v_u64m2(...) __riscv_vsoxei8_v_u64m2(__VA_ARGS__)
1720
#define vsoxei8_v_u64m4(...) __riscv_vsoxei8_v_u64m4(__VA_ARGS__)
1721
#define vsoxei8_v_u64m8(...) __riscv_vsoxei8_v_u64m8(__VA_ARGS__)
1722
#define vsoxei16_v_u64m1(...) __riscv_vsoxei16_v_u64m1(__VA_ARGS__)
1723
#define vsoxei16_v_u64m2(...) __riscv_vsoxei16_v_u64m2(__VA_ARGS__)
1724
#define vsoxei16_v_u64m4(...) __riscv_vsoxei16_v_u64m4(__VA_ARGS__)
1725
#define vsoxei16_v_u64m8(...) __riscv_vsoxei16_v_u64m8(__VA_ARGS__)
1726
#define vsoxei32_v_u64m1(...) __riscv_vsoxei32_v_u64m1(__VA_ARGS__)
1727
#define vsoxei32_v_u64m2(...) __riscv_vsoxei32_v_u64m2(__VA_ARGS__)
1728
#define vsoxei32_v_u64m4(...) __riscv_vsoxei32_v_u64m4(__VA_ARGS__)
1729
#define vsoxei32_v_u64m8(...) __riscv_vsoxei32_v_u64m8(__VA_ARGS__)
1730
#define vsoxei64_v_u64m1(...) __riscv_vsoxei64_v_u64m1(__VA_ARGS__)
1731
#define vsoxei64_v_u64m2(...) __riscv_vsoxei64_v_u64m2(__VA_ARGS__)
1732
#define vsoxei64_v_u64m4(...) __riscv_vsoxei64_v_u64m4(__VA_ARGS__)
1733
#define vsoxei64_v_u64m8(...) __riscv_vsoxei64_v_u64m8(__VA_ARGS__)
1734
#define vsuxei8_v_u8mf8(...) __riscv_vsuxei8_v_u8mf8(__VA_ARGS__)
1735
#define vsuxei8_v_u8mf4(...) __riscv_vsuxei8_v_u8mf4(__VA_ARGS__)
1736
#define vsuxei8_v_u8mf2(...) __riscv_vsuxei8_v_u8mf2(__VA_ARGS__)
1737
#define vsuxei8_v_u8m1(...) __riscv_vsuxei8_v_u8m1(__VA_ARGS__)
1738
#define vsuxei8_v_u8m2(...) __riscv_vsuxei8_v_u8m2(__VA_ARGS__)
1739
#define vsuxei8_v_u8m4(...) __riscv_vsuxei8_v_u8m4(__VA_ARGS__)
1740
#define vsuxei8_v_u8m8(...) __riscv_vsuxei8_v_u8m8(__VA_ARGS__)
1741
#define vsuxei16_v_u8mf8(...) __riscv_vsuxei16_v_u8mf8(__VA_ARGS__)
1742
#define vsuxei16_v_u8mf4(...) __riscv_vsuxei16_v_u8mf4(__VA_ARGS__)
1743
#define vsuxei16_v_u8mf2(...) __riscv_vsuxei16_v_u8mf2(__VA_ARGS__)
1744
#define vsuxei16_v_u8m1(...) __riscv_vsuxei16_v_u8m1(__VA_ARGS__)
1745
#define vsuxei16_v_u8m2(...) __riscv_vsuxei16_v_u8m2(__VA_ARGS__)
1746
#define vsuxei16_v_u8m4(...) __riscv_vsuxei16_v_u8m4(__VA_ARGS__)
1747
#define vsuxei32_v_u8mf8(...) __riscv_vsuxei32_v_u8mf8(__VA_ARGS__)
1748
#define vsuxei32_v_u8mf4(...) __riscv_vsuxei32_v_u8mf4(__VA_ARGS__)
1749
#define vsuxei32_v_u8mf2(...) __riscv_vsuxei32_v_u8mf2(__VA_ARGS__)
1750
#define vsuxei32_v_u8m1(...) __riscv_vsuxei32_v_u8m1(__VA_ARGS__)
1751
#define vsuxei32_v_u8m2(...) __riscv_vsuxei32_v_u8m2(__VA_ARGS__)
1752
#define vsuxei64_v_u8mf8(...) __riscv_vsuxei64_v_u8mf8(__VA_ARGS__)
1753
#define vsuxei64_v_u8mf4(...) __riscv_vsuxei64_v_u8mf4(__VA_ARGS__)
1754
#define vsuxei64_v_u8mf2(...) __riscv_vsuxei64_v_u8mf2(__VA_ARGS__)
1755
#define vsuxei64_v_u8m1(...) __riscv_vsuxei64_v_u8m1(__VA_ARGS__)
1756
#define vsuxei8_v_u16mf4(...) __riscv_vsuxei8_v_u16mf4(__VA_ARGS__)
1757
#define vsuxei8_v_u16mf2(...) __riscv_vsuxei8_v_u16mf2(__VA_ARGS__)
1758
#define vsuxei8_v_u16m1(...) __riscv_vsuxei8_v_u16m1(__VA_ARGS__)
1759
#define vsuxei8_v_u16m2(...) __riscv_vsuxei8_v_u16m2(__VA_ARGS__)
1760
#define vsuxei8_v_u16m4(...) __riscv_vsuxei8_v_u16m4(__VA_ARGS__)
1761
#define vsuxei8_v_u16m8(...) __riscv_vsuxei8_v_u16m8(__VA_ARGS__)
1762
#define vsuxei16_v_u16mf4(...) __riscv_vsuxei16_v_u16mf4(__VA_ARGS__)
1763
#define vsuxei16_v_u16mf2(...) __riscv_vsuxei16_v_u16mf2(__VA_ARGS__)
1764
#define vsuxei16_v_u16m1(...) __riscv_vsuxei16_v_u16m1(__VA_ARGS__)
1765
#define vsuxei16_v_u16m2(...) __riscv_vsuxei16_v_u16m2(__VA_ARGS__)
1766
#define vsuxei16_v_u16m4(...) __riscv_vsuxei16_v_u16m4(__VA_ARGS__)
1767
#define vsuxei16_v_u16m8(...) __riscv_vsuxei16_v_u16m8(__VA_ARGS__)
1768
#define vsuxei32_v_u16mf4(...) __riscv_vsuxei32_v_u16mf4(__VA_ARGS__)
1769
#define vsuxei32_v_u16mf2(...) __riscv_vsuxei32_v_u16mf2(__VA_ARGS__)
1770
#define vsuxei32_v_u16m1(...) __riscv_vsuxei32_v_u16m1(__VA_ARGS__)
1771
#define vsuxei32_v_u16m2(...) __riscv_vsuxei32_v_u16m2(__VA_ARGS__)
1772
#define vsuxei32_v_u16m4(...) __riscv_vsuxei32_v_u16m4(__VA_ARGS__)
1773
#define vsuxei64_v_u16mf4(...) __riscv_vsuxei64_v_u16mf4(__VA_ARGS__)
1774
#define vsuxei64_v_u16mf2(...) __riscv_vsuxei64_v_u16mf2(__VA_ARGS__)
1775
#define vsuxei64_v_u16m1(...) __riscv_vsuxei64_v_u16m1(__VA_ARGS__)
1776
#define vsuxei64_v_u16m2(...) __riscv_vsuxei64_v_u16m2(__VA_ARGS__)
1777
#define vsuxei8_v_u32mf2(...) __riscv_vsuxei8_v_u32mf2(__VA_ARGS__)
1778
#define vsuxei8_v_u32m1(...) __riscv_vsuxei8_v_u32m1(__VA_ARGS__)
1779
#define vsuxei8_v_u32m2(...) __riscv_vsuxei8_v_u32m2(__VA_ARGS__)
1780
#define vsuxei8_v_u32m4(...) __riscv_vsuxei8_v_u32m4(__VA_ARGS__)
1781
#define vsuxei8_v_u32m8(...) __riscv_vsuxei8_v_u32m8(__VA_ARGS__)
1782
#define vsuxei16_v_u32mf2(...) __riscv_vsuxei16_v_u32mf2(__VA_ARGS__)
1783
#define vsuxei16_v_u32m1(...) __riscv_vsuxei16_v_u32m1(__VA_ARGS__)
1784
#define vsuxei16_v_u32m2(...) __riscv_vsuxei16_v_u32m2(__VA_ARGS__)
1785
#define vsuxei16_v_u32m4(...) __riscv_vsuxei16_v_u32m4(__VA_ARGS__)
1786
#define vsuxei16_v_u32m8(...) __riscv_vsuxei16_v_u32m8(__VA_ARGS__)
1787
#define vsuxei32_v_u32mf2(...) __riscv_vsuxei32_v_u32mf2(__VA_ARGS__)
1788
#define vsuxei32_v_u32m1(...) __riscv_vsuxei32_v_u32m1(__VA_ARGS__)
1789
#define vsuxei32_v_u32m2(...) __riscv_vsuxei32_v_u32m2(__VA_ARGS__)
1790
#define vsuxei32_v_u32m4(...) __riscv_vsuxei32_v_u32m4(__VA_ARGS__)
1791
#define vsuxei32_v_u32m8(...) __riscv_vsuxei32_v_u32m8(__VA_ARGS__)
1792
#define vsuxei64_v_u32mf2(...) __riscv_vsuxei64_v_u32mf2(__VA_ARGS__)
1793
#define vsuxei64_v_u32m1(...) __riscv_vsuxei64_v_u32m1(__VA_ARGS__)
1794
#define vsuxei64_v_u32m2(...) __riscv_vsuxei64_v_u32m2(__VA_ARGS__)
1795
#define vsuxei64_v_u32m4(...) __riscv_vsuxei64_v_u32m4(__VA_ARGS__)
1796
#define vsuxei8_v_u64m1(...) __riscv_vsuxei8_v_u64m1(__VA_ARGS__)
1797
#define vsuxei8_v_u64m2(...) __riscv_vsuxei8_v_u64m2(__VA_ARGS__)
1798
#define vsuxei8_v_u64m4(...) __riscv_vsuxei8_v_u64m4(__VA_ARGS__)
1799
#define vsuxei8_v_u64m8(...) __riscv_vsuxei8_v_u64m8(__VA_ARGS__)
1800
#define vsuxei16_v_u64m1(...) __riscv_vsuxei16_v_u64m1(__VA_ARGS__)
1801
#define vsuxei16_v_u64m2(...) __riscv_vsuxei16_v_u64m2(__VA_ARGS__)
1802
#define vsuxei16_v_u64m4(...) __riscv_vsuxei16_v_u64m4(__VA_ARGS__)
1803
#define vsuxei16_v_u64m8(...) __riscv_vsuxei16_v_u64m8(__VA_ARGS__)
1804
#define vsuxei32_v_u64m1(...) __riscv_vsuxei32_v_u64m1(__VA_ARGS__)
1805
#define vsuxei32_v_u64m2(...) __riscv_vsuxei32_v_u64m2(__VA_ARGS__)
1806
#define vsuxei32_v_u64m4(...) __riscv_vsuxei32_v_u64m4(__VA_ARGS__)
1807
#define vsuxei32_v_u64m8(...) __riscv_vsuxei32_v_u64m8(__VA_ARGS__)
1808
#define vsuxei64_v_u64m1(...) __riscv_vsuxei64_v_u64m1(__VA_ARGS__)
1809
#define vsuxei64_v_u64m2(...) __riscv_vsuxei64_v_u64m2(__VA_ARGS__)
1810
#define vsuxei64_v_u64m4(...) __riscv_vsuxei64_v_u64m4(__VA_ARGS__)
1811
#define vsuxei64_v_u64m8(...) __riscv_vsuxei64_v_u64m8(__VA_ARGS__)
1812
// masked functions
1813
#define vsoxei8_v_f16mf4_m(...) __riscv_vsoxei8_v_f16mf4_m(__VA_ARGS__)
1814
#define vsoxei8_v_f16mf2_m(...) __riscv_vsoxei8_v_f16mf2_m(__VA_ARGS__)
1815
#define vsoxei8_v_f16m1_m(...) __riscv_vsoxei8_v_f16m1_m(__VA_ARGS__)
1816
#define vsoxei8_v_f16m2_m(...) __riscv_vsoxei8_v_f16m2_m(__VA_ARGS__)
1817
#define vsoxei8_v_f16m4_m(...) __riscv_vsoxei8_v_f16m4_m(__VA_ARGS__)
1818
#define vsoxei8_v_f16m8_m(...) __riscv_vsoxei8_v_f16m8_m(__VA_ARGS__)
1819
#define vsoxei16_v_f16mf4_m(...) __riscv_vsoxei16_v_f16mf4_m(__VA_ARGS__)
1820
#define vsoxei16_v_f16mf2_m(...) __riscv_vsoxei16_v_f16mf2_m(__VA_ARGS__)
1821
#define vsoxei16_v_f16m1_m(...) __riscv_vsoxei16_v_f16m1_m(__VA_ARGS__)
1822
#define vsoxei16_v_f16m2_m(...) __riscv_vsoxei16_v_f16m2_m(__VA_ARGS__)
1823
#define vsoxei16_v_f16m4_m(...) __riscv_vsoxei16_v_f16m4_m(__VA_ARGS__)
1824
#define vsoxei16_v_f16m8_m(...) __riscv_vsoxei16_v_f16m8_m(__VA_ARGS__)
1825
#define vsoxei32_v_f16mf4_m(...) __riscv_vsoxei32_v_f16mf4_m(__VA_ARGS__)
1826
#define vsoxei32_v_f16mf2_m(...) __riscv_vsoxei32_v_f16mf2_m(__VA_ARGS__)
1827
#define vsoxei32_v_f16m1_m(...) __riscv_vsoxei32_v_f16m1_m(__VA_ARGS__)
1828
#define vsoxei32_v_f16m2_m(...) __riscv_vsoxei32_v_f16m2_m(__VA_ARGS__)
1829
#define vsoxei32_v_f16m4_m(...) __riscv_vsoxei32_v_f16m4_m(__VA_ARGS__)
1830
#define vsoxei64_v_f16mf4_m(...) __riscv_vsoxei64_v_f16mf4_m(__VA_ARGS__)
1831
#define vsoxei64_v_f16mf2_m(...) __riscv_vsoxei64_v_f16mf2_m(__VA_ARGS__)
1832
#define vsoxei64_v_f16m1_m(...) __riscv_vsoxei64_v_f16m1_m(__VA_ARGS__)
1833
#define vsoxei64_v_f16m2_m(...) __riscv_vsoxei64_v_f16m2_m(__VA_ARGS__)
1834
#define vsoxei8_v_f32mf2_m(...) __riscv_vsoxei8_v_f32mf2_m(__VA_ARGS__)
1835
#define vsoxei8_v_f32m1_m(...) __riscv_vsoxei8_v_f32m1_m(__VA_ARGS__)
1836
#define vsoxei8_v_f32m2_m(...) __riscv_vsoxei8_v_f32m2_m(__VA_ARGS__)
1837
#define vsoxei8_v_f32m4_m(...) __riscv_vsoxei8_v_f32m4_m(__VA_ARGS__)
1838
#define vsoxei8_v_f32m8_m(...) __riscv_vsoxei8_v_f32m8_m(__VA_ARGS__)
1839
#define vsoxei16_v_f32mf2_m(...) __riscv_vsoxei16_v_f32mf2_m(__VA_ARGS__)
1840
#define vsoxei16_v_f32m1_m(...) __riscv_vsoxei16_v_f32m1_m(__VA_ARGS__)
1841
#define vsoxei16_v_f32m2_m(...) __riscv_vsoxei16_v_f32m2_m(__VA_ARGS__)
1842
#define vsoxei16_v_f32m4_m(...) __riscv_vsoxei16_v_f32m4_m(__VA_ARGS__)
1843
#define vsoxei16_v_f32m8_m(...) __riscv_vsoxei16_v_f32m8_m(__VA_ARGS__)
1844
#define vsoxei32_v_f32mf2_m(...) __riscv_vsoxei32_v_f32mf2_m(__VA_ARGS__)
1845
#define vsoxei32_v_f32m1_m(...) __riscv_vsoxei32_v_f32m1_m(__VA_ARGS__)
1846
#define vsoxei32_v_f32m2_m(...) __riscv_vsoxei32_v_f32m2_m(__VA_ARGS__)
1847
#define vsoxei32_v_f32m4_m(...) __riscv_vsoxei32_v_f32m4_m(__VA_ARGS__)
1848
#define vsoxei32_v_f32m8_m(...) __riscv_vsoxei32_v_f32m8_m(__VA_ARGS__)
1849
#define vsoxei64_v_f32mf2_m(...) __riscv_vsoxei64_v_f32mf2_m(__VA_ARGS__)
1850
#define vsoxei64_v_f32m1_m(...) __riscv_vsoxei64_v_f32m1_m(__VA_ARGS__)
1851
#define vsoxei64_v_f32m2_m(...) __riscv_vsoxei64_v_f32m2_m(__VA_ARGS__)
1852
#define vsoxei64_v_f32m4_m(...) __riscv_vsoxei64_v_f32m4_m(__VA_ARGS__)
1853
#define vsoxei8_v_f64m1_m(...) __riscv_vsoxei8_v_f64m1_m(__VA_ARGS__)
1854
#define vsoxei8_v_f64m2_m(...) __riscv_vsoxei8_v_f64m2_m(__VA_ARGS__)
1855
#define vsoxei8_v_f64m4_m(...) __riscv_vsoxei8_v_f64m4_m(__VA_ARGS__)
1856
#define vsoxei8_v_f64m8_m(...) __riscv_vsoxei8_v_f64m8_m(__VA_ARGS__)
1857
#define vsoxei16_v_f64m1_m(...) __riscv_vsoxei16_v_f64m1_m(__VA_ARGS__)
1858
#define vsoxei16_v_f64m2_m(...) __riscv_vsoxei16_v_f64m2_m(__VA_ARGS__)
1859
#define vsoxei16_v_f64m4_m(...) __riscv_vsoxei16_v_f64m4_m(__VA_ARGS__)
1860
#define vsoxei16_v_f64m8_m(...) __riscv_vsoxei16_v_f64m8_m(__VA_ARGS__)
1861
#define vsoxei32_v_f64m1_m(...) __riscv_vsoxei32_v_f64m1_m(__VA_ARGS__)
1862
#define vsoxei32_v_f64m2_m(...) __riscv_vsoxei32_v_f64m2_m(__VA_ARGS__)
1863
#define vsoxei32_v_f64m4_m(...) __riscv_vsoxei32_v_f64m4_m(__VA_ARGS__)
1864
#define vsoxei32_v_f64m8_m(...) __riscv_vsoxei32_v_f64m8_m(__VA_ARGS__)
1865
#define vsoxei64_v_f64m1_m(...) __riscv_vsoxei64_v_f64m1_m(__VA_ARGS__)
1866
#define vsoxei64_v_f64m2_m(...) __riscv_vsoxei64_v_f64m2_m(__VA_ARGS__)
1867
#define vsoxei64_v_f64m4_m(...) __riscv_vsoxei64_v_f64m4_m(__VA_ARGS__)
1868
#define vsoxei64_v_f64m8_m(...) __riscv_vsoxei64_v_f64m8_m(__VA_ARGS__)
1869
#define vsuxei8_v_f16mf4_m(...) __riscv_vsuxei8_v_f16mf4_m(__VA_ARGS__)
1870
#define vsuxei8_v_f16mf2_m(...) __riscv_vsuxei8_v_f16mf2_m(__VA_ARGS__)
1871
#define vsuxei8_v_f16m1_m(...) __riscv_vsuxei8_v_f16m1_m(__VA_ARGS__)
1872
#define vsuxei8_v_f16m2_m(...) __riscv_vsuxei8_v_f16m2_m(__VA_ARGS__)
1873
#define vsuxei8_v_f16m4_m(...) __riscv_vsuxei8_v_f16m4_m(__VA_ARGS__)
1874
#define vsuxei8_v_f16m8_m(...) __riscv_vsuxei8_v_f16m8_m(__VA_ARGS__)
1875
#define vsuxei16_v_f16mf4_m(...) __riscv_vsuxei16_v_f16mf4_m(__VA_ARGS__)
1876
#define vsuxei16_v_f16mf2_m(...) __riscv_vsuxei16_v_f16mf2_m(__VA_ARGS__)
1877
#define vsuxei16_v_f16m1_m(...) __riscv_vsuxei16_v_f16m1_m(__VA_ARGS__)
1878
#define vsuxei16_v_f16m2_m(...) __riscv_vsuxei16_v_f16m2_m(__VA_ARGS__)
1879
#define vsuxei16_v_f16m4_m(...) __riscv_vsuxei16_v_f16m4_m(__VA_ARGS__)
1880
#define vsuxei16_v_f16m8_m(...) __riscv_vsuxei16_v_f16m8_m(__VA_ARGS__)
1881
#define vsuxei32_v_f16mf4_m(...) __riscv_vsuxei32_v_f16mf4_m(__VA_ARGS__)
1882
#define vsuxei32_v_f16mf2_m(...) __riscv_vsuxei32_v_f16mf2_m(__VA_ARGS__)
1883
#define vsuxei32_v_f16m1_m(...) __riscv_vsuxei32_v_f16m1_m(__VA_ARGS__)
1884
#define vsuxei32_v_f16m2_m(...) __riscv_vsuxei32_v_f16m2_m(__VA_ARGS__)
1885
#define vsuxei32_v_f16m4_m(...) __riscv_vsuxei32_v_f16m4_m(__VA_ARGS__)
1886
#define vsuxei64_v_f16mf4_m(...) __riscv_vsuxei64_v_f16mf4_m(__VA_ARGS__)
1887
#define vsuxei64_v_f16mf2_m(...) __riscv_vsuxei64_v_f16mf2_m(__VA_ARGS__)
1888
#define vsuxei64_v_f16m1_m(...) __riscv_vsuxei64_v_f16m1_m(__VA_ARGS__)
1889
#define vsuxei64_v_f16m2_m(...) __riscv_vsuxei64_v_f16m2_m(__VA_ARGS__)
1890
#define vsuxei8_v_f32mf2_m(...) __riscv_vsuxei8_v_f32mf2_m(__VA_ARGS__)
1891
#define vsuxei8_v_f32m1_m(...) __riscv_vsuxei8_v_f32m1_m(__VA_ARGS__)
1892
#define vsuxei8_v_f32m2_m(...) __riscv_vsuxei8_v_f32m2_m(__VA_ARGS__)
1893
#define vsuxei8_v_f32m4_m(...) __riscv_vsuxei8_v_f32m4_m(__VA_ARGS__)
1894
#define vsuxei8_v_f32m8_m(...) __riscv_vsuxei8_v_f32m8_m(__VA_ARGS__)
1895
#define vsuxei16_v_f32mf2_m(...) __riscv_vsuxei16_v_f32mf2_m(__VA_ARGS__)
1896
#define vsuxei16_v_f32m1_m(...) __riscv_vsuxei16_v_f32m1_m(__VA_ARGS__)
1897
#define vsuxei16_v_f32m2_m(...) __riscv_vsuxei16_v_f32m2_m(__VA_ARGS__)
1898
#define vsuxei16_v_f32m4_m(...) __riscv_vsuxei16_v_f32m4_m(__VA_ARGS__)
1899
#define vsuxei16_v_f32m8_m(...) __riscv_vsuxei16_v_f32m8_m(__VA_ARGS__)
1900
#define vsuxei32_v_f32mf2_m(...) __riscv_vsuxei32_v_f32mf2_m(__VA_ARGS__)
1901
#define vsuxei32_v_f32m1_m(...) __riscv_vsuxei32_v_f32m1_m(__VA_ARGS__)
1902
#define vsuxei32_v_f32m2_m(...) __riscv_vsuxei32_v_f32m2_m(__VA_ARGS__)
1903
#define vsuxei32_v_f32m4_m(...) __riscv_vsuxei32_v_f32m4_m(__VA_ARGS__)
1904
#define vsuxei32_v_f32m8_m(...) __riscv_vsuxei32_v_f32m8_m(__VA_ARGS__)
1905
#define vsuxei64_v_f32mf2_m(...) __riscv_vsuxei64_v_f32mf2_m(__VA_ARGS__)
1906
#define vsuxei64_v_f32m1_m(...) __riscv_vsuxei64_v_f32m1_m(__VA_ARGS__)
1907
#define vsuxei64_v_f32m2_m(...) __riscv_vsuxei64_v_f32m2_m(__VA_ARGS__)
1908
#define vsuxei64_v_f32m4_m(...) __riscv_vsuxei64_v_f32m4_m(__VA_ARGS__)
1909
#define vsuxei8_v_f64m1_m(...) __riscv_vsuxei8_v_f64m1_m(__VA_ARGS__)
1910
#define vsuxei8_v_f64m2_m(...) __riscv_vsuxei8_v_f64m2_m(__VA_ARGS__)
1911
#define vsuxei8_v_f64m4_m(...) __riscv_vsuxei8_v_f64m4_m(__VA_ARGS__)
1912
#define vsuxei8_v_f64m8_m(...) __riscv_vsuxei8_v_f64m8_m(__VA_ARGS__)
1913
#define vsuxei16_v_f64m1_m(...) __riscv_vsuxei16_v_f64m1_m(__VA_ARGS__)
1914
#define vsuxei16_v_f64m2_m(...) __riscv_vsuxei16_v_f64m2_m(__VA_ARGS__)
1915
#define vsuxei16_v_f64m4_m(...) __riscv_vsuxei16_v_f64m4_m(__VA_ARGS__)
1916
#define vsuxei16_v_f64m8_m(...) __riscv_vsuxei16_v_f64m8_m(__VA_ARGS__)
1917
#define vsuxei32_v_f64m1_m(...) __riscv_vsuxei32_v_f64m1_m(__VA_ARGS__)
1918
#define vsuxei32_v_f64m2_m(...) __riscv_vsuxei32_v_f64m2_m(__VA_ARGS__)
1919
#define vsuxei32_v_f64m4_m(...) __riscv_vsuxei32_v_f64m4_m(__VA_ARGS__)
1920
#define vsuxei32_v_f64m8_m(...) __riscv_vsuxei32_v_f64m8_m(__VA_ARGS__)
1921
#define vsuxei64_v_f64m1_m(...) __riscv_vsuxei64_v_f64m1_m(__VA_ARGS__)
1922
#define vsuxei64_v_f64m2_m(...) __riscv_vsuxei64_v_f64m2_m(__VA_ARGS__)
1923
#define vsuxei64_v_f64m4_m(...) __riscv_vsuxei64_v_f64m4_m(__VA_ARGS__)
1924
#define vsuxei64_v_f64m8_m(...) __riscv_vsuxei64_v_f64m8_m(__VA_ARGS__)
1925
#define vsoxei8_v_i8mf8_m(...) __riscv_vsoxei8_v_i8mf8_m(__VA_ARGS__)
1926
#define vsoxei8_v_i8mf4_m(...) __riscv_vsoxei8_v_i8mf4_m(__VA_ARGS__)
1927
#define vsoxei8_v_i8mf2_m(...) __riscv_vsoxei8_v_i8mf2_m(__VA_ARGS__)
1928
#define vsoxei8_v_i8m1_m(...) __riscv_vsoxei8_v_i8m1_m(__VA_ARGS__)
1929
#define vsoxei8_v_i8m2_m(...) __riscv_vsoxei8_v_i8m2_m(__VA_ARGS__)
1930
#define vsoxei8_v_i8m4_m(...) __riscv_vsoxei8_v_i8m4_m(__VA_ARGS__)
1931
#define vsoxei8_v_i8m8_m(...) __riscv_vsoxei8_v_i8m8_m(__VA_ARGS__)
1932
#define vsoxei16_v_i8mf8_m(...) __riscv_vsoxei16_v_i8mf8_m(__VA_ARGS__)
1933
#define vsoxei16_v_i8mf4_m(...) __riscv_vsoxei16_v_i8mf4_m(__VA_ARGS__)
1934
#define vsoxei16_v_i8mf2_m(...) __riscv_vsoxei16_v_i8mf2_m(__VA_ARGS__)
1935
#define vsoxei16_v_i8m1_m(...) __riscv_vsoxei16_v_i8m1_m(__VA_ARGS__)
1936
#define vsoxei16_v_i8m2_m(...) __riscv_vsoxei16_v_i8m2_m(__VA_ARGS__)
1937
#define vsoxei16_v_i8m4_m(...) __riscv_vsoxei16_v_i8m4_m(__VA_ARGS__)
1938
#define vsoxei32_v_i8mf8_m(...) __riscv_vsoxei32_v_i8mf8_m(__VA_ARGS__)
1939
#define vsoxei32_v_i8mf4_m(...) __riscv_vsoxei32_v_i8mf4_m(__VA_ARGS__)
1940
#define vsoxei32_v_i8mf2_m(...) __riscv_vsoxei32_v_i8mf2_m(__VA_ARGS__)
1941
#define vsoxei32_v_i8m1_m(...) __riscv_vsoxei32_v_i8m1_m(__VA_ARGS__)
1942
#define vsoxei32_v_i8m2_m(...) __riscv_vsoxei32_v_i8m2_m(__VA_ARGS__)
1943
#define vsoxei64_v_i8mf8_m(...) __riscv_vsoxei64_v_i8mf8_m(__VA_ARGS__)
1944
#define vsoxei64_v_i8mf4_m(...) __riscv_vsoxei64_v_i8mf4_m(__VA_ARGS__)
1945
#define vsoxei64_v_i8mf2_m(...) __riscv_vsoxei64_v_i8mf2_m(__VA_ARGS__)
1946
#define vsoxei64_v_i8m1_m(...) __riscv_vsoxei64_v_i8m1_m(__VA_ARGS__)
1947
#define vsoxei8_v_i16mf4_m(...) __riscv_vsoxei8_v_i16mf4_m(__VA_ARGS__)
1948
#define vsoxei8_v_i16mf2_m(...) __riscv_vsoxei8_v_i16mf2_m(__VA_ARGS__)
1949
#define vsoxei8_v_i16m1_m(...) __riscv_vsoxei8_v_i16m1_m(__VA_ARGS__)
1950
#define vsoxei8_v_i16m2_m(...) __riscv_vsoxei8_v_i16m2_m(__VA_ARGS__)
1951
#define vsoxei8_v_i16m4_m(...) __riscv_vsoxei8_v_i16m4_m(__VA_ARGS__)
1952
#define vsoxei8_v_i16m8_m(...) __riscv_vsoxei8_v_i16m8_m(__VA_ARGS__)
1953
#define vsoxei16_v_i16mf4_m(...) __riscv_vsoxei16_v_i16mf4_m(__VA_ARGS__)
1954
#define vsoxei16_v_i16mf2_m(...) __riscv_vsoxei16_v_i16mf2_m(__VA_ARGS__)
1955
#define vsoxei16_v_i16m1_m(...) __riscv_vsoxei16_v_i16m1_m(__VA_ARGS__)
1956
#define vsoxei16_v_i16m2_m(...) __riscv_vsoxei16_v_i16m2_m(__VA_ARGS__)
1957
#define vsoxei16_v_i16m4_m(...) __riscv_vsoxei16_v_i16m4_m(__VA_ARGS__)
1958
#define vsoxei16_v_i16m8_m(...) __riscv_vsoxei16_v_i16m8_m(__VA_ARGS__)
1959
#define vsoxei32_v_i16mf4_m(...) __riscv_vsoxei32_v_i16mf4_m(__VA_ARGS__)
1960
#define vsoxei32_v_i16mf2_m(...) __riscv_vsoxei32_v_i16mf2_m(__VA_ARGS__)
1961
#define vsoxei32_v_i16m1_m(...) __riscv_vsoxei32_v_i16m1_m(__VA_ARGS__)
1962
#define vsoxei32_v_i16m2_m(...) __riscv_vsoxei32_v_i16m2_m(__VA_ARGS__)
1963
#define vsoxei32_v_i16m4_m(...) __riscv_vsoxei32_v_i16m4_m(__VA_ARGS__)
1964
#define vsoxei64_v_i16mf4_m(...) __riscv_vsoxei64_v_i16mf4_m(__VA_ARGS__)
1965
#define vsoxei64_v_i16mf2_m(...) __riscv_vsoxei64_v_i16mf2_m(__VA_ARGS__)
1966
#define vsoxei64_v_i16m1_m(...) __riscv_vsoxei64_v_i16m1_m(__VA_ARGS__)
1967
#define vsoxei64_v_i16m2_m(...) __riscv_vsoxei64_v_i16m2_m(__VA_ARGS__)
1968
#define vsoxei8_v_i32mf2_m(...) __riscv_vsoxei8_v_i32mf2_m(__VA_ARGS__)
1969
#define vsoxei8_v_i32m1_m(...) __riscv_vsoxei8_v_i32m1_m(__VA_ARGS__)
1970
#define vsoxei8_v_i32m2_m(...) __riscv_vsoxei8_v_i32m2_m(__VA_ARGS__)
1971
#define vsoxei8_v_i32m4_m(...) __riscv_vsoxei8_v_i32m4_m(__VA_ARGS__)
1972
#define vsoxei8_v_i32m8_m(...) __riscv_vsoxei8_v_i32m8_m(__VA_ARGS__)
1973
#define vsoxei16_v_i32mf2_m(...) __riscv_vsoxei16_v_i32mf2_m(__VA_ARGS__)
1974
#define vsoxei16_v_i32m1_m(...) __riscv_vsoxei16_v_i32m1_m(__VA_ARGS__)
1975
#define vsoxei16_v_i32m2_m(...) __riscv_vsoxei16_v_i32m2_m(__VA_ARGS__)
1976
#define vsoxei16_v_i32m4_m(...) __riscv_vsoxei16_v_i32m4_m(__VA_ARGS__)
1977
#define vsoxei16_v_i32m8_m(...) __riscv_vsoxei16_v_i32m8_m(__VA_ARGS__)
1978
#define vsoxei32_v_i32mf2_m(...) __riscv_vsoxei32_v_i32mf2_m(__VA_ARGS__)
1979
#define vsoxei32_v_i32m1_m(...) __riscv_vsoxei32_v_i32m1_m(__VA_ARGS__)
1980
#define vsoxei32_v_i32m2_m(...) __riscv_vsoxei32_v_i32m2_m(__VA_ARGS__)
1981
#define vsoxei32_v_i32m4_m(...) __riscv_vsoxei32_v_i32m4_m(__VA_ARGS__)
1982
#define vsoxei32_v_i32m8_m(...) __riscv_vsoxei32_v_i32m8_m(__VA_ARGS__)
1983
#define vsoxei64_v_i32mf2_m(...) __riscv_vsoxei64_v_i32mf2_m(__VA_ARGS__)
1984
#define vsoxei64_v_i32m1_m(...) __riscv_vsoxei64_v_i32m1_m(__VA_ARGS__)
1985
#define vsoxei64_v_i32m2_m(...) __riscv_vsoxei64_v_i32m2_m(__VA_ARGS__)
1986
#define vsoxei64_v_i32m4_m(...) __riscv_vsoxei64_v_i32m4_m(__VA_ARGS__)
1987
#define vsoxei8_v_i64m1_m(...) __riscv_vsoxei8_v_i64m1_m(__VA_ARGS__)
1988
#define vsoxei8_v_i64m2_m(...) __riscv_vsoxei8_v_i64m2_m(__VA_ARGS__)
1989
#define vsoxei8_v_i64m4_m(...) __riscv_vsoxei8_v_i64m4_m(__VA_ARGS__)
1990
#define vsoxei8_v_i64m8_m(...) __riscv_vsoxei8_v_i64m8_m(__VA_ARGS__)
1991
#define vsoxei16_v_i64m1_m(...) __riscv_vsoxei16_v_i64m1_m(__VA_ARGS__)
1992
#define vsoxei16_v_i64m2_m(...) __riscv_vsoxei16_v_i64m2_m(__VA_ARGS__)
1993
#define vsoxei16_v_i64m4_m(...) __riscv_vsoxei16_v_i64m4_m(__VA_ARGS__)
1994
#define vsoxei16_v_i64m8_m(...) __riscv_vsoxei16_v_i64m8_m(__VA_ARGS__)
1995
#define vsoxei32_v_i64m1_m(...) __riscv_vsoxei32_v_i64m1_m(__VA_ARGS__)
1996
#define vsoxei32_v_i64m2_m(...) __riscv_vsoxei32_v_i64m2_m(__VA_ARGS__)
1997
#define vsoxei32_v_i64m4_m(...) __riscv_vsoxei32_v_i64m4_m(__VA_ARGS__)
1998
#define vsoxei32_v_i64m8_m(...) __riscv_vsoxei32_v_i64m8_m(__VA_ARGS__)
1999
#define vsoxei64_v_i64m1_m(...) __riscv_vsoxei64_v_i64m1_m(__VA_ARGS__)
2000
#define vsoxei64_v_i64m2_m(...) __riscv_vsoxei64_v_i64m2_m(__VA_ARGS__)
2001
#define vsoxei64_v_i64m4_m(...) __riscv_vsoxei64_v_i64m4_m(__VA_ARGS__)
2002
#define vsoxei64_v_i64m8_m(...) __riscv_vsoxei64_v_i64m8_m(__VA_ARGS__)
2003
#define vsuxei8_v_i8mf8_m(...) __riscv_vsuxei8_v_i8mf8_m(__VA_ARGS__)
2004
#define vsuxei8_v_i8mf4_m(...) __riscv_vsuxei8_v_i8mf4_m(__VA_ARGS__)
2005
#define vsuxei8_v_i8mf2_m(...) __riscv_vsuxei8_v_i8mf2_m(__VA_ARGS__)
2006
#define vsuxei8_v_i8m1_m(...) __riscv_vsuxei8_v_i8m1_m(__VA_ARGS__)
2007
#define vsuxei8_v_i8m2_m(...) __riscv_vsuxei8_v_i8m2_m(__VA_ARGS__)
2008
#define vsuxei8_v_i8m4_m(...) __riscv_vsuxei8_v_i8m4_m(__VA_ARGS__)
2009
#define vsuxei8_v_i8m8_m(...) __riscv_vsuxei8_v_i8m8_m(__VA_ARGS__)
2010
#define vsuxei16_v_i8mf8_m(...) __riscv_vsuxei16_v_i8mf8_m(__VA_ARGS__)
2011
#define vsuxei16_v_i8mf4_m(...) __riscv_vsuxei16_v_i8mf4_m(__VA_ARGS__)
2012
#define vsuxei16_v_i8mf2_m(...) __riscv_vsuxei16_v_i8mf2_m(__VA_ARGS__)
2013
#define vsuxei16_v_i8m1_m(...) __riscv_vsuxei16_v_i8m1_m(__VA_ARGS__)
2014
#define vsuxei16_v_i8m2_m(...) __riscv_vsuxei16_v_i8m2_m(__VA_ARGS__)
2015
#define vsuxei16_v_i8m4_m(...) __riscv_vsuxei16_v_i8m4_m(__VA_ARGS__)
2016
#define vsuxei32_v_i8mf8_m(...) __riscv_vsuxei32_v_i8mf8_m(__VA_ARGS__)
2017
#define vsuxei32_v_i8mf4_m(...) __riscv_vsuxei32_v_i8mf4_m(__VA_ARGS__)
2018
#define vsuxei32_v_i8mf2_m(...) __riscv_vsuxei32_v_i8mf2_m(__VA_ARGS__)
2019
#define vsuxei32_v_i8m1_m(...) __riscv_vsuxei32_v_i8m1_m(__VA_ARGS__)
2020
#define vsuxei32_v_i8m2_m(...) __riscv_vsuxei32_v_i8m2_m(__VA_ARGS__)
2021
#define vsuxei64_v_i8mf8_m(...) __riscv_vsuxei64_v_i8mf8_m(__VA_ARGS__)
2022
#define vsuxei64_v_i8mf4_m(...) __riscv_vsuxei64_v_i8mf4_m(__VA_ARGS__)
2023
#define vsuxei64_v_i8mf2_m(...) __riscv_vsuxei64_v_i8mf2_m(__VA_ARGS__)
2024
#define vsuxei64_v_i8m1_m(...) __riscv_vsuxei64_v_i8m1_m(__VA_ARGS__)
2025
#define vsuxei8_v_i16mf4_m(...) __riscv_vsuxei8_v_i16mf4_m(__VA_ARGS__)
2026
#define vsuxei8_v_i16mf2_m(...) __riscv_vsuxei8_v_i16mf2_m(__VA_ARGS__)
2027
#define vsuxei8_v_i16m1_m(...) __riscv_vsuxei8_v_i16m1_m(__VA_ARGS__)
2028
#define vsuxei8_v_i16m2_m(...) __riscv_vsuxei8_v_i16m2_m(__VA_ARGS__)
2029
#define vsuxei8_v_i16m4_m(...) __riscv_vsuxei8_v_i16m4_m(__VA_ARGS__)
2030
#define vsuxei8_v_i16m8_m(...) __riscv_vsuxei8_v_i16m8_m(__VA_ARGS__)
2031
#define vsuxei16_v_i16mf4_m(...) __riscv_vsuxei16_v_i16mf4_m(__VA_ARGS__)
2032
#define vsuxei16_v_i16mf2_m(...) __riscv_vsuxei16_v_i16mf2_m(__VA_ARGS__)
2033
#define vsuxei16_v_i16m1_m(...) __riscv_vsuxei16_v_i16m1_m(__VA_ARGS__)
2034
#define vsuxei16_v_i16m2_m(...) __riscv_vsuxei16_v_i16m2_m(__VA_ARGS__)
2035
#define vsuxei16_v_i16m4_m(...) __riscv_vsuxei16_v_i16m4_m(__VA_ARGS__)
2036
#define vsuxei16_v_i16m8_m(...) __riscv_vsuxei16_v_i16m8_m(__VA_ARGS__)
2037
#define vsuxei32_v_i16mf4_m(...) __riscv_vsuxei32_v_i16mf4_m(__VA_ARGS__)
2038
#define vsuxei32_v_i16mf2_m(...) __riscv_vsuxei32_v_i16mf2_m(__VA_ARGS__)
2039
#define vsuxei32_v_i16m1_m(...) __riscv_vsuxei32_v_i16m1_m(__VA_ARGS__)
2040
#define vsuxei32_v_i16m2_m(...) __riscv_vsuxei32_v_i16m2_m(__VA_ARGS__)
2041
#define vsuxei32_v_i16m4_m(...) __riscv_vsuxei32_v_i16m4_m(__VA_ARGS__)
2042
#define vsuxei64_v_i16mf4_m(...) __riscv_vsuxei64_v_i16mf4_m(__VA_ARGS__)
2043
#define vsuxei64_v_i16mf2_m(...) __riscv_vsuxei64_v_i16mf2_m(__VA_ARGS__)
2044
#define vsuxei64_v_i16m1_m(...) __riscv_vsuxei64_v_i16m1_m(__VA_ARGS__)
2045
#define vsuxei64_v_i16m2_m(...) __riscv_vsuxei64_v_i16m2_m(__VA_ARGS__)
2046
#define vsuxei8_v_i32mf2_m(...) __riscv_vsuxei8_v_i32mf2_m(__VA_ARGS__)
2047
#define vsuxei8_v_i32m1_m(...) __riscv_vsuxei8_v_i32m1_m(__VA_ARGS__)
2048
#define vsuxei8_v_i32m2_m(...) __riscv_vsuxei8_v_i32m2_m(__VA_ARGS__)
2049
#define vsuxei8_v_i32m4_m(...) __riscv_vsuxei8_v_i32m4_m(__VA_ARGS__)
2050
#define vsuxei8_v_i32m8_m(...) __riscv_vsuxei8_v_i32m8_m(__VA_ARGS__)
2051
#define vsuxei16_v_i32mf2_m(...) __riscv_vsuxei16_v_i32mf2_m(__VA_ARGS__)
2052
#define vsuxei16_v_i32m1_m(...) __riscv_vsuxei16_v_i32m1_m(__VA_ARGS__)
2053
#define vsuxei16_v_i32m2_m(...) __riscv_vsuxei16_v_i32m2_m(__VA_ARGS__)
2054
#define vsuxei16_v_i32m4_m(...) __riscv_vsuxei16_v_i32m4_m(__VA_ARGS__)
2055
#define vsuxei16_v_i32m8_m(...) __riscv_vsuxei16_v_i32m8_m(__VA_ARGS__)
2056
#define vsuxei32_v_i32mf2_m(...) __riscv_vsuxei32_v_i32mf2_m(__VA_ARGS__)
2057
#define vsuxei32_v_i32m1_m(...) __riscv_vsuxei32_v_i32m1_m(__VA_ARGS__)
2058
#define vsuxei32_v_i32m2_m(...) __riscv_vsuxei32_v_i32m2_m(__VA_ARGS__)
2059
#define vsuxei32_v_i32m4_m(...) __riscv_vsuxei32_v_i32m4_m(__VA_ARGS__)
2060
#define vsuxei32_v_i32m8_m(...) __riscv_vsuxei32_v_i32m8_m(__VA_ARGS__)
2061
#define vsuxei64_v_i32mf2_m(...) __riscv_vsuxei64_v_i32mf2_m(__VA_ARGS__)
2062
#define vsuxei64_v_i32m1_m(...) __riscv_vsuxei64_v_i32m1_m(__VA_ARGS__)
2063
#define vsuxei64_v_i32m2_m(...) __riscv_vsuxei64_v_i32m2_m(__VA_ARGS__)
2064
#define vsuxei64_v_i32m4_m(...) __riscv_vsuxei64_v_i32m4_m(__VA_ARGS__)
2065
#define vsuxei8_v_i64m1_m(...) __riscv_vsuxei8_v_i64m1_m(__VA_ARGS__)
2066
#define vsuxei8_v_i64m2_m(...) __riscv_vsuxei8_v_i64m2_m(__VA_ARGS__)
2067
#define vsuxei8_v_i64m4_m(...) __riscv_vsuxei8_v_i64m4_m(__VA_ARGS__)
2068
#define vsuxei8_v_i64m8_m(...) __riscv_vsuxei8_v_i64m8_m(__VA_ARGS__)
2069
#define vsuxei16_v_i64m1_m(...) __riscv_vsuxei16_v_i64m1_m(__VA_ARGS__)
2070
#define vsuxei16_v_i64m2_m(...) __riscv_vsuxei16_v_i64m2_m(__VA_ARGS__)
2071
#define vsuxei16_v_i64m4_m(...) __riscv_vsuxei16_v_i64m4_m(__VA_ARGS__)
2072
#define vsuxei16_v_i64m8_m(...) __riscv_vsuxei16_v_i64m8_m(__VA_ARGS__)
2073
#define vsuxei32_v_i64m1_m(...) __riscv_vsuxei32_v_i64m1_m(__VA_ARGS__)
2074
#define vsuxei32_v_i64m2_m(...) __riscv_vsuxei32_v_i64m2_m(__VA_ARGS__)
2075
#define vsuxei32_v_i64m4_m(...) __riscv_vsuxei32_v_i64m4_m(__VA_ARGS__)
2076
#define vsuxei32_v_i64m8_m(...) __riscv_vsuxei32_v_i64m8_m(__VA_ARGS__)
2077
#define vsuxei64_v_i64m1_m(...) __riscv_vsuxei64_v_i64m1_m(__VA_ARGS__)
2078
#define vsuxei64_v_i64m2_m(...) __riscv_vsuxei64_v_i64m2_m(__VA_ARGS__)
2079
#define vsuxei64_v_i64m4_m(...) __riscv_vsuxei64_v_i64m4_m(__VA_ARGS__)
2080
#define vsuxei64_v_i64m8_m(...) __riscv_vsuxei64_v_i64m8_m(__VA_ARGS__)
2081
#define vsoxei8_v_u8mf8_m(...) __riscv_vsoxei8_v_u8mf8_m(__VA_ARGS__)
2082
#define vsoxei8_v_u8mf4_m(...) __riscv_vsoxei8_v_u8mf4_m(__VA_ARGS__)
2083
#define vsoxei8_v_u8mf2_m(...) __riscv_vsoxei8_v_u8mf2_m(__VA_ARGS__)
2084
#define vsoxei8_v_u8m1_m(...) __riscv_vsoxei8_v_u8m1_m(__VA_ARGS__)
2085
#define vsoxei8_v_u8m2_m(...) __riscv_vsoxei8_v_u8m2_m(__VA_ARGS__)
2086
#define vsoxei8_v_u8m4_m(...) __riscv_vsoxei8_v_u8m4_m(__VA_ARGS__)
2087
#define vsoxei8_v_u8m8_m(...) __riscv_vsoxei8_v_u8m8_m(__VA_ARGS__)
2088
#define vsoxei16_v_u8mf8_m(...) __riscv_vsoxei16_v_u8mf8_m(__VA_ARGS__)
2089
#define vsoxei16_v_u8mf4_m(...) __riscv_vsoxei16_v_u8mf4_m(__VA_ARGS__)
2090
#define vsoxei16_v_u8mf2_m(...) __riscv_vsoxei16_v_u8mf2_m(__VA_ARGS__)
2091
#define vsoxei16_v_u8m1_m(...) __riscv_vsoxei16_v_u8m1_m(__VA_ARGS__)
2092
#define vsoxei16_v_u8m2_m(...) __riscv_vsoxei16_v_u8m2_m(__VA_ARGS__)
2093
#define vsoxei16_v_u8m4_m(...) __riscv_vsoxei16_v_u8m4_m(__VA_ARGS__)
2094
#define vsoxei32_v_u8mf8_m(...) __riscv_vsoxei32_v_u8mf8_m(__VA_ARGS__)
2095
#define vsoxei32_v_u8mf4_m(...) __riscv_vsoxei32_v_u8mf4_m(__VA_ARGS__)
2096
#define vsoxei32_v_u8mf2_m(...) __riscv_vsoxei32_v_u8mf2_m(__VA_ARGS__)
2097
#define vsoxei32_v_u8m1_m(...) __riscv_vsoxei32_v_u8m1_m(__VA_ARGS__)
2098
#define vsoxei32_v_u8m2_m(...) __riscv_vsoxei32_v_u8m2_m(__VA_ARGS__)
2099
#define vsoxei64_v_u8mf8_m(...) __riscv_vsoxei64_v_u8mf8_m(__VA_ARGS__)
2100
#define vsoxei64_v_u8mf4_m(...) __riscv_vsoxei64_v_u8mf4_m(__VA_ARGS__)
2101
#define vsoxei64_v_u8mf2_m(...) __riscv_vsoxei64_v_u8mf2_m(__VA_ARGS__)
2102
#define vsoxei64_v_u8m1_m(...) __riscv_vsoxei64_v_u8m1_m(__VA_ARGS__)
2103
#define vsoxei8_v_u16mf4_m(...) __riscv_vsoxei8_v_u16mf4_m(__VA_ARGS__)
2104
#define vsoxei8_v_u16mf2_m(...) __riscv_vsoxei8_v_u16mf2_m(__VA_ARGS__)
2105
#define vsoxei8_v_u16m1_m(...) __riscv_vsoxei8_v_u16m1_m(__VA_ARGS__)
2106
#define vsoxei8_v_u16m2_m(...) __riscv_vsoxei8_v_u16m2_m(__VA_ARGS__)
2107
#define vsoxei8_v_u16m4_m(...) __riscv_vsoxei8_v_u16m4_m(__VA_ARGS__)
2108
#define vsoxei8_v_u16m8_m(...) __riscv_vsoxei8_v_u16m8_m(__VA_ARGS__)
2109
#define vsoxei16_v_u16mf4_m(...) __riscv_vsoxei16_v_u16mf4_m(__VA_ARGS__)
2110
#define vsoxei16_v_u16mf2_m(...) __riscv_vsoxei16_v_u16mf2_m(__VA_ARGS__)
2111
#define vsoxei16_v_u16m1_m(...) __riscv_vsoxei16_v_u16m1_m(__VA_ARGS__)
2112
#define vsoxei16_v_u16m2_m(...) __riscv_vsoxei16_v_u16m2_m(__VA_ARGS__)
2113
#define vsoxei16_v_u16m4_m(...) __riscv_vsoxei16_v_u16m4_m(__VA_ARGS__)
2114
#define vsoxei16_v_u16m8_m(...) __riscv_vsoxei16_v_u16m8_m(__VA_ARGS__)
2115
#define vsoxei32_v_u16mf4_m(...) __riscv_vsoxei32_v_u16mf4_m(__VA_ARGS__)
2116
#define vsoxei32_v_u16mf2_m(...) __riscv_vsoxei32_v_u16mf2_m(__VA_ARGS__)
2117
#define vsoxei32_v_u16m1_m(...) __riscv_vsoxei32_v_u16m1_m(__VA_ARGS__)
2118
#define vsoxei32_v_u16m2_m(...) __riscv_vsoxei32_v_u16m2_m(__VA_ARGS__)
2119
#define vsoxei32_v_u16m4_m(...) __riscv_vsoxei32_v_u16m4_m(__VA_ARGS__)
2120
#define vsoxei64_v_u16mf4_m(...) __riscv_vsoxei64_v_u16mf4_m(__VA_ARGS__)
2121
#define vsoxei64_v_u16mf2_m(...) __riscv_vsoxei64_v_u16mf2_m(__VA_ARGS__)
2122
#define vsoxei64_v_u16m1_m(...) __riscv_vsoxei64_v_u16m1_m(__VA_ARGS__)
2123
#define vsoxei64_v_u16m2_m(...) __riscv_vsoxei64_v_u16m2_m(__VA_ARGS__)
2124
#define vsoxei8_v_u32mf2_m(...) __riscv_vsoxei8_v_u32mf2_m(__VA_ARGS__)
2125
#define vsoxei8_v_u32m1_m(...) __riscv_vsoxei8_v_u32m1_m(__VA_ARGS__)
2126
#define vsoxei8_v_u32m2_m(...) __riscv_vsoxei8_v_u32m2_m(__VA_ARGS__)
2127
#define vsoxei8_v_u32m4_m(...) __riscv_vsoxei8_v_u32m4_m(__VA_ARGS__)
2128
#define vsoxei8_v_u32m8_m(...) __riscv_vsoxei8_v_u32m8_m(__VA_ARGS__)
2129
#define vsoxei16_v_u32mf2_m(...) __riscv_vsoxei16_v_u32mf2_m(__VA_ARGS__)
2130
#define vsoxei16_v_u32m1_m(...) __riscv_vsoxei16_v_u32m1_m(__VA_ARGS__)
2131
#define vsoxei16_v_u32m2_m(...) __riscv_vsoxei16_v_u32m2_m(__VA_ARGS__)
2132
#define vsoxei16_v_u32m4_m(...) __riscv_vsoxei16_v_u32m4_m(__VA_ARGS__)
2133
#define vsoxei16_v_u32m8_m(...) __riscv_vsoxei16_v_u32m8_m(__VA_ARGS__)
2134
#define vsoxei32_v_u32mf2_m(...) __riscv_vsoxei32_v_u32mf2_m(__VA_ARGS__)
2135
#define vsoxei32_v_u32m1_m(...) __riscv_vsoxei32_v_u32m1_m(__VA_ARGS__)
2136
#define vsoxei32_v_u32m2_m(...) __riscv_vsoxei32_v_u32m2_m(__VA_ARGS__)
2137
#define vsoxei32_v_u32m4_m(...) __riscv_vsoxei32_v_u32m4_m(__VA_ARGS__)
2138
#define vsoxei32_v_u32m8_m(...) __riscv_vsoxei32_v_u32m8_m(__VA_ARGS__)
2139
#define vsoxei64_v_u32mf2_m(...) __riscv_vsoxei64_v_u32mf2_m(__VA_ARGS__)
2140
#define vsoxei64_v_u32m1_m(...) __riscv_vsoxei64_v_u32m1_m(__VA_ARGS__)
2141
#define vsoxei64_v_u32m2_m(...) __riscv_vsoxei64_v_u32m2_m(__VA_ARGS__)
2142
#define vsoxei64_v_u32m4_m(...) __riscv_vsoxei64_v_u32m4_m(__VA_ARGS__)
2143
#define vsoxei8_v_u64m1_m(...) __riscv_vsoxei8_v_u64m1_m(__VA_ARGS__)
2144
#define vsoxei8_v_u64m2_m(...) __riscv_vsoxei8_v_u64m2_m(__VA_ARGS__)
2145
#define vsoxei8_v_u64m4_m(...) __riscv_vsoxei8_v_u64m4_m(__VA_ARGS__)
2146
#define vsoxei8_v_u64m8_m(...) __riscv_vsoxei8_v_u64m8_m(__VA_ARGS__)
2147
#define vsoxei16_v_u64m1_m(...) __riscv_vsoxei16_v_u64m1_m(__VA_ARGS__)
2148
#define vsoxei16_v_u64m2_m(...) __riscv_vsoxei16_v_u64m2_m(__VA_ARGS__)
2149
#define vsoxei16_v_u64m4_m(...) __riscv_vsoxei16_v_u64m4_m(__VA_ARGS__)
2150
#define vsoxei16_v_u64m8_m(...) __riscv_vsoxei16_v_u64m8_m(__VA_ARGS__)
2151
#define vsoxei32_v_u64m1_m(...) __riscv_vsoxei32_v_u64m1_m(__VA_ARGS__)
2152
#define vsoxei32_v_u64m2_m(...) __riscv_vsoxei32_v_u64m2_m(__VA_ARGS__)
2153
#define vsoxei32_v_u64m4_m(...) __riscv_vsoxei32_v_u64m4_m(__VA_ARGS__)
2154
#define vsoxei32_v_u64m8_m(...) __riscv_vsoxei32_v_u64m8_m(__VA_ARGS__)
2155
#define vsoxei64_v_u64m1_m(...) __riscv_vsoxei64_v_u64m1_m(__VA_ARGS__)
2156
#define vsoxei64_v_u64m2_m(...) __riscv_vsoxei64_v_u64m2_m(__VA_ARGS__)
2157
#define vsoxei64_v_u64m4_m(...) __riscv_vsoxei64_v_u64m4_m(__VA_ARGS__)
2158
#define vsoxei64_v_u64m8_m(...) __riscv_vsoxei64_v_u64m8_m(__VA_ARGS__)
2159
#define vsuxei8_v_u8mf8_m(...) __riscv_vsuxei8_v_u8mf8_m(__VA_ARGS__)
2160
#define vsuxei8_v_u8mf4_m(...) __riscv_vsuxei8_v_u8mf4_m(__VA_ARGS__)
2161
#define vsuxei8_v_u8mf2_m(...) __riscv_vsuxei8_v_u8mf2_m(__VA_ARGS__)
2162
#define vsuxei8_v_u8m1_m(...) __riscv_vsuxei8_v_u8m1_m(__VA_ARGS__)
2163
#define vsuxei8_v_u8m2_m(...) __riscv_vsuxei8_v_u8m2_m(__VA_ARGS__)
2164
#define vsuxei8_v_u8m4_m(...) __riscv_vsuxei8_v_u8m4_m(__VA_ARGS__)
2165
#define vsuxei8_v_u8m8_m(...) __riscv_vsuxei8_v_u8m8_m(__VA_ARGS__)
2166
#define vsuxei16_v_u8mf8_m(...) __riscv_vsuxei16_v_u8mf8_m(__VA_ARGS__)
2167
#define vsuxei16_v_u8mf4_m(...) __riscv_vsuxei16_v_u8mf4_m(__VA_ARGS__)
2168
#define vsuxei16_v_u8mf2_m(...) __riscv_vsuxei16_v_u8mf2_m(__VA_ARGS__)
2169
#define vsuxei16_v_u8m1_m(...) __riscv_vsuxei16_v_u8m1_m(__VA_ARGS__)
2170
#define vsuxei16_v_u8m2_m(...) __riscv_vsuxei16_v_u8m2_m(__VA_ARGS__)
2171
#define vsuxei16_v_u8m4_m(...) __riscv_vsuxei16_v_u8m4_m(__VA_ARGS__)
2172
#define vsuxei32_v_u8mf8_m(...) __riscv_vsuxei32_v_u8mf8_m(__VA_ARGS__)
2173
#define vsuxei32_v_u8mf4_m(...) __riscv_vsuxei32_v_u8mf4_m(__VA_ARGS__)
2174
#define vsuxei32_v_u8mf2_m(...) __riscv_vsuxei32_v_u8mf2_m(__VA_ARGS__)
2175
#define vsuxei32_v_u8m1_m(...) __riscv_vsuxei32_v_u8m1_m(__VA_ARGS__)
2176
#define vsuxei32_v_u8m2_m(...) __riscv_vsuxei32_v_u8m2_m(__VA_ARGS__)
2177
#define vsuxei64_v_u8mf8_m(...) __riscv_vsuxei64_v_u8mf8_m(__VA_ARGS__)
2178
#define vsuxei64_v_u8mf4_m(...) __riscv_vsuxei64_v_u8mf4_m(__VA_ARGS__)
2179
#define vsuxei64_v_u8mf2_m(...) __riscv_vsuxei64_v_u8mf2_m(__VA_ARGS__)
2180
#define vsuxei64_v_u8m1_m(...) __riscv_vsuxei64_v_u8m1_m(__VA_ARGS__)
2181
#define vsuxei8_v_u16mf4_m(...) __riscv_vsuxei8_v_u16mf4_m(__VA_ARGS__)
2182
#define vsuxei8_v_u16mf2_m(...) __riscv_vsuxei8_v_u16mf2_m(__VA_ARGS__)
2183
#define vsuxei8_v_u16m1_m(...) __riscv_vsuxei8_v_u16m1_m(__VA_ARGS__)
2184
#define vsuxei8_v_u16m2_m(...) __riscv_vsuxei8_v_u16m2_m(__VA_ARGS__)
2185
#define vsuxei8_v_u16m4_m(...) __riscv_vsuxei8_v_u16m4_m(__VA_ARGS__)
2186
#define vsuxei8_v_u16m8_m(...) __riscv_vsuxei8_v_u16m8_m(__VA_ARGS__)
2187
#define vsuxei16_v_u16mf4_m(...) __riscv_vsuxei16_v_u16mf4_m(__VA_ARGS__)
2188
#define vsuxei16_v_u16mf2_m(...) __riscv_vsuxei16_v_u16mf2_m(__VA_ARGS__)
2189
#define vsuxei16_v_u16m1_m(...) __riscv_vsuxei16_v_u16m1_m(__VA_ARGS__)
2190
#define vsuxei16_v_u16m2_m(...) __riscv_vsuxei16_v_u16m2_m(__VA_ARGS__)
2191
#define vsuxei16_v_u16m4_m(...) __riscv_vsuxei16_v_u16m4_m(__VA_ARGS__)
2192
#define vsuxei16_v_u16m8_m(...) __riscv_vsuxei16_v_u16m8_m(__VA_ARGS__)
2193
#define vsuxei32_v_u16mf4_m(...) __riscv_vsuxei32_v_u16mf4_m(__VA_ARGS__)
2194
#define vsuxei32_v_u16mf2_m(...) __riscv_vsuxei32_v_u16mf2_m(__VA_ARGS__)
2195
#define vsuxei32_v_u16m1_m(...) __riscv_vsuxei32_v_u16m1_m(__VA_ARGS__)
2196
#define vsuxei32_v_u16m2_m(...) __riscv_vsuxei32_v_u16m2_m(__VA_ARGS__)
2197
#define vsuxei32_v_u16m4_m(...) __riscv_vsuxei32_v_u16m4_m(__VA_ARGS__)
2198
#define vsuxei64_v_u16mf4_m(...) __riscv_vsuxei64_v_u16mf4_m(__VA_ARGS__)
2199
#define vsuxei64_v_u16mf2_m(...) __riscv_vsuxei64_v_u16mf2_m(__VA_ARGS__)
2200
#define vsuxei64_v_u16m1_m(...) __riscv_vsuxei64_v_u16m1_m(__VA_ARGS__)
2201
#define vsuxei64_v_u16m2_m(...) __riscv_vsuxei64_v_u16m2_m(__VA_ARGS__)
2202
#define vsuxei8_v_u32mf2_m(...) __riscv_vsuxei8_v_u32mf2_m(__VA_ARGS__)
2203
#define vsuxei8_v_u32m1_m(...) __riscv_vsuxei8_v_u32m1_m(__VA_ARGS__)
2204
#define vsuxei8_v_u32m2_m(...) __riscv_vsuxei8_v_u32m2_m(__VA_ARGS__)
2205
#define vsuxei8_v_u32m4_m(...) __riscv_vsuxei8_v_u32m4_m(__VA_ARGS__)
2206
#define vsuxei8_v_u32m8_m(...) __riscv_vsuxei8_v_u32m8_m(__VA_ARGS__)
2207
#define vsuxei16_v_u32mf2_m(...) __riscv_vsuxei16_v_u32mf2_m(__VA_ARGS__)
2208
#define vsuxei16_v_u32m1_m(...) __riscv_vsuxei16_v_u32m1_m(__VA_ARGS__)
2209
#define vsuxei16_v_u32m2_m(...) __riscv_vsuxei16_v_u32m2_m(__VA_ARGS__)
2210
#define vsuxei16_v_u32m4_m(...) __riscv_vsuxei16_v_u32m4_m(__VA_ARGS__)
2211
#define vsuxei16_v_u32m8_m(...) __riscv_vsuxei16_v_u32m8_m(__VA_ARGS__)
2212
#define vsuxei32_v_u32mf2_m(...) __riscv_vsuxei32_v_u32mf2_m(__VA_ARGS__)
2213
#define vsuxei32_v_u32m1_m(...) __riscv_vsuxei32_v_u32m1_m(__VA_ARGS__)
2214
#define vsuxei32_v_u32m2_m(...) __riscv_vsuxei32_v_u32m2_m(__VA_ARGS__)
2215
#define vsuxei32_v_u32m4_m(...) __riscv_vsuxei32_v_u32m4_m(__VA_ARGS__)
2216
#define vsuxei32_v_u32m8_m(...) __riscv_vsuxei32_v_u32m8_m(__VA_ARGS__)
2217
#define vsuxei64_v_u32mf2_m(...) __riscv_vsuxei64_v_u32mf2_m(__VA_ARGS__)
2218
#define vsuxei64_v_u32m1_m(...) __riscv_vsuxei64_v_u32m1_m(__VA_ARGS__)
2219
#define vsuxei64_v_u32m2_m(...) __riscv_vsuxei64_v_u32m2_m(__VA_ARGS__)
2220
#define vsuxei64_v_u32m4_m(...) __riscv_vsuxei64_v_u32m4_m(__VA_ARGS__)
2221
#define vsuxei8_v_u64m1_m(...) __riscv_vsuxei8_v_u64m1_m(__VA_ARGS__)
2222
#define vsuxei8_v_u64m2_m(...) __riscv_vsuxei8_v_u64m2_m(__VA_ARGS__)
2223
#define vsuxei8_v_u64m4_m(...) __riscv_vsuxei8_v_u64m4_m(__VA_ARGS__)
2224
#define vsuxei8_v_u64m8_m(...) __riscv_vsuxei8_v_u64m8_m(__VA_ARGS__)
2225
#define vsuxei16_v_u64m1_m(...) __riscv_vsuxei16_v_u64m1_m(__VA_ARGS__)
2226
#define vsuxei16_v_u64m2_m(...) __riscv_vsuxei16_v_u64m2_m(__VA_ARGS__)
2227
#define vsuxei16_v_u64m4_m(...) __riscv_vsuxei16_v_u64m4_m(__VA_ARGS__)
2228
#define vsuxei16_v_u64m8_m(...) __riscv_vsuxei16_v_u64m8_m(__VA_ARGS__)
2229
#define vsuxei32_v_u64m1_m(...) __riscv_vsuxei32_v_u64m1_m(__VA_ARGS__)
2230
#define vsuxei32_v_u64m2_m(...) __riscv_vsuxei32_v_u64m2_m(__VA_ARGS__)
2231
#define vsuxei32_v_u64m4_m(...) __riscv_vsuxei32_v_u64m4_m(__VA_ARGS__)
2232
#define vsuxei32_v_u64m8_m(...) __riscv_vsuxei32_v_u64m8_m(__VA_ARGS__)
2233
#define vsuxei64_v_u64m1_m(...) __riscv_vsuxei64_v_u64m1_m(__VA_ARGS__)
2234
#define vsuxei64_v_u64m2_m(...) __riscv_vsuxei64_v_u64m2_m(__VA_ARGS__)
2235
#define vsuxei64_v_u64m4_m(...) __riscv_vsuxei64_v_u64m4_m(__VA_ARGS__)
2236
#define vsuxei64_v_u64m8_m(...) __riscv_vsuxei64_v_u64m8_m(__VA_ARGS__)
2237
#define vle16ff_v_f16mf4(...) __riscv_vle16ff_v_f16mf4(__VA_ARGS__)
2238
#define vle16ff_v_f16mf2(...) __riscv_vle16ff_v_f16mf2(__VA_ARGS__)
2239
#define vle16ff_v_f16m1(...) __riscv_vle16ff_v_f16m1(__VA_ARGS__)
2240
#define vle16ff_v_f16m2(...) __riscv_vle16ff_v_f16m2(__VA_ARGS__)
2241
#define vle16ff_v_f16m4(...) __riscv_vle16ff_v_f16m4(__VA_ARGS__)
2242
#define vle16ff_v_f16m8(...) __riscv_vle16ff_v_f16m8(__VA_ARGS__)
2243
#define vle32ff_v_f32mf2(...) __riscv_vle32ff_v_f32mf2(__VA_ARGS__)
2244
#define vle32ff_v_f32m1(...) __riscv_vle32ff_v_f32m1(__VA_ARGS__)
2245
#define vle32ff_v_f32m2(...) __riscv_vle32ff_v_f32m2(__VA_ARGS__)
2246
#define vle32ff_v_f32m4(...) __riscv_vle32ff_v_f32m4(__VA_ARGS__)
2247
#define vle32ff_v_f32m8(...) __riscv_vle32ff_v_f32m8(__VA_ARGS__)
2248
#define vle64ff_v_f64m1(...) __riscv_vle64ff_v_f64m1(__VA_ARGS__)
2249
#define vle64ff_v_f64m2(...) __riscv_vle64ff_v_f64m2(__VA_ARGS__)
2250
#define vle64ff_v_f64m4(...) __riscv_vle64ff_v_f64m4(__VA_ARGS__)
2251
#define vle64ff_v_f64m8(...) __riscv_vle64ff_v_f64m8(__VA_ARGS__)
2252
#define vle8ff_v_i8mf8(...) __riscv_vle8ff_v_i8mf8(__VA_ARGS__)
2253
#define vle8ff_v_i8mf4(...) __riscv_vle8ff_v_i8mf4(__VA_ARGS__)
2254
#define vle8ff_v_i8mf2(...) __riscv_vle8ff_v_i8mf2(__VA_ARGS__)
2255
#define vle8ff_v_i8m1(...) __riscv_vle8ff_v_i8m1(__VA_ARGS__)
2256
#define vle8ff_v_i8m2(...) __riscv_vle8ff_v_i8m2(__VA_ARGS__)
2257
#define vle8ff_v_i8m4(...) __riscv_vle8ff_v_i8m4(__VA_ARGS__)
2258
#define vle8ff_v_i8m8(...) __riscv_vle8ff_v_i8m8(__VA_ARGS__)
2259
#define vle16ff_v_i16mf4(...) __riscv_vle16ff_v_i16mf4(__VA_ARGS__)
2260
#define vle16ff_v_i16mf2(...) __riscv_vle16ff_v_i16mf2(__VA_ARGS__)
2261
#define vle16ff_v_i16m1(...) __riscv_vle16ff_v_i16m1(__VA_ARGS__)
2262
#define vle16ff_v_i16m2(...) __riscv_vle16ff_v_i16m2(__VA_ARGS__)
2263
#define vle16ff_v_i16m4(...) __riscv_vle16ff_v_i16m4(__VA_ARGS__)
2264
#define vle16ff_v_i16m8(...) __riscv_vle16ff_v_i16m8(__VA_ARGS__)
2265
#define vle32ff_v_i32mf2(...) __riscv_vle32ff_v_i32mf2(__VA_ARGS__)
2266
#define vle32ff_v_i32m1(...) __riscv_vle32ff_v_i32m1(__VA_ARGS__)
2267
#define vle32ff_v_i32m2(...) __riscv_vle32ff_v_i32m2(__VA_ARGS__)
2268
#define vle32ff_v_i32m4(...) __riscv_vle32ff_v_i32m4(__VA_ARGS__)
2269
#define vle32ff_v_i32m8(...) __riscv_vle32ff_v_i32m8(__VA_ARGS__)
2270
#define vle64ff_v_i64m1(...) __riscv_vle64ff_v_i64m1(__VA_ARGS__)
2271
#define vle64ff_v_i64m2(...) __riscv_vle64ff_v_i64m2(__VA_ARGS__)
2272
#define vle64ff_v_i64m4(...) __riscv_vle64ff_v_i64m4(__VA_ARGS__)
2273
#define vle64ff_v_i64m8(...) __riscv_vle64ff_v_i64m8(__VA_ARGS__)
2274
#define vle8ff_v_u8mf8(...) __riscv_vle8ff_v_u8mf8(__VA_ARGS__)
2275
#define vle8ff_v_u8mf4(...) __riscv_vle8ff_v_u8mf4(__VA_ARGS__)
2276
#define vle8ff_v_u8mf2(...) __riscv_vle8ff_v_u8mf2(__VA_ARGS__)
2277
#define vle8ff_v_u8m1(...) __riscv_vle8ff_v_u8m1(__VA_ARGS__)
2278
#define vle8ff_v_u8m2(...) __riscv_vle8ff_v_u8m2(__VA_ARGS__)
2279
#define vle8ff_v_u8m4(...) __riscv_vle8ff_v_u8m4(__VA_ARGS__)
2280
#define vle8ff_v_u8m8(...) __riscv_vle8ff_v_u8m8(__VA_ARGS__)
2281
#define vle16ff_v_u16mf4(...) __riscv_vle16ff_v_u16mf4(__VA_ARGS__)
2282
#define vle16ff_v_u16mf2(...) __riscv_vle16ff_v_u16mf2(__VA_ARGS__)
2283
#define vle16ff_v_u16m1(...) __riscv_vle16ff_v_u16m1(__VA_ARGS__)
2284
#define vle16ff_v_u16m2(...) __riscv_vle16ff_v_u16m2(__VA_ARGS__)
2285
#define vle16ff_v_u16m4(...) __riscv_vle16ff_v_u16m4(__VA_ARGS__)
2286
#define vle16ff_v_u16m8(...) __riscv_vle16ff_v_u16m8(__VA_ARGS__)
2287
#define vle32ff_v_u32mf2(...) __riscv_vle32ff_v_u32mf2(__VA_ARGS__)
2288
#define vle32ff_v_u32m1(...) __riscv_vle32ff_v_u32m1(__VA_ARGS__)
2289
#define vle32ff_v_u32m2(...) __riscv_vle32ff_v_u32m2(__VA_ARGS__)
2290
#define vle32ff_v_u32m4(...) __riscv_vle32ff_v_u32m4(__VA_ARGS__)
2291
#define vle32ff_v_u32m8(...) __riscv_vle32ff_v_u32m8(__VA_ARGS__)
2292
#define vle64ff_v_u64m1(...) __riscv_vle64ff_v_u64m1(__VA_ARGS__)
2293
#define vle64ff_v_u64m2(...) __riscv_vle64ff_v_u64m2(__VA_ARGS__)
2294
#define vle64ff_v_u64m4(...) __riscv_vle64ff_v_u64m4(__VA_ARGS__)
2295
#define vle64ff_v_u64m8(...) __riscv_vle64ff_v_u64m8(__VA_ARGS__)
2296
// masked functions
2297
#define vle16ff_v_f16mf4_m(...) __riscv_vle16ff_v_f16mf4_tumu(__VA_ARGS__)
2298
#define vle16ff_v_f16mf2_m(...) __riscv_vle16ff_v_f16mf2_tumu(__VA_ARGS__)
2299
#define vle16ff_v_f16m1_m(...) __riscv_vle16ff_v_f16m1_tumu(__VA_ARGS__)
2300
#define vle16ff_v_f16m2_m(...) __riscv_vle16ff_v_f16m2_tumu(__VA_ARGS__)
2301
#define vle16ff_v_f16m4_m(...) __riscv_vle16ff_v_f16m4_tumu(__VA_ARGS__)
2302
#define vle16ff_v_f16m8_m(...) __riscv_vle16ff_v_f16m8_tumu(__VA_ARGS__)
2303
#define vle32ff_v_f32mf2_m(...) __riscv_vle32ff_v_f32mf2_tumu(__VA_ARGS__)
2304
#define vle32ff_v_f32m1_m(...) __riscv_vle32ff_v_f32m1_tumu(__VA_ARGS__)
2305
#define vle32ff_v_f32m2_m(...) __riscv_vle32ff_v_f32m2_tumu(__VA_ARGS__)
2306
#define vle32ff_v_f32m4_m(...) __riscv_vle32ff_v_f32m4_tumu(__VA_ARGS__)
2307
#define vle32ff_v_f32m8_m(...) __riscv_vle32ff_v_f32m8_tumu(__VA_ARGS__)
2308
#define vle64ff_v_f64m1_m(...) __riscv_vle64ff_v_f64m1_tumu(__VA_ARGS__)
2309
#define vle64ff_v_f64m2_m(...) __riscv_vle64ff_v_f64m2_tumu(__VA_ARGS__)
2310
#define vle64ff_v_f64m4_m(...) __riscv_vle64ff_v_f64m4_tumu(__VA_ARGS__)
2311
#define vle64ff_v_f64m8_m(...) __riscv_vle64ff_v_f64m8_tumu(__VA_ARGS__)
2312
#define vle8ff_v_i8mf8_m(...) __riscv_vle8ff_v_i8mf8_tumu(__VA_ARGS__)
2313
#define vle8ff_v_i8mf4_m(...) __riscv_vle8ff_v_i8mf4_tumu(__VA_ARGS__)
2314
#define vle8ff_v_i8mf2_m(...) __riscv_vle8ff_v_i8mf2_tumu(__VA_ARGS__)
2315
#define vle8ff_v_i8m1_m(...) __riscv_vle8ff_v_i8m1_tumu(__VA_ARGS__)
2316
#define vle8ff_v_i8m2_m(...) __riscv_vle8ff_v_i8m2_tumu(__VA_ARGS__)
2317
#define vle8ff_v_i8m4_m(...) __riscv_vle8ff_v_i8m4_tumu(__VA_ARGS__)
2318
#define vle8ff_v_i8m8_m(...) __riscv_vle8ff_v_i8m8_tumu(__VA_ARGS__)
2319
#define vle16ff_v_i16mf4_m(...) __riscv_vle16ff_v_i16mf4_tumu(__VA_ARGS__)
2320
#define vle16ff_v_i16mf2_m(...) __riscv_vle16ff_v_i16mf2_tumu(__VA_ARGS__)
2321
#define vle16ff_v_i16m1_m(...) __riscv_vle16ff_v_i16m1_tumu(__VA_ARGS__)
2322
#define vle16ff_v_i16m2_m(...) __riscv_vle16ff_v_i16m2_tumu(__VA_ARGS__)
2323
#define vle16ff_v_i16m4_m(...) __riscv_vle16ff_v_i16m4_tumu(__VA_ARGS__)
2324
#define vle16ff_v_i16m8_m(...) __riscv_vle16ff_v_i16m8_tumu(__VA_ARGS__)
2325
#define vle32ff_v_i32mf2_m(...) __riscv_vle32ff_v_i32mf2_tumu(__VA_ARGS__)
2326
#define vle32ff_v_i32m1_m(...) __riscv_vle32ff_v_i32m1_tumu(__VA_ARGS__)
2327
#define vle32ff_v_i32m2_m(...) __riscv_vle32ff_v_i32m2_tumu(__VA_ARGS__)
2328
#define vle32ff_v_i32m4_m(...) __riscv_vle32ff_v_i32m4_tumu(__VA_ARGS__)
2329
#define vle32ff_v_i32m8_m(...) __riscv_vle32ff_v_i32m8_tumu(__VA_ARGS__)
2330
#define vle64ff_v_i64m1_m(...) __riscv_vle64ff_v_i64m1_tumu(__VA_ARGS__)
2331
#define vle64ff_v_i64m2_m(...) __riscv_vle64ff_v_i64m2_tumu(__VA_ARGS__)
2332
#define vle64ff_v_i64m4_m(...) __riscv_vle64ff_v_i64m4_tumu(__VA_ARGS__)
2333
#define vle64ff_v_i64m8_m(...) __riscv_vle64ff_v_i64m8_tumu(__VA_ARGS__)
2334
#define vle8ff_v_u8mf8_m(...) __riscv_vle8ff_v_u8mf8_tumu(__VA_ARGS__)
2335
#define vle8ff_v_u8mf4_m(...) __riscv_vle8ff_v_u8mf4_tumu(__VA_ARGS__)
2336
#define vle8ff_v_u8mf2_m(...) __riscv_vle8ff_v_u8mf2_tumu(__VA_ARGS__)
2337
#define vle8ff_v_u8m1_m(...) __riscv_vle8ff_v_u8m1_tumu(__VA_ARGS__)
2338
#define vle8ff_v_u8m2_m(...) __riscv_vle8ff_v_u8m2_tumu(__VA_ARGS__)
2339
#define vle8ff_v_u8m4_m(...) __riscv_vle8ff_v_u8m4_tumu(__VA_ARGS__)
2340
#define vle8ff_v_u8m8_m(...) __riscv_vle8ff_v_u8m8_tumu(__VA_ARGS__)
2341
#define vle16ff_v_u16mf4_m(...) __riscv_vle16ff_v_u16mf4_tumu(__VA_ARGS__)
2342
#define vle16ff_v_u16mf2_m(...) __riscv_vle16ff_v_u16mf2_tumu(__VA_ARGS__)
2343
#define vle16ff_v_u16m1_m(...) __riscv_vle16ff_v_u16m1_tumu(__VA_ARGS__)
2344
#define vle16ff_v_u16m2_m(...) __riscv_vle16ff_v_u16m2_tumu(__VA_ARGS__)
2345
#define vle16ff_v_u16m4_m(...) __riscv_vle16ff_v_u16m4_tumu(__VA_ARGS__)
2346
#define vle16ff_v_u16m8_m(...) __riscv_vle16ff_v_u16m8_tumu(__VA_ARGS__)
2347
#define vle32ff_v_u32mf2_m(...) __riscv_vle32ff_v_u32mf2_tumu(__VA_ARGS__)
2348
#define vle32ff_v_u32m1_m(...) __riscv_vle32ff_v_u32m1_tumu(__VA_ARGS__)
2349
#define vle32ff_v_u32m2_m(...) __riscv_vle32ff_v_u32m2_tumu(__VA_ARGS__)
2350
#define vle32ff_v_u32m4_m(...) __riscv_vle32ff_v_u32m4_tumu(__VA_ARGS__)
2351
#define vle32ff_v_u32m8_m(...) __riscv_vle32ff_v_u32m8_tumu(__VA_ARGS__)
2352
#define vle64ff_v_u64m1_m(...) __riscv_vle64ff_v_u64m1_tumu(__VA_ARGS__)
2353
#define vle64ff_v_u64m2_m(...) __riscv_vle64ff_v_u64m2_tumu(__VA_ARGS__)
2354
#define vle64ff_v_u64m4_m(...) __riscv_vle64ff_v_u64m4_tumu(__VA_ARGS__)
2355
#define vle64ff_v_u64m8_m(...) __riscv_vle64ff_v_u64m8_tumu(__VA_ARGS__)
2356
#define vlseg2e16_v_f16mf4(...) __riscv_vlseg2e16_v_f16mf4(__VA_ARGS__)
2357
#define vlseg3e16_v_f16mf4(...) __riscv_vlseg3e16_v_f16mf4(__VA_ARGS__)
2358
#define vlseg4e16_v_f16mf4(...) __riscv_vlseg4e16_v_f16mf4(__VA_ARGS__)
2359
#define vlseg5e16_v_f16mf4(...) __riscv_vlseg5e16_v_f16mf4(__VA_ARGS__)
2360
#define vlseg6e16_v_f16mf4(...) __riscv_vlseg6e16_v_f16mf4(__VA_ARGS__)
2361
#define vlseg7e16_v_f16mf4(...) __riscv_vlseg7e16_v_f16mf4(__VA_ARGS__)
2362
#define vlseg8e16_v_f16mf4(...) __riscv_vlseg8e16_v_f16mf4(__VA_ARGS__)
2363
#define vlseg2e16_v_f16mf2(...) __riscv_vlseg2e16_v_f16mf2(__VA_ARGS__)
2364
#define vlseg3e16_v_f16mf2(...) __riscv_vlseg3e16_v_f16mf2(__VA_ARGS__)
2365
#define vlseg4e16_v_f16mf2(...) __riscv_vlseg4e16_v_f16mf2(__VA_ARGS__)
2366
#define vlseg5e16_v_f16mf2(...) __riscv_vlseg5e16_v_f16mf2(__VA_ARGS__)
2367
#define vlseg6e16_v_f16mf2(...) __riscv_vlseg6e16_v_f16mf2(__VA_ARGS__)
2368
#define vlseg7e16_v_f16mf2(...) __riscv_vlseg7e16_v_f16mf2(__VA_ARGS__)
2369
#define vlseg8e16_v_f16mf2(...) __riscv_vlseg8e16_v_f16mf2(__VA_ARGS__)
2370
#define vlseg2e16_v_f16m1(...) __riscv_vlseg2e16_v_f16m1(__VA_ARGS__)
2371
#define vlseg3e16_v_f16m1(...) __riscv_vlseg3e16_v_f16m1(__VA_ARGS__)
2372
#define vlseg4e16_v_f16m1(...) __riscv_vlseg4e16_v_f16m1(__VA_ARGS__)
2373
#define vlseg5e16_v_f16m1(...) __riscv_vlseg5e16_v_f16m1(__VA_ARGS__)
2374
#define vlseg6e16_v_f16m1(...) __riscv_vlseg6e16_v_f16m1(__VA_ARGS__)
2375
#define vlseg7e16_v_f16m1(...) __riscv_vlseg7e16_v_f16m1(__VA_ARGS__)
2376
#define vlseg8e16_v_f16m1(...) __riscv_vlseg8e16_v_f16m1(__VA_ARGS__)
2377
#define vlseg2e16_v_f16m2(...) __riscv_vlseg2e16_v_f16m2(__VA_ARGS__)
2378
#define vlseg3e16_v_f16m2(...) __riscv_vlseg3e16_v_f16m2(__VA_ARGS__)
2379
#define vlseg4e16_v_f16m2(...) __riscv_vlseg4e16_v_f16m2(__VA_ARGS__)
2380
#define vlseg2e16_v_f16m4(...) __riscv_vlseg2e16_v_f16m4(__VA_ARGS__)
2381
#define vlseg2e32_v_f32mf2(...) __riscv_vlseg2e32_v_f32mf2(__VA_ARGS__)
2382
#define vlseg3e32_v_f32mf2(...) __riscv_vlseg3e32_v_f32mf2(__VA_ARGS__)
2383
#define vlseg4e32_v_f32mf2(...) __riscv_vlseg4e32_v_f32mf2(__VA_ARGS__)
2384
#define vlseg5e32_v_f32mf2(...) __riscv_vlseg5e32_v_f32mf2(__VA_ARGS__)
2385
#define vlseg6e32_v_f32mf2(...) __riscv_vlseg6e32_v_f32mf2(__VA_ARGS__)
2386
#define vlseg7e32_v_f32mf2(...) __riscv_vlseg7e32_v_f32mf2(__VA_ARGS__)
2387
#define vlseg8e32_v_f32mf2(...) __riscv_vlseg8e32_v_f32mf2(__VA_ARGS__)
2388
#define vlseg2e32_v_f32m1(...) __riscv_vlseg2e32_v_f32m1(__VA_ARGS__)
2389
#define vlseg3e32_v_f32m1(...) __riscv_vlseg3e32_v_f32m1(__VA_ARGS__)
2390
#define vlseg4e32_v_f32m1(...) __riscv_vlseg4e32_v_f32m1(__VA_ARGS__)
2391
#define vlseg5e32_v_f32m1(...) __riscv_vlseg5e32_v_f32m1(__VA_ARGS__)
2392
#define vlseg6e32_v_f32m1(...) __riscv_vlseg6e32_v_f32m1(__VA_ARGS__)
2393
#define vlseg7e32_v_f32m1(...) __riscv_vlseg7e32_v_f32m1(__VA_ARGS__)
2394
#define vlseg8e32_v_f32m1(...) __riscv_vlseg8e32_v_f32m1(__VA_ARGS__)
2395
#define vlseg2e32_v_f32m2(...) __riscv_vlseg2e32_v_f32m2(__VA_ARGS__)
2396
#define vlseg3e32_v_f32m2(...) __riscv_vlseg3e32_v_f32m2(__VA_ARGS__)
2397
#define vlseg4e32_v_f32m2(...) __riscv_vlseg4e32_v_f32m2(__VA_ARGS__)
2398
#define vlseg2e32_v_f32m4(...) __riscv_vlseg2e32_v_f32m4(__VA_ARGS__)
2399
#define vlseg2e64_v_f64m1(...) __riscv_vlseg2e64_v_f64m1(__VA_ARGS__)
2400
#define vlseg3e64_v_f64m1(...) __riscv_vlseg3e64_v_f64m1(__VA_ARGS__)
2401
#define vlseg4e64_v_f64m1(...) __riscv_vlseg4e64_v_f64m1(__VA_ARGS__)
2402
#define vlseg5e64_v_f64m1(...) __riscv_vlseg5e64_v_f64m1(__VA_ARGS__)
2403
#define vlseg6e64_v_f64m1(...) __riscv_vlseg6e64_v_f64m1(__VA_ARGS__)
2404
#define vlseg7e64_v_f64m1(...) __riscv_vlseg7e64_v_f64m1(__VA_ARGS__)
2405
#define vlseg8e64_v_f64m1(...) __riscv_vlseg8e64_v_f64m1(__VA_ARGS__)
2406
#define vlseg2e64_v_f64m2(...) __riscv_vlseg2e64_v_f64m2(__VA_ARGS__)
2407
#define vlseg3e64_v_f64m2(...) __riscv_vlseg3e64_v_f64m2(__VA_ARGS__)
2408
#define vlseg4e64_v_f64m2(...) __riscv_vlseg4e64_v_f64m2(__VA_ARGS__)
2409
#define vlseg2e64_v_f64m4(...) __riscv_vlseg2e64_v_f64m4(__VA_ARGS__)
2410
#define vlseg2e16ff_v_f16mf4(...) __riscv_vlseg2e16ff_v_f16mf4(__VA_ARGS__)
2411
#define vlseg3e16ff_v_f16mf4(...) __riscv_vlseg3e16ff_v_f16mf4(__VA_ARGS__)
2412
#define vlseg4e16ff_v_f16mf4(...) __riscv_vlseg4e16ff_v_f16mf4(__VA_ARGS__)
2413
#define vlseg5e16ff_v_f16mf4(...) __riscv_vlseg5e16ff_v_f16mf4(__VA_ARGS__)
2414
#define vlseg6e16ff_v_f16mf4(...) __riscv_vlseg6e16ff_v_f16mf4(__VA_ARGS__)
2415
#define vlseg7e16ff_v_f16mf4(...) __riscv_vlseg7e16ff_v_f16mf4(__VA_ARGS__)
2416
#define vlseg8e16ff_v_f16mf4(...) __riscv_vlseg8e16ff_v_f16mf4(__VA_ARGS__)
2417
#define vlseg2e16ff_v_f16mf2(...) __riscv_vlseg2e16ff_v_f16mf2(__VA_ARGS__)
2418
#define vlseg3e16ff_v_f16mf2(...) __riscv_vlseg3e16ff_v_f16mf2(__VA_ARGS__)
2419
#define vlseg4e16ff_v_f16mf2(...) __riscv_vlseg4e16ff_v_f16mf2(__VA_ARGS__)
2420
#define vlseg5e16ff_v_f16mf2(...) __riscv_vlseg5e16ff_v_f16mf2(__VA_ARGS__)
2421
#define vlseg6e16ff_v_f16mf2(...) __riscv_vlseg6e16ff_v_f16mf2(__VA_ARGS__)
2422
#define vlseg7e16ff_v_f16mf2(...) __riscv_vlseg7e16ff_v_f16mf2(__VA_ARGS__)
2423
#define vlseg8e16ff_v_f16mf2(...) __riscv_vlseg8e16ff_v_f16mf2(__VA_ARGS__)
2424
#define vlseg2e16ff_v_f16m1(...) __riscv_vlseg2e16ff_v_f16m1(__VA_ARGS__)
2425
#define vlseg3e16ff_v_f16m1(...) __riscv_vlseg3e16ff_v_f16m1(__VA_ARGS__)
2426
#define vlseg4e16ff_v_f16m1(...) __riscv_vlseg4e16ff_v_f16m1(__VA_ARGS__)
2427
#define vlseg5e16ff_v_f16m1(...) __riscv_vlseg5e16ff_v_f16m1(__VA_ARGS__)
2428
#define vlseg6e16ff_v_f16m1(...) __riscv_vlseg6e16ff_v_f16m1(__VA_ARGS__)
2429
#define vlseg7e16ff_v_f16m1(...) __riscv_vlseg7e16ff_v_f16m1(__VA_ARGS__)
2430
#define vlseg8e16ff_v_f16m1(...) __riscv_vlseg8e16ff_v_f16m1(__VA_ARGS__)
2431
#define vlseg2e16ff_v_f16m2(...) __riscv_vlseg2e16ff_v_f16m2(__VA_ARGS__)
2432
#define vlseg3e16ff_v_f16m2(...) __riscv_vlseg3e16ff_v_f16m2(__VA_ARGS__)
2433
#define vlseg4e16ff_v_f16m2(...) __riscv_vlseg4e16ff_v_f16m2(__VA_ARGS__)
2434
#define vlseg2e16ff_v_f16m4(...) __riscv_vlseg2e16ff_v_f16m4(__VA_ARGS__)
2435
#define vlseg2e32ff_v_f32mf2(...) __riscv_vlseg2e32ff_v_f32mf2(__VA_ARGS__)
2436
#define vlseg3e32ff_v_f32mf2(...) __riscv_vlseg3e32ff_v_f32mf2(__VA_ARGS__)
2437
#define vlseg4e32ff_v_f32mf2(...) __riscv_vlseg4e32ff_v_f32mf2(__VA_ARGS__)
2438
#define vlseg5e32ff_v_f32mf2(...) __riscv_vlseg5e32ff_v_f32mf2(__VA_ARGS__)
2439
#define vlseg6e32ff_v_f32mf2(...) __riscv_vlseg6e32ff_v_f32mf2(__VA_ARGS__)
2440
#define vlseg7e32ff_v_f32mf2(...) __riscv_vlseg7e32ff_v_f32mf2(__VA_ARGS__)
2441
#define vlseg8e32ff_v_f32mf2(...) __riscv_vlseg8e32ff_v_f32mf2(__VA_ARGS__)
2442
#define vlseg2e32ff_v_f32m1(...) __riscv_vlseg2e32ff_v_f32m1(__VA_ARGS__)
2443
#define vlseg3e32ff_v_f32m1(...) __riscv_vlseg3e32ff_v_f32m1(__VA_ARGS__)
2444
#define vlseg4e32ff_v_f32m1(...) __riscv_vlseg4e32ff_v_f32m1(__VA_ARGS__)
2445
#define vlseg5e32ff_v_f32m1(...) __riscv_vlseg5e32ff_v_f32m1(__VA_ARGS__)
2446
#define vlseg6e32ff_v_f32m1(...) __riscv_vlseg6e32ff_v_f32m1(__VA_ARGS__)
2447
#define vlseg7e32ff_v_f32m1(...) __riscv_vlseg7e32ff_v_f32m1(__VA_ARGS__)
2448
#define vlseg8e32ff_v_f32m1(...) __riscv_vlseg8e32ff_v_f32m1(__VA_ARGS__)
2449
#define vlseg2e32ff_v_f32m2(...) __riscv_vlseg2e32ff_v_f32m2(__VA_ARGS__)
2450
#define vlseg3e32ff_v_f32m2(...) __riscv_vlseg3e32ff_v_f32m2(__VA_ARGS__)
2451
#define vlseg4e32ff_v_f32m2(...) __riscv_vlseg4e32ff_v_f32m2(__VA_ARGS__)
2452
#define vlseg2e32ff_v_f32m4(...) __riscv_vlseg2e32ff_v_f32m4(__VA_ARGS__)
2453
#define vlseg2e64ff_v_f64m1(...) __riscv_vlseg2e64ff_v_f64m1(__VA_ARGS__)
2454
#define vlseg3e64ff_v_f64m1(...) __riscv_vlseg3e64ff_v_f64m1(__VA_ARGS__)
2455
#define vlseg4e64ff_v_f64m1(...) __riscv_vlseg4e64ff_v_f64m1(__VA_ARGS__)
2456
#define vlseg5e64ff_v_f64m1(...) __riscv_vlseg5e64ff_v_f64m1(__VA_ARGS__)
2457
#define vlseg6e64ff_v_f64m1(...) __riscv_vlseg6e64ff_v_f64m1(__VA_ARGS__)
2458
#define vlseg7e64ff_v_f64m1(...) __riscv_vlseg7e64ff_v_f64m1(__VA_ARGS__)
2459
#define vlseg8e64ff_v_f64m1(...) __riscv_vlseg8e64ff_v_f64m1(__VA_ARGS__)
2460
#define vlseg2e64ff_v_f64m2(...) __riscv_vlseg2e64ff_v_f64m2(__VA_ARGS__)
2461
#define vlseg3e64ff_v_f64m2(...) __riscv_vlseg3e64ff_v_f64m2(__VA_ARGS__)
2462
#define vlseg4e64ff_v_f64m2(...) __riscv_vlseg4e64ff_v_f64m2(__VA_ARGS__)
2463
#define vlseg2e64ff_v_f64m4(...) __riscv_vlseg2e64ff_v_f64m4(__VA_ARGS__)
2464
#define vlseg2e8_v_i8mf8(...) __riscv_vlseg2e8_v_i8mf8(__VA_ARGS__)
2465
#define vlseg3e8_v_i8mf8(...) __riscv_vlseg3e8_v_i8mf8(__VA_ARGS__)
2466
#define vlseg4e8_v_i8mf8(...) __riscv_vlseg4e8_v_i8mf8(__VA_ARGS__)
2467
#define vlseg5e8_v_i8mf8(...) __riscv_vlseg5e8_v_i8mf8(__VA_ARGS__)
2468
#define vlseg6e8_v_i8mf8(...) __riscv_vlseg6e8_v_i8mf8(__VA_ARGS__)
2469
#define vlseg7e8_v_i8mf8(...) __riscv_vlseg7e8_v_i8mf8(__VA_ARGS__)
2470
#define vlseg8e8_v_i8mf8(...) __riscv_vlseg8e8_v_i8mf8(__VA_ARGS__)
2471
#define vlseg2e8_v_i8mf4(...) __riscv_vlseg2e8_v_i8mf4(__VA_ARGS__)
2472
#define vlseg3e8_v_i8mf4(...) __riscv_vlseg3e8_v_i8mf4(__VA_ARGS__)
2473
#define vlseg4e8_v_i8mf4(...) __riscv_vlseg4e8_v_i8mf4(__VA_ARGS__)
2474
#define vlseg5e8_v_i8mf4(...) __riscv_vlseg5e8_v_i8mf4(__VA_ARGS__)
2475
#define vlseg6e8_v_i8mf4(...) __riscv_vlseg6e8_v_i8mf4(__VA_ARGS__)
2476
#define vlseg7e8_v_i8mf4(...) __riscv_vlseg7e8_v_i8mf4(__VA_ARGS__)
2477
#define vlseg8e8_v_i8mf4(...) __riscv_vlseg8e8_v_i8mf4(__VA_ARGS__)
2478
#define vlseg2e8_v_i8mf2(...) __riscv_vlseg2e8_v_i8mf2(__VA_ARGS__)
2479
#define vlseg3e8_v_i8mf2(...) __riscv_vlseg3e8_v_i8mf2(__VA_ARGS__)
2480
#define vlseg4e8_v_i8mf2(...) __riscv_vlseg4e8_v_i8mf2(__VA_ARGS__)
2481
#define vlseg5e8_v_i8mf2(...) __riscv_vlseg5e8_v_i8mf2(__VA_ARGS__)
2482
#define vlseg6e8_v_i8mf2(...) __riscv_vlseg6e8_v_i8mf2(__VA_ARGS__)
2483
#define vlseg7e8_v_i8mf2(...) __riscv_vlseg7e8_v_i8mf2(__VA_ARGS__)
2484
#define vlseg8e8_v_i8mf2(...) __riscv_vlseg8e8_v_i8mf2(__VA_ARGS__)
2485
#define vlseg2e8_v_i8m1(...) __riscv_vlseg2e8_v_i8m1(__VA_ARGS__)
2486
#define vlseg3e8_v_i8m1(...) __riscv_vlseg3e8_v_i8m1(__VA_ARGS__)
2487
#define vlseg4e8_v_i8m1(...) __riscv_vlseg4e8_v_i8m1(__VA_ARGS__)
2488
#define vlseg5e8_v_i8m1(...) __riscv_vlseg5e8_v_i8m1(__VA_ARGS__)
2489
#define vlseg6e8_v_i8m1(...) __riscv_vlseg6e8_v_i8m1(__VA_ARGS__)
2490
#define vlseg7e8_v_i8m1(...) __riscv_vlseg7e8_v_i8m1(__VA_ARGS__)
2491
#define vlseg8e8_v_i8m1(...) __riscv_vlseg8e8_v_i8m1(__VA_ARGS__)
2492
#define vlseg2e8_v_i8m2(...) __riscv_vlseg2e8_v_i8m2(__VA_ARGS__)
2493
#define vlseg3e8_v_i8m2(...) __riscv_vlseg3e8_v_i8m2(__VA_ARGS__)
2494
#define vlseg4e8_v_i8m2(...) __riscv_vlseg4e8_v_i8m2(__VA_ARGS__)
2495
#define vlseg2e8_v_i8m4(...) __riscv_vlseg2e8_v_i8m4(__VA_ARGS__)
2496
#define vlseg2e16_v_i16mf4(...) __riscv_vlseg2e16_v_i16mf4(__VA_ARGS__)
2497
#define vlseg3e16_v_i16mf4(...) __riscv_vlseg3e16_v_i16mf4(__VA_ARGS__)
2498
#define vlseg4e16_v_i16mf4(...) __riscv_vlseg4e16_v_i16mf4(__VA_ARGS__)
2499
#define vlseg5e16_v_i16mf4(...) __riscv_vlseg5e16_v_i16mf4(__VA_ARGS__)
2500
#define vlseg6e16_v_i16mf4(...) __riscv_vlseg6e16_v_i16mf4(__VA_ARGS__)
2501
#define vlseg7e16_v_i16mf4(...) __riscv_vlseg7e16_v_i16mf4(__VA_ARGS__)
2502
#define vlseg8e16_v_i16mf4(...) __riscv_vlseg8e16_v_i16mf4(__VA_ARGS__)
2503
#define vlseg2e16_v_i16mf2(...) __riscv_vlseg2e16_v_i16mf2(__VA_ARGS__)
2504
#define vlseg3e16_v_i16mf2(...) __riscv_vlseg3e16_v_i16mf2(__VA_ARGS__)
2505
#define vlseg4e16_v_i16mf2(...) __riscv_vlseg4e16_v_i16mf2(__VA_ARGS__)
2506
#define vlseg5e16_v_i16mf2(...) __riscv_vlseg5e16_v_i16mf2(__VA_ARGS__)
2507
#define vlseg6e16_v_i16mf2(...) __riscv_vlseg6e16_v_i16mf2(__VA_ARGS__)
2508
#define vlseg7e16_v_i16mf2(...) __riscv_vlseg7e16_v_i16mf2(__VA_ARGS__)
2509
#define vlseg8e16_v_i16mf2(...) __riscv_vlseg8e16_v_i16mf2(__VA_ARGS__)
2510
#define vlseg2e16_v_i16m1(...) __riscv_vlseg2e16_v_i16m1(__VA_ARGS__)
2511
#define vlseg3e16_v_i16m1(...) __riscv_vlseg3e16_v_i16m1(__VA_ARGS__)
2512
#define vlseg4e16_v_i16m1(...) __riscv_vlseg4e16_v_i16m1(__VA_ARGS__)
2513
#define vlseg5e16_v_i16m1(...) __riscv_vlseg5e16_v_i16m1(__VA_ARGS__)
2514
#define vlseg6e16_v_i16m1(...) __riscv_vlseg6e16_v_i16m1(__VA_ARGS__)
2515
#define vlseg7e16_v_i16m1(...) __riscv_vlseg7e16_v_i16m1(__VA_ARGS__)
2516
#define vlseg8e16_v_i16m1(...) __riscv_vlseg8e16_v_i16m1(__VA_ARGS__)
2517
#define vlseg2e16_v_i16m2(...) __riscv_vlseg2e16_v_i16m2(__VA_ARGS__)
2518
#define vlseg3e16_v_i16m2(...) __riscv_vlseg3e16_v_i16m2(__VA_ARGS__)
2519
#define vlseg4e16_v_i16m2(...) __riscv_vlseg4e16_v_i16m2(__VA_ARGS__)
2520
#define vlseg2e16_v_i16m4(...) __riscv_vlseg2e16_v_i16m4(__VA_ARGS__)
2521
#define vlseg2e32_v_i32mf2(...) __riscv_vlseg2e32_v_i32mf2(__VA_ARGS__)
2522
#define vlseg3e32_v_i32mf2(...) __riscv_vlseg3e32_v_i32mf2(__VA_ARGS__)
2523
#define vlseg4e32_v_i32mf2(...) __riscv_vlseg4e32_v_i32mf2(__VA_ARGS__)
2524
#define vlseg5e32_v_i32mf2(...) __riscv_vlseg5e32_v_i32mf2(__VA_ARGS__)
2525
#define vlseg6e32_v_i32mf2(...) __riscv_vlseg6e32_v_i32mf2(__VA_ARGS__)
2526
#define vlseg7e32_v_i32mf2(...) __riscv_vlseg7e32_v_i32mf2(__VA_ARGS__)
2527
#define vlseg8e32_v_i32mf2(...) __riscv_vlseg8e32_v_i32mf2(__VA_ARGS__)
2528
#define vlseg2e32_v_i32m1(...) __riscv_vlseg2e32_v_i32m1(__VA_ARGS__)
2529
#define vlseg3e32_v_i32m1(...) __riscv_vlseg3e32_v_i32m1(__VA_ARGS__)
2530
#define vlseg4e32_v_i32m1(...) __riscv_vlseg4e32_v_i32m1(__VA_ARGS__)
2531
#define vlseg5e32_v_i32m1(...) __riscv_vlseg5e32_v_i32m1(__VA_ARGS__)
2532
#define vlseg6e32_v_i32m1(...) __riscv_vlseg6e32_v_i32m1(__VA_ARGS__)
2533
#define vlseg7e32_v_i32m1(...) __riscv_vlseg7e32_v_i32m1(__VA_ARGS__)
2534
#define vlseg8e32_v_i32m1(...) __riscv_vlseg8e32_v_i32m1(__VA_ARGS__)
2535
#define vlseg2e32_v_i32m2(...) __riscv_vlseg2e32_v_i32m2(__VA_ARGS__)
2536
#define vlseg3e32_v_i32m2(...) __riscv_vlseg3e32_v_i32m2(__VA_ARGS__)
2537
#define vlseg4e32_v_i32m2(...) __riscv_vlseg4e32_v_i32m2(__VA_ARGS__)
2538
#define vlseg2e32_v_i32m4(...) __riscv_vlseg2e32_v_i32m4(__VA_ARGS__)
2539
#define vlseg2e64_v_i64m1(...) __riscv_vlseg2e64_v_i64m1(__VA_ARGS__)
2540
#define vlseg3e64_v_i64m1(...) __riscv_vlseg3e64_v_i64m1(__VA_ARGS__)
2541
#define vlseg4e64_v_i64m1(...) __riscv_vlseg4e64_v_i64m1(__VA_ARGS__)
2542
#define vlseg5e64_v_i64m1(...) __riscv_vlseg5e64_v_i64m1(__VA_ARGS__)
2543
#define vlseg6e64_v_i64m1(...) __riscv_vlseg6e64_v_i64m1(__VA_ARGS__)
2544
#define vlseg7e64_v_i64m1(...) __riscv_vlseg7e64_v_i64m1(__VA_ARGS__)
2545
#define vlseg8e64_v_i64m1(...) __riscv_vlseg8e64_v_i64m1(__VA_ARGS__)
2546
#define vlseg2e64_v_i64m2(...) __riscv_vlseg2e64_v_i64m2(__VA_ARGS__)
2547
#define vlseg3e64_v_i64m2(...) __riscv_vlseg3e64_v_i64m2(__VA_ARGS__)
2548
#define vlseg4e64_v_i64m2(...) __riscv_vlseg4e64_v_i64m2(__VA_ARGS__)
2549
#define vlseg2e64_v_i64m4(...) __riscv_vlseg2e64_v_i64m4(__VA_ARGS__)
2550
#define vlseg2e8ff_v_i8mf8(...) __riscv_vlseg2e8ff_v_i8mf8(__VA_ARGS__)
2551
#define vlseg3e8ff_v_i8mf8(...) __riscv_vlseg3e8ff_v_i8mf8(__VA_ARGS__)
2552
#define vlseg4e8ff_v_i8mf8(...) __riscv_vlseg4e8ff_v_i8mf8(__VA_ARGS__)
2553
#define vlseg5e8ff_v_i8mf8(...) __riscv_vlseg5e8ff_v_i8mf8(__VA_ARGS__)
2554
#define vlseg6e8ff_v_i8mf8(...) __riscv_vlseg6e8ff_v_i8mf8(__VA_ARGS__)
2555
#define vlseg7e8ff_v_i8mf8(...) __riscv_vlseg7e8ff_v_i8mf8(__VA_ARGS__)
2556
#define vlseg8e8ff_v_i8mf8(...) __riscv_vlseg8e8ff_v_i8mf8(__VA_ARGS__)
2557
#define vlseg2e8ff_v_i8mf4(...) __riscv_vlseg2e8ff_v_i8mf4(__VA_ARGS__)
2558
#define vlseg3e8ff_v_i8mf4(...) __riscv_vlseg3e8ff_v_i8mf4(__VA_ARGS__)
2559
#define vlseg4e8ff_v_i8mf4(...) __riscv_vlseg4e8ff_v_i8mf4(__VA_ARGS__)
2560
#define vlseg5e8ff_v_i8mf4(...) __riscv_vlseg5e8ff_v_i8mf4(__VA_ARGS__)
2561
#define vlseg6e8ff_v_i8mf4(...) __riscv_vlseg6e8ff_v_i8mf4(__VA_ARGS__)
2562
#define vlseg7e8ff_v_i8mf4(...) __riscv_vlseg7e8ff_v_i8mf4(__VA_ARGS__)
2563
#define vlseg8e8ff_v_i8mf4(...) __riscv_vlseg8e8ff_v_i8mf4(__VA_ARGS__)
2564
#define vlseg2e8ff_v_i8mf2(...) __riscv_vlseg2e8ff_v_i8mf2(__VA_ARGS__)
2565
#define vlseg3e8ff_v_i8mf2(...) __riscv_vlseg3e8ff_v_i8mf2(__VA_ARGS__)
2566
#define vlseg4e8ff_v_i8mf2(...) __riscv_vlseg4e8ff_v_i8mf2(__VA_ARGS__)
2567
#define vlseg5e8ff_v_i8mf2(...) __riscv_vlseg5e8ff_v_i8mf2(__VA_ARGS__)
2568
#define vlseg6e8ff_v_i8mf2(...) __riscv_vlseg6e8ff_v_i8mf2(__VA_ARGS__)
2569
#define vlseg7e8ff_v_i8mf2(...) __riscv_vlseg7e8ff_v_i8mf2(__VA_ARGS__)
2570
#define vlseg8e8ff_v_i8mf2(...) __riscv_vlseg8e8ff_v_i8mf2(__VA_ARGS__)
2571
#define vlseg2e8ff_v_i8m1(...) __riscv_vlseg2e8ff_v_i8m1(__VA_ARGS__)
2572
#define vlseg3e8ff_v_i8m1(...) __riscv_vlseg3e8ff_v_i8m1(__VA_ARGS__)
2573
#define vlseg4e8ff_v_i8m1(...) __riscv_vlseg4e8ff_v_i8m1(__VA_ARGS__)
2574
#define vlseg5e8ff_v_i8m1(...) __riscv_vlseg5e8ff_v_i8m1(__VA_ARGS__)
2575
#define vlseg6e8ff_v_i8m1(...) __riscv_vlseg6e8ff_v_i8m1(__VA_ARGS__)
2576
#define vlseg7e8ff_v_i8m1(...) __riscv_vlseg7e8ff_v_i8m1(__VA_ARGS__)
2577
#define vlseg8e8ff_v_i8m1(...) __riscv_vlseg8e8ff_v_i8m1(__VA_ARGS__)
2578
#define vlseg2e8ff_v_i8m2(...) __riscv_vlseg2e8ff_v_i8m2(__VA_ARGS__)
2579
#define vlseg3e8ff_v_i8m2(...) __riscv_vlseg3e8ff_v_i8m2(__VA_ARGS__)
2580
#define vlseg4e8ff_v_i8m2(...) __riscv_vlseg4e8ff_v_i8m2(__VA_ARGS__)
2581
#define vlseg2e8ff_v_i8m4(...) __riscv_vlseg2e8ff_v_i8m4(__VA_ARGS__)
2582
#define vlseg2e16ff_v_i16mf4(...) __riscv_vlseg2e16ff_v_i16mf4(__VA_ARGS__)
2583
#define vlseg3e16ff_v_i16mf4(...) __riscv_vlseg3e16ff_v_i16mf4(__VA_ARGS__)
2584
#define vlseg4e16ff_v_i16mf4(...) __riscv_vlseg4e16ff_v_i16mf4(__VA_ARGS__)
2585
#define vlseg5e16ff_v_i16mf4(...) __riscv_vlseg5e16ff_v_i16mf4(__VA_ARGS__)
2586
#define vlseg6e16ff_v_i16mf4(...) __riscv_vlseg6e16ff_v_i16mf4(__VA_ARGS__)
2587
#define vlseg7e16ff_v_i16mf4(...) __riscv_vlseg7e16ff_v_i16mf4(__VA_ARGS__)
2588
#define vlseg8e16ff_v_i16mf4(...) __riscv_vlseg8e16ff_v_i16mf4(__VA_ARGS__)
2589
#define vlseg2e16ff_v_i16mf2(...) __riscv_vlseg2e16ff_v_i16mf2(__VA_ARGS__)
2590
#define vlseg3e16ff_v_i16mf2(...) __riscv_vlseg3e16ff_v_i16mf2(__VA_ARGS__)
2591
#define vlseg4e16ff_v_i16mf2(...) __riscv_vlseg4e16ff_v_i16mf2(__VA_ARGS__)
2592
#define vlseg5e16ff_v_i16mf2(...) __riscv_vlseg5e16ff_v_i16mf2(__VA_ARGS__)
2593
#define vlseg6e16ff_v_i16mf2(...) __riscv_vlseg6e16ff_v_i16mf2(__VA_ARGS__)
2594
#define vlseg7e16ff_v_i16mf2(...) __riscv_vlseg7e16ff_v_i16mf2(__VA_ARGS__)
2595
#define vlseg8e16ff_v_i16mf2(...) __riscv_vlseg8e16ff_v_i16mf2(__VA_ARGS__)
2596
#define vlseg2e16ff_v_i16m1(...) __riscv_vlseg2e16ff_v_i16m1(__VA_ARGS__)
2597
#define vlseg3e16ff_v_i16m1(...) __riscv_vlseg3e16ff_v_i16m1(__VA_ARGS__)
2598
#define vlseg4e16ff_v_i16m1(...) __riscv_vlseg4e16ff_v_i16m1(__VA_ARGS__)
2599
#define vlseg5e16ff_v_i16m1(...) __riscv_vlseg5e16ff_v_i16m1(__VA_ARGS__)
2600
#define vlseg6e16ff_v_i16m1(...) __riscv_vlseg6e16ff_v_i16m1(__VA_ARGS__)
2601
#define vlseg7e16ff_v_i16m1(...) __riscv_vlseg7e16ff_v_i16m1(__VA_ARGS__)
2602
#define vlseg8e16ff_v_i16m1(...) __riscv_vlseg8e16ff_v_i16m1(__VA_ARGS__)
2603
#define vlseg2e16ff_v_i16m2(...) __riscv_vlseg2e16ff_v_i16m2(__VA_ARGS__)
2604
#define vlseg3e16ff_v_i16m2(...) __riscv_vlseg3e16ff_v_i16m2(__VA_ARGS__)
2605
#define vlseg4e16ff_v_i16m2(...) __riscv_vlseg4e16ff_v_i16m2(__VA_ARGS__)
2606
#define vlseg2e16ff_v_i16m4(...) __riscv_vlseg2e16ff_v_i16m4(__VA_ARGS__)
2607
#define vlseg2e32ff_v_i32mf2(...) __riscv_vlseg2e32ff_v_i32mf2(__VA_ARGS__)
2608
#define vlseg3e32ff_v_i32mf2(...) __riscv_vlseg3e32ff_v_i32mf2(__VA_ARGS__)
2609
#define vlseg4e32ff_v_i32mf2(...) __riscv_vlseg4e32ff_v_i32mf2(__VA_ARGS__)
2610
#define vlseg5e32ff_v_i32mf2(...) __riscv_vlseg5e32ff_v_i32mf2(__VA_ARGS__)
2611
#define vlseg6e32ff_v_i32mf2(...) __riscv_vlseg6e32ff_v_i32mf2(__VA_ARGS__)
2612
#define vlseg7e32ff_v_i32mf2(...) __riscv_vlseg7e32ff_v_i32mf2(__VA_ARGS__)
2613
#define vlseg8e32ff_v_i32mf2(...) __riscv_vlseg8e32ff_v_i32mf2(__VA_ARGS__)
2614
#define vlseg2e32ff_v_i32m1(...) __riscv_vlseg2e32ff_v_i32m1(__VA_ARGS__)
2615
#define vlseg3e32ff_v_i32m1(...) __riscv_vlseg3e32ff_v_i32m1(__VA_ARGS__)
2616
#define vlseg4e32ff_v_i32m1(...) __riscv_vlseg4e32ff_v_i32m1(__VA_ARGS__)
2617
#define vlseg5e32ff_v_i32m1(...) __riscv_vlseg5e32ff_v_i32m1(__VA_ARGS__)
2618
#define vlseg6e32ff_v_i32m1(...) __riscv_vlseg6e32ff_v_i32m1(__VA_ARGS__)
2619
#define vlseg7e32ff_v_i32m1(...) __riscv_vlseg7e32ff_v_i32m1(__VA_ARGS__)
2620
#define vlseg8e32ff_v_i32m1(...) __riscv_vlseg8e32ff_v_i32m1(__VA_ARGS__)
2621
#define vlseg2e32ff_v_i32m2(...) __riscv_vlseg2e32ff_v_i32m2(__VA_ARGS__)
2622
#define vlseg3e32ff_v_i32m2(...) __riscv_vlseg3e32ff_v_i32m2(__VA_ARGS__)
2623
#define vlseg4e32ff_v_i32m2(...) __riscv_vlseg4e32ff_v_i32m2(__VA_ARGS__)
2624
#define vlseg2e32ff_v_i32m4(...) __riscv_vlseg2e32ff_v_i32m4(__VA_ARGS__)
2625
#define vlseg2e64ff_v_i64m1(...) __riscv_vlseg2e64ff_v_i64m1(__VA_ARGS__)
2626
#define vlseg3e64ff_v_i64m1(...) __riscv_vlseg3e64ff_v_i64m1(__VA_ARGS__)
2627
#define vlseg4e64ff_v_i64m1(...) __riscv_vlseg4e64ff_v_i64m1(__VA_ARGS__)
2628
#define vlseg5e64ff_v_i64m1(...) __riscv_vlseg5e64ff_v_i64m1(__VA_ARGS__)
2629
#define vlseg6e64ff_v_i64m1(...) __riscv_vlseg6e64ff_v_i64m1(__VA_ARGS__)
2630
#define vlseg7e64ff_v_i64m1(...) __riscv_vlseg7e64ff_v_i64m1(__VA_ARGS__)
2631
#define vlseg8e64ff_v_i64m1(...) __riscv_vlseg8e64ff_v_i64m1(__VA_ARGS__)
2632
#define vlseg2e64ff_v_i64m2(...) __riscv_vlseg2e64ff_v_i64m2(__VA_ARGS__)
2633
#define vlseg3e64ff_v_i64m2(...) __riscv_vlseg3e64ff_v_i64m2(__VA_ARGS__)
2634
#define vlseg4e64ff_v_i64m2(...) __riscv_vlseg4e64ff_v_i64m2(__VA_ARGS__)
2635
#define vlseg2e64ff_v_i64m4(...) __riscv_vlseg2e64ff_v_i64m4(__VA_ARGS__)
2636
#define vlseg2e8_v_u8mf8(...) __riscv_vlseg2e8_v_u8mf8(__VA_ARGS__)
2637
#define vlseg3e8_v_u8mf8(...) __riscv_vlseg3e8_v_u8mf8(__VA_ARGS__)
2638
#define vlseg4e8_v_u8mf8(...) __riscv_vlseg4e8_v_u8mf8(__VA_ARGS__)
2639
#define vlseg5e8_v_u8mf8(...) __riscv_vlseg5e8_v_u8mf8(__VA_ARGS__)
2640
#define vlseg6e8_v_u8mf8(...) __riscv_vlseg6e8_v_u8mf8(__VA_ARGS__)
2641
#define vlseg7e8_v_u8mf8(...) __riscv_vlseg7e8_v_u8mf8(__VA_ARGS__)
2642
#define vlseg8e8_v_u8mf8(...) __riscv_vlseg8e8_v_u8mf8(__VA_ARGS__)
2643
#define vlseg2e8_v_u8mf4(...) __riscv_vlseg2e8_v_u8mf4(__VA_ARGS__)
2644
#define vlseg3e8_v_u8mf4(...) __riscv_vlseg3e8_v_u8mf4(__VA_ARGS__)
2645
#define vlseg4e8_v_u8mf4(...) __riscv_vlseg4e8_v_u8mf4(__VA_ARGS__)
2646
#define vlseg5e8_v_u8mf4(...) __riscv_vlseg5e8_v_u8mf4(__VA_ARGS__)
2647
#define vlseg6e8_v_u8mf4(...) __riscv_vlseg6e8_v_u8mf4(__VA_ARGS__)
2648
#define vlseg7e8_v_u8mf4(...) __riscv_vlseg7e8_v_u8mf4(__VA_ARGS__)
2649
#define vlseg8e8_v_u8mf4(...) __riscv_vlseg8e8_v_u8mf4(__VA_ARGS__)
2650
#define vlseg2e8_v_u8mf2(...) __riscv_vlseg2e8_v_u8mf2(__VA_ARGS__)
2651
#define vlseg3e8_v_u8mf2(...) __riscv_vlseg3e8_v_u8mf2(__VA_ARGS__)
2652
#define vlseg4e8_v_u8mf2(...) __riscv_vlseg4e8_v_u8mf2(__VA_ARGS__)
2653
#define vlseg5e8_v_u8mf2(...) __riscv_vlseg5e8_v_u8mf2(__VA_ARGS__)
2654
#define vlseg6e8_v_u8mf2(...) __riscv_vlseg6e8_v_u8mf2(__VA_ARGS__)
2655
#define vlseg7e8_v_u8mf2(...) __riscv_vlseg7e8_v_u8mf2(__VA_ARGS__)
2656
#define vlseg8e8_v_u8mf2(...) __riscv_vlseg8e8_v_u8mf2(__VA_ARGS__)
2657
#define vlseg2e8_v_u8m1(...) __riscv_vlseg2e8_v_u8m1(__VA_ARGS__)
2658
#define vlseg3e8_v_u8m1(...) __riscv_vlseg3e8_v_u8m1(__VA_ARGS__)
2659
#define vlseg4e8_v_u8m1(...) __riscv_vlseg4e8_v_u8m1(__VA_ARGS__)
2660
#define vlseg5e8_v_u8m1(...) __riscv_vlseg5e8_v_u8m1(__VA_ARGS__)
2661
#define vlseg6e8_v_u8m1(...) __riscv_vlseg6e8_v_u8m1(__VA_ARGS__)
2662
#define vlseg7e8_v_u8m1(...) __riscv_vlseg7e8_v_u8m1(__VA_ARGS__)
2663
#define vlseg8e8_v_u8m1(...) __riscv_vlseg8e8_v_u8m1(__VA_ARGS__)
2664
#define vlseg2e8_v_u8m2(...) __riscv_vlseg2e8_v_u8m2(__VA_ARGS__)
2665
#define vlseg3e8_v_u8m2(...) __riscv_vlseg3e8_v_u8m2(__VA_ARGS__)
2666
#define vlseg4e8_v_u8m2(...) __riscv_vlseg4e8_v_u8m2(__VA_ARGS__)
2667
#define vlseg2e8_v_u8m4(...) __riscv_vlseg2e8_v_u8m4(__VA_ARGS__)
2668
#define vlseg2e16_v_u16mf4(...) __riscv_vlseg2e16_v_u16mf4(__VA_ARGS__)
2669
#define vlseg3e16_v_u16mf4(...) __riscv_vlseg3e16_v_u16mf4(__VA_ARGS__)
2670
#define vlseg4e16_v_u16mf4(...) __riscv_vlseg4e16_v_u16mf4(__VA_ARGS__)
2671
#define vlseg5e16_v_u16mf4(...) __riscv_vlseg5e16_v_u16mf4(__VA_ARGS__)
2672
#define vlseg6e16_v_u16mf4(...) __riscv_vlseg6e16_v_u16mf4(__VA_ARGS__)
2673
#define vlseg7e16_v_u16mf4(...) __riscv_vlseg7e16_v_u16mf4(__VA_ARGS__)
2674
#define vlseg8e16_v_u16mf4(...) __riscv_vlseg8e16_v_u16mf4(__VA_ARGS__)
2675
#define vlseg2e16_v_u16mf2(...) __riscv_vlseg2e16_v_u16mf2(__VA_ARGS__)
2676
#define vlseg3e16_v_u16mf2(...) __riscv_vlseg3e16_v_u16mf2(__VA_ARGS__)
2677
#define vlseg4e16_v_u16mf2(...) __riscv_vlseg4e16_v_u16mf2(__VA_ARGS__)
2678
#define vlseg5e16_v_u16mf2(...) __riscv_vlseg5e16_v_u16mf2(__VA_ARGS__)
2679
#define vlseg6e16_v_u16mf2(...) __riscv_vlseg6e16_v_u16mf2(__VA_ARGS__)
2680
#define vlseg7e16_v_u16mf2(...) __riscv_vlseg7e16_v_u16mf2(__VA_ARGS__)
2681
#define vlseg8e16_v_u16mf2(...) __riscv_vlseg8e16_v_u16mf2(__VA_ARGS__)
2682
#define vlseg2e16_v_u16m1(...) __riscv_vlseg2e16_v_u16m1(__VA_ARGS__)
2683
#define vlseg3e16_v_u16m1(...) __riscv_vlseg3e16_v_u16m1(__VA_ARGS__)
2684
#define vlseg4e16_v_u16m1(...) __riscv_vlseg4e16_v_u16m1(__VA_ARGS__)
2685
#define vlseg5e16_v_u16m1(...) __riscv_vlseg5e16_v_u16m1(__VA_ARGS__)
2686
#define vlseg6e16_v_u16m1(...) __riscv_vlseg6e16_v_u16m1(__VA_ARGS__)
2687
#define vlseg7e16_v_u16m1(...) __riscv_vlseg7e16_v_u16m1(__VA_ARGS__)
2688
#define vlseg8e16_v_u16m1(...) __riscv_vlseg8e16_v_u16m1(__VA_ARGS__)
2689
#define vlseg2e16_v_u16m2(...) __riscv_vlseg2e16_v_u16m2(__VA_ARGS__)
2690
#define vlseg3e16_v_u16m2(...) __riscv_vlseg3e16_v_u16m2(__VA_ARGS__)
2691
#define vlseg4e16_v_u16m2(...) __riscv_vlseg4e16_v_u16m2(__VA_ARGS__)
2692
#define vlseg2e16_v_u16m4(...) __riscv_vlseg2e16_v_u16m4(__VA_ARGS__)
2693
#define vlseg2e32_v_u32mf2(...) __riscv_vlseg2e32_v_u32mf2(__VA_ARGS__)
2694
#define vlseg3e32_v_u32mf2(...) __riscv_vlseg3e32_v_u32mf2(__VA_ARGS__)
2695
#define vlseg4e32_v_u32mf2(...) __riscv_vlseg4e32_v_u32mf2(__VA_ARGS__)
2696
#define vlseg5e32_v_u32mf2(...) __riscv_vlseg5e32_v_u32mf2(__VA_ARGS__)
2697
#define vlseg6e32_v_u32mf2(...) __riscv_vlseg6e32_v_u32mf2(__VA_ARGS__)
2698
#define vlseg7e32_v_u32mf2(...) __riscv_vlseg7e32_v_u32mf2(__VA_ARGS__)
2699
#define vlseg8e32_v_u32mf2(...) __riscv_vlseg8e32_v_u32mf2(__VA_ARGS__)
2700
#define vlseg2e32_v_u32m1(...) __riscv_vlseg2e32_v_u32m1(__VA_ARGS__)
2701
#define vlseg3e32_v_u32m1(...) __riscv_vlseg3e32_v_u32m1(__VA_ARGS__)
2702
#define vlseg4e32_v_u32m1(...) __riscv_vlseg4e32_v_u32m1(__VA_ARGS__)
2703
#define vlseg5e32_v_u32m1(...) __riscv_vlseg5e32_v_u32m1(__VA_ARGS__)
2704
#define vlseg6e32_v_u32m1(...) __riscv_vlseg6e32_v_u32m1(__VA_ARGS__)
2705
#define vlseg7e32_v_u32m1(...) __riscv_vlseg7e32_v_u32m1(__VA_ARGS__)
2706
#define vlseg8e32_v_u32m1(...) __riscv_vlseg8e32_v_u32m1(__VA_ARGS__)
2707
#define vlseg2e32_v_u32m2(...) __riscv_vlseg2e32_v_u32m2(__VA_ARGS__)
2708
#define vlseg3e32_v_u32m2(...) __riscv_vlseg3e32_v_u32m2(__VA_ARGS__)
2709
#define vlseg4e32_v_u32m2(...) __riscv_vlseg4e32_v_u32m2(__VA_ARGS__)
2710
#define vlseg2e32_v_u32m4(...) __riscv_vlseg2e32_v_u32m4(__VA_ARGS__)
2711
#define vlseg2e64_v_u64m1(...) __riscv_vlseg2e64_v_u64m1(__VA_ARGS__)
2712
#define vlseg3e64_v_u64m1(...) __riscv_vlseg3e64_v_u64m1(__VA_ARGS__)
2713
#define vlseg4e64_v_u64m1(...) __riscv_vlseg4e64_v_u64m1(__VA_ARGS__)
2714
#define vlseg5e64_v_u64m1(...) __riscv_vlseg5e64_v_u64m1(__VA_ARGS__)
2715
#define vlseg6e64_v_u64m1(...) __riscv_vlseg6e64_v_u64m1(__VA_ARGS__)
2716
#define vlseg7e64_v_u64m1(...) __riscv_vlseg7e64_v_u64m1(__VA_ARGS__)
2717
#define vlseg8e64_v_u64m1(...) __riscv_vlseg8e64_v_u64m1(__VA_ARGS__)
2718
#define vlseg2e64_v_u64m2(...) __riscv_vlseg2e64_v_u64m2(__VA_ARGS__)
2719
#define vlseg3e64_v_u64m2(...) __riscv_vlseg3e64_v_u64m2(__VA_ARGS__)
2720
#define vlseg4e64_v_u64m2(...) __riscv_vlseg4e64_v_u64m2(__VA_ARGS__)
2721
#define vlseg2e64_v_u64m4(...) __riscv_vlseg2e64_v_u64m4(__VA_ARGS__)
2722
#define vlseg2e8ff_v_u8mf8(...) __riscv_vlseg2e8ff_v_u8mf8(__VA_ARGS__)
2723
#define vlseg3e8ff_v_u8mf8(...) __riscv_vlseg3e8ff_v_u8mf8(__VA_ARGS__)
2724
#define vlseg4e8ff_v_u8mf8(...) __riscv_vlseg4e8ff_v_u8mf8(__VA_ARGS__)
2725
#define vlseg5e8ff_v_u8mf8(...) __riscv_vlseg5e8ff_v_u8mf8(__VA_ARGS__)
2726
#define vlseg6e8ff_v_u8mf8(...) __riscv_vlseg6e8ff_v_u8mf8(__VA_ARGS__)
2727
#define vlseg7e8ff_v_u8mf8(...) __riscv_vlseg7e8ff_v_u8mf8(__VA_ARGS__)
2728
#define vlseg8e8ff_v_u8mf8(...) __riscv_vlseg8e8ff_v_u8mf8(__VA_ARGS__)
2729
#define vlseg2e8ff_v_u8mf4(...) __riscv_vlseg2e8ff_v_u8mf4(__VA_ARGS__)
2730
#define vlseg3e8ff_v_u8mf4(...) __riscv_vlseg3e8ff_v_u8mf4(__VA_ARGS__)
2731
#define vlseg4e8ff_v_u8mf4(...) __riscv_vlseg4e8ff_v_u8mf4(__VA_ARGS__)
2732
#define vlseg5e8ff_v_u8mf4(...) __riscv_vlseg5e8ff_v_u8mf4(__VA_ARGS__)
2733
#define vlseg6e8ff_v_u8mf4(...) __riscv_vlseg6e8ff_v_u8mf4(__VA_ARGS__)
2734
#define vlseg7e8ff_v_u8mf4(...) __riscv_vlseg7e8ff_v_u8mf4(__VA_ARGS__)
2735
#define vlseg8e8ff_v_u8mf4(...) __riscv_vlseg8e8ff_v_u8mf4(__VA_ARGS__)
2736
#define vlseg2e8ff_v_u8mf2(...) __riscv_vlseg2e8ff_v_u8mf2(__VA_ARGS__)
2737
#define vlseg3e8ff_v_u8mf2(...) __riscv_vlseg3e8ff_v_u8mf2(__VA_ARGS__)
2738
#define vlseg4e8ff_v_u8mf2(...) __riscv_vlseg4e8ff_v_u8mf2(__VA_ARGS__)
2739
#define vlseg5e8ff_v_u8mf2(...) __riscv_vlseg5e8ff_v_u8mf2(__VA_ARGS__)
2740
#define vlseg6e8ff_v_u8mf2(...) __riscv_vlseg6e8ff_v_u8mf2(__VA_ARGS__)
2741
#define vlseg7e8ff_v_u8mf2(...) __riscv_vlseg7e8ff_v_u8mf2(__VA_ARGS__)
2742
#define vlseg8e8ff_v_u8mf2(...) __riscv_vlseg8e8ff_v_u8mf2(__VA_ARGS__)
2743
#define vlseg2e8ff_v_u8m1(...) __riscv_vlseg2e8ff_v_u8m1(__VA_ARGS__)
2744
#define vlseg3e8ff_v_u8m1(...) __riscv_vlseg3e8ff_v_u8m1(__VA_ARGS__)
2745
#define vlseg4e8ff_v_u8m1(...) __riscv_vlseg4e8ff_v_u8m1(__VA_ARGS__)
2746
#define vlseg5e8ff_v_u8m1(...) __riscv_vlseg5e8ff_v_u8m1(__VA_ARGS__)
2747
#define vlseg6e8ff_v_u8m1(...) __riscv_vlseg6e8ff_v_u8m1(__VA_ARGS__)
2748
#define vlseg7e8ff_v_u8m1(...) __riscv_vlseg7e8ff_v_u8m1(__VA_ARGS__)
2749
#define vlseg8e8ff_v_u8m1(...) __riscv_vlseg8e8ff_v_u8m1(__VA_ARGS__)
2750
#define vlseg2e8ff_v_u8m2(...) __riscv_vlseg2e8ff_v_u8m2(__VA_ARGS__)
2751
#define vlseg3e8ff_v_u8m2(...) __riscv_vlseg3e8ff_v_u8m2(__VA_ARGS__)
2752
#define vlseg4e8ff_v_u8m2(...) __riscv_vlseg4e8ff_v_u8m2(__VA_ARGS__)
2753
#define vlseg2e8ff_v_u8m4(...) __riscv_vlseg2e8ff_v_u8m4(__VA_ARGS__)
2754
#define vlseg2e16ff_v_u16mf4(...) __riscv_vlseg2e16ff_v_u16mf4(__VA_ARGS__)
2755
#define vlseg3e16ff_v_u16mf4(...) __riscv_vlseg3e16ff_v_u16mf4(__VA_ARGS__)
2756
#define vlseg4e16ff_v_u16mf4(...) __riscv_vlseg4e16ff_v_u16mf4(__VA_ARGS__)
2757
#define vlseg5e16ff_v_u16mf4(...) __riscv_vlseg5e16ff_v_u16mf4(__VA_ARGS__)
2758
#define vlseg6e16ff_v_u16mf4(...) __riscv_vlseg6e16ff_v_u16mf4(__VA_ARGS__)
2759
#define vlseg7e16ff_v_u16mf4(...) __riscv_vlseg7e16ff_v_u16mf4(__VA_ARGS__)
2760
#define vlseg8e16ff_v_u16mf4(...) __riscv_vlseg8e16ff_v_u16mf4(__VA_ARGS__)
2761
#define vlseg2e16ff_v_u16mf2(...) __riscv_vlseg2e16ff_v_u16mf2(__VA_ARGS__)
2762
#define vlseg3e16ff_v_u16mf2(...) __riscv_vlseg3e16ff_v_u16mf2(__VA_ARGS__)
2763
#define vlseg4e16ff_v_u16mf2(...) __riscv_vlseg4e16ff_v_u16mf2(__VA_ARGS__)
2764
#define vlseg5e16ff_v_u16mf2(...) __riscv_vlseg5e16ff_v_u16mf2(__VA_ARGS__)
2765
#define vlseg6e16ff_v_u16mf2(...) __riscv_vlseg6e16ff_v_u16mf2(__VA_ARGS__)
2766
#define vlseg7e16ff_v_u16mf2(...) __riscv_vlseg7e16ff_v_u16mf2(__VA_ARGS__)
2767
#define vlseg8e16ff_v_u16mf2(...) __riscv_vlseg8e16ff_v_u16mf2(__VA_ARGS__)
2768
#define vlseg2e16ff_v_u16m1(...) __riscv_vlseg2e16ff_v_u16m1(__VA_ARGS__)
2769
#define vlseg3e16ff_v_u16m1(...) __riscv_vlseg3e16ff_v_u16m1(__VA_ARGS__)
2770
#define vlseg4e16ff_v_u16m1(...) __riscv_vlseg4e16ff_v_u16m1(__VA_ARGS__)
2771
#define vlseg5e16ff_v_u16m1(...) __riscv_vlseg5e16ff_v_u16m1(__VA_ARGS__)
2772
#define vlseg6e16ff_v_u16m1(...) __riscv_vlseg6e16ff_v_u16m1(__VA_ARGS__)
2773
#define vlseg7e16ff_v_u16m1(...) __riscv_vlseg7e16ff_v_u16m1(__VA_ARGS__)
2774
#define vlseg8e16ff_v_u16m1(...) __riscv_vlseg8e16ff_v_u16m1(__VA_ARGS__)
2775
#define vlseg2e16ff_v_u16m2(...) __riscv_vlseg2e16ff_v_u16m2(__VA_ARGS__)
2776
#define vlseg3e16ff_v_u16m2(...) __riscv_vlseg3e16ff_v_u16m2(__VA_ARGS__)
2777
#define vlseg4e16ff_v_u16m2(...) __riscv_vlseg4e16ff_v_u16m2(__VA_ARGS__)
2778
#define vlseg2e16ff_v_u16m4(...) __riscv_vlseg2e16ff_v_u16m4(__VA_ARGS__)
2779
#define vlseg2e32ff_v_u32mf2(...) __riscv_vlseg2e32ff_v_u32mf2(__VA_ARGS__)
2780
#define vlseg3e32ff_v_u32mf2(...) __riscv_vlseg3e32ff_v_u32mf2(__VA_ARGS__)
2781
#define vlseg4e32ff_v_u32mf2(...) __riscv_vlseg4e32ff_v_u32mf2(__VA_ARGS__)
2782
#define vlseg5e32ff_v_u32mf2(...) __riscv_vlseg5e32ff_v_u32mf2(__VA_ARGS__)
2783
#define vlseg6e32ff_v_u32mf2(...) __riscv_vlseg6e32ff_v_u32mf2(__VA_ARGS__)
2784
#define vlseg7e32ff_v_u32mf2(...) __riscv_vlseg7e32ff_v_u32mf2(__VA_ARGS__)
2785
#define vlseg8e32ff_v_u32mf2(...) __riscv_vlseg8e32ff_v_u32mf2(__VA_ARGS__)
2786
#define vlseg2e32ff_v_u32m1(...) __riscv_vlseg2e32ff_v_u32m1(__VA_ARGS__)
2787
#define vlseg3e32ff_v_u32m1(...) __riscv_vlseg3e32ff_v_u32m1(__VA_ARGS__)
2788
#define vlseg4e32ff_v_u32m1(...) __riscv_vlseg4e32ff_v_u32m1(__VA_ARGS__)
2789
#define vlseg5e32ff_v_u32m1(...) __riscv_vlseg5e32ff_v_u32m1(__VA_ARGS__)
2790
#define vlseg6e32ff_v_u32m1(...) __riscv_vlseg6e32ff_v_u32m1(__VA_ARGS__)
2791
#define vlseg7e32ff_v_u32m1(...) __riscv_vlseg7e32ff_v_u32m1(__VA_ARGS__)
2792
#define vlseg8e32ff_v_u32m1(...) __riscv_vlseg8e32ff_v_u32m1(__VA_ARGS__)
2793
#define vlseg2e32ff_v_u32m2(...) __riscv_vlseg2e32ff_v_u32m2(__VA_ARGS__)
2794
#define vlseg3e32ff_v_u32m2(...) __riscv_vlseg3e32ff_v_u32m2(__VA_ARGS__)
2795
#define vlseg4e32ff_v_u32m2(...) __riscv_vlseg4e32ff_v_u32m2(__VA_ARGS__)
2796
#define vlseg2e32ff_v_u32m4(...) __riscv_vlseg2e32ff_v_u32m4(__VA_ARGS__)
2797
#define vlseg2e64ff_v_u64m1(...) __riscv_vlseg2e64ff_v_u64m1(__VA_ARGS__)
2798
#define vlseg3e64ff_v_u64m1(...) __riscv_vlseg3e64ff_v_u64m1(__VA_ARGS__)
2799
#define vlseg4e64ff_v_u64m1(...) __riscv_vlseg4e64ff_v_u64m1(__VA_ARGS__)
2800
#define vlseg5e64ff_v_u64m1(...) __riscv_vlseg5e64ff_v_u64m1(__VA_ARGS__)
2801
#define vlseg6e64ff_v_u64m1(...) __riscv_vlseg6e64ff_v_u64m1(__VA_ARGS__)
2802
#define vlseg7e64ff_v_u64m1(...) __riscv_vlseg7e64ff_v_u64m1(__VA_ARGS__)
2803
#define vlseg8e64ff_v_u64m1(...) __riscv_vlseg8e64ff_v_u64m1(__VA_ARGS__)
2804
#define vlseg2e64ff_v_u64m2(...) __riscv_vlseg2e64ff_v_u64m2(__VA_ARGS__)
2805
#define vlseg3e64ff_v_u64m2(...) __riscv_vlseg3e64ff_v_u64m2(__VA_ARGS__)
2806
#define vlseg4e64ff_v_u64m2(...) __riscv_vlseg4e64ff_v_u64m2(__VA_ARGS__)
2807
#define vlseg2e64ff_v_u64m4(...) __riscv_vlseg2e64ff_v_u64m4(__VA_ARGS__)
2808
// masked functions
2809
#define vlseg2e16_v_f16mf4_m(...) __riscv_vlseg2e16_v_f16mf4_tumu(__VA_ARGS__)
2810
#define vlseg3e16_v_f16mf4_m(...) __riscv_vlseg3e16_v_f16mf4_tumu(__VA_ARGS__)
2811
#define vlseg4e16_v_f16mf4_m(...) __riscv_vlseg4e16_v_f16mf4_tumu(__VA_ARGS__)
2812
#define vlseg5e16_v_f16mf4_m(...) __riscv_vlseg5e16_v_f16mf4_tumu(__VA_ARGS__)
2813
#define vlseg6e16_v_f16mf4_m(...) __riscv_vlseg6e16_v_f16mf4_tumu(__VA_ARGS__)
2814
#define vlseg7e16_v_f16mf4_m(...) __riscv_vlseg7e16_v_f16mf4_tumu(__VA_ARGS__)
2815
#define vlseg8e16_v_f16mf4_m(...) __riscv_vlseg8e16_v_f16mf4_tumu(__VA_ARGS__)
2816
#define vlseg2e16_v_f16mf2_m(...) __riscv_vlseg2e16_v_f16mf2_tumu(__VA_ARGS__)
2817
#define vlseg3e16_v_f16mf2_m(...) __riscv_vlseg3e16_v_f16mf2_tumu(__VA_ARGS__)
2818
#define vlseg4e16_v_f16mf2_m(...) __riscv_vlseg4e16_v_f16mf2_tumu(__VA_ARGS__)
2819
#define vlseg5e16_v_f16mf2_m(...) __riscv_vlseg5e16_v_f16mf2_tumu(__VA_ARGS__)
2820
#define vlseg6e16_v_f16mf2_m(...) __riscv_vlseg6e16_v_f16mf2_tumu(__VA_ARGS__)
2821
#define vlseg7e16_v_f16mf2_m(...) __riscv_vlseg7e16_v_f16mf2_tumu(__VA_ARGS__)
2822
#define vlseg8e16_v_f16mf2_m(...) __riscv_vlseg8e16_v_f16mf2_tumu(__VA_ARGS__)
2823
#define vlseg2e16_v_f16m1_m(...) __riscv_vlseg2e16_v_f16m1_tumu(__VA_ARGS__)
2824
#define vlseg3e16_v_f16m1_m(...) __riscv_vlseg3e16_v_f16m1_tumu(__VA_ARGS__)
2825
#define vlseg4e16_v_f16m1_m(...) __riscv_vlseg4e16_v_f16m1_tumu(__VA_ARGS__)
2826
#define vlseg5e16_v_f16m1_m(...) __riscv_vlseg5e16_v_f16m1_tumu(__VA_ARGS__)
2827
#define vlseg6e16_v_f16m1_m(...) __riscv_vlseg6e16_v_f16m1_tumu(__VA_ARGS__)
2828
#define vlseg7e16_v_f16m1_m(...) __riscv_vlseg7e16_v_f16m1_tumu(__VA_ARGS__)
2829
#define vlseg8e16_v_f16m1_m(...) __riscv_vlseg8e16_v_f16m1_tumu(__VA_ARGS__)
2830
#define vlseg2e16_v_f16m2_m(...) __riscv_vlseg2e16_v_f16m2_tumu(__VA_ARGS__)
2831
#define vlseg3e16_v_f16m2_m(...) __riscv_vlseg3e16_v_f16m2_tumu(__VA_ARGS__)
2832
#define vlseg4e16_v_f16m2_m(...) __riscv_vlseg4e16_v_f16m2_tumu(__VA_ARGS__)
2833
#define vlseg2e16_v_f16m4_m(...) __riscv_vlseg2e16_v_f16m4_tumu(__VA_ARGS__)
2834
#define vlseg2e32_v_f32mf2_m(...) __riscv_vlseg2e32_v_f32mf2_tumu(__VA_ARGS__)
2835
#define vlseg3e32_v_f32mf2_m(...) __riscv_vlseg3e32_v_f32mf2_tumu(__VA_ARGS__)
2836
#define vlseg4e32_v_f32mf2_m(...) __riscv_vlseg4e32_v_f32mf2_tumu(__VA_ARGS__)
2837
#define vlseg5e32_v_f32mf2_m(...) __riscv_vlseg5e32_v_f32mf2_tumu(__VA_ARGS__)
2838
#define vlseg6e32_v_f32mf2_m(...) __riscv_vlseg6e32_v_f32mf2_tumu(__VA_ARGS__)
2839
#define vlseg7e32_v_f32mf2_m(...) __riscv_vlseg7e32_v_f32mf2_tumu(__VA_ARGS__)
2840
#define vlseg8e32_v_f32mf2_m(...) __riscv_vlseg8e32_v_f32mf2_tumu(__VA_ARGS__)
2841
#define vlseg2e32_v_f32m1_m(...) __riscv_vlseg2e32_v_f32m1_tumu(__VA_ARGS__)
2842
#define vlseg3e32_v_f32m1_m(...) __riscv_vlseg3e32_v_f32m1_tumu(__VA_ARGS__)
2843
#define vlseg4e32_v_f32m1_m(...) __riscv_vlseg4e32_v_f32m1_tumu(__VA_ARGS__)
2844
#define vlseg5e32_v_f32m1_m(...) __riscv_vlseg5e32_v_f32m1_tumu(__VA_ARGS__)
2845
#define vlseg6e32_v_f32m1_m(...) __riscv_vlseg6e32_v_f32m1_tumu(__VA_ARGS__)
2846
#define vlseg7e32_v_f32m1_m(...) __riscv_vlseg7e32_v_f32m1_tumu(__VA_ARGS__)
2847
#define vlseg8e32_v_f32m1_m(...) __riscv_vlseg8e32_v_f32m1_tumu(__VA_ARGS__)
2848
#define vlseg2e32_v_f32m2_m(...) __riscv_vlseg2e32_v_f32m2_tumu(__VA_ARGS__)
2849
#define vlseg3e32_v_f32m2_m(...) __riscv_vlseg3e32_v_f32m2_tumu(__VA_ARGS__)
2850
#define vlseg4e32_v_f32m2_m(...) __riscv_vlseg4e32_v_f32m2_tumu(__VA_ARGS__)
2851
#define vlseg2e32_v_f32m4_m(...) __riscv_vlseg2e32_v_f32m4_tumu(__VA_ARGS__)
2852
#define vlseg2e64_v_f64m1_m(...) __riscv_vlseg2e64_v_f64m1_tumu(__VA_ARGS__)
2853
#define vlseg3e64_v_f64m1_m(...) __riscv_vlseg3e64_v_f64m1_tumu(__VA_ARGS__)
2854
#define vlseg4e64_v_f64m1_m(...) __riscv_vlseg4e64_v_f64m1_tumu(__VA_ARGS__)
2855
#define vlseg5e64_v_f64m1_m(...) __riscv_vlseg5e64_v_f64m1_tumu(__VA_ARGS__)
2856
#define vlseg6e64_v_f64m1_m(...) __riscv_vlseg6e64_v_f64m1_tumu(__VA_ARGS__)
2857
#define vlseg7e64_v_f64m1_m(...) __riscv_vlseg7e64_v_f64m1_tumu(__VA_ARGS__)
2858
#define vlseg8e64_v_f64m1_m(...) __riscv_vlseg8e64_v_f64m1_tumu(__VA_ARGS__)
2859
#define vlseg2e64_v_f64m2_m(...) __riscv_vlseg2e64_v_f64m2_tumu(__VA_ARGS__)
2860
#define vlseg3e64_v_f64m2_m(...) __riscv_vlseg3e64_v_f64m2_tumu(__VA_ARGS__)
2861
#define vlseg4e64_v_f64m2_m(...) __riscv_vlseg4e64_v_f64m2_tumu(__VA_ARGS__)
2862
#define vlseg2e64_v_f64m4_m(...) __riscv_vlseg2e64_v_f64m4_tumu(__VA_ARGS__)
2863
#define vlseg2e16ff_v_f16mf4_m(...) __riscv_vlseg2e16ff_v_f16mf4_tumu(__VA_ARGS__)
2864
#define vlseg3e16ff_v_f16mf4_m(...) __riscv_vlseg3e16ff_v_f16mf4_tumu(__VA_ARGS__)
2865
#define vlseg4e16ff_v_f16mf4_m(...) __riscv_vlseg4e16ff_v_f16mf4_tumu(__VA_ARGS__)
2866
#define vlseg5e16ff_v_f16mf4_m(...) __riscv_vlseg5e16ff_v_f16mf4_tumu(__VA_ARGS__)
2867
#define vlseg6e16ff_v_f16mf4_m(...) __riscv_vlseg6e16ff_v_f16mf4_tumu(__VA_ARGS__)
2868
#define vlseg7e16ff_v_f16mf4_m(...) __riscv_vlseg7e16ff_v_f16mf4_tumu(__VA_ARGS__)
2869
#define vlseg8e16ff_v_f16mf4_m(...) __riscv_vlseg8e16ff_v_f16mf4_tumu(__VA_ARGS__)
2870
#define vlseg2e16ff_v_f16mf2_m(...) __riscv_vlseg2e16ff_v_f16mf2_tumu(__VA_ARGS__)
2871
#define vlseg3e16ff_v_f16mf2_m(...) __riscv_vlseg3e16ff_v_f16mf2_tumu(__VA_ARGS__)
2872
#define vlseg4e16ff_v_f16mf2_m(...) __riscv_vlseg4e16ff_v_f16mf2_tumu(__VA_ARGS__)
2873
#define vlseg5e16ff_v_f16mf2_m(...) __riscv_vlseg5e16ff_v_f16mf2_tumu(__VA_ARGS__)
2874
#define vlseg6e16ff_v_f16mf2_m(...) __riscv_vlseg6e16ff_v_f16mf2_tumu(__VA_ARGS__)
2875
#define vlseg7e16ff_v_f16mf2_m(...) __riscv_vlseg7e16ff_v_f16mf2_tumu(__VA_ARGS__)
2876
#define vlseg8e16ff_v_f16mf2_m(...) __riscv_vlseg8e16ff_v_f16mf2_tumu(__VA_ARGS__)
2877
#define vlseg2e16ff_v_f16m1_m(...) __riscv_vlseg2e16ff_v_f16m1_tumu(__VA_ARGS__)
2878
#define vlseg3e16ff_v_f16m1_m(...) __riscv_vlseg3e16ff_v_f16m1_tumu(__VA_ARGS__)
2879
#define vlseg4e16ff_v_f16m1_m(...) __riscv_vlseg4e16ff_v_f16m1_tumu(__VA_ARGS__)
2880
#define vlseg5e16ff_v_f16m1_m(...) __riscv_vlseg5e16ff_v_f16m1_tumu(__VA_ARGS__)
2881
#define vlseg6e16ff_v_f16m1_m(...) __riscv_vlseg6e16ff_v_f16m1_tumu(__VA_ARGS__)
2882
#define vlseg7e16ff_v_f16m1_m(...) __riscv_vlseg7e16ff_v_f16m1_tumu(__VA_ARGS__)
2883
#define vlseg8e16ff_v_f16m1_m(...) __riscv_vlseg8e16ff_v_f16m1_tumu(__VA_ARGS__)
2884
#define vlseg2e16ff_v_f16m2_m(...) __riscv_vlseg2e16ff_v_f16m2_tumu(__VA_ARGS__)
2885
#define vlseg3e16ff_v_f16m2_m(...) __riscv_vlseg3e16ff_v_f16m2_tumu(__VA_ARGS__)
2886
#define vlseg4e16ff_v_f16m2_m(...) __riscv_vlseg4e16ff_v_f16m2_tumu(__VA_ARGS__)
2887
#define vlseg2e16ff_v_f16m4_m(...) __riscv_vlseg2e16ff_v_f16m4_tumu(__VA_ARGS__)
2888
#define vlseg2e32ff_v_f32mf2_m(...) __riscv_vlseg2e32ff_v_f32mf2_tumu(__VA_ARGS__)
2889
#define vlseg3e32ff_v_f32mf2_m(...) __riscv_vlseg3e32ff_v_f32mf2_tumu(__VA_ARGS__)
2890
#define vlseg4e32ff_v_f32mf2_m(...) __riscv_vlseg4e32ff_v_f32mf2_tumu(__VA_ARGS__)
2891
#define vlseg5e32ff_v_f32mf2_m(...) __riscv_vlseg5e32ff_v_f32mf2_tumu(__VA_ARGS__)
2892
#define vlseg6e32ff_v_f32mf2_m(...) __riscv_vlseg6e32ff_v_f32mf2_tumu(__VA_ARGS__)
2893
#define vlseg7e32ff_v_f32mf2_m(...) __riscv_vlseg7e32ff_v_f32mf2_tumu(__VA_ARGS__)
2894
#define vlseg8e32ff_v_f32mf2_m(...) __riscv_vlseg8e32ff_v_f32mf2_tumu(__VA_ARGS__)
2895
#define vlseg2e32ff_v_f32m1_m(...) __riscv_vlseg2e32ff_v_f32m1_tumu(__VA_ARGS__)
2896
#define vlseg3e32ff_v_f32m1_m(...) __riscv_vlseg3e32ff_v_f32m1_tumu(__VA_ARGS__)
2897
#define vlseg4e32ff_v_f32m1_m(...) __riscv_vlseg4e32ff_v_f32m1_tumu(__VA_ARGS__)
2898
#define vlseg5e32ff_v_f32m1_m(...) __riscv_vlseg5e32ff_v_f32m1_tumu(__VA_ARGS__)
2899
#define vlseg6e32ff_v_f32m1_m(...) __riscv_vlseg6e32ff_v_f32m1_tumu(__VA_ARGS__)
2900
#define vlseg7e32ff_v_f32m1_m(...) __riscv_vlseg7e32ff_v_f32m1_tumu(__VA_ARGS__)
2901
#define vlseg8e32ff_v_f32m1_m(...) __riscv_vlseg8e32ff_v_f32m1_tumu(__VA_ARGS__)
2902
#define vlseg2e32ff_v_f32m2_m(...) __riscv_vlseg2e32ff_v_f32m2_tumu(__VA_ARGS__)
2903
#define vlseg3e32ff_v_f32m2_m(...) __riscv_vlseg3e32ff_v_f32m2_tumu(__VA_ARGS__)
2904
#define vlseg4e32ff_v_f32m2_m(...) __riscv_vlseg4e32ff_v_f32m2_tumu(__VA_ARGS__)
2905
#define vlseg2e32ff_v_f32m4_m(...) __riscv_vlseg2e32ff_v_f32m4_tumu(__VA_ARGS__)
2906
#define vlseg2e64ff_v_f64m1_m(...) __riscv_vlseg2e64ff_v_f64m1_tumu(__VA_ARGS__)
2907
#define vlseg3e64ff_v_f64m1_m(...) __riscv_vlseg3e64ff_v_f64m1_tumu(__VA_ARGS__)
2908
#define vlseg4e64ff_v_f64m1_m(...) __riscv_vlseg4e64ff_v_f64m1_tumu(__VA_ARGS__)
2909
#define vlseg5e64ff_v_f64m1_m(...) __riscv_vlseg5e64ff_v_f64m1_tumu(__VA_ARGS__)
2910
#define vlseg6e64ff_v_f64m1_m(...) __riscv_vlseg6e64ff_v_f64m1_tumu(__VA_ARGS__)
2911
#define vlseg7e64ff_v_f64m1_m(...) __riscv_vlseg7e64ff_v_f64m1_tumu(__VA_ARGS__)
2912
#define vlseg8e64ff_v_f64m1_m(...) __riscv_vlseg8e64ff_v_f64m1_tumu(__VA_ARGS__)
2913
#define vlseg2e64ff_v_f64m2_m(...) __riscv_vlseg2e64ff_v_f64m2_tumu(__VA_ARGS__)
2914
#define vlseg3e64ff_v_f64m2_m(...) __riscv_vlseg3e64ff_v_f64m2_tumu(__VA_ARGS__)
2915
#define vlseg4e64ff_v_f64m2_m(...) __riscv_vlseg4e64ff_v_f64m2_tumu(__VA_ARGS__)
2916
#define vlseg2e64ff_v_f64m4_m(...) __riscv_vlseg2e64ff_v_f64m4_tumu(__VA_ARGS__)
2917
#define vlseg2e8_v_i8mf8_m(...) __riscv_vlseg2e8_v_i8mf8_tumu(__VA_ARGS__)
2918
#define vlseg3e8_v_i8mf8_m(...) __riscv_vlseg3e8_v_i8mf8_tumu(__VA_ARGS__)
2919
#define vlseg4e8_v_i8mf8_m(...) __riscv_vlseg4e8_v_i8mf8_tumu(__VA_ARGS__)
2920
#define vlseg5e8_v_i8mf8_m(...) __riscv_vlseg5e8_v_i8mf8_tumu(__VA_ARGS__)
2921
#define vlseg6e8_v_i8mf8_m(...) __riscv_vlseg6e8_v_i8mf8_tumu(__VA_ARGS__)
2922
#define vlseg7e8_v_i8mf8_m(...) __riscv_vlseg7e8_v_i8mf8_tumu(__VA_ARGS__)
2923
#define vlseg8e8_v_i8mf8_m(...) __riscv_vlseg8e8_v_i8mf8_tumu(__VA_ARGS__)
2924
#define vlseg2e8_v_i8mf4_m(...) __riscv_vlseg2e8_v_i8mf4_tumu(__VA_ARGS__)
2925
#define vlseg3e8_v_i8mf4_m(...) __riscv_vlseg3e8_v_i8mf4_tumu(__VA_ARGS__)
2926
#define vlseg4e8_v_i8mf4_m(...) __riscv_vlseg4e8_v_i8mf4_tumu(__VA_ARGS__)
2927
#define vlseg5e8_v_i8mf4_m(...) __riscv_vlseg5e8_v_i8mf4_tumu(__VA_ARGS__)
2928
#define vlseg6e8_v_i8mf4_m(...) __riscv_vlseg6e8_v_i8mf4_tumu(__VA_ARGS__)
2929
#define vlseg7e8_v_i8mf4_m(...) __riscv_vlseg7e8_v_i8mf4_tumu(__VA_ARGS__)
2930
#define vlseg8e8_v_i8mf4_m(...) __riscv_vlseg8e8_v_i8mf4_tumu(__VA_ARGS__)
2931
#define vlseg2e8_v_i8mf2_m(...) __riscv_vlseg2e8_v_i8mf2_tumu(__VA_ARGS__)
2932
#define vlseg3e8_v_i8mf2_m(...) __riscv_vlseg3e8_v_i8mf2_tumu(__VA_ARGS__)
2933
#define vlseg4e8_v_i8mf2_m(...) __riscv_vlseg4e8_v_i8mf2_tumu(__VA_ARGS__)
2934
#define vlseg5e8_v_i8mf2_m(...) __riscv_vlseg5e8_v_i8mf2_tumu(__VA_ARGS__)
2935
#define vlseg6e8_v_i8mf2_m(...) __riscv_vlseg6e8_v_i8mf2_tumu(__VA_ARGS__)
2936
#define vlseg7e8_v_i8mf2_m(...) __riscv_vlseg7e8_v_i8mf2_tumu(__VA_ARGS__)
2937
#define vlseg8e8_v_i8mf2_m(...) __riscv_vlseg8e8_v_i8mf2_tumu(__VA_ARGS__)
2938
#define vlseg2e8_v_i8m1_m(...) __riscv_vlseg2e8_v_i8m1_tumu(__VA_ARGS__)
2939
#define vlseg3e8_v_i8m1_m(...) __riscv_vlseg3e8_v_i8m1_tumu(__VA_ARGS__)
2940
#define vlseg4e8_v_i8m1_m(...) __riscv_vlseg4e8_v_i8m1_tumu(__VA_ARGS__)
2941
#define vlseg5e8_v_i8m1_m(...) __riscv_vlseg5e8_v_i8m1_tumu(__VA_ARGS__)
2942
#define vlseg6e8_v_i8m1_m(...) __riscv_vlseg6e8_v_i8m1_tumu(__VA_ARGS__)
2943
#define vlseg7e8_v_i8m1_m(...) __riscv_vlseg7e8_v_i8m1_tumu(__VA_ARGS__)
2944
#define vlseg8e8_v_i8m1_m(...) __riscv_vlseg8e8_v_i8m1_tumu(__VA_ARGS__)
2945
#define vlseg2e8_v_i8m2_m(...) __riscv_vlseg2e8_v_i8m2_tumu(__VA_ARGS__)
2946
#define vlseg3e8_v_i8m2_m(...) __riscv_vlseg3e8_v_i8m2_tumu(__VA_ARGS__)
2947
#define vlseg4e8_v_i8m2_m(...) __riscv_vlseg4e8_v_i8m2_tumu(__VA_ARGS__)
2948
#define vlseg2e8_v_i8m4_m(...) __riscv_vlseg2e8_v_i8m4_tumu(__VA_ARGS__)
2949
#define vlseg2e16_v_i16mf4_m(...) __riscv_vlseg2e16_v_i16mf4_tumu(__VA_ARGS__)
2950
#define vlseg3e16_v_i16mf4_m(...) __riscv_vlseg3e16_v_i16mf4_tumu(__VA_ARGS__)
2951
#define vlseg4e16_v_i16mf4_m(...) __riscv_vlseg4e16_v_i16mf4_tumu(__VA_ARGS__)
2952
#define vlseg5e16_v_i16mf4_m(...) __riscv_vlseg5e16_v_i16mf4_tumu(__VA_ARGS__)
2953
#define vlseg6e16_v_i16mf4_m(...) __riscv_vlseg6e16_v_i16mf4_tumu(__VA_ARGS__)
2954
#define vlseg7e16_v_i16mf4_m(...) __riscv_vlseg7e16_v_i16mf4_tumu(__VA_ARGS__)
2955
#define vlseg8e16_v_i16mf4_m(...) __riscv_vlseg8e16_v_i16mf4_tumu(__VA_ARGS__)
2956
#define vlseg2e16_v_i16mf2_m(...) __riscv_vlseg2e16_v_i16mf2_tumu(__VA_ARGS__)
2957
#define vlseg3e16_v_i16mf2_m(...) __riscv_vlseg3e16_v_i16mf2_tumu(__VA_ARGS__)
2958
#define vlseg4e16_v_i16mf2_m(...) __riscv_vlseg4e16_v_i16mf2_tumu(__VA_ARGS__)
2959
#define vlseg5e16_v_i16mf2_m(...) __riscv_vlseg5e16_v_i16mf2_tumu(__VA_ARGS__)
2960
#define vlseg6e16_v_i16mf2_m(...) __riscv_vlseg6e16_v_i16mf2_tumu(__VA_ARGS__)
2961
#define vlseg7e16_v_i16mf2_m(...) __riscv_vlseg7e16_v_i16mf2_tumu(__VA_ARGS__)
2962
#define vlseg8e16_v_i16mf2_m(...) __riscv_vlseg8e16_v_i16mf2_tumu(__VA_ARGS__)
2963
#define vlseg2e16_v_i16m1_m(...) __riscv_vlseg2e16_v_i16m1_tumu(__VA_ARGS__)
2964
#define vlseg3e16_v_i16m1_m(...) __riscv_vlseg3e16_v_i16m1_tumu(__VA_ARGS__)
2965
#define vlseg4e16_v_i16m1_m(...) __riscv_vlseg4e16_v_i16m1_tumu(__VA_ARGS__)
2966
#define vlseg5e16_v_i16m1_m(...) __riscv_vlseg5e16_v_i16m1_tumu(__VA_ARGS__)
2967
#define vlseg6e16_v_i16m1_m(...) __riscv_vlseg6e16_v_i16m1_tumu(__VA_ARGS__)
2968
#define vlseg7e16_v_i16m1_m(...) __riscv_vlseg7e16_v_i16m1_tumu(__VA_ARGS__)
2969
#define vlseg8e16_v_i16m1_m(...) __riscv_vlseg8e16_v_i16m1_tumu(__VA_ARGS__)
2970
#define vlseg2e16_v_i16m2_m(...) __riscv_vlseg2e16_v_i16m2_tumu(__VA_ARGS__)
2971
#define vlseg3e16_v_i16m2_m(...) __riscv_vlseg3e16_v_i16m2_tumu(__VA_ARGS__)
2972
#define vlseg4e16_v_i16m2_m(...) __riscv_vlseg4e16_v_i16m2_tumu(__VA_ARGS__)
2973
#define vlseg2e16_v_i16m4_m(...) __riscv_vlseg2e16_v_i16m4_tumu(__VA_ARGS__)
2974
#define vlseg2e32_v_i32mf2_m(...) __riscv_vlseg2e32_v_i32mf2_tumu(__VA_ARGS__)
2975
#define vlseg3e32_v_i32mf2_m(...) __riscv_vlseg3e32_v_i32mf2_tumu(__VA_ARGS__)
2976
#define vlseg4e32_v_i32mf2_m(...) __riscv_vlseg4e32_v_i32mf2_tumu(__VA_ARGS__)
2977
#define vlseg5e32_v_i32mf2_m(...) __riscv_vlseg5e32_v_i32mf2_tumu(__VA_ARGS__)
2978
#define vlseg6e32_v_i32mf2_m(...) __riscv_vlseg6e32_v_i32mf2_tumu(__VA_ARGS__)
2979
#define vlseg7e32_v_i32mf2_m(...) __riscv_vlseg7e32_v_i32mf2_tumu(__VA_ARGS__)
2980
#define vlseg8e32_v_i32mf2_m(...) __riscv_vlseg8e32_v_i32mf2_tumu(__VA_ARGS__)
2981
#define vlseg2e32_v_i32m1_m(...) __riscv_vlseg2e32_v_i32m1_tumu(__VA_ARGS__)
2982
#define vlseg3e32_v_i32m1_m(...) __riscv_vlseg3e32_v_i32m1_tumu(__VA_ARGS__)
2983
#define vlseg4e32_v_i32m1_m(...) __riscv_vlseg4e32_v_i32m1_tumu(__VA_ARGS__)
2984
#define vlseg5e32_v_i32m1_m(...) __riscv_vlseg5e32_v_i32m1_tumu(__VA_ARGS__)
2985
#define vlseg6e32_v_i32m1_m(...) __riscv_vlseg6e32_v_i32m1_tumu(__VA_ARGS__)
2986
#define vlseg7e32_v_i32m1_m(...) __riscv_vlseg7e32_v_i32m1_tumu(__VA_ARGS__)
2987
#define vlseg8e32_v_i32m1_m(...) __riscv_vlseg8e32_v_i32m1_tumu(__VA_ARGS__)
2988
#define vlseg2e32_v_i32m2_m(...) __riscv_vlseg2e32_v_i32m2_tumu(__VA_ARGS__)
2989
#define vlseg3e32_v_i32m2_m(...) __riscv_vlseg3e32_v_i32m2_tumu(__VA_ARGS__)
2990
#define vlseg4e32_v_i32m2_m(...) __riscv_vlseg4e32_v_i32m2_tumu(__VA_ARGS__)
2991
#define vlseg2e32_v_i32m4_m(...) __riscv_vlseg2e32_v_i32m4_tumu(__VA_ARGS__)
2992
#define vlseg2e64_v_i64m1_m(...) __riscv_vlseg2e64_v_i64m1_tumu(__VA_ARGS__)
2993
#define vlseg3e64_v_i64m1_m(...) __riscv_vlseg3e64_v_i64m1_tumu(__VA_ARGS__)
2994
#define vlseg4e64_v_i64m1_m(...) __riscv_vlseg4e64_v_i64m1_tumu(__VA_ARGS__)
2995
#define vlseg5e64_v_i64m1_m(...) __riscv_vlseg5e64_v_i64m1_tumu(__VA_ARGS__)
2996
#define vlseg6e64_v_i64m1_m(...) __riscv_vlseg6e64_v_i64m1_tumu(__VA_ARGS__)
2997
#define vlseg7e64_v_i64m1_m(...) __riscv_vlseg7e64_v_i64m1_tumu(__VA_ARGS__)
2998
#define vlseg8e64_v_i64m1_m(...) __riscv_vlseg8e64_v_i64m1_tumu(__VA_ARGS__)
2999
#define vlseg2e64_v_i64m2_m(...) __riscv_vlseg2e64_v_i64m2_tumu(__VA_ARGS__)
3000
#define vlseg3e64_v_i64m2_m(...) __riscv_vlseg3e64_v_i64m2_tumu(__VA_ARGS__)
3001
#define vlseg4e64_v_i64m2_m(...) __riscv_vlseg4e64_v_i64m2_tumu(__VA_ARGS__)
3002
#define vlseg2e64_v_i64m4_m(...) __riscv_vlseg2e64_v_i64m4_tumu(__VA_ARGS__)
3003
#define vlseg2e8ff_v_i8mf8_m(...) __riscv_vlseg2e8ff_v_i8mf8_tumu(__VA_ARGS__)
3004
#define vlseg3e8ff_v_i8mf8_m(...) __riscv_vlseg3e8ff_v_i8mf8_tumu(__VA_ARGS__)
3005
#define vlseg4e8ff_v_i8mf8_m(...) __riscv_vlseg4e8ff_v_i8mf8_tumu(__VA_ARGS__)
3006
#define vlseg5e8ff_v_i8mf8_m(...) __riscv_vlseg5e8ff_v_i8mf8_tumu(__VA_ARGS__)
3007
#define vlseg6e8ff_v_i8mf8_m(...) __riscv_vlseg6e8ff_v_i8mf8_tumu(__VA_ARGS__)
3008
#define vlseg7e8ff_v_i8mf8_m(...) __riscv_vlseg7e8ff_v_i8mf8_tumu(__VA_ARGS__)
3009
#define vlseg8e8ff_v_i8mf8_m(...) __riscv_vlseg8e8ff_v_i8mf8_tumu(__VA_ARGS__)
3010
#define vlseg2e8ff_v_i8mf4_m(...) __riscv_vlseg2e8ff_v_i8mf4_tumu(__VA_ARGS__)
3011
#define vlseg3e8ff_v_i8mf4_m(...) __riscv_vlseg3e8ff_v_i8mf4_tumu(__VA_ARGS__)
3012
#define vlseg4e8ff_v_i8mf4_m(...) __riscv_vlseg4e8ff_v_i8mf4_tumu(__VA_ARGS__)
3013
#define vlseg5e8ff_v_i8mf4_m(...) __riscv_vlseg5e8ff_v_i8mf4_tumu(__VA_ARGS__)
3014
#define vlseg6e8ff_v_i8mf4_m(...) __riscv_vlseg6e8ff_v_i8mf4_tumu(__VA_ARGS__)
3015
#define vlseg7e8ff_v_i8mf4_m(...) __riscv_vlseg7e8ff_v_i8mf4_tumu(__VA_ARGS__)
3016
#define vlseg8e8ff_v_i8mf4_m(...) __riscv_vlseg8e8ff_v_i8mf4_tumu(__VA_ARGS__)
3017
#define vlseg2e8ff_v_i8mf2_m(...) __riscv_vlseg2e8ff_v_i8mf2_tumu(__VA_ARGS__)
3018
#define vlseg3e8ff_v_i8mf2_m(...) __riscv_vlseg3e8ff_v_i8mf2_tumu(__VA_ARGS__)
3019
#define vlseg4e8ff_v_i8mf2_m(...) __riscv_vlseg4e8ff_v_i8mf2_tumu(__VA_ARGS__)
3020
#define vlseg5e8ff_v_i8mf2_m(...) __riscv_vlseg5e8ff_v_i8mf2_tumu(__VA_ARGS__)
3021
#define vlseg6e8ff_v_i8mf2_m(...) __riscv_vlseg6e8ff_v_i8mf2_tumu(__VA_ARGS__)
3022
#define vlseg7e8ff_v_i8mf2_m(...) __riscv_vlseg7e8ff_v_i8mf2_tumu(__VA_ARGS__)
3023
#define vlseg8e8ff_v_i8mf2_m(...) __riscv_vlseg8e8ff_v_i8mf2_tumu(__VA_ARGS__)
3024
#define vlseg2e8ff_v_i8m1_m(...) __riscv_vlseg2e8ff_v_i8m1_tumu(__VA_ARGS__)
3025
#define vlseg3e8ff_v_i8m1_m(...) __riscv_vlseg3e8ff_v_i8m1_tumu(__VA_ARGS__)
3026
#define vlseg4e8ff_v_i8m1_m(...) __riscv_vlseg4e8ff_v_i8m1_tumu(__VA_ARGS__)
3027
#define vlseg5e8ff_v_i8m1_m(...) __riscv_vlseg5e8ff_v_i8m1_tumu(__VA_ARGS__)
3028
#define vlseg6e8ff_v_i8m1_m(...) __riscv_vlseg6e8ff_v_i8m1_tumu(__VA_ARGS__)
3029
#define vlseg7e8ff_v_i8m1_m(...) __riscv_vlseg7e8ff_v_i8m1_tumu(__VA_ARGS__)
3030
#define vlseg8e8ff_v_i8m1_m(...) __riscv_vlseg8e8ff_v_i8m1_tumu(__VA_ARGS__)
3031
#define vlseg2e8ff_v_i8m2_m(...) __riscv_vlseg2e8ff_v_i8m2_tumu(__VA_ARGS__)
3032
#define vlseg3e8ff_v_i8m2_m(...) __riscv_vlseg3e8ff_v_i8m2_tumu(__VA_ARGS__)
3033
#define vlseg4e8ff_v_i8m2_m(...) __riscv_vlseg4e8ff_v_i8m2_tumu(__VA_ARGS__)
3034
#define vlseg2e8ff_v_i8m4_m(...) __riscv_vlseg2e8ff_v_i8m4_tumu(__VA_ARGS__)
3035
#define vlseg2e16ff_v_i16mf4_m(...) __riscv_vlseg2e16ff_v_i16mf4_tumu(__VA_ARGS__)
3036
#define vlseg3e16ff_v_i16mf4_m(...) __riscv_vlseg3e16ff_v_i16mf4_tumu(__VA_ARGS__)
3037
#define vlseg4e16ff_v_i16mf4_m(...) __riscv_vlseg4e16ff_v_i16mf4_tumu(__VA_ARGS__)
3038
#define vlseg5e16ff_v_i16mf4_m(...) __riscv_vlseg5e16ff_v_i16mf4_tumu(__VA_ARGS__)
3039
#define vlseg6e16ff_v_i16mf4_m(...) __riscv_vlseg6e16ff_v_i16mf4_tumu(__VA_ARGS__)
3040
#define vlseg7e16ff_v_i16mf4_m(...) __riscv_vlseg7e16ff_v_i16mf4_tumu(__VA_ARGS__)
3041
#define vlseg8e16ff_v_i16mf4_m(...) __riscv_vlseg8e16ff_v_i16mf4_tumu(__VA_ARGS__)
3042
#define vlseg2e16ff_v_i16mf2_m(...) __riscv_vlseg2e16ff_v_i16mf2_tumu(__VA_ARGS__)
3043
#define vlseg3e16ff_v_i16mf2_m(...) __riscv_vlseg3e16ff_v_i16mf2_tumu(__VA_ARGS__)
3044
#define vlseg4e16ff_v_i16mf2_m(...) __riscv_vlseg4e16ff_v_i16mf2_tumu(__VA_ARGS__)
3045
#define vlseg5e16ff_v_i16mf2_m(...) __riscv_vlseg5e16ff_v_i16mf2_tumu(__VA_ARGS__)
3046
#define vlseg6e16ff_v_i16mf2_m(...) __riscv_vlseg6e16ff_v_i16mf2_tumu(__VA_ARGS__)
3047
#define vlseg7e16ff_v_i16mf2_m(...) __riscv_vlseg7e16ff_v_i16mf2_tumu(__VA_ARGS__)
3048
#define vlseg8e16ff_v_i16mf2_m(...) __riscv_vlseg8e16ff_v_i16mf2_tumu(__VA_ARGS__)
3049
#define vlseg2e16ff_v_i16m1_m(...) __riscv_vlseg2e16ff_v_i16m1_tumu(__VA_ARGS__)
3050
#define vlseg3e16ff_v_i16m1_m(...) __riscv_vlseg3e16ff_v_i16m1_tumu(__VA_ARGS__)
3051
#define vlseg4e16ff_v_i16m1_m(...) __riscv_vlseg4e16ff_v_i16m1_tumu(__VA_ARGS__)
3052
#define vlseg5e16ff_v_i16m1_m(...) __riscv_vlseg5e16ff_v_i16m1_tumu(__VA_ARGS__)
3053
#define vlseg6e16ff_v_i16m1_m(...) __riscv_vlseg6e16ff_v_i16m1_tumu(__VA_ARGS__)
3054
#define vlseg7e16ff_v_i16m1_m(...) __riscv_vlseg7e16ff_v_i16m1_tumu(__VA_ARGS__)
3055
#define vlseg8e16ff_v_i16m1_m(...) __riscv_vlseg8e16ff_v_i16m1_tumu(__VA_ARGS__)
3056
#define vlseg2e16ff_v_i16m2_m(...) __riscv_vlseg2e16ff_v_i16m2_tumu(__VA_ARGS__)
3057
#define vlseg3e16ff_v_i16m2_m(...) __riscv_vlseg3e16ff_v_i16m2_tumu(__VA_ARGS__)
3058
#define vlseg4e16ff_v_i16m2_m(...) __riscv_vlseg4e16ff_v_i16m2_tumu(__VA_ARGS__)
3059
#define vlseg2e16ff_v_i16m4_m(...) __riscv_vlseg2e16ff_v_i16m4_tumu(__VA_ARGS__)
3060
#define vlseg2e32ff_v_i32mf2_m(...) __riscv_vlseg2e32ff_v_i32mf2_tumu(__VA_ARGS__)
3061
#define vlseg3e32ff_v_i32mf2_m(...) __riscv_vlseg3e32ff_v_i32mf2_tumu(__VA_ARGS__)
3062
#define vlseg4e32ff_v_i32mf2_m(...) __riscv_vlseg4e32ff_v_i32mf2_tumu(__VA_ARGS__)
3063
#define vlseg5e32ff_v_i32mf2_m(...) __riscv_vlseg5e32ff_v_i32mf2_tumu(__VA_ARGS__)
3064
#define vlseg6e32ff_v_i32mf2_m(...) __riscv_vlseg6e32ff_v_i32mf2_tumu(__VA_ARGS__)
3065
#define vlseg7e32ff_v_i32mf2_m(...) __riscv_vlseg7e32ff_v_i32mf2_tumu(__VA_ARGS__)
3066
#define vlseg8e32ff_v_i32mf2_m(...) __riscv_vlseg8e32ff_v_i32mf2_tumu(__VA_ARGS__)
3067
#define vlseg2e32ff_v_i32m1_m(...) __riscv_vlseg2e32ff_v_i32m1_tumu(__VA_ARGS__)
3068
#define vlseg3e32ff_v_i32m1_m(...) __riscv_vlseg3e32ff_v_i32m1_tumu(__VA_ARGS__)
3069
#define vlseg4e32ff_v_i32m1_m(...) __riscv_vlseg4e32ff_v_i32m1_tumu(__VA_ARGS__)
3070
#define vlseg5e32ff_v_i32m1_m(...) __riscv_vlseg5e32ff_v_i32m1_tumu(__VA_ARGS__)
3071
#define vlseg6e32ff_v_i32m1_m(...) __riscv_vlseg6e32ff_v_i32m1_tumu(__VA_ARGS__)
3072
#define vlseg7e32ff_v_i32m1_m(...) __riscv_vlseg7e32ff_v_i32m1_tumu(__VA_ARGS__)
3073
#define vlseg8e32ff_v_i32m1_m(...) __riscv_vlseg8e32ff_v_i32m1_tumu(__VA_ARGS__)
3074
#define vlseg2e32ff_v_i32m2_m(...) __riscv_vlseg2e32ff_v_i32m2_tumu(__VA_ARGS__)
3075
#define vlseg3e32ff_v_i32m2_m(...) __riscv_vlseg3e32ff_v_i32m2_tumu(__VA_ARGS__)
3076
#define vlseg4e32ff_v_i32m2_m(...) __riscv_vlseg4e32ff_v_i32m2_tumu(__VA_ARGS__)
3077
#define vlseg2e32ff_v_i32m4_m(...) __riscv_vlseg2e32ff_v_i32m4_tumu(__VA_ARGS__)
3078
#define vlseg2e64ff_v_i64m1_m(...) __riscv_vlseg2e64ff_v_i64m1_tumu(__VA_ARGS__)
3079
#define vlseg3e64ff_v_i64m1_m(...) __riscv_vlseg3e64ff_v_i64m1_tumu(__VA_ARGS__)
3080
#define vlseg4e64ff_v_i64m1_m(...) __riscv_vlseg4e64ff_v_i64m1_tumu(__VA_ARGS__)
3081
#define vlseg5e64ff_v_i64m1_m(...) __riscv_vlseg5e64ff_v_i64m1_tumu(__VA_ARGS__)
3082
#define vlseg6e64ff_v_i64m1_m(...) __riscv_vlseg6e64ff_v_i64m1_tumu(__VA_ARGS__)
3083
#define vlseg7e64ff_v_i64m1_m(...) __riscv_vlseg7e64ff_v_i64m1_tumu(__VA_ARGS__)
3084
#define vlseg8e64ff_v_i64m1_m(...) __riscv_vlseg8e64ff_v_i64m1_tumu(__VA_ARGS__)
3085
#define vlseg2e64ff_v_i64m2_m(...) __riscv_vlseg2e64ff_v_i64m2_tumu(__VA_ARGS__)
3086
#define vlseg3e64ff_v_i64m2_m(...) __riscv_vlseg3e64ff_v_i64m2_tumu(__VA_ARGS__)
3087
#define vlseg4e64ff_v_i64m2_m(...) __riscv_vlseg4e64ff_v_i64m2_tumu(__VA_ARGS__)
3088
#define vlseg2e64ff_v_i64m4_m(...) __riscv_vlseg2e64ff_v_i64m4_tumu(__VA_ARGS__)
3089
#define vlseg2e8_v_u8mf8_m(...) __riscv_vlseg2e8_v_u8mf8_tumu(__VA_ARGS__)
3090
#define vlseg3e8_v_u8mf8_m(...) __riscv_vlseg3e8_v_u8mf8_tumu(__VA_ARGS__)
3091
#define vlseg4e8_v_u8mf8_m(...) __riscv_vlseg4e8_v_u8mf8_tumu(__VA_ARGS__)
3092
#define vlseg5e8_v_u8mf8_m(...) __riscv_vlseg5e8_v_u8mf8_tumu(__VA_ARGS__)
3093
#define vlseg6e8_v_u8mf8_m(...) __riscv_vlseg6e8_v_u8mf8_tumu(__VA_ARGS__)
3094
#define vlseg7e8_v_u8mf8_m(...) __riscv_vlseg7e8_v_u8mf8_tumu(__VA_ARGS__)
3095
#define vlseg8e8_v_u8mf8_m(...) __riscv_vlseg8e8_v_u8mf8_tumu(__VA_ARGS__)
3096
#define vlseg2e8_v_u8mf4_m(...) __riscv_vlseg2e8_v_u8mf4_tumu(__VA_ARGS__)
3097
#define vlseg3e8_v_u8mf4_m(...) __riscv_vlseg3e8_v_u8mf4_tumu(__VA_ARGS__)
3098
#define vlseg4e8_v_u8mf4_m(...) __riscv_vlseg4e8_v_u8mf4_tumu(__VA_ARGS__)
3099
#define vlseg5e8_v_u8mf4_m(...) __riscv_vlseg5e8_v_u8mf4_tumu(__VA_ARGS__)
3100
#define vlseg6e8_v_u8mf4_m(...) __riscv_vlseg6e8_v_u8mf4_tumu(__VA_ARGS__)
3101
#define vlseg7e8_v_u8mf4_m(...) __riscv_vlseg7e8_v_u8mf4_tumu(__VA_ARGS__)
3102
#define vlseg8e8_v_u8mf4_m(...) __riscv_vlseg8e8_v_u8mf4_tumu(__VA_ARGS__)
3103
#define vlseg2e8_v_u8mf2_m(...) __riscv_vlseg2e8_v_u8mf2_tumu(__VA_ARGS__)
3104
#define vlseg3e8_v_u8mf2_m(...) __riscv_vlseg3e8_v_u8mf2_tumu(__VA_ARGS__)
3105
#define vlseg4e8_v_u8mf2_m(...) __riscv_vlseg4e8_v_u8mf2_tumu(__VA_ARGS__)
3106
#define vlseg5e8_v_u8mf2_m(...) __riscv_vlseg5e8_v_u8mf2_tumu(__VA_ARGS__)
3107
#define vlseg6e8_v_u8mf2_m(...) __riscv_vlseg6e8_v_u8mf2_tumu(__VA_ARGS__)
3108
#define vlseg7e8_v_u8mf2_m(...) __riscv_vlseg7e8_v_u8mf2_tumu(__VA_ARGS__)
3109
#define vlseg8e8_v_u8mf2_m(...) __riscv_vlseg8e8_v_u8mf2_tumu(__VA_ARGS__)
3110
#define vlseg2e8_v_u8m1_m(...) __riscv_vlseg2e8_v_u8m1_tumu(__VA_ARGS__)
3111
#define vlseg3e8_v_u8m1_m(...) __riscv_vlseg3e8_v_u8m1_tumu(__VA_ARGS__)
3112
#define vlseg4e8_v_u8m1_m(...) __riscv_vlseg4e8_v_u8m1_tumu(__VA_ARGS__)
3113
#define vlseg5e8_v_u8m1_m(...) __riscv_vlseg5e8_v_u8m1_tumu(__VA_ARGS__)
3114
#define vlseg6e8_v_u8m1_m(...) __riscv_vlseg6e8_v_u8m1_tumu(__VA_ARGS__)
3115
#define vlseg7e8_v_u8m1_m(...) __riscv_vlseg7e8_v_u8m1_tumu(__VA_ARGS__)
3116
#define vlseg8e8_v_u8m1_m(...) __riscv_vlseg8e8_v_u8m1_tumu(__VA_ARGS__)
3117
#define vlseg2e8_v_u8m2_m(...) __riscv_vlseg2e8_v_u8m2_tumu(__VA_ARGS__)
3118
#define vlseg3e8_v_u8m2_m(...) __riscv_vlseg3e8_v_u8m2_tumu(__VA_ARGS__)
3119
#define vlseg4e8_v_u8m2_m(...) __riscv_vlseg4e8_v_u8m2_tumu(__VA_ARGS__)
3120
#define vlseg2e8_v_u8m4_m(...) __riscv_vlseg2e8_v_u8m4_tumu(__VA_ARGS__)
3121
#define vlseg2e16_v_u16mf4_m(...) __riscv_vlseg2e16_v_u16mf4_tumu(__VA_ARGS__)
3122
#define vlseg3e16_v_u16mf4_m(...) __riscv_vlseg3e16_v_u16mf4_tumu(__VA_ARGS__)
3123
#define vlseg4e16_v_u16mf4_m(...) __riscv_vlseg4e16_v_u16mf4_tumu(__VA_ARGS__)
3124
#define vlseg5e16_v_u16mf4_m(...) __riscv_vlseg5e16_v_u16mf4_tumu(__VA_ARGS__)
3125
#define vlseg6e16_v_u16mf4_m(...) __riscv_vlseg6e16_v_u16mf4_tumu(__VA_ARGS__)
3126
#define vlseg7e16_v_u16mf4_m(...) __riscv_vlseg7e16_v_u16mf4_tumu(__VA_ARGS__)
3127
#define vlseg8e16_v_u16mf4_m(...) __riscv_vlseg8e16_v_u16mf4_tumu(__VA_ARGS__)
3128
#define vlseg2e16_v_u16mf2_m(...) __riscv_vlseg2e16_v_u16mf2_tumu(__VA_ARGS__)
3129
#define vlseg3e16_v_u16mf2_m(...) __riscv_vlseg3e16_v_u16mf2_tumu(__VA_ARGS__)
3130
#define vlseg4e16_v_u16mf2_m(...) __riscv_vlseg4e16_v_u16mf2_tumu(__VA_ARGS__)
3131
#define vlseg5e16_v_u16mf2_m(...) __riscv_vlseg5e16_v_u16mf2_tumu(__VA_ARGS__)
3132
#define vlseg6e16_v_u16mf2_m(...) __riscv_vlseg6e16_v_u16mf2_tumu(__VA_ARGS__)
3133
#define vlseg7e16_v_u16mf2_m(...) __riscv_vlseg7e16_v_u16mf2_tumu(__VA_ARGS__)
3134
#define vlseg8e16_v_u16mf2_m(...) __riscv_vlseg8e16_v_u16mf2_tumu(__VA_ARGS__)
3135
#define vlseg2e16_v_u16m1_m(...) __riscv_vlseg2e16_v_u16m1_tumu(__VA_ARGS__)
3136
#define vlseg3e16_v_u16m1_m(...) __riscv_vlseg3e16_v_u16m1_tumu(__VA_ARGS__)
3137
#define vlseg4e16_v_u16m1_m(...) __riscv_vlseg4e16_v_u16m1_tumu(__VA_ARGS__)
3138
#define vlseg5e16_v_u16m1_m(...) __riscv_vlseg5e16_v_u16m1_tumu(__VA_ARGS__)
3139
#define vlseg6e16_v_u16m1_m(...) __riscv_vlseg6e16_v_u16m1_tumu(__VA_ARGS__)
3140
#define vlseg7e16_v_u16m1_m(...) __riscv_vlseg7e16_v_u16m1_tumu(__VA_ARGS__)
3141
#define vlseg8e16_v_u16m1_m(...) __riscv_vlseg8e16_v_u16m1_tumu(__VA_ARGS__)
3142
#define vlseg2e16_v_u16m2_m(...) __riscv_vlseg2e16_v_u16m2_tumu(__VA_ARGS__)
3143
#define vlseg3e16_v_u16m2_m(...) __riscv_vlseg3e16_v_u16m2_tumu(__VA_ARGS__)
3144
#define vlseg4e16_v_u16m2_m(...) __riscv_vlseg4e16_v_u16m2_tumu(__VA_ARGS__)
3145
#define vlseg2e16_v_u16m4_m(...) __riscv_vlseg2e16_v_u16m4_tumu(__VA_ARGS__)
3146
#define vlseg2e32_v_u32mf2_m(...) __riscv_vlseg2e32_v_u32mf2_tumu(__VA_ARGS__)
3147
#define vlseg3e32_v_u32mf2_m(...) __riscv_vlseg3e32_v_u32mf2_tumu(__VA_ARGS__)
3148
#define vlseg4e32_v_u32mf2_m(...) __riscv_vlseg4e32_v_u32mf2_tumu(__VA_ARGS__)
3149
#define vlseg5e32_v_u32mf2_m(...) __riscv_vlseg5e32_v_u32mf2_tumu(__VA_ARGS__)
3150
#define vlseg6e32_v_u32mf2_m(...) __riscv_vlseg6e32_v_u32mf2_tumu(__VA_ARGS__)
3151
#define vlseg7e32_v_u32mf2_m(...) __riscv_vlseg7e32_v_u32mf2_tumu(__VA_ARGS__)
3152
#define vlseg8e32_v_u32mf2_m(...) __riscv_vlseg8e32_v_u32mf2_tumu(__VA_ARGS__)
3153
#define vlseg2e32_v_u32m1_m(...) __riscv_vlseg2e32_v_u32m1_tumu(__VA_ARGS__)
3154
#define vlseg3e32_v_u32m1_m(...) __riscv_vlseg3e32_v_u32m1_tumu(__VA_ARGS__)
3155
#define vlseg4e32_v_u32m1_m(...) __riscv_vlseg4e32_v_u32m1_tumu(__VA_ARGS__)
3156
#define vlseg5e32_v_u32m1_m(...) __riscv_vlseg5e32_v_u32m1_tumu(__VA_ARGS__)
3157
#define vlseg6e32_v_u32m1_m(...) __riscv_vlseg6e32_v_u32m1_tumu(__VA_ARGS__)
3158
#define vlseg7e32_v_u32m1_m(...) __riscv_vlseg7e32_v_u32m1_tumu(__VA_ARGS__)
3159
#define vlseg8e32_v_u32m1_m(...) __riscv_vlseg8e32_v_u32m1_tumu(__VA_ARGS__)
3160
#define vlseg2e32_v_u32m2_m(...) __riscv_vlseg2e32_v_u32m2_tumu(__VA_ARGS__)
3161
#define vlseg3e32_v_u32m2_m(...) __riscv_vlseg3e32_v_u32m2_tumu(__VA_ARGS__)
3162
#define vlseg4e32_v_u32m2_m(...) __riscv_vlseg4e32_v_u32m2_tumu(__VA_ARGS__)
3163
#define vlseg2e32_v_u32m4_m(...) __riscv_vlseg2e32_v_u32m4_tumu(__VA_ARGS__)
3164
#define vlseg2e64_v_u64m1_m(...) __riscv_vlseg2e64_v_u64m1_tumu(__VA_ARGS__)
3165
#define vlseg3e64_v_u64m1_m(...) __riscv_vlseg3e64_v_u64m1_tumu(__VA_ARGS__)
3166
#define vlseg4e64_v_u64m1_m(...) __riscv_vlseg4e64_v_u64m1_tumu(__VA_ARGS__)
3167
#define vlseg5e64_v_u64m1_m(...) __riscv_vlseg5e64_v_u64m1_tumu(__VA_ARGS__)
3168
#define vlseg6e64_v_u64m1_m(...) __riscv_vlseg6e64_v_u64m1_tumu(__VA_ARGS__)
3169
#define vlseg7e64_v_u64m1_m(...) __riscv_vlseg7e64_v_u64m1_tumu(__VA_ARGS__)
3170
#define vlseg8e64_v_u64m1_m(...) __riscv_vlseg8e64_v_u64m1_tumu(__VA_ARGS__)
3171
#define vlseg2e64_v_u64m2_m(...) __riscv_vlseg2e64_v_u64m2_tumu(__VA_ARGS__)
3172
#define vlseg3e64_v_u64m2_m(...) __riscv_vlseg3e64_v_u64m2_tumu(__VA_ARGS__)
3173
#define vlseg4e64_v_u64m2_m(...) __riscv_vlseg4e64_v_u64m2_tumu(__VA_ARGS__)
3174
#define vlseg2e64_v_u64m4_m(...) __riscv_vlseg2e64_v_u64m4_tumu(__VA_ARGS__)
3175
#define vlseg2e8ff_v_u8mf8_m(...) __riscv_vlseg2e8ff_v_u8mf8_tumu(__VA_ARGS__)
3176
#define vlseg3e8ff_v_u8mf8_m(...) __riscv_vlseg3e8ff_v_u8mf8_tumu(__VA_ARGS__)
3177
#define vlseg4e8ff_v_u8mf8_m(...) __riscv_vlseg4e8ff_v_u8mf8_tumu(__VA_ARGS__)
3178
#define vlseg5e8ff_v_u8mf8_m(...) __riscv_vlseg5e8ff_v_u8mf8_tumu(__VA_ARGS__)
3179
#define vlseg6e8ff_v_u8mf8_m(...) __riscv_vlseg6e8ff_v_u8mf8_tumu(__VA_ARGS__)
3180
#define vlseg7e8ff_v_u8mf8_m(...) __riscv_vlseg7e8ff_v_u8mf8_tumu(__VA_ARGS__)
3181
#define vlseg8e8ff_v_u8mf8_m(...) __riscv_vlseg8e8ff_v_u8mf8_tumu(__VA_ARGS__)
3182
#define vlseg2e8ff_v_u8mf4_m(...) __riscv_vlseg2e8ff_v_u8mf4_tumu(__VA_ARGS__)
3183
#define vlseg3e8ff_v_u8mf4_m(...) __riscv_vlseg3e8ff_v_u8mf4_tumu(__VA_ARGS__)
3184
#define vlseg4e8ff_v_u8mf4_m(...) __riscv_vlseg4e8ff_v_u8mf4_tumu(__VA_ARGS__)
3185
#define vlseg5e8ff_v_u8mf4_m(...) __riscv_vlseg5e8ff_v_u8mf4_tumu(__VA_ARGS__)
3186
#define vlseg6e8ff_v_u8mf4_m(...) __riscv_vlseg6e8ff_v_u8mf4_tumu(__VA_ARGS__)
3187
#define vlseg7e8ff_v_u8mf4_m(...) __riscv_vlseg7e8ff_v_u8mf4_tumu(__VA_ARGS__)
3188
#define vlseg8e8ff_v_u8mf4_m(...) __riscv_vlseg8e8ff_v_u8mf4_tumu(__VA_ARGS__)
3189
#define vlseg2e8ff_v_u8mf2_m(...) __riscv_vlseg2e8ff_v_u8mf2_tumu(__VA_ARGS__)
3190
#define vlseg3e8ff_v_u8mf2_m(...) __riscv_vlseg3e8ff_v_u8mf2_tumu(__VA_ARGS__)
3191
#define vlseg4e8ff_v_u8mf2_m(...) __riscv_vlseg4e8ff_v_u8mf2_tumu(__VA_ARGS__)
3192
#define vlseg5e8ff_v_u8mf2_m(...) __riscv_vlseg5e8ff_v_u8mf2_tumu(__VA_ARGS__)
3193
#define vlseg6e8ff_v_u8mf2_m(...) __riscv_vlseg6e8ff_v_u8mf2_tumu(__VA_ARGS__)
3194
#define vlseg7e8ff_v_u8mf2_m(...) __riscv_vlseg7e8ff_v_u8mf2_tumu(__VA_ARGS__)
3195
#define vlseg8e8ff_v_u8mf2_m(...) __riscv_vlseg8e8ff_v_u8mf2_tumu(__VA_ARGS__)
3196
#define vlseg2e8ff_v_u8m1_m(...) __riscv_vlseg2e8ff_v_u8m1_tumu(__VA_ARGS__)
3197
#define vlseg3e8ff_v_u8m1_m(...) __riscv_vlseg3e8ff_v_u8m1_tumu(__VA_ARGS__)
3198
#define vlseg4e8ff_v_u8m1_m(...) __riscv_vlseg4e8ff_v_u8m1_tumu(__VA_ARGS__)
3199
#define vlseg5e8ff_v_u8m1_m(...) __riscv_vlseg5e8ff_v_u8m1_tumu(__VA_ARGS__)
3200
#define vlseg6e8ff_v_u8m1_m(...) __riscv_vlseg6e8ff_v_u8m1_tumu(__VA_ARGS__)
3201
#define vlseg7e8ff_v_u8m1_m(...) __riscv_vlseg7e8ff_v_u8m1_tumu(__VA_ARGS__)
3202
#define vlseg8e8ff_v_u8m1_m(...) __riscv_vlseg8e8ff_v_u8m1_tumu(__VA_ARGS__)
3203
#define vlseg2e8ff_v_u8m2_m(...) __riscv_vlseg2e8ff_v_u8m2_tumu(__VA_ARGS__)
3204
#define vlseg3e8ff_v_u8m2_m(...) __riscv_vlseg3e8ff_v_u8m2_tumu(__VA_ARGS__)
3205
#define vlseg4e8ff_v_u8m2_m(...) __riscv_vlseg4e8ff_v_u8m2_tumu(__VA_ARGS__)
3206
#define vlseg2e8ff_v_u8m4_m(...) __riscv_vlseg2e8ff_v_u8m4_tumu(__VA_ARGS__)
3207
#define vlseg2e16ff_v_u16mf4_m(...) __riscv_vlseg2e16ff_v_u16mf4_tumu(__VA_ARGS__)
3208
#define vlseg3e16ff_v_u16mf4_m(...) __riscv_vlseg3e16ff_v_u16mf4_tumu(__VA_ARGS__)
3209
#define vlseg4e16ff_v_u16mf4_m(...) __riscv_vlseg4e16ff_v_u16mf4_tumu(__VA_ARGS__)
3210
#define vlseg5e16ff_v_u16mf4_m(...) __riscv_vlseg5e16ff_v_u16mf4_tumu(__VA_ARGS__)
3211
#define vlseg6e16ff_v_u16mf4_m(...) __riscv_vlseg6e16ff_v_u16mf4_tumu(__VA_ARGS__)
3212
#define vlseg7e16ff_v_u16mf4_m(...) __riscv_vlseg7e16ff_v_u16mf4_tumu(__VA_ARGS__)
3213
#define vlseg8e16ff_v_u16mf4_m(...) __riscv_vlseg8e16ff_v_u16mf4_tumu(__VA_ARGS__)
3214
#define vlseg2e16ff_v_u16mf2_m(...) __riscv_vlseg2e16ff_v_u16mf2_tumu(__VA_ARGS__)
3215
#define vlseg3e16ff_v_u16mf2_m(...) __riscv_vlseg3e16ff_v_u16mf2_tumu(__VA_ARGS__)
3216
#define vlseg4e16ff_v_u16mf2_m(...) __riscv_vlseg4e16ff_v_u16mf2_tumu(__VA_ARGS__)
3217
#define vlseg5e16ff_v_u16mf2_m(...) __riscv_vlseg5e16ff_v_u16mf2_tumu(__VA_ARGS__)
3218
#define vlseg6e16ff_v_u16mf2_m(...) __riscv_vlseg6e16ff_v_u16mf2_tumu(__VA_ARGS__)
3219
#define vlseg7e16ff_v_u16mf2_m(...) __riscv_vlseg7e16ff_v_u16mf2_tumu(__VA_ARGS__)
3220
#define vlseg8e16ff_v_u16mf2_m(...) __riscv_vlseg8e16ff_v_u16mf2_tumu(__VA_ARGS__)
3221
#define vlseg2e16ff_v_u16m1_m(...) __riscv_vlseg2e16ff_v_u16m1_tumu(__VA_ARGS__)
3222
#define vlseg3e16ff_v_u16m1_m(...) __riscv_vlseg3e16ff_v_u16m1_tumu(__VA_ARGS__)
3223
#define vlseg4e16ff_v_u16m1_m(...) __riscv_vlseg4e16ff_v_u16m1_tumu(__VA_ARGS__)
3224
#define vlseg5e16ff_v_u16m1_m(...) __riscv_vlseg5e16ff_v_u16m1_tumu(__VA_ARGS__)
3225
#define vlseg6e16ff_v_u16m1_m(...) __riscv_vlseg6e16ff_v_u16m1_tumu(__VA_ARGS__)
3226
#define vlseg7e16ff_v_u16m1_m(...) __riscv_vlseg7e16ff_v_u16m1_tumu(__VA_ARGS__)
3227
#define vlseg8e16ff_v_u16m1_m(...) __riscv_vlseg8e16ff_v_u16m1_tumu(__VA_ARGS__)
3228
#define vlseg2e16ff_v_u16m2_m(...) __riscv_vlseg2e16ff_v_u16m2_tumu(__VA_ARGS__)
3229
#define vlseg3e16ff_v_u16m2_m(...) __riscv_vlseg3e16ff_v_u16m2_tumu(__VA_ARGS__)
3230
#define vlseg4e16ff_v_u16m2_m(...) __riscv_vlseg4e16ff_v_u16m2_tumu(__VA_ARGS__)
3231
#define vlseg2e16ff_v_u16m4_m(...) __riscv_vlseg2e16ff_v_u16m4_tumu(__VA_ARGS__)
3232
#define vlseg2e32ff_v_u32mf2_m(...) __riscv_vlseg2e32ff_v_u32mf2_tumu(__VA_ARGS__)
3233
#define vlseg3e32ff_v_u32mf2_m(...) __riscv_vlseg3e32ff_v_u32mf2_tumu(__VA_ARGS__)
3234
#define vlseg4e32ff_v_u32mf2_m(...) __riscv_vlseg4e32ff_v_u32mf2_tumu(__VA_ARGS__)
3235
#define vlseg5e32ff_v_u32mf2_m(...) __riscv_vlseg5e32ff_v_u32mf2_tumu(__VA_ARGS__)
3236
#define vlseg6e32ff_v_u32mf2_m(...) __riscv_vlseg6e32ff_v_u32mf2_tumu(__VA_ARGS__)
3237
#define vlseg7e32ff_v_u32mf2_m(...) __riscv_vlseg7e32ff_v_u32mf2_tumu(__VA_ARGS__)
3238
#define vlseg8e32ff_v_u32mf2_m(...) __riscv_vlseg8e32ff_v_u32mf2_tumu(__VA_ARGS__)
3239
#define vlseg2e32ff_v_u32m1_m(...) __riscv_vlseg2e32ff_v_u32m1_tumu(__VA_ARGS__)
3240
#define vlseg3e32ff_v_u32m1_m(...) __riscv_vlseg3e32ff_v_u32m1_tumu(__VA_ARGS__)
3241
#define vlseg4e32ff_v_u32m1_m(...) __riscv_vlseg4e32ff_v_u32m1_tumu(__VA_ARGS__)
3242
#define vlseg5e32ff_v_u32m1_m(...) __riscv_vlseg5e32ff_v_u32m1_tumu(__VA_ARGS__)
3243
#define vlseg6e32ff_v_u32m1_m(...) __riscv_vlseg6e32ff_v_u32m1_tumu(__VA_ARGS__)
3244
#define vlseg7e32ff_v_u32m1_m(...) __riscv_vlseg7e32ff_v_u32m1_tumu(__VA_ARGS__)
3245
#define vlseg8e32ff_v_u32m1_m(...) __riscv_vlseg8e32ff_v_u32m1_tumu(__VA_ARGS__)
3246
#define vlseg2e32ff_v_u32m2_m(...) __riscv_vlseg2e32ff_v_u32m2_tumu(__VA_ARGS__)
3247
#define vlseg3e32ff_v_u32m2_m(...) __riscv_vlseg3e32ff_v_u32m2_tumu(__VA_ARGS__)
3248
#define vlseg4e32ff_v_u32m2_m(...) __riscv_vlseg4e32ff_v_u32m2_tumu(__VA_ARGS__)
3249
#define vlseg2e32ff_v_u32m4_m(...) __riscv_vlseg2e32ff_v_u32m4_tumu(__VA_ARGS__)
3250
#define vlseg2e64ff_v_u64m1_m(...) __riscv_vlseg2e64ff_v_u64m1_tumu(__VA_ARGS__)
3251
#define vlseg3e64ff_v_u64m1_m(...) __riscv_vlseg3e64ff_v_u64m1_tumu(__VA_ARGS__)
3252
#define vlseg4e64ff_v_u64m1_m(...) __riscv_vlseg4e64ff_v_u64m1_tumu(__VA_ARGS__)
3253
#define vlseg5e64ff_v_u64m1_m(...) __riscv_vlseg5e64ff_v_u64m1_tumu(__VA_ARGS__)
3254
#define vlseg6e64ff_v_u64m1_m(...) __riscv_vlseg6e64ff_v_u64m1_tumu(__VA_ARGS__)
3255
#define vlseg7e64ff_v_u64m1_m(...) __riscv_vlseg7e64ff_v_u64m1_tumu(__VA_ARGS__)
3256
#define vlseg8e64ff_v_u64m1_m(...) __riscv_vlseg8e64ff_v_u64m1_tumu(__VA_ARGS__)
3257
#define vlseg2e64ff_v_u64m2_m(...) __riscv_vlseg2e64ff_v_u64m2_tumu(__VA_ARGS__)
3258
#define vlseg3e64ff_v_u64m2_m(...) __riscv_vlseg3e64ff_v_u64m2_tumu(__VA_ARGS__)
3259
#define vlseg4e64ff_v_u64m2_m(...) __riscv_vlseg4e64ff_v_u64m2_tumu(__VA_ARGS__)
3260
#define vlseg2e64ff_v_u64m4_m(...) __riscv_vlseg2e64ff_v_u64m4_tumu(__VA_ARGS__)
3261
#define vsseg2e16_v_f16mf4(...) __riscv_vsseg2e16_v_f16mf4(__VA_ARGS__)
3262
#define vsseg3e16_v_f16mf4(...) __riscv_vsseg3e16_v_f16mf4(__VA_ARGS__)
3263
#define vsseg4e16_v_f16mf4(...) __riscv_vsseg4e16_v_f16mf4(__VA_ARGS__)
3264
#define vsseg5e16_v_f16mf4(...) __riscv_vsseg5e16_v_f16mf4(__VA_ARGS__)
3265
#define vsseg6e16_v_f16mf4(...) __riscv_vsseg6e16_v_f16mf4(__VA_ARGS__)
3266
#define vsseg7e16_v_f16mf4(...) __riscv_vsseg7e16_v_f16mf4(__VA_ARGS__)
3267
#define vsseg8e16_v_f16mf4(...) __riscv_vsseg8e16_v_f16mf4(__VA_ARGS__)
3268
#define vsseg2e16_v_f16mf2(...) __riscv_vsseg2e16_v_f16mf2(__VA_ARGS__)
3269
#define vsseg3e16_v_f16mf2(...) __riscv_vsseg3e16_v_f16mf2(__VA_ARGS__)
3270
#define vsseg4e16_v_f16mf2(...) __riscv_vsseg4e16_v_f16mf2(__VA_ARGS__)
3271
#define vsseg5e16_v_f16mf2(...) __riscv_vsseg5e16_v_f16mf2(__VA_ARGS__)
3272
#define vsseg6e16_v_f16mf2(...) __riscv_vsseg6e16_v_f16mf2(__VA_ARGS__)
3273
#define vsseg7e16_v_f16mf2(...) __riscv_vsseg7e16_v_f16mf2(__VA_ARGS__)
3274
#define vsseg8e16_v_f16mf2(...) __riscv_vsseg8e16_v_f16mf2(__VA_ARGS__)
3275
#define vsseg2e16_v_f16m1(...) __riscv_vsseg2e16_v_f16m1(__VA_ARGS__)
3276
#define vsseg3e16_v_f16m1(...) __riscv_vsseg3e16_v_f16m1(__VA_ARGS__)
3277
#define vsseg4e16_v_f16m1(...) __riscv_vsseg4e16_v_f16m1(__VA_ARGS__)
3278
#define vsseg5e16_v_f16m1(...) __riscv_vsseg5e16_v_f16m1(__VA_ARGS__)
3279
#define vsseg6e16_v_f16m1(...) __riscv_vsseg6e16_v_f16m1(__VA_ARGS__)
3280
#define vsseg7e16_v_f16m1(...) __riscv_vsseg7e16_v_f16m1(__VA_ARGS__)
3281
#define vsseg8e16_v_f16m1(...) __riscv_vsseg8e16_v_f16m1(__VA_ARGS__)
3282
#define vsseg2e16_v_f16m2(...) __riscv_vsseg2e16_v_f16m2(__VA_ARGS__)
3283
#define vsseg3e16_v_f16m2(...) __riscv_vsseg3e16_v_f16m2(__VA_ARGS__)
3284
#define vsseg4e16_v_f16m2(...) __riscv_vsseg4e16_v_f16m2(__VA_ARGS__)
3285
#define vsseg2e16_v_f16m4(...) __riscv_vsseg2e16_v_f16m4(__VA_ARGS__)
3286
#define vsseg2e32_v_f32mf2(...) __riscv_vsseg2e32_v_f32mf2(__VA_ARGS__)
3287
#define vsseg3e32_v_f32mf2(...) __riscv_vsseg3e32_v_f32mf2(__VA_ARGS__)
3288
#define vsseg4e32_v_f32mf2(...) __riscv_vsseg4e32_v_f32mf2(__VA_ARGS__)
3289
#define vsseg5e32_v_f32mf2(...) __riscv_vsseg5e32_v_f32mf2(__VA_ARGS__)
3290
#define vsseg6e32_v_f32mf2(...) __riscv_vsseg6e32_v_f32mf2(__VA_ARGS__)
3291
#define vsseg7e32_v_f32mf2(...) __riscv_vsseg7e32_v_f32mf2(__VA_ARGS__)
3292
#define vsseg8e32_v_f32mf2(...) __riscv_vsseg8e32_v_f32mf2(__VA_ARGS__)
3293
#define vsseg2e32_v_f32m1(...) __riscv_vsseg2e32_v_f32m1(__VA_ARGS__)
3294
#define vsseg3e32_v_f32m1(...) __riscv_vsseg3e32_v_f32m1(__VA_ARGS__)
3295
#define vsseg4e32_v_f32m1(...) __riscv_vsseg4e32_v_f32m1(__VA_ARGS__)
3296
#define vsseg5e32_v_f32m1(...) __riscv_vsseg5e32_v_f32m1(__VA_ARGS__)
3297
#define vsseg6e32_v_f32m1(...) __riscv_vsseg6e32_v_f32m1(__VA_ARGS__)
3298
#define vsseg7e32_v_f32m1(...) __riscv_vsseg7e32_v_f32m1(__VA_ARGS__)
3299
#define vsseg8e32_v_f32m1(...) __riscv_vsseg8e32_v_f32m1(__VA_ARGS__)
3300
#define vsseg2e32_v_f32m2(...) __riscv_vsseg2e32_v_f32m2(__VA_ARGS__)
3301
#define vsseg3e32_v_f32m2(...) __riscv_vsseg3e32_v_f32m2(__VA_ARGS__)
3302
#define vsseg4e32_v_f32m2(...) __riscv_vsseg4e32_v_f32m2(__VA_ARGS__)
3303
#define vsseg2e32_v_f32m4(...) __riscv_vsseg2e32_v_f32m4(__VA_ARGS__)
3304
#define vsseg2e64_v_f64m1(...) __riscv_vsseg2e64_v_f64m1(__VA_ARGS__)
3305
#define vsseg3e64_v_f64m1(...) __riscv_vsseg3e64_v_f64m1(__VA_ARGS__)
3306
#define vsseg4e64_v_f64m1(...) __riscv_vsseg4e64_v_f64m1(__VA_ARGS__)
3307
#define vsseg5e64_v_f64m1(...) __riscv_vsseg5e64_v_f64m1(__VA_ARGS__)
3308
#define vsseg6e64_v_f64m1(...) __riscv_vsseg6e64_v_f64m1(__VA_ARGS__)
3309
#define vsseg7e64_v_f64m1(...) __riscv_vsseg7e64_v_f64m1(__VA_ARGS__)
3310
#define vsseg8e64_v_f64m1(...) __riscv_vsseg8e64_v_f64m1(__VA_ARGS__)
3311
#define vsseg2e64_v_f64m2(...) __riscv_vsseg2e64_v_f64m2(__VA_ARGS__)
3312
#define vsseg3e64_v_f64m2(...) __riscv_vsseg3e64_v_f64m2(__VA_ARGS__)
3313
#define vsseg4e64_v_f64m2(...) __riscv_vsseg4e64_v_f64m2(__VA_ARGS__)
3314
#define vsseg2e64_v_f64m4(...) __riscv_vsseg2e64_v_f64m4(__VA_ARGS__)
3315
#define vsseg2e8_v_i8mf8(...) __riscv_vsseg2e8_v_i8mf8(__VA_ARGS__)
3316
#define vsseg3e8_v_i8mf8(...) __riscv_vsseg3e8_v_i8mf8(__VA_ARGS__)
3317
#define vsseg4e8_v_i8mf8(...) __riscv_vsseg4e8_v_i8mf8(__VA_ARGS__)
3318
#define vsseg5e8_v_i8mf8(...) __riscv_vsseg5e8_v_i8mf8(__VA_ARGS__)
3319
#define vsseg6e8_v_i8mf8(...) __riscv_vsseg6e8_v_i8mf8(__VA_ARGS__)
3320
#define vsseg7e8_v_i8mf8(...) __riscv_vsseg7e8_v_i8mf8(__VA_ARGS__)
3321
#define vsseg8e8_v_i8mf8(...) __riscv_vsseg8e8_v_i8mf8(__VA_ARGS__)
3322
#define vsseg2e8_v_i8mf4(...) __riscv_vsseg2e8_v_i8mf4(__VA_ARGS__)
3323
#define vsseg3e8_v_i8mf4(...) __riscv_vsseg3e8_v_i8mf4(__VA_ARGS__)
3324
#define vsseg4e8_v_i8mf4(...) __riscv_vsseg4e8_v_i8mf4(__VA_ARGS__)
3325
#define vsseg5e8_v_i8mf4(...) __riscv_vsseg5e8_v_i8mf4(__VA_ARGS__)
3326
#define vsseg6e8_v_i8mf4(...) __riscv_vsseg6e8_v_i8mf4(__VA_ARGS__)
3327
#define vsseg7e8_v_i8mf4(...) __riscv_vsseg7e8_v_i8mf4(__VA_ARGS__)
3328
#define vsseg8e8_v_i8mf4(...) __riscv_vsseg8e8_v_i8mf4(__VA_ARGS__)
3329
#define vsseg2e8_v_i8mf2(...) __riscv_vsseg2e8_v_i8mf2(__VA_ARGS__)
3330
#define vsseg3e8_v_i8mf2(...) __riscv_vsseg3e8_v_i8mf2(__VA_ARGS__)
3331
#define vsseg4e8_v_i8mf2(...) __riscv_vsseg4e8_v_i8mf2(__VA_ARGS__)
3332
#define vsseg5e8_v_i8mf2(...) __riscv_vsseg5e8_v_i8mf2(__VA_ARGS__)
3333
#define vsseg6e8_v_i8mf2(...) __riscv_vsseg6e8_v_i8mf2(__VA_ARGS__)
3334
#define vsseg7e8_v_i8mf2(...) __riscv_vsseg7e8_v_i8mf2(__VA_ARGS__)
3335
#define vsseg8e8_v_i8mf2(...) __riscv_vsseg8e8_v_i8mf2(__VA_ARGS__)
3336
#define vsseg2e8_v_i8m1(...) __riscv_vsseg2e8_v_i8m1(__VA_ARGS__)
3337
#define vsseg3e8_v_i8m1(...) __riscv_vsseg3e8_v_i8m1(__VA_ARGS__)
3338
#define vsseg4e8_v_i8m1(...) __riscv_vsseg4e8_v_i8m1(__VA_ARGS__)
3339
#define vsseg5e8_v_i8m1(...) __riscv_vsseg5e8_v_i8m1(__VA_ARGS__)
3340
#define vsseg6e8_v_i8m1(...) __riscv_vsseg6e8_v_i8m1(__VA_ARGS__)
3341
#define vsseg7e8_v_i8m1(...) __riscv_vsseg7e8_v_i8m1(__VA_ARGS__)
3342
#define vsseg8e8_v_i8m1(...) __riscv_vsseg8e8_v_i8m1(__VA_ARGS__)
3343
#define vsseg2e8_v_i8m2(...) __riscv_vsseg2e8_v_i8m2(__VA_ARGS__)
3344
#define vsseg3e8_v_i8m2(...) __riscv_vsseg3e8_v_i8m2(__VA_ARGS__)
3345
#define vsseg4e8_v_i8m2(...) __riscv_vsseg4e8_v_i8m2(__VA_ARGS__)
3346
#define vsseg2e8_v_i8m4(...) __riscv_vsseg2e8_v_i8m4(__VA_ARGS__)
3347
#define vsseg2e16_v_i16mf4(...) __riscv_vsseg2e16_v_i16mf4(__VA_ARGS__)
3348
#define vsseg3e16_v_i16mf4(...) __riscv_vsseg3e16_v_i16mf4(__VA_ARGS__)
3349
#define vsseg4e16_v_i16mf4(...) __riscv_vsseg4e16_v_i16mf4(__VA_ARGS__)
3350
#define vsseg5e16_v_i16mf4(...) __riscv_vsseg5e16_v_i16mf4(__VA_ARGS__)
3351
#define vsseg6e16_v_i16mf4(...) __riscv_vsseg6e16_v_i16mf4(__VA_ARGS__)
3352
#define vsseg7e16_v_i16mf4(...) __riscv_vsseg7e16_v_i16mf4(__VA_ARGS__)
3353
#define vsseg8e16_v_i16mf4(...) __riscv_vsseg8e16_v_i16mf4(__VA_ARGS__)
3354
#define vsseg2e16_v_i16mf2(...) __riscv_vsseg2e16_v_i16mf2(__VA_ARGS__)
3355
#define vsseg3e16_v_i16mf2(...) __riscv_vsseg3e16_v_i16mf2(__VA_ARGS__)
3356
#define vsseg4e16_v_i16mf2(...) __riscv_vsseg4e16_v_i16mf2(__VA_ARGS__)
3357
#define vsseg5e16_v_i16mf2(...) __riscv_vsseg5e16_v_i16mf2(__VA_ARGS__)
3358
#define vsseg6e16_v_i16mf2(...) __riscv_vsseg6e16_v_i16mf2(__VA_ARGS__)
3359
#define vsseg7e16_v_i16mf2(...) __riscv_vsseg7e16_v_i16mf2(__VA_ARGS__)
3360
#define vsseg8e16_v_i16mf2(...) __riscv_vsseg8e16_v_i16mf2(__VA_ARGS__)
3361
#define vsseg2e16_v_i16m1(...) __riscv_vsseg2e16_v_i16m1(__VA_ARGS__)
3362
#define vsseg3e16_v_i16m1(...) __riscv_vsseg3e16_v_i16m1(__VA_ARGS__)
3363
#define vsseg4e16_v_i16m1(...) __riscv_vsseg4e16_v_i16m1(__VA_ARGS__)
3364
#define vsseg5e16_v_i16m1(...) __riscv_vsseg5e16_v_i16m1(__VA_ARGS__)
3365
#define vsseg6e16_v_i16m1(...) __riscv_vsseg6e16_v_i16m1(__VA_ARGS__)
3366
#define vsseg7e16_v_i16m1(...) __riscv_vsseg7e16_v_i16m1(__VA_ARGS__)
3367
#define vsseg8e16_v_i16m1(...) __riscv_vsseg8e16_v_i16m1(__VA_ARGS__)
3368
#define vsseg2e16_v_i16m2(...) __riscv_vsseg2e16_v_i16m2(__VA_ARGS__)
3369
#define vsseg3e16_v_i16m2(...) __riscv_vsseg3e16_v_i16m2(__VA_ARGS__)
3370
#define vsseg4e16_v_i16m2(...) __riscv_vsseg4e16_v_i16m2(__VA_ARGS__)
3371
#define vsseg2e16_v_i16m4(...) __riscv_vsseg2e16_v_i16m4(__VA_ARGS__)
3372
#define vsseg2e32_v_i32mf2(...) __riscv_vsseg2e32_v_i32mf2(__VA_ARGS__)
3373
#define vsseg3e32_v_i32mf2(...) __riscv_vsseg3e32_v_i32mf2(__VA_ARGS__)
3374
#define vsseg4e32_v_i32mf2(...) __riscv_vsseg4e32_v_i32mf2(__VA_ARGS__)
3375
#define vsseg5e32_v_i32mf2(...) __riscv_vsseg5e32_v_i32mf2(__VA_ARGS__)
3376
#define vsseg6e32_v_i32mf2(...) __riscv_vsseg6e32_v_i32mf2(__VA_ARGS__)
3377
#define vsseg7e32_v_i32mf2(...) __riscv_vsseg7e32_v_i32mf2(__VA_ARGS__)
3378
#define vsseg8e32_v_i32mf2(...) __riscv_vsseg8e32_v_i32mf2(__VA_ARGS__)
3379
#define vsseg2e32_v_i32m1(...) __riscv_vsseg2e32_v_i32m1(__VA_ARGS__)
3380
#define vsseg3e32_v_i32m1(...) __riscv_vsseg3e32_v_i32m1(__VA_ARGS__)
3381
#define vsseg4e32_v_i32m1(...) __riscv_vsseg4e32_v_i32m1(__VA_ARGS__)
3382
#define vsseg5e32_v_i32m1(...) __riscv_vsseg5e32_v_i32m1(__VA_ARGS__)
3383
#define vsseg6e32_v_i32m1(...) __riscv_vsseg6e32_v_i32m1(__VA_ARGS__)
3384
#define vsseg7e32_v_i32m1(...) __riscv_vsseg7e32_v_i32m1(__VA_ARGS__)
3385
#define vsseg8e32_v_i32m1(...) __riscv_vsseg8e32_v_i32m1(__VA_ARGS__)
3386
#define vsseg2e32_v_i32m2(...) __riscv_vsseg2e32_v_i32m2(__VA_ARGS__)
3387
#define vsseg3e32_v_i32m2(...) __riscv_vsseg3e32_v_i32m2(__VA_ARGS__)
3388
#define vsseg4e32_v_i32m2(...) __riscv_vsseg4e32_v_i32m2(__VA_ARGS__)
3389
#define vsseg2e32_v_i32m4(...) __riscv_vsseg2e32_v_i32m4(__VA_ARGS__)
3390
#define vsseg2e64_v_i64m1(...) __riscv_vsseg2e64_v_i64m1(__VA_ARGS__)
3391
#define vsseg3e64_v_i64m1(...) __riscv_vsseg3e64_v_i64m1(__VA_ARGS__)
3392
#define vsseg4e64_v_i64m1(...) __riscv_vsseg4e64_v_i64m1(__VA_ARGS__)
3393
#define vsseg5e64_v_i64m1(...) __riscv_vsseg5e64_v_i64m1(__VA_ARGS__)
3394
#define vsseg6e64_v_i64m1(...) __riscv_vsseg6e64_v_i64m1(__VA_ARGS__)
3395
#define vsseg7e64_v_i64m1(...) __riscv_vsseg7e64_v_i64m1(__VA_ARGS__)
3396
#define vsseg8e64_v_i64m1(...) __riscv_vsseg8e64_v_i64m1(__VA_ARGS__)
3397
#define vsseg2e64_v_i64m2(...) __riscv_vsseg2e64_v_i64m2(__VA_ARGS__)
3398
#define vsseg3e64_v_i64m2(...) __riscv_vsseg3e64_v_i64m2(__VA_ARGS__)
3399
#define vsseg4e64_v_i64m2(...) __riscv_vsseg4e64_v_i64m2(__VA_ARGS__)
3400
#define vsseg2e64_v_i64m4(...) __riscv_vsseg2e64_v_i64m4(__VA_ARGS__)
3401
#define vsseg2e8_v_u8mf8(...) __riscv_vsseg2e8_v_u8mf8(__VA_ARGS__)
3402
#define vsseg3e8_v_u8mf8(...) __riscv_vsseg3e8_v_u8mf8(__VA_ARGS__)
3403
#define vsseg4e8_v_u8mf8(...) __riscv_vsseg4e8_v_u8mf8(__VA_ARGS__)
3404
#define vsseg5e8_v_u8mf8(...) __riscv_vsseg5e8_v_u8mf8(__VA_ARGS__)
3405
#define vsseg6e8_v_u8mf8(...) __riscv_vsseg6e8_v_u8mf8(__VA_ARGS__)
3406
#define vsseg7e8_v_u8mf8(...) __riscv_vsseg7e8_v_u8mf8(__VA_ARGS__)
3407
#define vsseg8e8_v_u8mf8(...) __riscv_vsseg8e8_v_u8mf8(__VA_ARGS__)
3408
#define vsseg2e8_v_u8mf4(...) __riscv_vsseg2e8_v_u8mf4(__VA_ARGS__)
3409
#define vsseg3e8_v_u8mf4(...) __riscv_vsseg3e8_v_u8mf4(__VA_ARGS__)
3410
#define vsseg4e8_v_u8mf4(...) __riscv_vsseg4e8_v_u8mf4(__VA_ARGS__)
3411
#define vsseg5e8_v_u8mf4(...) __riscv_vsseg5e8_v_u8mf4(__VA_ARGS__)
3412
#define vsseg6e8_v_u8mf4(...) __riscv_vsseg6e8_v_u8mf4(__VA_ARGS__)
3413
#define vsseg7e8_v_u8mf4(...) __riscv_vsseg7e8_v_u8mf4(__VA_ARGS__)
3414
#define vsseg8e8_v_u8mf4(...) __riscv_vsseg8e8_v_u8mf4(__VA_ARGS__)
3415
#define vsseg2e8_v_u8mf2(...) __riscv_vsseg2e8_v_u8mf2(__VA_ARGS__)
3416
#define vsseg3e8_v_u8mf2(...) __riscv_vsseg3e8_v_u8mf2(__VA_ARGS__)
3417
#define vsseg4e8_v_u8mf2(...) __riscv_vsseg4e8_v_u8mf2(__VA_ARGS__)
3418
#define vsseg5e8_v_u8mf2(...) __riscv_vsseg5e8_v_u8mf2(__VA_ARGS__)
3419
#define vsseg6e8_v_u8mf2(...) __riscv_vsseg6e8_v_u8mf2(__VA_ARGS__)
3420
#define vsseg7e8_v_u8mf2(...) __riscv_vsseg7e8_v_u8mf2(__VA_ARGS__)
3421
#define vsseg8e8_v_u8mf2(...) __riscv_vsseg8e8_v_u8mf2(__VA_ARGS__)
3422
#define vsseg2e8_v_u8m1(...) __riscv_vsseg2e8_v_u8m1(__VA_ARGS__)
3423
#define vsseg3e8_v_u8m1(...) __riscv_vsseg3e8_v_u8m1(__VA_ARGS__)
3424
#define vsseg4e8_v_u8m1(...) __riscv_vsseg4e8_v_u8m1(__VA_ARGS__)
3425
#define vsseg5e8_v_u8m1(...) __riscv_vsseg5e8_v_u8m1(__VA_ARGS__)
3426
#define vsseg6e8_v_u8m1(...) __riscv_vsseg6e8_v_u8m1(__VA_ARGS__)
3427
#define vsseg7e8_v_u8m1(...) __riscv_vsseg7e8_v_u8m1(__VA_ARGS__)
3428
#define vsseg8e8_v_u8m1(...) __riscv_vsseg8e8_v_u8m1(__VA_ARGS__)
3429
#define vsseg2e8_v_u8m2(...) __riscv_vsseg2e8_v_u8m2(__VA_ARGS__)
3430
#define vsseg3e8_v_u8m2(...) __riscv_vsseg3e8_v_u8m2(__VA_ARGS__)
3431
#define vsseg4e8_v_u8m2(...) __riscv_vsseg4e8_v_u8m2(__VA_ARGS__)
3432
#define vsseg2e8_v_u8m4(...) __riscv_vsseg2e8_v_u8m4(__VA_ARGS__)
3433
#define vsseg2e16_v_u16mf4(...) __riscv_vsseg2e16_v_u16mf4(__VA_ARGS__)
3434
#define vsseg3e16_v_u16mf4(...) __riscv_vsseg3e16_v_u16mf4(__VA_ARGS__)
3435
#define vsseg4e16_v_u16mf4(...) __riscv_vsseg4e16_v_u16mf4(__VA_ARGS__)
3436
#define vsseg5e16_v_u16mf4(...) __riscv_vsseg5e16_v_u16mf4(__VA_ARGS__)
3437
#define vsseg6e16_v_u16mf4(...) __riscv_vsseg6e16_v_u16mf4(__VA_ARGS__)
3438
#define vsseg7e16_v_u16mf4(...) __riscv_vsseg7e16_v_u16mf4(__VA_ARGS__)
3439
#define vsseg8e16_v_u16mf4(...) __riscv_vsseg8e16_v_u16mf4(__VA_ARGS__)
3440
#define vsseg2e16_v_u16mf2(...) __riscv_vsseg2e16_v_u16mf2(__VA_ARGS__)
3441
#define vsseg3e16_v_u16mf2(...) __riscv_vsseg3e16_v_u16mf2(__VA_ARGS__)
3442
#define vsseg4e16_v_u16mf2(...) __riscv_vsseg4e16_v_u16mf2(__VA_ARGS__)
3443
#define vsseg5e16_v_u16mf2(...) __riscv_vsseg5e16_v_u16mf2(__VA_ARGS__)
3444
#define vsseg6e16_v_u16mf2(...) __riscv_vsseg6e16_v_u16mf2(__VA_ARGS__)
3445
#define vsseg7e16_v_u16mf2(...) __riscv_vsseg7e16_v_u16mf2(__VA_ARGS__)
3446
#define vsseg8e16_v_u16mf2(...) __riscv_vsseg8e16_v_u16mf2(__VA_ARGS__)
3447
#define vsseg2e16_v_u16m1(...) __riscv_vsseg2e16_v_u16m1(__VA_ARGS__)
3448
#define vsseg3e16_v_u16m1(...) __riscv_vsseg3e16_v_u16m1(__VA_ARGS__)
3449
#define vsseg4e16_v_u16m1(...) __riscv_vsseg4e16_v_u16m1(__VA_ARGS__)
3450
#define vsseg5e16_v_u16m1(...) __riscv_vsseg5e16_v_u16m1(__VA_ARGS__)
3451
#define vsseg6e16_v_u16m1(...) __riscv_vsseg6e16_v_u16m1(__VA_ARGS__)
3452
#define vsseg7e16_v_u16m1(...) __riscv_vsseg7e16_v_u16m1(__VA_ARGS__)
3453
#define vsseg8e16_v_u16m1(...) __riscv_vsseg8e16_v_u16m1(__VA_ARGS__)
3454
#define vsseg2e16_v_u16m2(...) __riscv_vsseg2e16_v_u16m2(__VA_ARGS__)
3455
#define vsseg3e16_v_u16m2(...) __riscv_vsseg3e16_v_u16m2(__VA_ARGS__)
3456
#define vsseg4e16_v_u16m2(...) __riscv_vsseg4e16_v_u16m2(__VA_ARGS__)
3457
#define vsseg2e16_v_u16m4(...) __riscv_vsseg2e16_v_u16m4(__VA_ARGS__)
3458
#define vsseg2e32_v_u32mf2(...) __riscv_vsseg2e32_v_u32mf2(__VA_ARGS__)
3459
#define vsseg3e32_v_u32mf2(...) __riscv_vsseg3e32_v_u32mf2(__VA_ARGS__)
3460
#define vsseg4e32_v_u32mf2(...) __riscv_vsseg4e32_v_u32mf2(__VA_ARGS__)
3461
#define vsseg5e32_v_u32mf2(...) __riscv_vsseg5e32_v_u32mf2(__VA_ARGS__)
3462
#define vsseg6e32_v_u32mf2(...) __riscv_vsseg6e32_v_u32mf2(__VA_ARGS__)
3463
#define vsseg7e32_v_u32mf2(...) __riscv_vsseg7e32_v_u32mf2(__VA_ARGS__)
3464
#define vsseg8e32_v_u32mf2(...) __riscv_vsseg8e32_v_u32mf2(__VA_ARGS__)
3465
#define vsseg2e32_v_u32m1(...) __riscv_vsseg2e32_v_u32m1(__VA_ARGS__)
3466
#define vsseg3e32_v_u32m1(...) __riscv_vsseg3e32_v_u32m1(__VA_ARGS__)
3467
#define vsseg4e32_v_u32m1(...) __riscv_vsseg4e32_v_u32m1(__VA_ARGS__)
3468
#define vsseg5e32_v_u32m1(...) __riscv_vsseg5e32_v_u32m1(__VA_ARGS__)
3469
#define vsseg6e32_v_u32m1(...) __riscv_vsseg6e32_v_u32m1(__VA_ARGS__)
3470
#define vsseg7e32_v_u32m1(...) __riscv_vsseg7e32_v_u32m1(__VA_ARGS__)
3471
#define vsseg8e32_v_u32m1(...) __riscv_vsseg8e32_v_u32m1(__VA_ARGS__)
3472
#define vsseg2e32_v_u32m2(...) __riscv_vsseg2e32_v_u32m2(__VA_ARGS__)
3473
#define vsseg3e32_v_u32m2(...) __riscv_vsseg3e32_v_u32m2(__VA_ARGS__)
3474
#define vsseg4e32_v_u32m2(...) __riscv_vsseg4e32_v_u32m2(__VA_ARGS__)
3475
#define vsseg2e32_v_u32m4(...) __riscv_vsseg2e32_v_u32m4(__VA_ARGS__)
3476
#define vsseg2e64_v_u64m1(...) __riscv_vsseg2e64_v_u64m1(__VA_ARGS__)
3477
#define vsseg3e64_v_u64m1(...) __riscv_vsseg3e64_v_u64m1(__VA_ARGS__)
3478
#define vsseg4e64_v_u64m1(...) __riscv_vsseg4e64_v_u64m1(__VA_ARGS__)
3479
#define vsseg5e64_v_u64m1(...) __riscv_vsseg5e64_v_u64m1(__VA_ARGS__)
3480
#define vsseg6e64_v_u64m1(...) __riscv_vsseg6e64_v_u64m1(__VA_ARGS__)
3481
#define vsseg7e64_v_u64m1(...) __riscv_vsseg7e64_v_u64m1(__VA_ARGS__)
3482
#define vsseg8e64_v_u64m1(...) __riscv_vsseg8e64_v_u64m1(__VA_ARGS__)
3483
#define vsseg2e64_v_u64m2(...) __riscv_vsseg2e64_v_u64m2(__VA_ARGS__)
3484
#define vsseg3e64_v_u64m2(...) __riscv_vsseg3e64_v_u64m2(__VA_ARGS__)
3485
#define vsseg4e64_v_u64m2(...) __riscv_vsseg4e64_v_u64m2(__VA_ARGS__)
3486
#define vsseg2e64_v_u64m4(...) __riscv_vsseg2e64_v_u64m4(__VA_ARGS__)
3487
// masked functions
3488
#define vsseg2e16_v_f16mf4_m(...) __riscv_vsseg2e16_v_f16mf4_m(__VA_ARGS__)
3489
#define vsseg3e16_v_f16mf4_m(...) __riscv_vsseg3e16_v_f16mf4_m(__VA_ARGS__)
3490
#define vsseg4e16_v_f16mf4_m(...) __riscv_vsseg4e16_v_f16mf4_m(__VA_ARGS__)
3491
#define vsseg5e16_v_f16mf4_m(...) __riscv_vsseg5e16_v_f16mf4_m(__VA_ARGS__)
3492
#define vsseg6e16_v_f16mf4_m(...) __riscv_vsseg6e16_v_f16mf4_m(__VA_ARGS__)
3493
#define vsseg7e16_v_f16mf4_m(...) __riscv_vsseg7e16_v_f16mf4_m(__VA_ARGS__)
3494
#define vsseg8e16_v_f16mf4_m(...) __riscv_vsseg8e16_v_f16mf4_m(__VA_ARGS__)
3495
#define vsseg2e16_v_f16mf2_m(...) __riscv_vsseg2e16_v_f16mf2_m(__VA_ARGS__)
3496
#define vsseg3e16_v_f16mf2_m(...) __riscv_vsseg3e16_v_f16mf2_m(__VA_ARGS__)
3497
#define vsseg4e16_v_f16mf2_m(...) __riscv_vsseg4e16_v_f16mf2_m(__VA_ARGS__)
3498
#define vsseg5e16_v_f16mf2_m(...) __riscv_vsseg5e16_v_f16mf2_m(__VA_ARGS__)
3499
#define vsseg6e16_v_f16mf2_m(...) __riscv_vsseg6e16_v_f16mf2_m(__VA_ARGS__)
3500
#define vsseg7e16_v_f16mf2_m(...) __riscv_vsseg7e16_v_f16mf2_m(__VA_ARGS__)
3501
#define vsseg8e16_v_f16mf2_m(...) __riscv_vsseg8e16_v_f16mf2_m(__VA_ARGS__)
3502
#define vsseg2e16_v_f16m1_m(...) __riscv_vsseg2e16_v_f16m1_m(__VA_ARGS__)
3503
#define vsseg3e16_v_f16m1_m(...) __riscv_vsseg3e16_v_f16m1_m(__VA_ARGS__)
3504
#define vsseg4e16_v_f16m1_m(...) __riscv_vsseg4e16_v_f16m1_m(__VA_ARGS__)
3505
#define vsseg5e16_v_f16m1_m(...) __riscv_vsseg5e16_v_f16m1_m(__VA_ARGS__)
3506
#define vsseg6e16_v_f16m1_m(...) __riscv_vsseg6e16_v_f16m1_m(__VA_ARGS__)
3507
#define vsseg7e16_v_f16m1_m(...) __riscv_vsseg7e16_v_f16m1_m(__VA_ARGS__)
3508
#define vsseg8e16_v_f16m1_m(...) __riscv_vsseg8e16_v_f16m1_m(__VA_ARGS__)
3509
#define vsseg2e16_v_f16m2_m(...) __riscv_vsseg2e16_v_f16m2_m(__VA_ARGS__)
3510
#define vsseg3e16_v_f16m2_m(...) __riscv_vsseg3e16_v_f16m2_m(__VA_ARGS__)
3511
#define vsseg4e16_v_f16m2_m(...) __riscv_vsseg4e16_v_f16m2_m(__VA_ARGS__)
3512
#define vsseg2e16_v_f16m4_m(...) __riscv_vsseg2e16_v_f16m4_m(__VA_ARGS__)
3513
#define vsseg2e32_v_f32mf2_m(...) __riscv_vsseg2e32_v_f32mf2_m(__VA_ARGS__)
3514
#define vsseg3e32_v_f32mf2_m(...) __riscv_vsseg3e32_v_f32mf2_m(__VA_ARGS__)
3515
#define vsseg4e32_v_f32mf2_m(...) __riscv_vsseg4e32_v_f32mf2_m(__VA_ARGS__)
3516
#define vsseg5e32_v_f32mf2_m(...) __riscv_vsseg5e32_v_f32mf2_m(__VA_ARGS__)
3517
#define vsseg6e32_v_f32mf2_m(...) __riscv_vsseg6e32_v_f32mf2_m(__VA_ARGS__)
3518
#define vsseg7e32_v_f32mf2_m(...) __riscv_vsseg7e32_v_f32mf2_m(__VA_ARGS__)
3519
#define vsseg8e32_v_f32mf2_m(...) __riscv_vsseg8e32_v_f32mf2_m(__VA_ARGS__)
3520
#define vsseg2e32_v_f32m1_m(...) __riscv_vsseg2e32_v_f32m1_m(__VA_ARGS__)
3521
#define vsseg3e32_v_f32m1_m(...) __riscv_vsseg3e32_v_f32m1_m(__VA_ARGS__)
3522
#define vsseg4e32_v_f32m1_m(...) __riscv_vsseg4e32_v_f32m1_m(__VA_ARGS__)
3523
#define vsseg5e32_v_f32m1_m(...) __riscv_vsseg5e32_v_f32m1_m(__VA_ARGS__)
3524
#define vsseg6e32_v_f32m1_m(...) __riscv_vsseg6e32_v_f32m1_m(__VA_ARGS__)
3525
#define vsseg7e32_v_f32m1_m(...) __riscv_vsseg7e32_v_f32m1_m(__VA_ARGS__)
3526
#define vsseg8e32_v_f32m1_m(...) __riscv_vsseg8e32_v_f32m1_m(__VA_ARGS__)
3527
#define vsseg2e32_v_f32m2_m(...) __riscv_vsseg2e32_v_f32m2_m(__VA_ARGS__)
3528
#define vsseg3e32_v_f32m2_m(...) __riscv_vsseg3e32_v_f32m2_m(__VA_ARGS__)
3529
#define vsseg4e32_v_f32m2_m(...) __riscv_vsseg4e32_v_f32m2_m(__VA_ARGS__)
3530
#define vsseg2e32_v_f32m4_m(...) __riscv_vsseg2e32_v_f32m4_m(__VA_ARGS__)
3531
#define vsseg2e64_v_f64m1_m(...) __riscv_vsseg2e64_v_f64m1_m(__VA_ARGS__)
3532
#define vsseg3e64_v_f64m1_m(...) __riscv_vsseg3e64_v_f64m1_m(__VA_ARGS__)
3533
#define vsseg4e64_v_f64m1_m(...) __riscv_vsseg4e64_v_f64m1_m(__VA_ARGS__)
3534
#define vsseg5e64_v_f64m1_m(...) __riscv_vsseg5e64_v_f64m1_m(__VA_ARGS__)
3535
#define vsseg6e64_v_f64m1_m(...) __riscv_vsseg6e64_v_f64m1_m(__VA_ARGS__)
3536
#define vsseg7e64_v_f64m1_m(...) __riscv_vsseg7e64_v_f64m1_m(__VA_ARGS__)
3537
#define vsseg8e64_v_f64m1_m(...) __riscv_vsseg8e64_v_f64m1_m(__VA_ARGS__)
3538
#define vsseg2e64_v_f64m2_m(...) __riscv_vsseg2e64_v_f64m2_m(__VA_ARGS__)
3539
#define vsseg3e64_v_f64m2_m(...) __riscv_vsseg3e64_v_f64m2_m(__VA_ARGS__)
3540
#define vsseg4e64_v_f64m2_m(...) __riscv_vsseg4e64_v_f64m2_m(__VA_ARGS__)
3541
#define vsseg2e64_v_f64m4_m(...) __riscv_vsseg2e64_v_f64m4_m(__VA_ARGS__)
3542
#define vsseg2e8_v_i8mf8_m(...) __riscv_vsseg2e8_v_i8mf8_m(__VA_ARGS__)
3543
#define vsseg3e8_v_i8mf8_m(...) __riscv_vsseg3e8_v_i8mf8_m(__VA_ARGS__)
3544
#define vsseg4e8_v_i8mf8_m(...) __riscv_vsseg4e8_v_i8mf8_m(__VA_ARGS__)
3545
#define vsseg5e8_v_i8mf8_m(...) __riscv_vsseg5e8_v_i8mf8_m(__VA_ARGS__)
3546
#define vsseg6e8_v_i8mf8_m(...) __riscv_vsseg6e8_v_i8mf8_m(__VA_ARGS__)
3547
#define vsseg7e8_v_i8mf8_m(...) __riscv_vsseg7e8_v_i8mf8_m(__VA_ARGS__)
3548
#define vsseg8e8_v_i8mf8_m(...) __riscv_vsseg8e8_v_i8mf8_m(__VA_ARGS__)
3549
#define vsseg2e8_v_i8mf4_m(...) __riscv_vsseg2e8_v_i8mf4_m(__VA_ARGS__)
3550
#define vsseg3e8_v_i8mf4_m(...) __riscv_vsseg3e8_v_i8mf4_m(__VA_ARGS__)
3551
#define vsseg4e8_v_i8mf4_m(...) __riscv_vsseg4e8_v_i8mf4_m(__VA_ARGS__)
3552
#define vsseg5e8_v_i8mf4_m(...) __riscv_vsseg5e8_v_i8mf4_m(__VA_ARGS__)
3553
#define vsseg6e8_v_i8mf4_m(...) __riscv_vsseg6e8_v_i8mf4_m(__VA_ARGS__)
3554
#define vsseg7e8_v_i8mf4_m(...) __riscv_vsseg7e8_v_i8mf4_m(__VA_ARGS__)
3555
#define vsseg8e8_v_i8mf4_m(...) __riscv_vsseg8e8_v_i8mf4_m(__VA_ARGS__)
3556
#define vsseg2e8_v_i8mf2_m(...) __riscv_vsseg2e8_v_i8mf2_m(__VA_ARGS__)
3557
#define vsseg3e8_v_i8mf2_m(...) __riscv_vsseg3e8_v_i8mf2_m(__VA_ARGS__)
3558
#define vsseg4e8_v_i8mf2_m(...) __riscv_vsseg4e8_v_i8mf2_m(__VA_ARGS__)
3559
#define vsseg5e8_v_i8mf2_m(...) __riscv_vsseg5e8_v_i8mf2_m(__VA_ARGS__)
3560
#define vsseg6e8_v_i8mf2_m(...) __riscv_vsseg6e8_v_i8mf2_m(__VA_ARGS__)
3561
#define vsseg7e8_v_i8mf2_m(...) __riscv_vsseg7e8_v_i8mf2_m(__VA_ARGS__)
3562
#define vsseg8e8_v_i8mf2_m(...) __riscv_vsseg8e8_v_i8mf2_m(__VA_ARGS__)
3563
#define vsseg2e8_v_i8m1_m(...) __riscv_vsseg2e8_v_i8m1_m(__VA_ARGS__)
3564
#define vsseg3e8_v_i8m1_m(...) __riscv_vsseg3e8_v_i8m1_m(__VA_ARGS__)
3565
#define vsseg4e8_v_i8m1_m(...) __riscv_vsseg4e8_v_i8m1_m(__VA_ARGS__)
3566
#define vsseg5e8_v_i8m1_m(...) __riscv_vsseg5e8_v_i8m1_m(__VA_ARGS__)
3567
#define vsseg6e8_v_i8m1_m(...) __riscv_vsseg6e8_v_i8m1_m(__VA_ARGS__)
3568
#define vsseg7e8_v_i8m1_m(...) __riscv_vsseg7e8_v_i8m1_m(__VA_ARGS__)
3569
#define vsseg8e8_v_i8m1_m(...) __riscv_vsseg8e8_v_i8m1_m(__VA_ARGS__)
3570
#define vsseg2e8_v_i8m2_m(...) __riscv_vsseg2e8_v_i8m2_m(__VA_ARGS__)
3571
#define vsseg3e8_v_i8m2_m(...) __riscv_vsseg3e8_v_i8m2_m(__VA_ARGS__)
3572
#define vsseg4e8_v_i8m2_m(...) __riscv_vsseg4e8_v_i8m2_m(__VA_ARGS__)
3573
#define vsseg2e8_v_i8m4_m(...) __riscv_vsseg2e8_v_i8m4_m(__VA_ARGS__)
3574
#define vsseg2e16_v_i16mf4_m(...) __riscv_vsseg2e16_v_i16mf4_m(__VA_ARGS__)
3575
#define vsseg3e16_v_i16mf4_m(...) __riscv_vsseg3e16_v_i16mf4_m(__VA_ARGS__)
3576
#define vsseg4e16_v_i16mf4_m(...) __riscv_vsseg4e16_v_i16mf4_m(__VA_ARGS__)
3577
#define vsseg5e16_v_i16mf4_m(...) __riscv_vsseg5e16_v_i16mf4_m(__VA_ARGS__)
3578
#define vsseg6e16_v_i16mf4_m(...) __riscv_vsseg6e16_v_i16mf4_m(__VA_ARGS__)
3579
#define vsseg7e16_v_i16mf4_m(...) __riscv_vsseg7e16_v_i16mf4_m(__VA_ARGS__)
3580
#define vsseg8e16_v_i16mf4_m(...) __riscv_vsseg8e16_v_i16mf4_m(__VA_ARGS__)
3581
#define vsseg2e16_v_i16mf2_m(...) __riscv_vsseg2e16_v_i16mf2_m(__VA_ARGS__)
3582
#define vsseg3e16_v_i16mf2_m(...) __riscv_vsseg3e16_v_i16mf2_m(__VA_ARGS__)
3583
#define vsseg4e16_v_i16mf2_m(...) __riscv_vsseg4e16_v_i16mf2_m(__VA_ARGS__)
3584
#define vsseg5e16_v_i16mf2_m(...) __riscv_vsseg5e16_v_i16mf2_m(__VA_ARGS__)
3585
#define vsseg6e16_v_i16mf2_m(...) __riscv_vsseg6e16_v_i16mf2_m(__VA_ARGS__)
3586
#define vsseg7e16_v_i16mf2_m(...) __riscv_vsseg7e16_v_i16mf2_m(__VA_ARGS__)
3587
#define vsseg8e16_v_i16mf2_m(...) __riscv_vsseg8e16_v_i16mf2_m(__VA_ARGS__)
3588
#define vsseg2e16_v_i16m1_m(...) __riscv_vsseg2e16_v_i16m1_m(__VA_ARGS__)
3589
#define vsseg3e16_v_i16m1_m(...) __riscv_vsseg3e16_v_i16m1_m(__VA_ARGS__)
3590
#define vsseg4e16_v_i16m1_m(...) __riscv_vsseg4e16_v_i16m1_m(__VA_ARGS__)
3591
#define vsseg5e16_v_i16m1_m(...) __riscv_vsseg5e16_v_i16m1_m(__VA_ARGS__)
3592
#define vsseg6e16_v_i16m1_m(...) __riscv_vsseg6e16_v_i16m1_m(__VA_ARGS__)
3593
#define vsseg7e16_v_i16m1_m(...) __riscv_vsseg7e16_v_i16m1_m(__VA_ARGS__)
3594
#define vsseg8e16_v_i16m1_m(...) __riscv_vsseg8e16_v_i16m1_m(__VA_ARGS__)
3595
#define vsseg2e16_v_i16m2_m(...) __riscv_vsseg2e16_v_i16m2_m(__VA_ARGS__)
3596
#define vsseg3e16_v_i16m2_m(...) __riscv_vsseg3e16_v_i16m2_m(__VA_ARGS__)
3597
#define vsseg4e16_v_i16m2_m(...) __riscv_vsseg4e16_v_i16m2_m(__VA_ARGS__)
3598
#define vsseg2e16_v_i16m4_m(...) __riscv_vsseg2e16_v_i16m4_m(__VA_ARGS__)
3599
#define vsseg2e32_v_i32mf2_m(...) __riscv_vsseg2e32_v_i32mf2_m(__VA_ARGS__)
3600
#define vsseg3e32_v_i32mf2_m(...) __riscv_vsseg3e32_v_i32mf2_m(__VA_ARGS__)
3601
#define vsseg4e32_v_i32mf2_m(...) __riscv_vsseg4e32_v_i32mf2_m(__VA_ARGS__)
3602
#define vsseg5e32_v_i32mf2_m(...) __riscv_vsseg5e32_v_i32mf2_m(__VA_ARGS__)
3603
#define vsseg6e32_v_i32mf2_m(...) __riscv_vsseg6e32_v_i32mf2_m(__VA_ARGS__)
3604
#define vsseg7e32_v_i32mf2_m(...) __riscv_vsseg7e32_v_i32mf2_m(__VA_ARGS__)
3605
#define vsseg8e32_v_i32mf2_m(...) __riscv_vsseg8e32_v_i32mf2_m(__VA_ARGS__)
3606
#define vsseg2e32_v_i32m1_m(...) __riscv_vsseg2e32_v_i32m1_m(__VA_ARGS__)
3607
#define vsseg3e32_v_i32m1_m(...) __riscv_vsseg3e32_v_i32m1_m(__VA_ARGS__)
3608
#define vsseg4e32_v_i32m1_m(...) __riscv_vsseg4e32_v_i32m1_m(__VA_ARGS__)
3609
#define vsseg5e32_v_i32m1_m(...) __riscv_vsseg5e32_v_i32m1_m(__VA_ARGS__)
3610
#define vsseg6e32_v_i32m1_m(...) __riscv_vsseg6e32_v_i32m1_m(__VA_ARGS__)
3611
#define vsseg7e32_v_i32m1_m(...) __riscv_vsseg7e32_v_i32m1_m(__VA_ARGS__)
3612
#define vsseg8e32_v_i32m1_m(...) __riscv_vsseg8e32_v_i32m1_m(__VA_ARGS__)
3613
#define vsseg2e32_v_i32m2_m(...) __riscv_vsseg2e32_v_i32m2_m(__VA_ARGS__)
3614
#define vsseg3e32_v_i32m2_m(...) __riscv_vsseg3e32_v_i32m2_m(__VA_ARGS__)
3615
#define vsseg4e32_v_i32m2_m(...) __riscv_vsseg4e32_v_i32m2_m(__VA_ARGS__)
3616
#define vsseg2e32_v_i32m4_m(...) __riscv_vsseg2e32_v_i32m4_m(__VA_ARGS__)
3617
#define vsseg2e64_v_i64m1_m(...) __riscv_vsseg2e64_v_i64m1_m(__VA_ARGS__)
3618
#define vsseg3e64_v_i64m1_m(...) __riscv_vsseg3e64_v_i64m1_m(__VA_ARGS__)
3619
#define vsseg4e64_v_i64m1_m(...) __riscv_vsseg4e64_v_i64m1_m(__VA_ARGS__)
3620
#define vsseg5e64_v_i64m1_m(...) __riscv_vsseg5e64_v_i64m1_m(__VA_ARGS__)
3621
#define vsseg6e64_v_i64m1_m(...) __riscv_vsseg6e64_v_i64m1_m(__VA_ARGS__)
3622
#define vsseg7e64_v_i64m1_m(...) __riscv_vsseg7e64_v_i64m1_m(__VA_ARGS__)
3623
#define vsseg8e64_v_i64m1_m(...) __riscv_vsseg8e64_v_i64m1_m(__VA_ARGS__)
3624
#define vsseg2e64_v_i64m2_m(...) __riscv_vsseg2e64_v_i64m2_m(__VA_ARGS__)
3625
#define vsseg3e64_v_i64m2_m(...) __riscv_vsseg3e64_v_i64m2_m(__VA_ARGS__)
3626
#define vsseg4e64_v_i64m2_m(...) __riscv_vsseg4e64_v_i64m2_m(__VA_ARGS__)
3627
#define vsseg2e64_v_i64m4_m(...) __riscv_vsseg2e64_v_i64m4_m(__VA_ARGS__)
3628
#define vsseg2e8_v_u8mf8_m(...) __riscv_vsseg2e8_v_u8mf8_m(__VA_ARGS__)
3629
#define vsseg3e8_v_u8mf8_m(...) __riscv_vsseg3e8_v_u8mf8_m(__VA_ARGS__)
3630
#define vsseg4e8_v_u8mf8_m(...) __riscv_vsseg4e8_v_u8mf8_m(__VA_ARGS__)
3631
#define vsseg5e8_v_u8mf8_m(...) __riscv_vsseg5e8_v_u8mf8_m(__VA_ARGS__)
3632
#define vsseg6e8_v_u8mf8_m(...) __riscv_vsseg6e8_v_u8mf8_m(__VA_ARGS__)
3633
#define vsseg7e8_v_u8mf8_m(...) __riscv_vsseg7e8_v_u8mf8_m(__VA_ARGS__)
3634
#define vsseg8e8_v_u8mf8_m(...) __riscv_vsseg8e8_v_u8mf8_m(__VA_ARGS__)
3635
#define vsseg2e8_v_u8mf4_m(...) __riscv_vsseg2e8_v_u8mf4_m(__VA_ARGS__)
3636
#define vsseg3e8_v_u8mf4_m(...) __riscv_vsseg3e8_v_u8mf4_m(__VA_ARGS__)
3637
#define vsseg4e8_v_u8mf4_m(...) __riscv_vsseg4e8_v_u8mf4_m(__VA_ARGS__)
3638
#define vsseg5e8_v_u8mf4_m(...) __riscv_vsseg5e8_v_u8mf4_m(__VA_ARGS__)
3639
#define vsseg6e8_v_u8mf4_m(...) __riscv_vsseg6e8_v_u8mf4_m(__VA_ARGS__)
3640
#define vsseg7e8_v_u8mf4_m(...) __riscv_vsseg7e8_v_u8mf4_m(__VA_ARGS__)
3641
#define vsseg8e8_v_u8mf4_m(...) __riscv_vsseg8e8_v_u8mf4_m(__VA_ARGS__)
3642
#define vsseg2e8_v_u8mf2_m(...) __riscv_vsseg2e8_v_u8mf2_m(__VA_ARGS__)
3643
#define vsseg3e8_v_u8mf2_m(...) __riscv_vsseg3e8_v_u8mf2_m(__VA_ARGS__)
3644
#define vsseg4e8_v_u8mf2_m(...) __riscv_vsseg4e8_v_u8mf2_m(__VA_ARGS__)
3645
#define vsseg5e8_v_u8mf2_m(...) __riscv_vsseg5e8_v_u8mf2_m(__VA_ARGS__)
3646
#define vsseg6e8_v_u8mf2_m(...) __riscv_vsseg6e8_v_u8mf2_m(__VA_ARGS__)
3647
#define vsseg7e8_v_u8mf2_m(...) __riscv_vsseg7e8_v_u8mf2_m(__VA_ARGS__)
3648
#define vsseg8e8_v_u8mf2_m(...) __riscv_vsseg8e8_v_u8mf2_m(__VA_ARGS__)
3649
#define vsseg2e8_v_u8m1_m(...) __riscv_vsseg2e8_v_u8m1_m(__VA_ARGS__)
3650
#define vsseg3e8_v_u8m1_m(...) __riscv_vsseg3e8_v_u8m1_m(__VA_ARGS__)
3651
#define vsseg4e8_v_u8m1_m(...) __riscv_vsseg4e8_v_u8m1_m(__VA_ARGS__)
3652
#define vsseg5e8_v_u8m1_m(...) __riscv_vsseg5e8_v_u8m1_m(__VA_ARGS__)
3653
#define vsseg6e8_v_u8m1_m(...) __riscv_vsseg6e8_v_u8m1_m(__VA_ARGS__)
3654
#define vsseg7e8_v_u8m1_m(...) __riscv_vsseg7e8_v_u8m1_m(__VA_ARGS__)
3655
#define vsseg8e8_v_u8m1_m(...) __riscv_vsseg8e8_v_u8m1_m(__VA_ARGS__)
3656
#define vsseg2e8_v_u8m2_m(...) __riscv_vsseg2e8_v_u8m2_m(__VA_ARGS__)
3657
#define vsseg3e8_v_u8m2_m(...) __riscv_vsseg3e8_v_u8m2_m(__VA_ARGS__)
3658
#define vsseg4e8_v_u8m2_m(...) __riscv_vsseg4e8_v_u8m2_m(__VA_ARGS__)
3659
#define vsseg2e8_v_u8m4_m(...) __riscv_vsseg2e8_v_u8m4_m(__VA_ARGS__)
3660
#define vsseg2e16_v_u16mf4_m(...) __riscv_vsseg2e16_v_u16mf4_m(__VA_ARGS__)
3661
#define vsseg3e16_v_u16mf4_m(...) __riscv_vsseg3e16_v_u16mf4_m(__VA_ARGS__)
3662
#define vsseg4e16_v_u16mf4_m(...) __riscv_vsseg4e16_v_u16mf4_m(__VA_ARGS__)
3663
#define vsseg5e16_v_u16mf4_m(...) __riscv_vsseg5e16_v_u16mf4_m(__VA_ARGS__)
3664
#define vsseg6e16_v_u16mf4_m(...) __riscv_vsseg6e16_v_u16mf4_m(__VA_ARGS__)
3665
#define vsseg7e16_v_u16mf4_m(...) __riscv_vsseg7e16_v_u16mf4_m(__VA_ARGS__)
3666
#define vsseg8e16_v_u16mf4_m(...) __riscv_vsseg8e16_v_u16mf4_m(__VA_ARGS__)
3667
#define vsseg2e16_v_u16mf2_m(...) __riscv_vsseg2e16_v_u16mf2_m(__VA_ARGS__)
3668
#define vsseg3e16_v_u16mf2_m(...) __riscv_vsseg3e16_v_u16mf2_m(__VA_ARGS__)
3669
#define vsseg4e16_v_u16mf2_m(...) __riscv_vsseg4e16_v_u16mf2_m(__VA_ARGS__)
3670
#define vsseg5e16_v_u16mf2_m(...) __riscv_vsseg5e16_v_u16mf2_m(__VA_ARGS__)
3671
#define vsseg6e16_v_u16mf2_m(...) __riscv_vsseg6e16_v_u16mf2_m(__VA_ARGS__)
3672
#define vsseg7e16_v_u16mf2_m(...) __riscv_vsseg7e16_v_u16mf2_m(__VA_ARGS__)
3673
#define vsseg8e16_v_u16mf2_m(...) __riscv_vsseg8e16_v_u16mf2_m(__VA_ARGS__)
3674
#define vsseg2e16_v_u16m1_m(...) __riscv_vsseg2e16_v_u16m1_m(__VA_ARGS__)
3675
#define vsseg3e16_v_u16m1_m(...) __riscv_vsseg3e16_v_u16m1_m(__VA_ARGS__)
3676
#define vsseg4e16_v_u16m1_m(...) __riscv_vsseg4e16_v_u16m1_m(__VA_ARGS__)
3677
#define vsseg5e16_v_u16m1_m(...) __riscv_vsseg5e16_v_u16m1_m(__VA_ARGS__)
3678
#define vsseg6e16_v_u16m1_m(...) __riscv_vsseg6e16_v_u16m1_m(__VA_ARGS__)
3679
#define vsseg7e16_v_u16m1_m(...) __riscv_vsseg7e16_v_u16m1_m(__VA_ARGS__)
3680
#define vsseg8e16_v_u16m1_m(...) __riscv_vsseg8e16_v_u16m1_m(__VA_ARGS__)
3681
#define vsseg2e16_v_u16m2_m(...) __riscv_vsseg2e16_v_u16m2_m(__VA_ARGS__)
3682
#define vsseg3e16_v_u16m2_m(...) __riscv_vsseg3e16_v_u16m2_m(__VA_ARGS__)
3683
#define vsseg4e16_v_u16m2_m(...) __riscv_vsseg4e16_v_u16m2_m(__VA_ARGS__)
3684
#define vsseg2e16_v_u16m4_m(...) __riscv_vsseg2e16_v_u16m4_m(__VA_ARGS__)
3685
#define vsseg2e32_v_u32mf2_m(...) __riscv_vsseg2e32_v_u32mf2_m(__VA_ARGS__)
3686
#define vsseg3e32_v_u32mf2_m(...) __riscv_vsseg3e32_v_u32mf2_m(__VA_ARGS__)
3687
#define vsseg4e32_v_u32mf2_m(...) __riscv_vsseg4e32_v_u32mf2_m(__VA_ARGS__)
3688
#define vsseg5e32_v_u32mf2_m(...) __riscv_vsseg5e32_v_u32mf2_m(__VA_ARGS__)
3689
#define vsseg6e32_v_u32mf2_m(...) __riscv_vsseg6e32_v_u32mf2_m(__VA_ARGS__)
3690
#define vsseg7e32_v_u32mf2_m(...) __riscv_vsseg7e32_v_u32mf2_m(__VA_ARGS__)
3691
#define vsseg8e32_v_u32mf2_m(...) __riscv_vsseg8e32_v_u32mf2_m(__VA_ARGS__)
3692
#define vsseg2e32_v_u32m1_m(...) __riscv_vsseg2e32_v_u32m1_m(__VA_ARGS__)
3693
#define vsseg3e32_v_u32m1_m(...) __riscv_vsseg3e32_v_u32m1_m(__VA_ARGS__)
3694
#define vsseg4e32_v_u32m1_m(...) __riscv_vsseg4e32_v_u32m1_m(__VA_ARGS__)
3695
#define vsseg5e32_v_u32m1_m(...) __riscv_vsseg5e32_v_u32m1_m(__VA_ARGS__)
3696
#define vsseg6e32_v_u32m1_m(...) __riscv_vsseg6e32_v_u32m1_m(__VA_ARGS__)
3697
#define vsseg7e32_v_u32m1_m(...) __riscv_vsseg7e32_v_u32m1_m(__VA_ARGS__)
3698
#define vsseg8e32_v_u32m1_m(...) __riscv_vsseg8e32_v_u32m1_m(__VA_ARGS__)
3699
#define vsseg2e32_v_u32m2_m(...) __riscv_vsseg2e32_v_u32m2_m(__VA_ARGS__)
3700
#define vsseg3e32_v_u32m2_m(...) __riscv_vsseg3e32_v_u32m2_m(__VA_ARGS__)
3701
#define vsseg4e32_v_u32m2_m(...) __riscv_vsseg4e32_v_u32m2_m(__VA_ARGS__)
3702
#define vsseg2e32_v_u32m4_m(...) __riscv_vsseg2e32_v_u32m4_m(__VA_ARGS__)
3703
#define vsseg2e64_v_u64m1_m(...) __riscv_vsseg2e64_v_u64m1_m(__VA_ARGS__)
3704
#define vsseg3e64_v_u64m1_m(...) __riscv_vsseg3e64_v_u64m1_m(__VA_ARGS__)
3705
#define vsseg4e64_v_u64m1_m(...) __riscv_vsseg4e64_v_u64m1_m(__VA_ARGS__)
3706
#define vsseg5e64_v_u64m1_m(...) __riscv_vsseg5e64_v_u64m1_m(__VA_ARGS__)
3707
#define vsseg6e64_v_u64m1_m(...) __riscv_vsseg6e64_v_u64m1_m(__VA_ARGS__)
3708
#define vsseg7e64_v_u64m1_m(...) __riscv_vsseg7e64_v_u64m1_m(__VA_ARGS__)
3709
#define vsseg8e64_v_u64m1_m(...) __riscv_vsseg8e64_v_u64m1_m(__VA_ARGS__)
3710
#define vsseg2e64_v_u64m2_m(...) __riscv_vsseg2e64_v_u64m2_m(__VA_ARGS__)
3711
#define vsseg3e64_v_u64m2_m(...) __riscv_vsseg3e64_v_u64m2_m(__VA_ARGS__)
3712
#define vsseg4e64_v_u64m2_m(...) __riscv_vsseg4e64_v_u64m2_m(__VA_ARGS__)
3713
#define vsseg2e64_v_u64m4_m(...) __riscv_vsseg2e64_v_u64m4_m(__VA_ARGS__)
3714
#define vlsseg2e16_v_f16mf4(...) __riscv_vlsseg2e16_v_f16mf4(__VA_ARGS__)
3715
#define vlsseg3e16_v_f16mf4(...) __riscv_vlsseg3e16_v_f16mf4(__VA_ARGS__)
3716
#define vlsseg4e16_v_f16mf4(...) __riscv_vlsseg4e16_v_f16mf4(__VA_ARGS__)
3717
#define vlsseg5e16_v_f16mf4(...) __riscv_vlsseg5e16_v_f16mf4(__VA_ARGS__)
3718
#define vlsseg6e16_v_f16mf4(...) __riscv_vlsseg6e16_v_f16mf4(__VA_ARGS__)
3719
#define vlsseg7e16_v_f16mf4(...) __riscv_vlsseg7e16_v_f16mf4(__VA_ARGS__)
3720
#define vlsseg8e16_v_f16mf4(...) __riscv_vlsseg8e16_v_f16mf4(__VA_ARGS__)
3721
#define vlsseg2e16_v_f16mf2(...) __riscv_vlsseg2e16_v_f16mf2(__VA_ARGS__)
3722
#define vlsseg3e16_v_f16mf2(...) __riscv_vlsseg3e16_v_f16mf2(__VA_ARGS__)
3723
#define vlsseg4e16_v_f16mf2(...) __riscv_vlsseg4e16_v_f16mf2(__VA_ARGS__)
3724
#define vlsseg5e16_v_f16mf2(...) __riscv_vlsseg5e16_v_f16mf2(__VA_ARGS__)
3725
#define vlsseg6e16_v_f16mf2(...) __riscv_vlsseg6e16_v_f16mf2(__VA_ARGS__)
3726
#define vlsseg7e16_v_f16mf2(...) __riscv_vlsseg7e16_v_f16mf2(__VA_ARGS__)
3727
#define vlsseg8e16_v_f16mf2(...) __riscv_vlsseg8e16_v_f16mf2(__VA_ARGS__)
3728
#define vlsseg2e16_v_f16m1(...) __riscv_vlsseg2e16_v_f16m1(__VA_ARGS__)
3729
#define vlsseg3e16_v_f16m1(...) __riscv_vlsseg3e16_v_f16m1(__VA_ARGS__)
3730
#define vlsseg4e16_v_f16m1(...) __riscv_vlsseg4e16_v_f16m1(__VA_ARGS__)
3731
#define vlsseg5e16_v_f16m1(...) __riscv_vlsseg5e16_v_f16m1(__VA_ARGS__)
3732
#define vlsseg6e16_v_f16m1(...) __riscv_vlsseg6e16_v_f16m1(__VA_ARGS__)
3733
#define vlsseg7e16_v_f16m1(...) __riscv_vlsseg7e16_v_f16m1(__VA_ARGS__)
3734
#define vlsseg8e16_v_f16m1(...) __riscv_vlsseg8e16_v_f16m1(__VA_ARGS__)
3735
#define vlsseg2e16_v_f16m2(...) __riscv_vlsseg2e16_v_f16m2(__VA_ARGS__)
3736
#define vlsseg3e16_v_f16m2(...) __riscv_vlsseg3e16_v_f16m2(__VA_ARGS__)
3737
#define vlsseg4e16_v_f16m2(...) __riscv_vlsseg4e16_v_f16m2(__VA_ARGS__)
3738
#define vlsseg2e16_v_f16m4(...) __riscv_vlsseg2e16_v_f16m4(__VA_ARGS__)
3739
#define vlsseg2e32_v_f32mf2(...) __riscv_vlsseg2e32_v_f32mf2(__VA_ARGS__)
3740
#define vlsseg3e32_v_f32mf2(...) __riscv_vlsseg3e32_v_f32mf2(__VA_ARGS__)
3741
#define vlsseg4e32_v_f32mf2(...) __riscv_vlsseg4e32_v_f32mf2(__VA_ARGS__)
3742
#define vlsseg5e32_v_f32mf2(...) __riscv_vlsseg5e32_v_f32mf2(__VA_ARGS__)
3743
#define vlsseg6e32_v_f32mf2(...) __riscv_vlsseg6e32_v_f32mf2(__VA_ARGS__)
3744
#define vlsseg7e32_v_f32mf2(...) __riscv_vlsseg7e32_v_f32mf2(__VA_ARGS__)
3745
#define vlsseg8e32_v_f32mf2(...) __riscv_vlsseg8e32_v_f32mf2(__VA_ARGS__)
3746
#define vlsseg2e32_v_f32m1(...) __riscv_vlsseg2e32_v_f32m1(__VA_ARGS__)
3747
#define vlsseg3e32_v_f32m1(...) __riscv_vlsseg3e32_v_f32m1(__VA_ARGS__)
3748
#define vlsseg4e32_v_f32m1(...) __riscv_vlsseg4e32_v_f32m1(__VA_ARGS__)
3749
#define vlsseg5e32_v_f32m1(...) __riscv_vlsseg5e32_v_f32m1(__VA_ARGS__)
3750
#define vlsseg6e32_v_f32m1(...) __riscv_vlsseg6e32_v_f32m1(__VA_ARGS__)
3751
#define vlsseg7e32_v_f32m1(...) __riscv_vlsseg7e32_v_f32m1(__VA_ARGS__)
3752
#define vlsseg8e32_v_f32m1(...) __riscv_vlsseg8e32_v_f32m1(__VA_ARGS__)
3753
#define vlsseg2e32_v_f32m2(...) __riscv_vlsseg2e32_v_f32m2(__VA_ARGS__)
3754
#define vlsseg3e32_v_f32m2(...) __riscv_vlsseg3e32_v_f32m2(__VA_ARGS__)
3755
#define vlsseg4e32_v_f32m2(...) __riscv_vlsseg4e32_v_f32m2(__VA_ARGS__)
3756
#define vlsseg2e32_v_f32m4(...) __riscv_vlsseg2e32_v_f32m4(__VA_ARGS__)
3757
#define vlsseg2e64_v_f64m1(...) __riscv_vlsseg2e64_v_f64m1(__VA_ARGS__)
3758
#define vlsseg3e64_v_f64m1(...) __riscv_vlsseg3e64_v_f64m1(__VA_ARGS__)
3759
#define vlsseg4e64_v_f64m1(...) __riscv_vlsseg4e64_v_f64m1(__VA_ARGS__)
3760
#define vlsseg5e64_v_f64m1(...) __riscv_vlsseg5e64_v_f64m1(__VA_ARGS__)
3761
#define vlsseg6e64_v_f64m1(...) __riscv_vlsseg6e64_v_f64m1(__VA_ARGS__)
3762
#define vlsseg7e64_v_f64m1(...) __riscv_vlsseg7e64_v_f64m1(__VA_ARGS__)
3763
#define vlsseg8e64_v_f64m1(...) __riscv_vlsseg8e64_v_f64m1(__VA_ARGS__)
3764
#define vlsseg2e64_v_f64m2(...) __riscv_vlsseg2e64_v_f64m2(__VA_ARGS__)
3765
#define vlsseg3e64_v_f64m2(...) __riscv_vlsseg3e64_v_f64m2(__VA_ARGS__)
3766
#define vlsseg4e64_v_f64m2(...) __riscv_vlsseg4e64_v_f64m2(__VA_ARGS__)
3767
#define vlsseg2e64_v_f64m4(...) __riscv_vlsseg2e64_v_f64m4(__VA_ARGS__)
3768
#define vlsseg2e8_v_i8mf8(...) __riscv_vlsseg2e8_v_i8mf8(__VA_ARGS__)
3769
#define vlsseg3e8_v_i8mf8(...) __riscv_vlsseg3e8_v_i8mf8(__VA_ARGS__)
3770
#define vlsseg4e8_v_i8mf8(...) __riscv_vlsseg4e8_v_i8mf8(__VA_ARGS__)
3771
#define vlsseg5e8_v_i8mf8(...) __riscv_vlsseg5e8_v_i8mf8(__VA_ARGS__)
3772
#define vlsseg6e8_v_i8mf8(...) __riscv_vlsseg6e8_v_i8mf8(__VA_ARGS__)
3773
#define vlsseg7e8_v_i8mf8(...) __riscv_vlsseg7e8_v_i8mf8(__VA_ARGS__)
3774
#define vlsseg8e8_v_i8mf8(...) __riscv_vlsseg8e8_v_i8mf8(__VA_ARGS__)
3775
#define vlsseg2e8_v_i8mf4(...) __riscv_vlsseg2e8_v_i8mf4(__VA_ARGS__)
3776
#define vlsseg3e8_v_i8mf4(...) __riscv_vlsseg3e8_v_i8mf4(__VA_ARGS__)
3777
#define vlsseg4e8_v_i8mf4(...) __riscv_vlsseg4e8_v_i8mf4(__VA_ARGS__)
3778
#define vlsseg5e8_v_i8mf4(...) __riscv_vlsseg5e8_v_i8mf4(__VA_ARGS__)
3779
#define vlsseg6e8_v_i8mf4(...) __riscv_vlsseg6e8_v_i8mf4(__VA_ARGS__)
3780
#define vlsseg7e8_v_i8mf4(...) __riscv_vlsseg7e8_v_i8mf4(__VA_ARGS__)
3781
#define vlsseg8e8_v_i8mf4(...) __riscv_vlsseg8e8_v_i8mf4(__VA_ARGS__)
3782
#define vlsseg2e8_v_i8mf2(...) __riscv_vlsseg2e8_v_i8mf2(__VA_ARGS__)
3783
#define vlsseg3e8_v_i8mf2(...) __riscv_vlsseg3e8_v_i8mf2(__VA_ARGS__)
3784
#define vlsseg4e8_v_i8mf2(...) __riscv_vlsseg4e8_v_i8mf2(__VA_ARGS__)
3785
#define vlsseg5e8_v_i8mf2(...) __riscv_vlsseg5e8_v_i8mf2(__VA_ARGS__)
3786
#define vlsseg6e8_v_i8mf2(...) __riscv_vlsseg6e8_v_i8mf2(__VA_ARGS__)
3787
#define vlsseg7e8_v_i8mf2(...) __riscv_vlsseg7e8_v_i8mf2(__VA_ARGS__)
3788
#define vlsseg8e8_v_i8mf2(...) __riscv_vlsseg8e8_v_i8mf2(__VA_ARGS__)
3789
#define vlsseg2e8_v_i8m1(...) __riscv_vlsseg2e8_v_i8m1(__VA_ARGS__)
3790
#define vlsseg3e8_v_i8m1(...) __riscv_vlsseg3e8_v_i8m1(__VA_ARGS__)
3791
#define vlsseg4e8_v_i8m1(...) __riscv_vlsseg4e8_v_i8m1(__VA_ARGS__)
3792
#define vlsseg5e8_v_i8m1(...) __riscv_vlsseg5e8_v_i8m1(__VA_ARGS__)
3793
#define vlsseg6e8_v_i8m1(...) __riscv_vlsseg6e8_v_i8m1(__VA_ARGS__)
3794
#define vlsseg7e8_v_i8m1(...) __riscv_vlsseg7e8_v_i8m1(__VA_ARGS__)
3795
#define vlsseg8e8_v_i8m1(...) __riscv_vlsseg8e8_v_i8m1(__VA_ARGS__)
3796
#define vlsseg2e8_v_i8m2(...) __riscv_vlsseg2e8_v_i8m2(__VA_ARGS__)
3797
#define vlsseg3e8_v_i8m2(...) __riscv_vlsseg3e8_v_i8m2(__VA_ARGS__)
3798
#define vlsseg4e8_v_i8m2(...) __riscv_vlsseg4e8_v_i8m2(__VA_ARGS__)
3799
#define vlsseg2e8_v_i8m4(...) __riscv_vlsseg2e8_v_i8m4(__VA_ARGS__)
3800
#define vlsseg2e16_v_i16mf4(...) __riscv_vlsseg2e16_v_i16mf4(__VA_ARGS__)
3801
#define vlsseg3e16_v_i16mf4(...) __riscv_vlsseg3e16_v_i16mf4(__VA_ARGS__)
3802
#define vlsseg4e16_v_i16mf4(...) __riscv_vlsseg4e16_v_i16mf4(__VA_ARGS__)
3803
#define vlsseg5e16_v_i16mf4(...) __riscv_vlsseg5e16_v_i16mf4(__VA_ARGS__)
3804
#define vlsseg6e16_v_i16mf4(...) __riscv_vlsseg6e16_v_i16mf4(__VA_ARGS__)
3805
#define vlsseg7e16_v_i16mf4(...) __riscv_vlsseg7e16_v_i16mf4(__VA_ARGS__)
3806
#define vlsseg8e16_v_i16mf4(...) __riscv_vlsseg8e16_v_i16mf4(__VA_ARGS__)
3807
#define vlsseg2e16_v_i16mf2(...) __riscv_vlsseg2e16_v_i16mf2(__VA_ARGS__)
3808
#define vlsseg3e16_v_i16mf2(...) __riscv_vlsseg3e16_v_i16mf2(__VA_ARGS__)
3809
#define vlsseg4e16_v_i16mf2(...) __riscv_vlsseg4e16_v_i16mf2(__VA_ARGS__)
3810
#define vlsseg5e16_v_i16mf2(...) __riscv_vlsseg5e16_v_i16mf2(__VA_ARGS__)
3811
#define vlsseg6e16_v_i16mf2(...) __riscv_vlsseg6e16_v_i16mf2(__VA_ARGS__)
3812
#define vlsseg7e16_v_i16mf2(...) __riscv_vlsseg7e16_v_i16mf2(__VA_ARGS__)
3813
#define vlsseg8e16_v_i16mf2(...) __riscv_vlsseg8e16_v_i16mf2(__VA_ARGS__)
3814
#define vlsseg2e16_v_i16m1(...) __riscv_vlsseg2e16_v_i16m1(__VA_ARGS__)
3815
#define vlsseg3e16_v_i16m1(...) __riscv_vlsseg3e16_v_i16m1(__VA_ARGS__)
3816
#define vlsseg4e16_v_i16m1(...) __riscv_vlsseg4e16_v_i16m1(__VA_ARGS__)
3817
#define vlsseg5e16_v_i16m1(...) __riscv_vlsseg5e16_v_i16m1(__VA_ARGS__)
3818
#define vlsseg6e16_v_i16m1(...) __riscv_vlsseg6e16_v_i16m1(__VA_ARGS__)
3819
#define vlsseg7e16_v_i16m1(...) __riscv_vlsseg7e16_v_i16m1(__VA_ARGS__)
3820
#define vlsseg8e16_v_i16m1(...) __riscv_vlsseg8e16_v_i16m1(__VA_ARGS__)
3821
#define vlsseg2e16_v_i16m2(...) __riscv_vlsseg2e16_v_i16m2(__VA_ARGS__)
3822
#define vlsseg3e16_v_i16m2(...) __riscv_vlsseg3e16_v_i16m2(__VA_ARGS__)
3823
#define vlsseg4e16_v_i16m2(...) __riscv_vlsseg4e16_v_i16m2(__VA_ARGS__)
3824
#define vlsseg2e16_v_i16m4(...) __riscv_vlsseg2e16_v_i16m4(__VA_ARGS__)
3825
#define vlsseg2e32_v_i32mf2(...) __riscv_vlsseg2e32_v_i32mf2(__VA_ARGS__)
3826
#define vlsseg3e32_v_i32mf2(...) __riscv_vlsseg3e32_v_i32mf2(__VA_ARGS__)
3827
#define vlsseg4e32_v_i32mf2(...) __riscv_vlsseg4e32_v_i32mf2(__VA_ARGS__)
3828
#define vlsseg5e32_v_i32mf2(...) __riscv_vlsseg5e32_v_i32mf2(__VA_ARGS__)
3829
#define vlsseg6e32_v_i32mf2(...) __riscv_vlsseg6e32_v_i32mf2(__VA_ARGS__)
3830
#define vlsseg7e32_v_i32mf2(...) __riscv_vlsseg7e32_v_i32mf2(__VA_ARGS__)
3831
#define vlsseg8e32_v_i32mf2(...) __riscv_vlsseg8e32_v_i32mf2(__VA_ARGS__)
3832
#define vlsseg2e32_v_i32m1(...) __riscv_vlsseg2e32_v_i32m1(__VA_ARGS__)
3833
#define vlsseg3e32_v_i32m1(...) __riscv_vlsseg3e32_v_i32m1(__VA_ARGS__)
3834
#define vlsseg4e32_v_i32m1(...) __riscv_vlsseg4e32_v_i32m1(__VA_ARGS__)
3835
#define vlsseg5e32_v_i32m1(...) __riscv_vlsseg5e32_v_i32m1(__VA_ARGS__)
3836
#define vlsseg6e32_v_i32m1(...) __riscv_vlsseg6e32_v_i32m1(__VA_ARGS__)
3837
#define vlsseg7e32_v_i32m1(...) __riscv_vlsseg7e32_v_i32m1(__VA_ARGS__)
3838
#define vlsseg8e32_v_i32m1(...) __riscv_vlsseg8e32_v_i32m1(__VA_ARGS__)
3839
#define vlsseg2e32_v_i32m2(...) __riscv_vlsseg2e32_v_i32m2(__VA_ARGS__)
3840
#define vlsseg3e32_v_i32m2(...) __riscv_vlsseg3e32_v_i32m2(__VA_ARGS__)
3841
#define vlsseg4e32_v_i32m2(...) __riscv_vlsseg4e32_v_i32m2(__VA_ARGS__)
3842
#define vlsseg2e32_v_i32m4(...) __riscv_vlsseg2e32_v_i32m4(__VA_ARGS__)
3843
#define vlsseg2e64_v_i64m1(...) __riscv_vlsseg2e64_v_i64m1(__VA_ARGS__)
3844
#define vlsseg3e64_v_i64m1(...) __riscv_vlsseg3e64_v_i64m1(__VA_ARGS__)
3845
#define vlsseg4e64_v_i64m1(...) __riscv_vlsseg4e64_v_i64m1(__VA_ARGS__)
3846
#define vlsseg5e64_v_i64m1(...) __riscv_vlsseg5e64_v_i64m1(__VA_ARGS__)
3847
#define vlsseg6e64_v_i64m1(...) __riscv_vlsseg6e64_v_i64m1(__VA_ARGS__)
3848
#define vlsseg7e64_v_i64m1(...) __riscv_vlsseg7e64_v_i64m1(__VA_ARGS__)
3849
#define vlsseg8e64_v_i64m1(...) __riscv_vlsseg8e64_v_i64m1(__VA_ARGS__)
3850
#define vlsseg2e64_v_i64m2(...) __riscv_vlsseg2e64_v_i64m2(__VA_ARGS__)
3851
#define vlsseg3e64_v_i64m2(...) __riscv_vlsseg3e64_v_i64m2(__VA_ARGS__)
3852
#define vlsseg4e64_v_i64m2(...) __riscv_vlsseg4e64_v_i64m2(__VA_ARGS__)
3853
#define vlsseg2e64_v_i64m4(...) __riscv_vlsseg2e64_v_i64m4(__VA_ARGS__)
3854
#define vlsseg2e8_v_u8mf8(...) __riscv_vlsseg2e8_v_u8mf8(__VA_ARGS__)
3855
#define vlsseg3e8_v_u8mf8(...) __riscv_vlsseg3e8_v_u8mf8(__VA_ARGS__)
3856
#define vlsseg4e8_v_u8mf8(...) __riscv_vlsseg4e8_v_u8mf8(__VA_ARGS__)
3857
#define vlsseg5e8_v_u8mf8(...) __riscv_vlsseg5e8_v_u8mf8(__VA_ARGS__)
3858
#define vlsseg6e8_v_u8mf8(...) __riscv_vlsseg6e8_v_u8mf8(__VA_ARGS__)
3859
#define vlsseg7e8_v_u8mf8(...) __riscv_vlsseg7e8_v_u8mf8(__VA_ARGS__)
3860
#define vlsseg8e8_v_u8mf8(...) __riscv_vlsseg8e8_v_u8mf8(__VA_ARGS__)
3861
#define vlsseg2e8_v_u8mf4(...) __riscv_vlsseg2e8_v_u8mf4(__VA_ARGS__)
3862
#define vlsseg3e8_v_u8mf4(...) __riscv_vlsseg3e8_v_u8mf4(__VA_ARGS__)
3863
#define vlsseg4e8_v_u8mf4(...) __riscv_vlsseg4e8_v_u8mf4(__VA_ARGS__)
3864
#define vlsseg5e8_v_u8mf4(...) __riscv_vlsseg5e8_v_u8mf4(__VA_ARGS__)
3865
#define vlsseg6e8_v_u8mf4(...) __riscv_vlsseg6e8_v_u8mf4(__VA_ARGS__)
3866
#define vlsseg7e8_v_u8mf4(...) __riscv_vlsseg7e8_v_u8mf4(__VA_ARGS__)
3867
#define vlsseg8e8_v_u8mf4(...) __riscv_vlsseg8e8_v_u8mf4(__VA_ARGS__)
3868
#define vlsseg2e8_v_u8mf2(...) __riscv_vlsseg2e8_v_u8mf2(__VA_ARGS__)
3869
#define vlsseg3e8_v_u8mf2(...) __riscv_vlsseg3e8_v_u8mf2(__VA_ARGS__)
3870
#define vlsseg4e8_v_u8mf2(...) __riscv_vlsseg4e8_v_u8mf2(__VA_ARGS__)
3871
#define vlsseg5e8_v_u8mf2(...) __riscv_vlsseg5e8_v_u8mf2(__VA_ARGS__)
3872
#define vlsseg6e8_v_u8mf2(...) __riscv_vlsseg6e8_v_u8mf2(__VA_ARGS__)
3873
#define vlsseg7e8_v_u8mf2(...) __riscv_vlsseg7e8_v_u8mf2(__VA_ARGS__)
3874
#define vlsseg8e8_v_u8mf2(...) __riscv_vlsseg8e8_v_u8mf2(__VA_ARGS__)
3875
#define vlsseg2e8_v_u8m1(...) __riscv_vlsseg2e8_v_u8m1(__VA_ARGS__)
3876
#define vlsseg3e8_v_u8m1(...) __riscv_vlsseg3e8_v_u8m1(__VA_ARGS__)
3877
#define vlsseg4e8_v_u8m1(...) __riscv_vlsseg4e8_v_u8m1(__VA_ARGS__)
3878
#define vlsseg5e8_v_u8m1(...) __riscv_vlsseg5e8_v_u8m1(__VA_ARGS__)
3879
#define vlsseg6e8_v_u8m1(...) __riscv_vlsseg6e8_v_u8m1(__VA_ARGS__)
3880
#define vlsseg7e8_v_u8m1(...) __riscv_vlsseg7e8_v_u8m1(__VA_ARGS__)
3881
#define vlsseg8e8_v_u8m1(...) __riscv_vlsseg8e8_v_u8m1(__VA_ARGS__)
3882
#define vlsseg2e8_v_u8m2(...) __riscv_vlsseg2e8_v_u8m2(__VA_ARGS__)
3883
#define vlsseg3e8_v_u8m2(...) __riscv_vlsseg3e8_v_u8m2(__VA_ARGS__)
3884
#define vlsseg4e8_v_u8m2(...) __riscv_vlsseg4e8_v_u8m2(__VA_ARGS__)
3885
#define vlsseg2e8_v_u8m4(...) __riscv_vlsseg2e8_v_u8m4(__VA_ARGS__)
3886
#define vlsseg2e16_v_u16mf4(...) __riscv_vlsseg2e16_v_u16mf4(__VA_ARGS__)
3887
#define vlsseg3e16_v_u16mf4(...) __riscv_vlsseg3e16_v_u16mf4(__VA_ARGS__)
3888
#define vlsseg4e16_v_u16mf4(...) __riscv_vlsseg4e16_v_u16mf4(__VA_ARGS__)
3889
#define vlsseg5e16_v_u16mf4(...) __riscv_vlsseg5e16_v_u16mf4(__VA_ARGS__)
3890
#define vlsseg6e16_v_u16mf4(...) __riscv_vlsseg6e16_v_u16mf4(__VA_ARGS__)
3891
#define vlsseg7e16_v_u16mf4(...) __riscv_vlsseg7e16_v_u16mf4(__VA_ARGS__)
3892
#define vlsseg8e16_v_u16mf4(...) __riscv_vlsseg8e16_v_u16mf4(__VA_ARGS__)
3893
#define vlsseg2e16_v_u16mf2(...) __riscv_vlsseg2e16_v_u16mf2(__VA_ARGS__)
3894
#define vlsseg3e16_v_u16mf2(...) __riscv_vlsseg3e16_v_u16mf2(__VA_ARGS__)
3895
#define vlsseg4e16_v_u16mf2(...) __riscv_vlsseg4e16_v_u16mf2(__VA_ARGS__)
3896
#define vlsseg5e16_v_u16mf2(...) __riscv_vlsseg5e16_v_u16mf2(__VA_ARGS__)
3897
#define vlsseg6e16_v_u16mf2(...) __riscv_vlsseg6e16_v_u16mf2(__VA_ARGS__)
3898
#define vlsseg7e16_v_u16mf2(...) __riscv_vlsseg7e16_v_u16mf2(__VA_ARGS__)
3899
#define vlsseg8e16_v_u16mf2(...) __riscv_vlsseg8e16_v_u16mf2(__VA_ARGS__)
3900
#define vlsseg2e16_v_u16m1(...) __riscv_vlsseg2e16_v_u16m1(__VA_ARGS__)
3901
#define vlsseg3e16_v_u16m1(...) __riscv_vlsseg3e16_v_u16m1(__VA_ARGS__)
3902
#define vlsseg4e16_v_u16m1(...) __riscv_vlsseg4e16_v_u16m1(__VA_ARGS__)
3903
#define vlsseg5e16_v_u16m1(...) __riscv_vlsseg5e16_v_u16m1(__VA_ARGS__)
3904
#define vlsseg6e16_v_u16m1(...) __riscv_vlsseg6e16_v_u16m1(__VA_ARGS__)
3905
#define vlsseg7e16_v_u16m1(...) __riscv_vlsseg7e16_v_u16m1(__VA_ARGS__)
3906
#define vlsseg8e16_v_u16m1(...) __riscv_vlsseg8e16_v_u16m1(__VA_ARGS__)
3907
#define vlsseg2e16_v_u16m2(...) __riscv_vlsseg2e16_v_u16m2(__VA_ARGS__)
3908
#define vlsseg3e16_v_u16m2(...) __riscv_vlsseg3e16_v_u16m2(__VA_ARGS__)
3909
#define vlsseg4e16_v_u16m2(...) __riscv_vlsseg4e16_v_u16m2(__VA_ARGS__)
3910
#define vlsseg2e16_v_u16m4(...) __riscv_vlsseg2e16_v_u16m4(__VA_ARGS__)
3911
#define vlsseg2e32_v_u32mf2(...) __riscv_vlsseg2e32_v_u32mf2(__VA_ARGS__)
3912
#define vlsseg3e32_v_u32mf2(...) __riscv_vlsseg3e32_v_u32mf2(__VA_ARGS__)
3913
#define vlsseg4e32_v_u32mf2(...) __riscv_vlsseg4e32_v_u32mf2(__VA_ARGS__)
3914
#define vlsseg5e32_v_u32mf2(...) __riscv_vlsseg5e32_v_u32mf2(__VA_ARGS__)
3915
#define vlsseg6e32_v_u32mf2(...) __riscv_vlsseg6e32_v_u32mf2(__VA_ARGS__)
3916
#define vlsseg7e32_v_u32mf2(...) __riscv_vlsseg7e32_v_u32mf2(__VA_ARGS__)
3917
#define vlsseg8e32_v_u32mf2(...) __riscv_vlsseg8e32_v_u32mf2(__VA_ARGS__)
3918
#define vlsseg2e32_v_u32m1(...) __riscv_vlsseg2e32_v_u32m1(__VA_ARGS__)
3919
#define vlsseg3e32_v_u32m1(...) __riscv_vlsseg3e32_v_u32m1(__VA_ARGS__)
3920
#define vlsseg4e32_v_u32m1(...) __riscv_vlsseg4e32_v_u32m1(__VA_ARGS__)
3921
#define vlsseg5e32_v_u32m1(...) __riscv_vlsseg5e32_v_u32m1(__VA_ARGS__)
3922
#define vlsseg6e32_v_u32m1(...) __riscv_vlsseg6e32_v_u32m1(__VA_ARGS__)
3923
#define vlsseg7e32_v_u32m1(...) __riscv_vlsseg7e32_v_u32m1(__VA_ARGS__)
3924
#define vlsseg8e32_v_u32m1(...) __riscv_vlsseg8e32_v_u32m1(__VA_ARGS__)
3925
#define vlsseg2e32_v_u32m2(...) __riscv_vlsseg2e32_v_u32m2(__VA_ARGS__)
3926
#define vlsseg3e32_v_u32m2(...) __riscv_vlsseg3e32_v_u32m2(__VA_ARGS__)
3927
#define vlsseg4e32_v_u32m2(...) __riscv_vlsseg4e32_v_u32m2(__VA_ARGS__)
3928
#define vlsseg2e32_v_u32m4(...) __riscv_vlsseg2e32_v_u32m4(__VA_ARGS__)
3929
#define vlsseg2e64_v_u64m1(...) __riscv_vlsseg2e64_v_u64m1(__VA_ARGS__)
3930
#define vlsseg3e64_v_u64m1(...) __riscv_vlsseg3e64_v_u64m1(__VA_ARGS__)
3931
#define vlsseg4e64_v_u64m1(...) __riscv_vlsseg4e64_v_u64m1(__VA_ARGS__)
3932
#define vlsseg5e64_v_u64m1(...) __riscv_vlsseg5e64_v_u64m1(__VA_ARGS__)
3933
#define vlsseg6e64_v_u64m1(...) __riscv_vlsseg6e64_v_u64m1(__VA_ARGS__)
3934
#define vlsseg7e64_v_u64m1(...) __riscv_vlsseg7e64_v_u64m1(__VA_ARGS__)
3935
#define vlsseg8e64_v_u64m1(...) __riscv_vlsseg8e64_v_u64m1(__VA_ARGS__)
3936
#define vlsseg2e64_v_u64m2(...) __riscv_vlsseg2e64_v_u64m2(__VA_ARGS__)
3937
#define vlsseg3e64_v_u64m2(...) __riscv_vlsseg3e64_v_u64m2(__VA_ARGS__)
3938
#define vlsseg4e64_v_u64m2(...) __riscv_vlsseg4e64_v_u64m2(__VA_ARGS__)
3939
#define vlsseg2e64_v_u64m4(...) __riscv_vlsseg2e64_v_u64m4(__VA_ARGS__)
3940
// masked functions
3941
#define vlsseg2e16_v_f16mf4_m(...) __riscv_vlsseg2e16_v_f16mf4_tumu(__VA_ARGS__)
3942
#define vlsseg3e16_v_f16mf4_m(...) __riscv_vlsseg3e16_v_f16mf4_tumu(__VA_ARGS__)
3943
#define vlsseg4e16_v_f16mf4_m(...) __riscv_vlsseg4e16_v_f16mf4_tumu(__VA_ARGS__)
3944
#define vlsseg5e16_v_f16mf4_m(...) __riscv_vlsseg5e16_v_f16mf4_tumu(__VA_ARGS__)
3945
#define vlsseg6e16_v_f16mf4_m(...) __riscv_vlsseg6e16_v_f16mf4_tumu(__VA_ARGS__)
3946
#define vlsseg7e16_v_f16mf4_m(...) __riscv_vlsseg7e16_v_f16mf4_tumu(__VA_ARGS__)
3947
#define vlsseg8e16_v_f16mf4_m(...) __riscv_vlsseg8e16_v_f16mf4_tumu(__VA_ARGS__)
3948
#define vlsseg2e16_v_f16mf2_m(...) __riscv_vlsseg2e16_v_f16mf2_tumu(__VA_ARGS__)
3949
#define vlsseg3e16_v_f16mf2_m(...) __riscv_vlsseg3e16_v_f16mf2_tumu(__VA_ARGS__)
3950
#define vlsseg4e16_v_f16mf2_m(...) __riscv_vlsseg4e16_v_f16mf2_tumu(__VA_ARGS__)
3951
#define vlsseg5e16_v_f16mf2_m(...) __riscv_vlsseg5e16_v_f16mf2_tumu(__VA_ARGS__)
3952
#define vlsseg6e16_v_f16mf2_m(...) __riscv_vlsseg6e16_v_f16mf2_tumu(__VA_ARGS__)
3953
#define vlsseg7e16_v_f16mf2_m(...) __riscv_vlsseg7e16_v_f16mf2_tumu(__VA_ARGS__)
3954
#define vlsseg8e16_v_f16mf2_m(...) __riscv_vlsseg8e16_v_f16mf2_tumu(__VA_ARGS__)
3955
#define vlsseg2e16_v_f16m1_m(...) __riscv_vlsseg2e16_v_f16m1_tumu(__VA_ARGS__)
3956
#define vlsseg3e16_v_f16m1_m(...) __riscv_vlsseg3e16_v_f16m1_tumu(__VA_ARGS__)
3957
#define vlsseg4e16_v_f16m1_m(...) __riscv_vlsseg4e16_v_f16m1_tumu(__VA_ARGS__)
3958
#define vlsseg5e16_v_f16m1_m(...) __riscv_vlsseg5e16_v_f16m1_tumu(__VA_ARGS__)
3959
#define vlsseg6e16_v_f16m1_m(...) __riscv_vlsseg6e16_v_f16m1_tumu(__VA_ARGS__)
3960
#define vlsseg7e16_v_f16m1_m(...) __riscv_vlsseg7e16_v_f16m1_tumu(__VA_ARGS__)
3961
#define vlsseg8e16_v_f16m1_m(...) __riscv_vlsseg8e16_v_f16m1_tumu(__VA_ARGS__)
3962
#define vlsseg2e16_v_f16m2_m(...) __riscv_vlsseg2e16_v_f16m2_tumu(__VA_ARGS__)
3963
#define vlsseg3e16_v_f16m2_m(...) __riscv_vlsseg3e16_v_f16m2_tumu(__VA_ARGS__)
3964
#define vlsseg4e16_v_f16m2_m(...) __riscv_vlsseg4e16_v_f16m2_tumu(__VA_ARGS__)
3965
#define vlsseg2e16_v_f16m4_m(...) __riscv_vlsseg2e16_v_f16m4_tumu(__VA_ARGS__)
3966
#define vlsseg2e32_v_f32mf2_m(...) __riscv_vlsseg2e32_v_f32mf2_tumu(__VA_ARGS__)
3967
#define vlsseg3e32_v_f32mf2_m(...) __riscv_vlsseg3e32_v_f32mf2_tumu(__VA_ARGS__)
3968
#define vlsseg4e32_v_f32mf2_m(...) __riscv_vlsseg4e32_v_f32mf2_tumu(__VA_ARGS__)
3969
#define vlsseg5e32_v_f32mf2_m(...) __riscv_vlsseg5e32_v_f32mf2_tumu(__VA_ARGS__)
3970
#define vlsseg6e32_v_f32mf2_m(...) __riscv_vlsseg6e32_v_f32mf2_tumu(__VA_ARGS__)
3971
#define vlsseg7e32_v_f32mf2_m(...) __riscv_vlsseg7e32_v_f32mf2_tumu(__VA_ARGS__)
3972
#define vlsseg8e32_v_f32mf2_m(...) __riscv_vlsseg8e32_v_f32mf2_tumu(__VA_ARGS__)
3973
#define vlsseg2e32_v_f32m1_m(...) __riscv_vlsseg2e32_v_f32m1_tumu(__VA_ARGS__)
3974
#define vlsseg3e32_v_f32m1_m(...) __riscv_vlsseg3e32_v_f32m1_tumu(__VA_ARGS__)
3975
#define vlsseg4e32_v_f32m1_m(...) __riscv_vlsseg4e32_v_f32m1_tumu(__VA_ARGS__)
3976
#define vlsseg5e32_v_f32m1_m(...) __riscv_vlsseg5e32_v_f32m1_tumu(__VA_ARGS__)
3977
#define vlsseg6e32_v_f32m1_m(...) __riscv_vlsseg6e32_v_f32m1_tumu(__VA_ARGS__)
3978
#define vlsseg7e32_v_f32m1_m(...) __riscv_vlsseg7e32_v_f32m1_tumu(__VA_ARGS__)
3979
#define vlsseg8e32_v_f32m1_m(...) __riscv_vlsseg8e32_v_f32m1_tumu(__VA_ARGS__)
3980
#define vlsseg2e32_v_f32m2_m(...) __riscv_vlsseg2e32_v_f32m2_tumu(__VA_ARGS__)
3981
#define vlsseg3e32_v_f32m2_m(...) __riscv_vlsseg3e32_v_f32m2_tumu(__VA_ARGS__)
3982
#define vlsseg4e32_v_f32m2_m(...) __riscv_vlsseg4e32_v_f32m2_tumu(__VA_ARGS__)
3983
#define vlsseg2e32_v_f32m4_m(...) __riscv_vlsseg2e32_v_f32m4_tumu(__VA_ARGS__)
3984
#define vlsseg2e64_v_f64m1_m(...) __riscv_vlsseg2e64_v_f64m1_tumu(__VA_ARGS__)
3985
#define vlsseg3e64_v_f64m1_m(...) __riscv_vlsseg3e64_v_f64m1_tumu(__VA_ARGS__)
3986
#define vlsseg4e64_v_f64m1_m(...) __riscv_vlsseg4e64_v_f64m1_tumu(__VA_ARGS__)
3987
#define vlsseg5e64_v_f64m1_m(...) __riscv_vlsseg5e64_v_f64m1_tumu(__VA_ARGS__)
3988
#define vlsseg6e64_v_f64m1_m(...) __riscv_vlsseg6e64_v_f64m1_tumu(__VA_ARGS__)
3989
#define vlsseg7e64_v_f64m1_m(...) __riscv_vlsseg7e64_v_f64m1_tumu(__VA_ARGS__)
3990
#define vlsseg8e64_v_f64m1_m(...) __riscv_vlsseg8e64_v_f64m1_tumu(__VA_ARGS__)
3991
#define vlsseg2e64_v_f64m2_m(...) __riscv_vlsseg2e64_v_f64m2_tumu(__VA_ARGS__)
3992
#define vlsseg3e64_v_f64m2_m(...) __riscv_vlsseg3e64_v_f64m2_tumu(__VA_ARGS__)
3993
#define vlsseg4e64_v_f64m2_m(...) __riscv_vlsseg4e64_v_f64m2_tumu(__VA_ARGS__)
3994
#define vlsseg2e64_v_f64m4_m(...) __riscv_vlsseg2e64_v_f64m4_tumu(__VA_ARGS__)
3995
#define vlsseg2e8_v_i8mf8_m(...) __riscv_vlsseg2e8_v_i8mf8_tumu(__VA_ARGS__)
3996
#define vlsseg3e8_v_i8mf8_m(...) __riscv_vlsseg3e8_v_i8mf8_tumu(__VA_ARGS__)
3997
#define vlsseg4e8_v_i8mf8_m(...) __riscv_vlsseg4e8_v_i8mf8_tumu(__VA_ARGS__)
3998
#define vlsseg5e8_v_i8mf8_m(...) __riscv_vlsseg5e8_v_i8mf8_tumu(__VA_ARGS__)
3999
#define vlsseg6e8_v_i8mf8_m(...) __riscv_vlsseg6e8_v_i8mf8_tumu(__VA_ARGS__)
4000
#define vlsseg7e8_v_i8mf8_m(...) __riscv_vlsseg7e8_v_i8mf8_tumu(__VA_ARGS__)
4001
#define vlsseg8e8_v_i8mf8_m(...) __riscv_vlsseg8e8_v_i8mf8_tumu(__VA_ARGS__)
4002
#define vlsseg2e8_v_i8mf4_m(...) __riscv_vlsseg2e8_v_i8mf4_tumu(__VA_ARGS__)
4003
#define vlsseg3e8_v_i8mf4_m(...) __riscv_vlsseg3e8_v_i8mf4_tumu(__VA_ARGS__)
4004
#define vlsseg4e8_v_i8mf4_m(...) __riscv_vlsseg4e8_v_i8mf4_tumu(__VA_ARGS__)
4005
#define vlsseg5e8_v_i8mf4_m(...) __riscv_vlsseg5e8_v_i8mf4_tumu(__VA_ARGS__)
4006
#define vlsseg6e8_v_i8mf4_m(...) __riscv_vlsseg6e8_v_i8mf4_tumu(__VA_ARGS__)
4007
#define vlsseg7e8_v_i8mf4_m(...) __riscv_vlsseg7e8_v_i8mf4_tumu(__VA_ARGS__)
4008
#define vlsseg8e8_v_i8mf4_m(...) __riscv_vlsseg8e8_v_i8mf4_tumu(__VA_ARGS__)
4009
#define vlsseg2e8_v_i8mf2_m(...) __riscv_vlsseg2e8_v_i8mf2_tumu(__VA_ARGS__)
4010
#define vlsseg3e8_v_i8mf2_m(...) __riscv_vlsseg3e8_v_i8mf2_tumu(__VA_ARGS__)
4011
#define vlsseg4e8_v_i8mf2_m(...) __riscv_vlsseg4e8_v_i8mf2_tumu(__VA_ARGS__)
4012
#define vlsseg5e8_v_i8mf2_m(...) __riscv_vlsseg5e8_v_i8mf2_tumu(__VA_ARGS__)
4013
#define vlsseg6e8_v_i8mf2_m(...) __riscv_vlsseg6e8_v_i8mf2_tumu(__VA_ARGS__)
4014
#define vlsseg7e8_v_i8mf2_m(...) __riscv_vlsseg7e8_v_i8mf2_tumu(__VA_ARGS__)
4015
#define vlsseg8e8_v_i8mf2_m(...) __riscv_vlsseg8e8_v_i8mf2_tumu(__VA_ARGS__)
4016
#define vlsseg2e8_v_i8m1_m(...) __riscv_vlsseg2e8_v_i8m1_tumu(__VA_ARGS__)
4017
#define vlsseg3e8_v_i8m1_m(...) __riscv_vlsseg3e8_v_i8m1_tumu(__VA_ARGS__)
4018
#define vlsseg4e8_v_i8m1_m(...) __riscv_vlsseg4e8_v_i8m1_tumu(__VA_ARGS__)
4019
#define vlsseg5e8_v_i8m1_m(...) __riscv_vlsseg5e8_v_i8m1_tumu(__VA_ARGS__)
4020
#define vlsseg6e8_v_i8m1_m(...) __riscv_vlsseg6e8_v_i8m1_tumu(__VA_ARGS__)
4021
#define vlsseg7e8_v_i8m1_m(...) __riscv_vlsseg7e8_v_i8m1_tumu(__VA_ARGS__)
4022
#define vlsseg8e8_v_i8m1_m(...) __riscv_vlsseg8e8_v_i8m1_tumu(__VA_ARGS__)
4023
#define vlsseg2e8_v_i8m2_m(...) __riscv_vlsseg2e8_v_i8m2_tumu(__VA_ARGS__)
4024
#define vlsseg3e8_v_i8m2_m(...) __riscv_vlsseg3e8_v_i8m2_tumu(__VA_ARGS__)
4025
#define vlsseg4e8_v_i8m2_m(...) __riscv_vlsseg4e8_v_i8m2_tumu(__VA_ARGS__)
4026
#define vlsseg2e8_v_i8m4_m(...) __riscv_vlsseg2e8_v_i8m4_tumu(__VA_ARGS__)
4027
#define vlsseg2e16_v_i16mf4_m(...) __riscv_vlsseg2e16_v_i16mf4_tumu(__VA_ARGS__)
4028
#define vlsseg3e16_v_i16mf4_m(...) __riscv_vlsseg3e16_v_i16mf4_tumu(__VA_ARGS__)
4029
#define vlsseg4e16_v_i16mf4_m(...) __riscv_vlsseg4e16_v_i16mf4_tumu(__VA_ARGS__)
4030
#define vlsseg5e16_v_i16mf4_m(...) __riscv_vlsseg5e16_v_i16mf4_tumu(__VA_ARGS__)
4031
#define vlsseg6e16_v_i16mf4_m(...) __riscv_vlsseg6e16_v_i16mf4_tumu(__VA_ARGS__)
4032
#define vlsseg7e16_v_i16mf4_m(...) __riscv_vlsseg7e16_v_i16mf4_tumu(__VA_ARGS__)
4033
#define vlsseg8e16_v_i16mf4_m(...) __riscv_vlsseg8e16_v_i16mf4_tumu(__VA_ARGS__)
4034
#define vlsseg2e16_v_i16mf2_m(...) __riscv_vlsseg2e16_v_i16mf2_tumu(__VA_ARGS__)
4035
#define vlsseg3e16_v_i16mf2_m(...) __riscv_vlsseg3e16_v_i16mf2_tumu(__VA_ARGS__)
4036
#define vlsseg4e16_v_i16mf2_m(...) __riscv_vlsseg4e16_v_i16mf2_tumu(__VA_ARGS__)
4037
#define vlsseg5e16_v_i16mf2_m(...) __riscv_vlsseg5e16_v_i16mf2_tumu(__VA_ARGS__)
4038
#define vlsseg6e16_v_i16mf2_m(...) __riscv_vlsseg6e16_v_i16mf2_tumu(__VA_ARGS__)
4039
#define vlsseg7e16_v_i16mf2_m(...) __riscv_vlsseg7e16_v_i16mf2_tumu(__VA_ARGS__)
4040
#define vlsseg8e16_v_i16mf2_m(...) __riscv_vlsseg8e16_v_i16mf2_tumu(__VA_ARGS__)
4041
#define vlsseg2e16_v_i16m1_m(...) __riscv_vlsseg2e16_v_i16m1_tumu(__VA_ARGS__)
4042
#define vlsseg3e16_v_i16m1_m(...) __riscv_vlsseg3e16_v_i16m1_tumu(__VA_ARGS__)
4043
#define vlsseg4e16_v_i16m1_m(...) __riscv_vlsseg4e16_v_i16m1_tumu(__VA_ARGS__)
4044
#define vlsseg5e16_v_i16m1_m(...) __riscv_vlsseg5e16_v_i16m1_tumu(__VA_ARGS__)
4045
#define vlsseg6e16_v_i16m1_m(...) __riscv_vlsseg6e16_v_i16m1_tumu(__VA_ARGS__)
4046
#define vlsseg7e16_v_i16m1_m(...) __riscv_vlsseg7e16_v_i16m1_tumu(__VA_ARGS__)
4047
#define vlsseg8e16_v_i16m1_m(...) __riscv_vlsseg8e16_v_i16m1_tumu(__VA_ARGS__)
4048
#define vlsseg2e16_v_i16m2_m(...) __riscv_vlsseg2e16_v_i16m2_tumu(__VA_ARGS__)
4049
#define vlsseg3e16_v_i16m2_m(...) __riscv_vlsseg3e16_v_i16m2_tumu(__VA_ARGS__)
4050
#define vlsseg4e16_v_i16m2_m(...) __riscv_vlsseg4e16_v_i16m2_tumu(__VA_ARGS__)
4051
#define vlsseg2e16_v_i16m4_m(...) __riscv_vlsseg2e16_v_i16m4_tumu(__VA_ARGS__)
4052
#define vlsseg2e32_v_i32mf2_m(...) __riscv_vlsseg2e32_v_i32mf2_tumu(__VA_ARGS__)
4053
#define vlsseg3e32_v_i32mf2_m(...) __riscv_vlsseg3e32_v_i32mf2_tumu(__VA_ARGS__)
4054
#define vlsseg4e32_v_i32mf2_m(...) __riscv_vlsseg4e32_v_i32mf2_tumu(__VA_ARGS__)
4055
#define vlsseg5e32_v_i32mf2_m(...) __riscv_vlsseg5e32_v_i32mf2_tumu(__VA_ARGS__)
4056
#define vlsseg6e32_v_i32mf2_m(...) __riscv_vlsseg6e32_v_i32mf2_tumu(__VA_ARGS__)
4057
#define vlsseg7e32_v_i32mf2_m(...) __riscv_vlsseg7e32_v_i32mf2_tumu(__VA_ARGS__)
4058
#define vlsseg8e32_v_i32mf2_m(...) __riscv_vlsseg8e32_v_i32mf2_tumu(__VA_ARGS__)
4059
#define vlsseg2e32_v_i32m1_m(...) __riscv_vlsseg2e32_v_i32m1_tumu(__VA_ARGS__)
4060
#define vlsseg3e32_v_i32m1_m(...) __riscv_vlsseg3e32_v_i32m1_tumu(__VA_ARGS__)
4061
#define vlsseg4e32_v_i32m1_m(...) __riscv_vlsseg4e32_v_i32m1_tumu(__VA_ARGS__)
4062
#define vlsseg5e32_v_i32m1_m(...) __riscv_vlsseg5e32_v_i32m1_tumu(__VA_ARGS__)
4063
#define vlsseg6e32_v_i32m1_m(...) __riscv_vlsseg6e32_v_i32m1_tumu(__VA_ARGS__)
4064
#define vlsseg7e32_v_i32m1_m(...) __riscv_vlsseg7e32_v_i32m1_tumu(__VA_ARGS__)
4065
#define vlsseg8e32_v_i32m1_m(...) __riscv_vlsseg8e32_v_i32m1_tumu(__VA_ARGS__)
4066
#define vlsseg2e32_v_i32m2_m(...) __riscv_vlsseg2e32_v_i32m2_tumu(__VA_ARGS__)
4067
#define vlsseg3e32_v_i32m2_m(...) __riscv_vlsseg3e32_v_i32m2_tumu(__VA_ARGS__)
4068
#define vlsseg4e32_v_i32m2_m(...) __riscv_vlsseg4e32_v_i32m2_tumu(__VA_ARGS__)
4069
#define vlsseg2e32_v_i32m4_m(...) __riscv_vlsseg2e32_v_i32m4_tumu(__VA_ARGS__)
4070
#define vlsseg2e64_v_i64m1_m(...) __riscv_vlsseg2e64_v_i64m1_tumu(__VA_ARGS__)
4071
#define vlsseg3e64_v_i64m1_m(...) __riscv_vlsseg3e64_v_i64m1_tumu(__VA_ARGS__)
4072
#define vlsseg4e64_v_i64m1_m(...) __riscv_vlsseg4e64_v_i64m1_tumu(__VA_ARGS__)
4073
#define vlsseg5e64_v_i64m1_m(...) __riscv_vlsseg5e64_v_i64m1_tumu(__VA_ARGS__)
4074
#define vlsseg6e64_v_i64m1_m(...) __riscv_vlsseg6e64_v_i64m1_tumu(__VA_ARGS__)
4075
#define vlsseg7e64_v_i64m1_m(...) __riscv_vlsseg7e64_v_i64m1_tumu(__VA_ARGS__)
4076
#define vlsseg8e64_v_i64m1_m(...) __riscv_vlsseg8e64_v_i64m1_tumu(__VA_ARGS__)
4077
#define vlsseg2e64_v_i64m2_m(...) __riscv_vlsseg2e64_v_i64m2_tumu(__VA_ARGS__)
4078
#define vlsseg3e64_v_i64m2_m(...) __riscv_vlsseg3e64_v_i64m2_tumu(__VA_ARGS__)
4079
#define vlsseg4e64_v_i64m2_m(...) __riscv_vlsseg4e64_v_i64m2_tumu(__VA_ARGS__)
4080
#define vlsseg2e64_v_i64m4_m(...) __riscv_vlsseg2e64_v_i64m4_tumu(__VA_ARGS__)
4081
#define vlsseg2e8_v_u8mf8_m(...) __riscv_vlsseg2e8_v_u8mf8_tumu(__VA_ARGS__)
4082
#define vlsseg3e8_v_u8mf8_m(...) __riscv_vlsseg3e8_v_u8mf8_tumu(__VA_ARGS__)
4083
#define vlsseg4e8_v_u8mf8_m(...) __riscv_vlsseg4e8_v_u8mf8_tumu(__VA_ARGS__)
4084
#define vlsseg5e8_v_u8mf8_m(...) __riscv_vlsseg5e8_v_u8mf8_tumu(__VA_ARGS__)
4085
#define vlsseg6e8_v_u8mf8_m(...) __riscv_vlsseg6e8_v_u8mf8_tumu(__VA_ARGS__)
4086
#define vlsseg7e8_v_u8mf8_m(...) __riscv_vlsseg7e8_v_u8mf8_tumu(__VA_ARGS__)
4087
#define vlsseg8e8_v_u8mf8_m(...) __riscv_vlsseg8e8_v_u8mf8_tumu(__VA_ARGS__)
4088
#define vlsseg2e8_v_u8mf4_m(...) __riscv_vlsseg2e8_v_u8mf4_tumu(__VA_ARGS__)
4089
#define vlsseg3e8_v_u8mf4_m(...) __riscv_vlsseg3e8_v_u8mf4_tumu(__VA_ARGS__)
4090
#define vlsseg4e8_v_u8mf4_m(...) __riscv_vlsseg4e8_v_u8mf4_tumu(__VA_ARGS__)
4091
#define vlsseg5e8_v_u8mf4_m(...) __riscv_vlsseg5e8_v_u8mf4_tumu(__VA_ARGS__)
4092
#define vlsseg6e8_v_u8mf4_m(...) __riscv_vlsseg6e8_v_u8mf4_tumu(__VA_ARGS__)
4093
#define vlsseg7e8_v_u8mf4_m(...) __riscv_vlsseg7e8_v_u8mf4_tumu(__VA_ARGS__)
4094
#define vlsseg8e8_v_u8mf4_m(...) __riscv_vlsseg8e8_v_u8mf4_tumu(__VA_ARGS__)
4095
#define vlsseg2e8_v_u8mf2_m(...) __riscv_vlsseg2e8_v_u8mf2_tumu(__VA_ARGS__)
4096
#define vlsseg3e8_v_u8mf2_m(...) __riscv_vlsseg3e8_v_u8mf2_tumu(__VA_ARGS__)
4097
#define vlsseg4e8_v_u8mf2_m(...) __riscv_vlsseg4e8_v_u8mf2_tumu(__VA_ARGS__)
4098
#define vlsseg5e8_v_u8mf2_m(...) __riscv_vlsseg5e8_v_u8mf2_tumu(__VA_ARGS__)
4099
#define vlsseg6e8_v_u8mf2_m(...) __riscv_vlsseg6e8_v_u8mf2_tumu(__VA_ARGS__)
4100
#define vlsseg7e8_v_u8mf2_m(...) __riscv_vlsseg7e8_v_u8mf2_tumu(__VA_ARGS__)
4101
#define vlsseg8e8_v_u8mf2_m(...) __riscv_vlsseg8e8_v_u8mf2_tumu(__VA_ARGS__)
4102
#define vlsseg2e8_v_u8m1_m(...) __riscv_vlsseg2e8_v_u8m1_tumu(__VA_ARGS__)
4103
#define vlsseg3e8_v_u8m1_m(...) __riscv_vlsseg3e8_v_u8m1_tumu(__VA_ARGS__)
4104
#define vlsseg4e8_v_u8m1_m(...) __riscv_vlsseg4e8_v_u8m1_tumu(__VA_ARGS__)
4105
#define vlsseg5e8_v_u8m1_m(...) __riscv_vlsseg5e8_v_u8m1_tumu(__VA_ARGS__)
4106
#define vlsseg6e8_v_u8m1_m(...) __riscv_vlsseg6e8_v_u8m1_tumu(__VA_ARGS__)
4107
#define vlsseg7e8_v_u8m1_m(...) __riscv_vlsseg7e8_v_u8m1_tumu(__VA_ARGS__)
4108
#define vlsseg8e8_v_u8m1_m(...) __riscv_vlsseg8e8_v_u8m1_tumu(__VA_ARGS__)
4109
#define vlsseg2e8_v_u8m2_m(...) __riscv_vlsseg2e8_v_u8m2_tumu(__VA_ARGS__)
4110
#define vlsseg3e8_v_u8m2_m(...) __riscv_vlsseg3e8_v_u8m2_tumu(__VA_ARGS__)
4111
#define vlsseg4e8_v_u8m2_m(...) __riscv_vlsseg4e8_v_u8m2_tumu(__VA_ARGS__)
4112
#define vlsseg2e8_v_u8m4_m(...) __riscv_vlsseg2e8_v_u8m4_tumu(__VA_ARGS__)
4113
#define vlsseg2e16_v_u16mf4_m(...) __riscv_vlsseg2e16_v_u16mf4_tumu(__VA_ARGS__)
4114
#define vlsseg3e16_v_u16mf4_m(...) __riscv_vlsseg3e16_v_u16mf4_tumu(__VA_ARGS__)
4115
#define vlsseg4e16_v_u16mf4_m(...) __riscv_vlsseg4e16_v_u16mf4_tumu(__VA_ARGS__)
4116
#define vlsseg5e16_v_u16mf4_m(...) __riscv_vlsseg5e16_v_u16mf4_tumu(__VA_ARGS__)
4117
#define vlsseg6e16_v_u16mf4_m(...) __riscv_vlsseg6e16_v_u16mf4_tumu(__VA_ARGS__)
4118
#define vlsseg7e16_v_u16mf4_m(...) __riscv_vlsseg7e16_v_u16mf4_tumu(__VA_ARGS__)
4119
#define vlsseg8e16_v_u16mf4_m(...) __riscv_vlsseg8e16_v_u16mf4_tumu(__VA_ARGS__)
4120
#define vlsseg2e16_v_u16mf2_m(...) __riscv_vlsseg2e16_v_u16mf2_tumu(__VA_ARGS__)
4121
#define vlsseg3e16_v_u16mf2_m(...) __riscv_vlsseg3e16_v_u16mf2_tumu(__VA_ARGS__)
4122
#define vlsseg4e16_v_u16mf2_m(...) __riscv_vlsseg4e16_v_u16mf2_tumu(__VA_ARGS__)
4123
#define vlsseg5e16_v_u16mf2_m(...) __riscv_vlsseg5e16_v_u16mf2_tumu(__VA_ARGS__)
4124
#define vlsseg6e16_v_u16mf2_m(...) __riscv_vlsseg6e16_v_u16mf2_tumu(__VA_ARGS__)
4125
#define vlsseg7e16_v_u16mf2_m(...) __riscv_vlsseg7e16_v_u16mf2_tumu(__VA_ARGS__)
4126
#define vlsseg8e16_v_u16mf2_m(...) __riscv_vlsseg8e16_v_u16mf2_tumu(__VA_ARGS__)
4127
#define vlsseg2e16_v_u16m1_m(...) __riscv_vlsseg2e16_v_u16m1_tumu(__VA_ARGS__)
4128
#define vlsseg3e16_v_u16m1_m(...) __riscv_vlsseg3e16_v_u16m1_tumu(__VA_ARGS__)
4129
#define vlsseg4e16_v_u16m1_m(...) __riscv_vlsseg4e16_v_u16m1_tumu(__VA_ARGS__)
4130
#define vlsseg5e16_v_u16m1_m(...) __riscv_vlsseg5e16_v_u16m1_tumu(__VA_ARGS__)
4131
#define vlsseg6e16_v_u16m1_m(...) __riscv_vlsseg6e16_v_u16m1_tumu(__VA_ARGS__)
4132
#define vlsseg7e16_v_u16m1_m(...) __riscv_vlsseg7e16_v_u16m1_tumu(__VA_ARGS__)
4133
#define vlsseg8e16_v_u16m1_m(...) __riscv_vlsseg8e16_v_u16m1_tumu(__VA_ARGS__)
4134
#define vlsseg2e16_v_u16m2_m(...) __riscv_vlsseg2e16_v_u16m2_tumu(__VA_ARGS__)
4135
#define vlsseg3e16_v_u16m2_m(...) __riscv_vlsseg3e16_v_u16m2_tumu(__VA_ARGS__)
4136
#define vlsseg4e16_v_u16m2_m(...) __riscv_vlsseg4e16_v_u16m2_tumu(__VA_ARGS__)
4137
#define vlsseg2e16_v_u16m4_m(...) __riscv_vlsseg2e16_v_u16m4_tumu(__VA_ARGS__)
4138
#define vlsseg2e32_v_u32mf2_m(...) __riscv_vlsseg2e32_v_u32mf2_tumu(__VA_ARGS__)
4139
#define vlsseg3e32_v_u32mf2_m(...) __riscv_vlsseg3e32_v_u32mf2_tumu(__VA_ARGS__)
4140
#define vlsseg4e32_v_u32mf2_m(...) __riscv_vlsseg4e32_v_u32mf2_tumu(__VA_ARGS__)
4141
#define vlsseg5e32_v_u32mf2_m(...) __riscv_vlsseg5e32_v_u32mf2_tumu(__VA_ARGS__)
4142
#define vlsseg6e32_v_u32mf2_m(...) __riscv_vlsseg6e32_v_u32mf2_tumu(__VA_ARGS__)
4143
#define vlsseg7e32_v_u32mf2_m(...) __riscv_vlsseg7e32_v_u32mf2_tumu(__VA_ARGS__)
4144
#define vlsseg8e32_v_u32mf2_m(...) __riscv_vlsseg8e32_v_u32mf2_tumu(__VA_ARGS__)
4145
#define vlsseg2e32_v_u32m1_m(...) __riscv_vlsseg2e32_v_u32m1_tumu(__VA_ARGS__)
4146
#define vlsseg3e32_v_u32m1_m(...) __riscv_vlsseg3e32_v_u32m1_tumu(__VA_ARGS__)
4147
#define vlsseg4e32_v_u32m1_m(...) __riscv_vlsseg4e32_v_u32m1_tumu(__VA_ARGS__)
4148
#define vlsseg5e32_v_u32m1_m(...) __riscv_vlsseg5e32_v_u32m1_tumu(__VA_ARGS__)
4149
#define vlsseg6e32_v_u32m1_m(...) __riscv_vlsseg6e32_v_u32m1_tumu(__VA_ARGS__)
4150
#define vlsseg7e32_v_u32m1_m(...) __riscv_vlsseg7e32_v_u32m1_tumu(__VA_ARGS__)
4151
#define vlsseg8e32_v_u32m1_m(...) __riscv_vlsseg8e32_v_u32m1_tumu(__VA_ARGS__)
4152
#define vlsseg2e32_v_u32m2_m(...) __riscv_vlsseg2e32_v_u32m2_tumu(__VA_ARGS__)
4153
#define vlsseg3e32_v_u32m2_m(...) __riscv_vlsseg3e32_v_u32m2_tumu(__VA_ARGS__)
4154
#define vlsseg4e32_v_u32m2_m(...) __riscv_vlsseg4e32_v_u32m2_tumu(__VA_ARGS__)
4155
#define vlsseg2e32_v_u32m4_m(...) __riscv_vlsseg2e32_v_u32m4_tumu(__VA_ARGS__)
4156
#define vlsseg2e64_v_u64m1_m(...) __riscv_vlsseg2e64_v_u64m1_tumu(__VA_ARGS__)
4157
#define vlsseg3e64_v_u64m1_m(...) __riscv_vlsseg3e64_v_u64m1_tumu(__VA_ARGS__)
4158
#define vlsseg4e64_v_u64m1_m(...) __riscv_vlsseg4e64_v_u64m1_tumu(__VA_ARGS__)
4159
#define vlsseg5e64_v_u64m1_m(...) __riscv_vlsseg5e64_v_u64m1_tumu(__VA_ARGS__)
4160
#define vlsseg6e64_v_u64m1_m(...) __riscv_vlsseg6e64_v_u64m1_tumu(__VA_ARGS__)
4161
#define vlsseg7e64_v_u64m1_m(...) __riscv_vlsseg7e64_v_u64m1_tumu(__VA_ARGS__)
4162
#define vlsseg8e64_v_u64m1_m(...) __riscv_vlsseg8e64_v_u64m1_tumu(__VA_ARGS__)
4163
#define vlsseg2e64_v_u64m2_m(...) __riscv_vlsseg2e64_v_u64m2_tumu(__VA_ARGS__)
4164
#define vlsseg3e64_v_u64m2_m(...) __riscv_vlsseg3e64_v_u64m2_tumu(__VA_ARGS__)
4165
#define vlsseg4e64_v_u64m2_m(...) __riscv_vlsseg4e64_v_u64m2_tumu(__VA_ARGS__)
4166
#define vlsseg2e64_v_u64m4_m(...) __riscv_vlsseg2e64_v_u64m4_tumu(__VA_ARGS__)
4167
#define vssseg2e16_v_f16mf4(...) __riscv_vssseg2e16_v_f16mf4(__VA_ARGS__)
4168
#define vssseg3e16_v_f16mf4(...) __riscv_vssseg3e16_v_f16mf4(__VA_ARGS__)
4169
#define vssseg4e16_v_f16mf4(...) __riscv_vssseg4e16_v_f16mf4(__VA_ARGS__)
4170
#define vssseg5e16_v_f16mf4(...) __riscv_vssseg5e16_v_f16mf4(__VA_ARGS__)
4171
#define vssseg6e16_v_f16mf4(...) __riscv_vssseg6e16_v_f16mf4(__VA_ARGS__)
4172
#define vssseg7e16_v_f16mf4(...) __riscv_vssseg7e16_v_f16mf4(__VA_ARGS__)
4173
#define vssseg8e16_v_f16mf4(...) __riscv_vssseg8e16_v_f16mf4(__VA_ARGS__)
4174
#define vssseg2e16_v_f16mf2(...) __riscv_vssseg2e16_v_f16mf2(__VA_ARGS__)
4175
#define vssseg3e16_v_f16mf2(...) __riscv_vssseg3e16_v_f16mf2(__VA_ARGS__)
4176
#define vssseg4e16_v_f16mf2(...) __riscv_vssseg4e16_v_f16mf2(__VA_ARGS__)
4177
#define vssseg5e16_v_f16mf2(...) __riscv_vssseg5e16_v_f16mf2(__VA_ARGS__)
4178
#define vssseg6e16_v_f16mf2(...) __riscv_vssseg6e16_v_f16mf2(__VA_ARGS__)
4179
#define vssseg7e16_v_f16mf2(...) __riscv_vssseg7e16_v_f16mf2(__VA_ARGS__)
4180
#define vssseg8e16_v_f16mf2(...) __riscv_vssseg8e16_v_f16mf2(__VA_ARGS__)
4181
#define vssseg2e16_v_f16m1(...) __riscv_vssseg2e16_v_f16m1(__VA_ARGS__)
4182
#define vssseg3e16_v_f16m1(...) __riscv_vssseg3e16_v_f16m1(__VA_ARGS__)
4183
#define vssseg4e16_v_f16m1(...) __riscv_vssseg4e16_v_f16m1(__VA_ARGS__)
4184
#define vssseg5e16_v_f16m1(...) __riscv_vssseg5e16_v_f16m1(__VA_ARGS__)
4185
#define vssseg6e16_v_f16m1(...) __riscv_vssseg6e16_v_f16m1(__VA_ARGS__)
4186
#define vssseg7e16_v_f16m1(...) __riscv_vssseg7e16_v_f16m1(__VA_ARGS__)
4187
#define vssseg8e16_v_f16m1(...) __riscv_vssseg8e16_v_f16m1(__VA_ARGS__)
4188
#define vssseg2e16_v_f16m2(...) __riscv_vssseg2e16_v_f16m2(__VA_ARGS__)
4189
#define vssseg3e16_v_f16m2(...) __riscv_vssseg3e16_v_f16m2(__VA_ARGS__)
4190
#define vssseg4e16_v_f16m2(...) __riscv_vssseg4e16_v_f16m2(__VA_ARGS__)
4191
#define vssseg2e16_v_f16m4(...) __riscv_vssseg2e16_v_f16m4(__VA_ARGS__)
4192
#define vssseg2e32_v_f32mf2(...) __riscv_vssseg2e32_v_f32mf2(__VA_ARGS__)
4193
#define vssseg3e32_v_f32mf2(...) __riscv_vssseg3e32_v_f32mf2(__VA_ARGS__)
4194
#define vssseg4e32_v_f32mf2(...) __riscv_vssseg4e32_v_f32mf2(__VA_ARGS__)
4195
#define vssseg5e32_v_f32mf2(...) __riscv_vssseg5e32_v_f32mf2(__VA_ARGS__)
4196
#define vssseg6e32_v_f32mf2(...) __riscv_vssseg6e32_v_f32mf2(__VA_ARGS__)
4197
#define vssseg7e32_v_f32mf2(...) __riscv_vssseg7e32_v_f32mf2(__VA_ARGS__)
4198
#define vssseg8e32_v_f32mf2(...) __riscv_vssseg8e32_v_f32mf2(__VA_ARGS__)
4199
#define vssseg2e32_v_f32m1(...) __riscv_vssseg2e32_v_f32m1(__VA_ARGS__)
4200
#define vssseg3e32_v_f32m1(...) __riscv_vssseg3e32_v_f32m1(__VA_ARGS__)
4201
#define vssseg4e32_v_f32m1(...) __riscv_vssseg4e32_v_f32m1(__VA_ARGS__)
4202
#define vssseg5e32_v_f32m1(...) __riscv_vssseg5e32_v_f32m1(__VA_ARGS__)
4203
#define vssseg6e32_v_f32m1(...) __riscv_vssseg6e32_v_f32m1(__VA_ARGS__)
4204
#define vssseg7e32_v_f32m1(...) __riscv_vssseg7e32_v_f32m1(__VA_ARGS__)
4205
#define vssseg8e32_v_f32m1(...) __riscv_vssseg8e32_v_f32m1(__VA_ARGS__)
4206
#define vssseg2e32_v_f32m2(...) __riscv_vssseg2e32_v_f32m2(__VA_ARGS__)
4207
#define vssseg3e32_v_f32m2(...) __riscv_vssseg3e32_v_f32m2(__VA_ARGS__)
4208
#define vssseg4e32_v_f32m2(...) __riscv_vssseg4e32_v_f32m2(__VA_ARGS__)
4209
#define vssseg2e32_v_f32m4(...) __riscv_vssseg2e32_v_f32m4(__VA_ARGS__)
4210
#define vssseg2e64_v_f64m1(...) __riscv_vssseg2e64_v_f64m1(__VA_ARGS__)
4211
#define vssseg3e64_v_f64m1(...) __riscv_vssseg3e64_v_f64m1(__VA_ARGS__)
4212
#define vssseg4e64_v_f64m1(...) __riscv_vssseg4e64_v_f64m1(__VA_ARGS__)
4213
#define vssseg5e64_v_f64m1(...) __riscv_vssseg5e64_v_f64m1(__VA_ARGS__)
4214
#define vssseg6e64_v_f64m1(...) __riscv_vssseg6e64_v_f64m1(__VA_ARGS__)
4215
#define vssseg7e64_v_f64m1(...) __riscv_vssseg7e64_v_f64m1(__VA_ARGS__)
4216
#define vssseg8e64_v_f64m1(...) __riscv_vssseg8e64_v_f64m1(__VA_ARGS__)
4217
#define vssseg2e64_v_f64m2(...) __riscv_vssseg2e64_v_f64m2(__VA_ARGS__)
4218
#define vssseg3e64_v_f64m2(...) __riscv_vssseg3e64_v_f64m2(__VA_ARGS__)
4219
#define vssseg4e64_v_f64m2(...) __riscv_vssseg4e64_v_f64m2(__VA_ARGS__)
4220
#define vssseg2e64_v_f64m4(...) __riscv_vssseg2e64_v_f64m4(__VA_ARGS__)
4221
#define vssseg2e8_v_i8mf8(...) __riscv_vssseg2e8_v_i8mf8(__VA_ARGS__)
4222
#define vssseg3e8_v_i8mf8(...) __riscv_vssseg3e8_v_i8mf8(__VA_ARGS__)
4223
#define vssseg4e8_v_i8mf8(...) __riscv_vssseg4e8_v_i8mf8(__VA_ARGS__)
4224
#define vssseg5e8_v_i8mf8(...) __riscv_vssseg5e8_v_i8mf8(__VA_ARGS__)
4225
#define vssseg6e8_v_i8mf8(...) __riscv_vssseg6e8_v_i8mf8(__VA_ARGS__)
4226
#define vssseg7e8_v_i8mf8(...) __riscv_vssseg7e8_v_i8mf8(__VA_ARGS__)
4227
#define vssseg8e8_v_i8mf8(...) __riscv_vssseg8e8_v_i8mf8(__VA_ARGS__)
4228
#define vssseg2e8_v_i8mf4(...) __riscv_vssseg2e8_v_i8mf4(__VA_ARGS__)
4229
#define vssseg3e8_v_i8mf4(...) __riscv_vssseg3e8_v_i8mf4(__VA_ARGS__)
4230
#define vssseg4e8_v_i8mf4(...) __riscv_vssseg4e8_v_i8mf4(__VA_ARGS__)
4231
#define vssseg5e8_v_i8mf4(...) __riscv_vssseg5e8_v_i8mf4(__VA_ARGS__)
4232
#define vssseg6e8_v_i8mf4(...) __riscv_vssseg6e8_v_i8mf4(__VA_ARGS__)
4233
#define vssseg7e8_v_i8mf4(...) __riscv_vssseg7e8_v_i8mf4(__VA_ARGS__)
4234
#define vssseg8e8_v_i8mf4(...) __riscv_vssseg8e8_v_i8mf4(__VA_ARGS__)
4235
#define vssseg2e8_v_i8mf2(...) __riscv_vssseg2e8_v_i8mf2(__VA_ARGS__)
4236
#define vssseg3e8_v_i8mf2(...) __riscv_vssseg3e8_v_i8mf2(__VA_ARGS__)
4237
#define vssseg4e8_v_i8mf2(...) __riscv_vssseg4e8_v_i8mf2(__VA_ARGS__)
4238
#define vssseg5e8_v_i8mf2(...) __riscv_vssseg5e8_v_i8mf2(__VA_ARGS__)
4239
#define vssseg6e8_v_i8mf2(...) __riscv_vssseg6e8_v_i8mf2(__VA_ARGS__)
4240
#define vssseg7e8_v_i8mf2(...) __riscv_vssseg7e8_v_i8mf2(__VA_ARGS__)
4241
#define vssseg8e8_v_i8mf2(...) __riscv_vssseg8e8_v_i8mf2(__VA_ARGS__)
4242
#define vssseg2e8_v_i8m1(...) __riscv_vssseg2e8_v_i8m1(__VA_ARGS__)
4243
#define vssseg3e8_v_i8m1(...) __riscv_vssseg3e8_v_i8m1(__VA_ARGS__)
4244
#define vssseg4e8_v_i8m1(...) __riscv_vssseg4e8_v_i8m1(__VA_ARGS__)
4245
#define vssseg5e8_v_i8m1(...) __riscv_vssseg5e8_v_i8m1(__VA_ARGS__)
4246
#define vssseg6e8_v_i8m1(...) __riscv_vssseg6e8_v_i8m1(__VA_ARGS__)
4247
#define vssseg7e8_v_i8m1(...) __riscv_vssseg7e8_v_i8m1(__VA_ARGS__)
4248
#define vssseg8e8_v_i8m1(...) __riscv_vssseg8e8_v_i8m1(__VA_ARGS__)
4249
#define vssseg2e8_v_i8m2(...) __riscv_vssseg2e8_v_i8m2(__VA_ARGS__)
4250
#define vssseg3e8_v_i8m2(...) __riscv_vssseg3e8_v_i8m2(__VA_ARGS__)
4251
#define vssseg4e8_v_i8m2(...) __riscv_vssseg4e8_v_i8m2(__VA_ARGS__)
4252
#define vssseg2e8_v_i8m4(...) __riscv_vssseg2e8_v_i8m4(__VA_ARGS__)
4253
#define vssseg2e16_v_i16mf4(...) __riscv_vssseg2e16_v_i16mf4(__VA_ARGS__)
4254
#define vssseg3e16_v_i16mf4(...) __riscv_vssseg3e16_v_i16mf4(__VA_ARGS__)
4255
#define vssseg4e16_v_i16mf4(...) __riscv_vssseg4e16_v_i16mf4(__VA_ARGS__)
4256
#define vssseg5e16_v_i16mf4(...) __riscv_vssseg5e16_v_i16mf4(__VA_ARGS__)
4257
#define vssseg6e16_v_i16mf4(...) __riscv_vssseg6e16_v_i16mf4(__VA_ARGS__)
4258
#define vssseg7e16_v_i16mf4(...) __riscv_vssseg7e16_v_i16mf4(__VA_ARGS__)
4259
#define vssseg8e16_v_i16mf4(...) __riscv_vssseg8e16_v_i16mf4(__VA_ARGS__)
4260
#define vssseg2e16_v_i16mf2(...) __riscv_vssseg2e16_v_i16mf2(__VA_ARGS__)
4261
#define vssseg3e16_v_i16mf2(...) __riscv_vssseg3e16_v_i16mf2(__VA_ARGS__)
4262
#define vssseg4e16_v_i16mf2(...) __riscv_vssseg4e16_v_i16mf2(__VA_ARGS__)
4263
#define vssseg5e16_v_i16mf2(...) __riscv_vssseg5e16_v_i16mf2(__VA_ARGS__)
4264
#define vssseg6e16_v_i16mf2(...) __riscv_vssseg6e16_v_i16mf2(__VA_ARGS__)
4265
#define vssseg7e16_v_i16mf2(...) __riscv_vssseg7e16_v_i16mf2(__VA_ARGS__)
4266
#define vssseg8e16_v_i16mf2(...) __riscv_vssseg8e16_v_i16mf2(__VA_ARGS__)
4267
#define vssseg2e16_v_i16m1(...) __riscv_vssseg2e16_v_i16m1(__VA_ARGS__)
4268
#define vssseg3e16_v_i16m1(...) __riscv_vssseg3e16_v_i16m1(__VA_ARGS__)
4269
#define vssseg4e16_v_i16m1(...) __riscv_vssseg4e16_v_i16m1(__VA_ARGS__)
4270
#define vssseg5e16_v_i16m1(...) __riscv_vssseg5e16_v_i16m1(__VA_ARGS__)
4271
#define vssseg6e16_v_i16m1(...) __riscv_vssseg6e16_v_i16m1(__VA_ARGS__)
4272
#define vssseg7e16_v_i16m1(...) __riscv_vssseg7e16_v_i16m1(__VA_ARGS__)
4273
#define vssseg8e16_v_i16m1(...) __riscv_vssseg8e16_v_i16m1(__VA_ARGS__)
4274
#define vssseg2e16_v_i16m2(...) __riscv_vssseg2e16_v_i16m2(__VA_ARGS__)
4275
#define vssseg3e16_v_i16m2(...) __riscv_vssseg3e16_v_i16m2(__VA_ARGS__)
4276
#define vssseg4e16_v_i16m2(...) __riscv_vssseg4e16_v_i16m2(__VA_ARGS__)
4277
#define vssseg2e16_v_i16m4(...) __riscv_vssseg2e16_v_i16m4(__VA_ARGS__)
4278
#define vssseg2e32_v_i32mf2(...) __riscv_vssseg2e32_v_i32mf2(__VA_ARGS__)
4279
#define vssseg3e32_v_i32mf2(...) __riscv_vssseg3e32_v_i32mf2(__VA_ARGS__)
4280
#define vssseg4e32_v_i32mf2(...) __riscv_vssseg4e32_v_i32mf2(__VA_ARGS__)
4281
#define vssseg5e32_v_i32mf2(...) __riscv_vssseg5e32_v_i32mf2(__VA_ARGS__)
4282
#define vssseg6e32_v_i32mf2(...) __riscv_vssseg6e32_v_i32mf2(__VA_ARGS__)
4283
#define vssseg7e32_v_i32mf2(...) __riscv_vssseg7e32_v_i32mf2(__VA_ARGS__)
4284
#define vssseg8e32_v_i32mf2(...) __riscv_vssseg8e32_v_i32mf2(__VA_ARGS__)
4285
#define vssseg2e32_v_i32m1(...) __riscv_vssseg2e32_v_i32m1(__VA_ARGS__)
4286
#define vssseg3e32_v_i32m1(...) __riscv_vssseg3e32_v_i32m1(__VA_ARGS__)
4287
#define vssseg4e32_v_i32m1(...) __riscv_vssseg4e32_v_i32m1(__VA_ARGS__)
4288
#define vssseg5e32_v_i32m1(...) __riscv_vssseg5e32_v_i32m1(__VA_ARGS__)
4289
#define vssseg6e32_v_i32m1(...) __riscv_vssseg6e32_v_i32m1(__VA_ARGS__)
4290
#define vssseg7e32_v_i32m1(...) __riscv_vssseg7e32_v_i32m1(__VA_ARGS__)
4291
#define vssseg8e32_v_i32m1(...) __riscv_vssseg8e32_v_i32m1(__VA_ARGS__)
4292
#define vssseg2e32_v_i32m2(...) __riscv_vssseg2e32_v_i32m2(__VA_ARGS__)
4293
#define vssseg3e32_v_i32m2(...) __riscv_vssseg3e32_v_i32m2(__VA_ARGS__)
4294
#define vssseg4e32_v_i32m2(...) __riscv_vssseg4e32_v_i32m2(__VA_ARGS__)
4295
#define vssseg2e32_v_i32m4(...) __riscv_vssseg2e32_v_i32m4(__VA_ARGS__)
4296
#define vssseg2e64_v_i64m1(...) __riscv_vssseg2e64_v_i64m1(__VA_ARGS__)
4297
#define vssseg3e64_v_i64m1(...) __riscv_vssseg3e64_v_i64m1(__VA_ARGS__)
4298
#define vssseg4e64_v_i64m1(...) __riscv_vssseg4e64_v_i64m1(__VA_ARGS__)
4299
#define vssseg5e64_v_i64m1(...) __riscv_vssseg5e64_v_i64m1(__VA_ARGS__)
4300
#define vssseg6e64_v_i64m1(...) __riscv_vssseg6e64_v_i64m1(__VA_ARGS__)
4301
#define vssseg7e64_v_i64m1(...) __riscv_vssseg7e64_v_i64m1(__VA_ARGS__)
4302
#define vssseg8e64_v_i64m1(...) __riscv_vssseg8e64_v_i64m1(__VA_ARGS__)
4303
#define vssseg2e64_v_i64m2(...) __riscv_vssseg2e64_v_i64m2(__VA_ARGS__)
4304
#define vssseg3e64_v_i64m2(...) __riscv_vssseg3e64_v_i64m2(__VA_ARGS__)
4305
#define vssseg4e64_v_i64m2(...) __riscv_vssseg4e64_v_i64m2(__VA_ARGS__)
4306
#define vssseg2e64_v_i64m4(...) __riscv_vssseg2e64_v_i64m4(__VA_ARGS__)
4307
#define vssseg2e8_v_u8mf8(...) __riscv_vssseg2e8_v_u8mf8(__VA_ARGS__)
4308
#define vssseg3e8_v_u8mf8(...) __riscv_vssseg3e8_v_u8mf8(__VA_ARGS__)
4309
#define vssseg4e8_v_u8mf8(...) __riscv_vssseg4e8_v_u8mf8(__VA_ARGS__)
4310
#define vssseg5e8_v_u8mf8(...) __riscv_vssseg5e8_v_u8mf8(__VA_ARGS__)
4311
#define vssseg6e8_v_u8mf8(...) __riscv_vssseg6e8_v_u8mf8(__VA_ARGS__)
4312
#define vssseg7e8_v_u8mf8(...) __riscv_vssseg7e8_v_u8mf8(__VA_ARGS__)
4313
#define vssseg8e8_v_u8mf8(...) __riscv_vssseg8e8_v_u8mf8(__VA_ARGS__)
4314
#define vssseg2e8_v_u8mf4(...) __riscv_vssseg2e8_v_u8mf4(__VA_ARGS__)
4315
#define vssseg3e8_v_u8mf4(...) __riscv_vssseg3e8_v_u8mf4(__VA_ARGS__)
4316
#define vssseg4e8_v_u8mf4(...) __riscv_vssseg4e8_v_u8mf4(__VA_ARGS__)
4317
#define vssseg5e8_v_u8mf4(...) __riscv_vssseg5e8_v_u8mf4(__VA_ARGS__)
4318
#define vssseg6e8_v_u8mf4(...) __riscv_vssseg6e8_v_u8mf4(__VA_ARGS__)
4319
#define vssseg7e8_v_u8mf4(...) __riscv_vssseg7e8_v_u8mf4(__VA_ARGS__)
4320
#define vssseg8e8_v_u8mf4(...) __riscv_vssseg8e8_v_u8mf4(__VA_ARGS__)
4321
#define vssseg2e8_v_u8mf2(...) __riscv_vssseg2e8_v_u8mf2(__VA_ARGS__)
4322
#define vssseg3e8_v_u8mf2(...) __riscv_vssseg3e8_v_u8mf2(__VA_ARGS__)
4323
#define vssseg4e8_v_u8mf2(...) __riscv_vssseg4e8_v_u8mf2(__VA_ARGS__)
4324
#define vssseg5e8_v_u8mf2(...) __riscv_vssseg5e8_v_u8mf2(__VA_ARGS__)
4325
#define vssseg6e8_v_u8mf2(...) __riscv_vssseg6e8_v_u8mf2(__VA_ARGS__)
4326
#define vssseg7e8_v_u8mf2(...) __riscv_vssseg7e8_v_u8mf2(__VA_ARGS__)
4327
#define vssseg8e8_v_u8mf2(...) __riscv_vssseg8e8_v_u8mf2(__VA_ARGS__)
4328
#define vssseg2e8_v_u8m1(...) __riscv_vssseg2e8_v_u8m1(__VA_ARGS__)
4329
#define vssseg3e8_v_u8m1(...) __riscv_vssseg3e8_v_u8m1(__VA_ARGS__)
4330
#define vssseg4e8_v_u8m1(...) __riscv_vssseg4e8_v_u8m1(__VA_ARGS__)
4331
#define vssseg5e8_v_u8m1(...) __riscv_vssseg5e8_v_u8m1(__VA_ARGS__)
4332
#define vssseg6e8_v_u8m1(...) __riscv_vssseg6e8_v_u8m1(__VA_ARGS__)
4333
#define vssseg7e8_v_u8m1(...) __riscv_vssseg7e8_v_u8m1(__VA_ARGS__)
4334
#define vssseg8e8_v_u8m1(...) __riscv_vssseg8e8_v_u8m1(__VA_ARGS__)
4335
#define vssseg2e8_v_u8m2(...) __riscv_vssseg2e8_v_u8m2(__VA_ARGS__)
4336
#define vssseg3e8_v_u8m2(...) __riscv_vssseg3e8_v_u8m2(__VA_ARGS__)
4337
#define vssseg4e8_v_u8m2(...) __riscv_vssseg4e8_v_u8m2(__VA_ARGS__)
4338
#define vssseg2e8_v_u8m4(...) __riscv_vssseg2e8_v_u8m4(__VA_ARGS__)
4339
#define vssseg2e16_v_u16mf4(...) __riscv_vssseg2e16_v_u16mf4(__VA_ARGS__)
4340
#define vssseg3e16_v_u16mf4(...) __riscv_vssseg3e16_v_u16mf4(__VA_ARGS__)
4341
#define vssseg4e16_v_u16mf4(...) __riscv_vssseg4e16_v_u16mf4(__VA_ARGS__)
4342
#define vssseg5e16_v_u16mf4(...) __riscv_vssseg5e16_v_u16mf4(__VA_ARGS__)
4343
#define vssseg6e16_v_u16mf4(...) __riscv_vssseg6e16_v_u16mf4(__VA_ARGS__)
4344
#define vssseg7e16_v_u16mf4(...) __riscv_vssseg7e16_v_u16mf4(__VA_ARGS__)
4345
#define vssseg8e16_v_u16mf4(...) __riscv_vssseg8e16_v_u16mf4(__VA_ARGS__)
4346
#define vssseg2e16_v_u16mf2(...) __riscv_vssseg2e16_v_u16mf2(__VA_ARGS__)
4347
#define vssseg3e16_v_u16mf2(...) __riscv_vssseg3e16_v_u16mf2(__VA_ARGS__)
4348
#define vssseg4e16_v_u16mf2(...) __riscv_vssseg4e16_v_u16mf2(__VA_ARGS__)
4349
#define vssseg5e16_v_u16mf2(...) __riscv_vssseg5e16_v_u16mf2(__VA_ARGS__)
4350
#define vssseg6e16_v_u16mf2(...) __riscv_vssseg6e16_v_u16mf2(__VA_ARGS__)
4351
#define vssseg7e16_v_u16mf2(...) __riscv_vssseg7e16_v_u16mf2(__VA_ARGS__)
4352
#define vssseg8e16_v_u16mf2(...) __riscv_vssseg8e16_v_u16mf2(__VA_ARGS__)
4353
#define vssseg2e16_v_u16m1(...) __riscv_vssseg2e16_v_u16m1(__VA_ARGS__)
4354
#define vssseg3e16_v_u16m1(...) __riscv_vssseg3e16_v_u16m1(__VA_ARGS__)
4355
#define vssseg4e16_v_u16m1(...) __riscv_vssseg4e16_v_u16m1(__VA_ARGS__)
4356
#define vssseg5e16_v_u16m1(...) __riscv_vssseg5e16_v_u16m1(__VA_ARGS__)
4357
#define vssseg6e16_v_u16m1(...) __riscv_vssseg6e16_v_u16m1(__VA_ARGS__)
4358
#define vssseg7e16_v_u16m1(...) __riscv_vssseg7e16_v_u16m1(__VA_ARGS__)
4359
#define vssseg8e16_v_u16m1(...) __riscv_vssseg8e16_v_u16m1(__VA_ARGS__)
4360
#define vssseg2e16_v_u16m2(...) __riscv_vssseg2e16_v_u16m2(__VA_ARGS__)
4361
#define vssseg3e16_v_u16m2(...) __riscv_vssseg3e16_v_u16m2(__VA_ARGS__)
4362
#define vssseg4e16_v_u16m2(...) __riscv_vssseg4e16_v_u16m2(__VA_ARGS__)
4363
#define vssseg2e16_v_u16m4(...) __riscv_vssseg2e16_v_u16m4(__VA_ARGS__)
4364
#define vssseg2e32_v_u32mf2(...) __riscv_vssseg2e32_v_u32mf2(__VA_ARGS__)
4365
#define vssseg3e32_v_u32mf2(...) __riscv_vssseg3e32_v_u32mf2(__VA_ARGS__)
4366
#define vssseg4e32_v_u32mf2(...) __riscv_vssseg4e32_v_u32mf2(__VA_ARGS__)
4367
#define vssseg5e32_v_u32mf2(...) __riscv_vssseg5e32_v_u32mf2(__VA_ARGS__)
4368
#define vssseg6e32_v_u32mf2(...) __riscv_vssseg6e32_v_u32mf2(__VA_ARGS__)
4369
#define vssseg7e32_v_u32mf2(...) __riscv_vssseg7e32_v_u32mf2(__VA_ARGS__)
4370
#define vssseg8e32_v_u32mf2(...) __riscv_vssseg8e32_v_u32mf2(__VA_ARGS__)
4371
#define vssseg2e32_v_u32m1(...) __riscv_vssseg2e32_v_u32m1(__VA_ARGS__)
4372
#define vssseg3e32_v_u32m1(...) __riscv_vssseg3e32_v_u32m1(__VA_ARGS__)
4373
#define vssseg4e32_v_u32m1(...) __riscv_vssseg4e32_v_u32m1(__VA_ARGS__)
4374
#define vssseg5e32_v_u32m1(...) __riscv_vssseg5e32_v_u32m1(__VA_ARGS__)
4375
#define vssseg6e32_v_u32m1(...) __riscv_vssseg6e32_v_u32m1(__VA_ARGS__)
4376
#define vssseg7e32_v_u32m1(...) __riscv_vssseg7e32_v_u32m1(__VA_ARGS__)
4377
#define vssseg8e32_v_u32m1(...) __riscv_vssseg8e32_v_u32m1(__VA_ARGS__)
4378
#define vssseg2e32_v_u32m2(...) __riscv_vssseg2e32_v_u32m2(__VA_ARGS__)
4379
#define vssseg3e32_v_u32m2(...) __riscv_vssseg3e32_v_u32m2(__VA_ARGS__)
4380
#define vssseg4e32_v_u32m2(...) __riscv_vssseg4e32_v_u32m2(__VA_ARGS__)
4381
#define vssseg2e32_v_u32m4(...) __riscv_vssseg2e32_v_u32m4(__VA_ARGS__)
4382
#define vssseg2e64_v_u64m1(...) __riscv_vssseg2e64_v_u64m1(__VA_ARGS__)
4383
#define vssseg3e64_v_u64m1(...) __riscv_vssseg3e64_v_u64m1(__VA_ARGS__)
4384
#define vssseg4e64_v_u64m1(...) __riscv_vssseg4e64_v_u64m1(__VA_ARGS__)
4385
#define vssseg5e64_v_u64m1(...) __riscv_vssseg5e64_v_u64m1(__VA_ARGS__)
4386
#define vssseg6e64_v_u64m1(...) __riscv_vssseg6e64_v_u64m1(__VA_ARGS__)
4387
#define vssseg7e64_v_u64m1(...) __riscv_vssseg7e64_v_u64m1(__VA_ARGS__)
4388
#define vssseg8e64_v_u64m1(...) __riscv_vssseg8e64_v_u64m1(__VA_ARGS__)
4389
#define vssseg2e64_v_u64m2(...) __riscv_vssseg2e64_v_u64m2(__VA_ARGS__)
4390
#define vssseg3e64_v_u64m2(...) __riscv_vssseg3e64_v_u64m2(__VA_ARGS__)
4391
#define vssseg4e64_v_u64m2(...) __riscv_vssseg4e64_v_u64m2(__VA_ARGS__)
4392
#define vssseg2e64_v_u64m4(...) __riscv_vssseg2e64_v_u64m4(__VA_ARGS__)
4393
// masked functions
4394
#define vssseg2e16_v_f16mf4_m(...) __riscv_vssseg2e16_v_f16mf4_m(__VA_ARGS__)
4395
#define vssseg3e16_v_f16mf4_m(...) __riscv_vssseg3e16_v_f16mf4_m(__VA_ARGS__)
4396
#define vssseg4e16_v_f16mf4_m(...) __riscv_vssseg4e16_v_f16mf4_m(__VA_ARGS__)
4397
#define vssseg5e16_v_f16mf4_m(...) __riscv_vssseg5e16_v_f16mf4_m(__VA_ARGS__)
4398
#define vssseg6e16_v_f16mf4_m(...) __riscv_vssseg6e16_v_f16mf4_m(__VA_ARGS__)
4399
#define vssseg7e16_v_f16mf4_m(...) __riscv_vssseg7e16_v_f16mf4_m(__VA_ARGS__)
4400
#define vssseg8e16_v_f16mf4_m(...) __riscv_vssseg8e16_v_f16mf4_m(__VA_ARGS__)
4401
#define vssseg2e16_v_f16mf2_m(...) __riscv_vssseg2e16_v_f16mf2_m(__VA_ARGS__)
4402
#define vssseg3e16_v_f16mf2_m(...) __riscv_vssseg3e16_v_f16mf2_m(__VA_ARGS__)
4403
#define vssseg4e16_v_f16mf2_m(...) __riscv_vssseg4e16_v_f16mf2_m(__VA_ARGS__)
4404
#define vssseg5e16_v_f16mf2_m(...) __riscv_vssseg5e16_v_f16mf2_m(__VA_ARGS__)
4405
#define vssseg6e16_v_f16mf2_m(...) __riscv_vssseg6e16_v_f16mf2_m(__VA_ARGS__)
4406
#define vssseg7e16_v_f16mf2_m(...) __riscv_vssseg7e16_v_f16mf2_m(__VA_ARGS__)
4407
#define vssseg8e16_v_f16mf2_m(...) __riscv_vssseg8e16_v_f16mf2_m(__VA_ARGS__)
4408
#define vssseg2e16_v_f16m1_m(...) __riscv_vssseg2e16_v_f16m1_m(__VA_ARGS__)
4409
#define vssseg3e16_v_f16m1_m(...) __riscv_vssseg3e16_v_f16m1_m(__VA_ARGS__)
4410
#define vssseg4e16_v_f16m1_m(...) __riscv_vssseg4e16_v_f16m1_m(__VA_ARGS__)
4411
#define vssseg5e16_v_f16m1_m(...) __riscv_vssseg5e16_v_f16m1_m(__VA_ARGS__)
4412
#define vssseg6e16_v_f16m1_m(...) __riscv_vssseg6e16_v_f16m1_m(__VA_ARGS__)
4413
#define vssseg7e16_v_f16m1_m(...) __riscv_vssseg7e16_v_f16m1_m(__VA_ARGS__)
4414
#define vssseg8e16_v_f16m1_m(...) __riscv_vssseg8e16_v_f16m1_m(__VA_ARGS__)
4415
#define vssseg2e16_v_f16m2_m(...) __riscv_vssseg2e16_v_f16m2_m(__VA_ARGS__)
4416
#define vssseg3e16_v_f16m2_m(...) __riscv_vssseg3e16_v_f16m2_m(__VA_ARGS__)
4417
#define vssseg4e16_v_f16m2_m(...) __riscv_vssseg4e16_v_f16m2_m(__VA_ARGS__)
4418
#define vssseg2e16_v_f16m4_m(...) __riscv_vssseg2e16_v_f16m4_m(__VA_ARGS__)
4419
#define vssseg2e32_v_f32mf2_m(...) __riscv_vssseg2e32_v_f32mf2_m(__VA_ARGS__)
4420
#define vssseg3e32_v_f32mf2_m(...) __riscv_vssseg3e32_v_f32mf2_m(__VA_ARGS__)
4421
#define vssseg4e32_v_f32mf2_m(...) __riscv_vssseg4e32_v_f32mf2_m(__VA_ARGS__)
4422
#define vssseg5e32_v_f32mf2_m(...) __riscv_vssseg5e32_v_f32mf2_m(__VA_ARGS__)
4423
#define vssseg6e32_v_f32mf2_m(...) __riscv_vssseg6e32_v_f32mf2_m(__VA_ARGS__)
4424
#define vssseg7e32_v_f32mf2_m(...) __riscv_vssseg7e32_v_f32mf2_m(__VA_ARGS__)
4425
#define vssseg8e32_v_f32mf2_m(...) __riscv_vssseg8e32_v_f32mf2_m(__VA_ARGS__)
4426
#define vssseg2e32_v_f32m1_m(...) __riscv_vssseg2e32_v_f32m1_m(__VA_ARGS__)
4427
#define vssseg3e32_v_f32m1_m(...) __riscv_vssseg3e32_v_f32m1_m(__VA_ARGS__)
4428
#define vssseg4e32_v_f32m1_m(...) __riscv_vssseg4e32_v_f32m1_m(__VA_ARGS__)
4429
#define vssseg5e32_v_f32m1_m(...) __riscv_vssseg5e32_v_f32m1_m(__VA_ARGS__)
4430
#define vssseg6e32_v_f32m1_m(...) __riscv_vssseg6e32_v_f32m1_m(__VA_ARGS__)
4431
#define vssseg7e32_v_f32m1_m(...) __riscv_vssseg7e32_v_f32m1_m(__VA_ARGS__)
4432
#define vssseg8e32_v_f32m1_m(...) __riscv_vssseg8e32_v_f32m1_m(__VA_ARGS__)
4433
#define vssseg2e32_v_f32m2_m(...) __riscv_vssseg2e32_v_f32m2_m(__VA_ARGS__)
4434
#define vssseg3e32_v_f32m2_m(...) __riscv_vssseg3e32_v_f32m2_m(__VA_ARGS__)
4435
#define vssseg4e32_v_f32m2_m(...) __riscv_vssseg4e32_v_f32m2_m(__VA_ARGS__)
4436
#define vssseg2e32_v_f32m4_m(...) __riscv_vssseg2e32_v_f32m4_m(__VA_ARGS__)
4437
#define vssseg2e64_v_f64m1_m(...) __riscv_vssseg2e64_v_f64m1_m(__VA_ARGS__)
4438
#define vssseg3e64_v_f64m1_m(...) __riscv_vssseg3e64_v_f64m1_m(__VA_ARGS__)
4439
#define vssseg4e64_v_f64m1_m(...) __riscv_vssseg4e64_v_f64m1_m(__VA_ARGS__)
4440
#define vssseg5e64_v_f64m1_m(...) __riscv_vssseg5e64_v_f64m1_m(__VA_ARGS__)
4441
#define vssseg6e64_v_f64m1_m(...) __riscv_vssseg6e64_v_f64m1_m(__VA_ARGS__)
4442
#define vssseg7e64_v_f64m1_m(...) __riscv_vssseg7e64_v_f64m1_m(__VA_ARGS__)
4443
#define vssseg8e64_v_f64m1_m(...) __riscv_vssseg8e64_v_f64m1_m(__VA_ARGS__)
4444
#define vssseg2e64_v_f64m2_m(...) __riscv_vssseg2e64_v_f64m2_m(__VA_ARGS__)
4445
#define vssseg3e64_v_f64m2_m(...) __riscv_vssseg3e64_v_f64m2_m(__VA_ARGS__)
4446
#define vssseg4e64_v_f64m2_m(...) __riscv_vssseg4e64_v_f64m2_m(__VA_ARGS__)
4447
#define vssseg2e64_v_f64m4_m(...) __riscv_vssseg2e64_v_f64m4_m(__VA_ARGS__)
4448
#define vssseg2e8_v_i8mf8_m(...) __riscv_vssseg2e8_v_i8mf8_m(__VA_ARGS__)
4449
#define vssseg3e8_v_i8mf8_m(...) __riscv_vssseg3e8_v_i8mf8_m(__VA_ARGS__)
4450
#define vssseg4e8_v_i8mf8_m(...) __riscv_vssseg4e8_v_i8mf8_m(__VA_ARGS__)
4451
#define vssseg5e8_v_i8mf8_m(...) __riscv_vssseg5e8_v_i8mf8_m(__VA_ARGS__)
4452
#define vssseg6e8_v_i8mf8_m(...) __riscv_vssseg6e8_v_i8mf8_m(__VA_ARGS__)
4453
#define vssseg7e8_v_i8mf8_m(...) __riscv_vssseg7e8_v_i8mf8_m(__VA_ARGS__)
4454
#define vssseg8e8_v_i8mf8_m(...) __riscv_vssseg8e8_v_i8mf8_m(__VA_ARGS__)
4455
#define vssseg2e8_v_i8mf4_m(...) __riscv_vssseg2e8_v_i8mf4_m(__VA_ARGS__)
4456
#define vssseg3e8_v_i8mf4_m(...) __riscv_vssseg3e8_v_i8mf4_m(__VA_ARGS__)
4457
#define vssseg4e8_v_i8mf4_m(...) __riscv_vssseg4e8_v_i8mf4_m(__VA_ARGS__)
4458
#define vssseg5e8_v_i8mf4_m(...) __riscv_vssseg5e8_v_i8mf4_m(__VA_ARGS__)
4459
#define vssseg6e8_v_i8mf4_m(...) __riscv_vssseg6e8_v_i8mf4_m(__VA_ARGS__)
4460
#define vssseg7e8_v_i8mf4_m(...) __riscv_vssseg7e8_v_i8mf4_m(__VA_ARGS__)
4461
#define vssseg8e8_v_i8mf4_m(...) __riscv_vssseg8e8_v_i8mf4_m(__VA_ARGS__)
4462
#define vssseg2e8_v_i8mf2_m(...) __riscv_vssseg2e8_v_i8mf2_m(__VA_ARGS__)
4463
#define vssseg3e8_v_i8mf2_m(...) __riscv_vssseg3e8_v_i8mf2_m(__VA_ARGS__)
4464
#define vssseg4e8_v_i8mf2_m(...) __riscv_vssseg4e8_v_i8mf2_m(__VA_ARGS__)
4465
#define vssseg5e8_v_i8mf2_m(...) __riscv_vssseg5e8_v_i8mf2_m(__VA_ARGS__)
4466
#define vssseg6e8_v_i8mf2_m(...) __riscv_vssseg6e8_v_i8mf2_m(__VA_ARGS__)
4467
#define vssseg7e8_v_i8mf2_m(...) __riscv_vssseg7e8_v_i8mf2_m(__VA_ARGS__)
4468
#define vssseg8e8_v_i8mf2_m(...) __riscv_vssseg8e8_v_i8mf2_m(__VA_ARGS__)
4469
#define vssseg2e8_v_i8m1_m(...) __riscv_vssseg2e8_v_i8m1_m(__VA_ARGS__)
4470
#define vssseg3e8_v_i8m1_m(...) __riscv_vssseg3e8_v_i8m1_m(__VA_ARGS__)
4471
#define vssseg4e8_v_i8m1_m(...) __riscv_vssseg4e8_v_i8m1_m(__VA_ARGS__)
4472
#define vssseg5e8_v_i8m1_m(...) __riscv_vssseg5e8_v_i8m1_m(__VA_ARGS__)
4473
#define vssseg6e8_v_i8m1_m(...) __riscv_vssseg6e8_v_i8m1_m(__VA_ARGS__)
4474
#define vssseg7e8_v_i8m1_m(...) __riscv_vssseg7e8_v_i8m1_m(__VA_ARGS__)
4475
#define vssseg8e8_v_i8m1_m(...) __riscv_vssseg8e8_v_i8m1_m(__VA_ARGS__)
4476
#define vssseg2e8_v_i8m2_m(...) __riscv_vssseg2e8_v_i8m2_m(__VA_ARGS__)
4477
#define vssseg3e8_v_i8m2_m(...) __riscv_vssseg3e8_v_i8m2_m(__VA_ARGS__)
4478
#define vssseg4e8_v_i8m2_m(...) __riscv_vssseg4e8_v_i8m2_m(__VA_ARGS__)
4479
#define vssseg2e8_v_i8m4_m(...) __riscv_vssseg2e8_v_i8m4_m(__VA_ARGS__)
4480
#define vssseg2e16_v_i16mf4_m(...) __riscv_vssseg2e16_v_i16mf4_m(__VA_ARGS__)
4481
#define vssseg3e16_v_i16mf4_m(...) __riscv_vssseg3e16_v_i16mf4_m(__VA_ARGS__)
4482
#define vssseg4e16_v_i16mf4_m(...) __riscv_vssseg4e16_v_i16mf4_m(__VA_ARGS__)
4483
#define vssseg5e16_v_i16mf4_m(...) __riscv_vssseg5e16_v_i16mf4_m(__VA_ARGS__)
4484
#define vssseg6e16_v_i16mf4_m(...) __riscv_vssseg6e16_v_i16mf4_m(__VA_ARGS__)
4485
#define vssseg7e16_v_i16mf4_m(...) __riscv_vssseg7e16_v_i16mf4_m(__VA_ARGS__)
4486
#define vssseg8e16_v_i16mf4_m(...) __riscv_vssseg8e16_v_i16mf4_m(__VA_ARGS__)
4487
#define vssseg2e16_v_i16mf2_m(...) __riscv_vssseg2e16_v_i16mf2_m(__VA_ARGS__)
4488
#define vssseg3e16_v_i16mf2_m(...) __riscv_vssseg3e16_v_i16mf2_m(__VA_ARGS__)
4489
#define vssseg4e16_v_i16mf2_m(...) __riscv_vssseg4e16_v_i16mf2_m(__VA_ARGS__)
4490
#define vssseg5e16_v_i16mf2_m(...) __riscv_vssseg5e16_v_i16mf2_m(__VA_ARGS__)
4491
#define vssseg6e16_v_i16mf2_m(...) __riscv_vssseg6e16_v_i16mf2_m(__VA_ARGS__)
4492
#define vssseg7e16_v_i16mf2_m(...) __riscv_vssseg7e16_v_i16mf2_m(__VA_ARGS__)
4493
#define vssseg8e16_v_i16mf2_m(...) __riscv_vssseg8e16_v_i16mf2_m(__VA_ARGS__)
4494
#define vssseg2e16_v_i16m1_m(...) __riscv_vssseg2e16_v_i16m1_m(__VA_ARGS__)
4495
#define vssseg3e16_v_i16m1_m(...) __riscv_vssseg3e16_v_i16m1_m(__VA_ARGS__)
4496
#define vssseg4e16_v_i16m1_m(...) __riscv_vssseg4e16_v_i16m1_m(__VA_ARGS__)
4497
#define vssseg5e16_v_i16m1_m(...) __riscv_vssseg5e16_v_i16m1_m(__VA_ARGS__)
4498
#define vssseg6e16_v_i16m1_m(...) __riscv_vssseg6e16_v_i16m1_m(__VA_ARGS__)
4499
#define vssseg7e16_v_i16m1_m(...) __riscv_vssseg7e16_v_i16m1_m(__VA_ARGS__)
4500
#define vssseg8e16_v_i16m1_m(...) __riscv_vssseg8e16_v_i16m1_m(__VA_ARGS__)
4501
#define vssseg2e16_v_i16m2_m(...) __riscv_vssseg2e16_v_i16m2_m(__VA_ARGS__)
4502
#define vssseg3e16_v_i16m2_m(...) __riscv_vssseg3e16_v_i16m2_m(__VA_ARGS__)
4503
#define vssseg4e16_v_i16m2_m(...) __riscv_vssseg4e16_v_i16m2_m(__VA_ARGS__)
4504
#define vssseg2e16_v_i16m4_m(...) __riscv_vssseg2e16_v_i16m4_m(__VA_ARGS__)
4505
#define vssseg2e32_v_i32mf2_m(...) __riscv_vssseg2e32_v_i32mf2_m(__VA_ARGS__)
4506
#define vssseg3e32_v_i32mf2_m(...) __riscv_vssseg3e32_v_i32mf2_m(__VA_ARGS__)
4507
#define vssseg4e32_v_i32mf2_m(...) __riscv_vssseg4e32_v_i32mf2_m(__VA_ARGS__)
4508
#define vssseg5e32_v_i32mf2_m(...) __riscv_vssseg5e32_v_i32mf2_m(__VA_ARGS__)
4509
#define vssseg6e32_v_i32mf2_m(...) __riscv_vssseg6e32_v_i32mf2_m(__VA_ARGS__)
4510
#define vssseg7e32_v_i32mf2_m(...) __riscv_vssseg7e32_v_i32mf2_m(__VA_ARGS__)
4511
#define vssseg8e32_v_i32mf2_m(...) __riscv_vssseg8e32_v_i32mf2_m(__VA_ARGS__)
4512
#define vssseg2e32_v_i32m1_m(...) __riscv_vssseg2e32_v_i32m1_m(__VA_ARGS__)
4513
#define vssseg3e32_v_i32m1_m(...) __riscv_vssseg3e32_v_i32m1_m(__VA_ARGS__)
4514
#define vssseg4e32_v_i32m1_m(...) __riscv_vssseg4e32_v_i32m1_m(__VA_ARGS__)
4515
#define vssseg5e32_v_i32m1_m(...) __riscv_vssseg5e32_v_i32m1_m(__VA_ARGS__)
4516
#define vssseg6e32_v_i32m1_m(...) __riscv_vssseg6e32_v_i32m1_m(__VA_ARGS__)
4517
#define vssseg7e32_v_i32m1_m(...) __riscv_vssseg7e32_v_i32m1_m(__VA_ARGS__)
4518
#define vssseg8e32_v_i32m1_m(...) __riscv_vssseg8e32_v_i32m1_m(__VA_ARGS__)
4519
#define vssseg2e32_v_i32m2_m(...) __riscv_vssseg2e32_v_i32m2_m(__VA_ARGS__)
4520
#define vssseg3e32_v_i32m2_m(...) __riscv_vssseg3e32_v_i32m2_m(__VA_ARGS__)
4521
#define vssseg4e32_v_i32m2_m(...) __riscv_vssseg4e32_v_i32m2_m(__VA_ARGS__)
4522
#define vssseg2e32_v_i32m4_m(...) __riscv_vssseg2e32_v_i32m4_m(__VA_ARGS__)
4523
#define vssseg2e64_v_i64m1_m(...) __riscv_vssseg2e64_v_i64m1_m(__VA_ARGS__)
4524
#define vssseg3e64_v_i64m1_m(...) __riscv_vssseg3e64_v_i64m1_m(__VA_ARGS__)
4525
#define vssseg4e64_v_i64m1_m(...) __riscv_vssseg4e64_v_i64m1_m(__VA_ARGS__)
4526
#define vssseg5e64_v_i64m1_m(...) __riscv_vssseg5e64_v_i64m1_m(__VA_ARGS__)
4527
#define vssseg6e64_v_i64m1_m(...) __riscv_vssseg6e64_v_i64m1_m(__VA_ARGS__)
4528
#define vssseg7e64_v_i64m1_m(...) __riscv_vssseg7e64_v_i64m1_m(__VA_ARGS__)
4529
#define vssseg8e64_v_i64m1_m(...) __riscv_vssseg8e64_v_i64m1_m(__VA_ARGS__)
4530
#define vssseg2e64_v_i64m2_m(...) __riscv_vssseg2e64_v_i64m2_m(__VA_ARGS__)
4531
#define vssseg3e64_v_i64m2_m(...) __riscv_vssseg3e64_v_i64m2_m(__VA_ARGS__)
4532
#define vssseg4e64_v_i64m2_m(...) __riscv_vssseg4e64_v_i64m2_m(__VA_ARGS__)
4533
#define vssseg2e64_v_i64m4_m(...) __riscv_vssseg2e64_v_i64m4_m(__VA_ARGS__)
4534
#define vssseg2e8_v_u8mf8_m(...) __riscv_vssseg2e8_v_u8mf8_m(__VA_ARGS__)
4535
#define vssseg3e8_v_u8mf8_m(...) __riscv_vssseg3e8_v_u8mf8_m(__VA_ARGS__)
4536
#define vssseg4e8_v_u8mf8_m(...) __riscv_vssseg4e8_v_u8mf8_m(__VA_ARGS__)
4537
#define vssseg5e8_v_u8mf8_m(...) __riscv_vssseg5e8_v_u8mf8_m(__VA_ARGS__)
4538
#define vssseg6e8_v_u8mf8_m(...) __riscv_vssseg6e8_v_u8mf8_m(__VA_ARGS__)
4539
#define vssseg7e8_v_u8mf8_m(...) __riscv_vssseg7e8_v_u8mf8_m(__VA_ARGS__)
4540
#define vssseg8e8_v_u8mf8_m(...) __riscv_vssseg8e8_v_u8mf8_m(__VA_ARGS__)
4541
#define vssseg2e8_v_u8mf4_m(...) __riscv_vssseg2e8_v_u8mf4_m(__VA_ARGS__)
4542
#define vssseg3e8_v_u8mf4_m(...) __riscv_vssseg3e8_v_u8mf4_m(__VA_ARGS__)
4543
#define vssseg4e8_v_u8mf4_m(...) __riscv_vssseg4e8_v_u8mf4_m(__VA_ARGS__)
4544
#define vssseg5e8_v_u8mf4_m(...) __riscv_vssseg5e8_v_u8mf4_m(__VA_ARGS__)
4545
#define vssseg6e8_v_u8mf4_m(...) __riscv_vssseg6e8_v_u8mf4_m(__VA_ARGS__)
4546
#define vssseg7e8_v_u8mf4_m(...) __riscv_vssseg7e8_v_u8mf4_m(__VA_ARGS__)
4547
#define vssseg8e8_v_u8mf4_m(...) __riscv_vssseg8e8_v_u8mf4_m(__VA_ARGS__)
4548
#define vssseg2e8_v_u8mf2_m(...) __riscv_vssseg2e8_v_u8mf2_m(__VA_ARGS__)
4549
#define vssseg3e8_v_u8mf2_m(...) __riscv_vssseg3e8_v_u8mf2_m(__VA_ARGS__)
4550
#define vssseg4e8_v_u8mf2_m(...) __riscv_vssseg4e8_v_u8mf2_m(__VA_ARGS__)
4551
#define vssseg5e8_v_u8mf2_m(...) __riscv_vssseg5e8_v_u8mf2_m(__VA_ARGS__)
4552
#define vssseg6e8_v_u8mf2_m(...) __riscv_vssseg6e8_v_u8mf2_m(__VA_ARGS__)
4553
#define vssseg7e8_v_u8mf2_m(...) __riscv_vssseg7e8_v_u8mf2_m(__VA_ARGS__)
4554
#define vssseg8e8_v_u8mf2_m(...) __riscv_vssseg8e8_v_u8mf2_m(__VA_ARGS__)
4555
#define vssseg2e8_v_u8m1_m(...) __riscv_vssseg2e8_v_u8m1_m(__VA_ARGS__)
4556
#define vssseg3e8_v_u8m1_m(...) __riscv_vssseg3e8_v_u8m1_m(__VA_ARGS__)
4557
#define vssseg4e8_v_u8m1_m(...) __riscv_vssseg4e8_v_u8m1_m(__VA_ARGS__)
4558
#define vssseg5e8_v_u8m1_m(...) __riscv_vssseg5e8_v_u8m1_m(__VA_ARGS__)
4559
#define vssseg6e8_v_u8m1_m(...) __riscv_vssseg6e8_v_u8m1_m(__VA_ARGS__)
4560
#define vssseg7e8_v_u8m1_m(...) __riscv_vssseg7e8_v_u8m1_m(__VA_ARGS__)
4561
#define vssseg8e8_v_u8m1_m(...) __riscv_vssseg8e8_v_u8m1_m(__VA_ARGS__)
4562
#define vssseg2e8_v_u8m2_m(...) __riscv_vssseg2e8_v_u8m2_m(__VA_ARGS__)
4563
#define vssseg3e8_v_u8m2_m(...) __riscv_vssseg3e8_v_u8m2_m(__VA_ARGS__)
4564
#define vssseg4e8_v_u8m2_m(...) __riscv_vssseg4e8_v_u8m2_m(__VA_ARGS__)
4565
#define vssseg2e8_v_u8m4_m(...) __riscv_vssseg2e8_v_u8m4_m(__VA_ARGS__)
4566
#define vssseg2e16_v_u16mf4_m(...) __riscv_vssseg2e16_v_u16mf4_m(__VA_ARGS__)
4567
#define vssseg3e16_v_u16mf4_m(...) __riscv_vssseg3e16_v_u16mf4_m(__VA_ARGS__)
4568
#define vssseg4e16_v_u16mf4_m(...) __riscv_vssseg4e16_v_u16mf4_m(__VA_ARGS__)
4569
#define vssseg5e16_v_u16mf4_m(...) __riscv_vssseg5e16_v_u16mf4_m(__VA_ARGS__)
4570
#define vssseg6e16_v_u16mf4_m(...) __riscv_vssseg6e16_v_u16mf4_m(__VA_ARGS__)
4571
#define vssseg7e16_v_u16mf4_m(...) __riscv_vssseg7e16_v_u16mf4_m(__VA_ARGS__)
4572
#define vssseg8e16_v_u16mf4_m(...) __riscv_vssseg8e16_v_u16mf4_m(__VA_ARGS__)
4573
#define vssseg2e16_v_u16mf2_m(...) __riscv_vssseg2e16_v_u16mf2_m(__VA_ARGS__)
4574
#define vssseg3e16_v_u16mf2_m(...) __riscv_vssseg3e16_v_u16mf2_m(__VA_ARGS__)
4575
#define vssseg4e16_v_u16mf2_m(...) __riscv_vssseg4e16_v_u16mf2_m(__VA_ARGS__)
4576
#define vssseg5e16_v_u16mf2_m(...) __riscv_vssseg5e16_v_u16mf2_m(__VA_ARGS__)
4577
#define vssseg6e16_v_u16mf2_m(...) __riscv_vssseg6e16_v_u16mf2_m(__VA_ARGS__)
4578
#define vssseg7e16_v_u16mf2_m(...) __riscv_vssseg7e16_v_u16mf2_m(__VA_ARGS__)
4579
#define vssseg8e16_v_u16mf2_m(...) __riscv_vssseg8e16_v_u16mf2_m(__VA_ARGS__)
4580
#define vssseg2e16_v_u16m1_m(...) __riscv_vssseg2e16_v_u16m1_m(__VA_ARGS__)
4581
#define vssseg3e16_v_u16m1_m(...) __riscv_vssseg3e16_v_u16m1_m(__VA_ARGS__)
4582
#define vssseg4e16_v_u16m1_m(...) __riscv_vssseg4e16_v_u16m1_m(__VA_ARGS__)
4583
#define vssseg5e16_v_u16m1_m(...) __riscv_vssseg5e16_v_u16m1_m(__VA_ARGS__)
4584
#define vssseg6e16_v_u16m1_m(...) __riscv_vssseg6e16_v_u16m1_m(__VA_ARGS__)
4585
#define vssseg7e16_v_u16m1_m(...) __riscv_vssseg7e16_v_u16m1_m(__VA_ARGS__)
4586
#define vssseg8e16_v_u16m1_m(...) __riscv_vssseg8e16_v_u16m1_m(__VA_ARGS__)
4587
#define vssseg2e16_v_u16m2_m(...) __riscv_vssseg2e16_v_u16m2_m(__VA_ARGS__)
4588
#define vssseg3e16_v_u16m2_m(...) __riscv_vssseg3e16_v_u16m2_m(__VA_ARGS__)
4589
#define vssseg4e16_v_u16m2_m(...) __riscv_vssseg4e16_v_u16m2_m(__VA_ARGS__)
4590
#define vssseg2e16_v_u16m4_m(...) __riscv_vssseg2e16_v_u16m4_m(__VA_ARGS__)
4591
#define vssseg2e32_v_u32mf2_m(...) __riscv_vssseg2e32_v_u32mf2_m(__VA_ARGS__)
4592
#define vssseg3e32_v_u32mf2_m(...) __riscv_vssseg3e32_v_u32mf2_m(__VA_ARGS__)
4593
#define vssseg4e32_v_u32mf2_m(...) __riscv_vssseg4e32_v_u32mf2_m(__VA_ARGS__)
4594
#define vssseg5e32_v_u32mf2_m(...) __riscv_vssseg5e32_v_u32mf2_m(__VA_ARGS__)
4595
#define vssseg6e32_v_u32mf2_m(...) __riscv_vssseg6e32_v_u32mf2_m(__VA_ARGS__)
4596
#define vssseg7e32_v_u32mf2_m(...) __riscv_vssseg7e32_v_u32mf2_m(__VA_ARGS__)
4597
#define vssseg8e32_v_u32mf2_m(...) __riscv_vssseg8e32_v_u32mf2_m(__VA_ARGS__)
4598
#define vssseg2e32_v_u32m1_m(...) __riscv_vssseg2e32_v_u32m1_m(__VA_ARGS__)
4599
#define vssseg3e32_v_u32m1_m(...) __riscv_vssseg3e32_v_u32m1_m(__VA_ARGS__)
4600
#define vssseg4e32_v_u32m1_m(...) __riscv_vssseg4e32_v_u32m1_m(__VA_ARGS__)
4601
#define vssseg5e32_v_u32m1_m(...) __riscv_vssseg5e32_v_u32m1_m(__VA_ARGS__)
4602
#define vssseg6e32_v_u32m1_m(...) __riscv_vssseg6e32_v_u32m1_m(__VA_ARGS__)
4603
#define vssseg7e32_v_u32m1_m(...) __riscv_vssseg7e32_v_u32m1_m(__VA_ARGS__)
4604
#define vssseg8e32_v_u32m1_m(...) __riscv_vssseg8e32_v_u32m1_m(__VA_ARGS__)
4605
#define vssseg2e32_v_u32m2_m(...) __riscv_vssseg2e32_v_u32m2_m(__VA_ARGS__)
4606
#define vssseg3e32_v_u32m2_m(...) __riscv_vssseg3e32_v_u32m2_m(__VA_ARGS__)
4607
#define vssseg4e32_v_u32m2_m(...) __riscv_vssseg4e32_v_u32m2_m(__VA_ARGS__)
4608
#define vssseg2e32_v_u32m4_m(...) __riscv_vssseg2e32_v_u32m4_m(__VA_ARGS__)
4609
#define vssseg2e64_v_u64m1_m(...) __riscv_vssseg2e64_v_u64m1_m(__VA_ARGS__)
4610
#define vssseg3e64_v_u64m1_m(...) __riscv_vssseg3e64_v_u64m1_m(__VA_ARGS__)
4611
#define vssseg4e64_v_u64m1_m(...) __riscv_vssseg4e64_v_u64m1_m(__VA_ARGS__)
4612
#define vssseg5e64_v_u64m1_m(...) __riscv_vssseg5e64_v_u64m1_m(__VA_ARGS__)
4613
#define vssseg6e64_v_u64m1_m(...) __riscv_vssseg6e64_v_u64m1_m(__VA_ARGS__)
4614
#define vssseg7e64_v_u64m1_m(...) __riscv_vssseg7e64_v_u64m1_m(__VA_ARGS__)
4615
#define vssseg8e64_v_u64m1_m(...) __riscv_vssseg8e64_v_u64m1_m(__VA_ARGS__)
4616
#define vssseg2e64_v_u64m2_m(...) __riscv_vssseg2e64_v_u64m2_m(__VA_ARGS__)
4617
#define vssseg3e64_v_u64m2_m(...) __riscv_vssseg3e64_v_u64m2_m(__VA_ARGS__)
4618
#define vssseg4e64_v_u64m2_m(...) __riscv_vssseg4e64_v_u64m2_m(__VA_ARGS__)
4619
#define vssseg2e64_v_u64m4_m(...) __riscv_vssseg2e64_v_u64m4_m(__VA_ARGS__)
4620
#define vloxseg2ei8_v_f16mf4(...) __riscv_vloxseg2ei8_v_f16mf4(__VA_ARGS__)
4621
#define vloxseg3ei8_v_f16mf4(...) __riscv_vloxseg3ei8_v_f16mf4(__VA_ARGS__)
4622
#define vloxseg4ei8_v_f16mf4(...) __riscv_vloxseg4ei8_v_f16mf4(__VA_ARGS__)
4623
#define vloxseg5ei8_v_f16mf4(...) __riscv_vloxseg5ei8_v_f16mf4(__VA_ARGS__)
4624
#define vloxseg6ei8_v_f16mf4(...) __riscv_vloxseg6ei8_v_f16mf4(__VA_ARGS__)
4625
#define vloxseg7ei8_v_f16mf4(...) __riscv_vloxseg7ei8_v_f16mf4(__VA_ARGS__)
4626
#define vloxseg8ei8_v_f16mf4(...) __riscv_vloxseg8ei8_v_f16mf4(__VA_ARGS__)
4627
#define vloxseg2ei8_v_f16mf2(...) __riscv_vloxseg2ei8_v_f16mf2(__VA_ARGS__)
4628
#define vloxseg3ei8_v_f16mf2(...) __riscv_vloxseg3ei8_v_f16mf2(__VA_ARGS__)
4629
#define vloxseg4ei8_v_f16mf2(...) __riscv_vloxseg4ei8_v_f16mf2(__VA_ARGS__)
4630
#define vloxseg5ei8_v_f16mf2(...) __riscv_vloxseg5ei8_v_f16mf2(__VA_ARGS__)
4631
#define vloxseg6ei8_v_f16mf2(...) __riscv_vloxseg6ei8_v_f16mf2(__VA_ARGS__)
4632
#define vloxseg7ei8_v_f16mf2(...) __riscv_vloxseg7ei8_v_f16mf2(__VA_ARGS__)
4633
#define vloxseg8ei8_v_f16mf2(...) __riscv_vloxseg8ei8_v_f16mf2(__VA_ARGS__)
4634
#define vloxseg2ei8_v_f16m1(...) __riscv_vloxseg2ei8_v_f16m1(__VA_ARGS__)
4635
#define vloxseg3ei8_v_f16m1(...) __riscv_vloxseg3ei8_v_f16m1(__VA_ARGS__)
4636
#define vloxseg4ei8_v_f16m1(...) __riscv_vloxseg4ei8_v_f16m1(__VA_ARGS__)
4637
#define vloxseg5ei8_v_f16m1(...) __riscv_vloxseg5ei8_v_f16m1(__VA_ARGS__)
4638
#define vloxseg6ei8_v_f16m1(...) __riscv_vloxseg6ei8_v_f16m1(__VA_ARGS__)
4639
#define vloxseg7ei8_v_f16m1(...) __riscv_vloxseg7ei8_v_f16m1(__VA_ARGS__)
4640
#define vloxseg8ei8_v_f16m1(...) __riscv_vloxseg8ei8_v_f16m1(__VA_ARGS__)
4641
#define vloxseg2ei8_v_f16m2(...) __riscv_vloxseg2ei8_v_f16m2(__VA_ARGS__)
4642
#define vloxseg3ei8_v_f16m2(...) __riscv_vloxseg3ei8_v_f16m2(__VA_ARGS__)
4643
#define vloxseg4ei8_v_f16m2(...) __riscv_vloxseg4ei8_v_f16m2(__VA_ARGS__)
4644
#define vloxseg2ei8_v_f16m4(...) __riscv_vloxseg2ei8_v_f16m4(__VA_ARGS__)
4645
#define vloxseg2ei16_v_f16mf4(...) __riscv_vloxseg2ei16_v_f16mf4(__VA_ARGS__)
4646
#define vloxseg3ei16_v_f16mf4(...) __riscv_vloxseg3ei16_v_f16mf4(__VA_ARGS__)
4647
#define vloxseg4ei16_v_f16mf4(...) __riscv_vloxseg4ei16_v_f16mf4(__VA_ARGS__)
4648
#define vloxseg5ei16_v_f16mf4(...) __riscv_vloxseg5ei16_v_f16mf4(__VA_ARGS__)
4649
#define vloxseg6ei16_v_f16mf4(...) __riscv_vloxseg6ei16_v_f16mf4(__VA_ARGS__)
4650
#define vloxseg7ei16_v_f16mf4(...) __riscv_vloxseg7ei16_v_f16mf4(__VA_ARGS__)
4651
#define vloxseg8ei16_v_f16mf4(...) __riscv_vloxseg8ei16_v_f16mf4(__VA_ARGS__)
4652
#define vloxseg2ei16_v_f16mf2(...) __riscv_vloxseg2ei16_v_f16mf2(__VA_ARGS__)
4653
#define vloxseg3ei16_v_f16mf2(...) __riscv_vloxseg3ei16_v_f16mf2(__VA_ARGS__)
4654
#define vloxseg4ei16_v_f16mf2(...) __riscv_vloxseg4ei16_v_f16mf2(__VA_ARGS__)
4655
#define vloxseg5ei16_v_f16mf2(...) __riscv_vloxseg5ei16_v_f16mf2(__VA_ARGS__)
4656
#define vloxseg6ei16_v_f16mf2(...) __riscv_vloxseg6ei16_v_f16mf2(__VA_ARGS__)
4657
#define vloxseg7ei16_v_f16mf2(...) __riscv_vloxseg7ei16_v_f16mf2(__VA_ARGS__)
4658
#define vloxseg8ei16_v_f16mf2(...) __riscv_vloxseg8ei16_v_f16mf2(__VA_ARGS__)
4659
#define vloxseg2ei16_v_f16m1(...) __riscv_vloxseg2ei16_v_f16m1(__VA_ARGS__)
4660
#define vloxseg3ei16_v_f16m1(...) __riscv_vloxseg3ei16_v_f16m1(__VA_ARGS__)
4661
#define vloxseg4ei16_v_f16m1(...) __riscv_vloxseg4ei16_v_f16m1(__VA_ARGS__)
4662
#define vloxseg5ei16_v_f16m1(...) __riscv_vloxseg5ei16_v_f16m1(__VA_ARGS__)
4663
#define vloxseg6ei16_v_f16m1(...) __riscv_vloxseg6ei16_v_f16m1(__VA_ARGS__)
4664
#define vloxseg7ei16_v_f16m1(...) __riscv_vloxseg7ei16_v_f16m1(__VA_ARGS__)
4665
#define vloxseg8ei16_v_f16m1(...) __riscv_vloxseg8ei16_v_f16m1(__VA_ARGS__)
4666
#define vloxseg2ei16_v_f16m2(...) __riscv_vloxseg2ei16_v_f16m2(__VA_ARGS__)
4667
#define vloxseg3ei16_v_f16m2(...) __riscv_vloxseg3ei16_v_f16m2(__VA_ARGS__)
4668
#define vloxseg4ei16_v_f16m2(...) __riscv_vloxseg4ei16_v_f16m2(__VA_ARGS__)
4669
#define vloxseg2ei16_v_f16m4(...) __riscv_vloxseg2ei16_v_f16m4(__VA_ARGS__)
4670
#define vloxseg2ei32_v_f16mf4(...) __riscv_vloxseg2ei32_v_f16mf4(__VA_ARGS__)
4671
#define vloxseg3ei32_v_f16mf4(...) __riscv_vloxseg3ei32_v_f16mf4(__VA_ARGS__)
4672
#define vloxseg4ei32_v_f16mf4(...) __riscv_vloxseg4ei32_v_f16mf4(__VA_ARGS__)
4673
#define vloxseg5ei32_v_f16mf4(...) __riscv_vloxseg5ei32_v_f16mf4(__VA_ARGS__)
4674
#define vloxseg6ei32_v_f16mf4(...) __riscv_vloxseg6ei32_v_f16mf4(__VA_ARGS__)
4675
#define vloxseg7ei32_v_f16mf4(...) __riscv_vloxseg7ei32_v_f16mf4(__VA_ARGS__)
4676
#define vloxseg8ei32_v_f16mf4(...) __riscv_vloxseg8ei32_v_f16mf4(__VA_ARGS__)
4677
#define vloxseg2ei32_v_f16mf2(...) __riscv_vloxseg2ei32_v_f16mf2(__VA_ARGS__)
4678
#define vloxseg3ei32_v_f16mf2(...) __riscv_vloxseg3ei32_v_f16mf2(__VA_ARGS__)
4679
#define vloxseg4ei32_v_f16mf2(...) __riscv_vloxseg4ei32_v_f16mf2(__VA_ARGS__)
4680
#define vloxseg5ei32_v_f16mf2(...) __riscv_vloxseg5ei32_v_f16mf2(__VA_ARGS__)
4681
#define vloxseg6ei32_v_f16mf2(...) __riscv_vloxseg6ei32_v_f16mf2(__VA_ARGS__)
4682
#define vloxseg7ei32_v_f16mf2(...) __riscv_vloxseg7ei32_v_f16mf2(__VA_ARGS__)
4683
#define vloxseg8ei32_v_f16mf2(...) __riscv_vloxseg8ei32_v_f16mf2(__VA_ARGS__)
4684
#define vloxseg2ei32_v_f16m1(...) __riscv_vloxseg2ei32_v_f16m1(__VA_ARGS__)
4685
#define vloxseg3ei32_v_f16m1(...) __riscv_vloxseg3ei32_v_f16m1(__VA_ARGS__)
4686
#define vloxseg4ei32_v_f16m1(...) __riscv_vloxseg4ei32_v_f16m1(__VA_ARGS__)
4687
#define vloxseg5ei32_v_f16m1(...) __riscv_vloxseg5ei32_v_f16m1(__VA_ARGS__)
4688
#define vloxseg6ei32_v_f16m1(...) __riscv_vloxseg6ei32_v_f16m1(__VA_ARGS__)
4689
#define vloxseg7ei32_v_f16m1(...) __riscv_vloxseg7ei32_v_f16m1(__VA_ARGS__)
4690
#define vloxseg8ei32_v_f16m1(...) __riscv_vloxseg8ei32_v_f16m1(__VA_ARGS__)
4691
#define vloxseg2ei32_v_f16m2(...) __riscv_vloxseg2ei32_v_f16m2(__VA_ARGS__)
4692
#define vloxseg3ei32_v_f16m2(...) __riscv_vloxseg3ei32_v_f16m2(__VA_ARGS__)
4693
#define vloxseg4ei32_v_f16m2(...) __riscv_vloxseg4ei32_v_f16m2(__VA_ARGS__)
4694
#define vloxseg2ei32_v_f16m4(...) __riscv_vloxseg2ei32_v_f16m4(__VA_ARGS__)
4695
#define vloxseg2ei64_v_f16mf4(...) __riscv_vloxseg2ei64_v_f16mf4(__VA_ARGS__)
4696
#define vloxseg3ei64_v_f16mf4(...) __riscv_vloxseg3ei64_v_f16mf4(__VA_ARGS__)
4697
#define vloxseg4ei64_v_f16mf4(...) __riscv_vloxseg4ei64_v_f16mf4(__VA_ARGS__)
4698
#define vloxseg5ei64_v_f16mf4(...) __riscv_vloxseg5ei64_v_f16mf4(__VA_ARGS__)
4699
#define vloxseg6ei64_v_f16mf4(...) __riscv_vloxseg6ei64_v_f16mf4(__VA_ARGS__)
4700
#define vloxseg7ei64_v_f16mf4(...) __riscv_vloxseg7ei64_v_f16mf4(__VA_ARGS__)
4701
#define vloxseg8ei64_v_f16mf4(...) __riscv_vloxseg8ei64_v_f16mf4(__VA_ARGS__)
4702
#define vloxseg2ei64_v_f16mf2(...) __riscv_vloxseg2ei64_v_f16mf2(__VA_ARGS__)
4703
#define vloxseg3ei64_v_f16mf2(...) __riscv_vloxseg3ei64_v_f16mf2(__VA_ARGS__)
4704
#define vloxseg4ei64_v_f16mf2(...) __riscv_vloxseg4ei64_v_f16mf2(__VA_ARGS__)
4705
#define vloxseg5ei64_v_f16mf2(...) __riscv_vloxseg5ei64_v_f16mf2(__VA_ARGS__)
4706
#define vloxseg6ei64_v_f16mf2(...) __riscv_vloxseg6ei64_v_f16mf2(__VA_ARGS__)
4707
#define vloxseg7ei64_v_f16mf2(...) __riscv_vloxseg7ei64_v_f16mf2(__VA_ARGS__)
4708
#define vloxseg8ei64_v_f16mf2(...) __riscv_vloxseg8ei64_v_f16mf2(__VA_ARGS__)
4709
#define vloxseg2ei64_v_f16m1(...) __riscv_vloxseg2ei64_v_f16m1(__VA_ARGS__)
4710
#define vloxseg3ei64_v_f16m1(...) __riscv_vloxseg3ei64_v_f16m1(__VA_ARGS__)
4711
#define vloxseg4ei64_v_f16m1(...) __riscv_vloxseg4ei64_v_f16m1(__VA_ARGS__)
4712
#define vloxseg5ei64_v_f16m1(...) __riscv_vloxseg5ei64_v_f16m1(__VA_ARGS__)
4713
#define vloxseg6ei64_v_f16m1(...) __riscv_vloxseg6ei64_v_f16m1(__VA_ARGS__)
4714
#define vloxseg7ei64_v_f16m1(...) __riscv_vloxseg7ei64_v_f16m1(__VA_ARGS__)
4715
#define vloxseg8ei64_v_f16m1(...) __riscv_vloxseg8ei64_v_f16m1(__VA_ARGS__)
4716
#define vloxseg2ei64_v_f16m2(...) __riscv_vloxseg2ei64_v_f16m2(__VA_ARGS__)
4717
#define vloxseg3ei64_v_f16m2(...) __riscv_vloxseg3ei64_v_f16m2(__VA_ARGS__)
4718
#define vloxseg4ei64_v_f16m2(...) __riscv_vloxseg4ei64_v_f16m2(__VA_ARGS__)
4719
#define vloxseg2ei8_v_f32mf2(...) __riscv_vloxseg2ei8_v_f32mf2(__VA_ARGS__)
4720
#define vloxseg3ei8_v_f32mf2(...) __riscv_vloxseg3ei8_v_f32mf2(__VA_ARGS__)
4721
#define vloxseg4ei8_v_f32mf2(...) __riscv_vloxseg4ei8_v_f32mf2(__VA_ARGS__)
4722
#define vloxseg5ei8_v_f32mf2(...) __riscv_vloxseg5ei8_v_f32mf2(__VA_ARGS__)
4723
#define vloxseg6ei8_v_f32mf2(...) __riscv_vloxseg6ei8_v_f32mf2(__VA_ARGS__)
4724
#define vloxseg7ei8_v_f32mf2(...) __riscv_vloxseg7ei8_v_f32mf2(__VA_ARGS__)
4725
#define vloxseg8ei8_v_f32mf2(...) __riscv_vloxseg8ei8_v_f32mf2(__VA_ARGS__)
4726
#define vloxseg2ei8_v_f32m1(...) __riscv_vloxseg2ei8_v_f32m1(__VA_ARGS__)
4727
#define vloxseg3ei8_v_f32m1(...) __riscv_vloxseg3ei8_v_f32m1(__VA_ARGS__)
4728
#define vloxseg4ei8_v_f32m1(...) __riscv_vloxseg4ei8_v_f32m1(__VA_ARGS__)
4729
#define vloxseg5ei8_v_f32m1(...) __riscv_vloxseg5ei8_v_f32m1(__VA_ARGS__)
4730
#define vloxseg6ei8_v_f32m1(...) __riscv_vloxseg6ei8_v_f32m1(__VA_ARGS__)
4731
#define vloxseg7ei8_v_f32m1(...) __riscv_vloxseg7ei8_v_f32m1(__VA_ARGS__)
4732
#define vloxseg8ei8_v_f32m1(...) __riscv_vloxseg8ei8_v_f32m1(__VA_ARGS__)
4733
#define vloxseg2ei8_v_f32m2(...) __riscv_vloxseg2ei8_v_f32m2(__VA_ARGS__)
4734
#define vloxseg3ei8_v_f32m2(...) __riscv_vloxseg3ei8_v_f32m2(__VA_ARGS__)
4735
#define vloxseg4ei8_v_f32m2(...) __riscv_vloxseg4ei8_v_f32m2(__VA_ARGS__)
4736
#define vloxseg2ei8_v_f32m4(...) __riscv_vloxseg2ei8_v_f32m4(__VA_ARGS__)
4737
#define vloxseg2ei16_v_f32mf2(...) __riscv_vloxseg2ei16_v_f32mf2(__VA_ARGS__)
4738
#define vloxseg3ei16_v_f32mf2(...) __riscv_vloxseg3ei16_v_f32mf2(__VA_ARGS__)
4739
#define vloxseg4ei16_v_f32mf2(...) __riscv_vloxseg4ei16_v_f32mf2(__VA_ARGS__)
4740
#define vloxseg5ei16_v_f32mf2(...) __riscv_vloxseg5ei16_v_f32mf2(__VA_ARGS__)
4741
#define vloxseg6ei16_v_f32mf2(...) __riscv_vloxseg6ei16_v_f32mf2(__VA_ARGS__)
4742
#define vloxseg7ei16_v_f32mf2(...) __riscv_vloxseg7ei16_v_f32mf2(__VA_ARGS__)
4743
#define vloxseg8ei16_v_f32mf2(...) __riscv_vloxseg8ei16_v_f32mf2(__VA_ARGS__)
4744
#define vloxseg2ei16_v_f32m1(...) __riscv_vloxseg2ei16_v_f32m1(__VA_ARGS__)
4745
#define vloxseg3ei16_v_f32m1(...) __riscv_vloxseg3ei16_v_f32m1(__VA_ARGS__)
4746
#define vloxseg4ei16_v_f32m1(...) __riscv_vloxseg4ei16_v_f32m1(__VA_ARGS__)
4747
#define vloxseg5ei16_v_f32m1(...) __riscv_vloxseg5ei16_v_f32m1(__VA_ARGS__)
4748
#define vloxseg6ei16_v_f32m1(...) __riscv_vloxseg6ei16_v_f32m1(__VA_ARGS__)
4749
#define vloxseg7ei16_v_f32m1(...) __riscv_vloxseg7ei16_v_f32m1(__VA_ARGS__)
4750
#define vloxseg8ei16_v_f32m1(...) __riscv_vloxseg8ei16_v_f32m1(__VA_ARGS__)
4751
#define vloxseg2ei16_v_f32m2(...) __riscv_vloxseg2ei16_v_f32m2(__VA_ARGS__)
4752
#define vloxseg3ei16_v_f32m2(...) __riscv_vloxseg3ei16_v_f32m2(__VA_ARGS__)
4753
#define vloxseg4ei16_v_f32m2(...) __riscv_vloxseg4ei16_v_f32m2(__VA_ARGS__)
4754
#define vloxseg2ei16_v_f32m4(...) __riscv_vloxseg2ei16_v_f32m4(__VA_ARGS__)
4755
#define vloxseg2ei32_v_f32mf2(...) __riscv_vloxseg2ei32_v_f32mf2(__VA_ARGS__)
4756
#define vloxseg3ei32_v_f32mf2(...) __riscv_vloxseg3ei32_v_f32mf2(__VA_ARGS__)
4757
#define vloxseg4ei32_v_f32mf2(...) __riscv_vloxseg4ei32_v_f32mf2(__VA_ARGS__)
4758
#define vloxseg5ei32_v_f32mf2(...) __riscv_vloxseg5ei32_v_f32mf2(__VA_ARGS__)
4759
#define vloxseg6ei32_v_f32mf2(...) __riscv_vloxseg6ei32_v_f32mf2(__VA_ARGS__)
4760
#define vloxseg7ei32_v_f32mf2(...) __riscv_vloxseg7ei32_v_f32mf2(__VA_ARGS__)
4761
#define vloxseg8ei32_v_f32mf2(...) __riscv_vloxseg8ei32_v_f32mf2(__VA_ARGS__)
4762
#define vloxseg2ei32_v_f32m1(...) __riscv_vloxseg2ei32_v_f32m1(__VA_ARGS__)
4763
#define vloxseg3ei32_v_f32m1(...) __riscv_vloxseg3ei32_v_f32m1(__VA_ARGS__)
4764
#define vloxseg4ei32_v_f32m1(...) __riscv_vloxseg4ei32_v_f32m1(__VA_ARGS__)
4765
#define vloxseg5ei32_v_f32m1(...) __riscv_vloxseg5ei32_v_f32m1(__VA_ARGS__)
4766
#define vloxseg6ei32_v_f32m1(...) __riscv_vloxseg6ei32_v_f32m1(__VA_ARGS__)
4767
#define vloxseg7ei32_v_f32m1(...) __riscv_vloxseg7ei32_v_f32m1(__VA_ARGS__)
4768
#define vloxseg8ei32_v_f32m1(...) __riscv_vloxseg8ei32_v_f32m1(__VA_ARGS__)
4769
#define vloxseg2ei32_v_f32m2(...) __riscv_vloxseg2ei32_v_f32m2(__VA_ARGS__)
4770
#define vloxseg3ei32_v_f32m2(...) __riscv_vloxseg3ei32_v_f32m2(__VA_ARGS__)
4771
#define vloxseg4ei32_v_f32m2(...) __riscv_vloxseg4ei32_v_f32m2(__VA_ARGS__)
4772
#define vloxseg2ei32_v_f32m4(...) __riscv_vloxseg2ei32_v_f32m4(__VA_ARGS__)
4773
#define vloxseg2ei64_v_f32mf2(...) __riscv_vloxseg2ei64_v_f32mf2(__VA_ARGS__)
4774
#define vloxseg3ei64_v_f32mf2(...) __riscv_vloxseg3ei64_v_f32mf2(__VA_ARGS__)
4775
#define vloxseg4ei64_v_f32mf2(...) __riscv_vloxseg4ei64_v_f32mf2(__VA_ARGS__)
4776
#define vloxseg5ei64_v_f32mf2(...) __riscv_vloxseg5ei64_v_f32mf2(__VA_ARGS__)
4777
#define vloxseg6ei64_v_f32mf2(...) __riscv_vloxseg6ei64_v_f32mf2(__VA_ARGS__)
4778
#define vloxseg7ei64_v_f32mf2(...) __riscv_vloxseg7ei64_v_f32mf2(__VA_ARGS__)
4779
#define vloxseg8ei64_v_f32mf2(...) __riscv_vloxseg8ei64_v_f32mf2(__VA_ARGS__)
4780
#define vloxseg2ei64_v_f32m1(...) __riscv_vloxseg2ei64_v_f32m1(__VA_ARGS__)
4781
#define vloxseg3ei64_v_f32m1(...) __riscv_vloxseg3ei64_v_f32m1(__VA_ARGS__)
4782
#define vloxseg4ei64_v_f32m1(...) __riscv_vloxseg4ei64_v_f32m1(__VA_ARGS__)
4783
#define vloxseg5ei64_v_f32m1(...) __riscv_vloxseg5ei64_v_f32m1(__VA_ARGS__)
4784
#define vloxseg6ei64_v_f32m1(...) __riscv_vloxseg6ei64_v_f32m1(__VA_ARGS__)
4785
#define vloxseg7ei64_v_f32m1(...) __riscv_vloxseg7ei64_v_f32m1(__VA_ARGS__)
4786
#define vloxseg8ei64_v_f32m1(...) __riscv_vloxseg8ei64_v_f32m1(__VA_ARGS__)
4787
#define vloxseg2ei64_v_f32m2(...) __riscv_vloxseg2ei64_v_f32m2(__VA_ARGS__)
4788
#define vloxseg3ei64_v_f32m2(...) __riscv_vloxseg3ei64_v_f32m2(__VA_ARGS__)
4789
#define vloxseg4ei64_v_f32m2(...) __riscv_vloxseg4ei64_v_f32m2(__VA_ARGS__)
4790
#define vloxseg2ei64_v_f32m4(...) __riscv_vloxseg2ei64_v_f32m4(__VA_ARGS__)
4791
#define vloxseg2ei8_v_f64m1(...) __riscv_vloxseg2ei8_v_f64m1(__VA_ARGS__)
4792
#define vloxseg3ei8_v_f64m1(...) __riscv_vloxseg3ei8_v_f64m1(__VA_ARGS__)
4793
#define vloxseg4ei8_v_f64m1(...) __riscv_vloxseg4ei8_v_f64m1(__VA_ARGS__)
4794
#define vloxseg5ei8_v_f64m1(...) __riscv_vloxseg5ei8_v_f64m1(__VA_ARGS__)
4795
#define vloxseg6ei8_v_f64m1(...) __riscv_vloxseg6ei8_v_f64m1(__VA_ARGS__)
4796
#define vloxseg7ei8_v_f64m1(...) __riscv_vloxseg7ei8_v_f64m1(__VA_ARGS__)
4797
#define vloxseg8ei8_v_f64m1(...) __riscv_vloxseg8ei8_v_f64m1(__VA_ARGS__)
4798
#define vloxseg2ei8_v_f64m2(...) __riscv_vloxseg2ei8_v_f64m2(__VA_ARGS__)
4799
#define vloxseg3ei8_v_f64m2(...) __riscv_vloxseg3ei8_v_f64m2(__VA_ARGS__)
4800
#define vloxseg4ei8_v_f64m2(...) __riscv_vloxseg4ei8_v_f64m2(__VA_ARGS__)
4801
#define vloxseg2ei8_v_f64m4(...) __riscv_vloxseg2ei8_v_f64m4(__VA_ARGS__)
4802
#define vloxseg2ei16_v_f64m1(...) __riscv_vloxseg2ei16_v_f64m1(__VA_ARGS__)
4803
#define vloxseg3ei16_v_f64m1(...) __riscv_vloxseg3ei16_v_f64m1(__VA_ARGS__)
4804
#define vloxseg4ei16_v_f64m1(...) __riscv_vloxseg4ei16_v_f64m1(__VA_ARGS__)
4805
#define vloxseg5ei16_v_f64m1(...) __riscv_vloxseg5ei16_v_f64m1(__VA_ARGS__)
4806
#define vloxseg6ei16_v_f64m1(...) __riscv_vloxseg6ei16_v_f64m1(__VA_ARGS__)
4807
#define vloxseg7ei16_v_f64m1(...) __riscv_vloxseg7ei16_v_f64m1(__VA_ARGS__)
4808
#define vloxseg8ei16_v_f64m1(...) __riscv_vloxseg8ei16_v_f64m1(__VA_ARGS__)
4809
#define vloxseg2ei16_v_f64m2(...) __riscv_vloxseg2ei16_v_f64m2(__VA_ARGS__)
4810
#define vloxseg3ei16_v_f64m2(...) __riscv_vloxseg3ei16_v_f64m2(__VA_ARGS__)
4811
#define vloxseg4ei16_v_f64m2(...) __riscv_vloxseg4ei16_v_f64m2(__VA_ARGS__)
4812
#define vloxseg2ei16_v_f64m4(...) __riscv_vloxseg2ei16_v_f64m4(__VA_ARGS__)
4813
#define vloxseg2ei32_v_f64m1(...) __riscv_vloxseg2ei32_v_f64m1(__VA_ARGS__)
4814
#define vloxseg3ei32_v_f64m1(...) __riscv_vloxseg3ei32_v_f64m1(__VA_ARGS__)
4815
#define vloxseg4ei32_v_f64m1(...) __riscv_vloxseg4ei32_v_f64m1(__VA_ARGS__)
4816
#define vloxseg5ei32_v_f64m1(...) __riscv_vloxseg5ei32_v_f64m1(__VA_ARGS__)
4817
#define vloxseg6ei32_v_f64m1(...) __riscv_vloxseg6ei32_v_f64m1(__VA_ARGS__)
4818
#define vloxseg7ei32_v_f64m1(...) __riscv_vloxseg7ei32_v_f64m1(__VA_ARGS__)
4819
#define vloxseg8ei32_v_f64m1(...) __riscv_vloxseg8ei32_v_f64m1(__VA_ARGS__)
4820
#define vloxseg2ei32_v_f64m2(...) __riscv_vloxseg2ei32_v_f64m2(__VA_ARGS__)
4821
#define vloxseg3ei32_v_f64m2(...) __riscv_vloxseg3ei32_v_f64m2(__VA_ARGS__)
4822
#define vloxseg4ei32_v_f64m2(...) __riscv_vloxseg4ei32_v_f64m2(__VA_ARGS__)
4823
#define vloxseg2ei32_v_f64m4(...) __riscv_vloxseg2ei32_v_f64m4(__VA_ARGS__)
4824
#define vloxseg2ei64_v_f64m1(...) __riscv_vloxseg2ei64_v_f64m1(__VA_ARGS__)
4825
#define vloxseg3ei64_v_f64m1(...) __riscv_vloxseg3ei64_v_f64m1(__VA_ARGS__)
4826
#define vloxseg4ei64_v_f64m1(...) __riscv_vloxseg4ei64_v_f64m1(__VA_ARGS__)
4827
#define vloxseg5ei64_v_f64m1(...) __riscv_vloxseg5ei64_v_f64m1(__VA_ARGS__)
4828
#define vloxseg6ei64_v_f64m1(...) __riscv_vloxseg6ei64_v_f64m1(__VA_ARGS__)
4829
#define vloxseg7ei64_v_f64m1(...) __riscv_vloxseg7ei64_v_f64m1(__VA_ARGS__)
4830
#define vloxseg8ei64_v_f64m1(...) __riscv_vloxseg8ei64_v_f64m1(__VA_ARGS__)
4831
#define vloxseg2ei64_v_f64m2(...) __riscv_vloxseg2ei64_v_f64m2(__VA_ARGS__)
4832
#define vloxseg3ei64_v_f64m2(...) __riscv_vloxseg3ei64_v_f64m2(__VA_ARGS__)
4833
#define vloxseg4ei64_v_f64m2(...) __riscv_vloxseg4ei64_v_f64m2(__VA_ARGS__)
4834
#define vloxseg2ei64_v_f64m4(...) __riscv_vloxseg2ei64_v_f64m4(__VA_ARGS__)
4835
#define vluxseg2ei8_v_f16mf4(...) __riscv_vluxseg2ei8_v_f16mf4(__VA_ARGS__)
4836
#define vluxseg3ei8_v_f16mf4(...) __riscv_vluxseg3ei8_v_f16mf4(__VA_ARGS__)
4837
#define vluxseg4ei8_v_f16mf4(...) __riscv_vluxseg4ei8_v_f16mf4(__VA_ARGS__)
4838
#define vluxseg5ei8_v_f16mf4(...) __riscv_vluxseg5ei8_v_f16mf4(__VA_ARGS__)
4839
#define vluxseg6ei8_v_f16mf4(...) __riscv_vluxseg6ei8_v_f16mf4(__VA_ARGS__)
4840
#define vluxseg7ei8_v_f16mf4(...) __riscv_vluxseg7ei8_v_f16mf4(__VA_ARGS__)
4841
#define vluxseg8ei8_v_f16mf4(...) __riscv_vluxseg8ei8_v_f16mf4(__VA_ARGS__)
4842
#define vluxseg2ei8_v_f16mf2(...) __riscv_vluxseg2ei8_v_f16mf2(__VA_ARGS__)
4843
#define vluxseg3ei8_v_f16mf2(...) __riscv_vluxseg3ei8_v_f16mf2(__VA_ARGS__)
4844
#define vluxseg4ei8_v_f16mf2(...) __riscv_vluxseg4ei8_v_f16mf2(__VA_ARGS__)
4845
#define vluxseg5ei8_v_f16mf2(...) __riscv_vluxseg5ei8_v_f16mf2(__VA_ARGS__)
4846
#define vluxseg6ei8_v_f16mf2(...) __riscv_vluxseg6ei8_v_f16mf2(__VA_ARGS__)
4847
#define vluxseg7ei8_v_f16mf2(...) __riscv_vluxseg7ei8_v_f16mf2(__VA_ARGS__)
4848
#define vluxseg8ei8_v_f16mf2(...) __riscv_vluxseg8ei8_v_f16mf2(__VA_ARGS__)
4849
#define vluxseg2ei8_v_f16m1(...) __riscv_vluxseg2ei8_v_f16m1(__VA_ARGS__)
4850
#define vluxseg3ei8_v_f16m1(...) __riscv_vluxseg3ei8_v_f16m1(__VA_ARGS__)
4851
#define vluxseg4ei8_v_f16m1(...) __riscv_vluxseg4ei8_v_f16m1(__VA_ARGS__)
4852
#define vluxseg5ei8_v_f16m1(...) __riscv_vluxseg5ei8_v_f16m1(__VA_ARGS__)
4853
#define vluxseg6ei8_v_f16m1(...) __riscv_vluxseg6ei8_v_f16m1(__VA_ARGS__)
4854
#define vluxseg7ei8_v_f16m1(...) __riscv_vluxseg7ei8_v_f16m1(__VA_ARGS__)
4855
#define vluxseg8ei8_v_f16m1(...) __riscv_vluxseg8ei8_v_f16m1(__VA_ARGS__)
4856
#define vluxseg2ei8_v_f16m2(...) __riscv_vluxseg2ei8_v_f16m2(__VA_ARGS__)
4857
#define vluxseg3ei8_v_f16m2(...) __riscv_vluxseg3ei8_v_f16m2(__VA_ARGS__)
4858
#define vluxseg4ei8_v_f16m2(...) __riscv_vluxseg4ei8_v_f16m2(__VA_ARGS__)
4859
#define vluxseg2ei8_v_f16m4(...) __riscv_vluxseg2ei8_v_f16m4(__VA_ARGS__)
4860
#define vluxseg2ei16_v_f16mf4(...) __riscv_vluxseg2ei16_v_f16mf4(__VA_ARGS__)
4861
#define vluxseg3ei16_v_f16mf4(...) __riscv_vluxseg3ei16_v_f16mf4(__VA_ARGS__)
4862
#define vluxseg4ei16_v_f16mf4(...) __riscv_vluxseg4ei16_v_f16mf4(__VA_ARGS__)
4863
#define vluxseg5ei16_v_f16mf4(...) __riscv_vluxseg5ei16_v_f16mf4(__VA_ARGS__)
4864
#define vluxseg6ei16_v_f16mf4(...) __riscv_vluxseg6ei16_v_f16mf4(__VA_ARGS__)
4865
#define vluxseg7ei16_v_f16mf4(...) __riscv_vluxseg7ei16_v_f16mf4(__VA_ARGS__)
4866
#define vluxseg8ei16_v_f16mf4(...) __riscv_vluxseg8ei16_v_f16mf4(__VA_ARGS__)
4867
#define vluxseg2ei16_v_f16mf2(...) __riscv_vluxseg2ei16_v_f16mf2(__VA_ARGS__)
4868
#define vluxseg3ei16_v_f16mf2(...) __riscv_vluxseg3ei16_v_f16mf2(__VA_ARGS__)
4869
#define vluxseg4ei16_v_f16mf2(...) __riscv_vluxseg4ei16_v_f16mf2(__VA_ARGS__)
4870
#define vluxseg5ei16_v_f16mf2(...) __riscv_vluxseg5ei16_v_f16mf2(__VA_ARGS__)
4871
#define vluxseg6ei16_v_f16mf2(...) __riscv_vluxseg6ei16_v_f16mf2(__VA_ARGS__)
4872
#define vluxseg7ei16_v_f16mf2(...) __riscv_vluxseg7ei16_v_f16mf2(__VA_ARGS__)
4873
#define vluxseg8ei16_v_f16mf2(...) __riscv_vluxseg8ei16_v_f16mf2(__VA_ARGS__)
4874
#define vluxseg2ei16_v_f16m1(...) __riscv_vluxseg2ei16_v_f16m1(__VA_ARGS__)
4875
#define vluxseg3ei16_v_f16m1(...) __riscv_vluxseg3ei16_v_f16m1(__VA_ARGS__)
4876
#define vluxseg4ei16_v_f16m1(...) __riscv_vluxseg4ei16_v_f16m1(__VA_ARGS__)
4877
#define vluxseg5ei16_v_f16m1(...) __riscv_vluxseg5ei16_v_f16m1(__VA_ARGS__)
4878
#define vluxseg6ei16_v_f16m1(...) __riscv_vluxseg6ei16_v_f16m1(__VA_ARGS__)
4879
#define vluxseg7ei16_v_f16m1(...) __riscv_vluxseg7ei16_v_f16m1(__VA_ARGS__)
4880
#define vluxseg8ei16_v_f16m1(...) __riscv_vluxseg8ei16_v_f16m1(__VA_ARGS__)
4881
#define vluxseg2ei16_v_f16m2(...) __riscv_vluxseg2ei16_v_f16m2(__VA_ARGS__)
4882
#define vluxseg3ei16_v_f16m2(...) __riscv_vluxseg3ei16_v_f16m2(__VA_ARGS__)
4883
#define vluxseg4ei16_v_f16m2(...) __riscv_vluxseg4ei16_v_f16m2(__VA_ARGS__)
4884
#define vluxseg2ei16_v_f16m4(...) __riscv_vluxseg2ei16_v_f16m4(__VA_ARGS__)
4885
#define vluxseg2ei32_v_f16mf4(...) __riscv_vluxseg2ei32_v_f16mf4(__VA_ARGS__)
4886
#define vluxseg3ei32_v_f16mf4(...) __riscv_vluxseg3ei32_v_f16mf4(__VA_ARGS__)
4887
#define vluxseg4ei32_v_f16mf4(...) __riscv_vluxseg4ei32_v_f16mf4(__VA_ARGS__)
4888
#define vluxseg5ei32_v_f16mf4(...) __riscv_vluxseg5ei32_v_f16mf4(__VA_ARGS__)
4889
#define vluxseg6ei32_v_f16mf4(...) __riscv_vluxseg6ei32_v_f16mf4(__VA_ARGS__)
4890
#define vluxseg7ei32_v_f16mf4(...) __riscv_vluxseg7ei32_v_f16mf4(__VA_ARGS__)
4891
#define vluxseg8ei32_v_f16mf4(...) __riscv_vluxseg8ei32_v_f16mf4(__VA_ARGS__)
4892
#define vluxseg2ei32_v_f16mf2(...) __riscv_vluxseg2ei32_v_f16mf2(__VA_ARGS__)
4893
#define vluxseg3ei32_v_f16mf2(...) __riscv_vluxseg3ei32_v_f16mf2(__VA_ARGS__)
4894
#define vluxseg4ei32_v_f16mf2(...) __riscv_vluxseg4ei32_v_f16mf2(__VA_ARGS__)
4895
#define vluxseg5ei32_v_f16mf2(...) __riscv_vluxseg5ei32_v_f16mf2(__VA_ARGS__)
4896
#define vluxseg6ei32_v_f16mf2(...) __riscv_vluxseg6ei32_v_f16mf2(__VA_ARGS__)
4897
#define vluxseg7ei32_v_f16mf2(...) __riscv_vluxseg7ei32_v_f16mf2(__VA_ARGS__)
4898
#define vluxseg8ei32_v_f16mf2(...) __riscv_vluxseg8ei32_v_f16mf2(__VA_ARGS__)
4899
#define vluxseg2ei32_v_f16m1(...) __riscv_vluxseg2ei32_v_f16m1(__VA_ARGS__)
4900
#define vluxseg3ei32_v_f16m1(...) __riscv_vluxseg3ei32_v_f16m1(__VA_ARGS__)
4901
#define vluxseg4ei32_v_f16m1(...) __riscv_vluxseg4ei32_v_f16m1(__VA_ARGS__)
4902
#define vluxseg5ei32_v_f16m1(...) __riscv_vluxseg5ei32_v_f16m1(__VA_ARGS__)
4903
#define vluxseg6ei32_v_f16m1(...) __riscv_vluxseg6ei32_v_f16m1(__VA_ARGS__)
4904
#define vluxseg7ei32_v_f16m1(...) __riscv_vluxseg7ei32_v_f16m1(__VA_ARGS__)
4905
#define vluxseg8ei32_v_f16m1(...) __riscv_vluxseg8ei32_v_f16m1(__VA_ARGS__)
4906
#define vluxseg2ei32_v_f16m2(...) __riscv_vluxseg2ei32_v_f16m2(__VA_ARGS__)
4907
#define vluxseg3ei32_v_f16m2(...) __riscv_vluxseg3ei32_v_f16m2(__VA_ARGS__)
4908
#define vluxseg4ei32_v_f16m2(...) __riscv_vluxseg4ei32_v_f16m2(__VA_ARGS__)
4909
#define vluxseg2ei32_v_f16m4(...) __riscv_vluxseg2ei32_v_f16m4(__VA_ARGS__)
4910
#define vluxseg2ei64_v_f16mf4(...) __riscv_vluxseg2ei64_v_f16mf4(__VA_ARGS__)
4911
#define vluxseg3ei64_v_f16mf4(...) __riscv_vluxseg3ei64_v_f16mf4(__VA_ARGS__)
4912
#define vluxseg4ei64_v_f16mf4(...) __riscv_vluxseg4ei64_v_f16mf4(__VA_ARGS__)
4913
#define vluxseg5ei64_v_f16mf4(...) __riscv_vluxseg5ei64_v_f16mf4(__VA_ARGS__)
4914
#define vluxseg6ei64_v_f16mf4(...) __riscv_vluxseg6ei64_v_f16mf4(__VA_ARGS__)
4915
#define vluxseg7ei64_v_f16mf4(...) __riscv_vluxseg7ei64_v_f16mf4(__VA_ARGS__)
4916
#define vluxseg8ei64_v_f16mf4(...) __riscv_vluxseg8ei64_v_f16mf4(__VA_ARGS__)
4917
#define vluxseg2ei64_v_f16mf2(...) __riscv_vluxseg2ei64_v_f16mf2(__VA_ARGS__)
4918
#define vluxseg3ei64_v_f16mf2(...) __riscv_vluxseg3ei64_v_f16mf2(__VA_ARGS__)
4919
#define vluxseg4ei64_v_f16mf2(...) __riscv_vluxseg4ei64_v_f16mf2(__VA_ARGS__)
4920
#define vluxseg5ei64_v_f16mf2(...) __riscv_vluxseg5ei64_v_f16mf2(__VA_ARGS__)
4921
#define vluxseg6ei64_v_f16mf2(...) __riscv_vluxseg6ei64_v_f16mf2(__VA_ARGS__)
4922
#define vluxseg7ei64_v_f16mf2(...) __riscv_vluxseg7ei64_v_f16mf2(__VA_ARGS__)
4923
#define vluxseg8ei64_v_f16mf2(...) __riscv_vluxseg8ei64_v_f16mf2(__VA_ARGS__)
4924
#define vluxseg2ei64_v_f16m1(...) __riscv_vluxseg2ei64_v_f16m1(__VA_ARGS__)
4925
#define vluxseg3ei64_v_f16m1(...) __riscv_vluxseg3ei64_v_f16m1(__VA_ARGS__)
4926
#define vluxseg4ei64_v_f16m1(...) __riscv_vluxseg4ei64_v_f16m1(__VA_ARGS__)
4927
#define vluxseg5ei64_v_f16m1(...) __riscv_vluxseg5ei64_v_f16m1(__VA_ARGS__)
4928
#define vluxseg6ei64_v_f16m1(...) __riscv_vluxseg6ei64_v_f16m1(__VA_ARGS__)
4929
#define vluxseg7ei64_v_f16m1(...) __riscv_vluxseg7ei64_v_f16m1(__VA_ARGS__)
4930
#define vluxseg8ei64_v_f16m1(...) __riscv_vluxseg8ei64_v_f16m1(__VA_ARGS__)
4931
#define vluxseg2ei64_v_f16m2(...) __riscv_vluxseg2ei64_v_f16m2(__VA_ARGS__)
4932
#define vluxseg3ei64_v_f16m2(...) __riscv_vluxseg3ei64_v_f16m2(__VA_ARGS__)
4933
#define vluxseg4ei64_v_f16m2(...) __riscv_vluxseg4ei64_v_f16m2(__VA_ARGS__)
4934
#define vluxseg2ei8_v_f32mf2(...) __riscv_vluxseg2ei8_v_f32mf2(__VA_ARGS__)
4935
#define vluxseg3ei8_v_f32mf2(...) __riscv_vluxseg3ei8_v_f32mf2(__VA_ARGS__)
4936
#define vluxseg4ei8_v_f32mf2(...) __riscv_vluxseg4ei8_v_f32mf2(__VA_ARGS__)
4937
#define vluxseg5ei8_v_f32mf2(...) __riscv_vluxseg5ei8_v_f32mf2(__VA_ARGS__)
4938
#define vluxseg6ei8_v_f32mf2(...) __riscv_vluxseg6ei8_v_f32mf2(__VA_ARGS__)
4939
#define vluxseg7ei8_v_f32mf2(...) __riscv_vluxseg7ei8_v_f32mf2(__VA_ARGS__)
4940
#define vluxseg8ei8_v_f32mf2(...) __riscv_vluxseg8ei8_v_f32mf2(__VA_ARGS__)
4941
#define vluxseg2ei8_v_f32m1(...) __riscv_vluxseg2ei8_v_f32m1(__VA_ARGS__)
4942
#define vluxseg3ei8_v_f32m1(...) __riscv_vluxseg3ei8_v_f32m1(__VA_ARGS__)
4943
#define vluxseg4ei8_v_f32m1(...) __riscv_vluxseg4ei8_v_f32m1(__VA_ARGS__)
4944
#define vluxseg5ei8_v_f32m1(...) __riscv_vluxseg5ei8_v_f32m1(__VA_ARGS__)
4945
#define vluxseg6ei8_v_f32m1(...) __riscv_vluxseg6ei8_v_f32m1(__VA_ARGS__)
4946
#define vluxseg7ei8_v_f32m1(...) __riscv_vluxseg7ei8_v_f32m1(__VA_ARGS__)
4947
#define vluxseg8ei8_v_f32m1(...) __riscv_vluxseg8ei8_v_f32m1(__VA_ARGS__)
4948
#define vluxseg2ei8_v_f32m2(...) __riscv_vluxseg2ei8_v_f32m2(__VA_ARGS__)
4949
#define vluxseg3ei8_v_f32m2(...) __riscv_vluxseg3ei8_v_f32m2(__VA_ARGS__)
4950
#define vluxseg4ei8_v_f32m2(...) __riscv_vluxseg4ei8_v_f32m2(__VA_ARGS__)
4951
#define vluxseg2ei8_v_f32m4(...) __riscv_vluxseg2ei8_v_f32m4(__VA_ARGS__)
4952
#define vluxseg2ei16_v_f32mf2(...) __riscv_vluxseg2ei16_v_f32mf2(__VA_ARGS__)
4953
#define vluxseg3ei16_v_f32mf2(...) __riscv_vluxseg3ei16_v_f32mf2(__VA_ARGS__)
4954
#define vluxseg4ei16_v_f32mf2(...) __riscv_vluxseg4ei16_v_f32mf2(__VA_ARGS__)
4955
#define vluxseg5ei16_v_f32mf2(...) __riscv_vluxseg5ei16_v_f32mf2(__VA_ARGS__)
4956
#define vluxseg6ei16_v_f32mf2(...) __riscv_vluxseg6ei16_v_f32mf2(__VA_ARGS__)
4957
#define vluxseg7ei16_v_f32mf2(...) __riscv_vluxseg7ei16_v_f32mf2(__VA_ARGS__)
4958
#define vluxseg8ei16_v_f32mf2(...) __riscv_vluxseg8ei16_v_f32mf2(__VA_ARGS__)
4959
#define vluxseg2ei16_v_f32m1(...) __riscv_vluxseg2ei16_v_f32m1(__VA_ARGS__)
4960
#define vluxseg3ei16_v_f32m1(...) __riscv_vluxseg3ei16_v_f32m1(__VA_ARGS__)
4961
#define vluxseg4ei16_v_f32m1(...) __riscv_vluxseg4ei16_v_f32m1(__VA_ARGS__)
4962
#define vluxseg5ei16_v_f32m1(...) __riscv_vluxseg5ei16_v_f32m1(__VA_ARGS__)
4963
#define vluxseg6ei16_v_f32m1(...) __riscv_vluxseg6ei16_v_f32m1(__VA_ARGS__)
4964
#define vluxseg7ei16_v_f32m1(...) __riscv_vluxseg7ei16_v_f32m1(__VA_ARGS__)
4965
#define vluxseg8ei16_v_f32m1(...) __riscv_vluxseg8ei16_v_f32m1(__VA_ARGS__)
4966
#define vluxseg2ei16_v_f32m2(...) __riscv_vluxseg2ei16_v_f32m2(__VA_ARGS__)
4967
#define vluxseg3ei16_v_f32m2(...) __riscv_vluxseg3ei16_v_f32m2(__VA_ARGS__)
4968
#define vluxseg4ei16_v_f32m2(...) __riscv_vluxseg4ei16_v_f32m2(__VA_ARGS__)
4969
#define vluxseg2ei16_v_f32m4(...) __riscv_vluxseg2ei16_v_f32m4(__VA_ARGS__)
4970
#define vluxseg2ei32_v_f32mf2(...) __riscv_vluxseg2ei32_v_f32mf2(__VA_ARGS__)
4971
#define vluxseg3ei32_v_f32mf2(...) __riscv_vluxseg3ei32_v_f32mf2(__VA_ARGS__)
4972
#define vluxseg4ei32_v_f32mf2(...) __riscv_vluxseg4ei32_v_f32mf2(__VA_ARGS__)
4973
#define vluxseg5ei32_v_f32mf2(...) __riscv_vluxseg5ei32_v_f32mf2(__VA_ARGS__)
4974
#define vluxseg6ei32_v_f32mf2(...) __riscv_vluxseg6ei32_v_f32mf2(__VA_ARGS__)
4975
#define vluxseg7ei32_v_f32mf2(...) __riscv_vluxseg7ei32_v_f32mf2(__VA_ARGS__)
4976
#define vluxseg8ei32_v_f32mf2(...) __riscv_vluxseg8ei32_v_f32mf2(__VA_ARGS__)
4977
#define vluxseg2ei32_v_f32m1(...) __riscv_vluxseg2ei32_v_f32m1(__VA_ARGS__)
4978
#define vluxseg3ei32_v_f32m1(...) __riscv_vluxseg3ei32_v_f32m1(__VA_ARGS__)
4979
#define vluxseg4ei32_v_f32m1(...) __riscv_vluxseg4ei32_v_f32m1(__VA_ARGS__)
4980
#define vluxseg5ei32_v_f32m1(...) __riscv_vluxseg5ei32_v_f32m1(__VA_ARGS__)
4981
#define vluxseg6ei32_v_f32m1(...) __riscv_vluxseg6ei32_v_f32m1(__VA_ARGS__)
4982
#define vluxseg7ei32_v_f32m1(...) __riscv_vluxseg7ei32_v_f32m1(__VA_ARGS__)
4983
#define vluxseg8ei32_v_f32m1(...) __riscv_vluxseg8ei32_v_f32m1(__VA_ARGS__)
4984
#define vluxseg2ei32_v_f32m2(...) __riscv_vluxseg2ei32_v_f32m2(__VA_ARGS__)
4985
#define vluxseg3ei32_v_f32m2(...) __riscv_vluxseg3ei32_v_f32m2(__VA_ARGS__)
4986
#define vluxseg4ei32_v_f32m2(...) __riscv_vluxseg4ei32_v_f32m2(__VA_ARGS__)
4987
#define vluxseg2ei32_v_f32m4(...) __riscv_vluxseg2ei32_v_f32m4(__VA_ARGS__)
4988
#define vluxseg2ei64_v_f32mf2(...) __riscv_vluxseg2ei64_v_f32mf2(__VA_ARGS__)
4989
#define vluxseg3ei64_v_f32mf2(...) __riscv_vluxseg3ei64_v_f32mf2(__VA_ARGS__)
4990
#define vluxseg4ei64_v_f32mf2(...) __riscv_vluxseg4ei64_v_f32mf2(__VA_ARGS__)
4991
#define vluxseg5ei64_v_f32mf2(...) __riscv_vluxseg5ei64_v_f32mf2(__VA_ARGS__)
4992
#define vluxseg6ei64_v_f32mf2(...) __riscv_vluxseg6ei64_v_f32mf2(__VA_ARGS__)
4993
#define vluxseg7ei64_v_f32mf2(...) __riscv_vluxseg7ei64_v_f32mf2(__VA_ARGS__)
4994
#define vluxseg8ei64_v_f32mf2(...) __riscv_vluxseg8ei64_v_f32mf2(__VA_ARGS__)
4995
#define vluxseg2ei64_v_f32m1(...) __riscv_vluxseg2ei64_v_f32m1(__VA_ARGS__)
4996
#define vluxseg3ei64_v_f32m1(...) __riscv_vluxseg3ei64_v_f32m1(__VA_ARGS__)
4997
#define vluxseg4ei64_v_f32m1(...) __riscv_vluxseg4ei64_v_f32m1(__VA_ARGS__)
4998
#define vluxseg5ei64_v_f32m1(...) __riscv_vluxseg5ei64_v_f32m1(__VA_ARGS__)
4999
#define vluxseg6ei64_v_f32m1(...) __riscv_vluxseg6ei64_v_f32m1(__VA_ARGS__)
5000
#define vluxseg7ei64_v_f32m1(...) __riscv_vluxseg7ei64_v_f32m1(__VA_ARGS__)
5001
#define vluxseg8ei64_v_f32m1(...) __riscv_vluxseg8ei64_v_f32m1(__VA_ARGS__)
5002
#define vluxseg2ei64_v_f32m2(...) __riscv_vluxseg2ei64_v_f32m2(__VA_ARGS__)
5003
#define vluxseg3ei64_v_f32m2(...) __riscv_vluxseg3ei64_v_f32m2(__VA_ARGS__)
5004
#define vluxseg4ei64_v_f32m2(...) __riscv_vluxseg4ei64_v_f32m2(__VA_ARGS__)
5005
#define vluxseg2ei64_v_f32m4(...) __riscv_vluxseg2ei64_v_f32m4(__VA_ARGS__)
5006
#define vluxseg2ei8_v_f64m1(...) __riscv_vluxseg2ei8_v_f64m1(__VA_ARGS__)
5007
#define vluxseg3ei8_v_f64m1(...) __riscv_vluxseg3ei8_v_f64m1(__VA_ARGS__)
5008
#define vluxseg4ei8_v_f64m1(...) __riscv_vluxseg4ei8_v_f64m1(__VA_ARGS__)
5009
#define vluxseg5ei8_v_f64m1(...) __riscv_vluxseg5ei8_v_f64m1(__VA_ARGS__)
5010
#define vluxseg6ei8_v_f64m1(...) __riscv_vluxseg6ei8_v_f64m1(__VA_ARGS__)
5011
#define vluxseg7ei8_v_f64m1(...) __riscv_vluxseg7ei8_v_f64m1(__VA_ARGS__)
5012
#define vluxseg8ei8_v_f64m1(...) __riscv_vluxseg8ei8_v_f64m1(__VA_ARGS__)
5013
#define vluxseg2ei8_v_f64m2(...) __riscv_vluxseg2ei8_v_f64m2(__VA_ARGS__)
5014
#define vluxseg3ei8_v_f64m2(...) __riscv_vluxseg3ei8_v_f64m2(__VA_ARGS__)
5015
#define vluxseg4ei8_v_f64m2(...) __riscv_vluxseg4ei8_v_f64m2(__VA_ARGS__)
5016
#define vluxseg2ei8_v_f64m4(...) __riscv_vluxseg2ei8_v_f64m4(__VA_ARGS__)
5017
#define vluxseg2ei16_v_f64m1(...) __riscv_vluxseg2ei16_v_f64m1(__VA_ARGS__)
5018
#define vluxseg3ei16_v_f64m1(...) __riscv_vluxseg3ei16_v_f64m1(__VA_ARGS__)
5019
#define vluxseg4ei16_v_f64m1(...) __riscv_vluxseg4ei16_v_f64m1(__VA_ARGS__)
5020
#define vluxseg5ei16_v_f64m1(...) __riscv_vluxseg5ei16_v_f64m1(__VA_ARGS__)
5021
#define vluxseg6ei16_v_f64m1(...) __riscv_vluxseg6ei16_v_f64m1(__VA_ARGS__)
5022
#define vluxseg7ei16_v_f64m1(...) __riscv_vluxseg7ei16_v_f64m1(__VA_ARGS__)
5023
#define vluxseg8ei16_v_f64m1(...) __riscv_vluxseg8ei16_v_f64m1(__VA_ARGS__)
5024
#define vluxseg2ei16_v_f64m2(...) __riscv_vluxseg2ei16_v_f64m2(__VA_ARGS__)
5025
#define vluxseg3ei16_v_f64m2(...) __riscv_vluxseg3ei16_v_f64m2(__VA_ARGS__)
5026
#define vluxseg4ei16_v_f64m2(...) __riscv_vluxseg4ei16_v_f64m2(__VA_ARGS__)
5027
#define vluxseg2ei16_v_f64m4(...) __riscv_vluxseg2ei16_v_f64m4(__VA_ARGS__)
5028
#define vluxseg2ei32_v_f64m1(...) __riscv_vluxseg2ei32_v_f64m1(__VA_ARGS__)
5029
#define vluxseg3ei32_v_f64m1(...) __riscv_vluxseg3ei32_v_f64m1(__VA_ARGS__)
5030
#define vluxseg4ei32_v_f64m1(...) __riscv_vluxseg4ei32_v_f64m1(__VA_ARGS__)
5031
#define vluxseg5ei32_v_f64m1(...) __riscv_vluxseg5ei32_v_f64m1(__VA_ARGS__)
5032
#define vluxseg6ei32_v_f64m1(...) __riscv_vluxseg6ei32_v_f64m1(__VA_ARGS__)
5033
#define vluxseg7ei32_v_f64m1(...) __riscv_vluxseg7ei32_v_f64m1(__VA_ARGS__)
5034
#define vluxseg8ei32_v_f64m1(...) __riscv_vluxseg8ei32_v_f64m1(__VA_ARGS__)
5035
#define vluxseg2ei32_v_f64m2(...) __riscv_vluxseg2ei32_v_f64m2(__VA_ARGS__)
5036
#define vluxseg3ei32_v_f64m2(...) __riscv_vluxseg3ei32_v_f64m2(__VA_ARGS__)
5037
#define vluxseg4ei32_v_f64m2(...) __riscv_vluxseg4ei32_v_f64m2(__VA_ARGS__)
5038
#define vluxseg2ei32_v_f64m4(...) __riscv_vluxseg2ei32_v_f64m4(__VA_ARGS__)
5039
#define vluxseg2ei64_v_f64m1(...) __riscv_vluxseg2ei64_v_f64m1(__VA_ARGS__)
5040
#define vluxseg3ei64_v_f64m1(...) __riscv_vluxseg3ei64_v_f64m1(__VA_ARGS__)
5041
#define vluxseg4ei64_v_f64m1(...) __riscv_vluxseg4ei64_v_f64m1(__VA_ARGS__)
5042
#define vluxseg5ei64_v_f64m1(...) __riscv_vluxseg5ei64_v_f64m1(__VA_ARGS__)
5043
#define vluxseg6ei64_v_f64m1(...) __riscv_vluxseg6ei64_v_f64m1(__VA_ARGS__)
5044
#define vluxseg7ei64_v_f64m1(...) __riscv_vluxseg7ei64_v_f64m1(__VA_ARGS__)
5045
#define vluxseg8ei64_v_f64m1(...) __riscv_vluxseg8ei64_v_f64m1(__VA_ARGS__)
5046
#define vluxseg2ei64_v_f64m2(...) __riscv_vluxseg2ei64_v_f64m2(__VA_ARGS__)
5047
#define vluxseg3ei64_v_f64m2(...) __riscv_vluxseg3ei64_v_f64m2(__VA_ARGS__)
5048
#define vluxseg4ei64_v_f64m2(...) __riscv_vluxseg4ei64_v_f64m2(__VA_ARGS__)
5049
#define vluxseg2ei64_v_f64m4(...) __riscv_vluxseg2ei64_v_f64m4(__VA_ARGS__)
5050
#define vloxseg2ei8_v_i8mf8(...) __riscv_vloxseg2ei8_v_i8mf8(__VA_ARGS__)
5051
#define vloxseg3ei8_v_i8mf8(...) __riscv_vloxseg3ei8_v_i8mf8(__VA_ARGS__)
5052
#define vloxseg4ei8_v_i8mf8(...) __riscv_vloxseg4ei8_v_i8mf8(__VA_ARGS__)
5053
#define vloxseg5ei8_v_i8mf8(...) __riscv_vloxseg5ei8_v_i8mf8(__VA_ARGS__)
5054
#define vloxseg6ei8_v_i8mf8(...) __riscv_vloxseg6ei8_v_i8mf8(__VA_ARGS__)
5055
#define vloxseg7ei8_v_i8mf8(...) __riscv_vloxseg7ei8_v_i8mf8(__VA_ARGS__)
5056
#define vloxseg8ei8_v_i8mf8(...) __riscv_vloxseg8ei8_v_i8mf8(__VA_ARGS__)
5057
#define vloxseg2ei8_v_i8mf4(...) __riscv_vloxseg2ei8_v_i8mf4(__VA_ARGS__)
5058
#define vloxseg3ei8_v_i8mf4(...) __riscv_vloxseg3ei8_v_i8mf4(__VA_ARGS__)
5059
#define vloxseg4ei8_v_i8mf4(...) __riscv_vloxseg4ei8_v_i8mf4(__VA_ARGS__)
5060
#define vloxseg5ei8_v_i8mf4(...) __riscv_vloxseg5ei8_v_i8mf4(__VA_ARGS__)
5061
#define vloxseg6ei8_v_i8mf4(...) __riscv_vloxseg6ei8_v_i8mf4(__VA_ARGS__)
5062
#define vloxseg7ei8_v_i8mf4(...) __riscv_vloxseg7ei8_v_i8mf4(__VA_ARGS__)
5063
#define vloxseg8ei8_v_i8mf4(...) __riscv_vloxseg8ei8_v_i8mf4(__VA_ARGS__)
5064
#define vloxseg2ei8_v_i8mf2(...) __riscv_vloxseg2ei8_v_i8mf2(__VA_ARGS__)
5065
#define vloxseg3ei8_v_i8mf2(...) __riscv_vloxseg3ei8_v_i8mf2(__VA_ARGS__)
5066
#define vloxseg4ei8_v_i8mf2(...) __riscv_vloxseg4ei8_v_i8mf2(__VA_ARGS__)
5067
#define vloxseg5ei8_v_i8mf2(...) __riscv_vloxseg5ei8_v_i8mf2(__VA_ARGS__)
5068
#define vloxseg6ei8_v_i8mf2(...) __riscv_vloxseg6ei8_v_i8mf2(__VA_ARGS__)
5069
#define vloxseg7ei8_v_i8mf2(...) __riscv_vloxseg7ei8_v_i8mf2(__VA_ARGS__)
5070
#define vloxseg8ei8_v_i8mf2(...) __riscv_vloxseg8ei8_v_i8mf2(__VA_ARGS__)
5071
#define vloxseg2ei8_v_i8m1(...) __riscv_vloxseg2ei8_v_i8m1(__VA_ARGS__)
5072
#define vloxseg3ei8_v_i8m1(...) __riscv_vloxseg3ei8_v_i8m1(__VA_ARGS__)
5073
#define vloxseg4ei8_v_i8m1(...) __riscv_vloxseg4ei8_v_i8m1(__VA_ARGS__)
5074
#define vloxseg5ei8_v_i8m1(...) __riscv_vloxseg5ei8_v_i8m1(__VA_ARGS__)
5075
#define vloxseg6ei8_v_i8m1(...) __riscv_vloxseg6ei8_v_i8m1(__VA_ARGS__)
5076
#define vloxseg7ei8_v_i8m1(...) __riscv_vloxseg7ei8_v_i8m1(__VA_ARGS__)
5077
#define vloxseg8ei8_v_i8m1(...) __riscv_vloxseg8ei8_v_i8m1(__VA_ARGS__)
5078
#define vloxseg2ei8_v_i8m2(...) __riscv_vloxseg2ei8_v_i8m2(__VA_ARGS__)
5079
#define vloxseg3ei8_v_i8m2(...) __riscv_vloxseg3ei8_v_i8m2(__VA_ARGS__)
5080
#define vloxseg4ei8_v_i8m2(...) __riscv_vloxseg4ei8_v_i8m2(__VA_ARGS__)
5081
#define vloxseg2ei8_v_i8m4(...) __riscv_vloxseg2ei8_v_i8m4(__VA_ARGS__)
5082
#define vloxseg2ei16_v_i8mf8(...) __riscv_vloxseg2ei16_v_i8mf8(__VA_ARGS__)
5083
#define vloxseg3ei16_v_i8mf8(...) __riscv_vloxseg3ei16_v_i8mf8(__VA_ARGS__)
5084
#define vloxseg4ei16_v_i8mf8(...) __riscv_vloxseg4ei16_v_i8mf8(__VA_ARGS__)
5085
#define vloxseg5ei16_v_i8mf8(...) __riscv_vloxseg5ei16_v_i8mf8(__VA_ARGS__)
5086
#define vloxseg6ei16_v_i8mf8(...) __riscv_vloxseg6ei16_v_i8mf8(__VA_ARGS__)
5087
#define vloxseg7ei16_v_i8mf8(...) __riscv_vloxseg7ei16_v_i8mf8(__VA_ARGS__)
5088
#define vloxseg8ei16_v_i8mf8(...) __riscv_vloxseg8ei16_v_i8mf8(__VA_ARGS__)
5089
#define vloxseg2ei16_v_i8mf4(...) __riscv_vloxseg2ei16_v_i8mf4(__VA_ARGS__)
5090
#define vloxseg3ei16_v_i8mf4(...) __riscv_vloxseg3ei16_v_i8mf4(__VA_ARGS__)
5091
#define vloxseg4ei16_v_i8mf4(...) __riscv_vloxseg4ei16_v_i8mf4(__VA_ARGS__)
5092
#define vloxseg5ei16_v_i8mf4(...) __riscv_vloxseg5ei16_v_i8mf4(__VA_ARGS__)
5093
#define vloxseg6ei16_v_i8mf4(...) __riscv_vloxseg6ei16_v_i8mf4(__VA_ARGS__)
5094
#define vloxseg7ei16_v_i8mf4(...) __riscv_vloxseg7ei16_v_i8mf4(__VA_ARGS__)
5095
#define vloxseg8ei16_v_i8mf4(...) __riscv_vloxseg8ei16_v_i8mf4(__VA_ARGS__)
5096
#define vloxseg2ei16_v_i8mf2(...) __riscv_vloxseg2ei16_v_i8mf2(__VA_ARGS__)
5097
#define vloxseg3ei16_v_i8mf2(...) __riscv_vloxseg3ei16_v_i8mf2(__VA_ARGS__)
5098
#define vloxseg4ei16_v_i8mf2(...) __riscv_vloxseg4ei16_v_i8mf2(__VA_ARGS__)
5099
#define vloxseg5ei16_v_i8mf2(...) __riscv_vloxseg5ei16_v_i8mf2(__VA_ARGS__)
5100
#define vloxseg6ei16_v_i8mf2(...) __riscv_vloxseg6ei16_v_i8mf2(__VA_ARGS__)
5101
#define vloxseg7ei16_v_i8mf2(...) __riscv_vloxseg7ei16_v_i8mf2(__VA_ARGS__)
5102
#define vloxseg8ei16_v_i8mf2(...) __riscv_vloxseg8ei16_v_i8mf2(__VA_ARGS__)
5103
#define vloxseg2ei16_v_i8m1(...) __riscv_vloxseg2ei16_v_i8m1(__VA_ARGS__)
5104
#define vloxseg3ei16_v_i8m1(...) __riscv_vloxseg3ei16_v_i8m1(__VA_ARGS__)
5105
#define vloxseg4ei16_v_i8m1(...) __riscv_vloxseg4ei16_v_i8m1(__VA_ARGS__)
5106
#define vloxseg5ei16_v_i8m1(...) __riscv_vloxseg5ei16_v_i8m1(__VA_ARGS__)
5107
#define vloxseg6ei16_v_i8m1(...) __riscv_vloxseg6ei16_v_i8m1(__VA_ARGS__)
5108
#define vloxseg7ei16_v_i8m1(...) __riscv_vloxseg7ei16_v_i8m1(__VA_ARGS__)
5109
#define vloxseg8ei16_v_i8m1(...) __riscv_vloxseg8ei16_v_i8m1(__VA_ARGS__)
5110
#define vloxseg2ei16_v_i8m2(...) __riscv_vloxseg2ei16_v_i8m2(__VA_ARGS__)
5111
#define vloxseg3ei16_v_i8m2(...) __riscv_vloxseg3ei16_v_i8m2(__VA_ARGS__)
5112
#define vloxseg4ei16_v_i8m2(...) __riscv_vloxseg4ei16_v_i8m2(__VA_ARGS__)
5113
#define vloxseg2ei16_v_i8m4(...) __riscv_vloxseg2ei16_v_i8m4(__VA_ARGS__)
5114
#define vloxseg2ei32_v_i8mf8(...) __riscv_vloxseg2ei32_v_i8mf8(__VA_ARGS__)
5115
#define vloxseg3ei32_v_i8mf8(...) __riscv_vloxseg3ei32_v_i8mf8(__VA_ARGS__)
5116
#define vloxseg4ei32_v_i8mf8(...) __riscv_vloxseg4ei32_v_i8mf8(__VA_ARGS__)
5117
#define vloxseg5ei32_v_i8mf8(...) __riscv_vloxseg5ei32_v_i8mf8(__VA_ARGS__)
5118
#define vloxseg6ei32_v_i8mf8(...) __riscv_vloxseg6ei32_v_i8mf8(__VA_ARGS__)
5119
#define vloxseg7ei32_v_i8mf8(...) __riscv_vloxseg7ei32_v_i8mf8(__VA_ARGS__)
5120
#define vloxseg8ei32_v_i8mf8(...) __riscv_vloxseg8ei32_v_i8mf8(__VA_ARGS__)
5121
#define vloxseg2ei32_v_i8mf4(...) __riscv_vloxseg2ei32_v_i8mf4(__VA_ARGS__)
5122
#define vloxseg3ei32_v_i8mf4(...) __riscv_vloxseg3ei32_v_i8mf4(__VA_ARGS__)
5123
#define vloxseg4ei32_v_i8mf4(...) __riscv_vloxseg4ei32_v_i8mf4(__VA_ARGS__)
5124
#define vloxseg5ei32_v_i8mf4(...) __riscv_vloxseg5ei32_v_i8mf4(__VA_ARGS__)
5125
#define vloxseg6ei32_v_i8mf4(...) __riscv_vloxseg6ei32_v_i8mf4(__VA_ARGS__)
5126
#define vloxseg7ei32_v_i8mf4(...) __riscv_vloxseg7ei32_v_i8mf4(__VA_ARGS__)
5127
#define vloxseg8ei32_v_i8mf4(...) __riscv_vloxseg8ei32_v_i8mf4(__VA_ARGS__)
5128
#define vloxseg2ei32_v_i8mf2(...) __riscv_vloxseg2ei32_v_i8mf2(__VA_ARGS__)
5129
#define vloxseg3ei32_v_i8mf2(...) __riscv_vloxseg3ei32_v_i8mf2(__VA_ARGS__)
5130
#define vloxseg4ei32_v_i8mf2(...) __riscv_vloxseg4ei32_v_i8mf2(__VA_ARGS__)
5131
#define vloxseg5ei32_v_i8mf2(...) __riscv_vloxseg5ei32_v_i8mf2(__VA_ARGS__)
5132
#define vloxseg6ei32_v_i8mf2(...) __riscv_vloxseg6ei32_v_i8mf2(__VA_ARGS__)
5133
#define vloxseg7ei32_v_i8mf2(...) __riscv_vloxseg7ei32_v_i8mf2(__VA_ARGS__)
5134
#define vloxseg8ei32_v_i8mf2(...) __riscv_vloxseg8ei32_v_i8mf2(__VA_ARGS__)
5135
#define vloxseg2ei32_v_i8m1(...) __riscv_vloxseg2ei32_v_i8m1(__VA_ARGS__)
5136
#define vloxseg3ei32_v_i8m1(...) __riscv_vloxseg3ei32_v_i8m1(__VA_ARGS__)
5137
#define vloxseg4ei32_v_i8m1(...) __riscv_vloxseg4ei32_v_i8m1(__VA_ARGS__)
5138
#define vloxseg5ei32_v_i8m1(...) __riscv_vloxseg5ei32_v_i8m1(__VA_ARGS__)
5139
#define vloxseg6ei32_v_i8m1(...) __riscv_vloxseg6ei32_v_i8m1(__VA_ARGS__)
5140
#define vloxseg7ei32_v_i8m1(...) __riscv_vloxseg7ei32_v_i8m1(__VA_ARGS__)
5141
#define vloxseg8ei32_v_i8m1(...) __riscv_vloxseg8ei32_v_i8m1(__VA_ARGS__)
5142
#define vloxseg2ei32_v_i8m2(...) __riscv_vloxseg2ei32_v_i8m2(__VA_ARGS__)
5143
#define vloxseg3ei32_v_i8m2(...) __riscv_vloxseg3ei32_v_i8m2(__VA_ARGS__)
5144
#define vloxseg4ei32_v_i8m2(...) __riscv_vloxseg4ei32_v_i8m2(__VA_ARGS__)
5145
#define vloxseg2ei64_v_i8mf8(...) __riscv_vloxseg2ei64_v_i8mf8(__VA_ARGS__)
5146
#define vloxseg3ei64_v_i8mf8(...) __riscv_vloxseg3ei64_v_i8mf8(__VA_ARGS__)
5147
#define vloxseg4ei64_v_i8mf8(...) __riscv_vloxseg4ei64_v_i8mf8(__VA_ARGS__)
5148
#define vloxseg5ei64_v_i8mf8(...) __riscv_vloxseg5ei64_v_i8mf8(__VA_ARGS__)
5149
#define vloxseg6ei64_v_i8mf8(...) __riscv_vloxseg6ei64_v_i8mf8(__VA_ARGS__)
5150
#define vloxseg7ei64_v_i8mf8(...) __riscv_vloxseg7ei64_v_i8mf8(__VA_ARGS__)
5151
#define vloxseg8ei64_v_i8mf8(...) __riscv_vloxseg8ei64_v_i8mf8(__VA_ARGS__)
5152
#define vloxseg2ei64_v_i8mf4(...) __riscv_vloxseg2ei64_v_i8mf4(__VA_ARGS__)
5153
#define vloxseg3ei64_v_i8mf4(...) __riscv_vloxseg3ei64_v_i8mf4(__VA_ARGS__)
5154
#define vloxseg4ei64_v_i8mf4(...) __riscv_vloxseg4ei64_v_i8mf4(__VA_ARGS__)
5155
#define vloxseg5ei64_v_i8mf4(...) __riscv_vloxseg5ei64_v_i8mf4(__VA_ARGS__)
5156
#define vloxseg6ei64_v_i8mf4(...) __riscv_vloxseg6ei64_v_i8mf4(__VA_ARGS__)
5157
#define vloxseg7ei64_v_i8mf4(...) __riscv_vloxseg7ei64_v_i8mf4(__VA_ARGS__)
5158
#define vloxseg8ei64_v_i8mf4(...) __riscv_vloxseg8ei64_v_i8mf4(__VA_ARGS__)
5159
#define vloxseg2ei64_v_i8mf2(...) __riscv_vloxseg2ei64_v_i8mf2(__VA_ARGS__)
5160
#define vloxseg3ei64_v_i8mf2(...) __riscv_vloxseg3ei64_v_i8mf2(__VA_ARGS__)
5161
#define vloxseg4ei64_v_i8mf2(...) __riscv_vloxseg4ei64_v_i8mf2(__VA_ARGS__)
5162
#define vloxseg5ei64_v_i8mf2(...) __riscv_vloxseg5ei64_v_i8mf2(__VA_ARGS__)
5163
#define vloxseg6ei64_v_i8mf2(...) __riscv_vloxseg6ei64_v_i8mf2(__VA_ARGS__)
5164
#define vloxseg7ei64_v_i8mf2(...) __riscv_vloxseg7ei64_v_i8mf2(__VA_ARGS__)
5165
#define vloxseg8ei64_v_i8mf2(...) __riscv_vloxseg8ei64_v_i8mf2(__VA_ARGS__)
5166
#define vloxseg2ei64_v_i8m1(...) __riscv_vloxseg2ei64_v_i8m1(__VA_ARGS__)
5167
#define vloxseg3ei64_v_i8m1(...) __riscv_vloxseg3ei64_v_i8m1(__VA_ARGS__)
5168
#define vloxseg4ei64_v_i8m1(...) __riscv_vloxseg4ei64_v_i8m1(__VA_ARGS__)
5169
#define vloxseg5ei64_v_i8m1(...) __riscv_vloxseg5ei64_v_i8m1(__VA_ARGS__)
5170
#define vloxseg6ei64_v_i8m1(...) __riscv_vloxseg6ei64_v_i8m1(__VA_ARGS__)
5171
#define vloxseg7ei64_v_i8m1(...) __riscv_vloxseg7ei64_v_i8m1(__VA_ARGS__)
5172
#define vloxseg8ei64_v_i8m1(...) __riscv_vloxseg8ei64_v_i8m1(__VA_ARGS__)
5173
#define vloxseg2ei8_v_i16mf4(...) __riscv_vloxseg2ei8_v_i16mf4(__VA_ARGS__)
5174
#define vloxseg3ei8_v_i16mf4(...) __riscv_vloxseg3ei8_v_i16mf4(__VA_ARGS__)
5175
#define vloxseg4ei8_v_i16mf4(...) __riscv_vloxseg4ei8_v_i16mf4(__VA_ARGS__)
5176
#define vloxseg5ei8_v_i16mf4(...) __riscv_vloxseg5ei8_v_i16mf4(__VA_ARGS__)
5177
#define vloxseg6ei8_v_i16mf4(...) __riscv_vloxseg6ei8_v_i16mf4(__VA_ARGS__)
5178
#define vloxseg7ei8_v_i16mf4(...) __riscv_vloxseg7ei8_v_i16mf4(__VA_ARGS__)
5179
#define vloxseg8ei8_v_i16mf4(...) __riscv_vloxseg8ei8_v_i16mf4(__VA_ARGS__)
5180
#define vloxseg2ei8_v_i16mf2(...) __riscv_vloxseg2ei8_v_i16mf2(__VA_ARGS__)
5181
#define vloxseg3ei8_v_i16mf2(...) __riscv_vloxseg3ei8_v_i16mf2(__VA_ARGS__)
5182
#define vloxseg4ei8_v_i16mf2(...) __riscv_vloxseg4ei8_v_i16mf2(__VA_ARGS__)
5183
#define vloxseg5ei8_v_i16mf2(...) __riscv_vloxseg5ei8_v_i16mf2(__VA_ARGS__)
5184
#define vloxseg6ei8_v_i16mf2(...) __riscv_vloxseg6ei8_v_i16mf2(__VA_ARGS__)
5185
#define vloxseg7ei8_v_i16mf2(...) __riscv_vloxseg7ei8_v_i16mf2(__VA_ARGS__)
5186
#define vloxseg8ei8_v_i16mf2(...) __riscv_vloxseg8ei8_v_i16mf2(__VA_ARGS__)
5187
#define vloxseg2ei8_v_i16m1(...) __riscv_vloxseg2ei8_v_i16m1(__VA_ARGS__)
5188
#define vloxseg3ei8_v_i16m1(...) __riscv_vloxseg3ei8_v_i16m1(__VA_ARGS__)
5189
#define vloxseg4ei8_v_i16m1(...) __riscv_vloxseg4ei8_v_i16m1(__VA_ARGS__)
5190
#define vloxseg5ei8_v_i16m1(...) __riscv_vloxseg5ei8_v_i16m1(__VA_ARGS__)
5191
#define vloxseg6ei8_v_i16m1(...) __riscv_vloxseg6ei8_v_i16m1(__VA_ARGS__)
5192
#define vloxseg7ei8_v_i16m1(...) __riscv_vloxseg7ei8_v_i16m1(__VA_ARGS__)
5193
#define vloxseg8ei8_v_i16m1(...) __riscv_vloxseg8ei8_v_i16m1(__VA_ARGS__)
5194
#define vloxseg2ei8_v_i16m2(...) __riscv_vloxseg2ei8_v_i16m2(__VA_ARGS__)
5195
#define vloxseg3ei8_v_i16m2(...) __riscv_vloxseg3ei8_v_i16m2(__VA_ARGS__)
5196
#define vloxseg4ei8_v_i16m2(...) __riscv_vloxseg4ei8_v_i16m2(__VA_ARGS__)
5197
#define vloxseg2ei8_v_i16m4(...) __riscv_vloxseg2ei8_v_i16m4(__VA_ARGS__)
5198
#define vloxseg2ei16_v_i16mf4(...) __riscv_vloxseg2ei16_v_i16mf4(__VA_ARGS__)
5199
#define vloxseg3ei16_v_i16mf4(...) __riscv_vloxseg3ei16_v_i16mf4(__VA_ARGS__)
5200
#define vloxseg4ei16_v_i16mf4(...) __riscv_vloxseg4ei16_v_i16mf4(__VA_ARGS__)
5201
#define vloxseg5ei16_v_i16mf4(...) __riscv_vloxseg5ei16_v_i16mf4(__VA_ARGS__)
5202
#define vloxseg6ei16_v_i16mf4(...) __riscv_vloxseg6ei16_v_i16mf4(__VA_ARGS__)
5203
#define vloxseg7ei16_v_i16mf4(...) __riscv_vloxseg7ei16_v_i16mf4(__VA_ARGS__)
5204
#define vloxseg8ei16_v_i16mf4(...) __riscv_vloxseg8ei16_v_i16mf4(__VA_ARGS__)
5205
#define vloxseg2ei16_v_i16mf2(...) __riscv_vloxseg2ei16_v_i16mf2(__VA_ARGS__)
5206
#define vloxseg3ei16_v_i16mf2(...) __riscv_vloxseg3ei16_v_i16mf2(__VA_ARGS__)
5207
#define vloxseg4ei16_v_i16mf2(...) __riscv_vloxseg4ei16_v_i16mf2(__VA_ARGS__)
5208
#define vloxseg5ei16_v_i16mf2(...) __riscv_vloxseg5ei16_v_i16mf2(__VA_ARGS__)
5209
#define vloxseg6ei16_v_i16mf2(...) __riscv_vloxseg6ei16_v_i16mf2(__VA_ARGS__)
5210
#define vloxseg7ei16_v_i16mf2(...) __riscv_vloxseg7ei16_v_i16mf2(__VA_ARGS__)
5211
#define vloxseg8ei16_v_i16mf2(...) __riscv_vloxseg8ei16_v_i16mf2(__VA_ARGS__)
5212
#define vloxseg2ei16_v_i16m1(...) __riscv_vloxseg2ei16_v_i16m1(__VA_ARGS__)
5213
#define vloxseg3ei16_v_i16m1(...) __riscv_vloxseg3ei16_v_i16m1(__VA_ARGS__)
5214
#define vloxseg4ei16_v_i16m1(...) __riscv_vloxseg4ei16_v_i16m1(__VA_ARGS__)
5215
#define vloxseg5ei16_v_i16m1(...) __riscv_vloxseg5ei16_v_i16m1(__VA_ARGS__)
5216
#define vloxseg6ei16_v_i16m1(...) __riscv_vloxseg6ei16_v_i16m1(__VA_ARGS__)
5217
#define vloxseg7ei16_v_i16m1(...) __riscv_vloxseg7ei16_v_i16m1(__VA_ARGS__)
5218
#define vloxseg8ei16_v_i16m1(...) __riscv_vloxseg8ei16_v_i16m1(__VA_ARGS__)
5219
#define vloxseg2ei16_v_i16m2(...) __riscv_vloxseg2ei16_v_i16m2(__VA_ARGS__)
5220
#define vloxseg3ei16_v_i16m2(...) __riscv_vloxseg3ei16_v_i16m2(__VA_ARGS__)
5221
#define vloxseg4ei16_v_i16m2(...) __riscv_vloxseg4ei16_v_i16m2(__VA_ARGS__)
5222
#define vloxseg2ei16_v_i16m4(...) __riscv_vloxseg2ei16_v_i16m4(__VA_ARGS__)
5223
#define vloxseg2ei32_v_i16mf4(...) __riscv_vloxseg2ei32_v_i16mf4(__VA_ARGS__)
5224
#define vloxseg3ei32_v_i16mf4(...) __riscv_vloxseg3ei32_v_i16mf4(__VA_ARGS__)
5225
#define vloxseg4ei32_v_i16mf4(...) __riscv_vloxseg4ei32_v_i16mf4(__VA_ARGS__)
5226
#define vloxseg5ei32_v_i16mf4(...) __riscv_vloxseg5ei32_v_i16mf4(__VA_ARGS__)
5227
#define vloxseg6ei32_v_i16mf4(...) __riscv_vloxseg6ei32_v_i16mf4(__VA_ARGS__)
5228
#define vloxseg7ei32_v_i16mf4(...) __riscv_vloxseg7ei32_v_i16mf4(__VA_ARGS__)
5229
#define vloxseg8ei32_v_i16mf4(...) __riscv_vloxseg8ei32_v_i16mf4(__VA_ARGS__)
5230
#define vloxseg2ei32_v_i16mf2(...) __riscv_vloxseg2ei32_v_i16mf2(__VA_ARGS__)
5231
#define vloxseg3ei32_v_i16mf2(...) __riscv_vloxseg3ei32_v_i16mf2(__VA_ARGS__)
5232
#define vloxseg4ei32_v_i16mf2(...) __riscv_vloxseg4ei32_v_i16mf2(__VA_ARGS__)
5233
#define vloxseg5ei32_v_i16mf2(...) __riscv_vloxseg5ei32_v_i16mf2(__VA_ARGS__)
5234
#define vloxseg6ei32_v_i16mf2(...) __riscv_vloxseg6ei32_v_i16mf2(__VA_ARGS__)
5235
#define vloxseg7ei32_v_i16mf2(...) __riscv_vloxseg7ei32_v_i16mf2(__VA_ARGS__)
5236
#define vloxseg8ei32_v_i16mf2(...) __riscv_vloxseg8ei32_v_i16mf2(__VA_ARGS__)
5237
#define vloxseg2ei32_v_i16m1(...) __riscv_vloxseg2ei32_v_i16m1(__VA_ARGS__)
5238
#define vloxseg3ei32_v_i16m1(...) __riscv_vloxseg3ei32_v_i16m1(__VA_ARGS__)
5239
#define vloxseg4ei32_v_i16m1(...) __riscv_vloxseg4ei32_v_i16m1(__VA_ARGS__)
5240
#define vloxseg5ei32_v_i16m1(...) __riscv_vloxseg5ei32_v_i16m1(__VA_ARGS__)
5241
#define vloxseg6ei32_v_i16m1(...) __riscv_vloxseg6ei32_v_i16m1(__VA_ARGS__)
5242
#define vloxseg7ei32_v_i16m1(...) __riscv_vloxseg7ei32_v_i16m1(__VA_ARGS__)
5243
#define vloxseg8ei32_v_i16m1(...) __riscv_vloxseg8ei32_v_i16m1(__VA_ARGS__)
5244
#define vloxseg2ei32_v_i16m2(...) __riscv_vloxseg2ei32_v_i16m2(__VA_ARGS__)
5245
#define vloxseg3ei32_v_i16m2(...) __riscv_vloxseg3ei32_v_i16m2(__VA_ARGS__)
5246
#define vloxseg4ei32_v_i16m2(...) __riscv_vloxseg4ei32_v_i16m2(__VA_ARGS__)
5247
#define vloxseg2ei32_v_i16m4(...) __riscv_vloxseg2ei32_v_i16m4(__VA_ARGS__)
5248
#define vloxseg2ei64_v_i16mf4(...) __riscv_vloxseg2ei64_v_i16mf4(__VA_ARGS__)
5249
#define vloxseg3ei64_v_i16mf4(...) __riscv_vloxseg3ei64_v_i16mf4(__VA_ARGS__)
5250
#define vloxseg4ei64_v_i16mf4(...) __riscv_vloxseg4ei64_v_i16mf4(__VA_ARGS__)
5251
#define vloxseg5ei64_v_i16mf4(...) __riscv_vloxseg5ei64_v_i16mf4(__VA_ARGS__)
5252
#define vloxseg6ei64_v_i16mf4(...) __riscv_vloxseg6ei64_v_i16mf4(__VA_ARGS__)
5253
#define vloxseg7ei64_v_i16mf4(...) __riscv_vloxseg7ei64_v_i16mf4(__VA_ARGS__)
5254
#define vloxseg8ei64_v_i16mf4(...) __riscv_vloxseg8ei64_v_i16mf4(__VA_ARGS__)
5255
#define vloxseg2ei64_v_i16mf2(...) __riscv_vloxseg2ei64_v_i16mf2(__VA_ARGS__)
5256
#define vloxseg3ei64_v_i16mf2(...) __riscv_vloxseg3ei64_v_i16mf2(__VA_ARGS__)
5257
#define vloxseg4ei64_v_i16mf2(...) __riscv_vloxseg4ei64_v_i16mf2(__VA_ARGS__)
5258
#define vloxseg5ei64_v_i16mf2(...) __riscv_vloxseg5ei64_v_i16mf2(__VA_ARGS__)
5259
#define vloxseg6ei64_v_i16mf2(...) __riscv_vloxseg6ei64_v_i16mf2(__VA_ARGS__)
5260
#define vloxseg7ei64_v_i16mf2(...) __riscv_vloxseg7ei64_v_i16mf2(__VA_ARGS__)
5261
#define vloxseg8ei64_v_i16mf2(...) __riscv_vloxseg8ei64_v_i16mf2(__VA_ARGS__)
5262
#define vloxseg2ei64_v_i16m1(...) __riscv_vloxseg2ei64_v_i16m1(__VA_ARGS__)
5263
#define vloxseg3ei64_v_i16m1(...) __riscv_vloxseg3ei64_v_i16m1(__VA_ARGS__)
5264
#define vloxseg4ei64_v_i16m1(...) __riscv_vloxseg4ei64_v_i16m1(__VA_ARGS__)
5265
#define vloxseg5ei64_v_i16m1(...) __riscv_vloxseg5ei64_v_i16m1(__VA_ARGS__)
5266
#define vloxseg6ei64_v_i16m1(...) __riscv_vloxseg6ei64_v_i16m1(__VA_ARGS__)
5267
#define vloxseg7ei64_v_i16m1(...) __riscv_vloxseg7ei64_v_i16m1(__VA_ARGS__)
5268
#define vloxseg8ei64_v_i16m1(...) __riscv_vloxseg8ei64_v_i16m1(__VA_ARGS__)
5269
#define vloxseg2ei64_v_i16m2(...) __riscv_vloxseg2ei64_v_i16m2(__VA_ARGS__)
5270
#define vloxseg3ei64_v_i16m2(...) __riscv_vloxseg3ei64_v_i16m2(__VA_ARGS__)
5271
#define vloxseg4ei64_v_i16m2(...) __riscv_vloxseg4ei64_v_i16m2(__VA_ARGS__)
5272
#define vloxseg2ei8_v_i32mf2(...) __riscv_vloxseg2ei8_v_i32mf2(__VA_ARGS__)
5273
#define vloxseg3ei8_v_i32mf2(...) __riscv_vloxseg3ei8_v_i32mf2(__VA_ARGS__)
5274
#define vloxseg4ei8_v_i32mf2(...) __riscv_vloxseg4ei8_v_i32mf2(__VA_ARGS__)
5275
#define vloxseg5ei8_v_i32mf2(...) __riscv_vloxseg5ei8_v_i32mf2(__VA_ARGS__)
5276
#define vloxseg6ei8_v_i32mf2(...) __riscv_vloxseg6ei8_v_i32mf2(__VA_ARGS__)
5277
#define vloxseg7ei8_v_i32mf2(...) __riscv_vloxseg7ei8_v_i32mf2(__VA_ARGS__)
5278
#define vloxseg8ei8_v_i32mf2(...) __riscv_vloxseg8ei8_v_i32mf2(__VA_ARGS__)
5279
#define vloxseg2ei8_v_i32m1(...) __riscv_vloxseg2ei8_v_i32m1(__VA_ARGS__)
5280
#define vloxseg3ei8_v_i32m1(...) __riscv_vloxseg3ei8_v_i32m1(__VA_ARGS__)
5281
#define vloxseg4ei8_v_i32m1(...) __riscv_vloxseg4ei8_v_i32m1(__VA_ARGS__)
5282
#define vloxseg5ei8_v_i32m1(...) __riscv_vloxseg5ei8_v_i32m1(__VA_ARGS__)
5283
#define vloxseg6ei8_v_i32m1(...) __riscv_vloxseg6ei8_v_i32m1(__VA_ARGS__)
5284
#define vloxseg7ei8_v_i32m1(...) __riscv_vloxseg7ei8_v_i32m1(__VA_ARGS__)
5285
#define vloxseg8ei8_v_i32m1(...) __riscv_vloxseg8ei8_v_i32m1(__VA_ARGS__)
5286
#define vloxseg2ei8_v_i32m2(...) __riscv_vloxseg2ei8_v_i32m2(__VA_ARGS__)
5287
#define vloxseg3ei8_v_i32m2(...) __riscv_vloxseg3ei8_v_i32m2(__VA_ARGS__)
5288
#define vloxseg4ei8_v_i32m2(...) __riscv_vloxseg4ei8_v_i32m2(__VA_ARGS__)
5289
#define vloxseg2ei8_v_i32m4(...) __riscv_vloxseg2ei8_v_i32m4(__VA_ARGS__)
5290
#define vloxseg2ei16_v_i32mf2(...) __riscv_vloxseg2ei16_v_i32mf2(__VA_ARGS__)
5291
#define vloxseg3ei16_v_i32mf2(...) __riscv_vloxseg3ei16_v_i32mf2(__VA_ARGS__)
5292
#define vloxseg4ei16_v_i32mf2(...) __riscv_vloxseg4ei16_v_i32mf2(__VA_ARGS__)
5293
#define vloxseg5ei16_v_i32mf2(...) __riscv_vloxseg5ei16_v_i32mf2(__VA_ARGS__)
5294
#define vloxseg6ei16_v_i32mf2(...) __riscv_vloxseg6ei16_v_i32mf2(__VA_ARGS__)
5295
#define vloxseg7ei16_v_i32mf2(...) __riscv_vloxseg7ei16_v_i32mf2(__VA_ARGS__)
5296
#define vloxseg8ei16_v_i32mf2(...) __riscv_vloxseg8ei16_v_i32mf2(__VA_ARGS__)
5297
#define vloxseg2ei16_v_i32m1(...) __riscv_vloxseg2ei16_v_i32m1(__VA_ARGS__)
5298
#define vloxseg3ei16_v_i32m1(...) __riscv_vloxseg3ei16_v_i32m1(__VA_ARGS__)
5299
#define vloxseg4ei16_v_i32m1(...) __riscv_vloxseg4ei16_v_i32m1(__VA_ARGS__)
5300
#define vloxseg5ei16_v_i32m1(...) __riscv_vloxseg5ei16_v_i32m1(__VA_ARGS__)
5301
#define vloxseg6ei16_v_i32m1(...) __riscv_vloxseg6ei16_v_i32m1(__VA_ARGS__)
5302
#define vloxseg7ei16_v_i32m1(...) __riscv_vloxseg7ei16_v_i32m1(__VA_ARGS__)
5303
#define vloxseg8ei16_v_i32m1(...) __riscv_vloxseg8ei16_v_i32m1(__VA_ARGS__)
5304
#define vloxseg2ei16_v_i32m2(...) __riscv_vloxseg2ei16_v_i32m2(__VA_ARGS__)
5305
#define vloxseg3ei16_v_i32m2(...) __riscv_vloxseg3ei16_v_i32m2(__VA_ARGS__)
5306
#define vloxseg4ei16_v_i32m2(...) __riscv_vloxseg4ei16_v_i32m2(__VA_ARGS__)
5307
#define vloxseg2ei16_v_i32m4(...) __riscv_vloxseg2ei16_v_i32m4(__VA_ARGS__)
5308
#define vloxseg2ei32_v_i32mf2(...) __riscv_vloxseg2ei32_v_i32mf2(__VA_ARGS__)
5309
#define vloxseg3ei32_v_i32mf2(...) __riscv_vloxseg3ei32_v_i32mf2(__VA_ARGS__)
5310
#define vloxseg4ei32_v_i32mf2(...) __riscv_vloxseg4ei32_v_i32mf2(__VA_ARGS__)
5311
#define vloxseg5ei32_v_i32mf2(...) __riscv_vloxseg5ei32_v_i32mf2(__VA_ARGS__)
5312
#define vloxseg6ei32_v_i32mf2(...) __riscv_vloxseg6ei32_v_i32mf2(__VA_ARGS__)
5313
#define vloxseg7ei32_v_i32mf2(...) __riscv_vloxseg7ei32_v_i32mf2(__VA_ARGS__)
5314
#define vloxseg8ei32_v_i32mf2(...) __riscv_vloxseg8ei32_v_i32mf2(__VA_ARGS__)
5315
#define vloxseg2ei32_v_i32m1(...) __riscv_vloxseg2ei32_v_i32m1(__VA_ARGS__)
5316
#define vloxseg3ei32_v_i32m1(...) __riscv_vloxseg3ei32_v_i32m1(__VA_ARGS__)
5317
#define vloxseg4ei32_v_i32m1(...) __riscv_vloxseg4ei32_v_i32m1(__VA_ARGS__)
5318
#define vloxseg5ei32_v_i32m1(...) __riscv_vloxseg5ei32_v_i32m1(__VA_ARGS__)
5319
#define vloxseg6ei32_v_i32m1(...) __riscv_vloxseg6ei32_v_i32m1(__VA_ARGS__)
5320
#define vloxseg7ei32_v_i32m1(...) __riscv_vloxseg7ei32_v_i32m1(__VA_ARGS__)
5321
#define vloxseg8ei32_v_i32m1(...) __riscv_vloxseg8ei32_v_i32m1(__VA_ARGS__)
5322
#define vloxseg2ei32_v_i32m2(...) __riscv_vloxseg2ei32_v_i32m2(__VA_ARGS__)
5323
#define vloxseg3ei32_v_i32m2(...) __riscv_vloxseg3ei32_v_i32m2(__VA_ARGS__)
5324
#define vloxseg4ei32_v_i32m2(...) __riscv_vloxseg4ei32_v_i32m2(__VA_ARGS__)
5325
#define vloxseg2ei32_v_i32m4(...) __riscv_vloxseg2ei32_v_i32m4(__VA_ARGS__)
5326
#define vloxseg2ei64_v_i32mf2(...) __riscv_vloxseg2ei64_v_i32mf2(__VA_ARGS__)
5327
#define vloxseg3ei64_v_i32mf2(...) __riscv_vloxseg3ei64_v_i32mf2(__VA_ARGS__)
5328
#define vloxseg4ei64_v_i32mf2(...) __riscv_vloxseg4ei64_v_i32mf2(__VA_ARGS__)
5329
#define vloxseg5ei64_v_i32mf2(...) __riscv_vloxseg5ei64_v_i32mf2(__VA_ARGS__)
5330
#define vloxseg6ei64_v_i32mf2(...) __riscv_vloxseg6ei64_v_i32mf2(__VA_ARGS__)
5331
#define vloxseg7ei64_v_i32mf2(...) __riscv_vloxseg7ei64_v_i32mf2(__VA_ARGS__)
5332
#define vloxseg8ei64_v_i32mf2(...) __riscv_vloxseg8ei64_v_i32mf2(__VA_ARGS__)
5333
#define vloxseg2ei64_v_i32m1(...) __riscv_vloxseg2ei64_v_i32m1(__VA_ARGS__)
5334
#define vloxseg3ei64_v_i32m1(...) __riscv_vloxseg3ei64_v_i32m1(__VA_ARGS__)
5335
#define vloxseg4ei64_v_i32m1(...) __riscv_vloxseg4ei64_v_i32m1(__VA_ARGS__)
5336
#define vloxseg5ei64_v_i32m1(...) __riscv_vloxseg5ei64_v_i32m1(__VA_ARGS__)
5337
#define vloxseg6ei64_v_i32m1(...) __riscv_vloxseg6ei64_v_i32m1(__VA_ARGS__)
5338
#define vloxseg7ei64_v_i32m1(...) __riscv_vloxseg7ei64_v_i32m1(__VA_ARGS__)
5339
#define vloxseg8ei64_v_i32m1(...) __riscv_vloxseg8ei64_v_i32m1(__VA_ARGS__)
5340
#define vloxseg2ei64_v_i32m2(...) __riscv_vloxseg2ei64_v_i32m2(__VA_ARGS__)
5341
#define vloxseg3ei64_v_i32m2(...) __riscv_vloxseg3ei64_v_i32m2(__VA_ARGS__)
5342
#define vloxseg4ei64_v_i32m2(...) __riscv_vloxseg4ei64_v_i32m2(__VA_ARGS__)
5343
#define vloxseg2ei64_v_i32m4(...) __riscv_vloxseg2ei64_v_i32m4(__VA_ARGS__)
5344
#define vloxseg2ei8_v_i64m1(...) __riscv_vloxseg2ei8_v_i64m1(__VA_ARGS__)
5345
#define vloxseg3ei8_v_i64m1(...) __riscv_vloxseg3ei8_v_i64m1(__VA_ARGS__)
5346
#define vloxseg4ei8_v_i64m1(...) __riscv_vloxseg4ei8_v_i64m1(__VA_ARGS__)
5347
#define vloxseg5ei8_v_i64m1(...) __riscv_vloxseg5ei8_v_i64m1(__VA_ARGS__)
5348
#define vloxseg6ei8_v_i64m1(...) __riscv_vloxseg6ei8_v_i64m1(__VA_ARGS__)
5349
#define vloxseg7ei8_v_i64m1(...) __riscv_vloxseg7ei8_v_i64m1(__VA_ARGS__)
5350
#define vloxseg8ei8_v_i64m1(...) __riscv_vloxseg8ei8_v_i64m1(__VA_ARGS__)
5351
#define vloxseg2ei8_v_i64m2(...) __riscv_vloxseg2ei8_v_i64m2(__VA_ARGS__)
5352
#define vloxseg3ei8_v_i64m2(...) __riscv_vloxseg3ei8_v_i64m2(__VA_ARGS__)
5353
#define vloxseg4ei8_v_i64m2(...) __riscv_vloxseg4ei8_v_i64m2(__VA_ARGS__)
5354
#define vloxseg2ei8_v_i64m4(...) __riscv_vloxseg2ei8_v_i64m4(__VA_ARGS__)
5355
#define vloxseg2ei16_v_i64m1(...) __riscv_vloxseg2ei16_v_i64m1(__VA_ARGS__)
5356
#define vloxseg3ei16_v_i64m1(...) __riscv_vloxseg3ei16_v_i64m1(__VA_ARGS__)
5357
#define vloxseg4ei16_v_i64m1(...) __riscv_vloxseg4ei16_v_i64m1(__VA_ARGS__)
5358
#define vloxseg5ei16_v_i64m1(...) __riscv_vloxseg5ei16_v_i64m1(__VA_ARGS__)
5359
#define vloxseg6ei16_v_i64m1(...) __riscv_vloxseg6ei16_v_i64m1(__VA_ARGS__)
5360
#define vloxseg7ei16_v_i64m1(...) __riscv_vloxseg7ei16_v_i64m1(__VA_ARGS__)
5361
#define vloxseg8ei16_v_i64m1(...) __riscv_vloxseg8ei16_v_i64m1(__VA_ARGS__)
5362
#define vloxseg2ei16_v_i64m2(...) __riscv_vloxseg2ei16_v_i64m2(__VA_ARGS__)
5363
#define vloxseg3ei16_v_i64m2(...) __riscv_vloxseg3ei16_v_i64m2(__VA_ARGS__)
5364
#define vloxseg4ei16_v_i64m2(...) __riscv_vloxseg4ei16_v_i64m2(__VA_ARGS__)
5365
#define vloxseg2ei16_v_i64m4(...) __riscv_vloxseg2ei16_v_i64m4(__VA_ARGS__)
5366
#define vloxseg2ei32_v_i64m1(...) __riscv_vloxseg2ei32_v_i64m1(__VA_ARGS__)
5367
#define vloxseg3ei32_v_i64m1(...) __riscv_vloxseg3ei32_v_i64m1(__VA_ARGS__)
5368
#define vloxseg4ei32_v_i64m1(...) __riscv_vloxseg4ei32_v_i64m1(__VA_ARGS__)
5369
#define vloxseg5ei32_v_i64m1(...) __riscv_vloxseg5ei32_v_i64m1(__VA_ARGS__)
5370
#define vloxseg6ei32_v_i64m1(...) __riscv_vloxseg6ei32_v_i64m1(__VA_ARGS__)
5371
#define vloxseg7ei32_v_i64m1(...) __riscv_vloxseg7ei32_v_i64m1(__VA_ARGS__)
5372
#define vloxseg8ei32_v_i64m1(...) __riscv_vloxseg8ei32_v_i64m1(__VA_ARGS__)
5373
#define vloxseg2ei32_v_i64m2(...) __riscv_vloxseg2ei32_v_i64m2(__VA_ARGS__)
5374
#define vloxseg3ei32_v_i64m2(...) __riscv_vloxseg3ei32_v_i64m2(__VA_ARGS__)
5375
#define vloxseg4ei32_v_i64m2(...) __riscv_vloxseg4ei32_v_i64m2(__VA_ARGS__)
5376
#define vloxseg2ei32_v_i64m4(...) __riscv_vloxseg2ei32_v_i64m4(__VA_ARGS__)
5377
#define vloxseg2ei64_v_i64m1(...) __riscv_vloxseg2ei64_v_i64m1(__VA_ARGS__)
5378
#define vloxseg3ei64_v_i64m1(...) __riscv_vloxseg3ei64_v_i64m1(__VA_ARGS__)
5379
#define vloxseg4ei64_v_i64m1(...) __riscv_vloxseg4ei64_v_i64m1(__VA_ARGS__)
5380
#define vloxseg5ei64_v_i64m1(...) __riscv_vloxseg5ei64_v_i64m1(__VA_ARGS__)
5381
#define vloxseg6ei64_v_i64m1(...) __riscv_vloxseg6ei64_v_i64m1(__VA_ARGS__)
5382
#define vloxseg7ei64_v_i64m1(...) __riscv_vloxseg7ei64_v_i64m1(__VA_ARGS__)
5383
#define vloxseg8ei64_v_i64m1(...) __riscv_vloxseg8ei64_v_i64m1(__VA_ARGS__)
5384
#define vloxseg2ei64_v_i64m2(...) __riscv_vloxseg2ei64_v_i64m2(__VA_ARGS__)
5385
#define vloxseg3ei64_v_i64m2(...) __riscv_vloxseg3ei64_v_i64m2(__VA_ARGS__)
5386
#define vloxseg4ei64_v_i64m2(...) __riscv_vloxseg4ei64_v_i64m2(__VA_ARGS__)
5387
#define vloxseg2ei64_v_i64m4(...) __riscv_vloxseg2ei64_v_i64m4(__VA_ARGS__)
5388
#define vluxseg2ei8_v_i8mf8(...) __riscv_vluxseg2ei8_v_i8mf8(__VA_ARGS__)
5389
#define vluxseg3ei8_v_i8mf8(...) __riscv_vluxseg3ei8_v_i8mf8(__VA_ARGS__)
5390
#define vluxseg4ei8_v_i8mf8(...) __riscv_vluxseg4ei8_v_i8mf8(__VA_ARGS__)
5391
#define vluxseg5ei8_v_i8mf8(...) __riscv_vluxseg5ei8_v_i8mf8(__VA_ARGS__)
5392
#define vluxseg6ei8_v_i8mf8(...) __riscv_vluxseg6ei8_v_i8mf8(__VA_ARGS__)
5393
#define vluxseg7ei8_v_i8mf8(...) __riscv_vluxseg7ei8_v_i8mf8(__VA_ARGS__)
5394
#define vluxseg8ei8_v_i8mf8(...) __riscv_vluxseg8ei8_v_i8mf8(__VA_ARGS__)
5395
#define vluxseg2ei8_v_i8mf4(...) __riscv_vluxseg2ei8_v_i8mf4(__VA_ARGS__)
5396
#define vluxseg3ei8_v_i8mf4(...) __riscv_vluxseg3ei8_v_i8mf4(__VA_ARGS__)
5397
#define vluxseg4ei8_v_i8mf4(...) __riscv_vluxseg4ei8_v_i8mf4(__VA_ARGS__)
5398
#define vluxseg5ei8_v_i8mf4(...) __riscv_vluxseg5ei8_v_i8mf4(__VA_ARGS__)
5399
#define vluxseg6ei8_v_i8mf4(...) __riscv_vluxseg6ei8_v_i8mf4(__VA_ARGS__)
5400
#define vluxseg7ei8_v_i8mf4(...) __riscv_vluxseg7ei8_v_i8mf4(__VA_ARGS__)
5401
#define vluxseg8ei8_v_i8mf4(...) __riscv_vluxseg8ei8_v_i8mf4(__VA_ARGS__)
5402
#define vluxseg2ei8_v_i8mf2(...) __riscv_vluxseg2ei8_v_i8mf2(__VA_ARGS__)
5403
#define vluxseg3ei8_v_i8mf2(...) __riscv_vluxseg3ei8_v_i8mf2(__VA_ARGS__)
5404
#define vluxseg4ei8_v_i8mf2(...) __riscv_vluxseg4ei8_v_i8mf2(__VA_ARGS__)
5405
#define vluxseg5ei8_v_i8mf2(...) __riscv_vluxseg5ei8_v_i8mf2(__VA_ARGS__)
5406
#define vluxseg6ei8_v_i8mf2(...) __riscv_vluxseg6ei8_v_i8mf2(__VA_ARGS__)
5407
#define vluxseg7ei8_v_i8mf2(...) __riscv_vluxseg7ei8_v_i8mf2(__VA_ARGS__)
5408
#define vluxseg8ei8_v_i8mf2(...) __riscv_vluxseg8ei8_v_i8mf2(__VA_ARGS__)
5409
#define vluxseg2ei8_v_i8m1(...) __riscv_vluxseg2ei8_v_i8m1(__VA_ARGS__)
5410
#define vluxseg3ei8_v_i8m1(...) __riscv_vluxseg3ei8_v_i8m1(__VA_ARGS__)
5411
#define vluxseg4ei8_v_i8m1(...) __riscv_vluxseg4ei8_v_i8m1(__VA_ARGS__)
5412
#define vluxseg5ei8_v_i8m1(...) __riscv_vluxseg5ei8_v_i8m1(__VA_ARGS__)
5413
#define vluxseg6ei8_v_i8m1(...) __riscv_vluxseg6ei8_v_i8m1(__VA_ARGS__)
5414
#define vluxseg7ei8_v_i8m1(...) __riscv_vluxseg7ei8_v_i8m1(__VA_ARGS__)
5415
#define vluxseg8ei8_v_i8m1(...) __riscv_vluxseg8ei8_v_i8m1(__VA_ARGS__)
5416
#define vluxseg2ei8_v_i8m2(...) __riscv_vluxseg2ei8_v_i8m2(__VA_ARGS__)
5417
#define vluxseg3ei8_v_i8m2(...) __riscv_vluxseg3ei8_v_i8m2(__VA_ARGS__)
5418
#define vluxseg4ei8_v_i8m2(...) __riscv_vluxseg4ei8_v_i8m2(__VA_ARGS__)
5419
#define vluxseg2ei8_v_i8m4(...) __riscv_vluxseg2ei8_v_i8m4(__VA_ARGS__)
5420
#define vluxseg2ei16_v_i8mf8(...) __riscv_vluxseg2ei16_v_i8mf8(__VA_ARGS__)
5421
#define vluxseg3ei16_v_i8mf8(...) __riscv_vluxseg3ei16_v_i8mf8(__VA_ARGS__)
5422
#define vluxseg4ei16_v_i8mf8(...) __riscv_vluxseg4ei16_v_i8mf8(__VA_ARGS__)
5423
#define vluxseg5ei16_v_i8mf8(...) __riscv_vluxseg5ei16_v_i8mf8(__VA_ARGS__)
5424
#define vluxseg6ei16_v_i8mf8(...) __riscv_vluxseg6ei16_v_i8mf8(__VA_ARGS__)
5425
#define vluxseg7ei16_v_i8mf8(...) __riscv_vluxseg7ei16_v_i8mf8(__VA_ARGS__)
5426
#define vluxseg8ei16_v_i8mf8(...) __riscv_vluxseg8ei16_v_i8mf8(__VA_ARGS__)
5427
#define vluxseg2ei16_v_i8mf4(...) __riscv_vluxseg2ei16_v_i8mf4(__VA_ARGS__)
5428
#define vluxseg3ei16_v_i8mf4(...) __riscv_vluxseg3ei16_v_i8mf4(__VA_ARGS__)
5429
#define vluxseg4ei16_v_i8mf4(...) __riscv_vluxseg4ei16_v_i8mf4(__VA_ARGS__)
5430
#define vluxseg5ei16_v_i8mf4(...) __riscv_vluxseg5ei16_v_i8mf4(__VA_ARGS__)
5431
#define vluxseg6ei16_v_i8mf4(...) __riscv_vluxseg6ei16_v_i8mf4(__VA_ARGS__)
5432
#define vluxseg7ei16_v_i8mf4(...) __riscv_vluxseg7ei16_v_i8mf4(__VA_ARGS__)
5433
#define vluxseg8ei16_v_i8mf4(...) __riscv_vluxseg8ei16_v_i8mf4(__VA_ARGS__)
5434
#define vluxseg2ei16_v_i8mf2(...) __riscv_vluxseg2ei16_v_i8mf2(__VA_ARGS__)
5435
#define vluxseg3ei16_v_i8mf2(...) __riscv_vluxseg3ei16_v_i8mf2(__VA_ARGS__)
5436
#define vluxseg4ei16_v_i8mf2(...) __riscv_vluxseg4ei16_v_i8mf2(__VA_ARGS__)
5437
#define vluxseg5ei16_v_i8mf2(...) __riscv_vluxseg5ei16_v_i8mf2(__VA_ARGS__)
5438
#define vluxseg6ei16_v_i8mf2(...) __riscv_vluxseg6ei16_v_i8mf2(__VA_ARGS__)
5439
#define vluxseg7ei16_v_i8mf2(...) __riscv_vluxseg7ei16_v_i8mf2(__VA_ARGS__)
5440
#define vluxseg8ei16_v_i8mf2(...) __riscv_vluxseg8ei16_v_i8mf2(__VA_ARGS__)
5441
#define vluxseg2ei16_v_i8m1(...) __riscv_vluxseg2ei16_v_i8m1(__VA_ARGS__)
5442
#define vluxseg3ei16_v_i8m1(...) __riscv_vluxseg3ei16_v_i8m1(__VA_ARGS__)
5443
#define vluxseg4ei16_v_i8m1(...) __riscv_vluxseg4ei16_v_i8m1(__VA_ARGS__)
5444
#define vluxseg5ei16_v_i8m1(...) __riscv_vluxseg5ei16_v_i8m1(__VA_ARGS__)
5445
#define vluxseg6ei16_v_i8m1(...) __riscv_vluxseg6ei16_v_i8m1(__VA_ARGS__)
5446
#define vluxseg7ei16_v_i8m1(...) __riscv_vluxseg7ei16_v_i8m1(__VA_ARGS__)
5447
#define vluxseg8ei16_v_i8m1(...) __riscv_vluxseg8ei16_v_i8m1(__VA_ARGS__)
5448
#define vluxseg2ei16_v_i8m2(...) __riscv_vluxseg2ei16_v_i8m2(__VA_ARGS__)
5449
#define vluxseg3ei16_v_i8m2(...) __riscv_vluxseg3ei16_v_i8m2(__VA_ARGS__)
5450
#define vluxseg4ei16_v_i8m2(...) __riscv_vluxseg4ei16_v_i8m2(__VA_ARGS__)
5451
#define vluxseg2ei16_v_i8m4(...) __riscv_vluxseg2ei16_v_i8m4(__VA_ARGS__)
5452
#define vluxseg2ei32_v_i8mf8(...) __riscv_vluxseg2ei32_v_i8mf8(__VA_ARGS__)
5453
#define vluxseg3ei32_v_i8mf8(...) __riscv_vluxseg3ei32_v_i8mf8(__VA_ARGS__)
5454
#define vluxseg4ei32_v_i8mf8(...) __riscv_vluxseg4ei32_v_i8mf8(__VA_ARGS__)
5455
#define vluxseg5ei32_v_i8mf8(...) __riscv_vluxseg5ei32_v_i8mf8(__VA_ARGS__)
5456
#define vluxseg6ei32_v_i8mf8(...) __riscv_vluxseg6ei32_v_i8mf8(__VA_ARGS__)
5457
#define vluxseg7ei32_v_i8mf8(...) __riscv_vluxseg7ei32_v_i8mf8(__VA_ARGS__)
5458
#define vluxseg8ei32_v_i8mf8(...) __riscv_vluxseg8ei32_v_i8mf8(__VA_ARGS__)
5459
#define vluxseg2ei32_v_i8mf4(...) __riscv_vluxseg2ei32_v_i8mf4(__VA_ARGS__)
5460
#define vluxseg3ei32_v_i8mf4(...) __riscv_vluxseg3ei32_v_i8mf4(__VA_ARGS__)
5461
#define vluxseg4ei32_v_i8mf4(...) __riscv_vluxseg4ei32_v_i8mf4(__VA_ARGS__)
5462
#define vluxseg5ei32_v_i8mf4(...) __riscv_vluxseg5ei32_v_i8mf4(__VA_ARGS__)
5463
#define vluxseg6ei32_v_i8mf4(...) __riscv_vluxseg6ei32_v_i8mf4(__VA_ARGS__)
5464
#define vluxseg7ei32_v_i8mf4(...) __riscv_vluxseg7ei32_v_i8mf4(__VA_ARGS__)
5465
#define vluxseg8ei32_v_i8mf4(...) __riscv_vluxseg8ei32_v_i8mf4(__VA_ARGS__)
5466
#define vluxseg2ei32_v_i8mf2(...) __riscv_vluxseg2ei32_v_i8mf2(__VA_ARGS__)
5467
#define vluxseg3ei32_v_i8mf2(...) __riscv_vluxseg3ei32_v_i8mf2(__VA_ARGS__)
5468
#define vluxseg4ei32_v_i8mf2(...) __riscv_vluxseg4ei32_v_i8mf2(__VA_ARGS__)
5469
#define vluxseg5ei32_v_i8mf2(...) __riscv_vluxseg5ei32_v_i8mf2(__VA_ARGS__)
5470
#define vluxseg6ei32_v_i8mf2(...) __riscv_vluxseg6ei32_v_i8mf2(__VA_ARGS__)
5471
#define vluxseg7ei32_v_i8mf2(...) __riscv_vluxseg7ei32_v_i8mf2(__VA_ARGS__)
5472
#define vluxseg8ei32_v_i8mf2(...) __riscv_vluxseg8ei32_v_i8mf2(__VA_ARGS__)
5473
#define vluxseg2ei32_v_i8m1(...) __riscv_vluxseg2ei32_v_i8m1(__VA_ARGS__)
5474
#define vluxseg3ei32_v_i8m1(...) __riscv_vluxseg3ei32_v_i8m1(__VA_ARGS__)
5475
#define vluxseg4ei32_v_i8m1(...) __riscv_vluxseg4ei32_v_i8m1(__VA_ARGS__)
5476
#define vluxseg5ei32_v_i8m1(...) __riscv_vluxseg5ei32_v_i8m1(__VA_ARGS__)
5477
#define vluxseg6ei32_v_i8m1(...) __riscv_vluxseg6ei32_v_i8m1(__VA_ARGS__)
5478
#define vluxseg7ei32_v_i8m1(...) __riscv_vluxseg7ei32_v_i8m1(__VA_ARGS__)
5479
#define vluxseg8ei32_v_i8m1(...) __riscv_vluxseg8ei32_v_i8m1(__VA_ARGS__)
5480
#define vluxseg2ei32_v_i8m2(...) __riscv_vluxseg2ei32_v_i8m2(__VA_ARGS__)
5481
#define vluxseg3ei32_v_i8m2(...) __riscv_vluxseg3ei32_v_i8m2(__VA_ARGS__)
5482
#define vluxseg4ei32_v_i8m2(...) __riscv_vluxseg4ei32_v_i8m2(__VA_ARGS__)
5483
#define vluxseg2ei64_v_i8mf8(...) __riscv_vluxseg2ei64_v_i8mf8(__VA_ARGS__)
5484
#define vluxseg3ei64_v_i8mf8(...) __riscv_vluxseg3ei64_v_i8mf8(__VA_ARGS__)
5485
#define vluxseg4ei64_v_i8mf8(...) __riscv_vluxseg4ei64_v_i8mf8(__VA_ARGS__)
5486
#define vluxseg5ei64_v_i8mf8(...) __riscv_vluxseg5ei64_v_i8mf8(__VA_ARGS__)
5487
#define vluxseg6ei64_v_i8mf8(...) __riscv_vluxseg6ei64_v_i8mf8(__VA_ARGS__)
5488
#define vluxseg7ei64_v_i8mf8(...) __riscv_vluxseg7ei64_v_i8mf8(__VA_ARGS__)
5489
#define vluxseg8ei64_v_i8mf8(...) __riscv_vluxseg8ei64_v_i8mf8(__VA_ARGS__)
5490
#define vluxseg2ei64_v_i8mf4(...) __riscv_vluxseg2ei64_v_i8mf4(__VA_ARGS__)
5491
#define vluxseg3ei64_v_i8mf4(...) __riscv_vluxseg3ei64_v_i8mf4(__VA_ARGS__)
5492
#define vluxseg4ei64_v_i8mf4(...) __riscv_vluxseg4ei64_v_i8mf4(__VA_ARGS__)
5493
#define vluxseg5ei64_v_i8mf4(...) __riscv_vluxseg5ei64_v_i8mf4(__VA_ARGS__)
5494
#define vluxseg6ei64_v_i8mf4(...) __riscv_vluxseg6ei64_v_i8mf4(__VA_ARGS__)
5495
#define vluxseg7ei64_v_i8mf4(...) __riscv_vluxseg7ei64_v_i8mf4(__VA_ARGS__)
5496
#define vluxseg8ei64_v_i8mf4(...) __riscv_vluxseg8ei64_v_i8mf4(__VA_ARGS__)
5497
#define vluxseg2ei64_v_i8mf2(...) __riscv_vluxseg2ei64_v_i8mf2(__VA_ARGS__)
5498
#define vluxseg3ei64_v_i8mf2(...) __riscv_vluxseg3ei64_v_i8mf2(__VA_ARGS__)
5499
#define vluxseg4ei64_v_i8mf2(...) __riscv_vluxseg4ei64_v_i8mf2(__VA_ARGS__)
5500
#define vluxseg5ei64_v_i8mf2(...) __riscv_vluxseg5ei64_v_i8mf2(__VA_ARGS__)
5501
#define vluxseg6ei64_v_i8mf2(...) __riscv_vluxseg6ei64_v_i8mf2(__VA_ARGS__)
5502
#define vluxseg7ei64_v_i8mf2(...) __riscv_vluxseg7ei64_v_i8mf2(__VA_ARGS__)
5503
#define vluxseg8ei64_v_i8mf2(...) __riscv_vluxseg8ei64_v_i8mf2(__VA_ARGS__)
5504
#define vluxseg2ei64_v_i8m1(...) __riscv_vluxseg2ei64_v_i8m1(__VA_ARGS__)
5505
#define vluxseg3ei64_v_i8m1(...) __riscv_vluxseg3ei64_v_i8m1(__VA_ARGS__)
5506
#define vluxseg4ei64_v_i8m1(...) __riscv_vluxseg4ei64_v_i8m1(__VA_ARGS__)
5507
#define vluxseg5ei64_v_i8m1(...) __riscv_vluxseg5ei64_v_i8m1(__VA_ARGS__)
5508
#define vluxseg6ei64_v_i8m1(...) __riscv_vluxseg6ei64_v_i8m1(__VA_ARGS__)
5509
#define vluxseg7ei64_v_i8m1(...) __riscv_vluxseg7ei64_v_i8m1(__VA_ARGS__)
5510
#define vluxseg8ei64_v_i8m1(...) __riscv_vluxseg8ei64_v_i8m1(__VA_ARGS__)
5511
#define vluxseg2ei8_v_i16mf4(...) __riscv_vluxseg2ei8_v_i16mf4(__VA_ARGS__)
5512
#define vluxseg3ei8_v_i16mf4(...) __riscv_vluxseg3ei8_v_i16mf4(__VA_ARGS__)
5513
#define vluxseg4ei8_v_i16mf4(...) __riscv_vluxseg4ei8_v_i16mf4(__VA_ARGS__)
5514
#define vluxseg5ei8_v_i16mf4(...) __riscv_vluxseg5ei8_v_i16mf4(__VA_ARGS__)
5515
#define vluxseg6ei8_v_i16mf4(...) __riscv_vluxseg6ei8_v_i16mf4(__VA_ARGS__)
5516
#define vluxseg7ei8_v_i16mf4(...) __riscv_vluxseg7ei8_v_i16mf4(__VA_ARGS__)
5517
#define vluxseg8ei8_v_i16mf4(...) __riscv_vluxseg8ei8_v_i16mf4(__VA_ARGS__)
5518
#define vluxseg2ei8_v_i16mf2(...) __riscv_vluxseg2ei8_v_i16mf2(__VA_ARGS__)
5519
#define vluxseg3ei8_v_i16mf2(...) __riscv_vluxseg3ei8_v_i16mf2(__VA_ARGS__)
5520
#define vluxseg4ei8_v_i16mf2(...) __riscv_vluxseg4ei8_v_i16mf2(__VA_ARGS__)
5521
#define vluxseg5ei8_v_i16mf2(...) __riscv_vluxseg5ei8_v_i16mf2(__VA_ARGS__)
5522
#define vluxseg6ei8_v_i16mf2(...) __riscv_vluxseg6ei8_v_i16mf2(__VA_ARGS__)
5523
#define vluxseg7ei8_v_i16mf2(...) __riscv_vluxseg7ei8_v_i16mf2(__VA_ARGS__)
5524
#define vluxseg8ei8_v_i16mf2(...) __riscv_vluxseg8ei8_v_i16mf2(__VA_ARGS__)
5525
#define vluxseg2ei8_v_i16m1(...) __riscv_vluxseg2ei8_v_i16m1(__VA_ARGS__)
5526
#define vluxseg3ei8_v_i16m1(...) __riscv_vluxseg3ei8_v_i16m1(__VA_ARGS__)
5527
#define vluxseg4ei8_v_i16m1(...) __riscv_vluxseg4ei8_v_i16m1(__VA_ARGS__)
5528
#define vluxseg5ei8_v_i16m1(...) __riscv_vluxseg5ei8_v_i16m1(__VA_ARGS__)
5529
#define vluxseg6ei8_v_i16m1(...) __riscv_vluxseg6ei8_v_i16m1(__VA_ARGS__)
5530
#define vluxseg7ei8_v_i16m1(...) __riscv_vluxseg7ei8_v_i16m1(__VA_ARGS__)
5531
#define vluxseg8ei8_v_i16m1(...) __riscv_vluxseg8ei8_v_i16m1(__VA_ARGS__)
5532
#define vluxseg2ei8_v_i16m2(...) __riscv_vluxseg2ei8_v_i16m2(__VA_ARGS__)
5533
#define vluxseg3ei8_v_i16m2(...) __riscv_vluxseg3ei8_v_i16m2(__VA_ARGS__)
5534
#define vluxseg4ei8_v_i16m2(...) __riscv_vluxseg4ei8_v_i16m2(__VA_ARGS__)
5535
#define vluxseg2ei8_v_i16m4(...) __riscv_vluxseg2ei8_v_i16m4(__VA_ARGS__)
5536
#define vluxseg2ei16_v_i16mf4(...) __riscv_vluxseg2ei16_v_i16mf4(__VA_ARGS__)
5537
#define vluxseg3ei16_v_i16mf4(...) __riscv_vluxseg3ei16_v_i16mf4(__VA_ARGS__)
5538
#define vluxseg4ei16_v_i16mf4(...) __riscv_vluxseg4ei16_v_i16mf4(__VA_ARGS__)
5539
#define vluxseg5ei16_v_i16mf4(...) __riscv_vluxseg5ei16_v_i16mf4(__VA_ARGS__)
5540
#define vluxseg6ei16_v_i16mf4(...) __riscv_vluxseg6ei16_v_i16mf4(__VA_ARGS__)
5541
#define vluxseg7ei16_v_i16mf4(...) __riscv_vluxseg7ei16_v_i16mf4(__VA_ARGS__)
5542
#define vluxseg8ei16_v_i16mf4(...) __riscv_vluxseg8ei16_v_i16mf4(__VA_ARGS__)
5543
#define vluxseg2ei16_v_i16mf2(...) __riscv_vluxseg2ei16_v_i16mf2(__VA_ARGS__)
5544
#define vluxseg3ei16_v_i16mf2(...) __riscv_vluxseg3ei16_v_i16mf2(__VA_ARGS__)
5545
#define vluxseg4ei16_v_i16mf2(...) __riscv_vluxseg4ei16_v_i16mf2(__VA_ARGS__)
5546
#define vluxseg5ei16_v_i16mf2(...) __riscv_vluxseg5ei16_v_i16mf2(__VA_ARGS__)
5547
#define vluxseg6ei16_v_i16mf2(...) __riscv_vluxseg6ei16_v_i16mf2(__VA_ARGS__)
5548
#define vluxseg7ei16_v_i16mf2(...) __riscv_vluxseg7ei16_v_i16mf2(__VA_ARGS__)
5549
#define vluxseg8ei16_v_i16mf2(...) __riscv_vluxseg8ei16_v_i16mf2(__VA_ARGS__)
5550
#define vluxseg2ei16_v_i16m1(...) __riscv_vluxseg2ei16_v_i16m1(__VA_ARGS__)
5551
#define vluxseg3ei16_v_i16m1(...) __riscv_vluxseg3ei16_v_i16m1(__VA_ARGS__)
5552
#define vluxseg4ei16_v_i16m1(...) __riscv_vluxseg4ei16_v_i16m1(__VA_ARGS__)
5553
#define vluxseg5ei16_v_i16m1(...) __riscv_vluxseg5ei16_v_i16m1(__VA_ARGS__)
5554
#define vluxseg6ei16_v_i16m1(...) __riscv_vluxseg6ei16_v_i16m1(__VA_ARGS__)
5555
#define vluxseg7ei16_v_i16m1(...) __riscv_vluxseg7ei16_v_i16m1(__VA_ARGS__)
5556
#define vluxseg8ei16_v_i16m1(...) __riscv_vluxseg8ei16_v_i16m1(__VA_ARGS__)
5557
#define vluxseg2ei16_v_i16m2(...) __riscv_vluxseg2ei16_v_i16m2(__VA_ARGS__)
5558
#define vluxseg3ei16_v_i16m2(...) __riscv_vluxseg3ei16_v_i16m2(__VA_ARGS__)
5559
#define vluxseg4ei16_v_i16m2(...) __riscv_vluxseg4ei16_v_i16m2(__VA_ARGS__)
5560
#define vluxseg2ei16_v_i16m4(...) __riscv_vluxseg2ei16_v_i16m4(__VA_ARGS__)
5561
#define vluxseg2ei32_v_i16mf4(...) __riscv_vluxseg2ei32_v_i16mf4(__VA_ARGS__)
5562
#define vluxseg3ei32_v_i16mf4(...) __riscv_vluxseg3ei32_v_i16mf4(__VA_ARGS__)
5563
#define vluxseg4ei32_v_i16mf4(...) __riscv_vluxseg4ei32_v_i16mf4(__VA_ARGS__)
5564
#define vluxseg5ei32_v_i16mf4(...) __riscv_vluxseg5ei32_v_i16mf4(__VA_ARGS__)
5565
#define vluxseg6ei32_v_i16mf4(...) __riscv_vluxseg6ei32_v_i16mf4(__VA_ARGS__)
5566
#define vluxseg7ei32_v_i16mf4(...) __riscv_vluxseg7ei32_v_i16mf4(__VA_ARGS__)
5567
#define vluxseg8ei32_v_i16mf4(...) __riscv_vluxseg8ei32_v_i16mf4(__VA_ARGS__)
5568
#define vluxseg2ei32_v_i16mf2(...) __riscv_vluxseg2ei32_v_i16mf2(__VA_ARGS__)
5569
#define vluxseg3ei32_v_i16mf2(...) __riscv_vluxseg3ei32_v_i16mf2(__VA_ARGS__)
5570
#define vluxseg4ei32_v_i16mf2(...) __riscv_vluxseg4ei32_v_i16mf2(__VA_ARGS__)
5571
#define vluxseg5ei32_v_i16mf2(...) __riscv_vluxseg5ei32_v_i16mf2(__VA_ARGS__)
5572
#define vluxseg6ei32_v_i16mf2(...) __riscv_vluxseg6ei32_v_i16mf2(__VA_ARGS__)
5573
#define vluxseg7ei32_v_i16mf2(...) __riscv_vluxseg7ei32_v_i16mf2(__VA_ARGS__)
5574
#define vluxseg8ei32_v_i16mf2(...) __riscv_vluxseg8ei32_v_i16mf2(__VA_ARGS__)
5575
#define vluxseg2ei32_v_i16m1(...) __riscv_vluxseg2ei32_v_i16m1(__VA_ARGS__)
5576
#define vluxseg3ei32_v_i16m1(...) __riscv_vluxseg3ei32_v_i16m1(__VA_ARGS__)
5577
#define vluxseg4ei32_v_i16m1(...) __riscv_vluxseg4ei32_v_i16m1(__VA_ARGS__)
5578
#define vluxseg5ei32_v_i16m1(...) __riscv_vluxseg5ei32_v_i16m1(__VA_ARGS__)
5579
#define vluxseg6ei32_v_i16m1(...) __riscv_vluxseg6ei32_v_i16m1(__VA_ARGS__)
5580
#define vluxseg7ei32_v_i16m1(...) __riscv_vluxseg7ei32_v_i16m1(__VA_ARGS__)
5581
#define vluxseg8ei32_v_i16m1(...) __riscv_vluxseg8ei32_v_i16m1(__VA_ARGS__)
5582
#define vluxseg2ei32_v_i16m2(...) __riscv_vluxseg2ei32_v_i16m2(__VA_ARGS__)
5583
#define vluxseg3ei32_v_i16m2(...) __riscv_vluxseg3ei32_v_i16m2(__VA_ARGS__)
5584
#define vluxseg4ei32_v_i16m2(...) __riscv_vluxseg4ei32_v_i16m2(__VA_ARGS__)
5585
#define vluxseg2ei32_v_i16m4(...) __riscv_vluxseg2ei32_v_i16m4(__VA_ARGS__)
5586
#define vluxseg2ei64_v_i16mf4(...) __riscv_vluxseg2ei64_v_i16mf4(__VA_ARGS__)
5587
#define vluxseg3ei64_v_i16mf4(...) __riscv_vluxseg3ei64_v_i16mf4(__VA_ARGS__)
5588
#define vluxseg4ei64_v_i16mf4(...) __riscv_vluxseg4ei64_v_i16mf4(__VA_ARGS__)
5589
#define vluxseg5ei64_v_i16mf4(...) __riscv_vluxseg5ei64_v_i16mf4(__VA_ARGS__)
5590
#define vluxseg6ei64_v_i16mf4(...) __riscv_vluxseg6ei64_v_i16mf4(__VA_ARGS__)
5591
#define vluxseg7ei64_v_i16mf4(...) __riscv_vluxseg7ei64_v_i16mf4(__VA_ARGS__)
5592
#define vluxseg8ei64_v_i16mf4(...) __riscv_vluxseg8ei64_v_i16mf4(__VA_ARGS__)
5593
#define vluxseg2ei64_v_i16mf2(...) __riscv_vluxseg2ei64_v_i16mf2(__VA_ARGS__)
5594
#define vluxseg3ei64_v_i16mf2(...) __riscv_vluxseg3ei64_v_i16mf2(__VA_ARGS__)
5595
#define vluxseg4ei64_v_i16mf2(...) __riscv_vluxseg4ei64_v_i16mf2(__VA_ARGS__)
5596
#define vluxseg5ei64_v_i16mf2(...) __riscv_vluxseg5ei64_v_i16mf2(__VA_ARGS__)
5597
#define vluxseg6ei64_v_i16mf2(...) __riscv_vluxseg6ei64_v_i16mf2(__VA_ARGS__)
5598
#define vluxseg7ei64_v_i16mf2(...) __riscv_vluxseg7ei64_v_i16mf2(__VA_ARGS__)
5599
#define vluxseg8ei64_v_i16mf2(...) __riscv_vluxseg8ei64_v_i16mf2(__VA_ARGS__)
5600
#define vluxseg2ei64_v_i16m1(...) __riscv_vluxseg2ei64_v_i16m1(__VA_ARGS__)
5601
#define vluxseg3ei64_v_i16m1(...) __riscv_vluxseg3ei64_v_i16m1(__VA_ARGS__)
5602
#define vluxseg4ei64_v_i16m1(...) __riscv_vluxseg4ei64_v_i16m1(__VA_ARGS__)
5603
#define vluxseg5ei64_v_i16m1(...) __riscv_vluxseg5ei64_v_i16m1(__VA_ARGS__)
5604
#define vluxseg6ei64_v_i16m1(...) __riscv_vluxseg6ei64_v_i16m1(__VA_ARGS__)
5605
#define vluxseg7ei64_v_i16m1(...) __riscv_vluxseg7ei64_v_i16m1(__VA_ARGS__)
5606
#define vluxseg8ei64_v_i16m1(...) __riscv_vluxseg8ei64_v_i16m1(__VA_ARGS__)
5607
#define vluxseg2ei64_v_i16m2(...) __riscv_vluxseg2ei64_v_i16m2(__VA_ARGS__)
5608
#define vluxseg3ei64_v_i16m2(...) __riscv_vluxseg3ei64_v_i16m2(__VA_ARGS__)
5609
#define vluxseg4ei64_v_i16m2(...) __riscv_vluxseg4ei64_v_i16m2(__VA_ARGS__)
5610
#define vluxseg2ei8_v_i32mf2(...) __riscv_vluxseg2ei8_v_i32mf2(__VA_ARGS__)
5611
#define vluxseg3ei8_v_i32mf2(...) __riscv_vluxseg3ei8_v_i32mf2(__VA_ARGS__)
5612
#define vluxseg4ei8_v_i32mf2(...) __riscv_vluxseg4ei8_v_i32mf2(__VA_ARGS__)
5613
#define vluxseg5ei8_v_i32mf2(...) __riscv_vluxseg5ei8_v_i32mf2(__VA_ARGS__)
5614
#define vluxseg6ei8_v_i32mf2(...) __riscv_vluxseg6ei8_v_i32mf2(__VA_ARGS__)
5615
#define vluxseg7ei8_v_i32mf2(...) __riscv_vluxseg7ei8_v_i32mf2(__VA_ARGS__)
5616
#define vluxseg8ei8_v_i32mf2(...) __riscv_vluxseg8ei8_v_i32mf2(__VA_ARGS__)
5617
#define vluxseg2ei8_v_i32m1(...) __riscv_vluxseg2ei8_v_i32m1(__VA_ARGS__)
5618
#define vluxseg3ei8_v_i32m1(...) __riscv_vluxseg3ei8_v_i32m1(__VA_ARGS__)
5619
#define vluxseg4ei8_v_i32m1(...) __riscv_vluxseg4ei8_v_i32m1(__VA_ARGS__)
5620
#define vluxseg5ei8_v_i32m1(...) __riscv_vluxseg5ei8_v_i32m1(__VA_ARGS__)
5621
#define vluxseg6ei8_v_i32m1(...) __riscv_vluxseg6ei8_v_i32m1(__VA_ARGS__)
5622
#define vluxseg7ei8_v_i32m1(...) __riscv_vluxseg7ei8_v_i32m1(__VA_ARGS__)
5623
#define vluxseg8ei8_v_i32m1(...) __riscv_vluxseg8ei8_v_i32m1(__VA_ARGS__)
5624
#define vluxseg2ei8_v_i32m2(...) __riscv_vluxseg2ei8_v_i32m2(__VA_ARGS__)
5625
#define vluxseg3ei8_v_i32m2(...) __riscv_vluxseg3ei8_v_i32m2(__VA_ARGS__)
5626
#define vluxseg4ei8_v_i32m2(...) __riscv_vluxseg4ei8_v_i32m2(__VA_ARGS__)
5627
#define vluxseg2ei8_v_i32m4(...) __riscv_vluxseg2ei8_v_i32m4(__VA_ARGS__)
5628
#define vluxseg2ei16_v_i32mf2(...) __riscv_vluxseg2ei16_v_i32mf2(__VA_ARGS__)
5629
#define vluxseg3ei16_v_i32mf2(...) __riscv_vluxseg3ei16_v_i32mf2(__VA_ARGS__)
5630
#define vluxseg4ei16_v_i32mf2(...) __riscv_vluxseg4ei16_v_i32mf2(__VA_ARGS__)
5631
#define vluxseg5ei16_v_i32mf2(...) __riscv_vluxseg5ei16_v_i32mf2(__VA_ARGS__)
5632
#define vluxseg6ei16_v_i32mf2(...) __riscv_vluxseg6ei16_v_i32mf2(__VA_ARGS__)
5633
#define vluxseg7ei16_v_i32mf2(...) __riscv_vluxseg7ei16_v_i32mf2(__VA_ARGS__)
5634
#define vluxseg8ei16_v_i32mf2(...) __riscv_vluxseg8ei16_v_i32mf2(__VA_ARGS__)
5635
#define vluxseg2ei16_v_i32m1(...) __riscv_vluxseg2ei16_v_i32m1(__VA_ARGS__)
5636
#define vluxseg3ei16_v_i32m1(...) __riscv_vluxseg3ei16_v_i32m1(__VA_ARGS__)
5637
#define vluxseg4ei16_v_i32m1(...) __riscv_vluxseg4ei16_v_i32m1(__VA_ARGS__)
5638
#define vluxseg5ei16_v_i32m1(...) __riscv_vluxseg5ei16_v_i32m1(__VA_ARGS__)
5639
#define vluxseg6ei16_v_i32m1(...) __riscv_vluxseg6ei16_v_i32m1(__VA_ARGS__)
5640
#define vluxseg7ei16_v_i32m1(...) __riscv_vluxseg7ei16_v_i32m1(__VA_ARGS__)
5641
#define vluxseg8ei16_v_i32m1(...) __riscv_vluxseg8ei16_v_i32m1(__VA_ARGS__)
5642
#define vluxseg2ei16_v_i32m2(...) __riscv_vluxseg2ei16_v_i32m2(__VA_ARGS__)
5643
#define vluxseg3ei16_v_i32m2(...) __riscv_vluxseg3ei16_v_i32m2(__VA_ARGS__)
5644
#define vluxseg4ei16_v_i32m2(...) __riscv_vluxseg4ei16_v_i32m2(__VA_ARGS__)
5645
#define vluxseg2ei16_v_i32m4(...) __riscv_vluxseg2ei16_v_i32m4(__VA_ARGS__)
5646
#define vluxseg2ei32_v_i32mf2(...) __riscv_vluxseg2ei32_v_i32mf2(__VA_ARGS__)
5647
#define vluxseg3ei32_v_i32mf2(...) __riscv_vluxseg3ei32_v_i32mf2(__VA_ARGS__)
5648
#define vluxseg4ei32_v_i32mf2(...) __riscv_vluxseg4ei32_v_i32mf2(__VA_ARGS__)
5649
#define vluxseg5ei32_v_i32mf2(...) __riscv_vluxseg5ei32_v_i32mf2(__VA_ARGS__)
5650
#define vluxseg6ei32_v_i32mf2(...) __riscv_vluxseg6ei32_v_i32mf2(__VA_ARGS__)
5651
#define vluxseg7ei32_v_i32mf2(...) __riscv_vluxseg7ei32_v_i32mf2(__VA_ARGS__)
5652
#define vluxseg8ei32_v_i32mf2(...) __riscv_vluxseg8ei32_v_i32mf2(__VA_ARGS__)
5653
#define vluxseg2ei32_v_i32m1(...) __riscv_vluxseg2ei32_v_i32m1(__VA_ARGS__)
5654
#define vluxseg3ei32_v_i32m1(...) __riscv_vluxseg3ei32_v_i32m1(__VA_ARGS__)
5655
#define vluxseg4ei32_v_i32m1(...) __riscv_vluxseg4ei32_v_i32m1(__VA_ARGS__)
5656
#define vluxseg5ei32_v_i32m1(...) __riscv_vluxseg5ei32_v_i32m1(__VA_ARGS__)
5657
#define vluxseg6ei32_v_i32m1(...) __riscv_vluxseg6ei32_v_i32m1(__VA_ARGS__)
5658
#define vluxseg7ei32_v_i32m1(...) __riscv_vluxseg7ei32_v_i32m1(__VA_ARGS__)
5659
#define vluxseg8ei32_v_i32m1(...) __riscv_vluxseg8ei32_v_i32m1(__VA_ARGS__)
5660
#define vluxseg2ei32_v_i32m2(...) __riscv_vluxseg2ei32_v_i32m2(__VA_ARGS__)
5661
#define vluxseg3ei32_v_i32m2(...) __riscv_vluxseg3ei32_v_i32m2(__VA_ARGS__)
5662
#define vluxseg4ei32_v_i32m2(...) __riscv_vluxseg4ei32_v_i32m2(__VA_ARGS__)
5663
#define vluxseg2ei32_v_i32m4(...) __riscv_vluxseg2ei32_v_i32m4(__VA_ARGS__)
5664
#define vluxseg2ei64_v_i32mf2(...) __riscv_vluxseg2ei64_v_i32mf2(__VA_ARGS__)
5665
#define vluxseg3ei64_v_i32mf2(...) __riscv_vluxseg3ei64_v_i32mf2(__VA_ARGS__)
5666
#define vluxseg4ei64_v_i32mf2(...) __riscv_vluxseg4ei64_v_i32mf2(__VA_ARGS__)
5667
#define vluxseg5ei64_v_i32mf2(...) __riscv_vluxseg5ei64_v_i32mf2(__VA_ARGS__)
5668
#define vluxseg6ei64_v_i32mf2(...) __riscv_vluxseg6ei64_v_i32mf2(__VA_ARGS__)
5669
#define vluxseg7ei64_v_i32mf2(...) __riscv_vluxseg7ei64_v_i32mf2(__VA_ARGS__)
5670
#define vluxseg8ei64_v_i32mf2(...) __riscv_vluxseg8ei64_v_i32mf2(__VA_ARGS__)
5671
#define vluxseg2ei64_v_i32m1(...) __riscv_vluxseg2ei64_v_i32m1(__VA_ARGS__)
5672
#define vluxseg3ei64_v_i32m1(...) __riscv_vluxseg3ei64_v_i32m1(__VA_ARGS__)
5673
#define vluxseg4ei64_v_i32m1(...) __riscv_vluxseg4ei64_v_i32m1(__VA_ARGS__)
5674
#define vluxseg5ei64_v_i32m1(...) __riscv_vluxseg5ei64_v_i32m1(__VA_ARGS__)
5675
#define vluxseg6ei64_v_i32m1(...) __riscv_vluxseg6ei64_v_i32m1(__VA_ARGS__)
5676
#define vluxseg7ei64_v_i32m1(...) __riscv_vluxseg7ei64_v_i32m1(__VA_ARGS__)
5677
#define vluxseg8ei64_v_i32m1(...) __riscv_vluxseg8ei64_v_i32m1(__VA_ARGS__)
5678
#define vluxseg2ei64_v_i32m2(...) __riscv_vluxseg2ei64_v_i32m2(__VA_ARGS__)
5679
#define vluxseg3ei64_v_i32m2(...) __riscv_vluxseg3ei64_v_i32m2(__VA_ARGS__)
5680
#define vluxseg4ei64_v_i32m2(...) __riscv_vluxseg4ei64_v_i32m2(__VA_ARGS__)
5681
#define vluxseg2ei64_v_i32m4(...) __riscv_vluxseg2ei64_v_i32m4(__VA_ARGS__)
5682
#define vluxseg2ei8_v_i64m1(...) __riscv_vluxseg2ei8_v_i64m1(__VA_ARGS__)
5683
#define vluxseg3ei8_v_i64m1(...) __riscv_vluxseg3ei8_v_i64m1(__VA_ARGS__)
5684
#define vluxseg4ei8_v_i64m1(...) __riscv_vluxseg4ei8_v_i64m1(__VA_ARGS__)
5685
#define vluxseg5ei8_v_i64m1(...) __riscv_vluxseg5ei8_v_i64m1(__VA_ARGS__)
5686
#define vluxseg6ei8_v_i64m1(...) __riscv_vluxseg6ei8_v_i64m1(__VA_ARGS__)
5687
#define vluxseg7ei8_v_i64m1(...) __riscv_vluxseg7ei8_v_i64m1(__VA_ARGS__)
5688
#define vluxseg8ei8_v_i64m1(...) __riscv_vluxseg8ei8_v_i64m1(__VA_ARGS__)
5689
#define vluxseg2ei8_v_i64m2(...) __riscv_vluxseg2ei8_v_i64m2(__VA_ARGS__)
5690
#define vluxseg3ei8_v_i64m2(...) __riscv_vluxseg3ei8_v_i64m2(__VA_ARGS__)
5691
#define vluxseg4ei8_v_i64m2(...) __riscv_vluxseg4ei8_v_i64m2(__VA_ARGS__)
5692
#define vluxseg2ei8_v_i64m4(...) __riscv_vluxseg2ei8_v_i64m4(__VA_ARGS__)
5693
#define vluxseg2ei16_v_i64m1(...) __riscv_vluxseg2ei16_v_i64m1(__VA_ARGS__)
5694
#define vluxseg3ei16_v_i64m1(...) __riscv_vluxseg3ei16_v_i64m1(__VA_ARGS__)
5695
#define vluxseg4ei16_v_i64m1(...) __riscv_vluxseg4ei16_v_i64m1(__VA_ARGS__)
5696
#define vluxseg5ei16_v_i64m1(...) __riscv_vluxseg5ei16_v_i64m1(__VA_ARGS__)
5697
#define vluxseg6ei16_v_i64m1(...) __riscv_vluxseg6ei16_v_i64m1(__VA_ARGS__)
5698
#define vluxseg7ei16_v_i64m1(...) __riscv_vluxseg7ei16_v_i64m1(__VA_ARGS__)
5699
#define vluxseg8ei16_v_i64m1(...) __riscv_vluxseg8ei16_v_i64m1(__VA_ARGS__)
5700
#define vluxseg2ei16_v_i64m2(...) __riscv_vluxseg2ei16_v_i64m2(__VA_ARGS__)
5701
#define vluxseg3ei16_v_i64m2(...) __riscv_vluxseg3ei16_v_i64m2(__VA_ARGS__)
5702
#define vluxseg4ei16_v_i64m2(...) __riscv_vluxseg4ei16_v_i64m2(__VA_ARGS__)
5703
#define vluxseg2ei16_v_i64m4(...) __riscv_vluxseg2ei16_v_i64m4(__VA_ARGS__)
5704
#define vluxseg2ei32_v_i64m1(...) __riscv_vluxseg2ei32_v_i64m1(__VA_ARGS__)
5705
#define vluxseg3ei32_v_i64m1(...) __riscv_vluxseg3ei32_v_i64m1(__VA_ARGS__)
5706
#define vluxseg4ei32_v_i64m1(...) __riscv_vluxseg4ei32_v_i64m1(__VA_ARGS__)
5707
#define vluxseg5ei32_v_i64m1(...) __riscv_vluxseg5ei32_v_i64m1(__VA_ARGS__)
5708
#define vluxseg6ei32_v_i64m1(...) __riscv_vluxseg6ei32_v_i64m1(__VA_ARGS__)
5709
#define vluxseg7ei32_v_i64m1(...) __riscv_vluxseg7ei32_v_i64m1(__VA_ARGS__)
5710
#define vluxseg8ei32_v_i64m1(...) __riscv_vluxseg8ei32_v_i64m1(__VA_ARGS__)
5711
#define vluxseg2ei32_v_i64m2(...) __riscv_vluxseg2ei32_v_i64m2(__VA_ARGS__)
5712
#define vluxseg3ei32_v_i64m2(...) __riscv_vluxseg3ei32_v_i64m2(__VA_ARGS__)
5713
#define vluxseg4ei32_v_i64m2(...) __riscv_vluxseg4ei32_v_i64m2(__VA_ARGS__)
5714
#define vluxseg2ei32_v_i64m4(...) __riscv_vluxseg2ei32_v_i64m4(__VA_ARGS__)
5715
#define vluxseg2ei64_v_i64m1(...) __riscv_vluxseg2ei64_v_i64m1(__VA_ARGS__)
5716
#define vluxseg3ei64_v_i64m1(...) __riscv_vluxseg3ei64_v_i64m1(__VA_ARGS__)
5717
#define vluxseg4ei64_v_i64m1(...) __riscv_vluxseg4ei64_v_i64m1(__VA_ARGS__)
5718
#define vluxseg5ei64_v_i64m1(...) __riscv_vluxseg5ei64_v_i64m1(__VA_ARGS__)
5719
#define vluxseg6ei64_v_i64m1(...) __riscv_vluxseg6ei64_v_i64m1(__VA_ARGS__)
5720
#define vluxseg7ei64_v_i64m1(...) __riscv_vluxseg7ei64_v_i64m1(__VA_ARGS__)
5721
#define vluxseg8ei64_v_i64m1(...) __riscv_vluxseg8ei64_v_i64m1(__VA_ARGS__)
5722
#define vluxseg2ei64_v_i64m2(...) __riscv_vluxseg2ei64_v_i64m2(__VA_ARGS__)
5723
#define vluxseg3ei64_v_i64m2(...) __riscv_vluxseg3ei64_v_i64m2(__VA_ARGS__)
5724
#define vluxseg4ei64_v_i64m2(...) __riscv_vluxseg4ei64_v_i64m2(__VA_ARGS__)
5725
#define vluxseg2ei64_v_i64m4(...) __riscv_vluxseg2ei64_v_i64m4(__VA_ARGS__)
5726
#define vloxseg2ei8_v_u8mf8(...) __riscv_vloxseg2ei8_v_u8mf8(__VA_ARGS__)
5727
#define vloxseg3ei8_v_u8mf8(...) __riscv_vloxseg3ei8_v_u8mf8(__VA_ARGS__)
5728
#define vloxseg4ei8_v_u8mf8(...) __riscv_vloxseg4ei8_v_u8mf8(__VA_ARGS__)
5729
#define vloxseg5ei8_v_u8mf8(...) __riscv_vloxseg5ei8_v_u8mf8(__VA_ARGS__)
5730
#define vloxseg6ei8_v_u8mf8(...) __riscv_vloxseg6ei8_v_u8mf8(__VA_ARGS__)
5731
#define vloxseg7ei8_v_u8mf8(...) __riscv_vloxseg7ei8_v_u8mf8(__VA_ARGS__)
5732
#define vloxseg8ei8_v_u8mf8(...) __riscv_vloxseg8ei8_v_u8mf8(__VA_ARGS__)
5733
#define vloxseg2ei8_v_u8mf4(...) __riscv_vloxseg2ei8_v_u8mf4(__VA_ARGS__)
5734
#define vloxseg3ei8_v_u8mf4(...) __riscv_vloxseg3ei8_v_u8mf4(__VA_ARGS__)
5735
#define vloxseg4ei8_v_u8mf4(...) __riscv_vloxseg4ei8_v_u8mf4(__VA_ARGS__)
5736
#define vloxseg5ei8_v_u8mf4(...) __riscv_vloxseg5ei8_v_u8mf4(__VA_ARGS__)
5737
#define vloxseg6ei8_v_u8mf4(...) __riscv_vloxseg6ei8_v_u8mf4(__VA_ARGS__)
5738
#define vloxseg7ei8_v_u8mf4(...) __riscv_vloxseg7ei8_v_u8mf4(__VA_ARGS__)
5739
#define vloxseg8ei8_v_u8mf4(...) __riscv_vloxseg8ei8_v_u8mf4(__VA_ARGS__)
5740
#define vloxseg2ei8_v_u8mf2(...) __riscv_vloxseg2ei8_v_u8mf2(__VA_ARGS__)
5741
#define vloxseg3ei8_v_u8mf2(...) __riscv_vloxseg3ei8_v_u8mf2(__VA_ARGS__)
5742
#define vloxseg4ei8_v_u8mf2(...) __riscv_vloxseg4ei8_v_u8mf2(__VA_ARGS__)
5743
#define vloxseg5ei8_v_u8mf2(...) __riscv_vloxseg5ei8_v_u8mf2(__VA_ARGS__)
5744
#define vloxseg6ei8_v_u8mf2(...) __riscv_vloxseg6ei8_v_u8mf2(__VA_ARGS__)
5745
#define vloxseg7ei8_v_u8mf2(...) __riscv_vloxseg7ei8_v_u8mf2(__VA_ARGS__)
5746
#define vloxseg8ei8_v_u8mf2(...) __riscv_vloxseg8ei8_v_u8mf2(__VA_ARGS__)
5747
#define vloxseg2ei8_v_u8m1(...) __riscv_vloxseg2ei8_v_u8m1(__VA_ARGS__)
5748
#define vloxseg3ei8_v_u8m1(...) __riscv_vloxseg3ei8_v_u8m1(__VA_ARGS__)
5749
#define vloxseg4ei8_v_u8m1(...) __riscv_vloxseg4ei8_v_u8m1(__VA_ARGS__)
5750
#define vloxseg5ei8_v_u8m1(...) __riscv_vloxseg5ei8_v_u8m1(__VA_ARGS__)
5751
#define vloxseg6ei8_v_u8m1(...) __riscv_vloxseg6ei8_v_u8m1(__VA_ARGS__)
5752
#define vloxseg7ei8_v_u8m1(...) __riscv_vloxseg7ei8_v_u8m1(__VA_ARGS__)
5753
#define vloxseg8ei8_v_u8m1(...) __riscv_vloxseg8ei8_v_u8m1(__VA_ARGS__)
5754
#define vloxseg2ei8_v_u8m2(...) __riscv_vloxseg2ei8_v_u8m2(__VA_ARGS__)
5755
#define vloxseg3ei8_v_u8m2(...) __riscv_vloxseg3ei8_v_u8m2(__VA_ARGS__)
5756
#define vloxseg4ei8_v_u8m2(...) __riscv_vloxseg4ei8_v_u8m2(__VA_ARGS__)
5757
#define vloxseg2ei8_v_u8m4(...) __riscv_vloxseg2ei8_v_u8m4(__VA_ARGS__)
5758
#define vloxseg2ei16_v_u8mf8(...) __riscv_vloxseg2ei16_v_u8mf8(__VA_ARGS__)
5759
#define vloxseg3ei16_v_u8mf8(...) __riscv_vloxseg3ei16_v_u8mf8(__VA_ARGS__)
5760
#define vloxseg4ei16_v_u8mf8(...) __riscv_vloxseg4ei16_v_u8mf8(__VA_ARGS__)
5761
#define vloxseg5ei16_v_u8mf8(...) __riscv_vloxseg5ei16_v_u8mf8(__VA_ARGS__)
5762
#define vloxseg6ei16_v_u8mf8(...) __riscv_vloxseg6ei16_v_u8mf8(__VA_ARGS__)
5763
#define vloxseg7ei16_v_u8mf8(...) __riscv_vloxseg7ei16_v_u8mf8(__VA_ARGS__)
5764
#define vloxseg8ei16_v_u8mf8(...) __riscv_vloxseg8ei16_v_u8mf8(__VA_ARGS__)
5765
#define vloxseg2ei16_v_u8mf4(...) __riscv_vloxseg2ei16_v_u8mf4(__VA_ARGS__)
5766
#define vloxseg3ei16_v_u8mf4(...) __riscv_vloxseg3ei16_v_u8mf4(__VA_ARGS__)
5767
#define vloxseg4ei16_v_u8mf4(...) __riscv_vloxseg4ei16_v_u8mf4(__VA_ARGS__)
5768
#define vloxseg5ei16_v_u8mf4(...) __riscv_vloxseg5ei16_v_u8mf4(__VA_ARGS__)
5769
#define vloxseg6ei16_v_u8mf4(...) __riscv_vloxseg6ei16_v_u8mf4(__VA_ARGS__)
5770
#define vloxseg7ei16_v_u8mf4(...) __riscv_vloxseg7ei16_v_u8mf4(__VA_ARGS__)
5771
#define vloxseg8ei16_v_u8mf4(...) __riscv_vloxseg8ei16_v_u8mf4(__VA_ARGS__)
5772
#define vloxseg2ei16_v_u8mf2(...) __riscv_vloxseg2ei16_v_u8mf2(__VA_ARGS__)
5773
#define vloxseg3ei16_v_u8mf2(...) __riscv_vloxseg3ei16_v_u8mf2(__VA_ARGS__)
5774
#define vloxseg4ei16_v_u8mf2(...) __riscv_vloxseg4ei16_v_u8mf2(__VA_ARGS__)
5775
#define vloxseg5ei16_v_u8mf2(...) __riscv_vloxseg5ei16_v_u8mf2(__VA_ARGS__)
5776
#define vloxseg6ei16_v_u8mf2(...) __riscv_vloxseg6ei16_v_u8mf2(__VA_ARGS__)
5777
#define vloxseg7ei16_v_u8mf2(...) __riscv_vloxseg7ei16_v_u8mf2(__VA_ARGS__)
5778
#define vloxseg8ei16_v_u8mf2(...) __riscv_vloxseg8ei16_v_u8mf2(__VA_ARGS__)
5779
#define vloxseg2ei16_v_u8m1(...) __riscv_vloxseg2ei16_v_u8m1(__VA_ARGS__)
5780
#define vloxseg3ei16_v_u8m1(...) __riscv_vloxseg3ei16_v_u8m1(__VA_ARGS__)
5781
#define vloxseg4ei16_v_u8m1(...) __riscv_vloxseg4ei16_v_u8m1(__VA_ARGS__)
5782
#define vloxseg5ei16_v_u8m1(...) __riscv_vloxseg5ei16_v_u8m1(__VA_ARGS__)
5783
#define vloxseg6ei16_v_u8m1(...) __riscv_vloxseg6ei16_v_u8m1(__VA_ARGS__)
5784
#define vloxseg7ei16_v_u8m1(...) __riscv_vloxseg7ei16_v_u8m1(__VA_ARGS__)
5785
#define vloxseg8ei16_v_u8m1(...) __riscv_vloxseg8ei16_v_u8m1(__VA_ARGS__)
5786
#define vloxseg2ei16_v_u8m2(...) __riscv_vloxseg2ei16_v_u8m2(__VA_ARGS__)
5787
#define vloxseg3ei16_v_u8m2(...) __riscv_vloxseg3ei16_v_u8m2(__VA_ARGS__)
5788
#define vloxseg4ei16_v_u8m2(...) __riscv_vloxseg4ei16_v_u8m2(__VA_ARGS__)
5789
#define vloxseg2ei16_v_u8m4(...) __riscv_vloxseg2ei16_v_u8m4(__VA_ARGS__)
5790
#define vloxseg2ei32_v_u8mf8(...) __riscv_vloxseg2ei32_v_u8mf8(__VA_ARGS__)
5791
#define vloxseg3ei32_v_u8mf8(...) __riscv_vloxseg3ei32_v_u8mf8(__VA_ARGS__)
5792
#define vloxseg4ei32_v_u8mf8(...) __riscv_vloxseg4ei32_v_u8mf8(__VA_ARGS__)
5793
#define vloxseg5ei32_v_u8mf8(...) __riscv_vloxseg5ei32_v_u8mf8(__VA_ARGS__)
5794
#define vloxseg6ei32_v_u8mf8(...) __riscv_vloxseg6ei32_v_u8mf8(__VA_ARGS__)
5795
#define vloxseg7ei32_v_u8mf8(...) __riscv_vloxseg7ei32_v_u8mf8(__VA_ARGS__)
5796
#define vloxseg8ei32_v_u8mf8(...) __riscv_vloxseg8ei32_v_u8mf8(__VA_ARGS__)
5797
#define vloxseg2ei32_v_u8mf4(...) __riscv_vloxseg2ei32_v_u8mf4(__VA_ARGS__)
5798
#define vloxseg3ei32_v_u8mf4(...) __riscv_vloxseg3ei32_v_u8mf4(__VA_ARGS__)
5799
#define vloxseg4ei32_v_u8mf4(...) __riscv_vloxseg4ei32_v_u8mf4(__VA_ARGS__)
5800
#define vloxseg5ei32_v_u8mf4(...) __riscv_vloxseg5ei32_v_u8mf4(__VA_ARGS__)
5801
#define vloxseg6ei32_v_u8mf4(...) __riscv_vloxseg6ei32_v_u8mf4(__VA_ARGS__)
5802
#define vloxseg7ei32_v_u8mf4(...) __riscv_vloxseg7ei32_v_u8mf4(__VA_ARGS__)
5803
#define vloxseg8ei32_v_u8mf4(...) __riscv_vloxseg8ei32_v_u8mf4(__VA_ARGS__)
5804
#define vloxseg2ei32_v_u8mf2(...) __riscv_vloxseg2ei32_v_u8mf2(__VA_ARGS__)
5805
#define vloxseg3ei32_v_u8mf2(...) __riscv_vloxseg3ei32_v_u8mf2(__VA_ARGS__)
5806
#define vloxseg4ei32_v_u8mf2(...) __riscv_vloxseg4ei32_v_u8mf2(__VA_ARGS__)
5807
#define vloxseg5ei32_v_u8mf2(...) __riscv_vloxseg5ei32_v_u8mf2(__VA_ARGS__)
5808
#define vloxseg6ei32_v_u8mf2(...) __riscv_vloxseg6ei32_v_u8mf2(__VA_ARGS__)
5809
#define vloxseg7ei32_v_u8mf2(...) __riscv_vloxseg7ei32_v_u8mf2(__VA_ARGS__)
5810
#define vloxseg8ei32_v_u8mf2(...) __riscv_vloxseg8ei32_v_u8mf2(__VA_ARGS__)
5811
#define vloxseg2ei32_v_u8m1(...) __riscv_vloxseg2ei32_v_u8m1(__VA_ARGS__)
5812
#define vloxseg3ei32_v_u8m1(...) __riscv_vloxseg3ei32_v_u8m1(__VA_ARGS__)
5813
#define vloxseg4ei32_v_u8m1(...) __riscv_vloxseg4ei32_v_u8m1(__VA_ARGS__)
5814
#define vloxseg5ei32_v_u8m1(...) __riscv_vloxseg5ei32_v_u8m1(__VA_ARGS__)
5815
#define vloxseg6ei32_v_u8m1(...) __riscv_vloxseg6ei32_v_u8m1(__VA_ARGS__)
5816
#define vloxseg7ei32_v_u8m1(...) __riscv_vloxseg7ei32_v_u8m1(__VA_ARGS__)
5817
#define vloxseg8ei32_v_u8m1(...) __riscv_vloxseg8ei32_v_u8m1(__VA_ARGS__)
5818
#define vloxseg2ei32_v_u8m2(...) __riscv_vloxseg2ei32_v_u8m2(__VA_ARGS__)
5819
#define vloxseg3ei32_v_u8m2(...) __riscv_vloxseg3ei32_v_u8m2(__VA_ARGS__)
5820
#define vloxseg4ei32_v_u8m2(...) __riscv_vloxseg4ei32_v_u8m2(__VA_ARGS__)
5821
#define vloxseg2ei64_v_u8mf8(...) __riscv_vloxseg2ei64_v_u8mf8(__VA_ARGS__)
5822
#define vloxseg3ei64_v_u8mf8(...) __riscv_vloxseg3ei64_v_u8mf8(__VA_ARGS__)
5823
#define vloxseg4ei64_v_u8mf8(...) __riscv_vloxseg4ei64_v_u8mf8(__VA_ARGS__)
5824
#define vloxseg5ei64_v_u8mf8(...) __riscv_vloxseg5ei64_v_u8mf8(__VA_ARGS__)
5825
#define vloxseg6ei64_v_u8mf8(...) __riscv_vloxseg6ei64_v_u8mf8(__VA_ARGS__)
5826
#define vloxseg7ei64_v_u8mf8(...) __riscv_vloxseg7ei64_v_u8mf8(__VA_ARGS__)
5827
#define vloxseg8ei64_v_u8mf8(...) __riscv_vloxseg8ei64_v_u8mf8(__VA_ARGS__)
5828
#define vloxseg2ei64_v_u8mf4(...) __riscv_vloxseg2ei64_v_u8mf4(__VA_ARGS__)
5829
#define vloxseg3ei64_v_u8mf4(...) __riscv_vloxseg3ei64_v_u8mf4(__VA_ARGS__)
5830
#define vloxseg4ei64_v_u8mf4(...) __riscv_vloxseg4ei64_v_u8mf4(__VA_ARGS__)
5831
#define vloxseg5ei64_v_u8mf4(...) __riscv_vloxseg5ei64_v_u8mf4(__VA_ARGS__)
5832
#define vloxseg6ei64_v_u8mf4(...) __riscv_vloxseg6ei64_v_u8mf4(__VA_ARGS__)
5833
#define vloxseg7ei64_v_u8mf4(...) __riscv_vloxseg7ei64_v_u8mf4(__VA_ARGS__)
5834
#define vloxseg8ei64_v_u8mf4(...) __riscv_vloxseg8ei64_v_u8mf4(__VA_ARGS__)
5835
#define vloxseg2ei64_v_u8mf2(...) __riscv_vloxseg2ei64_v_u8mf2(__VA_ARGS__)
5836
#define vloxseg3ei64_v_u8mf2(...) __riscv_vloxseg3ei64_v_u8mf2(__VA_ARGS__)
5837
#define vloxseg4ei64_v_u8mf2(...) __riscv_vloxseg4ei64_v_u8mf2(__VA_ARGS__)
5838
#define vloxseg5ei64_v_u8mf2(...) __riscv_vloxseg5ei64_v_u8mf2(__VA_ARGS__)
5839
#define vloxseg6ei64_v_u8mf2(...) __riscv_vloxseg6ei64_v_u8mf2(__VA_ARGS__)
5840
#define vloxseg7ei64_v_u8mf2(...) __riscv_vloxseg7ei64_v_u8mf2(__VA_ARGS__)
5841
#define vloxseg8ei64_v_u8mf2(...) __riscv_vloxseg8ei64_v_u8mf2(__VA_ARGS__)
5842
#define vloxseg2ei64_v_u8m1(...) __riscv_vloxseg2ei64_v_u8m1(__VA_ARGS__)
5843
#define vloxseg3ei64_v_u8m1(...) __riscv_vloxseg3ei64_v_u8m1(__VA_ARGS__)
5844
#define vloxseg4ei64_v_u8m1(...) __riscv_vloxseg4ei64_v_u8m1(__VA_ARGS__)
5845
#define vloxseg5ei64_v_u8m1(...) __riscv_vloxseg5ei64_v_u8m1(__VA_ARGS__)
5846
#define vloxseg6ei64_v_u8m1(...) __riscv_vloxseg6ei64_v_u8m1(__VA_ARGS__)
5847
#define vloxseg7ei64_v_u8m1(...) __riscv_vloxseg7ei64_v_u8m1(__VA_ARGS__)
5848
#define vloxseg8ei64_v_u8m1(...) __riscv_vloxseg8ei64_v_u8m1(__VA_ARGS__)
5849
#define vloxseg2ei8_v_u16mf4(...) __riscv_vloxseg2ei8_v_u16mf4(__VA_ARGS__)
5850
#define vloxseg3ei8_v_u16mf4(...) __riscv_vloxseg3ei8_v_u16mf4(__VA_ARGS__)
5851
#define vloxseg4ei8_v_u16mf4(...) __riscv_vloxseg4ei8_v_u16mf4(__VA_ARGS__)
5852
#define vloxseg5ei8_v_u16mf4(...) __riscv_vloxseg5ei8_v_u16mf4(__VA_ARGS__)
5853
#define vloxseg6ei8_v_u16mf4(...) __riscv_vloxseg6ei8_v_u16mf4(__VA_ARGS__)
5854
#define vloxseg7ei8_v_u16mf4(...) __riscv_vloxseg7ei8_v_u16mf4(__VA_ARGS__)
5855
#define vloxseg8ei8_v_u16mf4(...) __riscv_vloxseg8ei8_v_u16mf4(__VA_ARGS__)
5856
#define vloxseg2ei8_v_u16mf2(...) __riscv_vloxseg2ei8_v_u16mf2(__VA_ARGS__)
5857
#define vloxseg3ei8_v_u16mf2(...) __riscv_vloxseg3ei8_v_u16mf2(__VA_ARGS__)
5858
#define vloxseg4ei8_v_u16mf2(...) __riscv_vloxseg4ei8_v_u16mf2(__VA_ARGS__)
5859
#define vloxseg5ei8_v_u16mf2(...) __riscv_vloxseg5ei8_v_u16mf2(__VA_ARGS__)
5860
#define vloxseg6ei8_v_u16mf2(...) __riscv_vloxseg6ei8_v_u16mf2(__VA_ARGS__)
5861
#define vloxseg7ei8_v_u16mf2(...) __riscv_vloxseg7ei8_v_u16mf2(__VA_ARGS__)
5862
#define vloxseg8ei8_v_u16mf2(...) __riscv_vloxseg8ei8_v_u16mf2(__VA_ARGS__)
5863
#define vloxseg2ei8_v_u16m1(...) __riscv_vloxseg2ei8_v_u16m1(__VA_ARGS__)
5864
#define vloxseg3ei8_v_u16m1(...) __riscv_vloxseg3ei8_v_u16m1(__VA_ARGS__)
5865
#define vloxseg4ei8_v_u16m1(...) __riscv_vloxseg4ei8_v_u16m1(__VA_ARGS__)
5866
#define vloxseg5ei8_v_u16m1(...) __riscv_vloxseg5ei8_v_u16m1(__VA_ARGS__)
5867
#define vloxseg6ei8_v_u16m1(...) __riscv_vloxseg6ei8_v_u16m1(__VA_ARGS__)
5868
#define vloxseg7ei8_v_u16m1(...) __riscv_vloxseg7ei8_v_u16m1(__VA_ARGS__)
5869
#define vloxseg8ei8_v_u16m1(...) __riscv_vloxseg8ei8_v_u16m1(__VA_ARGS__)
5870
#define vloxseg2ei8_v_u16m2(...) __riscv_vloxseg2ei8_v_u16m2(__VA_ARGS__)
5871
#define vloxseg3ei8_v_u16m2(...) __riscv_vloxseg3ei8_v_u16m2(__VA_ARGS__)
5872
#define vloxseg4ei8_v_u16m2(...) __riscv_vloxseg4ei8_v_u16m2(__VA_ARGS__)
5873
#define vloxseg2ei8_v_u16m4(...) __riscv_vloxseg2ei8_v_u16m4(__VA_ARGS__)
5874
#define vloxseg2ei16_v_u16mf4(...) __riscv_vloxseg2ei16_v_u16mf4(__VA_ARGS__)
5875
#define vloxseg3ei16_v_u16mf4(...) __riscv_vloxseg3ei16_v_u16mf4(__VA_ARGS__)
5876
#define vloxseg4ei16_v_u16mf4(...) __riscv_vloxseg4ei16_v_u16mf4(__VA_ARGS__)
5877
#define vloxseg5ei16_v_u16mf4(...) __riscv_vloxseg5ei16_v_u16mf4(__VA_ARGS__)
5878
#define vloxseg6ei16_v_u16mf4(...) __riscv_vloxseg6ei16_v_u16mf4(__VA_ARGS__)
5879
#define vloxseg7ei16_v_u16mf4(...) __riscv_vloxseg7ei16_v_u16mf4(__VA_ARGS__)
5880
#define vloxseg8ei16_v_u16mf4(...) __riscv_vloxseg8ei16_v_u16mf4(__VA_ARGS__)
5881
#define vloxseg2ei16_v_u16mf2(...) __riscv_vloxseg2ei16_v_u16mf2(__VA_ARGS__)
5882
#define vloxseg3ei16_v_u16mf2(...) __riscv_vloxseg3ei16_v_u16mf2(__VA_ARGS__)
5883
#define vloxseg4ei16_v_u16mf2(...) __riscv_vloxseg4ei16_v_u16mf2(__VA_ARGS__)
5884
#define vloxseg5ei16_v_u16mf2(...) __riscv_vloxseg5ei16_v_u16mf2(__VA_ARGS__)
5885
#define vloxseg6ei16_v_u16mf2(...) __riscv_vloxseg6ei16_v_u16mf2(__VA_ARGS__)
5886
#define vloxseg7ei16_v_u16mf2(...) __riscv_vloxseg7ei16_v_u16mf2(__VA_ARGS__)
5887
#define vloxseg8ei16_v_u16mf2(...) __riscv_vloxseg8ei16_v_u16mf2(__VA_ARGS__)
5888
#define vloxseg2ei16_v_u16m1(...) __riscv_vloxseg2ei16_v_u16m1(__VA_ARGS__)
5889
#define vloxseg3ei16_v_u16m1(...) __riscv_vloxseg3ei16_v_u16m1(__VA_ARGS__)
5890
#define vloxseg4ei16_v_u16m1(...) __riscv_vloxseg4ei16_v_u16m1(__VA_ARGS__)
5891
#define vloxseg5ei16_v_u16m1(...) __riscv_vloxseg5ei16_v_u16m1(__VA_ARGS__)
5892
#define vloxseg6ei16_v_u16m1(...) __riscv_vloxseg6ei16_v_u16m1(__VA_ARGS__)
5893
#define vloxseg7ei16_v_u16m1(...) __riscv_vloxseg7ei16_v_u16m1(__VA_ARGS__)
5894
#define vloxseg8ei16_v_u16m1(...) __riscv_vloxseg8ei16_v_u16m1(__VA_ARGS__)
5895
#define vloxseg2ei16_v_u16m2(...) __riscv_vloxseg2ei16_v_u16m2(__VA_ARGS__)
5896
#define vloxseg3ei16_v_u16m2(...) __riscv_vloxseg3ei16_v_u16m2(__VA_ARGS__)
5897
#define vloxseg4ei16_v_u16m2(...) __riscv_vloxseg4ei16_v_u16m2(__VA_ARGS__)
5898
#define vloxseg2ei16_v_u16m4(...) __riscv_vloxseg2ei16_v_u16m4(__VA_ARGS__)
5899
#define vloxseg2ei32_v_u16mf4(...) __riscv_vloxseg2ei32_v_u16mf4(__VA_ARGS__)
5900
#define vloxseg3ei32_v_u16mf4(...) __riscv_vloxseg3ei32_v_u16mf4(__VA_ARGS__)
5901
#define vloxseg4ei32_v_u16mf4(...) __riscv_vloxseg4ei32_v_u16mf4(__VA_ARGS__)
5902
#define vloxseg5ei32_v_u16mf4(...) __riscv_vloxseg5ei32_v_u16mf4(__VA_ARGS__)
5903
#define vloxseg6ei32_v_u16mf4(...) __riscv_vloxseg6ei32_v_u16mf4(__VA_ARGS__)
5904
#define vloxseg7ei32_v_u16mf4(...) __riscv_vloxseg7ei32_v_u16mf4(__VA_ARGS__)
5905
#define vloxseg8ei32_v_u16mf4(...) __riscv_vloxseg8ei32_v_u16mf4(__VA_ARGS__)
5906
#define vloxseg2ei32_v_u16mf2(...) __riscv_vloxseg2ei32_v_u16mf2(__VA_ARGS__)
5907
#define vloxseg3ei32_v_u16mf2(...) __riscv_vloxseg3ei32_v_u16mf2(__VA_ARGS__)
5908
#define vloxseg4ei32_v_u16mf2(...) __riscv_vloxseg4ei32_v_u16mf2(__VA_ARGS__)
5909
#define vloxseg5ei32_v_u16mf2(...) __riscv_vloxseg5ei32_v_u16mf2(__VA_ARGS__)
5910
#define vloxseg6ei32_v_u16mf2(...) __riscv_vloxseg6ei32_v_u16mf2(__VA_ARGS__)
5911
#define vloxseg7ei32_v_u16mf2(...) __riscv_vloxseg7ei32_v_u16mf2(__VA_ARGS__)
5912
#define vloxseg8ei32_v_u16mf2(...) __riscv_vloxseg8ei32_v_u16mf2(__VA_ARGS__)
5913
#define vloxseg2ei32_v_u16m1(...) __riscv_vloxseg2ei32_v_u16m1(__VA_ARGS__)
5914
#define vloxseg3ei32_v_u16m1(...) __riscv_vloxseg3ei32_v_u16m1(__VA_ARGS__)
5915
#define vloxseg4ei32_v_u16m1(...) __riscv_vloxseg4ei32_v_u16m1(__VA_ARGS__)
5916
#define vloxseg5ei32_v_u16m1(...) __riscv_vloxseg5ei32_v_u16m1(__VA_ARGS__)
5917
#define vloxseg6ei32_v_u16m1(...) __riscv_vloxseg6ei32_v_u16m1(__VA_ARGS__)
5918
#define vloxseg7ei32_v_u16m1(...) __riscv_vloxseg7ei32_v_u16m1(__VA_ARGS__)
5919
#define vloxseg8ei32_v_u16m1(...) __riscv_vloxseg8ei32_v_u16m1(__VA_ARGS__)
5920
#define vloxseg2ei32_v_u16m2(...) __riscv_vloxseg2ei32_v_u16m2(__VA_ARGS__)
5921
#define vloxseg3ei32_v_u16m2(...) __riscv_vloxseg3ei32_v_u16m2(__VA_ARGS__)
5922
#define vloxseg4ei32_v_u16m2(...) __riscv_vloxseg4ei32_v_u16m2(__VA_ARGS__)
5923
#define vloxseg2ei32_v_u16m4(...) __riscv_vloxseg2ei32_v_u16m4(__VA_ARGS__)
5924
#define vloxseg2ei64_v_u16mf4(...) __riscv_vloxseg2ei64_v_u16mf4(__VA_ARGS__)
5925
#define vloxseg3ei64_v_u16mf4(...) __riscv_vloxseg3ei64_v_u16mf4(__VA_ARGS__)
5926
#define vloxseg4ei64_v_u16mf4(...) __riscv_vloxseg4ei64_v_u16mf4(__VA_ARGS__)
5927
#define vloxseg5ei64_v_u16mf4(...) __riscv_vloxseg5ei64_v_u16mf4(__VA_ARGS__)
5928
#define vloxseg6ei64_v_u16mf4(...) __riscv_vloxseg6ei64_v_u16mf4(__VA_ARGS__)
5929
#define vloxseg7ei64_v_u16mf4(...) __riscv_vloxseg7ei64_v_u16mf4(__VA_ARGS__)
5930
#define vloxseg8ei64_v_u16mf4(...) __riscv_vloxseg8ei64_v_u16mf4(__VA_ARGS__)
5931
#define vloxseg2ei64_v_u16mf2(...) __riscv_vloxseg2ei64_v_u16mf2(__VA_ARGS__)
5932
#define vloxseg3ei64_v_u16mf2(...) __riscv_vloxseg3ei64_v_u16mf2(__VA_ARGS__)
5933
#define vloxseg4ei64_v_u16mf2(...) __riscv_vloxseg4ei64_v_u16mf2(__VA_ARGS__)
5934
#define vloxseg5ei64_v_u16mf2(...) __riscv_vloxseg5ei64_v_u16mf2(__VA_ARGS__)
5935
#define vloxseg6ei64_v_u16mf2(...) __riscv_vloxseg6ei64_v_u16mf2(__VA_ARGS__)
5936
#define vloxseg7ei64_v_u16mf2(...) __riscv_vloxseg7ei64_v_u16mf2(__VA_ARGS__)
5937
#define vloxseg8ei64_v_u16mf2(...) __riscv_vloxseg8ei64_v_u16mf2(__VA_ARGS__)
5938
#define vloxseg2ei64_v_u16m1(...) __riscv_vloxseg2ei64_v_u16m1(__VA_ARGS__)
5939
#define vloxseg3ei64_v_u16m1(...) __riscv_vloxseg3ei64_v_u16m1(__VA_ARGS__)
5940
#define vloxseg4ei64_v_u16m1(...) __riscv_vloxseg4ei64_v_u16m1(__VA_ARGS__)
5941
#define vloxseg5ei64_v_u16m1(...) __riscv_vloxseg5ei64_v_u16m1(__VA_ARGS__)
5942
#define vloxseg6ei64_v_u16m1(...) __riscv_vloxseg6ei64_v_u16m1(__VA_ARGS__)
5943
#define vloxseg7ei64_v_u16m1(...) __riscv_vloxseg7ei64_v_u16m1(__VA_ARGS__)
5944
#define vloxseg8ei64_v_u16m1(...) __riscv_vloxseg8ei64_v_u16m1(__VA_ARGS__)
5945
#define vloxseg2ei64_v_u16m2(...) __riscv_vloxseg2ei64_v_u16m2(__VA_ARGS__)
5946
#define vloxseg3ei64_v_u16m2(...) __riscv_vloxseg3ei64_v_u16m2(__VA_ARGS__)
5947
#define vloxseg4ei64_v_u16m2(...) __riscv_vloxseg4ei64_v_u16m2(__VA_ARGS__)
5948
#define vloxseg2ei8_v_u32mf2(...) __riscv_vloxseg2ei8_v_u32mf2(__VA_ARGS__)
5949
#define vloxseg3ei8_v_u32mf2(...) __riscv_vloxseg3ei8_v_u32mf2(__VA_ARGS__)
5950
#define vloxseg4ei8_v_u32mf2(...) __riscv_vloxseg4ei8_v_u32mf2(__VA_ARGS__)
5951
#define vloxseg5ei8_v_u32mf2(...) __riscv_vloxseg5ei8_v_u32mf2(__VA_ARGS__)
5952
#define vloxseg6ei8_v_u32mf2(...) __riscv_vloxseg6ei8_v_u32mf2(__VA_ARGS__)
5953
#define vloxseg7ei8_v_u32mf2(...) __riscv_vloxseg7ei8_v_u32mf2(__VA_ARGS__)
5954
#define vloxseg8ei8_v_u32mf2(...) __riscv_vloxseg8ei8_v_u32mf2(__VA_ARGS__)
5955
#define vloxseg2ei8_v_u32m1(...) __riscv_vloxseg2ei8_v_u32m1(__VA_ARGS__)
5956
#define vloxseg3ei8_v_u32m1(...) __riscv_vloxseg3ei8_v_u32m1(__VA_ARGS__)
5957
#define vloxseg4ei8_v_u32m1(...) __riscv_vloxseg4ei8_v_u32m1(__VA_ARGS__)
5958
#define vloxseg5ei8_v_u32m1(...) __riscv_vloxseg5ei8_v_u32m1(__VA_ARGS__)
5959
#define vloxseg6ei8_v_u32m1(...) __riscv_vloxseg6ei8_v_u32m1(__VA_ARGS__)
5960
#define vloxseg7ei8_v_u32m1(...) __riscv_vloxseg7ei8_v_u32m1(__VA_ARGS__)
5961
#define vloxseg8ei8_v_u32m1(...) __riscv_vloxseg8ei8_v_u32m1(__VA_ARGS__)
5962
#define vloxseg2ei8_v_u32m2(...) __riscv_vloxseg2ei8_v_u32m2(__VA_ARGS__)
5963
#define vloxseg3ei8_v_u32m2(...) __riscv_vloxseg3ei8_v_u32m2(__VA_ARGS__)
5964
#define vloxseg4ei8_v_u32m2(...) __riscv_vloxseg4ei8_v_u32m2(__VA_ARGS__)
5965
#define vloxseg2ei8_v_u32m4(...) __riscv_vloxseg2ei8_v_u32m4(__VA_ARGS__)
5966
#define vloxseg2ei16_v_u32mf2(...) __riscv_vloxseg2ei16_v_u32mf2(__VA_ARGS__)
5967
#define vloxseg3ei16_v_u32mf2(...) __riscv_vloxseg3ei16_v_u32mf2(__VA_ARGS__)
5968
#define vloxseg4ei16_v_u32mf2(...) __riscv_vloxseg4ei16_v_u32mf2(__VA_ARGS__)
5969
#define vloxseg5ei16_v_u32mf2(...) __riscv_vloxseg5ei16_v_u32mf2(__VA_ARGS__)
5970
#define vloxseg6ei16_v_u32mf2(...) __riscv_vloxseg6ei16_v_u32mf2(__VA_ARGS__)
5971
#define vloxseg7ei16_v_u32mf2(...) __riscv_vloxseg7ei16_v_u32mf2(__VA_ARGS__)
5972
#define vloxseg8ei16_v_u32mf2(...) __riscv_vloxseg8ei16_v_u32mf2(__VA_ARGS__)
5973
#define vloxseg2ei16_v_u32m1(...) __riscv_vloxseg2ei16_v_u32m1(__VA_ARGS__)
5974
#define vloxseg3ei16_v_u32m1(...) __riscv_vloxseg3ei16_v_u32m1(__VA_ARGS__)
5975
#define vloxseg4ei16_v_u32m1(...) __riscv_vloxseg4ei16_v_u32m1(__VA_ARGS__)
5976
#define vloxseg5ei16_v_u32m1(...) __riscv_vloxseg5ei16_v_u32m1(__VA_ARGS__)
5977
#define vloxseg6ei16_v_u32m1(...) __riscv_vloxseg6ei16_v_u32m1(__VA_ARGS__)
5978
#define vloxseg7ei16_v_u32m1(...) __riscv_vloxseg7ei16_v_u32m1(__VA_ARGS__)
5979
#define vloxseg8ei16_v_u32m1(...) __riscv_vloxseg8ei16_v_u32m1(__VA_ARGS__)
5980
#define vloxseg2ei16_v_u32m2(...) __riscv_vloxseg2ei16_v_u32m2(__VA_ARGS__)
5981
#define vloxseg3ei16_v_u32m2(...) __riscv_vloxseg3ei16_v_u32m2(__VA_ARGS__)
5982
#define vloxseg4ei16_v_u32m2(...) __riscv_vloxseg4ei16_v_u32m2(__VA_ARGS__)
5983
#define vloxseg2ei16_v_u32m4(...) __riscv_vloxseg2ei16_v_u32m4(__VA_ARGS__)
5984
#define vloxseg2ei32_v_u32mf2(...) __riscv_vloxseg2ei32_v_u32mf2(__VA_ARGS__)
5985
#define vloxseg3ei32_v_u32mf2(...) __riscv_vloxseg3ei32_v_u32mf2(__VA_ARGS__)
5986
#define vloxseg4ei32_v_u32mf2(...) __riscv_vloxseg4ei32_v_u32mf2(__VA_ARGS__)
5987
#define vloxseg5ei32_v_u32mf2(...) __riscv_vloxseg5ei32_v_u32mf2(__VA_ARGS__)
5988
#define vloxseg6ei32_v_u32mf2(...) __riscv_vloxseg6ei32_v_u32mf2(__VA_ARGS__)
5989
#define vloxseg7ei32_v_u32mf2(...) __riscv_vloxseg7ei32_v_u32mf2(__VA_ARGS__)
5990
#define vloxseg8ei32_v_u32mf2(...) __riscv_vloxseg8ei32_v_u32mf2(__VA_ARGS__)
5991
#define vloxseg2ei32_v_u32m1(...) __riscv_vloxseg2ei32_v_u32m1(__VA_ARGS__)
5992
#define vloxseg3ei32_v_u32m1(...) __riscv_vloxseg3ei32_v_u32m1(__VA_ARGS__)
5993
#define vloxseg4ei32_v_u32m1(...) __riscv_vloxseg4ei32_v_u32m1(__VA_ARGS__)
5994
#define vloxseg5ei32_v_u32m1(...) __riscv_vloxseg5ei32_v_u32m1(__VA_ARGS__)
5995
#define vloxseg6ei32_v_u32m1(...) __riscv_vloxseg6ei32_v_u32m1(__VA_ARGS__)
5996
#define vloxseg7ei32_v_u32m1(...) __riscv_vloxseg7ei32_v_u32m1(__VA_ARGS__)
5997
#define vloxseg8ei32_v_u32m1(...) __riscv_vloxseg8ei32_v_u32m1(__VA_ARGS__)
5998
#define vloxseg2ei32_v_u32m2(...) __riscv_vloxseg2ei32_v_u32m2(__VA_ARGS__)
5999
#define vloxseg3ei32_v_u32m2(...) __riscv_vloxseg3ei32_v_u32m2(__VA_ARGS__)
6000
#define vloxseg4ei32_v_u32m2(...) __riscv_vloxseg4ei32_v_u32m2(__VA_ARGS__)
6001
#define vloxseg2ei32_v_u32m4(...) __riscv_vloxseg2ei32_v_u32m4(__VA_ARGS__)
6002
#define vloxseg2ei64_v_u32mf2(...) __riscv_vloxseg2ei64_v_u32mf2(__VA_ARGS__)
6003
#define vloxseg3ei64_v_u32mf2(...) __riscv_vloxseg3ei64_v_u32mf2(__VA_ARGS__)
6004
#define vloxseg4ei64_v_u32mf2(...) __riscv_vloxseg4ei64_v_u32mf2(__VA_ARGS__)
6005
#define vloxseg5ei64_v_u32mf2(...) __riscv_vloxseg5ei64_v_u32mf2(__VA_ARGS__)
6006
#define vloxseg6ei64_v_u32mf2(...) __riscv_vloxseg6ei64_v_u32mf2(__VA_ARGS__)
6007
#define vloxseg7ei64_v_u32mf2(...) __riscv_vloxseg7ei64_v_u32mf2(__VA_ARGS__)
6008
#define vloxseg8ei64_v_u32mf2(...) __riscv_vloxseg8ei64_v_u32mf2(__VA_ARGS__)
6009
#define vloxseg2ei64_v_u32m1(...) __riscv_vloxseg2ei64_v_u32m1(__VA_ARGS__)
6010
#define vloxseg3ei64_v_u32m1(...) __riscv_vloxseg3ei64_v_u32m1(__VA_ARGS__)
6011
#define vloxseg4ei64_v_u32m1(...) __riscv_vloxseg4ei64_v_u32m1(__VA_ARGS__)
6012
#define vloxseg5ei64_v_u32m1(...) __riscv_vloxseg5ei64_v_u32m1(__VA_ARGS__)
6013
#define vloxseg6ei64_v_u32m1(...) __riscv_vloxseg6ei64_v_u32m1(__VA_ARGS__)
6014
#define vloxseg7ei64_v_u32m1(...) __riscv_vloxseg7ei64_v_u32m1(__VA_ARGS__)
6015
#define vloxseg8ei64_v_u32m1(...) __riscv_vloxseg8ei64_v_u32m1(__VA_ARGS__)
6016
#define vloxseg2ei64_v_u32m2(...) __riscv_vloxseg2ei64_v_u32m2(__VA_ARGS__)
6017
#define vloxseg3ei64_v_u32m2(...) __riscv_vloxseg3ei64_v_u32m2(__VA_ARGS__)
6018
#define vloxseg4ei64_v_u32m2(...) __riscv_vloxseg4ei64_v_u32m2(__VA_ARGS__)
6019
#define vloxseg2ei64_v_u32m4(...) __riscv_vloxseg2ei64_v_u32m4(__VA_ARGS__)
6020
#define vloxseg2ei8_v_u64m1(...) __riscv_vloxseg2ei8_v_u64m1(__VA_ARGS__)
6021
#define vloxseg3ei8_v_u64m1(...) __riscv_vloxseg3ei8_v_u64m1(__VA_ARGS__)
6022
#define vloxseg4ei8_v_u64m1(...) __riscv_vloxseg4ei8_v_u64m1(__VA_ARGS__)
6023
#define vloxseg5ei8_v_u64m1(...) __riscv_vloxseg5ei8_v_u64m1(__VA_ARGS__)
6024
#define vloxseg6ei8_v_u64m1(...) __riscv_vloxseg6ei8_v_u64m1(__VA_ARGS__)
6025
#define vloxseg7ei8_v_u64m1(...) __riscv_vloxseg7ei8_v_u64m1(__VA_ARGS__)
6026
#define vloxseg8ei8_v_u64m1(...) __riscv_vloxseg8ei8_v_u64m1(__VA_ARGS__)
6027
#define vloxseg2ei8_v_u64m2(...) __riscv_vloxseg2ei8_v_u64m2(__VA_ARGS__)
6028
#define vloxseg3ei8_v_u64m2(...) __riscv_vloxseg3ei8_v_u64m2(__VA_ARGS__)
6029
#define vloxseg4ei8_v_u64m2(...) __riscv_vloxseg4ei8_v_u64m2(__VA_ARGS__)
6030
#define vloxseg2ei8_v_u64m4(...) __riscv_vloxseg2ei8_v_u64m4(__VA_ARGS__)
6031
#define vloxseg2ei16_v_u64m1(...) __riscv_vloxseg2ei16_v_u64m1(__VA_ARGS__)
6032
#define vloxseg3ei16_v_u64m1(...) __riscv_vloxseg3ei16_v_u64m1(__VA_ARGS__)
6033
#define vloxseg4ei16_v_u64m1(...) __riscv_vloxseg4ei16_v_u64m1(__VA_ARGS__)
6034
#define vloxseg5ei16_v_u64m1(...) __riscv_vloxseg5ei16_v_u64m1(__VA_ARGS__)
6035
#define vloxseg6ei16_v_u64m1(...) __riscv_vloxseg6ei16_v_u64m1(__VA_ARGS__)
6036
#define vloxseg7ei16_v_u64m1(...) __riscv_vloxseg7ei16_v_u64m1(__VA_ARGS__)
6037
#define vloxseg8ei16_v_u64m1(...) __riscv_vloxseg8ei16_v_u64m1(__VA_ARGS__)
6038
#define vloxseg2ei16_v_u64m2(...) __riscv_vloxseg2ei16_v_u64m2(__VA_ARGS__)
6039
#define vloxseg3ei16_v_u64m2(...) __riscv_vloxseg3ei16_v_u64m2(__VA_ARGS__)
6040
#define vloxseg4ei16_v_u64m2(...) __riscv_vloxseg4ei16_v_u64m2(__VA_ARGS__)
6041
#define vloxseg2ei16_v_u64m4(...) __riscv_vloxseg2ei16_v_u64m4(__VA_ARGS__)
6042
#define vloxseg2ei32_v_u64m1(...) __riscv_vloxseg2ei32_v_u64m1(__VA_ARGS__)
6043
#define vloxseg3ei32_v_u64m1(...) __riscv_vloxseg3ei32_v_u64m1(__VA_ARGS__)
6044
#define vloxseg4ei32_v_u64m1(...) __riscv_vloxseg4ei32_v_u64m1(__VA_ARGS__)
6045
#define vloxseg5ei32_v_u64m1(...) __riscv_vloxseg5ei32_v_u64m1(__VA_ARGS__)
6046
#define vloxseg6ei32_v_u64m1(...) __riscv_vloxseg6ei32_v_u64m1(__VA_ARGS__)
6047
#define vloxseg7ei32_v_u64m1(...) __riscv_vloxseg7ei32_v_u64m1(__VA_ARGS__)
6048
#define vloxseg8ei32_v_u64m1(...) __riscv_vloxseg8ei32_v_u64m1(__VA_ARGS__)
6049
#define vloxseg2ei32_v_u64m2(...) __riscv_vloxseg2ei32_v_u64m2(__VA_ARGS__)
6050
#define vloxseg3ei32_v_u64m2(...) __riscv_vloxseg3ei32_v_u64m2(__VA_ARGS__)
6051
#define vloxseg4ei32_v_u64m2(...) __riscv_vloxseg4ei32_v_u64m2(__VA_ARGS__)
6052
#define vloxseg2ei32_v_u64m4(...) __riscv_vloxseg2ei32_v_u64m4(__VA_ARGS__)
6053
#define vloxseg2ei64_v_u64m1(...) __riscv_vloxseg2ei64_v_u64m1(__VA_ARGS__)
6054
#define vloxseg3ei64_v_u64m1(...) __riscv_vloxseg3ei64_v_u64m1(__VA_ARGS__)
6055
#define vloxseg4ei64_v_u64m1(...) __riscv_vloxseg4ei64_v_u64m1(__VA_ARGS__)
6056
#define vloxseg5ei64_v_u64m1(...) __riscv_vloxseg5ei64_v_u64m1(__VA_ARGS__)
6057
#define vloxseg6ei64_v_u64m1(...) __riscv_vloxseg6ei64_v_u64m1(__VA_ARGS__)
6058
#define vloxseg7ei64_v_u64m1(...) __riscv_vloxseg7ei64_v_u64m1(__VA_ARGS__)
6059
#define vloxseg8ei64_v_u64m1(...) __riscv_vloxseg8ei64_v_u64m1(__VA_ARGS__)
6060
#define vloxseg2ei64_v_u64m2(...) __riscv_vloxseg2ei64_v_u64m2(__VA_ARGS__)
6061
#define vloxseg3ei64_v_u64m2(...) __riscv_vloxseg3ei64_v_u64m2(__VA_ARGS__)
6062
#define vloxseg4ei64_v_u64m2(...) __riscv_vloxseg4ei64_v_u64m2(__VA_ARGS__)
6063
#define vloxseg2ei64_v_u64m4(...) __riscv_vloxseg2ei64_v_u64m4(__VA_ARGS__)
6064
#define vluxseg2ei8_v_u8mf8(...) __riscv_vluxseg2ei8_v_u8mf8(__VA_ARGS__)
6065
#define vluxseg3ei8_v_u8mf8(...) __riscv_vluxseg3ei8_v_u8mf8(__VA_ARGS__)
6066
#define vluxseg4ei8_v_u8mf8(...) __riscv_vluxseg4ei8_v_u8mf8(__VA_ARGS__)
6067
#define vluxseg5ei8_v_u8mf8(...) __riscv_vluxseg5ei8_v_u8mf8(__VA_ARGS__)
6068
#define vluxseg6ei8_v_u8mf8(...) __riscv_vluxseg6ei8_v_u8mf8(__VA_ARGS__)
6069
#define vluxseg7ei8_v_u8mf8(...) __riscv_vluxseg7ei8_v_u8mf8(__VA_ARGS__)
6070
#define vluxseg8ei8_v_u8mf8(...) __riscv_vluxseg8ei8_v_u8mf8(__VA_ARGS__)
6071
#define vluxseg2ei8_v_u8mf4(...) __riscv_vluxseg2ei8_v_u8mf4(__VA_ARGS__)
6072
#define vluxseg3ei8_v_u8mf4(...) __riscv_vluxseg3ei8_v_u8mf4(__VA_ARGS__)
6073
#define vluxseg4ei8_v_u8mf4(...) __riscv_vluxseg4ei8_v_u8mf4(__VA_ARGS__)
6074
#define vluxseg5ei8_v_u8mf4(...) __riscv_vluxseg5ei8_v_u8mf4(__VA_ARGS__)
6075
#define vluxseg6ei8_v_u8mf4(...) __riscv_vluxseg6ei8_v_u8mf4(__VA_ARGS__)
6076
#define vluxseg7ei8_v_u8mf4(...) __riscv_vluxseg7ei8_v_u8mf4(__VA_ARGS__)
6077
#define vluxseg8ei8_v_u8mf4(...) __riscv_vluxseg8ei8_v_u8mf4(__VA_ARGS__)
6078
#define vluxseg2ei8_v_u8mf2(...) __riscv_vluxseg2ei8_v_u8mf2(__VA_ARGS__)
6079
#define vluxseg3ei8_v_u8mf2(...) __riscv_vluxseg3ei8_v_u8mf2(__VA_ARGS__)
6080
#define vluxseg4ei8_v_u8mf2(...) __riscv_vluxseg4ei8_v_u8mf2(__VA_ARGS__)
6081
#define vluxseg5ei8_v_u8mf2(...) __riscv_vluxseg5ei8_v_u8mf2(__VA_ARGS__)
6082
#define vluxseg6ei8_v_u8mf2(...) __riscv_vluxseg6ei8_v_u8mf2(__VA_ARGS__)
6083
#define vluxseg7ei8_v_u8mf2(...) __riscv_vluxseg7ei8_v_u8mf2(__VA_ARGS__)
6084
#define vluxseg8ei8_v_u8mf2(...) __riscv_vluxseg8ei8_v_u8mf2(__VA_ARGS__)
6085
#define vluxseg2ei8_v_u8m1(...) __riscv_vluxseg2ei8_v_u8m1(__VA_ARGS__)
6086
#define vluxseg3ei8_v_u8m1(...) __riscv_vluxseg3ei8_v_u8m1(__VA_ARGS__)
6087
#define vluxseg4ei8_v_u8m1(...) __riscv_vluxseg4ei8_v_u8m1(__VA_ARGS__)
6088
#define vluxseg5ei8_v_u8m1(...) __riscv_vluxseg5ei8_v_u8m1(__VA_ARGS__)
6089
#define vluxseg6ei8_v_u8m1(...) __riscv_vluxseg6ei8_v_u8m1(__VA_ARGS__)
6090
#define vluxseg7ei8_v_u8m1(...) __riscv_vluxseg7ei8_v_u8m1(__VA_ARGS__)
6091
#define vluxseg8ei8_v_u8m1(...) __riscv_vluxseg8ei8_v_u8m1(__VA_ARGS__)
6092
#define vluxseg2ei8_v_u8m2(...) __riscv_vluxseg2ei8_v_u8m2(__VA_ARGS__)
6093
#define vluxseg3ei8_v_u8m2(...) __riscv_vluxseg3ei8_v_u8m2(__VA_ARGS__)
6094
#define vluxseg4ei8_v_u8m2(...) __riscv_vluxseg4ei8_v_u8m2(__VA_ARGS__)
6095
#define vluxseg2ei8_v_u8m4(...) __riscv_vluxseg2ei8_v_u8m4(__VA_ARGS__)
6096
#define vluxseg2ei16_v_u8mf8(...) __riscv_vluxseg2ei16_v_u8mf8(__VA_ARGS__)
6097
#define vluxseg3ei16_v_u8mf8(...) __riscv_vluxseg3ei16_v_u8mf8(__VA_ARGS__)
6098
#define vluxseg4ei16_v_u8mf8(...) __riscv_vluxseg4ei16_v_u8mf8(__VA_ARGS__)
6099
#define vluxseg5ei16_v_u8mf8(...) __riscv_vluxseg5ei16_v_u8mf8(__VA_ARGS__)
6100
#define vluxseg6ei16_v_u8mf8(...) __riscv_vluxseg6ei16_v_u8mf8(__VA_ARGS__)
6101
#define vluxseg7ei16_v_u8mf8(...) __riscv_vluxseg7ei16_v_u8mf8(__VA_ARGS__)
6102
#define vluxseg8ei16_v_u8mf8(...) __riscv_vluxseg8ei16_v_u8mf8(__VA_ARGS__)
6103
#define vluxseg2ei16_v_u8mf4(...) __riscv_vluxseg2ei16_v_u8mf4(__VA_ARGS__)
6104
#define vluxseg3ei16_v_u8mf4(...) __riscv_vluxseg3ei16_v_u8mf4(__VA_ARGS__)
6105
#define vluxseg4ei16_v_u8mf4(...) __riscv_vluxseg4ei16_v_u8mf4(__VA_ARGS__)
6106
#define vluxseg5ei16_v_u8mf4(...) __riscv_vluxseg5ei16_v_u8mf4(__VA_ARGS__)
6107
#define vluxseg6ei16_v_u8mf4(...) __riscv_vluxseg6ei16_v_u8mf4(__VA_ARGS__)
6108
#define vluxseg7ei16_v_u8mf4(...) __riscv_vluxseg7ei16_v_u8mf4(__VA_ARGS__)
6109
#define vluxseg8ei16_v_u8mf4(...) __riscv_vluxseg8ei16_v_u8mf4(__VA_ARGS__)
6110
#define vluxseg2ei16_v_u8mf2(...) __riscv_vluxseg2ei16_v_u8mf2(__VA_ARGS__)
6111
#define vluxseg3ei16_v_u8mf2(...) __riscv_vluxseg3ei16_v_u8mf2(__VA_ARGS__)
6112
#define vluxseg4ei16_v_u8mf2(...) __riscv_vluxseg4ei16_v_u8mf2(__VA_ARGS__)
6113
#define vluxseg5ei16_v_u8mf2(...) __riscv_vluxseg5ei16_v_u8mf2(__VA_ARGS__)
6114
#define vluxseg6ei16_v_u8mf2(...) __riscv_vluxseg6ei16_v_u8mf2(__VA_ARGS__)
6115
#define vluxseg7ei16_v_u8mf2(...) __riscv_vluxseg7ei16_v_u8mf2(__VA_ARGS__)
6116
#define vluxseg8ei16_v_u8mf2(...) __riscv_vluxseg8ei16_v_u8mf2(__VA_ARGS__)
6117
#define vluxseg2ei16_v_u8m1(...) __riscv_vluxseg2ei16_v_u8m1(__VA_ARGS__)
6118
#define vluxseg3ei16_v_u8m1(...) __riscv_vluxseg3ei16_v_u8m1(__VA_ARGS__)
6119
#define vluxseg4ei16_v_u8m1(...) __riscv_vluxseg4ei16_v_u8m1(__VA_ARGS__)
6120
#define vluxseg5ei16_v_u8m1(...) __riscv_vluxseg5ei16_v_u8m1(__VA_ARGS__)
6121
#define vluxseg6ei16_v_u8m1(...) __riscv_vluxseg6ei16_v_u8m1(__VA_ARGS__)
6122
#define vluxseg7ei16_v_u8m1(...) __riscv_vluxseg7ei16_v_u8m1(__VA_ARGS__)
6123
#define vluxseg8ei16_v_u8m1(...) __riscv_vluxseg8ei16_v_u8m1(__VA_ARGS__)
6124
#define vluxseg2ei16_v_u8m2(...) __riscv_vluxseg2ei16_v_u8m2(__VA_ARGS__)
6125
#define vluxseg3ei16_v_u8m2(...) __riscv_vluxseg3ei16_v_u8m2(__VA_ARGS__)
6126
#define vluxseg4ei16_v_u8m2(...) __riscv_vluxseg4ei16_v_u8m2(__VA_ARGS__)
6127
#define vluxseg2ei16_v_u8m4(...) __riscv_vluxseg2ei16_v_u8m4(__VA_ARGS__)
6128
#define vluxseg2ei32_v_u8mf8(...) __riscv_vluxseg2ei32_v_u8mf8(__VA_ARGS__)
6129
#define vluxseg3ei32_v_u8mf8(...) __riscv_vluxseg3ei32_v_u8mf8(__VA_ARGS__)
6130
#define vluxseg4ei32_v_u8mf8(...) __riscv_vluxseg4ei32_v_u8mf8(__VA_ARGS__)
6131
#define vluxseg5ei32_v_u8mf8(...) __riscv_vluxseg5ei32_v_u8mf8(__VA_ARGS__)
6132
#define vluxseg6ei32_v_u8mf8(...) __riscv_vluxseg6ei32_v_u8mf8(__VA_ARGS__)
6133
#define vluxseg7ei32_v_u8mf8(...) __riscv_vluxseg7ei32_v_u8mf8(__VA_ARGS__)
6134
#define vluxseg8ei32_v_u8mf8(...) __riscv_vluxseg8ei32_v_u8mf8(__VA_ARGS__)
6135
#define vluxseg2ei32_v_u8mf4(...) __riscv_vluxseg2ei32_v_u8mf4(__VA_ARGS__)
6136
#define vluxseg3ei32_v_u8mf4(...) __riscv_vluxseg3ei32_v_u8mf4(__VA_ARGS__)
6137
#define vluxseg4ei32_v_u8mf4(...) __riscv_vluxseg4ei32_v_u8mf4(__VA_ARGS__)
6138
#define vluxseg5ei32_v_u8mf4(...) __riscv_vluxseg5ei32_v_u8mf4(__VA_ARGS__)
6139
#define vluxseg6ei32_v_u8mf4(...) __riscv_vluxseg6ei32_v_u8mf4(__VA_ARGS__)
6140
#define vluxseg7ei32_v_u8mf4(...) __riscv_vluxseg7ei32_v_u8mf4(__VA_ARGS__)
6141
#define vluxseg8ei32_v_u8mf4(...) __riscv_vluxseg8ei32_v_u8mf4(__VA_ARGS__)
6142
#define vluxseg2ei32_v_u8mf2(...) __riscv_vluxseg2ei32_v_u8mf2(__VA_ARGS__)
6143
#define vluxseg3ei32_v_u8mf2(...) __riscv_vluxseg3ei32_v_u8mf2(__VA_ARGS__)
6144
#define vluxseg4ei32_v_u8mf2(...) __riscv_vluxseg4ei32_v_u8mf2(__VA_ARGS__)
6145
#define vluxseg5ei32_v_u8mf2(...) __riscv_vluxseg5ei32_v_u8mf2(__VA_ARGS__)
6146
#define vluxseg6ei32_v_u8mf2(...) __riscv_vluxseg6ei32_v_u8mf2(__VA_ARGS__)
6147
#define vluxseg7ei32_v_u8mf2(...) __riscv_vluxseg7ei32_v_u8mf2(__VA_ARGS__)
6148
#define vluxseg8ei32_v_u8mf2(...) __riscv_vluxseg8ei32_v_u8mf2(__VA_ARGS__)
6149
#define vluxseg2ei32_v_u8m1(...) __riscv_vluxseg2ei32_v_u8m1(__VA_ARGS__)
6150
#define vluxseg3ei32_v_u8m1(...) __riscv_vluxseg3ei32_v_u8m1(__VA_ARGS__)
6151
#define vluxseg4ei32_v_u8m1(...) __riscv_vluxseg4ei32_v_u8m1(__VA_ARGS__)
6152
#define vluxseg5ei32_v_u8m1(...) __riscv_vluxseg5ei32_v_u8m1(__VA_ARGS__)
6153
#define vluxseg6ei32_v_u8m1(...) __riscv_vluxseg6ei32_v_u8m1(__VA_ARGS__)
6154
#define vluxseg7ei32_v_u8m1(...) __riscv_vluxseg7ei32_v_u8m1(__VA_ARGS__)
6155
#define vluxseg8ei32_v_u8m1(...) __riscv_vluxseg8ei32_v_u8m1(__VA_ARGS__)
6156
#define vluxseg2ei32_v_u8m2(...) __riscv_vluxseg2ei32_v_u8m2(__VA_ARGS__)
6157
#define vluxseg3ei32_v_u8m2(...) __riscv_vluxseg3ei32_v_u8m2(__VA_ARGS__)
6158
#define vluxseg4ei32_v_u8m2(...) __riscv_vluxseg4ei32_v_u8m2(__VA_ARGS__)
6159
#define vluxseg2ei64_v_u8mf8(...) __riscv_vluxseg2ei64_v_u8mf8(__VA_ARGS__)
6160
#define vluxseg3ei64_v_u8mf8(...) __riscv_vluxseg3ei64_v_u8mf8(__VA_ARGS__)
6161
#define vluxseg4ei64_v_u8mf8(...) __riscv_vluxseg4ei64_v_u8mf8(__VA_ARGS__)
6162
#define vluxseg5ei64_v_u8mf8(...) __riscv_vluxseg5ei64_v_u8mf8(__VA_ARGS__)
6163
#define vluxseg6ei64_v_u8mf8(...) __riscv_vluxseg6ei64_v_u8mf8(__VA_ARGS__)
6164
#define vluxseg7ei64_v_u8mf8(...) __riscv_vluxseg7ei64_v_u8mf8(__VA_ARGS__)
6165
#define vluxseg8ei64_v_u8mf8(...) __riscv_vluxseg8ei64_v_u8mf8(__VA_ARGS__)
6166
#define vluxseg2ei64_v_u8mf4(...) __riscv_vluxseg2ei64_v_u8mf4(__VA_ARGS__)
6167
#define vluxseg3ei64_v_u8mf4(...) __riscv_vluxseg3ei64_v_u8mf4(__VA_ARGS__)
6168
#define vluxseg4ei64_v_u8mf4(...) __riscv_vluxseg4ei64_v_u8mf4(__VA_ARGS__)
6169
#define vluxseg5ei64_v_u8mf4(...) __riscv_vluxseg5ei64_v_u8mf4(__VA_ARGS__)
6170
#define vluxseg6ei64_v_u8mf4(...) __riscv_vluxseg6ei64_v_u8mf4(__VA_ARGS__)
6171
#define vluxseg7ei64_v_u8mf4(...) __riscv_vluxseg7ei64_v_u8mf4(__VA_ARGS__)
6172
#define vluxseg8ei64_v_u8mf4(...) __riscv_vluxseg8ei64_v_u8mf4(__VA_ARGS__)
6173
#define vluxseg2ei64_v_u8mf2(...) __riscv_vluxseg2ei64_v_u8mf2(__VA_ARGS__)
6174
#define vluxseg3ei64_v_u8mf2(...) __riscv_vluxseg3ei64_v_u8mf2(__VA_ARGS__)
6175
#define vluxseg4ei64_v_u8mf2(...) __riscv_vluxseg4ei64_v_u8mf2(__VA_ARGS__)
6176
#define vluxseg5ei64_v_u8mf2(...) __riscv_vluxseg5ei64_v_u8mf2(__VA_ARGS__)
6177
#define vluxseg6ei64_v_u8mf2(...) __riscv_vluxseg6ei64_v_u8mf2(__VA_ARGS__)
6178
#define vluxseg7ei64_v_u8mf2(...) __riscv_vluxseg7ei64_v_u8mf2(__VA_ARGS__)
6179
#define vluxseg8ei64_v_u8mf2(...) __riscv_vluxseg8ei64_v_u8mf2(__VA_ARGS__)
6180
#define vluxseg2ei64_v_u8m1(...) __riscv_vluxseg2ei64_v_u8m1(__VA_ARGS__)
6181
#define vluxseg3ei64_v_u8m1(...) __riscv_vluxseg3ei64_v_u8m1(__VA_ARGS__)
6182
#define vluxseg4ei64_v_u8m1(...) __riscv_vluxseg4ei64_v_u8m1(__VA_ARGS__)
6183
#define vluxseg5ei64_v_u8m1(...) __riscv_vluxseg5ei64_v_u8m1(__VA_ARGS__)
6184
#define vluxseg6ei64_v_u8m1(...) __riscv_vluxseg6ei64_v_u8m1(__VA_ARGS__)
6185
#define vluxseg7ei64_v_u8m1(...) __riscv_vluxseg7ei64_v_u8m1(__VA_ARGS__)
6186
#define vluxseg8ei64_v_u8m1(...) __riscv_vluxseg8ei64_v_u8m1(__VA_ARGS__)
6187
#define vluxseg2ei8_v_u16mf4(...) __riscv_vluxseg2ei8_v_u16mf4(__VA_ARGS__)
6188
#define vluxseg3ei8_v_u16mf4(...) __riscv_vluxseg3ei8_v_u16mf4(__VA_ARGS__)
6189
#define vluxseg4ei8_v_u16mf4(...) __riscv_vluxseg4ei8_v_u16mf4(__VA_ARGS__)
6190
#define vluxseg5ei8_v_u16mf4(...) __riscv_vluxseg5ei8_v_u16mf4(__VA_ARGS__)
6191
#define vluxseg6ei8_v_u16mf4(...) __riscv_vluxseg6ei8_v_u16mf4(__VA_ARGS__)
6192
#define vluxseg7ei8_v_u16mf4(...) __riscv_vluxseg7ei8_v_u16mf4(__VA_ARGS__)
6193
#define vluxseg8ei8_v_u16mf4(...) __riscv_vluxseg8ei8_v_u16mf4(__VA_ARGS__)
6194
#define vluxseg2ei8_v_u16mf2(...) __riscv_vluxseg2ei8_v_u16mf2(__VA_ARGS__)
6195
#define vluxseg3ei8_v_u16mf2(...) __riscv_vluxseg3ei8_v_u16mf2(__VA_ARGS__)
6196
#define vluxseg4ei8_v_u16mf2(...) __riscv_vluxseg4ei8_v_u16mf2(__VA_ARGS__)
6197
#define vluxseg5ei8_v_u16mf2(...) __riscv_vluxseg5ei8_v_u16mf2(__VA_ARGS__)
6198
#define vluxseg6ei8_v_u16mf2(...) __riscv_vluxseg6ei8_v_u16mf2(__VA_ARGS__)
6199
#define vluxseg7ei8_v_u16mf2(...) __riscv_vluxseg7ei8_v_u16mf2(__VA_ARGS__)
6200
#define vluxseg8ei8_v_u16mf2(...) __riscv_vluxseg8ei8_v_u16mf2(__VA_ARGS__)
6201
#define vluxseg2ei8_v_u16m1(...) __riscv_vluxseg2ei8_v_u16m1(__VA_ARGS__)
6202
#define vluxseg3ei8_v_u16m1(...) __riscv_vluxseg3ei8_v_u16m1(__VA_ARGS__)
6203
#define vluxseg4ei8_v_u16m1(...) __riscv_vluxseg4ei8_v_u16m1(__VA_ARGS__)
6204
#define vluxseg5ei8_v_u16m1(...) __riscv_vluxseg5ei8_v_u16m1(__VA_ARGS__)
6205
#define vluxseg6ei8_v_u16m1(...) __riscv_vluxseg6ei8_v_u16m1(__VA_ARGS__)
6206
#define vluxseg7ei8_v_u16m1(...) __riscv_vluxseg7ei8_v_u16m1(__VA_ARGS__)
6207
#define vluxseg8ei8_v_u16m1(...) __riscv_vluxseg8ei8_v_u16m1(__VA_ARGS__)
6208
#define vluxseg2ei8_v_u16m2(...) __riscv_vluxseg2ei8_v_u16m2(__VA_ARGS__)
6209
#define vluxseg3ei8_v_u16m2(...) __riscv_vluxseg3ei8_v_u16m2(__VA_ARGS__)
6210
#define vluxseg4ei8_v_u16m2(...) __riscv_vluxseg4ei8_v_u16m2(__VA_ARGS__)
6211
#define vluxseg2ei8_v_u16m4(...) __riscv_vluxseg2ei8_v_u16m4(__VA_ARGS__)
6212
#define vluxseg2ei16_v_u16mf4(...) __riscv_vluxseg2ei16_v_u16mf4(__VA_ARGS__)
6213
#define vluxseg3ei16_v_u16mf4(...) __riscv_vluxseg3ei16_v_u16mf4(__VA_ARGS__)
6214
#define vluxseg4ei16_v_u16mf4(...) __riscv_vluxseg4ei16_v_u16mf4(__VA_ARGS__)
6215
#define vluxseg5ei16_v_u16mf4(...) __riscv_vluxseg5ei16_v_u16mf4(__VA_ARGS__)
6216
#define vluxseg6ei16_v_u16mf4(...) __riscv_vluxseg6ei16_v_u16mf4(__VA_ARGS__)
6217
#define vluxseg7ei16_v_u16mf4(...) __riscv_vluxseg7ei16_v_u16mf4(__VA_ARGS__)
6218
#define vluxseg8ei16_v_u16mf4(...) __riscv_vluxseg8ei16_v_u16mf4(__VA_ARGS__)
6219
#define vluxseg2ei16_v_u16mf2(...) __riscv_vluxseg2ei16_v_u16mf2(__VA_ARGS__)
6220
#define vluxseg3ei16_v_u16mf2(...) __riscv_vluxseg3ei16_v_u16mf2(__VA_ARGS__)
6221
#define vluxseg4ei16_v_u16mf2(...) __riscv_vluxseg4ei16_v_u16mf2(__VA_ARGS__)
6222
#define vluxseg5ei16_v_u16mf2(...) __riscv_vluxseg5ei16_v_u16mf2(__VA_ARGS__)
6223
#define vluxseg6ei16_v_u16mf2(...) __riscv_vluxseg6ei16_v_u16mf2(__VA_ARGS__)
6224
#define vluxseg7ei16_v_u16mf2(...) __riscv_vluxseg7ei16_v_u16mf2(__VA_ARGS__)
6225
#define vluxseg8ei16_v_u16mf2(...) __riscv_vluxseg8ei16_v_u16mf2(__VA_ARGS__)
6226
#define vluxseg2ei16_v_u16m1(...) __riscv_vluxseg2ei16_v_u16m1(__VA_ARGS__)
6227
#define vluxseg3ei16_v_u16m1(...) __riscv_vluxseg3ei16_v_u16m1(__VA_ARGS__)
6228
#define vluxseg4ei16_v_u16m1(...) __riscv_vluxseg4ei16_v_u16m1(__VA_ARGS__)
6229
#define vluxseg5ei16_v_u16m1(...) __riscv_vluxseg5ei16_v_u16m1(__VA_ARGS__)
6230
#define vluxseg6ei16_v_u16m1(...) __riscv_vluxseg6ei16_v_u16m1(__VA_ARGS__)
6231
#define vluxseg7ei16_v_u16m1(...) __riscv_vluxseg7ei16_v_u16m1(__VA_ARGS__)
6232
#define vluxseg8ei16_v_u16m1(...) __riscv_vluxseg8ei16_v_u16m1(__VA_ARGS__)
6233
#define vluxseg2ei16_v_u16m2(...) __riscv_vluxseg2ei16_v_u16m2(__VA_ARGS__)
6234
#define vluxseg3ei16_v_u16m2(...) __riscv_vluxseg3ei16_v_u16m2(__VA_ARGS__)
6235
#define vluxseg4ei16_v_u16m2(...) __riscv_vluxseg4ei16_v_u16m2(__VA_ARGS__)
6236
#define vluxseg2ei16_v_u16m4(...) __riscv_vluxseg2ei16_v_u16m4(__VA_ARGS__)
6237
#define vluxseg2ei32_v_u16mf4(...) __riscv_vluxseg2ei32_v_u16mf4(__VA_ARGS__)
6238
#define vluxseg3ei32_v_u16mf4(...) __riscv_vluxseg3ei32_v_u16mf4(__VA_ARGS__)
6239
#define vluxseg4ei32_v_u16mf4(...) __riscv_vluxseg4ei32_v_u16mf4(__VA_ARGS__)
6240
#define vluxseg5ei32_v_u16mf4(...) __riscv_vluxseg5ei32_v_u16mf4(__VA_ARGS__)
6241
#define vluxseg6ei32_v_u16mf4(...) __riscv_vluxseg6ei32_v_u16mf4(__VA_ARGS__)
6242
#define vluxseg7ei32_v_u16mf4(...) __riscv_vluxseg7ei32_v_u16mf4(__VA_ARGS__)
6243
#define vluxseg8ei32_v_u16mf4(...) __riscv_vluxseg8ei32_v_u16mf4(__VA_ARGS__)
6244
#define vluxseg2ei32_v_u16mf2(...) __riscv_vluxseg2ei32_v_u16mf2(__VA_ARGS__)
6245
#define vluxseg3ei32_v_u16mf2(...) __riscv_vluxseg3ei32_v_u16mf2(__VA_ARGS__)
6246
#define vluxseg4ei32_v_u16mf2(...) __riscv_vluxseg4ei32_v_u16mf2(__VA_ARGS__)
6247
#define vluxseg5ei32_v_u16mf2(...) __riscv_vluxseg5ei32_v_u16mf2(__VA_ARGS__)
6248
#define vluxseg6ei32_v_u16mf2(...) __riscv_vluxseg6ei32_v_u16mf2(__VA_ARGS__)
6249
#define vluxseg7ei32_v_u16mf2(...) __riscv_vluxseg7ei32_v_u16mf2(__VA_ARGS__)
6250
#define vluxseg8ei32_v_u16mf2(...) __riscv_vluxseg8ei32_v_u16mf2(__VA_ARGS__)
6251
#define vluxseg2ei32_v_u16m1(...) __riscv_vluxseg2ei32_v_u16m1(__VA_ARGS__)
6252
#define vluxseg3ei32_v_u16m1(...) __riscv_vluxseg3ei32_v_u16m1(__VA_ARGS__)
6253
#define vluxseg4ei32_v_u16m1(...) __riscv_vluxseg4ei32_v_u16m1(__VA_ARGS__)
6254
#define vluxseg5ei32_v_u16m1(...) __riscv_vluxseg5ei32_v_u16m1(__VA_ARGS__)
6255
#define vluxseg6ei32_v_u16m1(...) __riscv_vluxseg6ei32_v_u16m1(__VA_ARGS__)
6256
#define vluxseg7ei32_v_u16m1(...) __riscv_vluxseg7ei32_v_u16m1(__VA_ARGS__)
6257
#define vluxseg8ei32_v_u16m1(...) __riscv_vluxseg8ei32_v_u16m1(__VA_ARGS__)
6258
#define vluxseg2ei32_v_u16m2(...) __riscv_vluxseg2ei32_v_u16m2(__VA_ARGS__)
6259
#define vluxseg3ei32_v_u16m2(...) __riscv_vluxseg3ei32_v_u16m2(__VA_ARGS__)
6260
#define vluxseg4ei32_v_u16m2(...) __riscv_vluxseg4ei32_v_u16m2(__VA_ARGS__)
6261
#define vluxseg2ei32_v_u16m4(...) __riscv_vluxseg2ei32_v_u16m4(__VA_ARGS__)
6262
#define vluxseg2ei64_v_u16mf4(...) __riscv_vluxseg2ei64_v_u16mf4(__VA_ARGS__)
6263
#define vluxseg3ei64_v_u16mf4(...) __riscv_vluxseg3ei64_v_u16mf4(__VA_ARGS__)
6264
#define vluxseg4ei64_v_u16mf4(...) __riscv_vluxseg4ei64_v_u16mf4(__VA_ARGS__)
6265
#define vluxseg5ei64_v_u16mf4(...) __riscv_vluxseg5ei64_v_u16mf4(__VA_ARGS__)
6266
#define vluxseg6ei64_v_u16mf4(...) __riscv_vluxseg6ei64_v_u16mf4(__VA_ARGS__)
6267
#define vluxseg7ei64_v_u16mf4(...) __riscv_vluxseg7ei64_v_u16mf4(__VA_ARGS__)
6268
#define vluxseg8ei64_v_u16mf4(...) __riscv_vluxseg8ei64_v_u16mf4(__VA_ARGS__)
6269
#define vluxseg2ei64_v_u16mf2(...) __riscv_vluxseg2ei64_v_u16mf2(__VA_ARGS__)
6270
#define vluxseg3ei64_v_u16mf2(...) __riscv_vluxseg3ei64_v_u16mf2(__VA_ARGS__)
6271
#define vluxseg4ei64_v_u16mf2(...) __riscv_vluxseg4ei64_v_u16mf2(__VA_ARGS__)
6272
#define vluxseg5ei64_v_u16mf2(...) __riscv_vluxseg5ei64_v_u16mf2(__VA_ARGS__)
6273
#define vluxseg6ei64_v_u16mf2(...) __riscv_vluxseg6ei64_v_u16mf2(__VA_ARGS__)
6274
#define vluxseg7ei64_v_u16mf2(...) __riscv_vluxseg7ei64_v_u16mf2(__VA_ARGS__)
6275
#define vluxseg8ei64_v_u16mf2(...) __riscv_vluxseg8ei64_v_u16mf2(__VA_ARGS__)
6276
#define vluxseg2ei64_v_u16m1(...) __riscv_vluxseg2ei64_v_u16m1(__VA_ARGS__)
6277
#define vluxseg3ei64_v_u16m1(...) __riscv_vluxseg3ei64_v_u16m1(__VA_ARGS__)
6278
#define vluxseg4ei64_v_u16m1(...) __riscv_vluxseg4ei64_v_u16m1(__VA_ARGS__)
6279
#define vluxseg5ei64_v_u16m1(...) __riscv_vluxseg5ei64_v_u16m1(__VA_ARGS__)
6280
#define vluxseg6ei64_v_u16m1(...) __riscv_vluxseg6ei64_v_u16m1(__VA_ARGS__)
6281
#define vluxseg7ei64_v_u16m1(...) __riscv_vluxseg7ei64_v_u16m1(__VA_ARGS__)
6282
#define vluxseg8ei64_v_u16m1(...) __riscv_vluxseg8ei64_v_u16m1(__VA_ARGS__)
6283
#define vluxseg2ei64_v_u16m2(...) __riscv_vluxseg2ei64_v_u16m2(__VA_ARGS__)
6284
#define vluxseg3ei64_v_u16m2(...) __riscv_vluxseg3ei64_v_u16m2(__VA_ARGS__)
6285
#define vluxseg4ei64_v_u16m2(...) __riscv_vluxseg4ei64_v_u16m2(__VA_ARGS__)
6286
#define vluxseg2ei8_v_u32mf2(...) __riscv_vluxseg2ei8_v_u32mf2(__VA_ARGS__)
6287
#define vluxseg3ei8_v_u32mf2(...) __riscv_vluxseg3ei8_v_u32mf2(__VA_ARGS__)
6288
#define vluxseg4ei8_v_u32mf2(...) __riscv_vluxseg4ei8_v_u32mf2(__VA_ARGS__)
6289
#define vluxseg5ei8_v_u32mf2(...) __riscv_vluxseg5ei8_v_u32mf2(__VA_ARGS__)
6290
#define vluxseg6ei8_v_u32mf2(...) __riscv_vluxseg6ei8_v_u32mf2(__VA_ARGS__)
6291
#define vluxseg7ei8_v_u32mf2(...) __riscv_vluxseg7ei8_v_u32mf2(__VA_ARGS__)
6292
#define vluxseg8ei8_v_u32mf2(...) __riscv_vluxseg8ei8_v_u32mf2(__VA_ARGS__)
6293
#define vluxseg2ei8_v_u32m1(...) __riscv_vluxseg2ei8_v_u32m1(__VA_ARGS__)
6294
#define vluxseg3ei8_v_u32m1(...) __riscv_vluxseg3ei8_v_u32m1(__VA_ARGS__)
6295
#define vluxseg4ei8_v_u32m1(...) __riscv_vluxseg4ei8_v_u32m1(__VA_ARGS__)
6296
#define vluxseg5ei8_v_u32m1(...) __riscv_vluxseg5ei8_v_u32m1(__VA_ARGS__)
6297
#define vluxseg6ei8_v_u32m1(...) __riscv_vluxseg6ei8_v_u32m1(__VA_ARGS__)
6298
#define vluxseg7ei8_v_u32m1(...) __riscv_vluxseg7ei8_v_u32m1(__VA_ARGS__)
6299
#define vluxseg8ei8_v_u32m1(...) __riscv_vluxseg8ei8_v_u32m1(__VA_ARGS__)
6300
#define vluxseg2ei8_v_u32m2(...) __riscv_vluxseg2ei8_v_u32m2(__VA_ARGS__)
6301
#define vluxseg3ei8_v_u32m2(...) __riscv_vluxseg3ei8_v_u32m2(__VA_ARGS__)
6302
#define vluxseg4ei8_v_u32m2(...) __riscv_vluxseg4ei8_v_u32m2(__VA_ARGS__)
6303
#define vluxseg2ei8_v_u32m4(...) __riscv_vluxseg2ei8_v_u32m4(__VA_ARGS__)
6304
#define vluxseg2ei16_v_u32mf2(...) __riscv_vluxseg2ei16_v_u32mf2(__VA_ARGS__)
6305
#define vluxseg3ei16_v_u32mf2(...) __riscv_vluxseg3ei16_v_u32mf2(__VA_ARGS__)
6306
#define vluxseg4ei16_v_u32mf2(...) __riscv_vluxseg4ei16_v_u32mf2(__VA_ARGS__)
6307
#define vluxseg5ei16_v_u32mf2(...) __riscv_vluxseg5ei16_v_u32mf2(__VA_ARGS__)
6308
#define vluxseg6ei16_v_u32mf2(...) __riscv_vluxseg6ei16_v_u32mf2(__VA_ARGS__)
6309
#define vluxseg7ei16_v_u32mf2(...) __riscv_vluxseg7ei16_v_u32mf2(__VA_ARGS__)
6310
#define vluxseg8ei16_v_u32mf2(...) __riscv_vluxseg8ei16_v_u32mf2(__VA_ARGS__)
6311
#define vluxseg2ei16_v_u32m1(...) __riscv_vluxseg2ei16_v_u32m1(__VA_ARGS__)
6312
#define vluxseg3ei16_v_u32m1(...) __riscv_vluxseg3ei16_v_u32m1(__VA_ARGS__)
6313
#define vluxseg4ei16_v_u32m1(...) __riscv_vluxseg4ei16_v_u32m1(__VA_ARGS__)
6314
#define vluxseg5ei16_v_u32m1(...) __riscv_vluxseg5ei16_v_u32m1(__VA_ARGS__)
6315
#define vluxseg6ei16_v_u32m1(...) __riscv_vluxseg6ei16_v_u32m1(__VA_ARGS__)
6316
#define vluxseg7ei16_v_u32m1(...) __riscv_vluxseg7ei16_v_u32m1(__VA_ARGS__)
6317
#define vluxseg8ei16_v_u32m1(...) __riscv_vluxseg8ei16_v_u32m1(__VA_ARGS__)
6318
#define vluxseg2ei16_v_u32m2(...) __riscv_vluxseg2ei16_v_u32m2(__VA_ARGS__)
6319
#define vluxseg3ei16_v_u32m2(...) __riscv_vluxseg3ei16_v_u32m2(__VA_ARGS__)
6320
#define vluxseg4ei16_v_u32m2(...) __riscv_vluxseg4ei16_v_u32m2(__VA_ARGS__)
6321
#define vluxseg2ei16_v_u32m4(...) __riscv_vluxseg2ei16_v_u32m4(__VA_ARGS__)
6322
#define vluxseg2ei32_v_u32mf2(...) __riscv_vluxseg2ei32_v_u32mf2(__VA_ARGS__)
6323
#define vluxseg3ei32_v_u32mf2(...) __riscv_vluxseg3ei32_v_u32mf2(__VA_ARGS__)
6324
#define vluxseg4ei32_v_u32mf2(...) __riscv_vluxseg4ei32_v_u32mf2(__VA_ARGS__)
6325
#define vluxseg5ei32_v_u32mf2(...) __riscv_vluxseg5ei32_v_u32mf2(__VA_ARGS__)
6326
#define vluxseg6ei32_v_u32mf2(...) __riscv_vluxseg6ei32_v_u32mf2(__VA_ARGS__)
6327
#define vluxseg7ei32_v_u32mf2(...) __riscv_vluxseg7ei32_v_u32mf2(__VA_ARGS__)
6328
#define vluxseg8ei32_v_u32mf2(...) __riscv_vluxseg8ei32_v_u32mf2(__VA_ARGS__)
6329
#define vluxseg2ei32_v_u32m1(...) __riscv_vluxseg2ei32_v_u32m1(__VA_ARGS__)
6330
#define vluxseg3ei32_v_u32m1(...) __riscv_vluxseg3ei32_v_u32m1(__VA_ARGS__)
6331
#define vluxseg4ei32_v_u32m1(...) __riscv_vluxseg4ei32_v_u32m1(__VA_ARGS__)
6332
#define vluxseg5ei32_v_u32m1(...) __riscv_vluxseg5ei32_v_u32m1(__VA_ARGS__)
6333
#define vluxseg6ei32_v_u32m1(...) __riscv_vluxseg6ei32_v_u32m1(__VA_ARGS__)
6334
#define vluxseg7ei32_v_u32m1(...) __riscv_vluxseg7ei32_v_u32m1(__VA_ARGS__)
6335
#define vluxseg8ei32_v_u32m1(...) __riscv_vluxseg8ei32_v_u32m1(__VA_ARGS__)
6336
#define vluxseg2ei32_v_u32m2(...) __riscv_vluxseg2ei32_v_u32m2(__VA_ARGS__)
6337
#define vluxseg3ei32_v_u32m2(...) __riscv_vluxseg3ei32_v_u32m2(__VA_ARGS__)
6338
#define vluxseg4ei32_v_u32m2(...) __riscv_vluxseg4ei32_v_u32m2(__VA_ARGS__)
6339
#define vluxseg2ei32_v_u32m4(...) __riscv_vluxseg2ei32_v_u32m4(__VA_ARGS__)
6340
#define vluxseg2ei64_v_u32mf2(...) __riscv_vluxseg2ei64_v_u32mf2(__VA_ARGS__)
6341
#define vluxseg3ei64_v_u32mf2(...) __riscv_vluxseg3ei64_v_u32mf2(__VA_ARGS__)
6342
#define vluxseg4ei64_v_u32mf2(...) __riscv_vluxseg4ei64_v_u32mf2(__VA_ARGS__)
6343
#define vluxseg5ei64_v_u32mf2(...) __riscv_vluxseg5ei64_v_u32mf2(__VA_ARGS__)
6344
#define vluxseg6ei64_v_u32mf2(...) __riscv_vluxseg6ei64_v_u32mf2(__VA_ARGS__)
6345
#define vluxseg7ei64_v_u32mf2(...) __riscv_vluxseg7ei64_v_u32mf2(__VA_ARGS__)
6346
#define vluxseg8ei64_v_u32mf2(...) __riscv_vluxseg8ei64_v_u32mf2(__VA_ARGS__)
6347
#define vluxseg2ei64_v_u32m1(...) __riscv_vluxseg2ei64_v_u32m1(__VA_ARGS__)
6348
#define vluxseg3ei64_v_u32m1(...) __riscv_vluxseg3ei64_v_u32m1(__VA_ARGS__)
6349
#define vluxseg4ei64_v_u32m1(...) __riscv_vluxseg4ei64_v_u32m1(__VA_ARGS__)
6350
#define vluxseg5ei64_v_u32m1(...) __riscv_vluxseg5ei64_v_u32m1(__VA_ARGS__)
6351
#define vluxseg6ei64_v_u32m1(...) __riscv_vluxseg6ei64_v_u32m1(__VA_ARGS__)
6352
#define vluxseg7ei64_v_u32m1(...) __riscv_vluxseg7ei64_v_u32m1(__VA_ARGS__)
6353
#define vluxseg8ei64_v_u32m1(...) __riscv_vluxseg8ei64_v_u32m1(__VA_ARGS__)
6354
#define vluxseg2ei64_v_u32m2(...) __riscv_vluxseg2ei64_v_u32m2(__VA_ARGS__)
6355
#define vluxseg3ei64_v_u32m2(...) __riscv_vluxseg3ei64_v_u32m2(__VA_ARGS__)
6356
#define vluxseg4ei64_v_u32m2(...) __riscv_vluxseg4ei64_v_u32m2(__VA_ARGS__)
6357
#define vluxseg2ei64_v_u32m4(...) __riscv_vluxseg2ei64_v_u32m4(__VA_ARGS__)
6358
#define vluxseg2ei8_v_u64m1(...) __riscv_vluxseg2ei8_v_u64m1(__VA_ARGS__)
6359
#define vluxseg3ei8_v_u64m1(...) __riscv_vluxseg3ei8_v_u64m1(__VA_ARGS__)
6360
#define vluxseg4ei8_v_u64m1(...) __riscv_vluxseg4ei8_v_u64m1(__VA_ARGS__)
6361
#define vluxseg5ei8_v_u64m1(...) __riscv_vluxseg5ei8_v_u64m1(__VA_ARGS__)
6362
#define vluxseg6ei8_v_u64m1(...) __riscv_vluxseg6ei8_v_u64m1(__VA_ARGS__)
6363
#define vluxseg7ei8_v_u64m1(...) __riscv_vluxseg7ei8_v_u64m1(__VA_ARGS__)
6364
#define vluxseg8ei8_v_u64m1(...) __riscv_vluxseg8ei8_v_u64m1(__VA_ARGS__)
6365
#define vluxseg2ei8_v_u64m2(...) __riscv_vluxseg2ei8_v_u64m2(__VA_ARGS__)
6366
#define vluxseg3ei8_v_u64m2(...) __riscv_vluxseg3ei8_v_u64m2(__VA_ARGS__)
6367
#define vluxseg4ei8_v_u64m2(...) __riscv_vluxseg4ei8_v_u64m2(__VA_ARGS__)
6368
#define vluxseg2ei8_v_u64m4(...) __riscv_vluxseg2ei8_v_u64m4(__VA_ARGS__)
6369
#define vluxseg2ei16_v_u64m1(...) __riscv_vluxseg2ei16_v_u64m1(__VA_ARGS__)
6370
#define vluxseg3ei16_v_u64m1(...) __riscv_vluxseg3ei16_v_u64m1(__VA_ARGS__)
6371
#define vluxseg4ei16_v_u64m1(...) __riscv_vluxseg4ei16_v_u64m1(__VA_ARGS__)
6372
#define vluxseg5ei16_v_u64m1(...) __riscv_vluxseg5ei16_v_u64m1(__VA_ARGS__)
6373
#define vluxseg6ei16_v_u64m1(...) __riscv_vluxseg6ei16_v_u64m1(__VA_ARGS__)
6374
#define vluxseg7ei16_v_u64m1(...) __riscv_vluxseg7ei16_v_u64m1(__VA_ARGS__)
6375
#define vluxseg8ei16_v_u64m1(...) __riscv_vluxseg8ei16_v_u64m1(__VA_ARGS__)
6376
#define vluxseg2ei16_v_u64m2(...) __riscv_vluxseg2ei16_v_u64m2(__VA_ARGS__)
6377
#define vluxseg3ei16_v_u64m2(...) __riscv_vluxseg3ei16_v_u64m2(__VA_ARGS__)
6378
#define vluxseg4ei16_v_u64m2(...) __riscv_vluxseg4ei16_v_u64m2(__VA_ARGS__)
6379
#define vluxseg2ei16_v_u64m4(...) __riscv_vluxseg2ei16_v_u64m4(__VA_ARGS__)
6380
#define vluxseg2ei32_v_u64m1(...) __riscv_vluxseg2ei32_v_u64m1(__VA_ARGS__)
6381
#define vluxseg3ei32_v_u64m1(...) __riscv_vluxseg3ei32_v_u64m1(__VA_ARGS__)
6382
#define vluxseg4ei32_v_u64m1(...) __riscv_vluxseg4ei32_v_u64m1(__VA_ARGS__)
6383
#define vluxseg5ei32_v_u64m1(...) __riscv_vluxseg5ei32_v_u64m1(__VA_ARGS__)
6384
#define vluxseg6ei32_v_u64m1(...) __riscv_vluxseg6ei32_v_u64m1(__VA_ARGS__)
6385
#define vluxseg7ei32_v_u64m1(...) __riscv_vluxseg7ei32_v_u64m1(__VA_ARGS__)
6386
#define vluxseg8ei32_v_u64m1(...) __riscv_vluxseg8ei32_v_u64m1(__VA_ARGS__)
6387
#define vluxseg2ei32_v_u64m2(...) __riscv_vluxseg2ei32_v_u64m2(__VA_ARGS__)
6388
#define vluxseg3ei32_v_u64m2(...) __riscv_vluxseg3ei32_v_u64m2(__VA_ARGS__)
6389
#define vluxseg4ei32_v_u64m2(...) __riscv_vluxseg4ei32_v_u64m2(__VA_ARGS__)
6390
#define vluxseg2ei32_v_u64m4(...) __riscv_vluxseg2ei32_v_u64m4(__VA_ARGS__)
6391
#define vluxseg2ei64_v_u64m1(...) __riscv_vluxseg2ei64_v_u64m1(__VA_ARGS__)
6392
#define vluxseg3ei64_v_u64m1(...) __riscv_vluxseg3ei64_v_u64m1(__VA_ARGS__)
6393
#define vluxseg4ei64_v_u64m1(...) __riscv_vluxseg4ei64_v_u64m1(__VA_ARGS__)
6394
#define vluxseg5ei64_v_u64m1(...) __riscv_vluxseg5ei64_v_u64m1(__VA_ARGS__)
6395
#define vluxseg6ei64_v_u64m1(...) __riscv_vluxseg6ei64_v_u64m1(__VA_ARGS__)
6396
#define vluxseg7ei64_v_u64m1(...) __riscv_vluxseg7ei64_v_u64m1(__VA_ARGS__)
6397
#define vluxseg8ei64_v_u64m1(...) __riscv_vluxseg8ei64_v_u64m1(__VA_ARGS__)
6398
#define vluxseg2ei64_v_u64m2(...) __riscv_vluxseg2ei64_v_u64m2(__VA_ARGS__)
6399
#define vluxseg3ei64_v_u64m2(...) __riscv_vluxseg3ei64_v_u64m2(__VA_ARGS__)
6400
#define vluxseg4ei64_v_u64m2(...) __riscv_vluxseg4ei64_v_u64m2(__VA_ARGS__)
6401
#define vluxseg2ei64_v_u64m4(...) __riscv_vluxseg2ei64_v_u64m4(__VA_ARGS__)
6402
// masked functions
6403
#define vloxseg2ei8_v_f16mf4_m(...) __riscv_vloxseg2ei8_v_f16mf4_tumu(__VA_ARGS__)
6404
#define vloxseg3ei8_v_f16mf4_m(...) __riscv_vloxseg3ei8_v_f16mf4_tumu(__VA_ARGS__)
6405
#define vloxseg4ei8_v_f16mf4_m(...) __riscv_vloxseg4ei8_v_f16mf4_tumu(__VA_ARGS__)
6406
#define vloxseg5ei8_v_f16mf4_m(...) __riscv_vloxseg5ei8_v_f16mf4_tumu(__VA_ARGS__)
6407
#define vloxseg6ei8_v_f16mf4_m(...) __riscv_vloxseg6ei8_v_f16mf4_tumu(__VA_ARGS__)
6408
#define vloxseg7ei8_v_f16mf4_m(...) __riscv_vloxseg7ei8_v_f16mf4_tumu(__VA_ARGS__)
6409
#define vloxseg8ei8_v_f16mf4_m(...) __riscv_vloxseg8ei8_v_f16mf4_tumu(__VA_ARGS__)
6410
#define vloxseg2ei8_v_f16mf2_m(...) __riscv_vloxseg2ei8_v_f16mf2_tumu(__VA_ARGS__)
6411
#define vloxseg3ei8_v_f16mf2_m(...) __riscv_vloxseg3ei8_v_f16mf2_tumu(__VA_ARGS__)
6412
#define vloxseg4ei8_v_f16mf2_m(...) __riscv_vloxseg4ei8_v_f16mf2_tumu(__VA_ARGS__)
6413
#define vloxseg5ei8_v_f16mf2_m(...) __riscv_vloxseg5ei8_v_f16mf2_tumu(__VA_ARGS__)
6414
#define vloxseg6ei8_v_f16mf2_m(...) __riscv_vloxseg6ei8_v_f16mf2_tumu(__VA_ARGS__)
6415
#define vloxseg7ei8_v_f16mf2_m(...) __riscv_vloxseg7ei8_v_f16mf2_tumu(__VA_ARGS__)
6416
#define vloxseg8ei8_v_f16mf2_m(...) __riscv_vloxseg8ei8_v_f16mf2_tumu(__VA_ARGS__)
6417
#define vloxseg2ei8_v_f16m1_m(...) __riscv_vloxseg2ei8_v_f16m1_tumu(__VA_ARGS__)
6418
#define vloxseg3ei8_v_f16m1_m(...) __riscv_vloxseg3ei8_v_f16m1_tumu(__VA_ARGS__)
6419
#define vloxseg4ei8_v_f16m1_m(...) __riscv_vloxseg4ei8_v_f16m1_tumu(__VA_ARGS__)
6420
#define vloxseg5ei8_v_f16m1_m(...) __riscv_vloxseg5ei8_v_f16m1_tumu(__VA_ARGS__)
6421
#define vloxseg6ei8_v_f16m1_m(...) __riscv_vloxseg6ei8_v_f16m1_tumu(__VA_ARGS__)
6422
#define vloxseg7ei8_v_f16m1_m(...) __riscv_vloxseg7ei8_v_f16m1_tumu(__VA_ARGS__)
6423
#define vloxseg8ei8_v_f16m1_m(...) __riscv_vloxseg8ei8_v_f16m1_tumu(__VA_ARGS__)
6424
#define vloxseg2ei8_v_f16m2_m(...) __riscv_vloxseg2ei8_v_f16m2_tumu(__VA_ARGS__)
6425
#define vloxseg3ei8_v_f16m2_m(...) __riscv_vloxseg3ei8_v_f16m2_tumu(__VA_ARGS__)
6426
#define vloxseg4ei8_v_f16m2_m(...) __riscv_vloxseg4ei8_v_f16m2_tumu(__VA_ARGS__)
6427
#define vloxseg2ei8_v_f16m4_m(...) __riscv_vloxseg2ei8_v_f16m4_tumu(__VA_ARGS__)
6428
#define vloxseg2ei16_v_f16mf4_m(...) __riscv_vloxseg2ei16_v_f16mf4_tumu(__VA_ARGS__)
6429
#define vloxseg3ei16_v_f16mf4_m(...) __riscv_vloxseg3ei16_v_f16mf4_tumu(__VA_ARGS__)
6430
#define vloxseg4ei16_v_f16mf4_m(...) __riscv_vloxseg4ei16_v_f16mf4_tumu(__VA_ARGS__)
6431
#define vloxseg5ei16_v_f16mf4_m(...) __riscv_vloxseg5ei16_v_f16mf4_tumu(__VA_ARGS__)
6432
#define vloxseg6ei16_v_f16mf4_m(...) __riscv_vloxseg6ei16_v_f16mf4_tumu(__VA_ARGS__)
6433
#define vloxseg7ei16_v_f16mf4_m(...) __riscv_vloxseg7ei16_v_f16mf4_tumu(__VA_ARGS__)
6434
#define vloxseg8ei16_v_f16mf4_m(...) __riscv_vloxseg8ei16_v_f16mf4_tumu(__VA_ARGS__)
6435
#define vloxseg2ei16_v_f16mf2_m(...) __riscv_vloxseg2ei16_v_f16mf2_tumu(__VA_ARGS__)
6436
#define vloxseg3ei16_v_f16mf2_m(...) __riscv_vloxseg3ei16_v_f16mf2_tumu(__VA_ARGS__)
6437
#define vloxseg4ei16_v_f16mf2_m(...) __riscv_vloxseg4ei16_v_f16mf2_tumu(__VA_ARGS__)
6438
#define vloxseg5ei16_v_f16mf2_m(...) __riscv_vloxseg5ei16_v_f16mf2_tumu(__VA_ARGS__)
6439
#define vloxseg6ei16_v_f16mf2_m(...) __riscv_vloxseg6ei16_v_f16mf2_tumu(__VA_ARGS__)
6440
#define vloxseg7ei16_v_f16mf2_m(...) __riscv_vloxseg7ei16_v_f16mf2_tumu(__VA_ARGS__)
6441
#define vloxseg8ei16_v_f16mf2_m(...) __riscv_vloxseg8ei16_v_f16mf2_tumu(__VA_ARGS__)
6442
#define vloxseg2ei16_v_f16m1_m(...) __riscv_vloxseg2ei16_v_f16m1_tumu(__VA_ARGS__)
6443
#define vloxseg3ei16_v_f16m1_m(...) __riscv_vloxseg3ei16_v_f16m1_tumu(__VA_ARGS__)
6444
#define vloxseg4ei16_v_f16m1_m(...) __riscv_vloxseg4ei16_v_f16m1_tumu(__VA_ARGS__)
6445
#define vloxseg5ei16_v_f16m1_m(...) __riscv_vloxseg5ei16_v_f16m1_tumu(__VA_ARGS__)
6446
#define vloxseg6ei16_v_f16m1_m(...) __riscv_vloxseg6ei16_v_f16m1_tumu(__VA_ARGS__)
6447
#define vloxseg7ei16_v_f16m1_m(...) __riscv_vloxseg7ei16_v_f16m1_tumu(__VA_ARGS__)
6448
#define vloxseg8ei16_v_f16m1_m(...) __riscv_vloxseg8ei16_v_f16m1_tumu(__VA_ARGS__)
6449
#define vloxseg2ei16_v_f16m2_m(...) __riscv_vloxseg2ei16_v_f16m2_tumu(__VA_ARGS__)
6450
#define vloxseg3ei16_v_f16m2_m(...) __riscv_vloxseg3ei16_v_f16m2_tumu(__VA_ARGS__)
6451
#define vloxseg4ei16_v_f16m2_m(...) __riscv_vloxseg4ei16_v_f16m2_tumu(__VA_ARGS__)
6452
#define vloxseg2ei16_v_f16m4_m(...) __riscv_vloxseg2ei16_v_f16m4_tumu(__VA_ARGS__)
6453
#define vloxseg2ei32_v_f16mf4_m(...) __riscv_vloxseg2ei32_v_f16mf4_tumu(__VA_ARGS__)
6454
#define vloxseg3ei32_v_f16mf4_m(...) __riscv_vloxseg3ei32_v_f16mf4_tumu(__VA_ARGS__)
6455
#define vloxseg4ei32_v_f16mf4_m(...) __riscv_vloxseg4ei32_v_f16mf4_tumu(__VA_ARGS__)
6456
#define vloxseg5ei32_v_f16mf4_m(...) __riscv_vloxseg5ei32_v_f16mf4_tumu(__VA_ARGS__)
6457
#define vloxseg6ei32_v_f16mf4_m(...) __riscv_vloxseg6ei32_v_f16mf4_tumu(__VA_ARGS__)
6458
#define vloxseg7ei32_v_f16mf4_m(...) __riscv_vloxseg7ei32_v_f16mf4_tumu(__VA_ARGS__)
6459
#define vloxseg8ei32_v_f16mf4_m(...) __riscv_vloxseg8ei32_v_f16mf4_tumu(__VA_ARGS__)
6460
#define vloxseg2ei32_v_f16mf2_m(...) __riscv_vloxseg2ei32_v_f16mf2_tumu(__VA_ARGS__)
6461
#define vloxseg3ei32_v_f16mf2_m(...) __riscv_vloxseg3ei32_v_f16mf2_tumu(__VA_ARGS__)
6462
#define vloxseg4ei32_v_f16mf2_m(...) __riscv_vloxseg4ei32_v_f16mf2_tumu(__VA_ARGS__)
6463
#define vloxseg5ei32_v_f16mf2_m(...) __riscv_vloxseg5ei32_v_f16mf2_tumu(__VA_ARGS__)
6464
#define vloxseg6ei32_v_f16mf2_m(...) __riscv_vloxseg6ei32_v_f16mf2_tumu(__VA_ARGS__)
6465
#define vloxseg7ei32_v_f16mf2_m(...) __riscv_vloxseg7ei32_v_f16mf2_tumu(__VA_ARGS__)
6466
#define vloxseg8ei32_v_f16mf2_m(...) __riscv_vloxseg8ei32_v_f16mf2_tumu(__VA_ARGS__)
6467
#define vloxseg2ei32_v_f16m1_m(...) __riscv_vloxseg2ei32_v_f16m1_tumu(__VA_ARGS__)
6468
#define vloxseg3ei32_v_f16m1_m(...) __riscv_vloxseg3ei32_v_f16m1_tumu(__VA_ARGS__)
6469
#define vloxseg4ei32_v_f16m1_m(...) __riscv_vloxseg4ei32_v_f16m1_tumu(__VA_ARGS__)
6470
#define vloxseg5ei32_v_f16m1_m(...) __riscv_vloxseg5ei32_v_f16m1_tumu(__VA_ARGS__)
6471
#define vloxseg6ei32_v_f16m1_m(...) __riscv_vloxseg6ei32_v_f16m1_tumu(__VA_ARGS__)
6472
#define vloxseg7ei32_v_f16m1_m(...) __riscv_vloxseg7ei32_v_f16m1_tumu(__VA_ARGS__)
6473
#define vloxseg8ei32_v_f16m1_m(...) __riscv_vloxseg8ei32_v_f16m1_tumu(__VA_ARGS__)
6474
#define vloxseg2ei32_v_f16m2_m(...) __riscv_vloxseg2ei32_v_f16m2_tumu(__VA_ARGS__)
6475
#define vloxseg3ei32_v_f16m2_m(...) __riscv_vloxseg3ei32_v_f16m2_tumu(__VA_ARGS__)
6476
#define vloxseg4ei32_v_f16m2_m(...) __riscv_vloxseg4ei32_v_f16m2_tumu(__VA_ARGS__)
6477
#define vloxseg2ei32_v_f16m4_m(...) __riscv_vloxseg2ei32_v_f16m4_tumu(__VA_ARGS__)
6478
#define vloxseg2ei64_v_f16mf4_m(...) __riscv_vloxseg2ei64_v_f16mf4_tumu(__VA_ARGS__)
6479
#define vloxseg3ei64_v_f16mf4_m(...) __riscv_vloxseg3ei64_v_f16mf4_tumu(__VA_ARGS__)
6480
#define vloxseg4ei64_v_f16mf4_m(...) __riscv_vloxseg4ei64_v_f16mf4_tumu(__VA_ARGS__)
6481
#define vloxseg5ei64_v_f16mf4_m(...) __riscv_vloxseg5ei64_v_f16mf4_tumu(__VA_ARGS__)
6482
#define vloxseg6ei64_v_f16mf4_m(...) __riscv_vloxseg6ei64_v_f16mf4_tumu(__VA_ARGS__)
6483
#define vloxseg7ei64_v_f16mf4_m(...) __riscv_vloxseg7ei64_v_f16mf4_tumu(__VA_ARGS__)
6484
#define vloxseg8ei64_v_f16mf4_m(...) __riscv_vloxseg8ei64_v_f16mf4_tumu(__VA_ARGS__)
6485
#define vloxseg2ei64_v_f16mf2_m(...) __riscv_vloxseg2ei64_v_f16mf2_tumu(__VA_ARGS__)
6486
#define vloxseg3ei64_v_f16mf2_m(...) __riscv_vloxseg3ei64_v_f16mf2_tumu(__VA_ARGS__)
6487
#define vloxseg4ei64_v_f16mf2_m(...) __riscv_vloxseg4ei64_v_f16mf2_tumu(__VA_ARGS__)
6488
#define vloxseg5ei64_v_f16mf2_m(...) __riscv_vloxseg5ei64_v_f16mf2_tumu(__VA_ARGS__)
6489
#define vloxseg6ei64_v_f16mf2_m(...) __riscv_vloxseg6ei64_v_f16mf2_tumu(__VA_ARGS__)
6490
#define vloxseg7ei64_v_f16mf2_m(...) __riscv_vloxseg7ei64_v_f16mf2_tumu(__VA_ARGS__)
6491
#define vloxseg8ei64_v_f16mf2_m(...) __riscv_vloxseg8ei64_v_f16mf2_tumu(__VA_ARGS__)
6492
#define vloxseg2ei64_v_f16m1_m(...) __riscv_vloxseg2ei64_v_f16m1_tumu(__VA_ARGS__)
6493
#define vloxseg3ei64_v_f16m1_m(...) __riscv_vloxseg3ei64_v_f16m1_tumu(__VA_ARGS__)
6494
#define vloxseg4ei64_v_f16m1_m(...) __riscv_vloxseg4ei64_v_f16m1_tumu(__VA_ARGS__)
6495
#define vloxseg5ei64_v_f16m1_m(...) __riscv_vloxseg5ei64_v_f16m1_tumu(__VA_ARGS__)
6496
#define vloxseg6ei64_v_f16m1_m(...) __riscv_vloxseg6ei64_v_f16m1_tumu(__VA_ARGS__)
6497
#define vloxseg7ei64_v_f16m1_m(...) __riscv_vloxseg7ei64_v_f16m1_tumu(__VA_ARGS__)
6498
#define vloxseg8ei64_v_f16m1_m(...) __riscv_vloxseg8ei64_v_f16m1_tumu(__VA_ARGS__)
6499
#define vloxseg2ei64_v_f16m2_m(...) __riscv_vloxseg2ei64_v_f16m2_tumu(__VA_ARGS__)
6500
#define vloxseg3ei64_v_f16m2_m(...) __riscv_vloxseg3ei64_v_f16m2_tumu(__VA_ARGS__)
6501
#define vloxseg4ei64_v_f16m2_m(...) __riscv_vloxseg4ei64_v_f16m2_tumu(__VA_ARGS__)
6502
#define vloxseg2ei8_v_f32mf2_m(...) __riscv_vloxseg2ei8_v_f32mf2_tumu(__VA_ARGS__)
6503
#define vloxseg3ei8_v_f32mf2_m(...) __riscv_vloxseg3ei8_v_f32mf2_tumu(__VA_ARGS__)
6504
#define vloxseg4ei8_v_f32mf2_m(...) __riscv_vloxseg4ei8_v_f32mf2_tumu(__VA_ARGS__)
6505
#define vloxseg5ei8_v_f32mf2_m(...) __riscv_vloxseg5ei8_v_f32mf2_tumu(__VA_ARGS__)
6506
#define vloxseg6ei8_v_f32mf2_m(...) __riscv_vloxseg6ei8_v_f32mf2_tumu(__VA_ARGS__)
6507
#define vloxseg7ei8_v_f32mf2_m(...) __riscv_vloxseg7ei8_v_f32mf2_tumu(__VA_ARGS__)
6508
#define vloxseg8ei8_v_f32mf2_m(...) __riscv_vloxseg8ei8_v_f32mf2_tumu(__VA_ARGS__)
6509
#define vloxseg2ei8_v_f32m1_m(...) __riscv_vloxseg2ei8_v_f32m1_tumu(__VA_ARGS__)
6510
#define vloxseg3ei8_v_f32m1_m(...) __riscv_vloxseg3ei8_v_f32m1_tumu(__VA_ARGS__)
6511
#define vloxseg4ei8_v_f32m1_m(...) __riscv_vloxseg4ei8_v_f32m1_tumu(__VA_ARGS__)
6512
#define vloxseg5ei8_v_f32m1_m(...) __riscv_vloxseg5ei8_v_f32m1_tumu(__VA_ARGS__)
6513
#define vloxseg6ei8_v_f32m1_m(...) __riscv_vloxseg6ei8_v_f32m1_tumu(__VA_ARGS__)
6514
#define vloxseg7ei8_v_f32m1_m(...) __riscv_vloxseg7ei8_v_f32m1_tumu(__VA_ARGS__)
6515
#define vloxseg8ei8_v_f32m1_m(...) __riscv_vloxseg8ei8_v_f32m1_tumu(__VA_ARGS__)
6516
#define vloxseg2ei8_v_f32m2_m(...) __riscv_vloxseg2ei8_v_f32m2_tumu(__VA_ARGS__)
6517
#define vloxseg3ei8_v_f32m2_m(...) __riscv_vloxseg3ei8_v_f32m2_tumu(__VA_ARGS__)
6518
#define vloxseg4ei8_v_f32m2_m(...) __riscv_vloxseg4ei8_v_f32m2_tumu(__VA_ARGS__)
6519
#define vloxseg2ei8_v_f32m4_m(...) __riscv_vloxseg2ei8_v_f32m4_tumu(__VA_ARGS__)
6520
#define vloxseg2ei16_v_f32mf2_m(...) __riscv_vloxseg2ei16_v_f32mf2_tumu(__VA_ARGS__)
6521
#define vloxseg3ei16_v_f32mf2_m(...) __riscv_vloxseg3ei16_v_f32mf2_tumu(__VA_ARGS__)
6522
#define vloxseg4ei16_v_f32mf2_m(...) __riscv_vloxseg4ei16_v_f32mf2_tumu(__VA_ARGS__)
6523
#define vloxseg5ei16_v_f32mf2_m(...) __riscv_vloxseg5ei16_v_f32mf2_tumu(__VA_ARGS__)
6524
#define vloxseg6ei16_v_f32mf2_m(...) __riscv_vloxseg6ei16_v_f32mf2_tumu(__VA_ARGS__)
6525
#define vloxseg7ei16_v_f32mf2_m(...) __riscv_vloxseg7ei16_v_f32mf2_tumu(__VA_ARGS__)
6526
#define vloxseg8ei16_v_f32mf2_m(...) __riscv_vloxseg8ei16_v_f32mf2_tumu(__VA_ARGS__)
6527
#define vloxseg2ei16_v_f32m1_m(...) __riscv_vloxseg2ei16_v_f32m1_tumu(__VA_ARGS__)
6528
#define vloxseg3ei16_v_f32m1_m(...) __riscv_vloxseg3ei16_v_f32m1_tumu(__VA_ARGS__)
6529
#define vloxseg4ei16_v_f32m1_m(...) __riscv_vloxseg4ei16_v_f32m1_tumu(__VA_ARGS__)
6530
#define vloxseg5ei16_v_f32m1_m(...) __riscv_vloxseg5ei16_v_f32m1_tumu(__VA_ARGS__)
6531
#define vloxseg6ei16_v_f32m1_m(...) __riscv_vloxseg6ei16_v_f32m1_tumu(__VA_ARGS__)
6532
#define vloxseg7ei16_v_f32m1_m(...) __riscv_vloxseg7ei16_v_f32m1_tumu(__VA_ARGS__)
6533
#define vloxseg8ei16_v_f32m1_m(...) __riscv_vloxseg8ei16_v_f32m1_tumu(__VA_ARGS__)
6534
#define vloxseg2ei16_v_f32m2_m(...) __riscv_vloxseg2ei16_v_f32m2_tumu(__VA_ARGS__)
6535
#define vloxseg3ei16_v_f32m2_m(...) __riscv_vloxseg3ei16_v_f32m2_tumu(__VA_ARGS__)
6536
#define vloxseg4ei16_v_f32m2_m(...) __riscv_vloxseg4ei16_v_f32m2_tumu(__VA_ARGS__)
6537
#define vloxseg2ei16_v_f32m4_m(...) __riscv_vloxseg2ei16_v_f32m4_tumu(__VA_ARGS__)
6538
#define vloxseg2ei32_v_f32mf2_m(...) __riscv_vloxseg2ei32_v_f32mf2_tumu(__VA_ARGS__)
6539
#define vloxseg3ei32_v_f32mf2_m(...) __riscv_vloxseg3ei32_v_f32mf2_tumu(__VA_ARGS__)
6540
#define vloxseg4ei32_v_f32mf2_m(...) __riscv_vloxseg4ei32_v_f32mf2_tumu(__VA_ARGS__)
6541
#define vloxseg5ei32_v_f32mf2_m(...) __riscv_vloxseg5ei32_v_f32mf2_tumu(__VA_ARGS__)
6542
#define vloxseg6ei32_v_f32mf2_m(...) __riscv_vloxseg6ei32_v_f32mf2_tumu(__VA_ARGS__)
6543
#define vloxseg7ei32_v_f32mf2_m(...) __riscv_vloxseg7ei32_v_f32mf2_tumu(__VA_ARGS__)
6544
#define vloxseg8ei32_v_f32mf2_m(...) __riscv_vloxseg8ei32_v_f32mf2_tumu(__VA_ARGS__)
6545
#define vloxseg2ei32_v_f32m1_m(...) __riscv_vloxseg2ei32_v_f32m1_tumu(__VA_ARGS__)
6546
#define vloxseg3ei32_v_f32m1_m(...) __riscv_vloxseg3ei32_v_f32m1_tumu(__VA_ARGS__)
6547
#define vloxseg4ei32_v_f32m1_m(...) __riscv_vloxseg4ei32_v_f32m1_tumu(__VA_ARGS__)
6548
#define vloxseg5ei32_v_f32m1_m(...) __riscv_vloxseg5ei32_v_f32m1_tumu(__VA_ARGS__)
6549
#define vloxseg6ei32_v_f32m1_m(...) __riscv_vloxseg6ei32_v_f32m1_tumu(__VA_ARGS__)
6550
#define vloxseg7ei32_v_f32m1_m(...) __riscv_vloxseg7ei32_v_f32m1_tumu(__VA_ARGS__)
6551
#define vloxseg8ei32_v_f32m1_m(...) __riscv_vloxseg8ei32_v_f32m1_tumu(__VA_ARGS__)
6552
#define vloxseg2ei32_v_f32m2_m(...) __riscv_vloxseg2ei32_v_f32m2_tumu(__VA_ARGS__)
6553
#define vloxseg3ei32_v_f32m2_m(...) __riscv_vloxseg3ei32_v_f32m2_tumu(__VA_ARGS__)
6554
#define vloxseg4ei32_v_f32m2_m(...) __riscv_vloxseg4ei32_v_f32m2_tumu(__VA_ARGS__)
6555
#define vloxseg2ei32_v_f32m4_m(...) __riscv_vloxseg2ei32_v_f32m4_tumu(__VA_ARGS__)
6556
#define vloxseg2ei64_v_f32mf2_m(...) __riscv_vloxseg2ei64_v_f32mf2_tumu(__VA_ARGS__)
6557
#define vloxseg3ei64_v_f32mf2_m(...) __riscv_vloxseg3ei64_v_f32mf2_tumu(__VA_ARGS__)
6558
#define vloxseg4ei64_v_f32mf2_m(...) __riscv_vloxseg4ei64_v_f32mf2_tumu(__VA_ARGS__)
6559
#define vloxseg5ei64_v_f32mf2_m(...) __riscv_vloxseg5ei64_v_f32mf2_tumu(__VA_ARGS__)
6560
#define vloxseg6ei64_v_f32mf2_m(...) __riscv_vloxseg6ei64_v_f32mf2_tumu(__VA_ARGS__)
6561
#define vloxseg7ei64_v_f32mf2_m(...) __riscv_vloxseg7ei64_v_f32mf2_tumu(__VA_ARGS__)
6562
#define vloxseg8ei64_v_f32mf2_m(...) __riscv_vloxseg8ei64_v_f32mf2_tumu(__VA_ARGS__)
6563
#define vloxseg2ei64_v_f32m1_m(...) __riscv_vloxseg2ei64_v_f32m1_tumu(__VA_ARGS__)
6564
#define vloxseg3ei64_v_f32m1_m(...) __riscv_vloxseg3ei64_v_f32m1_tumu(__VA_ARGS__)
6565
#define vloxseg4ei64_v_f32m1_m(...) __riscv_vloxseg4ei64_v_f32m1_tumu(__VA_ARGS__)
6566
#define vloxseg5ei64_v_f32m1_m(...) __riscv_vloxseg5ei64_v_f32m1_tumu(__VA_ARGS__)
6567
#define vloxseg6ei64_v_f32m1_m(...) __riscv_vloxseg6ei64_v_f32m1_tumu(__VA_ARGS__)
6568
#define vloxseg7ei64_v_f32m1_m(...) __riscv_vloxseg7ei64_v_f32m1_tumu(__VA_ARGS__)
6569
#define vloxseg8ei64_v_f32m1_m(...) __riscv_vloxseg8ei64_v_f32m1_tumu(__VA_ARGS__)
6570
#define vloxseg2ei64_v_f32m2_m(...) __riscv_vloxseg2ei64_v_f32m2_tumu(__VA_ARGS__)
6571
#define vloxseg3ei64_v_f32m2_m(...) __riscv_vloxseg3ei64_v_f32m2_tumu(__VA_ARGS__)
6572
#define vloxseg4ei64_v_f32m2_m(...) __riscv_vloxseg4ei64_v_f32m2_tumu(__VA_ARGS__)
6573
#define vloxseg2ei64_v_f32m4_m(...) __riscv_vloxseg2ei64_v_f32m4_tumu(__VA_ARGS__)
6574
#define vloxseg2ei8_v_f64m1_m(...) __riscv_vloxseg2ei8_v_f64m1_tumu(__VA_ARGS__)
6575
#define vloxseg3ei8_v_f64m1_m(...) __riscv_vloxseg3ei8_v_f64m1_tumu(__VA_ARGS__)
6576
#define vloxseg4ei8_v_f64m1_m(...) __riscv_vloxseg4ei8_v_f64m1_tumu(__VA_ARGS__)
6577
#define vloxseg5ei8_v_f64m1_m(...) __riscv_vloxseg5ei8_v_f64m1_tumu(__VA_ARGS__)
6578
#define vloxseg6ei8_v_f64m1_m(...) __riscv_vloxseg6ei8_v_f64m1_tumu(__VA_ARGS__)
6579
#define vloxseg7ei8_v_f64m1_m(...) __riscv_vloxseg7ei8_v_f64m1_tumu(__VA_ARGS__)
6580
#define vloxseg8ei8_v_f64m1_m(...) __riscv_vloxseg8ei8_v_f64m1_tumu(__VA_ARGS__)
6581
#define vloxseg2ei8_v_f64m2_m(...) __riscv_vloxseg2ei8_v_f64m2_tumu(__VA_ARGS__)
6582
#define vloxseg3ei8_v_f64m2_m(...) __riscv_vloxseg3ei8_v_f64m2_tumu(__VA_ARGS__)
6583
#define vloxseg4ei8_v_f64m2_m(...) __riscv_vloxseg4ei8_v_f64m2_tumu(__VA_ARGS__)
6584
#define vloxseg2ei8_v_f64m4_m(...) __riscv_vloxseg2ei8_v_f64m4_tumu(__VA_ARGS__)
6585
#define vloxseg2ei16_v_f64m1_m(...) __riscv_vloxseg2ei16_v_f64m1_tumu(__VA_ARGS__)
6586
#define vloxseg3ei16_v_f64m1_m(...) __riscv_vloxseg3ei16_v_f64m1_tumu(__VA_ARGS__)
6587
#define vloxseg4ei16_v_f64m1_m(...) __riscv_vloxseg4ei16_v_f64m1_tumu(__VA_ARGS__)
6588
#define vloxseg5ei16_v_f64m1_m(...) __riscv_vloxseg5ei16_v_f64m1_tumu(__VA_ARGS__)
6589
#define vloxseg6ei16_v_f64m1_m(...) __riscv_vloxseg6ei16_v_f64m1_tumu(__VA_ARGS__)
6590
#define vloxseg7ei16_v_f64m1_m(...) __riscv_vloxseg7ei16_v_f64m1_tumu(__VA_ARGS__)
6591
#define vloxseg8ei16_v_f64m1_m(...) __riscv_vloxseg8ei16_v_f64m1_tumu(__VA_ARGS__)
6592
#define vloxseg2ei16_v_f64m2_m(...) __riscv_vloxseg2ei16_v_f64m2_tumu(__VA_ARGS__)
6593
#define vloxseg3ei16_v_f64m2_m(...) __riscv_vloxseg3ei16_v_f64m2_tumu(__VA_ARGS__)
6594
#define vloxseg4ei16_v_f64m2_m(...) __riscv_vloxseg4ei16_v_f64m2_tumu(__VA_ARGS__)
6595
#define vloxseg2ei16_v_f64m4_m(...) __riscv_vloxseg2ei16_v_f64m4_tumu(__VA_ARGS__)
6596
#define vloxseg2ei32_v_f64m1_m(...) __riscv_vloxseg2ei32_v_f64m1_tumu(__VA_ARGS__)
6597
#define vloxseg3ei32_v_f64m1_m(...) __riscv_vloxseg3ei32_v_f64m1_tumu(__VA_ARGS__)
6598
#define vloxseg4ei32_v_f64m1_m(...) __riscv_vloxseg4ei32_v_f64m1_tumu(__VA_ARGS__)
6599
#define vloxseg5ei32_v_f64m1_m(...) __riscv_vloxseg5ei32_v_f64m1_tumu(__VA_ARGS__)
6600
#define vloxseg6ei32_v_f64m1_m(...) __riscv_vloxseg6ei32_v_f64m1_tumu(__VA_ARGS__)
6601
#define vloxseg7ei32_v_f64m1_m(...) __riscv_vloxseg7ei32_v_f64m1_tumu(__VA_ARGS__)
6602
#define vloxseg8ei32_v_f64m1_m(...) __riscv_vloxseg8ei32_v_f64m1_tumu(__VA_ARGS__)
6603
#define vloxseg2ei32_v_f64m2_m(...) __riscv_vloxseg2ei32_v_f64m2_tumu(__VA_ARGS__)
6604
#define vloxseg3ei32_v_f64m2_m(...) __riscv_vloxseg3ei32_v_f64m2_tumu(__VA_ARGS__)
6605
#define vloxseg4ei32_v_f64m2_m(...) __riscv_vloxseg4ei32_v_f64m2_tumu(__VA_ARGS__)
6606
#define vloxseg2ei32_v_f64m4_m(...) __riscv_vloxseg2ei32_v_f64m4_tumu(__VA_ARGS__)
6607
#define vloxseg2ei64_v_f64m1_m(...) __riscv_vloxseg2ei64_v_f64m1_tumu(__VA_ARGS__)
6608
#define vloxseg3ei64_v_f64m1_m(...) __riscv_vloxseg3ei64_v_f64m1_tumu(__VA_ARGS__)
6609
#define vloxseg4ei64_v_f64m1_m(...) __riscv_vloxseg4ei64_v_f64m1_tumu(__VA_ARGS__)
6610
#define vloxseg5ei64_v_f64m1_m(...) __riscv_vloxseg5ei64_v_f64m1_tumu(__VA_ARGS__)
6611
#define vloxseg6ei64_v_f64m1_m(...) __riscv_vloxseg6ei64_v_f64m1_tumu(__VA_ARGS__)
6612
#define vloxseg7ei64_v_f64m1_m(...) __riscv_vloxseg7ei64_v_f64m1_tumu(__VA_ARGS__)
6613
#define vloxseg8ei64_v_f64m1_m(...) __riscv_vloxseg8ei64_v_f64m1_tumu(__VA_ARGS__)
6614
#define vloxseg2ei64_v_f64m2_m(...) __riscv_vloxseg2ei64_v_f64m2_tumu(__VA_ARGS__)
6615
#define vloxseg3ei64_v_f64m2_m(...) __riscv_vloxseg3ei64_v_f64m2_tumu(__VA_ARGS__)
6616
#define vloxseg4ei64_v_f64m2_m(...) __riscv_vloxseg4ei64_v_f64m2_tumu(__VA_ARGS__)
6617
#define vloxseg2ei64_v_f64m4_m(...) __riscv_vloxseg2ei64_v_f64m4_tumu(__VA_ARGS__)
6618
#define vluxseg2ei8_v_f16mf4_m(...) __riscv_vluxseg2ei8_v_f16mf4_tumu(__VA_ARGS__)
6619
#define vluxseg3ei8_v_f16mf4_m(...) __riscv_vluxseg3ei8_v_f16mf4_tumu(__VA_ARGS__)
6620
#define vluxseg4ei8_v_f16mf4_m(...) __riscv_vluxseg4ei8_v_f16mf4_tumu(__VA_ARGS__)
6621
#define vluxseg5ei8_v_f16mf4_m(...) __riscv_vluxseg5ei8_v_f16mf4_tumu(__VA_ARGS__)
6622
#define vluxseg6ei8_v_f16mf4_m(...) __riscv_vluxseg6ei8_v_f16mf4_tumu(__VA_ARGS__)
6623
#define vluxseg7ei8_v_f16mf4_m(...) __riscv_vluxseg7ei8_v_f16mf4_tumu(__VA_ARGS__)
6624
#define vluxseg8ei8_v_f16mf4_m(...) __riscv_vluxseg8ei8_v_f16mf4_tumu(__VA_ARGS__)
6625
#define vluxseg2ei8_v_f16mf2_m(...) __riscv_vluxseg2ei8_v_f16mf2_tumu(__VA_ARGS__)
6626
#define vluxseg3ei8_v_f16mf2_m(...) __riscv_vluxseg3ei8_v_f16mf2_tumu(__VA_ARGS__)
6627
#define vluxseg4ei8_v_f16mf2_m(...) __riscv_vluxseg4ei8_v_f16mf2_tumu(__VA_ARGS__)
6628
#define vluxseg5ei8_v_f16mf2_m(...) __riscv_vluxseg5ei8_v_f16mf2_tumu(__VA_ARGS__)
6629
#define vluxseg6ei8_v_f16mf2_m(...) __riscv_vluxseg6ei8_v_f16mf2_tumu(__VA_ARGS__)
6630
#define vluxseg7ei8_v_f16mf2_m(...) __riscv_vluxseg7ei8_v_f16mf2_tumu(__VA_ARGS__)
6631
#define vluxseg8ei8_v_f16mf2_m(...) __riscv_vluxseg8ei8_v_f16mf2_tumu(__VA_ARGS__)
6632
#define vluxseg2ei8_v_f16m1_m(...) __riscv_vluxseg2ei8_v_f16m1_tumu(__VA_ARGS__)
6633
#define vluxseg3ei8_v_f16m1_m(...) __riscv_vluxseg3ei8_v_f16m1_tumu(__VA_ARGS__)
6634
#define vluxseg4ei8_v_f16m1_m(...) __riscv_vluxseg4ei8_v_f16m1_tumu(__VA_ARGS__)
6635
#define vluxseg5ei8_v_f16m1_m(...) __riscv_vluxseg5ei8_v_f16m1_tumu(__VA_ARGS__)
6636
#define vluxseg6ei8_v_f16m1_m(...) __riscv_vluxseg6ei8_v_f16m1_tumu(__VA_ARGS__)
6637
#define vluxseg7ei8_v_f16m1_m(...) __riscv_vluxseg7ei8_v_f16m1_tumu(__VA_ARGS__)
6638
#define vluxseg8ei8_v_f16m1_m(...) __riscv_vluxseg8ei8_v_f16m1_tumu(__VA_ARGS__)
6639
#define vluxseg2ei8_v_f16m2_m(...) __riscv_vluxseg2ei8_v_f16m2_tumu(__VA_ARGS__)
6640
#define vluxseg3ei8_v_f16m2_m(...) __riscv_vluxseg3ei8_v_f16m2_tumu(__VA_ARGS__)
6641
#define vluxseg4ei8_v_f16m2_m(...) __riscv_vluxseg4ei8_v_f16m2_tumu(__VA_ARGS__)
6642
#define vluxseg2ei8_v_f16m4_m(...) __riscv_vluxseg2ei8_v_f16m4_tumu(__VA_ARGS__)
6643
#define vluxseg2ei16_v_f16mf4_m(...) __riscv_vluxseg2ei16_v_f16mf4_tumu(__VA_ARGS__)
6644
#define vluxseg3ei16_v_f16mf4_m(...) __riscv_vluxseg3ei16_v_f16mf4_tumu(__VA_ARGS__)
6645
#define vluxseg4ei16_v_f16mf4_m(...) __riscv_vluxseg4ei16_v_f16mf4_tumu(__VA_ARGS__)
6646
#define vluxseg5ei16_v_f16mf4_m(...) __riscv_vluxseg5ei16_v_f16mf4_tumu(__VA_ARGS__)
6647
#define vluxseg6ei16_v_f16mf4_m(...) __riscv_vluxseg6ei16_v_f16mf4_tumu(__VA_ARGS__)
6648
#define vluxseg7ei16_v_f16mf4_m(...) __riscv_vluxseg7ei16_v_f16mf4_tumu(__VA_ARGS__)
6649
#define vluxseg8ei16_v_f16mf4_m(...) __riscv_vluxseg8ei16_v_f16mf4_tumu(__VA_ARGS__)
6650
#define vluxseg2ei16_v_f16mf2_m(...) __riscv_vluxseg2ei16_v_f16mf2_tumu(__VA_ARGS__)
6651
#define vluxseg3ei16_v_f16mf2_m(...) __riscv_vluxseg3ei16_v_f16mf2_tumu(__VA_ARGS__)
6652
#define vluxseg4ei16_v_f16mf2_m(...) __riscv_vluxseg4ei16_v_f16mf2_tumu(__VA_ARGS__)
6653
#define vluxseg5ei16_v_f16mf2_m(...) __riscv_vluxseg5ei16_v_f16mf2_tumu(__VA_ARGS__)
6654
#define vluxseg6ei16_v_f16mf2_m(...) __riscv_vluxseg6ei16_v_f16mf2_tumu(__VA_ARGS__)
6655
#define vluxseg7ei16_v_f16mf2_m(...) __riscv_vluxseg7ei16_v_f16mf2_tumu(__VA_ARGS__)
6656
#define vluxseg8ei16_v_f16mf2_m(...) __riscv_vluxseg8ei16_v_f16mf2_tumu(__VA_ARGS__)
6657
#define vluxseg2ei16_v_f16m1_m(...) __riscv_vluxseg2ei16_v_f16m1_tumu(__VA_ARGS__)
6658
#define vluxseg3ei16_v_f16m1_m(...) __riscv_vluxseg3ei16_v_f16m1_tumu(__VA_ARGS__)
6659
#define vluxseg4ei16_v_f16m1_m(...) __riscv_vluxseg4ei16_v_f16m1_tumu(__VA_ARGS__)
6660
#define vluxseg5ei16_v_f16m1_m(...) __riscv_vluxseg5ei16_v_f16m1_tumu(__VA_ARGS__)
6661
#define vluxseg6ei16_v_f16m1_m(...) __riscv_vluxseg6ei16_v_f16m1_tumu(__VA_ARGS__)
6662
#define vluxseg7ei16_v_f16m1_m(...) __riscv_vluxseg7ei16_v_f16m1_tumu(__VA_ARGS__)
6663
#define vluxseg8ei16_v_f16m1_m(...) __riscv_vluxseg8ei16_v_f16m1_tumu(__VA_ARGS__)
6664
#define vluxseg2ei16_v_f16m2_m(...) __riscv_vluxseg2ei16_v_f16m2_tumu(__VA_ARGS__)
6665
#define vluxseg3ei16_v_f16m2_m(...) __riscv_vluxseg3ei16_v_f16m2_tumu(__VA_ARGS__)
6666
#define vluxseg4ei16_v_f16m2_m(...) __riscv_vluxseg4ei16_v_f16m2_tumu(__VA_ARGS__)
6667
#define vluxseg2ei16_v_f16m4_m(...) __riscv_vluxseg2ei16_v_f16m4_tumu(__VA_ARGS__)
6668
#define vluxseg2ei32_v_f16mf4_m(...) __riscv_vluxseg2ei32_v_f16mf4_tumu(__VA_ARGS__)
6669
#define vluxseg3ei32_v_f16mf4_m(...) __riscv_vluxseg3ei32_v_f16mf4_tumu(__VA_ARGS__)
6670
#define vluxseg4ei32_v_f16mf4_m(...) __riscv_vluxseg4ei32_v_f16mf4_tumu(__VA_ARGS__)
6671
#define vluxseg5ei32_v_f16mf4_m(...) __riscv_vluxseg5ei32_v_f16mf4_tumu(__VA_ARGS__)
6672
#define vluxseg6ei32_v_f16mf4_m(...) __riscv_vluxseg6ei32_v_f16mf4_tumu(__VA_ARGS__)
6673
#define vluxseg7ei32_v_f16mf4_m(...) __riscv_vluxseg7ei32_v_f16mf4_tumu(__VA_ARGS__)
6674
#define vluxseg8ei32_v_f16mf4_m(...) __riscv_vluxseg8ei32_v_f16mf4_tumu(__VA_ARGS__)
6675
#define vluxseg2ei32_v_f16mf2_m(...) __riscv_vluxseg2ei32_v_f16mf2_tumu(__VA_ARGS__)
6676
#define vluxseg3ei32_v_f16mf2_m(...) __riscv_vluxseg3ei32_v_f16mf2_tumu(__VA_ARGS__)
6677
#define vluxseg4ei32_v_f16mf2_m(...) __riscv_vluxseg4ei32_v_f16mf2_tumu(__VA_ARGS__)
6678
#define vluxseg5ei32_v_f16mf2_m(...) __riscv_vluxseg5ei32_v_f16mf2_tumu(__VA_ARGS__)
6679
#define vluxseg6ei32_v_f16mf2_m(...) __riscv_vluxseg6ei32_v_f16mf2_tumu(__VA_ARGS__)
6680
#define vluxseg7ei32_v_f16mf2_m(...) __riscv_vluxseg7ei32_v_f16mf2_tumu(__VA_ARGS__)
6681
#define vluxseg8ei32_v_f16mf2_m(...) __riscv_vluxseg8ei32_v_f16mf2_tumu(__VA_ARGS__)
6682
#define vluxseg2ei32_v_f16m1_m(...) __riscv_vluxseg2ei32_v_f16m1_tumu(__VA_ARGS__)
6683
#define vluxseg3ei32_v_f16m1_m(...) __riscv_vluxseg3ei32_v_f16m1_tumu(__VA_ARGS__)
6684
#define vluxseg4ei32_v_f16m1_m(...) __riscv_vluxseg4ei32_v_f16m1_tumu(__VA_ARGS__)
6685
#define vluxseg5ei32_v_f16m1_m(...) __riscv_vluxseg5ei32_v_f16m1_tumu(__VA_ARGS__)
6686
#define vluxseg6ei32_v_f16m1_m(...) __riscv_vluxseg6ei32_v_f16m1_tumu(__VA_ARGS__)
6687
#define vluxseg7ei32_v_f16m1_m(...) __riscv_vluxseg7ei32_v_f16m1_tumu(__VA_ARGS__)
6688
#define vluxseg8ei32_v_f16m1_m(...) __riscv_vluxseg8ei32_v_f16m1_tumu(__VA_ARGS__)
6689
#define vluxseg2ei32_v_f16m2_m(...) __riscv_vluxseg2ei32_v_f16m2_tumu(__VA_ARGS__)
6690
#define vluxseg3ei32_v_f16m2_m(...) __riscv_vluxseg3ei32_v_f16m2_tumu(__VA_ARGS__)
6691
#define vluxseg4ei32_v_f16m2_m(...) __riscv_vluxseg4ei32_v_f16m2_tumu(__VA_ARGS__)
6692
#define vluxseg2ei32_v_f16m4_m(...) __riscv_vluxseg2ei32_v_f16m4_tumu(__VA_ARGS__)
6693
#define vluxseg2ei64_v_f16mf4_m(...) __riscv_vluxseg2ei64_v_f16mf4_tumu(__VA_ARGS__)
6694
#define vluxseg3ei64_v_f16mf4_m(...) __riscv_vluxseg3ei64_v_f16mf4_tumu(__VA_ARGS__)
6695
#define vluxseg4ei64_v_f16mf4_m(...) __riscv_vluxseg4ei64_v_f16mf4_tumu(__VA_ARGS__)
6696
#define vluxseg5ei64_v_f16mf4_m(...) __riscv_vluxseg5ei64_v_f16mf4_tumu(__VA_ARGS__)
6697
#define vluxseg6ei64_v_f16mf4_m(...) __riscv_vluxseg6ei64_v_f16mf4_tumu(__VA_ARGS__)
6698
#define vluxseg7ei64_v_f16mf4_m(...) __riscv_vluxseg7ei64_v_f16mf4_tumu(__VA_ARGS__)
6699
#define vluxseg8ei64_v_f16mf4_m(...) __riscv_vluxseg8ei64_v_f16mf4_tumu(__VA_ARGS__)
6700
#define vluxseg2ei64_v_f16mf2_m(...) __riscv_vluxseg2ei64_v_f16mf2_tumu(__VA_ARGS__)
6701
#define vluxseg3ei64_v_f16mf2_m(...) __riscv_vluxseg3ei64_v_f16mf2_tumu(__VA_ARGS__)
6702
#define vluxseg4ei64_v_f16mf2_m(...) __riscv_vluxseg4ei64_v_f16mf2_tumu(__VA_ARGS__)
6703
#define vluxseg5ei64_v_f16mf2_m(...) __riscv_vluxseg5ei64_v_f16mf2_tumu(__VA_ARGS__)
6704
#define vluxseg6ei64_v_f16mf2_m(...) __riscv_vluxseg6ei64_v_f16mf2_tumu(__VA_ARGS__)
6705
#define vluxseg7ei64_v_f16mf2_m(...) __riscv_vluxseg7ei64_v_f16mf2_tumu(__VA_ARGS__)
6706
#define vluxseg8ei64_v_f16mf2_m(...) __riscv_vluxseg8ei64_v_f16mf2_tumu(__VA_ARGS__)
6707
#define vluxseg2ei64_v_f16m1_m(...) __riscv_vluxseg2ei64_v_f16m1_tumu(__VA_ARGS__)
6708
#define vluxseg3ei64_v_f16m1_m(...) __riscv_vluxseg3ei64_v_f16m1_tumu(__VA_ARGS__)
6709
#define vluxseg4ei64_v_f16m1_m(...) __riscv_vluxseg4ei64_v_f16m1_tumu(__VA_ARGS__)
6710
#define vluxseg5ei64_v_f16m1_m(...) __riscv_vluxseg5ei64_v_f16m1_tumu(__VA_ARGS__)
6711
#define vluxseg6ei64_v_f16m1_m(...) __riscv_vluxseg6ei64_v_f16m1_tumu(__VA_ARGS__)
6712
#define vluxseg7ei64_v_f16m1_m(...) __riscv_vluxseg7ei64_v_f16m1_tumu(__VA_ARGS__)
6713
#define vluxseg8ei64_v_f16m1_m(...) __riscv_vluxseg8ei64_v_f16m1_tumu(__VA_ARGS__)
6714
#define vluxseg2ei64_v_f16m2_m(...) __riscv_vluxseg2ei64_v_f16m2_tumu(__VA_ARGS__)
6715
#define vluxseg3ei64_v_f16m2_m(...) __riscv_vluxseg3ei64_v_f16m2_tumu(__VA_ARGS__)
6716
#define vluxseg4ei64_v_f16m2_m(...) __riscv_vluxseg4ei64_v_f16m2_tumu(__VA_ARGS__)
6717
#define vluxseg2ei8_v_f32mf2_m(...) __riscv_vluxseg2ei8_v_f32mf2_tumu(__VA_ARGS__)
6718
#define vluxseg3ei8_v_f32mf2_m(...) __riscv_vluxseg3ei8_v_f32mf2_tumu(__VA_ARGS__)
6719
#define vluxseg4ei8_v_f32mf2_m(...) __riscv_vluxseg4ei8_v_f32mf2_tumu(__VA_ARGS__)
6720
#define vluxseg5ei8_v_f32mf2_m(...) __riscv_vluxseg5ei8_v_f32mf2_tumu(__VA_ARGS__)
6721
#define vluxseg6ei8_v_f32mf2_m(...) __riscv_vluxseg6ei8_v_f32mf2_tumu(__VA_ARGS__)
6722
#define vluxseg7ei8_v_f32mf2_m(...) __riscv_vluxseg7ei8_v_f32mf2_tumu(__VA_ARGS__)
6723
#define vluxseg8ei8_v_f32mf2_m(...) __riscv_vluxseg8ei8_v_f32mf2_tumu(__VA_ARGS__)
6724
#define vluxseg2ei8_v_f32m1_m(...) __riscv_vluxseg2ei8_v_f32m1_tumu(__VA_ARGS__)
6725
#define vluxseg3ei8_v_f32m1_m(...) __riscv_vluxseg3ei8_v_f32m1_tumu(__VA_ARGS__)
6726
#define vluxseg4ei8_v_f32m1_m(...) __riscv_vluxseg4ei8_v_f32m1_tumu(__VA_ARGS__)
6727
#define vluxseg5ei8_v_f32m1_m(...) __riscv_vluxseg5ei8_v_f32m1_tumu(__VA_ARGS__)
6728
#define vluxseg6ei8_v_f32m1_m(...) __riscv_vluxseg6ei8_v_f32m1_tumu(__VA_ARGS__)
6729
#define vluxseg7ei8_v_f32m1_m(...) __riscv_vluxseg7ei8_v_f32m1_tumu(__VA_ARGS__)
6730
#define vluxseg8ei8_v_f32m1_m(...) __riscv_vluxseg8ei8_v_f32m1_tumu(__VA_ARGS__)
6731
#define vluxseg2ei8_v_f32m2_m(...) __riscv_vluxseg2ei8_v_f32m2_tumu(__VA_ARGS__)
6732
#define vluxseg3ei8_v_f32m2_m(...) __riscv_vluxseg3ei8_v_f32m2_tumu(__VA_ARGS__)
6733
#define vluxseg4ei8_v_f32m2_m(...) __riscv_vluxseg4ei8_v_f32m2_tumu(__VA_ARGS__)
6734
#define vluxseg2ei8_v_f32m4_m(...) __riscv_vluxseg2ei8_v_f32m4_tumu(__VA_ARGS__)
6735
#define vluxseg2ei16_v_f32mf2_m(...) __riscv_vluxseg2ei16_v_f32mf2_tumu(__VA_ARGS__)
6736
#define vluxseg3ei16_v_f32mf2_m(...) __riscv_vluxseg3ei16_v_f32mf2_tumu(__VA_ARGS__)
6737
#define vluxseg4ei16_v_f32mf2_m(...) __riscv_vluxseg4ei16_v_f32mf2_tumu(__VA_ARGS__)
6738
#define vluxseg5ei16_v_f32mf2_m(...) __riscv_vluxseg5ei16_v_f32mf2_tumu(__VA_ARGS__)
6739
#define vluxseg6ei16_v_f32mf2_m(...) __riscv_vluxseg6ei16_v_f32mf2_tumu(__VA_ARGS__)
6740
#define vluxseg7ei16_v_f32mf2_m(...) __riscv_vluxseg7ei16_v_f32mf2_tumu(__VA_ARGS__)
6741
#define vluxseg8ei16_v_f32mf2_m(...) __riscv_vluxseg8ei16_v_f32mf2_tumu(__VA_ARGS__)
6742
#define vluxseg2ei16_v_f32m1_m(...) __riscv_vluxseg2ei16_v_f32m1_tumu(__VA_ARGS__)
6743
#define vluxseg3ei16_v_f32m1_m(...) __riscv_vluxseg3ei16_v_f32m1_tumu(__VA_ARGS__)
6744
#define vluxseg4ei16_v_f32m1_m(...) __riscv_vluxseg4ei16_v_f32m1_tumu(__VA_ARGS__)
6745
#define vluxseg5ei16_v_f32m1_m(...) __riscv_vluxseg5ei16_v_f32m1_tumu(__VA_ARGS__)
6746
#define vluxseg6ei16_v_f32m1_m(...) __riscv_vluxseg6ei16_v_f32m1_tumu(__VA_ARGS__)
6747
#define vluxseg7ei16_v_f32m1_m(...) __riscv_vluxseg7ei16_v_f32m1_tumu(__VA_ARGS__)
6748
#define vluxseg8ei16_v_f32m1_m(...) __riscv_vluxseg8ei16_v_f32m1_tumu(__VA_ARGS__)
6749
#define vluxseg2ei16_v_f32m2_m(...) __riscv_vluxseg2ei16_v_f32m2_tumu(__VA_ARGS__)
6750
#define vluxseg3ei16_v_f32m2_m(...) __riscv_vluxseg3ei16_v_f32m2_tumu(__VA_ARGS__)
6751
#define vluxseg4ei16_v_f32m2_m(...) __riscv_vluxseg4ei16_v_f32m2_tumu(__VA_ARGS__)
6752
#define vluxseg2ei16_v_f32m4_m(...) __riscv_vluxseg2ei16_v_f32m4_tumu(__VA_ARGS__)
6753
#define vluxseg2ei32_v_f32mf2_m(...) __riscv_vluxseg2ei32_v_f32mf2_tumu(__VA_ARGS__)
6754
#define vluxseg3ei32_v_f32mf2_m(...) __riscv_vluxseg3ei32_v_f32mf2_tumu(__VA_ARGS__)
6755
#define vluxseg4ei32_v_f32mf2_m(...) __riscv_vluxseg4ei32_v_f32mf2_tumu(__VA_ARGS__)
6756
#define vluxseg5ei32_v_f32mf2_m(...) __riscv_vluxseg5ei32_v_f32mf2_tumu(__VA_ARGS__)
6757
#define vluxseg6ei32_v_f32mf2_m(...) __riscv_vluxseg6ei32_v_f32mf2_tumu(__VA_ARGS__)
6758
#define vluxseg7ei32_v_f32mf2_m(...) __riscv_vluxseg7ei32_v_f32mf2_tumu(__VA_ARGS__)
6759
#define vluxseg8ei32_v_f32mf2_m(...) __riscv_vluxseg8ei32_v_f32mf2_tumu(__VA_ARGS__)
6760
#define vluxseg2ei32_v_f32m1_m(...) __riscv_vluxseg2ei32_v_f32m1_tumu(__VA_ARGS__)
6761
#define vluxseg3ei32_v_f32m1_m(...) __riscv_vluxseg3ei32_v_f32m1_tumu(__VA_ARGS__)
6762
#define vluxseg4ei32_v_f32m1_m(...) __riscv_vluxseg4ei32_v_f32m1_tumu(__VA_ARGS__)
6763
#define vluxseg5ei32_v_f32m1_m(...) __riscv_vluxseg5ei32_v_f32m1_tumu(__VA_ARGS__)
6764
#define vluxseg6ei32_v_f32m1_m(...) __riscv_vluxseg6ei32_v_f32m1_tumu(__VA_ARGS__)
6765
#define vluxseg7ei32_v_f32m1_m(...) __riscv_vluxseg7ei32_v_f32m1_tumu(__VA_ARGS__)
6766
#define vluxseg8ei32_v_f32m1_m(...) __riscv_vluxseg8ei32_v_f32m1_tumu(__VA_ARGS__)
6767
#define vluxseg2ei32_v_f32m2_m(...) __riscv_vluxseg2ei32_v_f32m2_tumu(__VA_ARGS__)
6768
#define vluxseg3ei32_v_f32m2_m(...) __riscv_vluxseg3ei32_v_f32m2_tumu(__VA_ARGS__)
6769
#define vluxseg4ei32_v_f32m2_m(...) __riscv_vluxseg4ei32_v_f32m2_tumu(__VA_ARGS__)
6770
#define vluxseg2ei32_v_f32m4_m(...) __riscv_vluxseg2ei32_v_f32m4_tumu(__VA_ARGS__)
6771
#define vluxseg2ei64_v_f32mf2_m(...) __riscv_vluxseg2ei64_v_f32mf2_tumu(__VA_ARGS__)
6772
#define vluxseg3ei64_v_f32mf2_m(...) __riscv_vluxseg3ei64_v_f32mf2_tumu(__VA_ARGS__)
6773
#define vluxseg4ei64_v_f32mf2_m(...) __riscv_vluxseg4ei64_v_f32mf2_tumu(__VA_ARGS__)
6774
#define vluxseg5ei64_v_f32mf2_m(...) __riscv_vluxseg5ei64_v_f32mf2_tumu(__VA_ARGS__)
6775
#define vluxseg6ei64_v_f32mf2_m(...) __riscv_vluxseg6ei64_v_f32mf2_tumu(__VA_ARGS__)
6776
#define vluxseg7ei64_v_f32mf2_m(...) __riscv_vluxseg7ei64_v_f32mf2_tumu(__VA_ARGS__)
6777
#define vluxseg8ei64_v_f32mf2_m(...) __riscv_vluxseg8ei64_v_f32mf2_tumu(__VA_ARGS__)
6778
#define vluxseg2ei64_v_f32m1_m(...) __riscv_vluxseg2ei64_v_f32m1_tumu(__VA_ARGS__)
6779
#define vluxseg3ei64_v_f32m1_m(...) __riscv_vluxseg3ei64_v_f32m1_tumu(__VA_ARGS__)
6780
#define vluxseg4ei64_v_f32m1_m(...) __riscv_vluxseg4ei64_v_f32m1_tumu(__VA_ARGS__)
6781
#define vluxseg5ei64_v_f32m1_m(...) __riscv_vluxseg5ei64_v_f32m1_tumu(__VA_ARGS__)
6782
#define vluxseg6ei64_v_f32m1_m(...) __riscv_vluxseg6ei64_v_f32m1_tumu(__VA_ARGS__)
6783
#define vluxseg7ei64_v_f32m1_m(...) __riscv_vluxseg7ei64_v_f32m1_tumu(__VA_ARGS__)
6784
#define vluxseg8ei64_v_f32m1_m(...) __riscv_vluxseg8ei64_v_f32m1_tumu(__VA_ARGS__)
6785
#define vluxseg2ei64_v_f32m2_m(...) __riscv_vluxseg2ei64_v_f32m2_tumu(__VA_ARGS__)
6786
#define vluxseg3ei64_v_f32m2_m(...) __riscv_vluxseg3ei64_v_f32m2_tumu(__VA_ARGS__)
6787
#define vluxseg4ei64_v_f32m2_m(...) __riscv_vluxseg4ei64_v_f32m2_tumu(__VA_ARGS__)
6788
#define vluxseg2ei64_v_f32m4_m(...) __riscv_vluxseg2ei64_v_f32m4_tumu(__VA_ARGS__)
6789
#define vluxseg2ei8_v_f64m1_m(...) __riscv_vluxseg2ei8_v_f64m1_tumu(__VA_ARGS__)
6790
#define vluxseg3ei8_v_f64m1_m(...) __riscv_vluxseg3ei8_v_f64m1_tumu(__VA_ARGS__)
6791
#define vluxseg4ei8_v_f64m1_m(...) __riscv_vluxseg4ei8_v_f64m1_tumu(__VA_ARGS__)
6792
#define vluxseg5ei8_v_f64m1_m(...) __riscv_vluxseg5ei8_v_f64m1_tumu(__VA_ARGS__)
6793
#define vluxseg6ei8_v_f64m1_m(...) __riscv_vluxseg6ei8_v_f64m1_tumu(__VA_ARGS__)
6794
#define vluxseg7ei8_v_f64m1_m(...) __riscv_vluxseg7ei8_v_f64m1_tumu(__VA_ARGS__)
6795
#define vluxseg8ei8_v_f64m1_m(...) __riscv_vluxseg8ei8_v_f64m1_tumu(__VA_ARGS__)
6796
#define vluxseg2ei8_v_f64m2_m(...) __riscv_vluxseg2ei8_v_f64m2_tumu(__VA_ARGS__)
6797
#define vluxseg3ei8_v_f64m2_m(...) __riscv_vluxseg3ei8_v_f64m2_tumu(__VA_ARGS__)
6798
#define vluxseg4ei8_v_f64m2_m(...) __riscv_vluxseg4ei8_v_f64m2_tumu(__VA_ARGS__)
6799
#define vluxseg2ei8_v_f64m4_m(...) __riscv_vluxseg2ei8_v_f64m4_tumu(__VA_ARGS__)
6800
#define vluxseg2ei16_v_f64m1_m(...) __riscv_vluxseg2ei16_v_f64m1_tumu(__VA_ARGS__)
6801
#define vluxseg3ei16_v_f64m1_m(...) __riscv_vluxseg3ei16_v_f64m1_tumu(__VA_ARGS__)
6802
#define vluxseg4ei16_v_f64m1_m(...) __riscv_vluxseg4ei16_v_f64m1_tumu(__VA_ARGS__)
6803
#define vluxseg5ei16_v_f64m1_m(...) __riscv_vluxseg5ei16_v_f64m1_tumu(__VA_ARGS__)
6804
#define vluxseg6ei16_v_f64m1_m(...) __riscv_vluxseg6ei16_v_f64m1_tumu(__VA_ARGS__)
6805
#define vluxseg7ei16_v_f64m1_m(...) __riscv_vluxseg7ei16_v_f64m1_tumu(__VA_ARGS__)
6806
#define vluxseg8ei16_v_f64m1_m(...) __riscv_vluxseg8ei16_v_f64m1_tumu(__VA_ARGS__)
6807
#define vluxseg2ei16_v_f64m2_m(...) __riscv_vluxseg2ei16_v_f64m2_tumu(__VA_ARGS__)
6808
#define vluxseg3ei16_v_f64m2_m(...) __riscv_vluxseg3ei16_v_f64m2_tumu(__VA_ARGS__)
6809
#define vluxseg4ei16_v_f64m2_m(...) __riscv_vluxseg4ei16_v_f64m2_tumu(__VA_ARGS__)
6810
#define vluxseg2ei16_v_f64m4_m(...) __riscv_vluxseg2ei16_v_f64m4_tumu(__VA_ARGS__)
6811
#define vluxseg2ei32_v_f64m1_m(...) __riscv_vluxseg2ei32_v_f64m1_tumu(__VA_ARGS__)
6812
#define vluxseg3ei32_v_f64m1_m(...) __riscv_vluxseg3ei32_v_f64m1_tumu(__VA_ARGS__)
6813
#define vluxseg4ei32_v_f64m1_m(...) __riscv_vluxseg4ei32_v_f64m1_tumu(__VA_ARGS__)
6814
#define vluxseg5ei32_v_f64m1_m(...) __riscv_vluxseg5ei32_v_f64m1_tumu(__VA_ARGS__)
6815
#define vluxseg6ei32_v_f64m1_m(...) __riscv_vluxseg6ei32_v_f64m1_tumu(__VA_ARGS__)
6816
#define vluxseg7ei32_v_f64m1_m(...) __riscv_vluxseg7ei32_v_f64m1_tumu(__VA_ARGS__)
6817
#define vluxseg8ei32_v_f64m1_m(...) __riscv_vluxseg8ei32_v_f64m1_tumu(__VA_ARGS__)
6818
#define vluxseg2ei32_v_f64m2_m(...) __riscv_vluxseg2ei32_v_f64m2_tumu(__VA_ARGS__)
6819
#define vluxseg3ei32_v_f64m2_m(...) __riscv_vluxseg3ei32_v_f64m2_tumu(__VA_ARGS__)
6820
#define vluxseg4ei32_v_f64m2_m(...) __riscv_vluxseg4ei32_v_f64m2_tumu(__VA_ARGS__)
6821
#define vluxseg2ei32_v_f64m4_m(...) __riscv_vluxseg2ei32_v_f64m4_tumu(__VA_ARGS__)
6822
#define vluxseg2ei64_v_f64m1_m(...) __riscv_vluxseg2ei64_v_f64m1_tumu(__VA_ARGS__)
6823
#define vluxseg3ei64_v_f64m1_m(...) __riscv_vluxseg3ei64_v_f64m1_tumu(__VA_ARGS__)
6824
#define vluxseg4ei64_v_f64m1_m(...) __riscv_vluxseg4ei64_v_f64m1_tumu(__VA_ARGS__)
6825
#define vluxseg5ei64_v_f64m1_m(...) __riscv_vluxseg5ei64_v_f64m1_tumu(__VA_ARGS__)
6826
#define vluxseg6ei64_v_f64m1_m(...) __riscv_vluxseg6ei64_v_f64m1_tumu(__VA_ARGS__)
6827
#define vluxseg7ei64_v_f64m1_m(...) __riscv_vluxseg7ei64_v_f64m1_tumu(__VA_ARGS__)
6828
#define vluxseg8ei64_v_f64m1_m(...) __riscv_vluxseg8ei64_v_f64m1_tumu(__VA_ARGS__)
6829
#define vluxseg2ei64_v_f64m2_m(...) __riscv_vluxseg2ei64_v_f64m2_tumu(__VA_ARGS__)
6830
#define vluxseg3ei64_v_f64m2_m(...) __riscv_vluxseg3ei64_v_f64m2_tumu(__VA_ARGS__)
6831
#define vluxseg4ei64_v_f64m2_m(...) __riscv_vluxseg4ei64_v_f64m2_tumu(__VA_ARGS__)
6832
#define vluxseg2ei64_v_f64m4_m(...) __riscv_vluxseg2ei64_v_f64m4_tumu(__VA_ARGS__)
6833
#define vloxseg2ei8_v_i8mf8_m(...) __riscv_vloxseg2ei8_v_i8mf8_tumu(__VA_ARGS__)
6834
#define vloxseg3ei8_v_i8mf8_m(...) __riscv_vloxseg3ei8_v_i8mf8_tumu(__VA_ARGS__)
6835
#define vloxseg4ei8_v_i8mf8_m(...) __riscv_vloxseg4ei8_v_i8mf8_tumu(__VA_ARGS__)
6836
#define vloxseg5ei8_v_i8mf8_m(...) __riscv_vloxseg5ei8_v_i8mf8_tumu(__VA_ARGS__)
6837
#define vloxseg6ei8_v_i8mf8_m(...) __riscv_vloxseg6ei8_v_i8mf8_tumu(__VA_ARGS__)
6838
#define vloxseg7ei8_v_i8mf8_m(...) __riscv_vloxseg7ei8_v_i8mf8_tumu(__VA_ARGS__)
6839
#define vloxseg8ei8_v_i8mf8_m(...) __riscv_vloxseg8ei8_v_i8mf8_tumu(__VA_ARGS__)
6840
#define vloxseg2ei8_v_i8mf4_m(...) __riscv_vloxseg2ei8_v_i8mf4_tumu(__VA_ARGS__)
6841
#define vloxseg3ei8_v_i8mf4_m(...) __riscv_vloxseg3ei8_v_i8mf4_tumu(__VA_ARGS__)
6842
#define vloxseg4ei8_v_i8mf4_m(...) __riscv_vloxseg4ei8_v_i8mf4_tumu(__VA_ARGS__)
6843
#define vloxseg5ei8_v_i8mf4_m(...) __riscv_vloxseg5ei8_v_i8mf4_tumu(__VA_ARGS__)
6844
#define vloxseg6ei8_v_i8mf4_m(...) __riscv_vloxseg6ei8_v_i8mf4_tumu(__VA_ARGS__)
6845
#define vloxseg7ei8_v_i8mf4_m(...) __riscv_vloxseg7ei8_v_i8mf4_tumu(__VA_ARGS__)
6846
#define vloxseg8ei8_v_i8mf4_m(...) __riscv_vloxseg8ei8_v_i8mf4_tumu(__VA_ARGS__)
6847
#define vloxseg2ei8_v_i8mf2_m(...) __riscv_vloxseg2ei8_v_i8mf2_tumu(__VA_ARGS__)
6848
#define vloxseg3ei8_v_i8mf2_m(...) __riscv_vloxseg3ei8_v_i8mf2_tumu(__VA_ARGS__)
6849
#define vloxseg4ei8_v_i8mf2_m(...) __riscv_vloxseg4ei8_v_i8mf2_tumu(__VA_ARGS__)
6850
#define vloxseg5ei8_v_i8mf2_m(...) __riscv_vloxseg5ei8_v_i8mf2_tumu(__VA_ARGS__)
6851
#define vloxseg6ei8_v_i8mf2_m(...) __riscv_vloxseg6ei8_v_i8mf2_tumu(__VA_ARGS__)
6852
#define vloxseg7ei8_v_i8mf2_m(...) __riscv_vloxseg7ei8_v_i8mf2_tumu(__VA_ARGS__)
6853
#define vloxseg8ei8_v_i8mf2_m(...) __riscv_vloxseg8ei8_v_i8mf2_tumu(__VA_ARGS__)
6854
#define vloxseg2ei8_v_i8m1_m(...) __riscv_vloxseg2ei8_v_i8m1_tumu(__VA_ARGS__)
6855
#define vloxseg3ei8_v_i8m1_m(...) __riscv_vloxseg3ei8_v_i8m1_tumu(__VA_ARGS__)
6856
#define vloxseg4ei8_v_i8m1_m(...) __riscv_vloxseg4ei8_v_i8m1_tumu(__VA_ARGS__)
6857
#define vloxseg5ei8_v_i8m1_m(...) __riscv_vloxseg5ei8_v_i8m1_tumu(__VA_ARGS__)
6858
#define vloxseg6ei8_v_i8m1_m(...) __riscv_vloxseg6ei8_v_i8m1_tumu(__VA_ARGS__)
6859
#define vloxseg7ei8_v_i8m1_m(...) __riscv_vloxseg7ei8_v_i8m1_tumu(__VA_ARGS__)
6860
#define vloxseg8ei8_v_i8m1_m(...) __riscv_vloxseg8ei8_v_i8m1_tumu(__VA_ARGS__)
6861
#define vloxseg2ei8_v_i8m2_m(...) __riscv_vloxseg2ei8_v_i8m2_tumu(__VA_ARGS__)
6862
#define vloxseg3ei8_v_i8m2_m(...) __riscv_vloxseg3ei8_v_i8m2_tumu(__VA_ARGS__)
6863
#define vloxseg4ei8_v_i8m2_m(...) __riscv_vloxseg4ei8_v_i8m2_tumu(__VA_ARGS__)
6864
#define vloxseg2ei8_v_i8m4_m(...) __riscv_vloxseg2ei8_v_i8m4_tumu(__VA_ARGS__)
6865
#define vloxseg2ei16_v_i8mf8_m(...) __riscv_vloxseg2ei16_v_i8mf8_tumu(__VA_ARGS__)
6866
#define vloxseg3ei16_v_i8mf8_m(...) __riscv_vloxseg3ei16_v_i8mf8_tumu(__VA_ARGS__)
6867
#define vloxseg4ei16_v_i8mf8_m(...) __riscv_vloxseg4ei16_v_i8mf8_tumu(__VA_ARGS__)
6868
#define vloxseg5ei16_v_i8mf8_m(...) __riscv_vloxseg5ei16_v_i8mf8_tumu(__VA_ARGS__)
6869
#define vloxseg6ei16_v_i8mf8_m(...) __riscv_vloxseg6ei16_v_i8mf8_tumu(__VA_ARGS__)
6870
#define vloxseg7ei16_v_i8mf8_m(...) __riscv_vloxseg7ei16_v_i8mf8_tumu(__VA_ARGS__)
6871
#define vloxseg8ei16_v_i8mf8_m(...) __riscv_vloxseg8ei16_v_i8mf8_tumu(__VA_ARGS__)
6872
#define vloxseg2ei16_v_i8mf4_m(...) __riscv_vloxseg2ei16_v_i8mf4_tumu(__VA_ARGS__)
6873
#define vloxseg3ei16_v_i8mf4_m(...) __riscv_vloxseg3ei16_v_i8mf4_tumu(__VA_ARGS__)
6874
#define vloxseg4ei16_v_i8mf4_m(...) __riscv_vloxseg4ei16_v_i8mf4_tumu(__VA_ARGS__)
6875
#define vloxseg5ei16_v_i8mf4_m(...) __riscv_vloxseg5ei16_v_i8mf4_tumu(__VA_ARGS__)
6876
#define vloxseg6ei16_v_i8mf4_m(...) __riscv_vloxseg6ei16_v_i8mf4_tumu(__VA_ARGS__)
6877
#define vloxseg7ei16_v_i8mf4_m(...) __riscv_vloxseg7ei16_v_i8mf4_tumu(__VA_ARGS__)
6878
#define vloxseg8ei16_v_i8mf4_m(...) __riscv_vloxseg8ei16_v_i8mf4_tumu(__VA_ARGS__)
6879
#define vloxseg2ei16_v_i8mf2_m(...) __riscv_vloxseg2ei16_v_i8mf2_tumu(__VA_ARGS__)
6880
#define vloxseg3ei16_v_i8mf2_m(...) __riscv_vloxseg3ei16_v_i8mf2_tumu(__VA_ARGS__)
6881
#define vloxseg4ei16_v_i8mf2_m(...) __riscv_vloxseg4ei16_v_i8mf2_tumu(__VA_ARGS__)
6882
#define vloxseg5ei16_v_i8mf2_m(...) __riscv_vloxseg5ei16_v_i8mf2_tumu(__VA_ARGS__)
6883
#define vloxseg6ei16_v_i8mf2_m(...) __riscv_vloxseg6ei16_v_i8mf2_tumu(__VA_ARGS__)
6884
#define vloxseg7ei16_v_i8mf2_m(...) __riscv_vloxseg7ei16_v_i8mf2_tumu(__VA_ARGS__)
6885
#define vloxseg8ei16_v_i8mf2_m(...) __riscv_vloxseg8ei16_v_i8mf2_tumu(__VA_ARGS__)
6886
#define vloxseg2ei16_v_i8m1_m(...) __riscv_vloxseg2ei16_v_i8m1_tumu(__VA_ARGS__)
6887
#define vloxseg3ei16_v_i8m1_m(...) __riscv_vloxseg3ei16_v_i8m1_tumu(__VA_ARGS__)
6888
#define vloxseg4ei16_v_i8m1_m(...) __riscv_vloxseg4ei16_v_i8m1_tumu(__VA_ARGS__)
6889
#define vloxseg5ei16_v_i8m1_m(...) __riscv_vloxseg5ei16_v_i8m1_tumu(__VA_ARGS__)
6890
#define vloxseg6ei16_v_i8m1_m(...) __riscv_vloxseg6ei16_v_i8m1_tumu(__VA_ARGS__)
6891
#define vloxseg7ei16_v_i8m1_m(...) __riscv_vloxseg7ei16_v_i8m1_tumu(__VA_ARGS__)
6892
#define vloxseg8ei16_v_i8m1_m(...) __riscv_vloxseg8ei16_v_i8m1_tumu(__VA_ARGS__)
6893
#define vloxseg2ei16_v_i8m2_m(...) __riscv_vloxseg2ei16_v_i8m2_tumu(__VA_ARGS__)
6894
#define vloxseg3ei16_v_i8m2_m(...) __riscv_vloxseg3ei16_v_i8m2_tumu(__VA_ARGS__)
6895
#define vloxseg4ei16_v_i8m2_m(...) __riscv_vloxseg4ei16_v_i8m2_tumu(__VA_ARGS__)
6896
#define vloxseg2ei16_v_i8m4_m(...) __riscv_vloxseg2ei16_v_i8m4_tumu(__VA_ARGS__)
6897
#define vloxseg2ei32_v_i8mf8_m(...) __riscv_vloxseg2ei32_v_i8mf8_tumu(__VA_ARGS__)
6898
#define vloxseg3ei32_v_i8mf8_m(...) __riscv_vloxseg3ei32_v_i8mf8_tumu(__VA_ARGS__)
6899
#define vloxseg4ei32_v_i8mf8_m(...) __riscv_vloxseg4ei32_v_i8mf8_tumu(__VA_ARGS__)
6900
#define vloxseg5ei32_v_i8mf8_m(...) __riscv_vloxseg5ei32_v_i8mf8_tumu(__VA_ARGS__)
6901
#define vloxseg6ei32_v_i8mf8_m(...) __riscv_vloxseg6ei32_v_i8mf8_tumu(__VA_ARGS__)
6902
#define vloxseg7ei32_v_i8mf8_m(...) __riscv_vloxseg7ei32_v_i8mf8_tumu(__VA_ARGS__)
6903
#define vloxseg8ei32_v_i8mf8_m(...) __riscv_vloxseg8ei32_v_i8mf8_tumu(__VA_ARGS__)
6904
#define vloxseg2ei32_v_i8mf4_m(...) __riscv_vloxseg2ei32_v_i8mf4_tumu(__VA_ARGS__)
6905
#define vloxseg3ei32_v_i8mf4_m(...) __riscv_vloxseg3ei32_v_i8mf4_tumu(__VA_ARGS__)
6906
#define vloxseg4ei32_v_i8mf4_m(...) __riscv_vloxseg4ei32_v_i8mf4_tumu(__VA_ARGS__)
6907
#define vloxseg5ei32_v_i8mf4_m(...) __riscv_vloxseg5ei32_v_i8mf4_tumu(__VA_ARGS__)
6908
#define vloxseg6ei32_v_i8mf4_m(...) __riscv_vloxseg6ei32_v_i8mf4_tumu(__VA_ARGS__)
6909
#define vloxseg7ei32_v_i8mf4_m(...) __riscv_vloxseg7ei32_v_i8mf4_tumu(__VA_ARGS__)
6910
#define vloxseg8ei32_v_i8mf4_m(...) __riscv_vloxseg8ei32_v_i8mf4_tumu(__VA_ARGS__)
6911
#define vloxseg2ei32_v_i8mf2_m(...) __riscv_vloxseg2ei32_v_i8mf2_tumu(__VA_ARGS__)
6912
#define vloxseg3ei32_v_i8mf2_m(...) __riscv_vloxseg3ei32_v_i8mf2_tumu(__VA_ARGS__)
6913
#define vloxseg4ei32_v_i8mf2_m(...) __riscv_vloxseg4ei32_v_i8mf2_tumu(__VA_ARGS__)
6914
#define vloxseg5ei32_v_i8mf2_m(...) __riscv_vloxseg5ei32_v_i8mf2_tumu(__VA_ARGS__)
6915
#define vloxseg6ei32_v_i8mf2_m(...) __riscv_vloxseg6ei32_v_i8mf2_tumu(__VA_ARGS__)
6916
#define vloxseg7ei32_v_i8mf2_m(...) __riscv_vloxseg7ei32_v_i8mf2_tumu(__VA_ARGS__)
6917
#define vloxseg8ei32_v_i8mf2_m(...) __riscv_vloxseg8ei32_v_i8mf2_tumu(__VA_ARGS__)
6918
#define vloxseg2ei32_v_i8m1_m(...) __riscv_vloxseg2ei32_v_i8m1_tumu(__VA_ARGS__)
6919
#define vloxseg3ei32_v_i8m1_m(...) __riscv_vloxseg3ei32_v_i8m1_tumu(__VA_ARGS__)
6920
#define vloxseg4ei32_v_i8m1_m(...) __riscv_vloxseg4ei32_v_i8m1_tumu(__VA_ARGS__)
6921
#define vloxseg5ei32_v_i8m1_m(...) __riscv_vloxseg5ei32_v_i8m1_tumu(__VA_ARGS__)
6922
#define vloxseg6ei32_v_i8m1_m(...) __riscv_vloxseg6ei32_v_i8m1_tumu(__VA_ARGS__)
6923
#define vloxseg7ei32_v_i8m1_m(...) __riscv_vloxseg7ei32_v_i8m1_tumu(__VA_ARGS__)
6924
#define vloxseg8ei32_v_i8m1_m(...) __riscv_vloxseg8ei32_v_i8m1_tumu(__VA_ARGS__)
6925
#define vloxseg2ei32_v_i8m2_m(...) __riscv_vloxseg2ei32_v_i8m2_tumu(__VA_ARGS__)
6926
#define vloxseg3ei32_v_i8m2_m(...) __riscv_vloxseg3ei32_v_i8m2_tumu(__VA_ARGS__)
6927
#define vloxseg4ei32_v_i8m2_m(...) __riscv_vloxseg4ei32_v_i8m2_tumu(__VA_ARGS__)
6928
#define vloxseg2ei64_v_i8mf8_m(...) __riscv_vloxseg2ei64_v_i8mf8_tumu(__VA_ARGS__)
6929
#define vloxseg3ei64_v_i8mf8_m(...) __riscv_vloxseg3ei64_v_i8mf8_tumu(__VA_ARGS__)
6930
#define vloxseg4ei64_v_i8mf8_m(...) __riscv_vloxseg4ei64_v_i8mf8_tumu(__VA_ARGS__)
6931
#define vloxseg5ei64_v_i8mf8_m(...) __riscv_vloxseg5ei64_v_i8mf8_tumu(__VA_ARGS__)
6932
#define vloxseg6ei64_v_i8mf8_m(...) __riscv_vloxseg6ei64_v_i8mf8_tumu(__VA_ARGS__)
6933
#define vloxseg7ei64_v_i8mf8_m(...) __riscv_vloxseg7ei64_v_i8mf8_tumu(__VA_ARGS__)
6934
#define vloxseg8ei64_v_i8mf8_m(...) __riscv_vloxseg8ei64_v_i8mf8_tumu(__VA_ARGS__)
6935
#define vloxseg2ei64_v_i8mf4_m(...) __riscv_vloxseg2ei64_v_i8mf4_tumu(__VA_ARGS__)
6936
#define vloxseg3ei64_v_i8mf4_m(...) __riscv_vloxseg3ei64_v_i8mf4_tumu(__VA_ARGS__)
6937
#define vloxseg4ei64_v_i8mf4_m(...) __riscv_vloxseg4ei64_v_i8mf4_tumu(__VA_ARGS__)
6938
#define vloxseg5ei64_v_i8mf4_m(...) __riscv_vloxseg5ei64_v_i8mf4_tumu(__VA_ARGS__)
6939
#define vloxseg6ei64_v_i8mf4_m(...) __riscv_vloxseg6ei64_v_i8mf4_tumu(__VA_ARGS__)
6940
#define vloxseg7ei64_v_i8mf4_m(...) __riscv_vloxseg7ei64_v_i8mf4_tumu(__VA_ARGS__)
6941
#define vloxseg8ei64_v_i8mf4_m(...) __riscv_vloxseg8ei64_v_i8mf4_tumu(__VA_ARGS__)
6942
#define vloxseg2ei64_v_i8mf2_m(...) __riscv_vloxseg2ei64_v_i8mf2_tumu(__VA_ARGS__)
6943
#define vloxseg3ei64_v_i8mf2_m(...) __riscv_vloxseg3ei64_v_i8mf2_tumu(__VA_ARGS__)
6944
#define vloxseg4ei64_v_i8mf2_m(...) __riscv_vloxseg4ei64_v_i8mf2_tumu(__VA_ARGS__)
6945
#define vloxseg5ei64_v_i8mf2_m(...) __riscv_vloxseg5ei64_v_i8mf2_tumu(__VA_ARGS__)
6946
#define vloxseg6ei64_v_i8mf2_m(...) __riscv_vloxseg6ei64_v_i8mf2_tumu(__VA_ARGS__)
6947
#define vloxseg7ei64_v_i8mf2_m(...) __riscv_vloxseg7ei64_v_i8mf2_tumu(__VA_ARGS__)
6948
#define vloxseg8ei64_v_i8mf2_m(...) __riscv_vloxseg8ei64_v_i8mf2_tumu(__VA_ARGS__)
6949
#define vloxseg2ei64_v_i8m1_m(...) __riscv_vloxseg2ei64_v_i8m1_tumu(__VA_ARGS__)
6950
#define vloxseg3ei64_v_i8m1_m(...) __riscv_vloxseg3ei64_v_i8m1_tumu(__VA_ARGS__)
6951
#define vloxseg4ei64_v_i8m1_m(...) __riscv_vloxseg4ei64_v_i8m1_tumu(__VA_ARGS__)
6952
#define vloxseg5ei64_v_i8m1_m(...) __riscv_vloxseg5ei64_v_i8m1_tumu(__VA_ARGS__)
6953
#define vloxseg6ei64_v_i8m1_m(...) __riscv_vloxseg6ei64_v_i8m1_tumu(__VA_ARGS__)
6954
#define vloxseg7ei64_v_i8m1_m(...) __riscv_vloxseg7ei64_v_i8m1_tumu(__VA_ARGS__)
6955
#define vloxseg8ei64_v_i8m1_m(...) __riscv_vloxseg8ei64_v_i8m1_tumu(__VA_ARGS__)
6956
#define vloxseg2ei8_v_i16mf4_m(...) __riscv_vloxseg2ei8_v_i16mf4_tumu(__VA_ARGS__)
6957
#define vloxseg3ei8_v_i16mf4_m(...) __riscv_vloxseg3ei8_v_i16mf4_tumu(__VA_ARGS__)
6958
#define vloxseg4ei8_v_i16mf4_m(...) __riscv_vloxseg4ei8_v_i16mf4_tumu(__VA_ARGS__)
6959
#define vloxseg5ei8_v_i16mf4_m(...) __riscv_vloxseg5ei8_v_i16mf4_tumu(__VA_ARGS__)
6960
#define vloxseg6ei8_v_i16mf4_m(...) __riscv_vloxseg6ei8_v_i16mf4_tumu(__VA_ARGS__)
6961
#define vloxseg7ei8_v_i16mf4_m(...) __riscv_vloxseg7ei8_v_i16mf4_tumu(__VA_ARGS__)
6962
#define vloxseg8ei8_v_i16mf4_m(...) __riscv_vloxseg8ei8_v_i16mf4_tumu(__VA_ARGS__)
6963
#define vloxseg2ei8_v_i16mf2_m(...) __riscv_vloxseg2ei8_v_i16mf2_tumu(__VA_ARGS__)
6964
#define vloxseg3ei8_v_i16mf2_m(...) __riscv_vloxseg3ei8_v_i16mf2_tumu(__VA_ARGS__)
6965
#define vloxseg4ei8_v_i16mf2_m(...) __riscv_vloxseg4ei8_v_i16mf2_tumu(__VA_ARGS__)
6966
#define vloxseg5ei8_v_i16mf2_m(...) __riscv_vloxseg5ei8_v_i16mf2_tumu(__VA_ARGS__)
6967
#define vloxseg6ei8_v_i16mf2_m(...) __riscv_vloxseg6ei8_v_i16mf2_tumu(__VA_ARGS__)
6968
#define vloxseg7ei8_v_i16mf2_m(...) __riscv_vloxseg7ei8_v_i16mf2_tumu(__VA_ARGS__)
6969
#define vloxseg8ei8_v_i16mf2_m(...) __riscv_vloxseg8ei8_v_i16mf2_tumu(__VA_ARGS__)
6970
#define vloxseg2ei8_v_i16m1_m(...) __riscv_vloxseg2ei8_v_i16m1_tumu(__VA_ARGS__)
6971
#define vloxseg3ei8_v_i16m1_m(...) __riscv_vloxseg3ei8_v_i16m1_tumu(__VA_ARGS__)
6972
#define vloxseg4ei8_v_i16m1_m(...) __riscv_vloxseg4ei8_v_i16m1_tumu(__VA_ARGS__)
6973
#define vloxseg5ei8_v_i16m1_m(...) __riscv_vloxseg5ei8_v_i16m1_tumu(__VA_ARGS__)
6974
#define vloxseg6ei8_v_i16m1_m(...) __riscv_vloxseg6ei8_v_i16m1_tumu(__VA_ARGS__)
6975
#define vloxseg7ei8_v_i16m1_m(...) __riscv_vloxseg7ei8_v_i16m1_tumu(__VA_ARGS__)
6976
#define vloxseg8ei8_v_i16m1_m(...) __riscv_vloxseg8ei8_v_i16m1_tumu(__VA_ARGS__)
6977
#define vloxseg2ei8_v_i16m2_m(...) __riscv_vloxseg2ei8_v_i16m2_tumu(__VA_ARGS__)
6978
#define vloxseg3ei8_v_i16m2_m(...) __riscv_vloxseg3ei8_v_i16m2_tumu(__VA_ARGS__)
6979
#define vloxseg4ei8_v_i16m2_m(...) __riscv_vloxseg4ei8_v_i16m2_tumu(__VA_ARGS__)
6980
#define vloxseg2ei8_v_i16m4_m(...) __riscv_vloxseg2ei8_v_i16m4_tumu(__VA_ARGS__)
6981
#define vloxseg2ei16_v_i16mf4_m(...) __riscv_vloxseg2ei16_v_i16mf4_tumu(__VA_ARGS__)
6982
#define vloxseg3ei16_v_i16mf4_m(...) __riscv_vloxseg3ei16_v_i16mf4_tumu(__VA_ARGS__)
6983
#define vloxseg4ei16_v_i16mf4_m(...) __riscv_vloxseg4ei16_v_i16mf4_tumu(__VA_ARGS__)
6984
#define vloxseg5ei16_v_i16mf4_m(...) __riscv_vloxseg5ei16_v_i16mf4_tumu(__VA_ARGS__)
6985
#define vloxseg6ei16_v_i16mf4_m(...) __riscv_vloxseg6ei16_v_i16mf4_tumu(__VA_ARGS__)
6986
#define vloxseg7ei16_v_i16mf4_m(...) __riscv_vloxseg7ei16_v_i16mf4_tumu(__VA_ARGS__)
6987
#define vloxseg8ei16_v_i16mf4_m(...) __riscv_vloxseg8ei16_v_i16mf4_tumu(__VA_ARGS__)
6988
#define vloxseg2ei16_v_i16mf2_m(...) __riscv_vloxseg2ei16_v_i16mf2_tumu(__VA_ARGS__)
6989
#define vloxseg3ei16_v_i16mf2_m(...) __riscv_vloxseg3ei16_v_i16mf2_tumu(__VA_ARGS__)
6990
#define vloxseg4ei16_v_i16mf2_m(...) __riscv_vloxseg4ei16_v_i16mf2_tumu(__VA_ARGS__)
6991
#define vloxseg5ei16_v_i16mf2_m(...) __riscv_vloxseg5ei16_v_i16mf2_tumu(__VA_ARGS__)
6992
#define vloxseg6ei16_v_i16mf2_m(...) __riscv_vloxseg6ei16_v_i16mf2_tumu(__VA_ARGS__)
6993
#define vloxseg7ei16_v_i16mf2_m(...) __riscv_vloxseg7ei16_v_i16mf2_tumu(__VA_ARGS__)
6994
#define vloxseg8ei16_v_i16mf2_m(...) __riscv_vloxseg8ei16_v_i16mf2_tumu(__VA_ARGS__)
6995
#define vloxseg2ei16_v_i16m1_m(...) __riscv_vloxseg2ei16_v_i16m1_tumu(__VA_ARGS__)
6996
#define vloxseg3ei16_v_i16m1_m(...) __riscv_vloxseg3ei16_v_i16m1_tumu(__VA_ARGS__)
6997
#define vloxseg4ei16_v_i16m1_m(...) __riscv_vloxseg4ei16_v_i16m1_tumu(__VA_ARGS__)
6998
#define vloxseg5ei16_v_i16m1_m(...) __riscv_vloxseg5ei16_v_i16m1_tumu(__VA_ARGS__)
6999
#define vloxseg6ei16_v_i16m1_m(...) __riscv_vloxseg6ei16_v_i16m1_tumu(__VA_ARGS__)
7000
#define vloxseg7ei16_v_i16m1_m(...) __riscv_vloxseg7ei16_v_i16m1_tumu(__VA_ARGS__)
7001
#define vloxseg8ei16_v_i16m1_m(...) __riscv_vloxseg8ei16_v_i16m1_tumu(__VA_ARGS__)
7002
#define vloxseg2ei16_v_i16m2_m(...) __riscv_vloxseg2ei16_v_i16m2_tumu(__VA_ARGS__)
7003
#define vloxseg3ei16_v_i16m2_m(...) __riscv_vloxseg3ei16_v_i16m2_tumu(__VA_ARGS__)
7004
#define vloxseg4ei16_v_i16m2_m(...) __riscv_vloxseg4ei16_v_i16m2_tumu(__VA_ARGS__)
7005
#define vloxseg2ei16_v_i16m4_m(...) __riscv_vloxseg2ei16_v_i16m4_tumu(__VA_ARGS__)
7006
#define vloxseg2ei32_v_i16mf4_m(...) __riscv_vloxseg2ei32_v_i16mf4_tumu(__VA_ARGS__)
7007
#define vloxseg3ei32_v_i16mf4_m(...) __riscv_vloxseg3ei32_v_i16mf4_tumu(__VA_ARGS__)
7008
#define vloxseg4ei32_v_i16mf4_m(...) __riscv_vloxseg4ei32_v_i16mf4_tumu(__VA_ARGS__)
7009
#define vloxseg5ei32_v_i16mf4_m(...) __riscv_vloxseg5ei32_v_i16mf4_tumu(__VA_ARGS__)
7010
#define vloxseg6ei32_v_i16mf4_m(...) __riscv_vloxseg6ei32_v_i16mf4_tumu(__VA_ARGS__)
7011
#define vloxseg7ei32_v_i16mf4_m(...) __riscv_vloxseg7ei32_v_i16mf4_tumu(__VA_ARGS__)
7012
#define vloxseg8ei32_v_i16mf4_m(...) __riscv_vloxseg8ei32_v_i16mf4_tumu(__VA_ARGS__)
7013
#define vloxseg2ei32_v_i16mf2_m(...) __riscv_vloxseg2ei32_v_i16mf2_tumu(__VA_ARGS__)
7014
#define vloxseg3ei32_v_i16mf2_m(...) __riscv_vloxseg3ei32_v_i16mf2_tumu(__VA_ARGS__)
7015
#define vloxseg4ei32_v_i16mf2_m(...) __riscv_vloxseg4ei32_v_i16mf2_tumu(__VA_ARGS__)
7016
#define vloxseg5ei32_v_i16mf2_m(...) __riscv_vloxseg5ei32_v_i16mf2_tumu(__VA_ARGS__)
7017
#define vloxseg6ei32_v_i16mf2_m(...) __riscv_vloxseg6ei32_v_i16mf2_tumu(__VA_ARGS__)
7018
#define vloxseg7ei32_v_i16mf2_m(...) __riscv_vloxseg7ei32_v_i16mf2_tumu(__VA_ARGS__)
7019
#define vloxseg8ei32_v_i16mf2_m(...) __riscv_vloxseg8ei32_v_i16mf2_tumu(__VA_ARGS__)
7020
#define vloxseg2ei32_v_i16m1_m(...) __riscv_vloxseg2ei32_v_i16m1_tumu(__VA_ARGS__)
7021
#define vloxseg3ei32_v_i16m1_m(...) __riscv_vloxseg3ei32_v_i16m1_tumu(__VA_ARGS__)
7022
#define vloxseg4ei32_v_i16m1_m(...) __riscv_vloxseg4ei32_v_i16m1_tumu(__VA_ARGS__)
7023
#define vloxseg5ei32_v_i16m1_m(...) __riscv_vloxseg5ei32_v_i16m1_tumu(__VA_ARGS__)
7024
#define vloxseg6ei32_v_i16m1_m(...) __riscv_vloxseg6ei32_v_i16m1_tumu(__VA_ARGS__)
7025
#define vloxseg7ei32_v_i16m1_m(...) __riscv_vloxseg7ei32_v_i16m1_tumu(__VA_ARGS__)
7026
#define vloxseg8ei32_v_i16m1_m(...) __riscv_vloxseg8ei32_v_i16m1_tumu(__VA_ARGS__)
7027
#define vloxseg2ei32_v_i16m2_m(...) __riscv_vloxseg2ei32_v_i16m2_tumu(__VA_ARGS__)
7028
#define vloxseg3ei32_v_i16m2_m(...) __riscv_vloxseg3ei32_v_i16m2_tumu(__VA_ARGS__)
7029
#define vloxseg4ei32_v_i16m2_m(...) __riscv_vloxseg4ei32_v_i16m2_tumu(__VA_ARGS__)
7030
#define vloxseg2ei32_v_i16m4_m(...) __riscv_vloxseg2ei32_v_i16m4_tumu(__VA_ARGS__)
7031
#define vloxseg2ei64_v_i16mf4_m(...) __riscv_vloxseg2ei64_v_i16mf4_tumu(__VA_ARGS__)
7032
#define vloxseg3ei64_v_i16mf4_m(...) __riscv_vloxseg3ei64_v_i16mf4_tumu(__VA_ARGS__)
7033
#define vloxseg4ei64_v_i16mf4_m(...) __riscv_vloxseg4ei64_v_i16mf4_tumu(__VA_ARGS__)
7034
#define vloxseg5ei64_v_i16mf4_m(...) __riscv_vloxseg5ei64_v_i16mf4_tumu(__VA_ARGS__)
7035
#define vloxseg6ei64_v_i16mf4_m(...) __riscv_vloxseg6ei64_v_i16mf4_tumu(__VA_ARGS__)
7036
#define vloxseg7ei64_v_i16mf4_m(...) __riscv_vloxseg7ei64_v_i16mf4_tumu(__VA_ARGS__)
7037
#define vloxseg8ei64_v_i16mf4_m(...) __riscv_vloxseg8ei64_v_i16mf4_tumu(__VA_ARGS__)
7038
#define vloxseg2ei64_v_i16mf2_m(...) __riscv_vloxseg2ei64_v_i16mf2_tumu(__VA_ARGS__)
7039
#define vloxseg3ei64_v_i16mf2_m(...) __riscv_vloxseg3ei64_v_i16mf2_tumu(__VA_ARGS__)
7040
#define vloxseg4ei64_v_i16mf2_m(...) __riscv_vloxseg4ei64_v_i16mf2_tumu(__VA_ARGS__)
7041
#define vloxseg5ei64_v_i16mf2_m(...) __riscv_vloxseg5ei64_v_i16mf2_tumu(__VA_ARGS__)
7042
#define vloxseg6ei64_v_i16mf2_m(...) __riscv_vloxseg6ei64_v_i16mf2_tumu(__VA_ARGS__)
7043
#define vloxseg7ei64_v_i16mf2_m(...) __riscv_vloxseg7ei64_v_i16mf2_tumu(__VA_ARGS__)
7044
#define vloxseg8ei64_v_i16mf2_m(...) __riscv_vloxseg8ei64_v_i16mf2_tumu(__VA_ARGS__)
7045
#define vloxseg2ei64_v_i16m1_m(...) __riscv_vloxseg2ei64_v_i16m1_tumu(__VA_ARGS__)
7046
#define vloxseg3ei64_v_i16m1_m(...) __riscv_vloxseg3ei64_v_i16m1_tumu(__VA_ARGS__)
7047
#define vloxseg4ei64_v_i16m1_m(...) __riscv_vloxseg4ei64_v_i16m1_tumu(__VA_ARGS__)
7048
#define vloxseg5ei64_v_i16m1_m(...) __riscv_vloxseg5ei64_v_i16m1_tumu(__VA_ARGS__)
7049
#define vloxseg6ei64_v_i16m1_m(...) __riscv_vloxseg6ei64_v_i16m1_tumu(__VA_ARGS__)
7050
#define vloxseg7ei64_v_i16m1_m(...) __riscv_vloxseg7ei64_v_i16m1_tumu(__VA_ARGS__)
7051
#define vloxseg8ei64_v_i16m1_m(...) __riscv_vloxseg8ei64_v_i16m1_tumu(__VA_ARGS__)
7052
#define vloxseg2ei64_v_i16m2_m(...) __riscv_vloxseg2ei64_v_i16m2_tumu(__VA_ARGS__)
7053
#define vloxseg3ei64_v_i16m2_m(...) __riscv_vloxseg3ei64_v_i16m2_tumu(__VA_ARGS__)
7054
#define vloxseg4ei64_v_i16m2_m(...) __riscv_vloxseg4ei64_v_i16m2_tumu(__VA_ARGS__)
7055
#define vloxseg2ei8_v_i32mf2_m(...) __riscv_vloxseg2ei8_v_i32mf2_tumu(__VA_ARGS__)
7056
#define vloxseg3ei8_v_i32mf2_m(...) __riscv_vloxseg3ei8_v_i32mf2_tumu(__VA_ARGS__)
7057
#define vloxseg4ei8_v_i32mf2_m(...) __riscv_vloxseg4ei8_v_i32mf2_tumu(__VA_ARGS__)
7058
#define vloxseg5ei8_v_i32mf2_m(...) __riscv_vloxseg5ei8_v_i32mf2_tumu(__VA_ARGS__)
7059
#define vloxseg6ei8_v_i32mf2_m(...) __riscv_vloxseg6ei8_v_i32mf2_tumu(__VA_ARGS__)
7060
#define vloxseg7ei8_v_i32mf2_m(...) __riscv_vloxseg7ei8_v_i32mf2_tumu(__VA_ARGS__)
7061
#define vloxseg8ei8_v_i32mf2_m(...) __riscv_vloxseg8ei8_v_i32mf2_tumu(__VA_ARGS__)
7062
#define vloxseg2ei8_v_i32m1_m(...) __riscv_vloxseg2ei8_v_i32m1_tumu(__VA_ARGS__)
7063
#define vloxseg3ei8_v_i32m1_m(...) __riscv_vloxseg3ei8_v_i32m1_tumu(__VA_ARGS__)
7064
#define vloxseg4ei8_v_i32m1_m(...) __riscv_vloxseg4ei8_v_i32m1_tumu(__VA_ARGS__)
7065
#define vloxseg5ei8_v_i32m1_m(...) __riscv_vloxseg5ei8_v_i32m1_tumu(__VA_ARGS__)
7066
#define vloxseg6ei8_v_i32m1_m(...) __riscv_vloxseg6ei8_v_i32m1_tumu(__VA_ARGS__)
7067
#define vloxseg7ei8_v_i32m1_m(...) __riscv_vloxseg7ei8_v_i32m1_tumu(__VA_ARGS__)
7068
#define vloxseg8ei8_v_i32m1_m(...) __riscv_vloxseg8ei8_v_i32m1_tumu(__VA_ARGS__)
7069
#define vloxseg2ei8_v_i32m2_m(...) __riscv_vloxseg2ei8_v_i32m2_tumu(__VA_ARGS__)
7070
#define vloxseg3ei8_v_i32m2_m(...) __riscv_vloxseg3ei8_v_i32m2_tumu(__VA_ARGS__)
7071
#define vloxseg4ei8_v_i32m2_m(...) __riscv_vloxseg4ei8_v_i32m2_tumu(__VA_ARGS__)
7072
#define vloxseg2ei8_v_i32m4_m(...) __riscv_vloxseg2ei8_v_i32m4_tumu(__VA_ARGS__)
7073
#define vloxseg2ei16_v_i32mf2_m(...) __riscv_vloxseg2ei16_v_i32mf2_tumu(__VA_ARGS__)
7074
#define vloxseg3ei16_v_i32mf2_m(...) __riscv_vloxseg3ei16_v_i32mf2_tumu(__VA_ARGS__)
7075
#define vloxseg4ei16_v_i32mf2_m(...) __riscv_vloxseg4ei16_v_i32mf2_tumu(__VA_ARGS__)
7076
#define vloxseg5ei16_v_i32mf2_m(...) __riscv_vloxseg5ei16_v_i32mf2_tumu(__VA_ARGS__)
7077
#define vloxseg6ei16_v_i32mf2_m(...) __riscv_vloxseg6ei16_v_i32mf2_tumu(__VA_ARGS__)
7078
#define vloxseg7ei16_v_i32mf2_m(...) __riscv_vloxseg7ei16_v_i32mf2_tumu(__VA_ARGS__)
7079
#define vloxseg8ei16_v_i32mf2_m(...) __riscv_vloxseg8ei16_v_i32mf2_tumu(__VA_ARGS__)
7080
#define vloxseg2ei16_v_i32m1_m(...) __riscv_vloxseg2ei16_v_i32m1_tumu(__VA_ARGS__)
7081
#define vloxseg3ei16_v_i32m1_m(...) __riscv_vloxseg3ei16_v_i32m1_tumu(__VA_ARGS__)
7082
#define vloxseg4ei16_v_i32m1_m(...) __riscv_vloxseg4ei16_v_i32m1_tumu(__VA_ARGS__)
7083
#define vloxseg5ei16_v_i32m1_m(...) __riscv_vloxseg5ei16_v_i32m1_tumu(__VA_ARGS__)
7084
#define vloxseg6ei16_v_i32m1_m(...) __riscv_vloxseg6ei16_v_i32m1_tumu(__VA_ARGS__)
7085
#define vloxseg7ei16_v_i32m1_m(...) __riscv_vloxseg7ei16_v_i32m1_tumu(__VA_ARGS__)
7086
#define vloxseg8ei16_v_i32m1_m(...) __riscv_vloxseg8ei16_v_i32m1_tumu(__VA_ARGS__)
7087
#define vloxseg2ei16_v_i32m2_m(...) __riscv_vloxseg2ei16_v_i32m2_tumu(__VA_ARGS__)
7088
#define vloxseg3ei16_v_i32m2_m(...) __riscv_vloxseg3ei16_v_i32m2_tumu(__VA_ARGS__)
7089
#define vloxseg4ei16_v_i32m2_m(...) __riscv_vloxseg4ei16_v_i32m2_tumu(__VA_ARGS__)
7090
#define vloxseg2ei16_v_i32m4_m(...) __riscv_vloxseg2ei16_v_i32m4_tumu(__VA_ARGS__)
7091
#define vloxseg2ei32_v_i32mf2_m(...) __riscv_vloxseg2ei32_v_i32mf2_tumu(__VA_ARGS__)
7092
#define vloxseg3ei32_v_i32mf2_m(...) __riscv_vloxseg3ei32_v_i32mf2_tumu(__VA_ARGS__)
7093
#define vloxseg4ei32_v_i32mf2_m(...) __riscv_vloxseg4ei32_v_i32mf2_tumu(__VA_ARGS__)
7094
#define vloxseg5ei32_v_i32mf2_m(...) __riscv_vloxseg5ei32_v_i32mf2_tumu(__VA_ARGS__)
7095
#define vloxseg6ei32_v_i32mf2_m(...) __riscv_vloxseg6ei32_v_i32mf2_tumu(__VA_ARGS__)
7096
#define vloxseg7ei32_v_i32mf2_m(...) __riscv_vloxseg7ei32_v_i32mf2_tumu(__VA_ARGS__)
7097
#define vloxseg8ei32_v_i32mf2_m(...) __riscv_vloxseg8ei32_v_i32mf2_tumu(__VA_ARGS__)
7098
#define vloxseg2ei32_v_i32m1_m(...) __riscv_vloxseg2ei32_v_i32m1_tumu(__VA_ARGS__)
7099
#define vloxseg3ei32_v_i32m1_m(...) __riscv_vloxseg3ei32_v_i32m1_tumu(__VA_ARGS__)
7100
#define vloxseg4ei32_v_i32m1_m(...) __riscv_vloxseg4ei32_v_i32m1_tumu(__VA_ARGS__)
7101
#define vloxseg5ei32_v_i32m1_m(...) __riscv_vloxseg5ei32_v_i32m1_tumu(__VA_ARGS__)
7102
#define vloxseg6ei32_v_i32m1_m(...) __riscv_vloxseg6ei32_v_i32m1_tumu(__VA_ARGS__)
7103
#define vloxseg7ei32_v_i32m1_m(...) __riscv_vloxseg7ei32_v_i32m1_tumu(__VA_ARGS__)
7104
#define vloxseg8ei32_v_i32m1_m(...) __riscv_vloxseg8ei32_v_i32m1_tumu(__VA_ARGS__)
7105
#define vloxseg2ei32_v_i32m2_m(...) __riscv_vloxseg2ei32_v_i32m2_tumu(__VA_ARGS__)
7106
#define vloxseg3ei32_v_i32m2_m(...) __riscv_vloxseg3ei32_v_i32m2_tumu(__VA_ARGS__)
7107
#define vloxseg4ei32_v_i32m2_m(...) __riscv_vloxseg4ei32_v_i32m2_tumu(__VA_ARGS__)
7108
#define vloxseg2ei32_v_i32m4_m(...) __riscv_vloxseg2ei32_v_i32m4_tumu(__VA_ARGS__)
7109
#define vloxseg2ei64_v_i32mf2_m(...) __riscv_vloxseg2ei64_v_i32mf2_tumu(__VA_ARGS__)
7110
#define vloxseg3ei64_v_i32mf2_m(...) __riscv_vloxseg3ei64_v_i32mf2_tumu(__VA_ARGS__)
7111
#define vloxseg4ei64_v_i32mf2_m(...) __riscv_vloxseg4ei64_v_i32mf2_tumu(__VA_ARGS__)
7112
#define vloxseg5ei64_v_i32mf2_m(...) __riscv_vloxseg5ei64_v_i32mf2_tumu(__VA_ARGS__)
7113
#define vloxseg6ei64_v_i32mf2_m(...) __riscv_vloxseg6ei64_v_i32mf2_tumu(__VA_ARGS__)
7114
#define vloxseg7ei64_v_i32mf2_m(...) __riscv_vloxseg7ei64_v_i32mf2_tumu(__VA_ARGS__)
7115
#define vloxseg8ei64_v_i32mf2_m(...) __riscv_vloxseg8ei64_v_i32mf2_tumu(__VA_ARGS__)
7116
#define vloxseg2ei64_v_i32m1_m(...) __riscv_vloxseg2ei64_v_i32m1_tumu(__VA_ARGS__)
7117
#define vloxseg3ei64_v_i32m1_m(...) __riscv_vloxseg3ei64_v_i32m1_tumu(__VA_ARGS__)
7118
#define vloxseg4ei64_v_i32m1_m(...) __riscv_vloxseg4ei64_v_i32m1_tumu(__VA_ARGS__)
7119
#define vloxseg5ei64_v_i32m1_m(...) __riscv_vloxseg5ei64_v_i32m1_tumu(__VA_ARGS__)
7120
#define vloxseg6ei64_v_i32m1_m(...) __riscv_vloxseg6ei64_v_i32m1_tumu(__VA_ARGS__)
7121
#define vloxseg7ei64_v_i32m1_m(...) __riscv_vloxseg7ei64_v_i32m1_tumu(__VA_ARGS__)
7122
#define vloxseg8ei64_v_i32m1_m(...) __riscv_vloxseg8ei64_v_i32m1_tumu(__VA_ARGS__)
7123
#define vloxseg2ei64_v_i32m2_m(...) __riscv_vloxseg2ei64_v_i32m2_tumu(__VA_ARGS__)
7124
#define vloxseg3ei64_v_i32m2_m(...) __riscv_vloxseg3ei64_v_i32m2_tumu(__VA_ARGS__)
7125
#define vloxseg4ei64_v_i32m2_m(...) __riscv_vloxseg4ei64_v_i32m2_tumu(__VA_ARGS__)
7126
#define vloxseg2ei64_v_i32m4_m(...) __riscv_vloxseg2ei64_v_i32m4_tumu(__VA_ARGS__)
7127
#define vloxseg2ei8_v_i64m1_m(...) __riscv_vloxseg2ei8_v_i64m1_tumu(__VA_ARGS__)
7128
#define vloxseg3ei8_v_i64m1_m(...) __riscv_vloxseg3ei8_v_i64m1_tumu(__VA_ARGS__)
7129
#define vloxseg4ei8_v_i64m1_m(...) __riscv_vloxseg4ei8_v_i64m1_tumu(__VA_ARGS__)
7130
#define vloxseg5ei8_v_i64m1_m(...) __riscv_vloxseg5ei8_v_i64m1_tumu(__VA_ARGS__)
7131
#define vloxseg6ei8_v_i64m1_m(...) __riscv_vloxseg6ei8_v_i64m1_tumu(__VA_ARGS__)
7132
#define vloxseg7ei8_v_i64m1_m(...) __riscv_vloxseg7ei8_v_i64m1_tumu(__VA_ARGS__)
7133
#define vloxseg8ei8_v_i64m1_m(...) __riscv_vloxseg8ei8_v_i64m1_tumu(__VA_ARGS__)
7134
#define vloxseg2ei8_v_i64m2_m(...) __riscv_vloxseg2ei8_v_i64m2_tumu(__VA_ARGS__)
7135
#define vloxseg3ei8_v_i64m2_m(...) __riscv_vloxseg3ei8_v_i64m2_tumu(__VA_ARGS__)
7136
#define vloxseg4ei8_v_i64m2_m(...) __riscv_vloxseg4ei8_v_i64m2_tumu(__VA_ARGS__)
7137
#define vloxseg2ei8_v_i64m4_m(...) __riscv_vloxseg2ei8_v_i64m4_tumu(__VA_ARGS__)
7138
#define vloxseg2ei16_v_i64m1_m(...) __riscv_vloxseg2ei16_v_i64m1_tumu(__VA_ARGS__)
7139
#define vloxseg3ei16_v_i64m1_m(...) __riscv_vloxseg3ei16_v_i64m1_tumu(__VA_ARGS__)
7140
#define vloxseg4ei16_v_i64m1_m(...) __riscv_vloxseg4ei16_v_i64m1_tumu(__VA_ARGS__)
7141
#define vloxseg5ei16_v_i64m1_m(...) __riscv_vloxseg5ei16_v_i64m1_tumu(__VA_ARGS__)
7142
#define vloxseg6ei16_v_i64m1_m(...) __riscv_vloxseg6ei16_v_i64m1_tumu(__VA_ARGS__)
7143
#define vloxseg7ei16_v_i64m1_m(...) __riscv_vloxseg7ei16_v_i64m1_tumu(__VA_ARGS__)
7144
#define vloxseg8ei16_v_i64m1_m(...) __riscv_vloxseg8ei16_v_i64m1_tumu(__VA_ARGS__)
7145
#define vloxseg2ei16_v_i64m2_m(...) __riscv_vloxseg2ei16_v_i64m2_tumu(__VA_ARGS__)
7146
#define vloxseg3ei16_v_i64m2_m(...) __riscv_vloxseg3ei16_v_i64m2_tumu(__VA_ARGS__)
7147
#define vloxseg4ei16_v_i64m2_m(...) __riscv_vloxseg4ei16_v_i64m2_tumu(__VA_ARGS__)
7148
#define vloxseg2ei16_v_i64m4_m(...) __riscv_vloxseg2ei16_v_i64m4_tumu(__VA_ARGS__)
7149
#define vloxseg2ei32_v_i64m1_m(...) __riscv_vloxseg2ei32_v_i64m1_tumu(__VA_ARGS__)
7150
#define vloxseg3ei32_v_i64m1_m(...) __riscv_vloxseg3ei32_v_i64m1_tumu(__VA_ARGS__)
7151
#define vloxseg4ei32_v_i64m1_m(...) __riscv_vloxseg4ei32_v_i64m1_tumu(__VA_ARGS__)
7152
#define vloxseg5ei32_v_i64m1_m(...) __riscv_vloxseg5ei32_v_i64m1_tumu(__VA_ARGS__)
7153
#define vloxseg6ei32_v_i64m1_m(...) __riscv_vloxseg6ei32_v_i64m1_tumu(__VA_ARGS__)
7154
#define vloxseg7ei32_v_i64m1_m(...) __riscv_vloxseg7ei32_v_i64m1_tumu(__VA_ARGS__)
7155
#define vloxseg8ei32_v_i64m1_m(...) __riscv_vloxseg8ei32_v_i64m1_tumu(__VA_ARGS__)
7156
#define vloxseg2ei32_v_i64m2_m(...) __riscv_vloxseg2ei32_v_i64m2_tumu(__VA_ARGS__)
7157
#define vloxseg3ei32_v_i64m2_m(...) __riscv_vloxseg3ei32_v_i64m2_tumu(__VA_ARGS__)
7158
#define vloxseg4ei32_v_i64m2_m(...) __riscv_vloxseg4ei32_v_i64m2_tumu(__VA_ARGS__)
7159
#define vloxseg2ei32_v_i64m4_m(...) __riscv_vloxseg2ei32_v_i64m4_tumu(__VA_ARGS__)
7160
#define vloxseg2ei64_v_i64m1_m(...) __riscv_vloxseg2ei64_v_i64m1_tumu(__VA_ARGS__)
7161
#define vloxseg3ei64_v_i64m1_m(...) __riscv_vloxseg3ei64_v_i64m1_tumu(__VA_ARGS__)
7162
#define vloxseg4ei64_v_i64m1_m(...) __riscv_vloxseg4ei64_v_i64m1_tumu(__VA_ARGS__)
7163
#define vloxseg5ei64_v_i64m1_m(...) __riscv_vloxseg5ei64_v_i64m1_tumu(__VA_ARGS__)
7164
#define vloxseg6ei64_v_i64m1_m(...) __riscv_vloxseg6ei64_v_i64m1_tumu(__VA_ARGS__)
7165
#define vloxseg7ei64_v_i64m1_m(...) __riscv_vloxseg7ei64_v_i64m1_tumu(__VA_ARGS__)
7166
#define vloxseg8ei64_v_i64m1_m(...) __riscv_vloxseg8ei64_v_i64m1_tumu(__VA_ARGS__)
7167
#define vloxseg2ei64_v_i64m2_m(...) __riscv_vloxseg2ei64_v_i64m2_tumu(__VA_ARGS__)
7168
#define vloxseg3ei64_v_i64m2_m(...) __riscv_vloxseg3ei64_v_i64m2_tumu(__VA_ARGS__)
7169
#define vloxseg4ei64_v_i64m2_m(...) __riscv_vloxseg4ei64_v_i64m2_tumu(__VA_ARGS__)
7170
#define vloxseg2ei64_v_i64m4_m(...) __riscv_vloxseg2ei64_v_i64m4_tumu(__VA_ARGS__)
7171
#define vluxseg2ei8_v_i8mf8_m(...) __riscv_vluxseg2ei8_v_i8mf8_tumu(__VA_ARGS__)
7172
#define vluxseg3ei8_v_i8mf8_m(...) __riscv_vluxseg3ei8_v_i8mf8_tumu(__VA_ARGS__)
7173
#define vluxseg4ei8_v_i8mf8_m(...) __riscv_vluxseg4ei8_v_i8mf8_tumu(__VA_ARGS__)
7174
#define vluxseg5ei8_v_i8mf8_m(...) __riscv_vluxseg5ei8_v_i8mf8_tumu(__VA_ARGS__)
7175
#define vluxseg6ei8_v_i8mf8_m(...) __riscv_vluxseg6ei8_v_i8mf8_tumu(__VA_ARGS__)
7176
#define vluxseg7ei8_v_i8mf8_m(...) __riscv_vluxseg7ei8_v_i8mf8_tumu(__VA_ARGS__)
7177
#define vluxseg8ei8_v_i8mf8_m(...) __riscv_vluxseg8ei8_v_i8mf8_tumu(__VA_ARGS__)
7178
#define vluxseg2ei8_v_i8mf4_m(...) __riscv_vluxseg2ei8_v_i8mf4_tumu(__VA_ARGS__)
7179
#define vluxseg3ei8_v_i8mf4_m(...) __riscv_vluxseg3ei8_v_i8mf4_tumu(__VA_ARGS__)
7180
#define vluxseg4ei8_v_i8mf4_m(...) __riscv_vluxseg4ei8_v_i8mf4_tumu(__VA_ARGS__)
7181
#define vluxseg5ei8_v_i8mf4_m(...) __riscv_vluxseg5ei8_v_i8mf4_tumu(__VA_ARGS__)
7182
#define vluxseg6ei8_v_i8mf4_m(...) __riscv_vluxseg6ei8_v_i8mf4_tumu(__VA_ARGS__)
7183
#define vluxseg7ei8_v_i8mf4_m(...) __riscv_vluxseg7ei8_v_i8mf4_tumu(__VA_ARGS__)
7184
#define vluxseg8ei8_v_i8mf4_m(...) __riscv_vluxseg8ei8_v_i8mf4_tumu(__VA_ARGS__)
7185
#define vluxseg2ei8_v_i8mf2_m(...) __riscv_vluxseg2ei8_v_i8mf2_tumu(__VA_ARGS__)
7186
#define vluxseg3ei8_v_i8mf2_m(...) __riscv_vluxseg3ei8_v_i8mf2_tumu(__VA_ARGS__)
7187
#define vluxseg4ei8_v_i8mf2_m(...) __riscv_vluxseg4ei8_v_i8mf2_tumu(__VA_ARGS__)
7188
#define vluxseg5ei8_v_i8mf2_m(...) __riscv_vluxseg5ei8_v_i8mf2_tumu(__VA_ARGS__)
7189
#define vluxseg6ei8_v_i8mf2_m(...) __riscv_vluxseg6ei8_v_i8mf2_tumu(__VA_ARGS__)
7190
#define vluxseg7ei8_v_i8mf2_m(...) __riscv_vluxseg7ei8_v_i8mf2_tumu(__VA_ARGS__)
7191
#define vluxseg8ei8_v_i8mf2_m(...) __riscv_vluxseg8ei8_v_i8mf2_tumu(__VA_ARGS__)
7192
#define vluxseg2ei8_v_i8m1_m(...) __riscv_vluxseg2ei8_v_i8m1_tumu(__VA_ARGS__)
7193
#define vluxseg3ei8_v_i8m1_m(...) __riscv_vluxseg3ei8_v_i8m1_tumu(__VA_ARGS__)
7194
#define vluxseg4ei8_v_i8m1_m(...) __riscv_vluxseg4ei8_v_i8m1_tumu(__VA_ARGS__)
7195
#define vluxseg5ei8_v_i8m1_m(...) __riscv_vluxseg5ei8_v_i8m1_tumu(__VA_ARGS__)
7196
#define vluxseg6ei8_v_i8m1_m(...) __riscv_vluxseg6ei8_v_i8m1_tumu(__VA_ARGS__)
7197
#define vluxseg7ei8_v_i8m1_m(...) __riscv_vluxseg7ei8_v_i8m1_tumu(__VA_ARGS__)
7198
#define vluxseg8ei8_v_i8m1_m(...) __riscv_vluxseg8ei8_v_i8m1_tumu(__VA_ARGS__)
7199
#define vluxseg2ei8_v_i8m2_m(...) __riscv_vluxseg2ei8_v_i8m2_tumu(__VA_ARGS__)
7200
#define vluxseg3ei8_v_i8m2_m(...) __riscv_vluxseg3ei8_v_i8m2_tumu(__VA_ARGS__)
7201
#define vluxseg4ei8_v_i8m2_m(...) __riscv_vluxseg4ei8_v_i8m2_tumu(__VA_ARGS__)
7202
#define vluxseg2ei8_v_i8m4_m(...) __riscv_vluxseg2ei8_v_i8m4_tumu(__VA_ARGS__)
7203
#define vluxseg2ei16_v_i8mf8_m(...) __riscv_vluxseg2ei16_v_i8mf8_tumu(__VA_ARGS__)
7204
#define vluxseg3ei16_v_i8mf8_m(...) __riscv_vluxseg3ei16_v_i8mf8_tumu(__VA_ARGS__)
7205
#define vluxseg4ei16_v_i8mf8_m(...) __riscv_vluxseg4ei16_v_i8mf8_tumu(__VA_ARGS__)
7206
#define vluxseg5ei16_v_i8mf8_m(...) __riscv_vluxseg5ei16_v_i8mf8_tumu(__VA_ARGS__)
7207
#define vluxseg6ei16_v_i8mf8_m(...) __riscv_vluxseg6ei16_v_i8mf8_tumu(__VA_ARGS__)
7208
#define vluxseg7ei16_v_i8mf8_m(...) __riscv_vluxseg7ei16_v_i8mf8_tumu(__VA_ARGS__)
7209
#define vluxseg8ei16_v_i8mf8_m(...) __riscv_vluxseg8ei16_v_i8mf8_tumu(__VA_ARGS__)
7210
#define vluxseg2ei16_v_i8mf4_m(...) __riscv_vluxseg2ei16_v_i8mf4_tumu(__VA_ARGS__)
7211
#define vluxseg3ei16_v_i8mf4_m(...) __riscv_vluxseg3ei16_v_i8mf4_tumu(__VA_ARGS__)
7212
#define vluxseg4ei16_v_i8mf4_m(...) __riscv_vluxseg4ei16_v_i8mf4_tumu(__VA_ARGS__)
7213
#define vluxseg5ei16_v_i8mf4_m(...) __riscv_vluxseg5ei16_v_i8mf4_tumu(__VA_ARGS__)
7214
#define vluxseg6ei16_v_i8mf4_m(...) __riscv_vluxseg6ei16_v_i8mf4_tumu(__VA_ARGS__)
7215
#define vluxseg7ei16_v_i8mf4_m(...) __riscv_vluxseg7ei16_v_i8mf4_tumu(__VA_ARGS__)
7216
#define vluxseg8ei16_v_i8mf4_m(...) __riscv_vluxseg8ei16_v_i8mf4_tumu(__VA_ARGS__)
7217
#define vluxseg2ei16_v_i8mf2_m(...) __riscv_vluxseg2ei16_v_i8mf2_tumu(__VA_ARGS__)
7218
#define vluxseg3ei16_v_i8mf2_m(...) __riscv_vluxseg3ei16_v_i8mf2_tumu(__VA_ARGS__)
7219
#define vluxseg4ei16_v_i8mf2_m(...) __riscv_vluxseg4ei16_v_i8mf2_tumu(__VA_ARGS__)
7220
#define vluxseg5ei16_v_i8mf2_m(...) __riscv_vluxseg5ei16_v_i8mf2_tumu(__VA_ARGS__)
7221
#define vluxseg6ei16_v_i8mf2_m(...) __riscv_vluxseg6ei16_v_i8mf2_tumu(__VA_ARGS__)
7222
#define vluxseg7ei16_v_i8mf2_m(...) __riscv_vluxseg7ei16_v_i8mf2_tumu(__VA_ARGS__)
7223
#define vluxseg8ei16_v_i8mf2_m(...) __riscv_vluxseg8ei16_v_i8mf2_tumu(__VA_ARGS__)
7224
#define vluxseg2ei16_v_i8m1_m(...) __riscv_vluxseg2ei16_v_i8m1_tumu(__VA_ARGS__)
7225
#define vluxseg3ei16_v_i8m1_m(...) __riscv_vluxseg3ei16_v_i8m1_tumu(__VA_ARGS__)
7226
#define vluxseg4ei16_v_i8m1_m(...) __riscv_vluxseg4ei16_v_i8m1_tumu(__VA_ARGS__)
7227
#define vluxseg5ei16_v_i8m1_m(...) __riscv_vluxseg5ei16_v_i8m1_tumu(__VA_ARGS__)
7228
#define vluxseg6ei16_v_i8m1_m(...) __riscv_vluxseg6ei16_v_i8m1_tumu(__VA_ARGS__)
7229
#define vluxseg7ei16_v_i8m1_m(...) __riscv_vluxseg7ei16_v_i8m1_tumu(__VA_ARGS__)
7230
#define vluxseg8ei16_v_i8m1_m(...) __riscv_vluxseg8ei16_v_i8m1_tumu(__VA_ARGS__)
7231
#define vluxseg2ei16_v_i8m2_m(...) __riscv_vluxseg2ei16_v_i8m2_tumu(__VA_ARGS__)
7232
#define vluxseg3ei16_v_i8m2_m(...) __riscv_vluxseg3ei16_v_i8m2_tumu(__VA_ARGS__)
7233
#define vluxseg4ei16_v_i8m2_m(...) __riscv_vluxseg4ei16_v_i8m2_tumu(__VA_ARGS__)
7234
#define vluxseg2ei16_v_i8m4_m(...) __riscv_vluxseg2ei16_v_i8m4_tumu(__VA_ARGS__)
7235
#define vluxseg2ei32_v_i8mf8_m(...) __riscv_vluxseg2ei32_v_i8mf8_tumu(__VA_ARGS__)
7236
#define vluxseg3ei32_v_i8mf8_m(...) __riscv_vluxseg3ei32_v_i8mf8_tumu(__VA_ARGS__)
7237
#define vluxseg4ei32_v_i8mf8_m(...) __riscv_vluxseg4ei32_v_i8mf8_tumu(__VA_ARGS__)
7238
#define vluxseg5ei32_v_i8mf8_m(...) __riscv_vluxseg5ei32_v_i8mf8_tumu(__VA_ARGS__)
7239
#define vluxseg6ei32_v_i8mf8_m(...) __riscv_vluxseg6ei32_v_i8mf8_tumu(__VA_ARGS__)
7240
#define vluxseg7ei32_v_i8mf8_m(...) __riscv_vluxseg7ei32_v_i8mf8_tumu(__VA_ARGS__)
7241
#define vluxseg8ei32_v_i8mf8_m(...) __riscv_vluxseg8ei32_v_i8mf8_tumu(__VA_ARGS__)
7242
#define vluxseg2ei32_v_i8mf4_m(...) __riscv_vluxseg2ei32_v_i8mf4_tumu(__VA_ARGS__)
7243
#define vluxseg3ei32_v_i8mf4_m(...) __riscv_vluxseg3ei32_v_i8mf4_tumu(__VA_ARGS__)
7244
#define vluxseg4ei32_v_i8mf4_m(...) __riscv_vluxseg4ei32_v_i8mf4_tumu(__VA_ARGS__)
7245
#define vluxseg5ei32_v_i8mf4_m(...) __riscv_vluxseg5ei32_v_i8mf4_tumu(__VA_ARGS__)
7246
#define vluxseg6ei32_v_i8mf4_m(...) __riscv_vluxseg6ei32_v_i8mf4_tumu(__VA_ARGS__)
7247
#define vluxseg7ei32_v_i8mf4_m(...) __riscv_vluxseg7ei32_v_i8mf4_tumu(__VA_ARGS__)
7248
#define vluxseg8ei32_v_i8mf4_m(...) __riscv_vluxseg8ei32_v_i8mf4_tumu(__VA_ARGS__)
7249
#define vluxseg2ei32_v_i8mf2_m(...) __riscv_vluxseg2ei32_v_i8mf2_tumu(__VA_ARGS__)
7250
#define vluxseg3ei32_v_i8mf2_m(...) __riscv_vluxseg3ei32_v_i8mf2_tumu(__VA_ARGS__)
7251
#define vluxseg4ei32_v_i8mf2_m(...) __riscv_vluxseg4ei32_v_i8mf2_tumu(__VA_ARGS__)
7252
#define vluxseg5ei32_v_i8mf2_m(...) __riscv_vluxseg5ei32_v_i8mf2_tumu(__VA_ARGS__)
7253
#define vluxseg6ei32_v_i8mf2_m(...) __riscv_vluxseg6ei32_v_i8mf2_tumu(__VA_ARGS__)
7254
#define vluxseg7ei32_v_i8mf2_m(...) __riscv_vluxseg7ei32_v_i8mf2_tumu(__VA_ARGS__)
7255
#define vluxseg8ei32_v_i8mf2_m(...) __riscv_vluxseg8ei32_v_i8mf2_tumu(__VA_ARGS__)
7256
#define vluxseg2ei32_v_i8m1_m(...) __riscv_vluxseg2ei32_v_i8m1_tumu(__VA_ARGS__)
7257
#define vluxseg3ei32_v_i8m1_m(...) __riscv_vluxseg3ei32_v_i8m1_tumu(__VA_ARGS__)
7258
#define vluxseg4ei32_v_i8m1_m(...) __riscv_vluxseg4ei32_v_i8m1_tumu(__VA_ARGS__)
7259
#define vluxseg5ei32_v_i8m1_m(...) __riscv_vluxseg5ei32_v_i8m1_tumu(__VA_ARGS__)
7260
#define vluxseg6ei32_v_i8m1_m(...) __riscv_vluxseg6ei32_v_i8m1_tumu(__VA_ARGS__)
7261
#define vluxseg7ei32_v_i8m1_m(...) __riscv_vluxseg7ei32_v_i8m1_tumu(__VA_ARGS__)
7262
#define vluxseg8ei32_v_i8m1_m(...) __riscv_vluxseg8ei32_v_i8m1_tumu(__VA_ARGS__)
7263
#define vluxseg2ei32_v_i8m2_m(...) __riscv_vluxseg2ei32_v_i8m2_tumu(__VA_ARGS__)
7264
#define vluxseg3ei32_v_i8m2_m(...) __riscv_vluxseg3ei32_v_i8m2_tumu(__VA_ARGS__)
7265
#define vluxseg4ei32_v_i8m2_m(...) __riscv_vluxseg4ei32_v_i8m2_tumu(__VA_ARGS__)
7266
#define vluxseg2ei64_v_i8mf8_m(...) __riscv_vluxseg2ei64_v_i8mf8_tumu(__VA_ARGS__)
7267
#define vluxseg3ei64_v_i8mf8_m(...) __riscv_vluxseg3ei64_v_i8mf8_tumu(__VA_ARGS__)
7268
#define vluxseg4ei64_v_i8mf8_m(...) __riscv_vluxseg4ei64_v_i8mf8_tumu(__VA_ARGS__)
7269
#define vluxseg5ei64_v_i8mf8_m(...) __riscv_vluxseg5ei64_v_i8mf8_tumu(__VA_ARGS__)
7270
#define vluxseg6ei64_v_i8mf8_m(...) __riscv_vluxseg6ei64_v_i8mf8_tumu(__VA_ARGS__)
7271
#define vluxseg7ei64_v_i8mf8_m(...) __riscv_vluxseg7ei64_v_i8mf8_tumu(__VA_ARGS__)
7272
#define vluxseg8ei64_v_i8mf8_m(...) __riscv_vluxseg8ei64_v_i8mf8_tumu(__VA_ARGS__)
7273
#define vluxseg2ei64_v_i8mf4_m(...) __riscv_vluxseg2ei64_v_i8mf4_tumu(__VA_ARGS__)
7274
#define vluxseg3ei64_v_i8mf4_m(...) __riscv_vluxseg3ei64_v_i8mf4_tumu(__VA_ARGS__)
7275
#define vluxseg4ei64_v_i8mf4_m(...) __riscv_vluxseg4ei64_v_i8mf4_tumu(__VA_ARGS__)
7276
#define vluxseg5ei64_v_i8mf4_m(...) __riscv_vluxseg5ei64_v_i8mf4_tumu(__VA_ARGS__)
7277
#define vluxseg6ei64_v_i8mf4_m(...) __riscv_vluxseg6ei64_v_i8mf4_tumu(__VA_ARGS__)
7278
#define vluxseg7ei64_v_i8mf4_m(...) __riscv_vluxseg7ei64_v_i8mf4_tumu(__VA_ARGS__)
7279
#define vluxseg8ei64_v_i8mf4_m(...) __riscv_vluxseg8ei64_v_i8mf4_tumu(__VA_ARGS__)
7280
#define vluxseg2ei64_v_i8mf2_m(...) __riscv_vluxseg2ei64_v_i8mf2_tumu(__VA_ARGS__)
7281
#define vluxseg3ei64_v_i8mf2_m(...) __riscv_vluxseg3ei64_v_i8mf2_tumu(__VA_ARGS__)
7282
#define vluxseg4ei64_v_i8mf2_m(...) __riscv_vluxseg4ei64_v_i8mf2_tumu(__VA_ARGS__)
7283
#define vluxseg5ei64_v_i8mf2_m(...) __riscv_vluxseg5ei64_v_i8mf2_tumu(__VA_ARGS__)
7284
#define vluxseg6ei64_v_i8mf2_m(...) __riscv_vluxseg6ei64_v_i8mf2_tumu(__VA_ARGS__)
7285
#define vluxseg7ei64_v_i8mf2_m(...) __riscv_vluxseg7ei64_v_i8mf2_tumu(__VA_ARGS__)
7286
#define vluxseg8ei64_v_i8mf2_m(...) __riscv_vluxseg8ei64_v_i8mf2_tumu(__VA_ARGS__)
7287
#define vluxseg2ei64_v_i8m1_m(...) __riscv_vluxseg2ei64_v_i8m1_tumu(__VA_ARGS__)
7288
#define vluxseg3ei64_v_i8m1_m(...) __riscv_vluxseg3ei64_v_i8m1_tumu(__VA_ARGS__)
7289
#define vluxseg4ei64_v_i8m1_m(...) __riscv_vluxseg4ei64_v_i8m1_tumu(__VA_ARGS__)
7290
#define vluxseg5ei64_v_i8m1_m(...) __riscv_vluxseg5ei64_v_i8m1_tumu(__VA_ARGS__)
7291
#define vluxseg6ei64_v_i8m1_m(...) __riscv_vluxseg6ei64_v_i8m1_tumu(__VA_ARGS__)
7292
#define vluxseg7ei64_v_i8m1_m(...) __riscv_vluxseg7ei64_v_i8m1_tumu(__VA_ARGS__)
7293
#define vluxseg8ei64_v_i8m1_m(...) __riscv_vluxseg8ei64_v_i8m1_tumu(__VA_ARGS__)
7294
#define vluxseg2ei8_v_i16mf4_m(...) __riscv_vluxseg2ei8_v_i16mf4_tumu(__VA_ARGS__)
7295
#define vluxseg3ei8_v_i16mf4_m(...) __riscv_vluxseg3ei8_v_i16mf4_tumu(__VA_ARGS__)
7296
#define vluxseg4ei8_v_i16mf4_m(...) __riscv_vluxseg4ei8_v_i16mf4_tumu(__VA_ARGS__)
7297
#define vluxseg5ei8_v_i16mf4_m(...) __riscv_vluxseg5ei8_v_i16mf4_tumu(__VA_ARGS__)
7298
#define vluxseg6ei8_v_i16mf4_m(...) __riscv_vluxseg6ei8_v_i16mf4_tumu(__VA_ARGS__)
7299
#define vluxseg7ei8_v_i16mf4_m(...) __riscv_vluxseg7ei8_v_i16mf4_tumu(__VA_ARGS__)
7300
#define vluxseg8ei8_v_i16mf4_m(...) __riscv_vluxseg8ei8_v_i16mf4_tumu(__VA_ARGS__)
7301
#define vluxseg2ei8_v_i16mf2_m(...) __riscv_vluxseg2ei8_v_i16mf2_tumu(__VA_ARGS__)
7302
#define vluxseg3ei8_v_i16mf2_m(...) __riscv_vluxseg3ei8_v_i16mf2_tumu(__VA_ARGS__)
7303
#define vluxseg4ei8_v_i16mf2_m(...) __riscv_vluxseg4ei8_v_i16mf2_tumu(__VA_ARGS__)
7304
#define vluxseg5ei8_v_i16mf2_m(...) __riscv_vluxseg5ei8_v_i16mf2_tumu(__VA_ARGS__)
7305
#define vluxseg6ei8_v_i16mf2_m(...) __riscv_vluxseg6ei8_v_i16mf2_tumu(__VA_ARGS__)
7306
#define vluxseg7ei8_v_i16mf2_m(...) __riscv_vluxseg7ei8_v_i16mf2_tumu(__VA_ARGS__)
7307
#define vluxseg8ei8_v_i16mf2_m(...) __riscv_vluxseg8ei8_v_i16mf2_tumu(__VA_ARGS__)
7308
#define vluxseg2ei8_v_i16m1_m(...) __riscv_vluxseg2ei8_v_i16m1_tumu(__VA_ARGS__)
7309
#define vluxseg3ei8_v_i16m1_m(...) __riscv_vluxseg3ei8_v_i16m1_tumu(__VA_ARGS__)
7310
#define vluxseg4ei8_v_i16m1_m(...) __riscv_vluxseg4ei8_v_i16m1_tumu(__VA_ARGS__)
7311
#define vluxseg5ei8_v_i16m1_m(...) __riscv_vluxseg5ei8_v_i16m1_tumu(__VA_ARGS__)
7312
#define vluxseg6ei8_v_i16m1_m(...) __riscv_vluxseg6ei8_v_i16m1_tumu(__VA_ARGS__)
7313
#define vluxseg7ei8_v_i16m1_m(...) __riscv_vluxseg7ei8_v_i16m1_tumu(__VA_ARGS__)
7314
#define vluxseg8ei8_v_i16m1_m(...) __riscv_vluxseg8ei8_v_i16m1_tumu(__VA_ARGS__)
7315
#define vluxseg2ei8_v_i16m2_m(...) __riscv_vluxseg2ei8_v_i16m2_tumu(__VA_ARGS__)
7316
#define vluxseg3ei8_v_i16m2_m(...) __riscv_vluxseg3ei8_v_i16m2_tumu(__VA_ARGS__)
7317
#define vluxseg4ei8_v_i16m2_m(...) __riscv_vluxseg4ei8_v_i16m2_tumu(__VA_ARGS__)
7318
#define vluxseg2ei8_v_i16m4_m(...) __riscv_vluxseg2ei8_v_i16m4_tumu(__VA_ARGS__)
7319
#define vluxseg2ei16_v_i16mf4_m(...) __riscv_vluxseg2ei16_v_i16mf4_tumu(__VA_ARGS__)
7320
#define vluxseg3ei16_v_i16mf4_m(...) __riscv_vluxseg3ei16_v_i16mf4_tumu(__VA_ARGS__)
7321
#define vluxseg4ei16_v_i16mf4_m(...) __riscv_vluxseg4ei16_v_i16mf4_tumu(__VA_ARGS__)
7322
#define vluxseg5ei16_v_i16mf4_m(...) __riscv_vluxseg5ei16_v_i16mf4_tumu(__VA_ARGS__)
7323
#define vluxseg6ei16_v_i16mf4_m(...) __riscv_vluxseg6ei16_v_i16mf4_tumu(__VA_ARGS__)
7324
#define vluxseg7ei16_v_i16mf4_m(...) __riscv_vluxseg7ei16_v_i16mf4_tumu(__VA_ARGS__)
7325
#define vluxseg8ei16_v_i16mf4_m(...) __riscv_vluxseg8ei16_v_i16mf4_tumu(__VA_ARGS__)
7326
#define vluxseg2ei16_v_i16mf2_m(...) __riscv_vluxseg2ei16_v_i16mf2_tumu(__VA_ARGS__)
7327
#define vluxseg3ei16_v_i16mf2_m(...) __riscv_vluxseg3ei16_v_i16mf2_tumu(__VA_ARGS__)
7328
#define vluxseg4ei16_v_i16mf2_m(...) __riscv_vluxseg4ei16_v_i16mf2_tumu(__VA_ARGS__)
7329
#define vluxseg5ei16_v_i16mf2_m(...) __riscv_vluxseg5ei16_v_i16mf2_tumu(__VA_ARGS__)
7330
#define vluxseg6ei16_v_i16mf2_m(...) __riscv_vluxseg6ei16_v_i16mf2_tumu(__VA_ARGS__)
7331
#define vluxseg7ei16_v_i16mf2_m(...) __riscv_vluxseg7ei16_v_i16mf2_tumu(__VA_ARGS__)
7332
#define vluxseg8ei16_v_i16mf2_m(...) __riscv_vluxseg8ei16_v_i16mf2_tumu(__VA_ARGS__)
7333
#define vluxseg2ei16_v_i16m1_m(...) __riscv_vluxseg2ei16_v_i16m1_tumu(__VA_ARGS__)
7334
#define vluxseg3ei16_v_i16m1_m(...) __riscv_vluxseg3ei16_v_i16m1_tumu(__VA_ARGS__)
7335
#define vluxseg4ei16_v_i16m1_m(...) __riscv_vluxseg4ei16_v_i16m1_tumu(__VA_ARGS__)
7336
#define vluxseg5ei16_v_i16m1_m(...) __riscv_vluxseg5ei16_v_i16m1_tumu(__VA_ARGS__)
7337
#define vluxseg6ei16_v_i16m1_m(...) __riscv_vluxseg6ei16_v_i16m1_tumu(__VA_ARGS__)
7338
#define vluxseg7ei16_v_i16m1_m(...) __riscv_vluxseg7ei16_v_i16m1_tumu(__VA_ARGS__)
7339
#define vluxseg8ei16_v_i16m1_m(...) __riscv_vluxseg8ei16_v_i16m1_tumu(__VA_ARGS__)
7340
#define vluxseg2ei16_v_i16m2_m(...) __riscv_vluxseg2ei16_v_i16m2_tumu(__VA_ARGS__)
7341
#define vluxseg3ei16_v_i16m2_m(...) __riscv_vluxseg3ei16_v_i16m2_tumu(__VA_ARGS__)
7342
#define vluxseg4ei16_v_i16m2_m(...) __riscv_vluxseg4ei16_v_i16m2_tumu(__VA_ARGS__)
7343
#define vluxseg2ei16_v_i16m4_m(...) __riscv_vluxseg2ei16_v_i16m4_tumu(__VA_ARGS__)
7344
#define vluxseg2ei32_v_i16mf4_m(...) __riscv_vluxseg2ei32_v_i16mf4_tumu(__VA_ARGS__)
7345
#define vluxseg3ei32_v_i16mf4_m(...) __riscv_vluxseg3ei32_v_i16mf4_tumu(__VA_ARGS__)
7346
#define vluxseg4ei32_v_i16mf4_m(...) __riscv_vluxseg4ei32_v_i16mf4_tumu(__VA_ARGS__)
7347
#define vluxseg5ei32_v_i16mf4_m(...) __riscv_vluxseg5ei32_v_i16mf4_tumu(__VA_ARGS__)
7348
#define vluxseg6ei32_v_i16mf4_m(...) __riscv_vluxseg6ei32_v_i16mf4_tumu(__VA_ARGS__)
7349
#define vluxseg7ei32_v_i16mf4_m(...) __riscv_vluxseg7ei32_v_i16mf4_tumu(__VA_ARGS__)
7350
#define vluxseg8ei32_v_i16mf4_m(...) __riscv_vluxseg8ei32_v_i16mf4_tumu(__VA_ARGS__)
7351
#define vluxseg2ei32_v_i16mf2_m(...) __riscv_vluxseg2ei32_v_i16mf2_tumu(__VA_ARGS__)
7352
#define vluxseg3ei32_v_i16mf2_m(...) __riscv_vluxseg3ei32_v_i16mf2_tumu(__VA_ARGS__)
7353
#define vluxseg4ei32_v_i16mf2_m(...) __riscv_vluxseg4ei32_v_i16mf2_tumu(__VA_ARGS__)
7354
#define vluxseg5ei32_v_i16mf2_m(...) __riscv_vluxseg5ei32_v_i16mf2_tumu(__VA_ARGS__)
7355
#define vluxseg6ei32_v_i16mf2_m(...) __riscv_vluxseg6ei32_v_i16mf2_tumu(__VA_ARGS__)
7356
#define vluxseg7ei32_v_i16mf2_m(...) __riscv_vluxseg7ei32_v_i16mf2_tumu(__VA_ARGS__)
7357
#define vluxseg8ei32_v_i16mf2_m(...) __riscv_vluxseg8ei32_v_i16mf2_tumu(__VA_ARGS__)
7358
#define vluxseg2ei32_v_i16m1_m(...) __riscv_vluxseg2ei32_v_i16m1_tumu(__VA_ARGS__)
7359
#define vluxseg3ei32_v_i16m1_m(...) __riscv_vluxseg3ei32_v_i16m1_tumu(__VA_ARGS__)
7360
#define vluxseg4ei32_v_i16m1_m(...) __riscv_vluxseg4ei32_v_i16m1_tumu(__VA_ARGS__)
7361
#define vluxseg5ei32_v_i16m1_m(...) __riscv_vluxseg5ei32_v_i16m1_tumu(__VA_ARGS__)
7362
#define vluxseg6ei32_v_i16m1_m(...) __riscv_vluxseg6ei32_v_i16m1_tumu(__VA_ARGS__)
7363
#define vluxseg7ei32_v_i16m1_m(...) __riscv_vluxseg7ei32_v_i16m1_tumu(__VA_ARGS__)
7364
#define vluxseg8ei32_v_i16m1_m(...) __riscv_vluxseg8ei32_v_i16m1_tumu(__VA_ARGS__)
7365
#define vluxseg2ei32_v_i16m2_m(...) __riscv_vluxseg2ei32_v_i16m2_tumu(__VA_ARGS__)
7366
#define vluxseg3ei32_v_i16m2_m(...) __riscv_vluxseg3ei32_v_i16m2_tumu(__VA_ARGS__)
7367
#define vluxseg4ei32_v_i16m2_m(...) __riscv_vluxseg4ei32_v_i16m2_tumu(__VA_ARGS__)
7368
#define vluxseg2ei32_v_i16m4_m(...) __riscv_vluxseg2ei32_v_i16m4_tumu(__VA_ARGS__)
7369
#define vluxseg2ei64_v_i16mf4_m(...) __riscv_vluxseg2ei64_v_i16mf4_tumu(__VA_ARGS__)
7370
#define vluxseg3ei64_v_i16mf4_m(...) __riscv_vluxseg3ei64_v_i16mf4_tumu(__VA_ARGS__)
7371
#define vluxseg4ei64_v_i16mf4_m(...) __riscv_vluxseg4ei64_v_i16mf4_tumu(__VA_ARGS__)
7372
#define vluxseg5ei64_v_i16mf4_m(...) __riscv_vluxseg5ei64_v_i16mf4_tumu(__VA_ARGS__)
7373
#define vluxseg6ei64_v_i16mf4_m(...) __riscv_vluxseg6ei64_v_i16mf4_tumu(__VA_ARGS__)
7374
#define vluxseg7ei64_v_i16mf4_m(...) __riscv_vluxseg7ei64_v_i16mf4_tumu(__VA_ARGS__)
7375
#define vluxseg8ei64_v_i16mf4_m(...) __riscv_vluxseg8ei64_v_i16mf4_tumu(__VA_ARGS__)
7376
#define vluxseg2ei64_v_i16mf2_m(...) __riscv_vluxseg2ei64_v_i16mf2_tumu(__VA_ARGS__)
7377
#define vluxseg3ei64_v_i16mf2_m(...) __riscv_vluxseg3ei64_v_i16mf2_tumu(__VA_ARGS__)
7378
#define vluxseg4ei64_v_i16mf2_m(...) __riscv_vluxseg4ei64_v_i16mf2_tumu(__VA_ARGS__)
7379
#define vluxseg5ei64_v_i16mf2_m(...) __riscv_vluxseg5ei64_v_i16mf2_tumu(__VA_ARGS__)
7380
#define vluxseg6ei64_v_i16mf2_m(...) __riscv_vluxseg6ei64_v_i16mf2_tumu(__VA_ARGS__)
7381
#define vluxseg7ei64_v_i16mf2_m(...) __riscv_vluxseg7ei64_v_i16mf2_tumu(__VA_ARGS__)
7382
#define vluxseg8ei64_v_i16mf2_m(...) __riscv_vluxseg8ei64_v_i16mf2_tumu(__VA_ARGS__)
7383
#define vluxseg2ei64_v_i16m1_m(...) __riscv_vluxseg2ei64_v_i16m1_tumu(__VA_ARGS__)
7384
#define vluxseg3ei64_v_i16m1_m(...) __riscv_vluxseg3ei64_v_i16m1_tumu(__VA_ARGS__)
7385
#define vluxseg4ei64_v_i16m1_m(...) __riscv_vluxseg4ei64_v_i16m1_tumu(__VA_ARGS__)
7386
#define vluxseg5ei64_v_i16m1_m(...) __riscv_vluxseg5ei64_v_i16m1_tumu(__VA_ARGS__)
7387
#define vluxseg6ei64_v_i16m1_m(...) __riscv_vluxseg6ei64_v_i16m1_tumu(__VA_ARGS__)
7388
#define vluxseg7ei64_v_i16m1_m(...) __riscv_vluxseg7ei64_v_i16m1_tumu(__VA_ARGS__)
7389
#define vluxseg8ei64_v_i16m1_m(...) __riscv_vluxseg8ei64_v_i16m1_tumu(__VA_ARGS__)
7390
#define vluxseg2ei64_v_i16m2_m(...) __riscv_vluxseg2ei64_v_i16m2_tumu(__VA_ARGS__)
7391
#define vluxseg3ei64_v_i16m2_m(...) __riscv_vluxseg3ei64_v_i16m2_tumu(__VA_ARGS__)
7392
#define vluxseg4ei64_v_i16m2_m(...) __riscv_vluxseg4ei64_v_i16m2_tumu(__VA_ARGS__)
7393
#define vluxseg2ei8_v_i32mf2_m(...) __riscv_vluxseg2ei8_v_i32mf2_tumu(__VA_ARGS__)
7394
#define vluxseg3ei8_v_i32mf2_m(...) __riscv_vluxseg3ei8_v_i32mf2_tumu(__VA_ARGS__)
7395
#define vluxseg4ei8_v_i32mf2_m(...) __riscv_vluxseg4ei8_v_i32mf2_tumu(__VA_ARGS__)
7396
#define vluxseg5ei8_v_i32mf2_m(...) __riscv_vluxseg5ei8_v_i32mf2_tumu(__VA_ARGS__)
7397
#define vluxseg6ei8_v_i32mf2_m(...) __riscv_vluxseg6ei8_v_i32mf2_tumu(__VA_ARGS__)
7398
#define vluxseg7ei8_v_i32mf2_m(...) __riscv_vluxseg7ei8_v_i32mf2_tumu(__VA_ARGS__)
7399
#define vluxseg8ei8_v_i32mf2_m(...) __riscv_vluxseg8ei8_v_i32mf2_tumu(__VA_ARGS__)
7400
#define vluxseg2ei8_v_i32m1_m(...) __riscv_vluxseg2ei8_v_i32m1_tumu(__VA_ARGS__)
7401
#define vluxseg3ei8_v_i32m1_m(...) __riscv_vluxseg3ei8_v_i32m1_tumu(__VA_ARGS__)
7402
#define vluxseg4ei8_v_i32m1_m(...) __riscv_vluxseg4ei8_v_i32m1_tumu(__VA_ARGS__)
7403
#define vluxseg5ei8_v_i32m1_m(...) __riscv_vluxseg5ei8_v_i32m1_tumu(__VA_ARGS__)
7404
#define vluxseg6ei8_v_i32m1_m(...) __riscv_vluxseg6ei8_v_i32m1_tumu(__VA_ARGS__)
7405
#define vluxseg7ei8_v_i32m1_m(...) __riscv_vluxseg7ei8_v_i32m1_tumu(__VA_ARGS__)
7406
#define vluxseg8ei8_v_i32m1_m(...) __riscv_vluxseg8ei8_v_i32m1_tumu(__VA_ARGS__)
7407
#define vluxseg2ei8_v_i32m2_m(...) __riscv_vluxseg2ei8_v_i32m2_tumu(__VA_ARGS__)
7408
#define vluxseg3ei8_v_i32m2_m(...) __riscv_vluxseg3ei8_v_i32m2_tumu(__VA_ARGS__)
7409
#define vluxseg4ei8_v_i32m2_m(...) __riscv_vluxseg4ei8_v_i32m2_tumu(__VA_ARGS__)
7410
#define vluxseg2ei8_v_i32m4_m(...) __riscv_vluxseg2ei8_v_i32m4_tumu(__VA_ARGS__)
7411
#define vluxseg2ei16_v_i32mf2_m(...) __riscv_vluxseg2ei16_v_i32mf2_tumu(__VA_ARGS__)
7412
#define vluxseg3ei16_v_i32mf2_m(...) __riscv_vluxseg3ei16_v_i32mf2_tumu(__VA_ARGS__)
7413
#define vluxseg4ei16_v_i32mf2_m(...) __riscv_vluxseg4ei16_v_i32mf2_tumu(__VA_ARGS__)
7414
#define vluxseg5ei16_v_i32mf2_m(...) __riscv_vluxseg5ei16_v_i32mf2_tumu(__VA_ARGS__)
7415
#define vluxseg6ei16_v_i32mf2_m(...) __riscv_vluxseg6ei16_v_i32mf2_tumu(__VA_ARGS__)
7416
#define vluxseg7ei16_v_i32mf2_m(...) __riscv_vluxseg7ei16_v_i32mf2_tumu(__VA_ARGS__)
7417
#define vluxseg8ei16_v_i32mf2_m(...) __riscv_vluxseg8ei16_v_i32mf2_tumu(__VA_ARGS__)
7418
#define vluxseg2ei16_v_i32m1_m(...) __riscv_vluxseg2ei16_v_i32m1_tumu(__VA_ARGS__)
7419
#define vluxseg3ei16_v_i32m1_m(...) __riscv_vluxseg3ei16_v_i32m1_tumu(__VA_ARGS__)
7420
#define vluxseg4ei16_v_i32m1_m(...) __riscv_vluxseg4ei16_v_i32m1_tumu(__VA_ARGS__)
7421
#define vluxseg5ei16_v_i32m1_m(...) __riscv_vluxseg5ei16_v_i32m1_tumu(__VA_ARGS__)
7422
#define vluxseg6ei16_v_i32m1_m(...) __riscv_vluxseg6ei16_v_i32m1_tumu(__VA_ARGS__)
7423
#define vluxseg7ei16_v_i32m1_m(...) __riscv_vluxseg7ei16_v_i32m1_tumu(__VA_ARGS__)
7424
#define vluxseg8ei16_v_i32m1_m(...) __riscv_vluxseg8ei16_v_i32m1_tumu(__VA_ARGS__)
7425
#define vluxseg2ei16_v_i32m2_m(...) __riscv_vluxseg2ei16_v_i32m2_tumu(__VA_ARGS__)
7426
#define vluxseg3ei16_v_i32m2_m(...) __riscv_vluxseg3ei16_v_i32m2_tumu(__VA_ARGS__)
7427
#define vluxseg4ei16_v_i32m2_m(...) __riscv_vluxseg4ei16_v_i32m2_tumu(__VA_ARGS__)
7428
#define vluxseg2ei16_v_i32m4_m(...) __riscv_vluxseg2ei16_v_i32m4_tumu(__VA_ARGS__)
7429
#define vluxseg2ei32_v_i32mf2_m(...) __riscv_vluxseg2ei32_v_i32mf2_tumu(__VA_ARGS__)
7430
#define vluxseg3ei32_v_i32mf2_m(...) __riscv_vluxseg3ei32_v_i32mf2_tumu(__VA_ARGS__)
7431
#define vluxseg4ei32_v_i32mf2_m(...) __riscv_vluxseg4ei32_v_i32mf2_tumu(__VA_ARGS__)
7432
#define vluxseg5ei32_v_i32mf2_m(...) __riscv_vluxseg5ei32_v_i32mf2_tumu(__VA_ARGS__)
7433
#define vluxseg6ei32_v_i32mf2_m(...) __riscv_vluxseg6ei32_v_i32mf2_tumu(__VA_ARGS__)
7434
#define vluxseg7ei32_v_i32mf2_m(...) __riscv_vluxseg7ei32_v_i32mf2_tumu(__VA_ARGS__)
7435
#define vluxseg8ei32_v_i32mf2_m(...) __riscv_vluxseg8ei32_v_i32mf2_tumu(__VA_ARGS__)
7436
#define vluxseg2ei32_v_i32m1_m(...) __riscv_vluxseg2ei32_v_i32m1_tumu(__VA_ARGS__)
7437
#define vluxseg3ei32_v_i32m1_m(...) __riscv_vluxseg3ei32_v_i32m1_tumu(__VA_ARGS__)
7438
#define vluxseg4ei32_v_i32m1_m(...) __riscv_vluxseg4ei32_v_i32m1_tumu(__VA_ARGS__)
7439
#define vluxseg5ei32_v_i32m1_m(...) __riscv_vluxseg5ei32_v_i32m1_tumu(__VA_ARGS__)
7440
#define vluxseg6ei32_v_i32m1_m(...) __riscv_vluxseg6ei32_v_i32m1_tumu(__VA_ARGS__)
7441
#define vluxseg7ei32_v_i32m1_m(...) __riscv_vluxseg7ei32_v_i32m1_tumu(__VA_ARGS__)
7442
#define vluxseg8ei32_v_i32m1_m(...) __riscv_vluxseg8ei32_v_i32m1_tumu(__VA_ARGS__)
7443
#define vluxseg2ei32_v_i32m2_m(...) __riscv_vluxseg2ei32_v_i32m2_tumu(__VA_ARGS__)
7444
#define vluxseg3ei32_v_i32m2_m(...) __riscv_vluxseg3ei32_v_i32m2_tumu(__VA_ARGS__)
7445
#define vluxseg4ei32_v_i32m2_m(...) __riscv_vluxseg4ei32_v_i32m2_tumu(__VA_ARGS__)
7446
#define vluxseg2ei32_v_i32m4_m(...) __riscv_vluxseg2ei32_v_i32m4_tumu(__VA_ARGS__)
7447
#define vluxseg2ei64_v_i32mf2_m(...) __riscv_vluxseg2ei64_v_i32mf2_tumu(__VA_ARGS__)
7448
#define vluxseg3ei64_v_i32mf2_m(...) __riscv_vluxseg3ei64_v_i32mf2_tumu(__VA_ARGS__)
7449
#define vluxseg4ei64_v_i32mf2_m(...) __riscv_vluxseg4ei64_v_i32mf2_tumu(__VA_ARGS__)
7450
#define vluxseg5ei64_v_i32mf2_m(...) __riscv_vluxseg5ei64_v_i32mf2_tumu(__VA_ARGS__)
7451
#define vluxseg6ei64_v_i32mf2_m(...) __riscv_vluxseg6ei64_v_i32mf2_tumu(__VA_ARGS__)
7452
#define vluxseg7ei64_v_i32mf2_m(...) __riscv_vluxseg7ei64_v_i32mf2_tumu(__VA_ARGS__)
7453
#define vluxseg8ei64_v_i32mf2_m(...) __riscv_vluxseg8ei64_v_i32mf2_tumu(__VA_ARGS__)
7454
#define vluxseg2ei64_v_i32m1_m(...) __riscv_vluxseg2ei64_v_i32m1_tumu(__VA_ARGS__)
7455
#define vluxseg3ei64_v_i32m1_m(...) __riscv_vluxseg3ei64_v_i32m1_tumu(__VA_ARGS__)
7456
#define vluxseg4ei64_v_i32m1_m(...) __riscv_vluxseg4ei64_v_i32m1_tumu(__VA_ARGS__)
7457
#define vluxseg5ei64_v_i32m1_m(...) __riscv_vluxseg5ei64_v_i32m1_tumu(__VA_ARGS__)
7458
#define vluxseg6ei64_v_i32m1_m(...) __riscv_vluxseg6ei64_v_i32m1_tumu(__VA_ARGS__)
7459
#define vluxseg7ei64_v_i32m1_m(...) __riscv_vluxseg7ei64_v_i32m1_tumu(__VA_ARGS__)
7460
#define vluxseg8ei64_v_i32m1_m(...) __riscv_vluxseg8ei64_v_i32m1_tumu(__VA_ARGS__)
7461
#define vluxseg2ei64_v_i32m2_m(...) __riscv_vluxseg2ei64_v_i32m2_tumu(__VA_ARGS__)
7462
#define vluxseg3ei64_v_i32m2_m(...) __riscv_vluxseg3ei64_v_i32m2_tumu(__VA_ARGS__)
7463
#define vluxseg4ei64_v_i32m2_m(...) __riscv_vluxseg4ei64_v_i32m2_tumu(__VA_ARGS__)
7464
#define vluxseg2ei64_v_i32m4_m(...) __riscv_vluxseg2ei64_v_i32m4_tumu(__VA_ARGS__)
7465
#define vluxseg2ei8_v_i64m1_m(...) __riscv_vluxseg2ei8_v_i64m1_tumu(__VA_ARGS__)
7466
#define vluxseg3ei8_v_i64m1_m(...) __riscv_vluxseg3ei8_v_i64m1_tumu(__VA_ARGS__)
7467
#define vluxseg4ei8_v_i64m1_m(...) __riscv_vluxseg4ei8_v_i64m1_tumu(__VA_ARGS__)
7468
#define vluxseg5ei8_v_i64m1_m(...) __riscv_vluxseg5ei8_v_i64m1_tumu(__VA_ARGS__)
7469
#define vluxseg6ei8_v_i64m1_m(...) __riscv_vluxseg6ei8_v_i64m1_tumu(__VA_ARGS__)
7470
#define vluxseg7ei8_v_i64m1_m(...) __riscv_vluxseg7ei8_v_i64m1_tumu(__VA_ARGS__)
7471
#define vluxseg8ei8_v_i64m1_m(...) __riscv_vluxseg8ei8_v_i64m1_tumu(__VA_ARGS__)
7472
#define vluxseg2ei8_v_i64m2_m(...) __riscv_vluxseg2ei8_v_i64m2_tumu(__VA_ARGS__)
7473
#define vluxseg3ei8_v_i64m2_m(...) __riscv_vluxseg3ei8_v_i64m2_tumu(__VA_ARGS__)
7474
#define vluxseg4ei8_v_i64m2_m(...) __riscv_vluxseg4ei8_v_i64m2_tumu(__VA_ARGS__)
7475
#define vluxseg2ei8_v_i64m4_m(...) __riscv_vluxseg2ei8_v_i64m4_tumu(__VA_ARGS__)
7476
#define vluxseg2ei16_v_i64m1_m(...) __riscv_vluxseg2ei16_v_i64m1_tumu(__VA_ARGS__)
7477
#define vluxseg3ei16_v_i64m1_m(...) __riscv_vluxseg3ei16_v_i64m1_tumu(__VA_ARGS__)
7478
#define vluxseg4ei16_v_i64m1_m(...) __riscv_vluxseg4ei16_v_i64m1_tumu(__VA_ARGS__)
7479
#define vluxseg5ei16_v_i64m1_m(...) __riscv_vluxseg5ei16_v_i64m1_tumu(__VA_ARGS__)
7480
#define vluxseg6ei16_v_i64m1_m(...) __riscv_vluxseg6ei16_v_i64m1_tumu(__VA_ARGS__)
7481
#define vluxseg7ei16_v_i64m1_m(...) __riscv_vluxseg7ei16_v_i64m1_tumu(__VA_ARGS__)
7482
#define vluxseg8ei16_v_i64m1_m(...) __riscv_vluxseg8ei16_v_i64m1_tumu(__VA_ARGS__)
7483
#define vluxseg2ei16_v_i64m2_m(...) __riscv_vluxseg2ei16_v_i64m2_tumu(__VA_ARGS__)
7484
#define vluxseg3ei16_v_i64m2_m(...) __riscv_vluxseg3ei16_v_i64m2_tumu(__VA_ARGS__)
7485
#define vluxseg4ei16_v_i64m2_m(...) __riscv_vluxseg4ei16_v_i64m2_tumu(__VA_ARGS__)
7486
#define vluxseg2ei16_v_i64m4_m(...) __riscv_vluxseg2ei16_v_i64m4_tumu(__VA_ARGS__)
7487
#define vluxseg2ei32_v_i64m1_m(...) __riscv_vluxseg2ei32_v_i64m1_tumu(__VA_ARGS__)
7488
#define vluxseg3ei32_v_i64m1_m(...) __riscv_vluxseg3ei32_v_i64m1_tumu(__VA_ARGS__)
7489
#define vluxseg4ei32_v_i64m1_m(...) __riscv_vluxseg4ei32_v_i64m1_tumu(__VA_ARGS__)
7490
#define vluxseg5ei32_v_i64m1_m(...) __riscv_vluxseg5ei32_v_i64m1_tumu(__VA_ARGS__)
7491
#define vluxseg6ei32_v_i64m1_m(...) __riscv_vluxseg6ei32_v_i64m1_tumu(__VA_ARGS__)
7492
#define vluxseg7ei32_v_i64m1_m(...) __riscv_vluxseg7ei32_v_i64m1_tumu(__VA_ARGS__)
7493
#define vluxseg8ei32_v_i64m1_m(...) __riscv_vluxseg8ei32_v_i64m1_tumu(__VA_ARGS__)
7494
#define vluxseg2ei32_v_i64m2_m(...) __riscv_vluxseg2ei32_v_i64m2_tumu(__VA_ARGS__)
7495
#define vluxseg3ei32_v_i64m2_m(...) __riscv_vluxseg3ei32_v_i64m2_tumu(__VA_ARGS__)
7496
#define vluxseg4ei32_v_i64m2_m(...) __riscv_vluxseg4ei32_v_i64m2_tumu(__VA_ARGS__)
7497
#define vluxseg2ei32_v_i64m4_m(...) __riscv_vluxseg2ei32_v_i64m4_tumu(__VA_ARGS__)
7498
#define vluxseg2ei64_v_i64m1_m(...) __riscv_vluxseg2ei64_v_i64m1_tumu(__VA_ARGS__)
7499
#define vluxseg3ei64_v_i64m1_m(...) __riscv_vluxseg3ei64_v_i64m1_tumu(__VA_ARGS__)
7500
#define vluxseg4ei64_v_i64m1_m(...) __riscv_vluxseg4ei64_v_i64m1_tumu(__VA_ARGS__)
7501
#define vluxseg5ei64_v_i64m1_m(...) __riscv_vluxseg5ei64_v_i64m1_tumu(__VA_ARGS__)
7502
#define vluxseg6ei64_v_i64m1_m(...) __riscv_vluxseg6ei64_v_i64m1_tumu(__VA_ARGS__)
7503
#define vluxseg7ei64_v_i64m1_m(...) __riscv_vluxseg7ei64_v_i64m1_tumu(__VA_ARGS__)
7504
#define vluxseg8ei64_v_i64m1_m(...) __riscv_vluxseg8ei64_v_i64m1_tumu(__VA_ARGS__)
7505
#define vluxseg2ei64_v_i64m2_m(...) __riscv_vluxseg2ei64_v_i64m2_tumu(__VA_ARGS__)
7506
#define vluxseg3ei64_v_i64m2_m(...) __riscv_vluxseg3ei64_v_i64m2_tumu(__VA_ARGS__)
7507
#define vluxseg4ei64_v_i64m2_m(...) __riscv_vluxseg4ei64_v_i64m2_tumu(__VA_ARGS__)
7508
#define vluxseg2ei64_v_i64m4_m(...) __riscv_vluxseg2ei64_v_i64m4_tumu(__VA_ARGS__)
7509
#define vloxseg2ei8_v_u8mf8_m(...) __riscv_vloxseg2ei8_v_u8mf8_tumu(__VA_ARGS__)
7510
#define vloxseg3ei8_v_u8mf8_m(...) __riscv_vloxseg3ei8_v_u8mf8_tumu(__VA_ARGS__)
7511
#define vloxseg4ei8_v_u8mf8_m(...) __riscv_vloxseg4ei8_v_u8mf8_tumu(__VA_ARGS__)
7512
#define vloxseg5ei8_v_u8mf8_m(...) __riscv_vloxseg5ei8_v_u8mf8_tumu(__VA_ARGS__)
7513
#define vloxseg6ei8_v_u8mf8_m(...) __riscv_vloxseg6ei8_v_u8mf8_tumu(__VA_ARGS__)
7514
#define vloxseg7ei8_v_u8mf8_m(...) __riscv_vloxseg7ei8_v_u8mf8_tumu(__VA_ARGS__)
7515
#define vloxseg8ei8_v_u8mf8_m(...) __riscv_vloxseg8ei8_v_u8mf8_tumu(__VA_ARGS__)
7516
#define vloxseg2ei8_v_u8mf4_m(...) __riscv_vloxseg2ei8_v_u8mf4_tumu(__VA_ARGS__)
7517
#define vloxseg3ei8_v_u8mf4_m(...) __riscv_vloxseg3ei8_v_u8mf4_tumu(__VA_ARGS__)
7518
#define vloxseg4ei8_v_u8mf4_m(...) __riscv_vloxseg4ei8_v_u8mf4_tumu(__VA_ARGS__)
7519
#define vloxseg5ei8_v_u8mf4_m(...) __riscv_vloxseg5ei8_v_u8mf4_tumu(__VA_ARGS__)
7520
#define vloxseg6ei8_v_u8mf4_m(...) __riscv_vloxseg6ei8_v_u8mf4_tumu(__VA_ARGS__)
7521
#define vloxseg7ei8_v_u8mf4_m(...) __riscv_vloxseg7ei8_v_u8mf4_tumu(__VA_ARGS__)
7522
#define vloxseg8ei8_v_u8mf4_m(...) __riscv_vloxseg8ei8_v_u8mf4_tumu(__VA_ARGS__)
7523
#define vloxseg2ei8_v_u8mf2_m(...) __riscv_vloxseg2ei8_v_u8mf2_tumu(__VA_ARGS__)
7524
#define vloxseg3ei8_v_u8mf2_m(...) __riscv_vloxseg3ei8_v_u8mf2_tumu(__VA_ARGS__)
7525
#define vloxseg4ei8_v_u8mf2_m(...) __riscv_vloxseg4ei8_v_u8mf2_tumu(__VA_ARGS__)
7526
#define vloxseg5ei8_v_u8mf2_m(...) __riscv_vloxseg5ei8_v_u8mf2_tumu(__VA_ARGS__)
7527
#define vloxseg6ei8_v_u8mf2_m(...) __riscv_vloxseg6ei8_v_u8mf2_tumu(__VA_ARGS__)
7528
#define vloxseg7ei8_v_u8mf2_m(...) __riscv_vloxseg7ei8_v_u8mf2_tumu(__VA_ARGS__)
7529
#define vloxseg8ei8_v_u8mf2_m(...) __riscv_vloxseg8ei8_v_u8mf2_tumu(__VA_ARGS__)
7530
#define vloxseg2ei8_v_u8m1_m(...) __riscv_vloxseg2ei8_v_u8m1_tumu(__VA_ARGS__)
7531
#define vloxseg3ei8_v_u8m1_m(...) __riscv_vloxseg3ei8_v_u8m1_tumu(__VA_ARGS__)
7532
#define vloxseg4ei8_v_u8m1_m(...) __riscv_vloxseg4ei8_v_u8m1_tumu(__VA_ARGS__)
7533
#define vloxseg5ei8_v_u8m1_m(...) __riscv_vloxseg5ei8_v_u8m1_tumu(__VA_ARGS__)
7534
#define vloxseg6ei8_v_u8m1_m(...) __riscv_vloxseg6ei8_v_u8m1_tumu(__VA_ARGS__)
7535
#define vloxseg7ei8_v_u8m1_m(...) __riscv_vloxseg7ei8_v_u8m1_tumu(__VA_ARGS__)
7536
#define vloxseg8ei8_v_u8m1_m(...) __riscv_vloxseg8ei8_v_u8m1_tumu(__VA_ARGS__)
7537
#define vloxseg2ei8_v_u8m2_m(...) __riscv_vloxseg2ei8_v_u8m2_tumu(__VA_ARGS__)
7538
#define vloxseg3ei8_v_u8m2_m(...) __riscv_vloxseg3ei8_v_u8m2_tumu(__VA_ARGS__)
7539
#define vloxseg4ei8_v_u8m2_m(...) __riscv_vloxseg4ei8_v_u8m2_tumu(__VA_ARGS__)
7540
#define vloxseg2ei8_v_u8m4_m(...) __riscv_vloxseg2ei8_v_u8m4_tumu(__VA_ARGS__)
7541
#define vloxseg2ei16_v_u8mf8_m(...) __riscv_vloxseg2ei16_v_u8mf8_tumu(__VA_ARGS__)
7542
#define vloxseg3ei16_v_u8mf8_m(...) __riscv_vloxseg3ei16_v_u8mf8_tumu(__VA_ARGS__)
7543
#define vloxseg4ei16_v_u8mf8_m(...) __riscv_vloxseg4ei16_v_u8mf8_tumu(__VA_ARGS__)
7544
#define vloxseg5ei16_v_u8mf8_m(...) __riscv_vloxseg5ei16_v_u8mf8_tumu(__VA_ARGS__)
7545
#define vloxseg6ei16_v_u8mf8_m(...) __riscv_vloxseg6ei16_v_u8mf8_tumu(__VA_ARGS__)
7546
#define vloxseg7ei16_v_u8mf8_m(...) __riscv_vloxseg7ei16_v_u8mf8_tumu(__VA_ARGS__)
7547
#define vloxseg8ei16_v_u8mf8_m(...) __riscv_vloxseg8ei16_v_u8mf8_tumu(__VA_ARGS__)
7548
#define vloxseg2ei16_v_u8mf4_m(...) __riscv_vloxseg2ei16_v_u8mf4_tumu(__VA_ARGS__)
7549
#define vloxseg3ei16_v_u8mf4_m(...) __riscv_vloxseg3ei16_v_u8mf4_tumu(__VA_ARGS__)
7550
#define vloxseg4ei16_v_u8mf4_m(...) __riscv_vloxseg4ei16_v_u8mf4_tumu(__VA_ARGS__)
7551
#define vloxseg5ei16_v_u8mf4_m(...) __riscv_vloxseg5ei16_v_u8mf4_tumu(__VA_ARGS__)
7552
#define vloxseg6ei16_v_u8mf4_m(...) __riscv_vloxseg6ei16_v_u8mf4_tumu(__VA_ARGS__)
7553
#define vloxseg7ei16_v_u8mf4_m(...) __riscv_vloxseg7ei16_v_u8mf4_tumu(__VA_ARGS__)
7554
#define vloxseg8ei16_v_u8mf4_m(...) __riscv_vloxseg8ei16_v_u8mf4_tumu(__VA_ARGS__)
7555
#define vloxseg2ei16_v_u8mf2_m(...) __riscv_vloxseg2ei16_v_u8mf2_tumu(__VA_ARGS__)
7556
#define vloxseg3ei16_v_u8mf2_m(...) __riscv_vloxseg3ei16_v_u8mf2_tumu(__VA_ARGS__)
7557
#define vloxseg4ei16_v_u8mf2_m(...) __riscv_vloxseg4ei16_v_u8mf2_tumu(__VA_ARGS__)
7558
#define vloxseg5ei16_v_u8mf2_m(...) __riscv_vloxseg5ei16_v_u8mf2_tumu(__VA_ARGS__)
7559
#define vloxseg6ei16_v_u8mf2_m(...) __riscv_vloxseg6ei16_v_u8mf2_tumu(__VA_ARGS__)
7560
#define vloxseg7ei16_v_u8mf2_m(...) __riscv_vloxseg7ei16_v_u8mf2_tumu(__VA_ARGS__)
7561
#define vloxseg8ei16_v_u8mf2_m(...) __riscv_vloxseg8ei16_v_u8mf2_tumu(__VA_ARGS__)
7562
#define vloxseg2ei16_v_u8m1_m(...) __riscv_vloxseg2ei16_v_u8m1_tumu(__VA_ARGS__)
7563
#define vloxseg3ei16_v_u8m1_m(...) __riscv_vloxseg3ei16_v_u8m1_tumu(__VA_ARGS__)
7564
#define vloxseg4ei16_v_u8m1_m(...) __riscv_vloxseg4ei16_v_u8m1_tumu(__VA_ARGS__)
7565
#define vloxseg5ei16_v_u8m1_m(...) __riscv_vloxseg5ei16_v_u8m1_tumu(__VA_ARGS__)
7566
#define vloxseg6ei16_v_u8m1_m(...) __riscv_vloxseg6ei16_v_u8m1_tumu(__VA_ARGS__)
7567
#define vloxseg7ei16_v_u8m1_m(...) __riscv_vloxseg7ei16_v_u8m1_tumu(__VA_ARGS__)
7568
#define vloxseg8ei16_v_u8m1_m(...) __riscv_vloxseg8ei16_v_u8m1_tumu(__VA_ARGS__)
7569
#define vloxseg2ei16_v_u8m2_m(...) __riscv_vloxseg2ei16_v_u8m2_tumu(__VA_ARGS__)
7570
#define vloxseg3ei16_v_u8m2_m(...) __riscv_vloxseg3ei16_v_u8m2_tumu(__VA_ARGS__)
7571
#define vloxseg4ei16_v_u8m2_m(...) __riscv_vloxseg4ei16_v_u8m2_tumu(__VA_ARGS__)
7572
#define vloxseg2ei16_v_u8m4_m(...) __riscv_vloxseg2ei16_v_u8m4_tumu(__VA_ARGS__)
7573
#define vloxseg2ei32_v_u8mf8_m(...) __riscv_vloxseg2ei32_v_u8mf8_tumu(__VA_ARGS__)
7574
#define vloxseg3ei32_v_u8mf8_m(...) __riscv_vloxseg3ei32_v_u8mf8_tumu(__VA_ARGS__)
7575
#define vloxseg4ei32_v_u8mf8_m(...) __riscv_vloxseg4ei32_v_u8mf8_tumu(__VA_ARGS__)
7576
#define vloxseg5ei32_v_u8mf8_m(...) __riscv_vloxseg5ei32_v_u8mf8_tumu(__VA_ARGS__)
7577
#define vloxseg6ei32_v_u8mf8_m(...) __riscv_vloxseg6ei32_v_u8mf8_tumu(__VA_ARGS__)
7578
#define vloxseg7ei32_v_u8mf8_m(...) __riscv_vloxseg7ei32_v_u8mf8_tumu(__VA_ARGS__)
7579
#define vloxseg8ei32_v_u8mf8_m(...) __riscv_vloxseg8ei32_v_u8mf8_tumu(__VA_ARGS__)
7580
#define vloxseg2ei32_v_u8mf4_m(...) __riscv_vloxseg2ei32_v_u8mf4_tumu(__VA_ARGS__)
7581
#define vloxseg3ei32_v_u8mf4_m(...) __riscv_vloxseg3ei32_v_u8mf4_tumu(__VA_ARGS__)
7582
#define vloxseg4ei32_v_u8mf4_m(...) __riscv_vloxseg4ei32_v_u8mf4_tumu(__VA_ARGS__)
7583
#define vloxseg5ei32_v_u8mf4_m(...) __riscv_vloxseg5ei32_v_u8mf4_tumu(__VA_ARGS__)
7584
#define vloxseg6ei32_v_u8mf4_m(...) __riscv_vloxseg6ei32_v_u8mf4_tumu(__VA_ARGS__)
7585
#define vloxseg7ei32_v_u8mf4_m(...) __riscv_vloxseg7ei32_v_u8mf4_tumu(__VA_ARGS__)
7586
#define vloxseg8ei32_v_u8mf4_m(...) __riscv_vloxseg8ei32_v_u8mf4_tumu(__VA_ARGS__)
7587
#define vloxseg2ei32_v_u8mf2_m(...) __riscv_vloxseg2ei32_v_u8mf2_tumu(__VA_ARGS__)
7588
#define vloxseg3ei32_v_u8mf2_m(...) __riscv_vloxseg3ei32_v_u8mf2_tumu(__VA_ARGS__)
7589
#define vloxseg4ei32_v_u8mf2_m(...) __riscv_vloxseg4ei32_v_u8mf2_tumu(__VA_ARGS__)
7590
#define vloxseg5ei32_v_u8mf2_m(...) __riscv_vloxseg5ei32_v_u8mf2_tumu(__VA_ARGS__)
7591
#define vloxseg6ei32_v_u8mf2_m(...) __riscv_vloxseg6ei32_v_u8mf2_tumu(__VA_ARGS__)
7592
#define vloxseg7ei32_v_u8mf2_m(...) __riscv_vloxseg7ei32_v_u8mf2_tumu(__VA_ARGS__)
7593
#define vloxseg8ei32_v_u8mf2_m(...) __riscv_vloxseg8ei32_v_u8mf2_tumu(__VA_ARGS__)
7594
#define vloxseg2ei32_v_u8m1_m(...) __riscv_vloxseg2ei32_v_u8m1_tumu(__VA_ARGS__)
7595
#define vloxseg3ei32_v_u8m1_m(...) __riscv_vloxseg3ei32_v_u8m1_tumu(__VA_ARGS__)
7596
#define vloxseg4ei32_v_u8m1_m(...) __riscv_vloxseg4ei32_v_u8m1_tumu(__VA_ARGS__)
7597
#define vloxseg5ei32_v_u8m1_m(...) __riscv_vloxseg5ei32_v_u8m1_tumu(__VA_ARGS__)
7598
#define vloxseg6ei32_v_u8m1_m(...) __riscv_vloxseg6ei32_v_u8m1_tumu(__VA_ARGS__)
7599
#define vloxseg7ei32_v_u8m1_m(...) __riscv_vloxseg7ei32_v_u8m1_tumu(__VA_ARGS__)
7600
#define vloxseg8ei32_v_u8m1_m(...) __riscv_vloxseg8ei32_v_u8m1_tumu(__VA_ARGS__)
7601
#define vloxseg2ei32_v_u8m2_m(...) __riscv_vloxseg2ei32_v_u8m2_tumu(__VA_ARGS__)
7602
#define vloxseg3ei32_v_u8m2_m(...) __riscv_vloxseg3ei32_v_u8m2_tumu(__VA_ARGS__)
7603
#define vloxseg4ei32_v_u8m2_m(...) __riscv_vloxseg4ei32_v_u8m2_tumu(__VA_ARGS__)
7604
#define vloxseg2ei64_v_u8mf8_m(...) __riscv_vloxseg2ei64_v_u8mf8_tumu(__VA_ARGS__)
7605
#define vloxseg3ei64_v_u8mf8_m(...) __riscv_vloxseg3ei64_v_u8mf8_tumu(__VA_ARGS__)
7606
#define vloxseg4ei64_v_u8mf8_m(...) __riscv_vloxseg4ei64_v_u8mf8_tumu(__VA_ARGS__)
7607
#define vloxseg5ei64_v_u8mf8_m(...) __riscv_vloxseg5ei64_v_u8mf8_tumu(__VA_ARGS__)
7608
#define vloxseg6ei64_v_u8mf8_m(...) __riscv_vloxseg6ei64_v_u8mf8_tumu(__VA_ARGS__)
7609
#define vloxseg7ei64_v_u8mf8_m(...) __riscv_vloxseg7ei64_v_u8mf8_tumu(__VA_ARGS__)
7610
#define vloxseg8ei64_v_u8mf8_m(...) __riscv_vloxseg8ei64_v_u8mf8_tumu(__VA_ARGS__)
7611
#define vloxseg2ei64_v_u8mf4_m(...) __riscv_vloxseg2ei64_v_u8mf4_tumu(__VA_ARGS__)
7612
#define vloxseg3ei64_v_u8mf4_m(...) __riscv_vloxseg3ei64_v_u8mf4_tumu(__VA_ARGS__)
7613
#define vloxseg4ei64_v_u8mf4_m(...) __riscv_vloxseg4ei64_v_u8mf4_tumu(__VA_ARGS__)
7614
#define vloxseg5ei64_v_u8mf4_m(...) __riscv_vloxseg5ei64_v_u8mf4_tumu(__VA_ARGS__)
7615
#define vloxseg6ei64_v_u8mf4_m(...) __riscv_vloxseg6ei64_v_u8mf4_tumu(__VA_ARGS__)
7616
#define vloxseg7ei64_v_u8mf4_m(...) __riscv_vloxseg7ei64_v_u8mf4_tumu(__VA_ARGS__)
7617
#define vloxseg8ei64_v_u8mf4_m(...) __riscv_vloxseg8ei64_v_u8mf4_tumu(__VA_ARGS__)
7618
#define vloxseg2ei64_v_u8mf2_m(...) __riscv_vloxseg2ei64_v_u8mf2_tumu(__VA_ARGS__)
7619
#define vloxseg3ei64_v_u8mf2_m(...) __riscv_vloxseg3ei64_v_u8mf2_tumu(__VA_ARGS__)
7620
#define vloxseg4ei64_v_u8mf2_m(...) __riscv_vloxseg4ei64_v_u8mf2_tumu(__VA_ARGS__)
7621
#define vloxseg5ei64_v_u8mf2_m(...) __riscv_vloxseg5ei64_v_u8mf2_tumu(__VA_ARGS__)
7622
#define vloxseg6ei64_v_u8mf2_m(...) __riscv_vloxseg6ei64_v_u8mf2_tumu(__VA_ARGS__)
7623
#define vloxseg7ei64_v_u8mf2_m(...) __riscv_vloxseg7ei64_v_u8mf2_tumu(__VA_ARGS__)
7624
#define vloxseg8ei64_v_u8mf2_m(...) __riscv_vloxseg8ei64_v_u8mf2_tumu(__VA_ARGS__)
7625
#define vloxseg2ei64_v_u8m1_m(...) __riscv_vloxseg2ei64_v_u8m1_tumu(__VA_ARGS__)
7626
#define vloxseg3ei64_v_u8m1_m(...) __riscv_vloxseg3ei64_v_u8m1_tumu(__VA_ARGS__)
7627
#define vloxseg4ei64_v_u8m1_m(...) __riscv_vloxseg4ei64_v_u8m1_tumu(__VA_ARGS__)
7628
#define vloxseg5ei64_v_u8m1_m(...) __riscv_vloxseg5ei64_v_u8m1_tumu(__VA_ARGS__)
7629
#define vloxseg6ei64_v_u8m1_m(...) __riscv_vloxseg6ei64_v_u8m1_tumu(__VA_ARGS__)
7630
#define vloxseg7ei64_v_u8m1_m(...) __riscv_vloxseg7ei64_v_u8m1_tumu(__VA_ARGS__)
7631
#define vloxseg8ei64_v_u8m1_m(...) __riscv_vloxseg8ei64_v_u8m1_tumu(__VA_ARGS__)
7632
#define vloxseg2ei8_v_u16mf4_m(...) __riscv_vloxseg2ei8_v_u16mf4_tumu(__VA_ARGS__)
7633
#define vloxseg3ei8_v_u16mf4_m(...) __riscv_vloxseg3ei8_v_u16mf4_tumu(__VA_ARGS__)
7634
#define vloxseg4ei8_v_u16mf4_m(...) __riscv_vloxseg4ei8_v_u16mf4_tumu(__VA_ARGS__)
7635
#define vloxseg5ei8_v_u16mf4_m(...) __riscv_vloxseg5ei8_v_u16mf4_tumu(__VA_ARGS__)
7636
#define vloxseg6ei8_v_u16mf4_m(...) __riscv_vloxseg6ei8_v_u16mf4_tumu(__VA_ARGS__)
7637
#define vloxseg7ei8_v_u16mf4_m(...) __riscv_vloxseg7ei8_v_u16mf4_tumu(__VA_ARGS__)
7638
#define vloxseg8ei8_v_u16mf4_m(...) __riscv_vloxseg8ei8_v_u16mf4_tumu(__VA_ARGS__)
7639
#define vloxseg2ei8_v_u16mf2_m(...) __riscv_vloxseg2ei8_v_u16mf2_tumu(__VA_ARGS__)
7640
#define vloxseg3ei8_v_u16mf2_m(...) __riscv_vloxseg3ei8_v_u16mf2_tumu(__VA_ARGS__)
7641
#define vloxseg4ei8_v_u16mf2_m(...) __riscv_vloxseg4ei8_v_u16mf2_tumu(__VA_ARGS__)
7642
#define vloxseg5ei8_v_u16mf2_m(...) __riscv_vloxseg5ei8_v_u16mf2_tumu(__VA_ARGS__)
7643
#define vloxseg6ei8_v_u16mf2_m(...) __riscv_vloxseg6ei8_v_u16mf2_tumu(__VA_ARGS__)
7644
#define vloxseg7ei8_v_u16mf2_m(...) __riscv_vloxseg7ei8_v_u16mf2_tumu(__VA_ARGS__)
7645
#define vloxseg8ei8_v_u16mf2_m(...) __riscv_vloxseg8ei8_v_u16mf2_tumu(__VA_ARGS__)
7646
#define vloxseg2ei8_v_u16m1_m(...) __riscv_vloxseg2ei8_v_u16m1_tumu(__VA_ARGS__)
7647
#define vloxseg3ei8_v_u16m1_m(...) __riscv_vloxseg3ei8_v_u16m1_tumu(__VA_ARGS__)
7648
#define vloxseg4ei8_v_u16m1_m(...) __riscv_vloxseg4ei8_v_u16m1_tumu(__VA_ARGS__)
7649
#define vloxseg5ei8_v_u16m1_m(...) __riscv_vloxseg5ei8_v_u16m1_tumu(__VA_ARGS__)
7650
#define vloxseg6ei8_v_u16m1_m(...) __riscv_vloxseg6ei8_v_u16m1_tumu(__VA_ARGS__)
7651
#define vloxseg7ei8_v_u16m1_m(...) __riscv_vloxseg7ei8_v_u16m1_tumu(__VA_ARGS__)
7652
#define vloxseg8ei8_v_u16m1_m(...) __riscv_vloxseg8ei8_v_u16m1_tumu(__VA_ARGS__)
7653
#define vloxseg2ei8_v_u16m2_m(...) __riscv_vloxseg2ei8_v_u16m2_tumu(__VA_ARGS__)
7654
#define vloxseg3ei8_v_u16m2_m(...) __riscv_vloxseg3ei8_v_u16m2_tumu(__VA_ARGS__)
7655
#define vloxseg4ei8_v_u16m2_m(...) __riscv_vloxseg4ei8_v_u16m2_tumu(__VA_ARGS__)
7656
#define vloxseg2ei8_v_u16m4_m(...) __riscv_vloxseg2ei8_v_u16m4_tumu(__VA_ARGS__)
7657
#define vloxseg2ei16_v_u16mf4_m(...) __riscv_vloxseg2ei16_v_u16mf4_tumu(__VA_ARGS__)
7658
#define vloxseg3ei16_v_u16mf4_m(...) __riscv_vloxseg3ei16_v_u16mf4_tumu(__VA_ARGS__)
7659
#define vloxseg4ei16_v_u16mf4_m(...) __riscv_vloxseg4ei16_v_u16mf4_tumu(__VA_ARGS__)
7660
#define vloxseg5ei16_v_u16mf4_m(...) __riscv_vloxseg5ei16_v_u16mf4_tumu(__VA_ARGS__)
7661
#define vloxseg6ei16_v_u16mf4_m(...) __riscv_vloxseg6ei16_v_u16mf4_tumu(__VA_ARGS__)
7662
#define vloxseg7ei16_v_u16mf4_m(...) __riscv_vloxseg7ei16_v_u16mf4_tumu(__VA_ARGS__)
7663
#define vloxseg8ei16_v_u16mf4_m(...) __riscv_vloxseg8ei16_v_u16mf4_tumu(__VA_ARGS__)
7664
#define vloxseg2ei16_v_u16mf2_m(...) __riscv_vloxseg2ei16_v_u16mf2_tumu(__VA_ARGS__)
7665
#define vloxseg3ei16_v_u16mf2_m(...) __riscv_vloxseg3ei16_v_u16mf2_tumu(__VA_ARGS__)
7666
#define vloxseg4ei16_v_u16mf2_m(...) __riscv_vloxseg4ei16_v_u16mf2_tumu(__VA_ARGS__)
7667
#define vloxseg5ei16_v_u16mf2_m(...) __riscv_vloxseg5ei16_v_u16mf2_tumu(__VA_ARGS__)
7668
#define vloxseg6ei16_v_u16mf2_m(...) __riscv_vloxseg6ei16_v_u16mf2_tumu(__VA_ARGS__)
7669
#define vloxseg7ei16_v_u16mf2_m(...) __riscv_vloxseg7ei16_v_u16mf2_tumu(__VA_ARGS__)
7670
#define vloxseg8ei16_v_u16mf2_m(...) __riscv_vloxseg8ei16_v_u16mf2_tumu(__VA_ARGS__)
7671
#define vloxseg2ei16_v_u16m1_m(...) __riscv_vloxseg2ei16_v_u16m1_tumu(__VA_ARGS__)
7672
#define vloxseg3ei16_v_u16m1_m(...) __riscv_vloxseg3ei16_v_u16m1_tumu(__VA_ARGS__)
7673
#define vloxseg4ei16_v_u16m1_m(...) __riscv_vloxseg4ei16_v_u16m1_tumu(__VA_ARGS__)
7674
#define vloxseg5ei16_v_u16m1_m(...) __riscv_vloxseg5ei16_v_u16m1_tumu(__VA_ARGS__)
7675
#define vloxseg6ei16_v_u16m1_m(...) __riscv_vloxseg6ei16_v_u16m1_tumu(__VA_ARGS__)
7676
#define vloxseg7ei16_v_u16m1_m(...) __riscv_vloxseg7ei16_v_u16m1_tumu(__VA_ARGS__)
7677
#define vloxseg8ei16_v_u16m1_m(...) __riscv_vloxseg8ei16_v_u16m1_tumu(__VA_ARGS__)
7678
#define vloxseg2ei16_v_u16m2_m(...) __riscv_vloxseg2ei16_v_u16m2_tumu(__VA_ARGS__)
7679
#define vloxseg3ei16_v_u16m2_m(...) __riscv_vloxseg3ei16_v_u16m2_tumu(__VA_ARGS__)
7680
#define vloxseg4ei16_v_u16m2_m(...) __riscv_vloxseg4ei16_v_u16m2_tumu(__VA_ARGS__)
7681
#define vloxseg2ei16_v_u16m4_m(...) __riscv_vloxseg2ei16_v_u16m4_tumu(__VA_ARGS__)
7682
#define vloxseg2ei32_v_u16mf4_m(...) __riscv_vloxseg2ei32_v_u16mf4_tumu(__VA_ARGS__)
7683
#define vloxseg3ei32_v_u16mf4_m(...) __riscv_vloxseg3ei32_v_u16mf4_tumu(__VA_ARGS__)
7684
#define vloxseg4ei32_v_u16mf4_m(...) __riscv_vloxseg4ei32_v_u16mf4_tumu(__VA_ARGS__)
7685
#define vloxseg5ei32_v_u16mf4_m(...) __riscv_vloxseg5ei32_v_u16mf4_tumu(__VA_ARGS__)
7686
#define vloxseg6ei32_v_u16mf4_m(...) __riscv_vloxseg6ei32_v_u16mf4_tumu(__VA_ARGS__)
7687
#define vloxseg7ei32_v_u16mf4_m(...) __riscv_vloxseg7ei32_v_u16mf4_tumu(__VA_ARGS__)
7688
#define vloxseg8ei32_v_u16mf4_m(...) __riscv_vloxseg8ei32_v_u16mf4_tumu(__VA_ARGS__)
7689
#define vloxseg2ei32_v_u16mf2_m(...) __riscv_vloxseg2ei32_v_u16mf2_tumu(__VA_ARGS__)
7690
#define vloxseg3ei32_v_u16mf2_m(...) __riscv_vloxseg3ei32_v_u16mf2_tumu(__VA_ARGS__)
7691
#define vloxseg4ei32_v_u16mf2_m(...) __riscv_vloxseg4ei32_v_u16mf2_tumu(__VA_ARGS__)
7692
#define vloxseg5ei32_v_u16mf2_m(...) __riscv_vloxseg5ei32_v_u16mf2_tumu(__VA_ARGS__)
7693
#define vloxseg6ei32_v_u16mf2_m(...) __riscv_vloxseg6ei32_v_u16mf2_tumu(__VA_ARGS__)
7694
#define vloxseg7ei32_v_u16mf2_m(...) __riscv_vloxseg7ei32_v_u16mf2_tumu(__VA_ARGS__)
7695
#define vloxseg8ei32_v_u16mf2_m(...) __riscv_vloxseg8ei32_v_u16mf2_tumu(__VA_ARGS__)
7696
#define vloxseg2ei32_v_u16m1_m(...) __riscv_vloxseg2ei32_v_u16m1_tumu(__VA_ARGS__)
7697
#define vloxseg3ei32_v_u16m1_m(...) __riscv_vloxseg3ei32_v_u16m1_tumu(__VA_ARGS__)
7698
#define vloxseg4ei32_v_u16m1_m(...) __riscv_vloxseg4ei32_v_u16m1_tumu(__VA_ARGS__)
7699
#define vloxseg5ei32_v_u16m1_m(...) __riscv_vloxseg5ei32_v_u16m1_tumu(__VA_ARGS__)
7700
#define vloxseg6ei32_v_u16m1_m(...) __riscv_vloxseg6ei32_v_u16m1_tumu(__VA_ARGS__)
7701
#define vloxseg7ei32_v_u16m1_m(...) __riscv_vloxseg7ei32_v_u16m1_tumu(__VA_ARGS__)
7702
#define vloxseg8ei32_v_u16m1_m(...) __riscv_vloxseg8ei32_v_u16m1_tumu(__VA_ARGS__)
7703
#define vloxseg2ei32_v_u16m2_m(...) __riscv_vloxseg2ei32_v_u16m2_tumu(__VA_ARGS__)
7704
#define vloxseg3ei32_v_u16m2_m(...) __riscv_vloxseg3ei32_v_u16m2_tumu(__VA_ARGS__)
7705
#define vloxseg4ei32_v_u16m2_m(...) __riscv_vloxseg4ei32_v_u16m2_tumu(__VA_ARGS__)
7706
#define vloxseg2ei32_v_u16m4_m(...) __riscv_vloxseg2ei32_v_u16m4_tumu(__VA_ARGS__)
7707
#define vloxseg2ei64_v_u16mf4_m(...) __riscv_vloxseg2ei64_v_u16mf4_tumu(__VA_ARGS__)
7708
#define vloxseg3ei64_v_u16mf4_m(...) __riscv_vloxseg3ei64_v_u16mf4_tumu(__VA_ARGS__)
7709
#define vloxseg4ei64_v_u16mf4_m(...) __riscv_vloxseg4ei64_v_u16mf4_tumu(__VA_ARGS__)
7710
#define vloxseg5ei64_v_u16mf4_m(...) __riscv_vloxseg5ei64_v_u16mf4_tumu(__VA_ARGS__)
7711
#define vloxseg6ei64_v_u16mf4_m(...) __riscv_vloxseg6ei64_v_u16mf4_tumu(__VA_ARGS__)
7712
#define vloxseg7ei64_v_u16mf4_m(...) __riscv_vloxseg7ei64_v_u16mf4_tumu(__VA_ARGS__)
7713
#define vloxseg8ei64_v_u16mf4_m(...) __riscv_vloxseg8ei64_v_u16mf4_tumu(__VA_ARGS__)
7714
#define vloxseg2ei64_v_u16mf2_m(...) __riscv_vloxseg2ei64_v_u16mf2_tumu(__VA_ARGS__)
7715
#define vloxseg3ei64_v_u16mf2_m(...) __riscv_vloxseg3ei64_v_u16mf2_tumu(__VA_ARGS__)
7716
#define vloxseg4ei64_v_u16mf2_m(...) __riscv_vloxseg4ei64_v_u16mf2_tumu(__VA_ARGS__)
7717
#define vloxseg5ei64_v_u16mf2_m(...) __riscv_vloxseg5ei64_v_u16mf2_tumu(__VA_ARGS__)
7718
#define vloxseg6ei64_v_u16mf2_m(...) __riscv_vloxseg6ei64_v_u16mf2_tumu(__VA_ARGS__)
7719
#define vloxseg7ei64_v_u16mf2_m(...) __riscv_vloxseg7ei64_v_u16mf2_tumu(__VA_ARGS__)
7720
#define vloxseg8ei64_v_u16mf2_m(...) __riscv_vloxseg8ei64_v_u16mf2_tumu(__VA_ARGS__)
7721
#define vloxseg2ei64_v_u16m1_m(...) __riscv_vloxseg2ei64_v_u16m1_tumu(__VA_ARGS__)
7722
#define vloxseg3ei64_v_u16m1_m(...) __riscv_vloxseg3ei64_v_u16m1_tumu(__VA_ARGS__)
7723
#define vloxseg4ei64_v_u16m1_m(...) __riscv_vloxseg4ei64_v_u16m1_tumu(__VA_ARGS__)
7724
#define vloxseg5ei64_v_u16m1_m(...) __riscv_vloxseg5ei64_v_u16m1_tumu(__VA_ARGS__)
7725
#define vloxseg6ei64_v_u16m1_m(...) __riscv_vloxseg6ei64_v_u16m1_tumu(__VA_ARGS__)
7726
#define vloxseg7ei64_v_u16m1_m(...) __riscv_vloxseg7ei64_v_u16m1_tumu(__VA_ARGS__)
7727
#define vloxseg8ei64_v_u16m1_m(...) __riscv_vloxseg8ei64_v_u16m1_tumu(__VA_ARGS__)
7728
#define vloxseg2ei64_v_u16m2_m(...) __riscv_vloxseg2ei64_v_u16m2_tumu(__VA_ARGS__)
7729
#define vloxseg3ei64_v_u16m2_m(...) __riscv_vloxseg3ei64_v_u16m2_tumu(__VA_ARGS__)
7730
#define vloxseg4ei64_v_u16m2_m(...) __riscv_vloxseg4ei64_v_u16m2_tumu(__VA_ARGS__)
7731
#define vloxseg2ei8_v_u32mf2_m(...) __riscv_vloxseg2ei8_v_u32mf2_tumu(__VA_ARGS__)
7732
#define vloxseg3ei8_v_u32mf2_m(...) __riscv_vloxseg3ei8_v_u32mf2_tumu(__VA_ARGS__)
7733
#define vloxseg4ei8_v_u32mf2_m(...) __riscv_vloxseg4ei8_v_u32mf2_tumu(__VA_ARGS__)
7734
#define vloxseg5ei8_v_u32mf2_m(...) __riscv_vloxseg5ei8_v_u32mf2_tumu(__VA_ARGS__)
7735
#define vloxseg6ei8_v_u32mf2_m(...) __riscv_vloxseg6ei8_v_u32mf2_tumu(__VA_ARGS__)
7736
#define vloxseg7ei8_v_u32mf2_m(...) __riscv_vloxseg7ei8_v_u32mf2_tumu(__VA_ARGS__)
7737
#define vloxseg8ei8_v_u32mf2_m(...) __riscv_vloxseg8ei8_v_u32mf2_tumu(__VA_ARGS__)
7738
#define vloxseg2ei8_v_u32m1_m(...) __riscv_vloxseg2ei8_v_u32m1_tumu(__VA_ARGS__)
7739
#define vloxseg3ei8_v_u32m1_m(...) __riscv_vloxseg3ei8_v_u32m1_tumu(__VA_ARGS__)
7740
#define vloxseg4ei8_v_u32m1_m(...) __riscv_vloxseg4ei8_v_u32m1_tumu(__VA_ARGS__)
7741
#define vloxseg5ei8_v_u32m1_m(...) __riscv_vloxseg5ei8_v_u32m1_tumu(__VA_ARGS__)
7742
#define vloxseg6ei8_v_u32m1_m(...) __riscv_vloxseg6ei8_v_u32m1_tumu(__VA_ARGS__)
7743
#define vloxseg7ei8_v_u32m1_m(...) __riscv_vloxseg7ei8_v_u32m1_tumu(__VA_ARGS__)
7744
#define vloxseg8ei8_v_u32m1_m(...) __riscv_vloxseg8ei8_v_u32m1_tumu(__VA_ARGS__)
7745
#define vloxseg2ei8_v_u32m2_m(...) __riscv_vloxseg2ei8_v_u32m2_tumu(__VA_ARGS__)
7746
#define vloxseg3ei8_v_u32m2_m(...) __riscv_vloxseg3ei8_v_u32m2_tumu(__VA_ARGS__)
7747
#define vloxseg4ei8_v_u32m2_m(...) __riscv_vloxseg4ei8_v_u32m2_tumu(__VA_ARGS__)
7748
#define vloxseg2ei8_v_u32m4_m(...) __riscv_vloxseg2ei8_v_u32m4_tumu(__VA_ARGS__)
7749
#define vloxseg2ei16_v_u32mf2_m(...) __riscv_vloxseg2ei16_v_u32mf2_tumu(__VA_ARGS__)
7750
#define vloxseg3ei16_v_u32mf2_m(...) __riscv_vloxseg3ei16_v_u32mf2_tumu(__VA_ARGS__)
7751
#define vloxseg4ei16_v_u32mf2_m(...) __riscv_vloxseg4ei16_v_u32mf2_tumu(__VA_ARGS__)
7752
#define vloxseg5ei16_v_u32mf2_m(...) __riscv_vloxseg5ei16_v_u32mf2_tumu(__VA_ARGS__)
7753
#define vloxseg6ei16_v_u32mf2_m(...) __riscv_vloxseg6ei16_v_u32mf2_tumu(__VA_ARGS__)
7754
#define vloxseg7ei16_v_u32mf2_m(...) __riscv_vloxseg7ei16_v_u32mf2_tumu(__VA_ARGS__)
7755
#define vloxseg8ei16_v_u32mf2_m(...) __riscv_vloxseg8ei16_v_u32mf2_tumu(__VA_ARGS__)
7756
#define vloxseg2ei16_v_u32m1_m(...) __riscv_vloxseg2ei16_v_u32m1_tumu(__VA_ARGS__)
7757
#define vloxseg3ei16_v_u32m1_m(...) __riscv_vloxseg3ei16_v_u32m1_tumu(__VA_ARGS__)
7758
#define vloxseg4ei16_v_u32m1_m(...) __riscv_vloxseg4ei16_v_u32m1_tumu(__VA_ARGS__)
7759
#define vloxseg5ei16_v_u32m1_m(...) __riscv_vloxseg5ei16_v_u32m1_tumu(__VA_ARGS__)
7760
#define vloxseg6ei16_v_u32m1_m(...) __riscv_vloxseg6ei16_v_u32m1_tumu(__VA_ARGS__)
7761
#define vloxseg7ei16_v_u32m1_m(...) __riscv_vloxseg7ei16_v_u32m1_tumu(__VA_ARGS__)
7762
#define vloxseg8ei16_v_u32m1_m(...) __riscv_vloxseg8ei16_v_u32m1_tumu(__VA_ARGS__)
7763
#define vloxseg2ei16_v_u32m2_m(...) __riscv_vloxseg2ei16_v_u32m2_tumu(__VA_ARGS__)
7764
#define vloxseg3ei16_v_u32m2_m(...) __riscv_vloxseg3ei16_v_u32m2_tumu(__VA_ARGS__)
7765
#define vloxseg4ei16_v_u32m2_m(...) __riscv_vloxseg4ei16_v_u32m2_tumu(__VA_ARGS__)
7766
#define vloxseg2ei16_v_u32m4_m(...) __riscv_vloxseg2ei16_v_u32m4_tumu(__VA_ARGS__)
7767
#define vloxseg2ei32_v_u32mf2_m(...) __riscv_vloxseg2ei32_v_u32mf2_tumu(__VA_ARGS__)
7768
#define vloxseg3ei32_v_u32mf2_m(...) __riscv_vloxseg3ei32_v_u32mf2_tumu(__VA_ARGS__)
7769
#define vloxseg4ei32_v_u32mf2_m(...) __riscv_vloxseg4ei32_v_u32mf2_tumu(__VA_ARGS__)
7770
#define vloxseg5ei32_v_u32mf2_m(...) __riscv_vloxseg5ei32_v_u32mf2_tumu(__VA_ARGS__)
7771
#define vloxseg6ei32_v_u32mf2_m(...) __riscv_vloxseg6ei32_v_u32mf2_tumu(__VA_ARGS__)
7772
#define vloxseg7ei32_v_u32mf2_m(...) __riscv_vloxseg7ei32_v_u32mf2_tumu(__VA_ARGS__)
7773
#define vloxseg8ei32_v_u32mf2_m(...) __riscv_vloxseg8ei32_v_u32mf2_tumu(__VA_ARGS__)
7774
#define vloxseg2ei32_v_u32m1_m(...) __riscv_vloxseg2ei32_v_u32m1_tumu(__VA_ARGS__)
7775
#define vloxseg3ei32_v_u32m1_m(...) __riscv_vloxseg3ei32_v_u32m1_tumu(__VA_ARGS__)
7776
#define vloxseg4ei32_v_u32m1_m(...) __riscv_vloxseg4ei32_v_u32m1_tumu(__VA_ARGS__)
7777
#define vloxseg5ei32_v_u32m1_m(...) __riscv_vloxseg5ei32_v_u32m1_tumu(__VA_ARGS__)
7778
#define vloxseg6ei32_v_u32m1_m(...) __riscv_vloxseg6ei32_v_u32m1_tumu(__VA_ARGS__)
7779
#define vloxseg7ei32_v_u32m1_m(...) __riscv_vloxseg7ei32_v_u32m1_tumu(__VA_ARGS__)
7780
#define vloxseg8ei32_v_u32m1_m(...) __riscv_vloxseg8ei32_v_u32m1_tumu(__VA_ARGS__)
7781
#define vloxseg2ei32_v_u32m2_m(...) __riscv_vloxseg2ei32_v_u32m2_tumu(__VA_ARGS__)
7782
#define vloxseg3ei32_v_u32m2_m(...) __riscv_vloxseg3ei32_v_u32m2_tumu(__VA_ARGS__)
7783
#define vloxseg4ei32_v_u32m2_m(...) __riscv_vloxseg4ei32_v_u32m2_tumu(__VA_ARGS__)
7784
#define vloxseg2ei32_v_u32m4_m(...) __riscv_vloxseg2ei32_v_u32m4_tumu(__VA_ARGS__)
7785
#define vloxseg2ei64_v_u32mf2_m(...) __riscv_vloxseg2ei64_v_u32mf2_tumu(__VA_ARGS__)
7786
#define vloxseg3ei64_v_u32mf2_m(...) __riscv_vloxseg3ei64_v_u32mf2_tumu(__VA_ARGS__)
7787
#define vloxseg4ei64_v_u32mf2_m(...) __riscv_vloxseg4ei64_v_u32mf2_tumu(__VA_ARGS__)
7788
#define vloxseg5ei64_v_u32mf2_m(...) __riscv_vloxseg5ei64_v_u32mf2_tumu(__VA_ARGS__)
7789
#define vloxseg6ei64_v_u32mf2_m(...) __riscv_vloxseg6ei64_v_u32mf2_tumu(__VA_ARGS__)
7790
#define vloxseg7ei64_v_u32mf2_m(...) __riscv_vloxseg7ei64_v_u32mf2_tumu(__VA_ARGS__)
7791
#define vloxseg8ei64_v_u32mf2_m(...) __riscv_vloxseg8ei64_v_u32mf2_tumu(__VA_ARGS__)
7792
#define vloxseg2ei64_v_u32m1_m(...) __riscv_vloxseg2ei64_v_u32m1_tumu(__VA_ARGS__)
7793
#define vloxseg3ei64_v_u32m1_m(...) __riscv_vloxseg3ei64_v_u32m1_tumu(__VA_ARGS__)
7794
#define vloxseg4ei64_v_u32m1_m(...) __riscv_vloxseg4ei64_v_u32m1_tumu(__VA_ARGS__)
7795
#define vloxseg5ei64_v_u32m1_m(...) __riscv_vloxseg5ei64_v_u32m1_tumu(__VA_ARGS__)
7796
#define vloxseg6ei64_v_u32m1_m(...) __riscv_vloxseg6ei64_v_u32m1_tumu(__VA_ARGS__)
7797
#define vloxseg7ei64_v_u32m1_m(...) __riscv_vloxseg7ei64_v_u32m1_tumu(__VA_ARGS__)
7798
#define vloxseg8ei64_v_u32m1_m(...) __riscv_vloxseg8ei64_v_u32m1_tumu(__VA_ARGS__)
7799
#define vloxseg2ei64_v_u32m2_m(...) __riscv_vloxseg2ei64_v_u32m2_tumu(__VA_ARGS__)
7800
#define vloxseg3ei64_v_u32m2_m(...) __riscv_vloxseg3ei64_v_u32m2_tumu(__VA_ARGS__)
7801
#define vloxseg4ei64_v_u32m2_m(...) __riscv_vloxseg4ei64_v_u32m2_tumu(__VA_ARGS__)
7802
#define vloxseg2ei64_v_u32m4_m(...) __riscv_vloxseg2ei64_v_u32m4_tumu(__VA_ARGS__)
7803
#define vloxseg2ei8_v_u64m1_m(...) __riscv_vloxseg2ei8_v_u64m1_tumu(__VA_ARGS__)
7804
#define vloxseg3ei8_v_u64m1_m(...) __riscv_vloxseg3ei8_v_u64m1_tumu(__VA_ARGS__)
7805
#define vloxseg4ei8_v_u64m1_m(...) __riscv_vloxseg4ei8_v_u64m1_tumu(__VA_ARGS__)
7806
#define vloxseg5ei8_v_u64m1_m(...) __riscv_vloxseg5ei8_v_u64m1_tumu(__VA_ARGS__)
7807
#define vloxseg6ei8_v_u64m1_m(...) __riscv_vloxseg6ei8_v_u64m1_tumu(__VA_ARGS__)
7808
#define vloxseg7ei8_v_u64m1_m(...) __riscv_vloxseg7ei8_v_u64m1_tumu(__VA_ARGS__)
7809
#define vloxseg8ei8_v_u64m1_m(...) __riscv_vloxseg8ei8_v_u64m1_tumu(__VA_ARGS__)
7810
#define vloxseg2ei8_v_u64m2_m(...) __riscv_vloxseg2ei8_v_u64m2_tumu(__VA_ARGS__)
7811
#define vloxseg3ei8_v_u64m2_m(...) __riscv_vloxseg3ei8_v_u64m2_tumu(__VA_ARGS__)
7812
#define vloxseg4ei8_v_u64m2_m(...) __riscv_vloxseg4ei8_v_u64m2_tumu(__VA_ARGS__)
7813
#define vloxseg2ei8_v_u64m4_m(...) __riscv_vloxseg2ei8_v_u64m4_tumu(__VA_ARGS__)
7814
#define vloxseg2ei16_v_u64m1_m(...) __riscv_vloxseg2ei16_v_u64m1_tumu(__VA_ARGS__)
7815
#define vloxseg3ei16_v_u64m1_m(...) __riscv_vloxseg3ei16_v_u64m1_tumu(__VA_ARGS__)
7816
#define vloxseg4ei16_v_u64m1_m(...) __riscv_vloxseg4ei16_v_u64m1_tumu(__VA_ARGS__)
7817
#define vloxseg5ei16_v_u64m1_m(...) __riscv_vloxseg5ei16_v_u64m1_tumu(__VA_ARGS__)
7818
#define vloxseg6ei16_v_u64m1_m(...) __riscv_vloxseg6ei16_v_u64m1_tumu(__VA_ARGS__)
7819
#define vloxseg7ei16_v_u64m1_m(...) __riscv_vloxseg7ei16_v_u64m1_tumu(__VA_ARGS__)
7820
#define vloxseg8ei16_v_u64m1_m(...) __riscv_vloxseg8ei16_v_u64m1_tumu(__VA_ARGS__)
7821
#define vloxseg2ei16_v_u64m2_m(...) __riscv_vloxseg2ei16_v_u64m2_tumu(__VA_ARGS__)
7822
#define vloxseg3ei16_v_u64m2_m(...) __riscv_vloxseg3ei16_v_u64m2_tumu(__VA_ARGS__)
7823
#define vloxseg4ei16_v_u64m2_m(...) __riscv_vloxseg4ei16_v_u64m2_tumu(__VA_ARGS__)
7824
#define vloxseg2ei16_v_u64m4_m(...) __riscv_vloxseg2ei16_v_u64m4_tumu(__VA_ARGS__)
7825
#define vloxseg2ei32_v_u64m1_m(...) __riscv_vloxseg2ei32_v_u64m1_tumu(__VA_ARGS__)
7826
#define vloxseg3ei32_v_u64m1_m(...) __riscv_vloxseg3ei32_v_u64m1_tumu(__VA_ARGS__)
7827
#define vloxseg4ei32_v_u64m1_m(...) __riscv_vloxseg4ei32_v_u64m1_tumu(__VA_ARGS__)
7828
#define vloxseg5ei32_v_u64m1_m(...) __riscv_vloxseg5ei32_v_u64m1_tumu(__VA_ARGS__)
7829
#define vloxseg6ei32_v_u64m1_m(...) __riscv_vloxseg6ei32_v_u64m1_tumu(__VA_ARGS__)
7830
#define vloxseg7ei32_v_u64m1_m(...) __riscv_vloxseg7ei32_v_u64m1_tumu(__VA_ARGS__)
7831
#define vloxseg8ei32_v_u64m1_m(...) __riscv_vloxseg8ei32_v_u64m1_tumu(__VA_ARGS__)
7832
#define vloxseg2ei32_v_u64m2_m(...) __riscv_vloxseg2ei32_v_u64m2_tumu(__VA_ARGS__)
7833
#define vloxseg3ei32_v_u64m2_m(...) __riscv_vloxseg3ei32_v_u64m2_tumu(__VA_ARGS__)
7834
#define vloxseg4ei32_v_u64m2_m(...) __riscv_vloxseg4ei32_v_u64m2_tumu(__VA_ARGS__)
7835
#define vloxseg2ei32_v_u64m4_m(...) __riscv_vloxseg2ei32_v_u64m4_tumu(__VA_ARGS__)
7836
#define vloxseg2ei64_v_u64m1_m(...) __riscv_vloxseg2ei64_v_u64m1_tumu(__VA_ARGS__)
7837
#define vloxseg3ei64_v_u64m1_m(...) __riscv_vloxseg3ei64_v_u64m1_tumu(__VA_ARGS__)
7838
#define vloxseg4ei64_v_u64m1_m(...) __riscv_vloxseg4ei64_v_u64m1_tumu(__VA_ARGS__)
7839
#define vloxseg5ei64_v_u64m1_m(...) __riscv_vloxseg5ei64_v_u64m1_tumu(__VA_ARGS__)
7840
#define vloxseg6ei64_v_u64m1_m(...) __riscv_vloxseg6ei64_v_u64m1_tumu(__VA_ARGS__)
7841
#define vloxseg7ei64_v_u64m1_m(...) __riscv_vloxseg7ei64_v_u64m1_tumu(__VA_ARGS__)
7842
#define vloxseg8ei64_v_u64m1_m(...) __riscv_vloxseg8ei64_v_u64m1_tumu(__VA_ARGS__)
7843
#define vloxseg2ei64_v_u64m2_m(...) __riscv_vloxseg2ei64_v_u64m2_tumu(__VA_ARGS__)
7844
#define vloxseg3ei64_v_u64m2_m(...) __riscv_vloxseg3ei64_v_u64m2_tumu(__VA_ARGS__)
7845
#define vloxseg4ei64_v_u64m2_m(...) __riscv_vloxseg4ei64_v_u64m2_tumu(__VA_ARGS__)
7846
#define vloxseg2ei64_v_u64m4_m(...) __riscv_vloxseg2ei64_v_u64m4_tumu(__VA_ARGS__)
7847
#define vluxseg2ei8_v_u8mf8_m(...) __riscv_vluxseg2ei8_v_u8mf8_tumu(__VA_ARGS__)
7848
#define vluxseg3ei8_v_u8mf8_m(...) __riscv_vluxseg3ei8_v_u8mf8_tumu(__VA_ARGS__)
7849
#define vluxseg4ei8_v_u8mf8_m(...) __riscv_vluxseg4ei8_v_u8mf8_tumu(__VA_ARGS__)
7850
#define vluxseg5ei8_v_u8mf8_m(...) __riscv_vluxseg5ei8_v_u8mf8_tumu(__VA_ARGS__)
7851
#define vluxseg6ei8_v_u8mf8_m(...) __riscv_vluxseg6ei8_v_u8mf8_tumu(__VA_ARGS__)
7852
#define vluxseg7ei8_v_u8mf8_m(...) __riscv_vluxseg7ei8_v_u8mf8_tumu(__VA_ARGS__)
7853
#define vluxseg8ei8_v_u8mf8_m(...) __riscv_vluxseg8ei8_v_u8mf8_tumu(__VA_ARGS__)
7854
#define vluxseg2ei8_v_u8mf4_m(...) __riscv_vluxseg2ei8_v_u8mf4_tumu(__VA_ARGS__)
7855
#define vluxseg3ei8_v_u8mf4_m(...) __riscv_vluxseg3ei8_v_u8mf4_tumu(__VA_ARGS__)
7856
#define vluxseg4ei8_v_u8mf4_m(...) __riscv_vluxseg4ei8_v_u8mf4_tumu(__VA_ARGS__)
7857
#define vluxseg5ei8_v_u8mf4_m(...) __riscv_vluxseg5ei8_v_u8mf4_tumu(__VA_ARGS__)
7858
#define vluxseg6ei8_v_u8mf4_m(...) __riscv_vluxseg6ei8_v_u8mf4_tumu(__VA_ARGS__)
7859
#define vluxseg7ei8_v_u8mf4_m(...) __riscv_vluxseg7ei8_v_u8mf4_tumu(__VA_ARGS__)
7860
#define vluxseg8ei8_v_u8mf4_m(...) __riscv_vluxseg8ei8_v_u8mf4_tumu(__VA_ARGS__)
7861
#define vluxseg2ei8_v_u8mf2_m(...) __riscv_vluxseg2ei8_v_u8mf2_tumu(__VA_ARGS__)
7862
#define vluxseg3ei8_v_u8mf2_m(...) __riscv_vluxseg3ei8_v_u8mf2_tumu(__VA_ARGS__)
7863
#define vluxseg4ei8_v_u8mf2_m(...) __riscv_vluxseg4ei8_v_u8mf2_tumu(__VA_ARGS__)
7864
#define vluxseg5ei8_v_u8mf2_m(...) __riscv_vluxseg5ei8_v_u8mf2_tumu(__VA_ARGS__)
7865
#define vluxseg6ei8_v_u8mf2_m(...) __riscv_vluxseg6ei8_v_u8mf2_tumu(__VA_ARGS__)
7866
#define vluxseg7ei8_v_u8mf2_m(...) __riscv_vluxseg7ei8_v_u8mf2_tumu(__VA_ARGS__)
7867
#define vluxseg8ei8_v_u8mf2_m(...) __riscv_vluxseg8ei8_v_u8mf2_tumu(__VA_ARGS__)
7868
#define vluxseg2ei8_v_u8m1_m(...) __riscv_vluxseg2ei8_v_u8m1_tumu(__VA_ARGS__)
7869
#define vluxseg3ei8_v_u8m1_m(...) __riscv_vluxseg3ei8_v_u8m1_tumu(__VA_ARGS__)
7870
#define vluxseg4ei8_v_u8m1_m(...) __riscv_vluxseg4ei8_v_u8m1_tumu(__VA_ARGS__)
7871
#define vluxseg5ei8_v_u8m1_m(...) __riscv_vluxseg5ei8_v_u8m1_tumu(__VA_ARGS__)
7872
#define vluxseg6ei8_v_u8m1_m(...) __riscv_vluxseg6ei8_v_u8m1_tumu(__VA_ARGS__)
7873
#define vluxseg7ei8_v_u8m1_m(...) __riscv_vluxseg7ei8_v_u8m1_tumu(__VA_ARGS__)
7874
#define vluxseg8ei8_v_u8m1_m(...) __riscv_vluxseg8ei8_v_u8m1_tumu(__VA_ARGS__)
7875
#define vluxseg2ei8_v_u8m2_m(...) __riscv_vluxseg2ei8_v_u8m2_tumu(__VA_ARGS__)
7876
#define vluxseg3ei8_v_u8m2_m(...) __riscv_vluxseg3ei8_v_u8m2_tumu(__VA_ARGS__)
7877
#define vluxseg4ei8_v_u8m2_m(...) __riscv_vluxseg4ei8_v_u8m2_tumu(__VA_ARGS__)
7878
#define vluxseg2ei8_v_u8m4_m(...) __riscv_vluxseg2ei8_v_u8m4_tumu(__VA_ARGS__)
7879
#define vluxseg2ei16_v_u8mf8_m(...) __riscv_vluxseg2ei16_v_u8mf8_tumu(__VA_ARGS__)
7880
#define vluxseg3ei16_v_u8mf8_m(...) __riscv_vluxseg3ei16_v_u8mf8_tumu(__VA_ARGS__)
7881
#define vluxseg4ei16_v_u8mf8_m(...) __riscv_vluxseg4ei16_v_u8mf8_tumu(__VA_ARGS__)
7882
#define vluxseg5ei16_v_u8mf8_m(...) __riscv_vluxseg5ei16_v_u8mf8_tumu(__VA_ARGS__)
7883
#define vluxseg6ei16_v_u8mf8_m(...) __riscv_vluxseg6ei16_v_u8mf8_tumu(__VA_ARGS__)
7884
#define vluxseg7ei16_v_u8mf8_m(...) __riscv_vluxseg7ei16_v_u8mf8_tumu(__VA_ARGS__)
7885
#define vluxseg8ei16_v_u8mf8_m(...) __riscv_vluxseg8ei16_v_u8mf8_tumu(__VA_ARGS__)
7886
#define vluxseg2ei16_v_u8mf4_m(...) __riscv_vluxseg2ei16_v_u8mf4_tumu(__VA_ARGS__)
7887
#define vluxseg3ei16_v_u8mf4_m(...) __riscv_vluxseg3ei16_v_u8mf4_tumu(__VA_ARGS__)
7888
#define vluxseg4ei16_v_u8mf4_m(...) __riscv_vluxseg4ei16_v_u8mf4_tumu(__VA_ARGS__)
7889
#define vluxseg5ei16_v_u8mf4_m(...) __riscv_vluxseg5ei16_v_u8mf4_tumu(__VA_ARGS__)
7890
#define vluxseg6ei16_v_u8mf4_m(...) __riscv_vluxseg6ei16_v_u8mf4_tumu(__VA_ARGS__)
7891
#define vluxseg7ei16_v_u8mf4_m(...) __riscv_vluxseg7ei16_v_u8mf4_tumu(__VA_ARGS__)
7892
#define vluxseg8ei16_v_u8mf4_m(...) __riscv_vluxseg8ei16_v_u8mf4_tumu(__VA_ARGS__)
7893
#define vluxseg2ei16_v_u8mf2_m(...) __riscv_vluxseg2ei16_v_u8mf2_tumu(__VA_ARGS__)
7894
#define vluxseg3ei16_v_u8mf2_m(...) __riscv_vluxseg3ei16_v_u8mf2_tumu(__VA_ARGS__)
7895
#define vluxseg4ei16_v_u8mf2_m(...) __riscv_vluxseg4ei16_v_u8mf2_tumu(__VA_ARGS__)
7896
#define vluxseg5ei16_v_u8mf2_m(...) __riscv_vluxseg5ei16_v_u8mf2_tumu(__VA_ARGS__)
7897
#define vluxseg6ei16_v_u8mf2_m(...) __riscv_vluxseg6ei16_v_u8mf2_tumu(__VA_ARGS__)
7898
#define vluxseg7ei16_v_u8mf2_m(...) __riscv_vluxseg7ei16_v_u8mf2_tumu(__VA_ARGS__)
7899
#define vluxseg8ei16_v_u8mf2_m(...) __riscv_vluxseg8ei16_v_u8mf2_tumu(__VA_ARGS__)
7900
#define vluxseg2ei16_v_u8m1_m(...) __riscv_vluxseg2ei16_v_u8m1_tumu(__VA_ARGS__)
7901
#define vluxseg3ei16_v_u8m1_m(...) __riscv_vluxseg3ei16_v_u8m1_tumu(__VA_ARGS__)
7902
#define vluxseg4ei16_v_u8m1_m(...) __riscv_vluxseg4ei16_v_u8m1_tumu(__VA_ARGS__)
7903
#define vluxseg5ei16_v_u8m1_m(...) __riscv_vluxseg5ei16_v_u8m1_tumu(__VA_ARGS__)
7904
#define vluxseg6ei16_v_u8m1_m(...) __riscv_vluxseg6ei16_v_u8m1_tumu(__VA_ARGS__)
7905
#define vluxseg7ei16_v_u8m1_m(...) __riscv_vluxseg7ei16_v_u8m1_tumu(__VA_ARGS__)
7906
#define vluxseg8ei16_v_u8m1_m(...) __riscv_vluxseg8ei16_v_u8m1_tumu(__VA_ARGS__)
7907
#define vluxseg2ei16_v_u8m2_m(...) __riscv_vluxseg2ei16_v_u8m2_tumu(__VA_ARGS__)
7908
#define vluxseg3ei16_v_u8m2_m(...) __riscv_vluxseg3ei16_v_u8m2_tumu(__VA_ARGS__)
7909
#define vluxseg4ei16_v_u8m2_m(...) __riscv_vluxseg4ei16_v_u8m2_tumu(__VA_ARGS__)
7910
#define vluxseg2ei16_v_u8m4_m(...) __riscv_vluxseg2ei16_v_u8m4_tumu(__VA_ARGS__)
7911
#define vluxseg2ei32_v_u8mf8_m(...) __riscv_vluxseg2ei32_v_u8mf8_tumu(__VA_ARGS__)
7912
#define vluxseg3ei32_v_u8mf8_m(...) __riscv_vluxseg3ei32_v_u8mf8_tumu(__VA_ARGS__)
7913
#define vluxseg4ei32_v_u8mf8_m(...) __riscv_vluxseg4ei32_v_u8mf8_tumu(__VA_ARGS__)
7914
#define vluxseg5ei32_v_u8mf8_m(...) __riscv_vluxseg5ei32_v_u8mf8_tumu(__VA_ARGS__)
7915
#define vluxseg6ei32_v_u8mf8_m(...) __riscv_vluxseg6ei32_v_u8mf8_tumu(__VA_ARGS__)
7916
#define vluxseg7ei32_v_u8mf8_m(...) __riscv_vluxseg7ei32_v_u8mf8_tumu(__VA_ARGS__)
7917
#define vluxseg8ei32_v_u8mf8_m(...) __riscv_vluxseg8ei32_v_u8mf8_tumu(__VA_ARGS__)
7918
#define vluxseg2ei32_v_u8mf4_m(...) __riscv_vluxseg2ei32_v_u8mf4_tumu(__VA_ARGS__)
7919
#define vluxseg3ei32_v_u8mf4_m(...) __riscv_vluxseg3ei32_v_u8mf4_tumu(__VA_ARGS__)
7920
#define vluxseg4ei32_v_u8mf4_m(...) __riscv_vluxseg4ei32_v_u8mf4_tumu(__VA_ARGS__)
7921
#define vluxseg5ei32_v_u8mf4_m(...) __riscv_vluxseg5ei32_v_u8mf4_tumu(__VA_ARGS__)
7922
#define vluxseg6ei32_v_u8mf4_m(...) __riscv_vluxseg6ei32_v_u8mf4_tumu(__VA_ARGS__)
7923
#define vluxseg7ei32_v_u8mf4_m(...) __riscv_vluxseg7ei32_v_u8mf4_tumu(__VA_ARGS__)
7924
#define vluxseg8ei32_v_u8mf4_m(...) __riscv_vluxseg8ei32_v_u8mf4_tumu(__VA_ARGS__)
7925
#define vluxseg2ei32_v_u8mf2_m(...) __riscv_vluxseg2ei32_v_u8mf2_tumu(__VA_ARGS__)
7926
#define vluxseg3ei32_v_u8mf2_m(...) __riscv_vluxseg3ei32_v_u8mf2_tumu(__VA_ARGS__)
7927
#define vluxseg4ei32_v_u8mf2_m(...) __riscv_vluxseg4ei32_v_u8mf2_tumu(__VA_ARGS__)
7928
#define vluxseg5ei32_v_u8mf2_m(...) __riscv_vluxseg5ei32_v_u8mf2_tumu(__VA_ARGS__)
7929
#define vluxseg6ei32_v_u8mf2_m(...) __riscv_vluxseg6ei32_v_u8mf2_tumu(__VA_ARGS__)
7930
#define vluxseg7ei32_v_u8mf2_m(...) __riscv_vluxseg7ei32_v_u8mf2_tumu(__VA_ARGS__)
7931
#define vluxseg8ei32_v_u8mf2_m(...) __riscv_vluxseg8ei32_v_u8mf2_tumu(__VA_ARGS__)
7932
#define vluxseg2ei32_v_u8m1_m(...) __riscv_vluxseg2ei32_v_u8m1_tumu(__VA_ARGS__)
7933
#define vluxseg3ei32_v_u8m1_m(...) __riscv_vluxseg3ei32_v_u8m1_tumu(__VA_ARGS__)
7934
#define vluxseg4ei32_v_u8m1_m(...) __riscv_vluxseg4ei32_v_u8m1_tumu(__VA_ARGS__)
7935
#define vluxseg5ei32_v_u8m1_m(...) __riscv_vluxseg5ei32_v_u8m1_tumu(__VA_ARGS__)
7936
#define vluxseg6ei32_v_u8m1_m(...) __riscv_vluxseg6ei32_v_u8m1_tumu(__VA_ARGS__)
7937
#define vluxseg7ei32_v_u8m1_m(...) __riscv_vluxseg7ei32_v_u8m1_tumu(__VA_ARGS__)
7938
#define vluxseg8ei32_v_u8m1_m(...) __riscv_vluxseg8ei32_v_u8m1_tumu(__VA_ARGS__)
7939
#define vluxseg2ei32_v_u8m2_m(...) __riscv_vluxseg2ei32_v_u8m2_tumu(__VA_ARGS__)
7940
#define vluxseg3ei32_v_u8m2_m(...) __riscv_vluxseg3ei32_v_u8m2_tumu(__VA_ARGS__)
7941
#define vluxseg4ei32_v_u8m2_m(...) __riscv_vluxseg4ei32_v_u8m2_tumu(__VA_ARGS__)
7942
#define vluxseg2ei64_v_u8mf8_m(...) __riscv_vluxseg2ei64_v_u8mf8_tumu(__VA_ARGS__)
7943
#define vluxseg3ei64_v_u8mf8_m(...) __riscv_vluxseg3ei64_v_u8mf8_tumu(__VA_ARGS__)
7944
#define vluxseg4ei64_v_u8mf8_m(...) __riscv_vluxseg4ei64_v_u8mf8_tumu(__VA_ARGS__)
7945
#define vluxseg5ei64_v_u8mf8_m(...) __riscv_vluxseg5ei64_v_u8mf8_tumu(__VA_ARGS__)
7946
#define vluxseg6ei64_v_u8mf8_m(...) __riscv_vluxseg6ei64_v_u8mf8_tumu(__VA_ARGS__)
7947
#define vluxseg7ei64_v_u8mf8_m(...) __riscv_vluxseg7ei64_v_u8mf8_tumu(__VA_ARGS__)
7948
#define vluxseg8ei64_v_u8mf8_m(...) __riscv_vluxseg8ei64_v_u8mf8_tumu(__VA_ARGS__)
7949
#define vluxseg2ei64_v_u8mf4_m(...) __riscv_vluxseg2ei64_v_u8mf4_tumu(__VA_ARGS__)
7950
#define vluxseg3ei64_v_u8mf4_m(...) __riscv_vluxseg3ei64_v_u8mf4_tumu(__VA_ARGS__)
7951
#define vluxseg4ei64_v_u8mf4_m(...) __riscv_vluxseg4ei64_v_u8mf4_tumu(__VA_ARGS__)
7952
#define vluxseg5ei64_v_u8mf4_m(...) __riscv_vluxseg5ei64_v_u8mf4_tumu(__VA_ARGS__)
7953
#define vluxseg6ei64_v_u8mf4_m(...) __riscv_vluxseg6ei64_v_u8mf4_tumu(__VA_ARGS__)
7954
#define vluxseg7ei64_v_u8mf4_m(...) __riscv_vluxseg7ei64_v_u8mf4_tumu(__VA_ARGS__)
7955
#define vluxseg8ei64_v_u8mf4_m(...) __riscv_vluxseg8ei64_v_u8mf4_tumu(__VA_ARGS__)
7956
#define vluxseg2ei64_v_u8mf2_m(...) __riscv_vluxseg2ei64_v_u8mf2_tumu(__VA_ARGS__)
7957
#define vluxseg3ei64_v_u8mf2_m(...) __riscv_vluxseg3ei64_v_u8mf2_tumu(__VA_ARGS__)
7958
#define vluxseg4ei64_v_u8mf2_m(...) __riscv_vluxseg4ei64_v_u8mf2_tumu(__VA_ARGS__)
7959
#define vluxseg5ei64_v_u8mf2_m(...) __riscv_vluxseg5ei64_v_u8mf2_tumu(__VA_ARGS__)
7960
#define vluxseg6ei64_v_u8mf2_m(...) __riscv_vluxseg6ei64_v_u8mf2_tumu(__VA_ARGS__)
7961
#define vluxseg7ei64_v_u8mf2_m(...) __riscv_vluxseg7ei64_v_u8mf2_tumu(__VA_ARGS__)
7962
#define vluxseg8ei64_v_u8mf2_m(...) __riscv_vluxseg8ei64_v_u8mf2_tumu(__VA_ARGS__)
7963
#define vluxseg2ei64_v_u8m1_m(...) __riscv_vluxseg2ei64_v_u8m1_tumu(__VA_ARGS__)
7964
#define vluxseg3ei64_v_u8m1_m(...) __riscv_vluxseg3ei64_v_u8m1_tumu(__VA_ARGS__)
7965
#define vluxseg4ei64_v_u8m1_m(...) __riscv_vluxseg4ei64_v_u8m1_tumu(__VA_ARGS__)
7966
#define vluxseg5ei64_v_u8m1_m(...) __riscv_vluxseg5ei64_v_u8m1_tumu(__VA_ARGS__)
7967
#define vluxseg6ei64_v_u8m1_m(...) __riscv_vluxseg6ei64_v_u8m1_tumu(__VA_ARGS__)
7968
#define vluxseg7ei64_v_u8m1_m(...) __riscv_vluxseg7ei64_v_u8m1_tumu(__VA_ARGS__)
7969
#define vluxseg8ei64_v_u8m1_m(...) __riscv_vluxseg8ei64_v_u8m1_tumu(__VA_ARGS__)
7970
#define vluxseg2ei8_v_u16mf4_m(...) __riscv_vluxseg2ei8_v_u16mf4_tumu(__VA_ARGS__)
7971
#define vluxseg3ei8_v_u16mf4_m(...) __riscv_vluxseg3ei8_v_u16mf4_tumu(__VA_ARGS__)
7972
#define vluxseg4ei8_v_u16mf4_m(...) __riscv_vluxseg4ei8_v_u16mf4_tumu(__VA_ARGS__)
7973
#define vluxseg5ei8_v_u16mf4_m(...) __riscv_vluxseg5ei8_v_u16mf4_tumu(__VA_ARGS__)
7974
#define vluxseg6ei8_v_u16mf4_m(...) __riscv_vluxseg6ei8_v_u16mf4_tumu(__VA_ARGS__)
7975
#define vluxseg7ei8_v_u16mf4_m(...) __riscv_vluxseg7ei8_v_u16mf4_tumu(__VA_ARGS__)
7976
#define vluxseg8ei8_v_u16mf4_m(...) __riscv_vluxseg8ei8_v_u16mf4_tumu(__VA_ARGS__)
7977
#define vluxseg2ei8_v_u16mf2_m(...) __riscv_vluxseg2ei8_v_u16mf2_tumu(__VA_ARGS__)
7978
#define vluxseg3ei8_v_u16mf2_m(...) __riscv_vluxseg3ei8_v_u16mf2_tumu(__VA_ARGS__)
7979
#define vluxseg4ei8_v_u16mf2_m(...) __riscv_vluxseg4ei8_v_u16mf2_tumu(__VA_ARGS__)
7980
#define vluxseg5ei8_v_u16mf2_m(...) __riscv_vluxseg5ei8_v_u16mf2_tumu(__VA_ARGS__)
7981
#define vluxseg6ei8_v_u16mf2_m(...) __riscv_vluxseg6ei8_v_u16mf2_tumu(__VA_ARGS__)
7982
#define vluxseg7ei8_v_u16mf2_m(...) __riscv_vluxseg7ei8_v_u16mf2_tumu(__VA_ARGS__)
7983
#define vluxseg8ei8_v_u16mf2_m(...) __riscv_vluxseg8ei8_v_u16mf2_tumu(__VA_ARGS__)
7984
#define vluxseg2ei8_v_u16m1_m(...) __riscv_vluxseg2ei8_v_u16m1_tumu(__VA_ARGS__)
7985
#define vluxseg3ei8_v_u16m1_m(...) __riscv_vluxseg3ei8_v_u16m1_tumu(__VA_ARGS__)
7986
#define vluxseg4ei8_v_u16m1_m(...) __riscv_vluxseg4ei8_v_u16m1_tumu(__VA_ARGS__)
7987
#define vluxseg5ei8_v_u16m1_m(...) __riscv_vluxseg5ei8_v_u16m1_tumu(__VA_ARGS__)
7988
#define vluxseg6ei8_v_u16m1_m(...) __riscv_vluxseg6ei8_v_u16m1_tumu(__VA_ARGS__)
7989
#define vluxseg7ei8_v_u16m1_m(...) __riscv_vluxseg7ei8_v_u16m1_tumu(__VA_ARGS__)
7990
#define vluxseg8ei8_v_u16m1_m(...) __riscv_vluxseg8ei8_v_u16m1_tumu(__VA_ARGS__)
7991
#define vluxseg2ei8_v_u16m2_m(...) __riscv_vluxseg2ei8_v_u16m2_tumu(__VA_ARGS__)
7992
#define vluxseg3ei8_v_u16m2_m(...) __riscv_vluxseg3ei8_v_u16m2_tumu(__VA_ARGS__)
7993
#define vluxseg4ei8_v_u16m2_m(...) __riscv_vluxseg4ei8_v_u16m2_tumu(__VA_ARGS__)
7994
#define vluxseg2ei8_v_u16m4_m(...) __riscv_vluxseg2ei8_v_u16m4_tumu(__VA_ARGS__)
7995
#define vluxseg2ei16_v_u16mf4_m(...) __riscv_vluxseg2ei16_v_u16mf4_tumu(__VA_ARGS__)
7996
#define vluxseg3ei16_v_u16mf4_m(...) __riscv_vluxseg3ei16_v_u16mf4_tumu(__VA_ARGS__)
7997
#define vluxseg4ei16_v_u16mf4_m(...) __riscv_vluxseg4ei16_v_u16mf4_tumu(__VA_ARGS__)
7998
#define vluxseg5ei16_v_u16mf4_m(...) __riscv_vluxseg5ei16_v_u16mf4_tumu(__VA_ARGS__)
7999
#define vluxseg6ei16_v_u16mf4_m(...) __riscv_vluxseg6ei16_v_u16mf4_tumu(__VA_ARGS__)
8000
#define vluxseg7ei16_v_u16mf4_m(...) __riscv_vluxseg7ei16_v_u16mf4_tumu(__VA_ARGS__)
8001
#define vluxseg8ei16_v_u16mf4_m(...) __riscv_vluxseg8ei16_v_u16mf4_tumu(__VA_ARGS__)
8002
#define vluxseg2ei16_v_u16mf2_m(...) __riscv_vluxseg2ei16_v_u16mf2_tumu(__VA_ARGS__)
8003
#define vluxseg3ei16_v_u16mf2_m(...) __riscv_vluxseg3ei16_v_u16mf2_tumu(__VA_ARGS__)
8004
#define vluxseg4ei16_v_u16mf2_m(...) __riscv_vluxseg4ei16_v_u16mf2_tumu(__VA_ARGS__)
8005
#define vluxseg5ei16_v_u16mf2_m(...) __riscv_vluxseg5ei16_v_u16mf2_tumu(__VA_ARGS__)
8006
#define vluxseg6ei16_v_u16mf2_m(...) __riscv_vluxseg6ei16_v_u16mf2_tumu(__VA_ARGS__)
8007
#define vluxseg7ei16_v_u16mf2_m(...) __riscv_vluxseg7ei16_v_u16mf2_tumu(__VA_ARGS__)
8008
#define vluxseg8ei16_v_u16mf2_m(...) __riscv_vluxseg8ei16_v_u16mf2_tumu(__VA_ARGS__)
8009
#define vluxseg2ei16_v_u16m1_m(...) __riscv_vluxseg2ei16_v_u16m1_tumu(__VA_ARGS__)
8010
#define vluxseg3ei16_v_u16m1_m(...) __riscv_vluxseg3ei16_v_u16m1_tumu(__VA_ARGS__)
8011
#define vluxseg4ei16_v_u16m1_m(...) __riscv_vluxseg4ei16_v_u16m1_tumu(__VA_ARGS__)
8012
#define vluxseg5ei16_v_u16m1_m(...) __riscv_vluxseg5ei16_v_u16m1_tumu(__VA_ARGS__)
8013
#define vluxseg6ei16_v_u16m1_m(...) __riscv_vluxseg6ei16_v_u16m1_tumu(__VA_ARGS__)
8014
#define vluxseg7ei16_v_u16m1_m(...) __riscv_vluxseg7ei16_v_u16m1_tumu(__VA_ARGS__)
8015
#define vluxseg8ei16_v_u16m1_m(...) __riscv_vluxseg8ei16_v_u16m1_tumu(__VA_ARGS__)
8016
#define vluxseg2ei16_v_u16m2_m(...) __riscv_vluxseg2ei16_v_u16m2_tumu(__VA_ARGS__)
8017
#define vluxseg3ei16_v_u16m2_m(...) __riscv_vluxseg3ei16_v_u16m2_tumu(__VA_ARGS__)
8018
#define vluxseg4ei16_v_u16m2_m(...) __riscv_vluxseg4ei16_v_u16m2_tumu(__VA_ARGS__)
8019
#define vluxseg2ei16_v_u16m4_m(...) __riscv_vluxseg2ei16_v_u16m4_tumu(__VA_ARGS__)
8020
#define vluxseg2ei32_v_u16mf4_m(...) __riscv_vluxseg2ei32_v_u16mf4_tumu(__VA_ARGS__)
8021
#define vluxseg3ei32_v_u16mf4_m(...) __riscv_vluxseg3ei32_v_u16mf4_tumu(__VA_ARGS__)
8022
#define vluxseg4ei32_v_u16mf4_m(...) __riscv_vluxseg4ei32_v_u16mf4_tumu(__VA_ARGS__)
8023
#define vluxseg5ei32_v_u16mf4_m(...) __riscv_vluxseg5ei32_v_u16mf4_tumu(__VA_ARGS__)
8024
#define vluxseg6ei32_v_u16mf4_m(...) __riscv_vluxseg6ei32_v_u16mf4_tumu(__VA_ARGS__)
8025
#define vluxseg7ei32_v_u16mf4_m(...) __riscv_vluxseg7ei32_v_u16mf4_tumu(__VA_ARGS__)
8026
#define vluxseg8ei32_v_u16mf4_m(...) __riscv_vluxseg8ei32_v_u16mf4_tumu(__VA_ARGS__)
8027
#define vluxseg2ei32_v_u16mf2_m(...) __riscv_vluxseg2ei32_v_u16mf2_tumu(__VA_ARGS__)
8028
#define vluxseg3ei32_v_u16mf2_m(...) __riscv_vluxseg3ei32_v_u16mf2_tumu(__VA_ARGS__)
8029
#define vluxseg4ei32_v_u16mf2_m(...) __riscv_vluxseg4ei32_v_u16mf2_tumu(__VA_ARGS__)
8030
#define vluxseg5ei32_v_u16mf2_m(...) __riscv_vluxseg5ei32_v_u16mf2_tumu(__VA_ARGS__)
8031
#define vluxseg6ei32_v_u16mf2_m(...) __riscv_vluxseg6ei32_v_u16mf2_tumu(__VA_ARGS__)
8032
#define vluxseg7ei32_v_u16mf2_m(...) __riscv_vluxseg7ei32_v_u16mf2_tumu(__VA_ARGS__)
8033
#define vluxseg8ei32_v_u16mf2_m(...) __riscv_vluxseg8ei32_v_u16mf2_tumu(__VA_ARGS__)
8034
#define vluxseg2ei32_v_u16m1_m(...) __riscv_vluxseg2ei32_v_u16m1_tumu(__VA_ARGS__)
8035
#define vluxseg3ei32_v_u16m1_m(...) __riscv_vluxseg3ei32_v_u16m1_tumu(__VA_ARGS__)
8036
#define vluxseg4ei32_v_u16m1_m(...) __riscv_vluxseg4ei32_v_u16m1_tumu(__VA_ARGS__)
8037
#define vluxseg5ei32_v_u16m1_m(...) __riscv_vluxseg5ei32_v_u16m1_tumu(__VA_ARGS__)
8038
#define vluxseg6ei32_v_u16m1_m(...) __riscv_vluxseg6ei32_v_u16m1_tumu(__VA_ARGS__)
8039
#define vluxseg7ei32_v_u16m1_m(...) __riscv_vluxseg7ei32_v_u16m1_tumu(__VA_ARGS__)
8040
#define vluxseg8ei32_v_u16m1_m(...) __riscv_vluxseg8ei32_v_u16m1_tumu(__VA_ARGS__)
8041
#define vluxseg2ei32_v_u16m2_m(...) __riscv_vluxseg2ei32_v_u16m2_tumu(__VA_ARGS__)
8042
#define vluxseg3ei32_v_u16m2_m(...) __riscv_vluxseg3ei32_v_u16m2_tumu(__VA_ARGS__)
8043
#define vluxseg4ei32_v_u16m2_m(...) __riscv_vluxseg4ei32_v_u16m2_tumu(__VA_ARGS__)
8044
#define vluxseg2ei32_v_u16m4_m(...) __riscv_vluxseg2ei32_v_u16m4_tumu(__VA_ARGS__)
8045
#define vluxseg2ei64_v_u16mf4_m(...) __riscv_vluxseg2ei64_v_u16mf4_tumu(__VA_ARGS__)
8046
#define vluxseg3ei64_v_u16mf4_m(...) __riscv_vluxseg3ei64_v_u16mf4_tumu(__VA_ARGS__)
8047
#define vluxseg4ei64_v_u16mf4_m(...) __riscv_vluxseg4ei64_v_u16mf4_tumu(__VA_ARGS__)
8048
#define vluxseg5ei64_v_u16mf4_m(...) __riscv_vluxseg5ei64_v_u16mf4_tumu(__VA_ARGS__)
8049
#define vluxseg6ei64_v_u16mf4_m(...) __riscv_vluxseg6ei64_v_u16mf4_tumu(__VA_ARGS__)
8050
#define vluxseg7ei64_v_u16mf4_m(...) __riscv_vluxseg7ei64_v_u16mf4_tumu(__VA_ARGS__)
8051
#define vluxseg8ei64_v_u16mf4_m(...) __riscv_vluxseg8ei64_v_u16mf4_tumu(__VA_ARGS__)
8052
#define vluxseg2ei64_v_u16mf2_m(...) __riscv_vluxseg2ei64_v_u16mf2_tumu(__VA_ARGS__)
8053
#define vluxseg3ei64_v_u16mf2_m(...) __riscv_vluxseg3ei64_v_u16mf2_tumu(__VA_ARGS__)
8054
#define vluxseg4ei64_v_u16mf2_m(...) __riscv_vluxseg4ei64_v_u16mf2_tumu(__VA_ARGS__)
8055
#define vluxseg5ei64_v_u16mf2_m(...) __riscv_vluxseg5ei64_v_u16mf2_tumu(__VA_ARGS__)
8056
#define vluxseg6ei64_v_u16mf2_m(...) __riscv_vluxseg6ei64_v_u16mf2_tumu(__VA_ARGS__)
8057
#define vluxseg7ei64_v_u16mf2_m(...) __riscv_vluxseg7ei64_v_u16mf2_tumu(__VA_ARGS__)
8058
#define vluxseg8ei64_v_u16mf2_m(...) __riscv_vluxseg8ei64_v_u16mf2_tumu(__VA_ARGS__)
8059
#define vluxseg2ei64_v_u16m1_m(...) __riscv_vluxseg2ei64_v_u16m1_tumu(__VA_ARGS__)
8060
#define vluxseg3ei64_v_u16m1_m(...) __riscv_vluxseg3ei64_v_u16m1_tumu(__VA_ARGS__)
8061
#define vluxseg4ei64_v_u16m1_m(...) __riscv_vluxseg4ei64_v_u16m1_tumu(__VA_ARGS__)
8062
#define vluxseg5ei64_v_u16m1_m(...) __riscv_vluxseg5ei64_v_u16m1_tumu(__VA_ARGS__)
8063
#define vluxseg6ei64_v_u16m1_m(...) __riscv_vluxseg6ei64_v_u16m1_tumu(__VA_ARGS__)
8064
#define vluxseg7ei64_v_u16m1_m(...) __riscv_vluxseg7ei64_v_u16m1_tumu(__VA_ARGS__)
8065
#define vluxseg8ei64_v_u16m1_m(...) __riscv_vluxseg8ei64_v_u16m1_tumu(__VA_ARGS__)
8066
#define vluxseg2ei64_v_u16m2_m(...) __riscv_vluxseg2ei64_v_u16m2_tumu(__VA_ARGS__)
8067
#define vluxseg3ei64_v_u16m2_m(...) __riscv_vluxseg3ei64_v_u16m2_tumu(__VA_ARGS__)
8068
#define vluxseg4ei64_v_u16m2_m(...) __riscv_vluxseg4ei64_v_u16m2_tumu(__VA_ARGS__)
8069
#define vluxseg2ei8_v_u32mf2_m(...) __riscv_vluxseg2ei8_v_u32mf2_tumu(__VA_ARGS__)
8070
#define vluxseg3ei8_v_u32mf2_m(...) __riscv_vluxseg3ei8_v_u32mf2_tumu(__VA_ARGS__)
8071
#define vluxseg4ei8_v_u32mf2_m(...) __riscv_vluxseg4ei8_v_u32mf2_tumu(__VA_ARGS__)
8072
#define vluxseg5ei8_v_u32mf2_m(...) __riscv_vluxseg5ei8_v_u32mf2_tumu(__VA_ARGS__)
8073
#define vluxseg6ei8_v_u32mf2_m(...) __riscv_vluxseg6ei8_v_u32mf2_tumu(__VA_ARGS__)
8074
#define vluxseg7ei8_v_u32mf2_m(...) __riscv_vluxseg7ei8_v_u32mf2_tumu(__VA_ARGS__)
8075
#define vluxseg8ei8_v_u32mf2_m(...) __riscv_vluxseg8ei8_v_u32mf2_tumu(__VA_ARGS__)
8076
#define vluxseg2ei8_v_u32m1_m(...) __riscv_vluxseg2ei8_v_u32m1_tumu(__VA_ARGS__)
8077
#define vluxseg3ei8_v_u32m1_m(...) __riscv_vluxseg3ei8_v_u32m1_tumu(__VA_ARGS__)
8078
#define vluxseg4ei8_v_u32m1_m(...) __riscv_vluxseg4ei8_v_u32m1_tumu(__VA_ARGS__)
8079
#define vluxseg5ei8_v_u32m1_m(...) __riscv_vluxseg5ei8_v_u32m1_tumu(__VA_ARGS__)
8080
#define vluxseg6ei8_v_u32m1_m(...) __riscv_vluxseg6ei8_v_u32m1_tumu(__VA_ARGS__)
8081
#define vluxseg7ei8_v_u32m1_m(...) __riscv_vluxseg7ei8_v_u32m1_tumu(__VA_ARGS__)
8082
#define vluxseg8ei8_v_u32m1_m(...) __riscv_vluxseg8ei8_v_u32m1_tumu(__VA_ARGS__)
8083
#define vluxseg2ei8_v_u32m2_m(...) __riscv_vluxseg2ei8_v_u32m2_tumu(__VA_ARGS__)
8084
#define vluxseg3ei8_v_u32m2_m(...) __riscv_vluxseg3ei8_v_u32m2_tumu(__VA_ARGS__)
8085
#define vluxseg4ei8_v_u32m2_m(...) __riscv_vluxseg4ei8_v_u32m2_tumu(__VA_ARGS__)
8086
#define vluxseg2ei8_v_u32m4_m(...) __riscv_vluxseg2ei8_v_u32m4_tumu(__VA_ARGS__)
8087
#define vluxseg2ei16_v_u32mf2_m(...) __riscv_vluxseg2ei16_v_u32mf2_tumu(__VA_ARGS__)
8088
#define vluxseg3ei16_v_u32mf2_m(...) __riscv_vluxseg3ei16_v_u32mf2_tumu(__VA_ARGS__)
8089
#define vluxseg4ei16_v_u32mf2_m(...) __riscv_vluxseg4ei16_v_u32mf2_tumu(__VA_ARGS__)
8090
#define vluxseg5ei16_v_u32mf2_m(...) __riscv_vluxseg5ei16_v_u32mf2_tumu(__VA_ARGS__)
8091
#define vluxseg6ei16_v_u32mf2_m(...) __riscv_vluxseg6ei16_v_u32mf2_tumu(__VA_ARGS__)
8092
#define vluxseg7ei16_v_u32mf2_m(...) __riscv_vluxseg7ei16_v_u32mf2_tumu(__VA_ARGS__)
8093
#define vluxseg8ei16_v_u32mf2_m(...) __riscv_vluxseg8ei16_v_u32mf2_tumu(__VA_ARGS__)
8094
#define vluxseg2ei16_v_u32m1_m(...) __riscv_vluxseg2ei16_v_u32m1_tumu(__VA_ARGS__)
8095
#define vluxseg3ei16_v_u32m1_m(...) __riscv_vluxseg3ei16_v_u32m1_tumu(__VA_ARGS__)
8096
#define vluxseg4ei16_v_u32m1_m(...) __riscv_vluxseg4ei16_v_u32m1_tumu(__VA_ARGS__)
8097
#define vluxseg5ei16_v_u32m1_m(...) __riscv_vluxseg5ei16_v_u32m1_tumu(__VA_ARGS__)
8098
#define vluxseg6ei16_v_u32m1_m(...) __riscv_vluxseg6ei16_v_u32m1_tumu(__VA_ARGS__)
8099
#define vluxseg7ei16_v_u32m1_m(...) __riscv_vluxseg7ei16_v_u32m1_tumu(__VA_ARGS__)
8100
#define vluxseg8ei16_v_u32m1_m(...) __riscv_vluxseg8ei16_v_u32m1_tumu(__VA_ARGS__)
8101
#define vluxseg2ei16_v_u32m2_m(...) __riscv_vluxseg2ei16_v_u32m2_tumu(__VA_ARGS__)
8102
#define vluxseg3ei16_v_u32m2_m(...) __riscv_vluxseg3ei16_v_u32m2_tumu(__VA_ARGS__)
8103
#define vluxseg4ei16_v_u32m2_m(...) __riscv_vluxseg4ei16_v_u32m2_tumu(__VA_ARGS__)
8104
#define vluxseg2ei16_v_u32m4_m(...) __riscv_vluxseg2ei16_v_u32m4_tumu(__VA_ARGS__)
8105
#define vluxseg2ei32_v_u32mf2_m(...) __riscv_vluxseg2ei32_v_u32mf2_tumu(__VA_ARGS__)
8106
#define vluxseg3ei32_v_u32mf2_m(...) __riscv_vluxseg3ei32_v_u32mf2_tumu(__VA_ARGS__)
8107
#define vluxseg4ei32_v_u32mf2_m(...) __riscv_vluxseg4ei32_v_u32mf2_tumu(__VA_ARGS__)
8108
#define vluxseg5ei32_v_u32mf2_m(...) __riscv_vluxseg5ei32_v_u32mf2_tumu(__VA_ARGS__)
8109
#define vluxseg6ei32_v_u32mf2_m(...) __riscv_vluxseg6ei32_v_u32mf2_tumu(__VA_ARGS__)
8110
#define vluxseg7ei32_v_u32mf2_m(...) __riscv_vluxseg7ei32_v_u32mf2_tumu(__VA_ARGS__)
8111
#define vluxseg8ei32_v_u32mf2_m(...) __riscv_vluxseg8ei32_v_u32mf2_tumu(__VA_ARGS__)
8112
#define vluxseg2ei32_v_u32m1_m(...) __riscv_vluxseg2ei32_v_u32m1_tumu(__VA_ARGS__)
8113
#define vluxseg3ei32_v_u32m1_m(...) __riscv_vluxseg3ei32_v_u32m1_tumu(__VA_ARGS__)
8114
#define vluxseg4ei32_v_u32m1_m(...) __riscv_vluxseg4ei32_v_u32m1_tumu(__VA_ARGS__)
8115
#define vluxseg5ei32_v_u32m1_m(...) __riscv_vluxseg5ei32_v_u32m1_tumu(__VA_ARGS__)
8116
#define vluxseg6ei32_v_u32m1_m(...) __riscv_vluxseg6ei32_v_u32m1_tumu(__VA_ARGS__)
8117
#define vluxseg7ei32_v_u32m1_m(...) __riscv_vluxseg7ei32_v_u32m1_tumu(__VA_ARGS__)
8118
#define vluxseg8ei32_v_u32m1_m(...) __riscv_vluxseg8ei32_v_u32m1_tumu(__VA_ARGS__)
8119
#define vluxseg2ei32_v_u32m2_m(...) __riscv_vluxseg2ei32_v_u32m2_tumu(__VA_ARGS__)
8120
#define vluxseg3ei32_v_u32m2_m(...) __riscv_vluxseg3ei32_v_u32m2_tumu(__VA_ARGS__)
8121
#define vluxseg4ei32_v_u32m2_m(...) __riscv_vluxseg4ei32_v_u32m2_tumu(__VA_ARGS__)
8122
#define vluxseg2ei32_v_u32m4_m(...) __riscv_vluxseg2ei32_v_u32m4_tumu(__VA_ARGS__)
8123
#define vluxseg2ei64_v_u32mf2_m(...) __riscv_vluxseg2ei64_v_u32mf2_tumu(__VA_ARGS__)
8124
#define vluxseg3ei64_v_u32mf2_m(...) __riscv_vluxseg3ei64_v_u32mf2_tumu(__VA_ARGS__)
8125
#define vluxseg4ei64_v_u32mf2_m(...) __riscv_vluxseg4ei64_v_u32mf2_tumu(__VA_ARGS__)
8126
#define vluxseg5ei64_v_u32mf2_m(...) __riscv_vluxseg5ei64_v_u32mf2_tumu(__VA_ARGS__)
8127
#define vluxseg6ei64_v_u32mf2_m(...) __riscv_vluxseg6ei64_v_u32mf2_tumu(__VA_ARGS__)
8128
#define vluxseg7ei64_v_u32mf2_m(...) __riscv_vluxseg7ei64_v_u32mf2_tumu(__VA_ARGS__)
8129
#define vluxseg8ei64_v_u32mf2_m(...) __riscv_vluxseg8ei64_v_u32mf2_tumu(__VA_ARGS__)
8130
#define vluxseg2ei64_v_u32m1_m(...) __riscv_vluxseg2ei64_v_u32m1_tumu(__VA_ARGS__)
8131
#define vluxseg3ei64_v_u32m1_m(...) __riscv_vluxseg3ei64_v_u32m1_tumu(__VA_ARGS__)
8132
#define vluxseg4ei64_v_u32m1_m(...) __riscv_vluxseg4ei64_v_u32m1_tumu(__VA_ARGS__)
8133
#define vluxseg5ei64_v_u32m1_m(...) __riscv_vluxseg5ei64_v_u32m1_tumu(__VA_ARGS__)
8134
#define vluxseg6ei64_v_u32m1_m(...) __riscv_vluxseg6ei64_v_u32m1_tumu(__VA_ARGS__)
8135
#define vluxseg7ei64_v_u32m1_m(...) __riscv_vluxseg7ei64_v_u32m1_tumu(__VA_ARGS__)
8136
#define vluxseg8ei64_v_u32m1_m(...) __riscv_vluxseg8ei64_v_u32m1_tumu(__VA_ARGS__)
8137
#define vluxseg2ei64_v_u32m2_m(...) __riscv_vluxseg2ei64_v_u32m2_tumu(__VA_ARGS__)
8138
#define vluxseg3ei64_v_u32m2_m(...) __riscv_vluxseg3ei64_v_u32m2_tumu(__VA_ARGS__)
8139
#define vluxseg4ei64_v_u32m2_m(...) __riscv_vluxseg4ei64_v_u32m2_tumu(__VA_ARGS__)
8140
#define vluxseg2ei64_v_u32m4_m(...) __riscv_vluxseg2ei64_v_u32m4_tumu(__VA_ARGS__)
8141
#define vluxseg2ei8_v_u64m1_m(...) __riscv_vluxseg2ei8_v_u64m1_tumu(__VA_ARGS__)
8142
#define vluxseg3ei8_v_u64m1_m(...) __riscv_vluxseg3ei8_v_u64m1_tumu(__VA_ARGS__)
8143
#define vluxseg4ei8_v_u64m1_m(...) __riscv_vluxseg4ei8_v_u64m1_tumu(__VA_ARGS__)
8144
#define vluxseg5ei8_v_u64m1_m(...) __riscv_vluxseg5ei8_v_u64m1_tumu(__VA_ARGS__)
8145
#define vluxseg6ei8_v_u64m1_m(...) __riscv_vluxseg6ei8_v_u64m1_tumu(__VA_ARGS__)
8146
#define vluxseg7ei8_v_u64m1_m(...) __riscv_vluxseg7ei8_v_u64m1_tumu(__VA_ARGS__)
8147
#define vluxseg8ei8_v_u64m1_m(...) __riscv_vluxseg8ei8_v_u64m1_tumu(__VA_ARGS__)
8148
#define vluxseg2ei8_v_u64m2_m(...) __riscv_vluxseg2ei8_v_u64m2_tumu(__VA_ARGS__)
8149
#define vluxseg3ei8_v_u64m2_m(...) __riscv_vluxseg3ei8_v_u64m2_tumu(__VA_ARGS__)
8150
#define vluxseg4ei8_v_u64m2_m(...) __riscv_vluxseg4ei8_v_u64m2_tumu(__VA_ARGS__)
8151
#define vluxseg2ei8_v_u64m4_m(...) __riscv_vluxseg2ei8_v_u64m4_tumu(__VA_ARGS__)
8152
#define vluxseg2ei16_v_u64m1_m(...) __riscv_vluxseg2ei16_v_u64m1_tumu(__VA_ARGS__)
8153
#define vluxseg3ei16_v_u64m1_m(...) __riscv_vluxseg3ei16_v_u64m1_tumu(__VA_ARGS__)
8154
#define vluxseg4ei16_v_u64m1_m(...) __riscv_vluxseg4ei16_v_u64m1_tumu(__VA_ARGS__)
8155
#define vluxseg5ei16_v_u64m1_m(...) __riscv_vluxseg5ei16_v_u64m1_tumu(__VA_ARGS__)
8156
#define vluxseg6ei16_v_u64m1_m(...) __riscv_vluxseg6ei16_v_u64m1_tumu(__VA_ARGS__)
8157
#define vluxseg7ei16_v_u64m1_m(...) __riscv_vluxseg7ei16_v_u64m1_tumu(__VA_ARGS__)
8158
#define vluxseg8ei16_v_u64m1_m(...) __riscv_vluxseg8ei16_v_u64m1_tumu(__VA_ARGS__)
8159
#define vluxseg2ei16_v_u64m2_m(...) __riscv_vluxseg2ei16_v_u64m2_tumu(__VA_ARGS__)
8160
#define vluxseg3ei16_v_u64m2_m(...) __riscv_vluxseg3ei16_v_u64m2_tumu(__VA_ARGS__)
8161
#define vluxseg4ei16_v_u64m2_m(...) __riscv_vluxseg4ei16_v_u64m2_tumu(__VA_ARGS__)
8162
#define vluxseg2ei16_v_u64m4_m(...) __riscv_vluxseg2ei16_v_u64m4_tumu(__VA_ARGS__)
8163
#define vluxseg2ei32_v_u64m1_m(...) __riscv_vluxseg2ei32_v_u64m1_tumu(__VA_ARGS__)
8164
#define vluxseg3ei32_v_u64m1_m(...) __riscv_vluxseg3ei32_v_u64m1_tumu(__VA_ARGS__)
8165
#define vluxseg4ei32_v_u64m1_m(...) __riscv_vluxseg4ei32_v_u64m1_tumu(__VA_ARGS__)
8166
#define vluxseg5ei32_v_u64m1_m(...) __riscv_vluxseg5ei32_v_u64m1_tumu(__VA_ARGS__)
8167
#define vluxseg6ei32_v_u64m1_m(...) __riscv_vluxseg6ei32_v_u64m1_tumu(__VA_ARGS__)
8168
#define vluxseg7ei32_v_u64m1_m(...) __riscv_vluxseg7ei32_v_u64m1_tumu(__VA_ARGS__)
8169
#define vluxseg8ei32_v_u64m1_m(...) __riscv_vluxseg8ei32_v_u64m1_tumu(__VA_ARGS__)
8170
#define vluxseg2ei32_v_u64m2_m(...) __riscv_vluxseg2ei32_v_u64m2_tumu(__VA_ARGS__)
8171
#define vluxseg3ei32_v_u64m2_m(...) __riscv_vluxseg3ei32_v_u64m2_tumu(__VA_ARGS__)
8172
#define vluxseg4ei32_v_u64m2_m(...) __riscv_vluxseg4ei32_v_u64m2_tumu(__VA_ARGS__)
8173
#define vluxseg2ei32_v_u64m4_m(...) __riscv_vluxseg2ei32_v_u64m4_tumu(__VA_ARGS__)
8174
#define vluxseg2ei64_v_u64m1_m(...) __riscv_vluxseg2ei64_v_u64m1_tumu(__VA_ARGS__)
8175
#define vluxseg3ei64_v_u64m1_m(...) __riscv_vluxseg3ei64_v_u64m1_tumu(__VA_ARGS__)
8176
#define vluxseg4ei64_v_u64m1_m(...) __riscv_vluxseg4ei64_v_u64m1_tumu(__VA_ARGS__)
8177
#define vluxseg5ei64_v_u64m1_m(...) __riscv_vluxseg5ei64_v_u64m1_tumu(__VA_ARGS__)
8178
#define vluxseg6ei64_v_u64m1_m(...) __riscv_vluxseg6ei64_v_u64m1_tumu(__VA_ARGS__)
8179
#define vluxseg7ei64_v_u64m1_m(...) __riscv_vluxseg7ei64_v_u64m1_tumu(__VA_ARGS__)
8180
#define vluxseg8ei64_v_u64m1_m(...) __riscv_vluxseg8ei64_v_u64m1_tumu(__VA_ARGS__)
8181
#define vluxseg2ei64_v_u64m2_m(...) __riscv_vluxseg2ei64_v_u64m2_tumu(__VA_ARGS__)
8182
#define vluxseg3ei64_v_u64m2_m(...) __riscv_vluxseg3ei64_v_u64m2_tumu(__VA_ARGS__)
8183
#define vluxseg4ei64_v_u64m2_m(...) __riscv_vluxseg4ei64_v_u64m2_tumu(__VA_ARGS__)
8184
#define vluxseg2ei64_v_u64m4_m(...) __riscv_vluxseg2ei64_v_u64m4_tumu(__VA_ARGS__)
8185
#define vsoxseg2ei8_v_f16mf4(...) __riscv_vsoxseg2ei8_v_f16mf4(__VA_ARGS__)
8186
#define vsoxseg3ei8_v_f16mf4(...) __riscv_vsoxseg3ei8_v_f16mf4(__VA_ARGS__)
8187
#define vsoxseg4ei8_v_f16mf4(...) __riscv_vsoxseg4ei8_v_f16mf4(__VA_ARGS__)
8188
#define vsoxseg5ei8_v_f16mf4(...) __riscv_vsoxseg5ei8_v_f16mf4(__VA_ARGS__)
8189
#define vsoxseg6ei8_v_f16mf4(...) __riscv_vsoxseg6ei8_v_f16mf4(__VA_ARGS__)
8190
#define vsoxseg7ei8_v_f16mf4(...) __riscv_vsoxseg7ei8_v_f16mf4(__VA_ARGS__)
8191
#define vsoxseg8ei8_v_f16mf4(...) __riscv_vsoxseg8ei8_v_f16mf4(__VA_ARGS__)
8192
#define vsoxseg2ei8_v_f16mf2(...) __riscv_vsoxseg2ei8_v_f16mf2(__VA_ARGS__)
8193
#define vsoxseg3ei8_v_f16mf2(...) __riscv_vsoxseg3ei8_v_f16mf2(__VA_ARGS__)
8194
#define vsoxseg4ei8_v_f16mf2(...) __riscv_vsoxseg4ei8_v_f16mf2(__VA_ARGS__)
8195
#define vsoxseg5ei8_v_f16mf2(...) __riscv_vsoxseg5ei8_v_f16mf2(__VA_ARGS__)
8196
#define vsoxseg6ei8_v_f16mf2(...) __riscv_vsoxseg6ei8_v_f16mf2(__VA_ARGS__)
8197
#define vsoxseg7ei8_v_f16mf2(...) __riscv_vsoxseg7ei8_v_f16mf2(__VA_ARGS__)
8198
#define vsoxseg8ei8_v_f16mf2(...) __riscv_vsoxseg8ei8_v_f16mf2(__VA_ARGS__)
8199
#define vsoxseg2ei8_v_f16m1(...) __riscv_vsoxseg2ei8_v_f16m1(__VA_ARGS__)
8200
#define vsoxseg3ei8_v_f16m1(...) __riscv_vsoxseg3ei8_v_f16m1(__VA_ARGS__)
8201
#define vsoxseg4ei8_v_f16m1(...) __riscv_vsoxseg4ei8_v_f16m1(__VA_ARGS__)
8202
#define vsoxseg5ei8_v_f16m1(...) __riscv_vsoxseg5ei8_v_f16m1(__VA_ARGS__)
8203
#define vsoxseg6ei8_v_f16m1(...) __riscv_vsoxseg6ei8_v_f16m1(__VA_ARGS__)
8204
#define vsoxseg7ei8_v_f16m1(...) __riscv_vsoxseg7ei8_v_f16m1(__VA_ARGS__)
8205
#define vsoxseg8ei8_v_f16m1(...) __riscv_vsoxseg8ei8_v_f16m1(__VA_ARGS__)
8206
#define vsoxseg2ei8_v_f16m2(...) __riscv_vsoxseg2ei8_v_f16m2(__VA_ARGS__)
8207
#define vsoxseg3ei8_v_f16m2(...) __riscv_vsoxseg3ei8_v_f16m2(__VA_ARGS__)
8208
#define vsoxseg4ei8_v_f16m2(...) __riscv_vsoxseg4ei8_v_f16m2(__VA_ARGS__)
8209
#define vsoxseg2ei8_v_f16m4(...) __riscv_vsoxseg2ei8_v_f16m4(__VA_ARGS__)
8210
#define vsoxseg2ei16_v_f16mf4(...) __riscv_vsoxseg2ei16_v_f16mf4(__VA_ARGS__)
8211
#define vsoxseg3ei16_v_f16mf4(...) __riscv_vsoxseg3ei16_v_f16mf4(__VA_ARGS__)
8212
#define vsoxseg4ei16_v_f16mf4(...) __riscv_vsoxseg4ei16_v_f16mf4(__VA_ARGS__)
8213
#define vsoxseg5ei16_v_f16mf4(...) __riscv_vsoxseg5ei16_v_f16mf4(__VA_ARGS__)
8214
#define vsoxseg6ei16_v_f16mf4(...) __riscv_vsoxseg6ei16_v_f16mf4(__VA_ARGS__)
8215
#define vsoxseg7ei16_v_f16mf4(...) __riscv_vsoxseg7ei16_v_f16mf4(__VA_ARGS__)
8216
#define vsoxseg8ei16_v_f16mf4(...) __riscv_vsoxseg8ei16_v_f16mf4(__VA_ARGS__)
8217
#define vsoxseg2ei16_v_f16mf2(...) __riscv_vsoxseg2ei16_v_f16mf2(__VA_ARGS__)
8218
#define vsoxseg3ei16_v_f16mf2(...) __riscv_vsoxseg3ei16_v_f16mf2(__VA_ARGS__)
8219
#define vsoxseg4ei16_v_f16mf2(...) __riscv_vsoxseg4ei16_v_f16mf2(__VA_ARGS__)
8220
#define vsoxseg5ei16_v_f16mf2(...) __riscv_vsoxseg5ei16_v_f16mf2(__VA_ARGS__)
8221
#define vsoxseg6ei16_v_f16mf2(...) __riscv_vsoxseg6ei16_v_f16mf2(__VA_ARGS__)
8222
#define vsoxseg7ei16_v_f16mf2(...) __riscv_vsoxseg7ei16_v_f16mf2(__VA_ARGS__)
8223
#define vsoxseg8ei16_v_f16mf2(...) __riscv_vsoxseg8ei16_v_f16mf2(__VA_ARGS__)
8224
#define vsoxseg2ei16_v_f16m1(...) __riscv_vsoxseg2ei16_v_f16m1(__VA_ARGS__)
8225
#define vsoxseg3ei16_v_f16m1(...) __riscv_vsoxseg3ei16_v_f16m1(__VA_ARGS__)
8226
#define vsoxseg4ei16_v_f16m1(...) __riscv_vsoxseg4ei16_v_f16m1(__VA_ARGS__)
8227
#define vsoxseg5ei16_v_f16m1(...) __riscv_vsoxseg5ei16_v_f16m1(__VA_ARGS__)
8228
#define vsoxseg6ei16_v_f16m1(...) __riscv_vsoxseg6ei16_v_f16m1(__VA_ARGS__)
8229
#define vsoxseg7ei16_v_f16m1(...) __riscv_vsoxseg7ei16_v_f16m1(__VA_ARGS__)
8230
#define vsoxseg8ei16_v_f16m1(...) __riscv_vsoxseg8ei16_v_f16m1(__VA_ARGS__)
8231
#define vsoxseg2ei16_v_f16m2(...) __riscv_vsoxseg2ei16_v_f16m2(__VA_ARGS__)
8232
#define vsoxseg3ei16_v_f16m2(...) __riscv_vsoxseg3ei16_v_f16m2(__VA_ARGS__)
8233
#define vsoxseg4ei16_v_f16m2(...) __riscv_vsoxseg4ei16_v_f16m2(__VA_ARGS__)
8234
#define vsoxseg2ei16_v_f16m4(...) __riscv_vsoxseg2ei16_v_f16m4(__VA_ARGS__)
8235
#define vsoxseg2ei32_v_f16mf4(...) __riscv_vsoxseg2ei32_v_f16mf4(__VA_ARGS__)
8236
#define vsoxseg3ei32_v_f16mf4(...) __riscv_vsoxseg3ei32_v_f16mf4(__VA_ARGS__)
8237
#define vsoxseg4ei32_v_f16mf4(...) __riscv_vsoxseg4ei32_v_f16mf4(__VA_ARGS__)
8238
#define vsoxseg5ei32_v_f16mf4(...) __riscv_vsoxseg5ei32_v_f16mf4(__VA_ARGS__)
8239
#define vsoxseg6ei32_v_f16mf4(...) __riscv_vsoxseg6ei32_v_f16mf4(__VA_ARGS__)
8240
#define vsoxseg7ei32_v_f16mf4(...) __riscv_vsoxseg7ei32_v_f16mf4(__VA_ARGS__)
8241
#define vsoxseg8ei32_v_f16mf4(...) __riscv_vsoxseg8ei32_v_f16mf4(__VA_ARGS__)
8242
#define vsoxseg2ei32_v_f16mf2(...) __riscv_vsoxseg2ei32_v_f16mf2(__VA_ARGS__)
8243
#define vsoxseg3ei32_v_f16mf2(...) __riscv_vsoxseg3ei32_v_f16mf2(__VA_ARGS__)
8244
#define vsoxseg4ei32_v_f16mf2(...) __riscv_vsoxseg4ei32_v_f16mf2(__VA_ARGS__)
8245
#define vsoxseg5ei32_v_f16mf2(...) __riscv_vsoxseg5ei32_v_f16mf2(__VA_ARGS__)
8246
#define vsoxseg6ei32_v_f16mf2(...) __riscv_vsoxseg6ei32_v_f16mf2(__VA_ARGS__)
8247
#define vsoxseg7ei32_v_f16mf2(...) __riscv_vsoxseg7ei32_v_f16mf2(__VA_ARGS__)
8248
#define vsoxseg8ei32_v_f16mf2(...) __riscv_vsoxseg8ei32_v_f16mf2(__VA_ARGS__)
8249
#define vsoxseg2ei32_v_f16m1(...) __riscv_vsoxseg2ei32_v_f16m1(__VA_ARGS__)
8250
#define vsoxseg3ei32_v_f16m1(...) __riscv_vsoxseg3ei32_v_f16m1(__VA_ARGS__)
8251
#define vsoxseg4ei32_v_f16m1(...) __riscv_vsoxseg4ei32_v_f16m1(__VA_ARGS__)
8252
#define vsoxseg5ei32_v_f16m1(...) __riscv_vsoxseg5ei32_v_f16m1(__VA_ARGS__)
8253
#define vsoxseg6ei32_v_f16m1(...) __riscv_vsoxseg6ei32_v_f16m1(__VA_ARGS__)
8254
#define vsoxseg7ei32_v_f16m1(...) __riscv_vsoxseg7ei32_v_f16m1(__VA_ARGS__)
8255
#define vsoxseg8ei32_v_f16m1(...) __riscv_vsoxseg8ei32_v_f16m1(__VA_ARGS__)
8256
#define vsoxseg2ei32_v_f16m2(...) __riscv_vsoxseg2ei32_v_f16m2(__VA_ARGS__)
8257
#define vsoxseg3ei32_v_f16m2(...) __riscv_vsoxseg3ei32_v_f16m2(__VA_ARGS__)
8258
#define vsoxseg4ei32_v_f16m2(...) __riscv_vsoxseg4ei32_v_f16m2(__VA_ARGS__)
8259
#define vsoxseg2ei32_v_f16m4(...) __riscv_vsoxseg2ei32_v_f16m4(__VA_ARGS__)
8260
#define vsoxseg2ei64_v_f16mf4(...) __riscv_vsoxseg2ei64_v_f16mf4(__VA_ARGS__)
8261
#define vsoxseg3ei64_v_f16mf4(...) __riscv_vsoxseg3ei64_v_f16mf4(__VA_ARGS__)
8262
#define vsoxseg4ei64_v_f16mf4(...) __riscv_vsoxseg4ei64_v_f16mf4(__VA_ARGS__)
8263
#define vsoxseg5ei64_v_f16mf4(...) __riscv_vsoxseg5ei64_v_f16mf4(__VA_ARGS__)
8264
#define vsoxseg6ei64_v_f16mf4(...) __riscv_vsoxseg6ei64_v_f16mf4(__VA_ARGS__)
8265
#define vsoxseg7ei64_v_f16mf4(...) __riscv_vsoxseg7ei64_v_f16mf4(__VA_ARGS__)
8266
#define vsoxseg8ei64_v_f16mf4(...) __riscv_vsoxseg8ei64_v_f16mf4(__VA_ARGS__)
8267
#define vsoxseg2ei64_v_f16mf2(...) __riscv_vsoxseg2ei64_v_f16mf2(__VA_ARGS__)
8268
#define vsoxseg3ei64_v_f16mf2(...) __riscv_vsoxseg3ei64_v_f16mf2(__VA_ARGS__)
8269
#define vsoxseg4ei64_v_f16mf2(...) __riscv_vsoxseg4ei64_v_f16mf2(__VA_ARGS__)
8270
#define vsoxseg5ei64_v_f16mf2(...) __riscv_vsoxseg5ei64_v_f16mf2(__VA_ARGS__)
8271
#define vsoxseg6ei64_v_f16mf2(...) __riscv_vsoxseg6ei64_v_f16mf2(__VA_ARGS__)
8272
#define vsoxseg7ei64_v_f16mf2(...) __riscv_vsoxseg7ei64_v_f16mf2(__VA_ARGS__)
8273
#define vsoxseg8ei64_v_f16mf2(...) __riscv_vsoxseg8ei64_v_f16mf2(__VA_ARGS__)
8274
#define vsoxseg2ei64_v_f16m1(...) __riscv_vsoxseg2ei64_v_f16m1(__VA_ARGS__)
8275
#define vsoxseg3ei64_v_f16m1(...) __riscv_vsoxseg3ei64_v_f16m1(__VA_ARGS__)
8276
#define vsoxseg4ei64_v_f16m1(...) __riscv_vsoxseg4ei64_v_f16m1(__VA_ARGS__)
8277
#define vsoxseg5ei64_v_f16m1(...) __riscv_vsoxseg5ei64_v_f16m1(__VA_ARGS__)
8278
#define vsoxseg6ei64_v_f16m1(...) __riscv_vsoxseg6ei64_v_f16m1(__VA_ARGS__)
8279
#define vsoxseg7ei64_v_f16m1(...) __riscv_vsoxseg7ei64_v_f16m1(__VA_ARGS__)
8280
#define vsoxseg8ei64_v_f16m1(...) __riscv_vsoxseg8ei64_v_f16m1(__VA_ARGS__)
8281
#define vsoxseg2ei64_v_f16m2(...) __riscv_vsoxseg2ei64_v_f16m2(__VA_ARGS__)
8282
#define vsoxseg3ei64_v_f16m2(...) __riscv_vsoxseg3ei64_v_f16m2(__VA_ARGS__)
8283
#define vsoxseg4ei64_v_f16m2(...) __riscv_vsoxseg4ei64_v_f16m2(__VA_ARGS__)
8284
#define vsoxseg2ei8_v_f32mf2(...) __riscv_vsoxseg2ei8_v_f32mf2(__VA_ARGS__)
8285
#define vsoxseg3ei8_v_f32mf2(...) __riscv_vsoxseg3ei8_v_f32mf2(__VA_ARGS__)
8286
#define vsoxseg4ei8_v_f32mf2(...) __riscv_vsoxseg4ei8_v_f32mf2(__VA_ARGS__)
8287
#define vsoxseg5ei8_v_f32mf2(...) __riscv_vsoxseg5ei8_v_f32mf2(__VA_ARGS__)
8288
#define vsoxseg6ei8_v_f32mf2(...) __riscv_vsoxseg6ei8_v_f32mf2(__VA_ARGS__)
8289
#define vsoxseg7ei8_v_f32mf2(...) __riscv_vsoxseg7ei8_v_f32mf2(__VA_ARGS__)
8290
#define vsoxseg8ei8_v_f32mf2(...) __riscv_vsoxseg8ei8_v_f32mf2(__VA_ARGS__)
8291
#define vsoxseg2ei8_v_f32m1(...) __riscv_vsoxseg2ei8_v_f32m1(__VA_ARGS__)
8292
#define vsoxseg3ei8_v_f32m1(...) __riscv_vsoxseg3ei8_v_f32m1(__VA_ARGS__)
8293
#define vsoxseg4ei8_v_f32m1(...) __riscv_vsoxseg4ei8_v_f32m1(__VA_ARGS__)
8294
#define vsoxseg5ei8_v_f32m1(...) __riscv_vsoxseg5ei8_v_f32m1(__VA_ARGS__)
8295
#define vsoxseg6ei8_v_f32m1(...) __riscv_vsoxseg6ei8_v_f32m1(__VA_ARGS__)
8296
#define vsoxseg7ei8_v_f32m1(...) __riscv_vsoxseg7ei8_v_f32m1(__VA_ARGS__)
8297
#define vsoxseg8ei8_v_f32m1(...) __riscv_vsoxseg8ei8_v_f32m1(__VA_ARGS__)
8298
#define vsoxseg2ei8_v_f32m2(...) __riscv_vsoxseg2ei8_v_f32m2(__VA_ARGS__)
8299
#define vsoxseg3ei8_v_f32m2(...) __riscv_vsoxseg3ei8_v_f32m2(__VA_ARGS__)
8300
#define vsoxseg4ei8_v_f32m2(...) __riscv_vsoxseg4ei8_v_f32m2(__VA_ARGS__)
8301
#define vsoxseg2ei8_v_f32m4(...) __riscv_vsoxseg2ei8_v_f32m4(__VA_ARGS__)
8302
#define vsoxseg2ei16_v_f32mf2(...) __riscv_vsoxseg2ei16_v_f32mf2(__VA_ARGS__)
8303
#define vsoxseg3ei16_v_f32mf2(...) __riscv_vsoxseg3ei16_v_f32mf2(__VA_ARGS__)
8304
#define vsoxseg4ei16_v_f32mf2(...) __riscv_vsoxseg4ei16_v_f32mf2(__VA_ARGS__)
8305
#define vsoxseg5ei16_v_f32mf2(...) __riscv_vsoxseg5ei16_v_f32mf2(__VA_ARGS__)
8306
#define vsoxseg6ei16_v_f32mf2(...) __riscv_vsoxseg6ei16_v_f32mf2(__VA_ARGS__)
8307
#define vsoxseg7ei16_v_f32mf2(...) __riscv_vsoxseg7ei16_v_f32mf2(__VA_ARGS__)
8308
#define vsoxseg8ei16_v_f32mf2(...) __riscv_vsoxseg8ei16_v_f32mf2(__VA_ARGS__)
8309
#define vsoxseg2ei16_v_f32m1(...) __riscv_vsoxseg2ei16_v_f32m1(__VA_ARGS__)
8310
#define vsoxseg3ei16_v_f32m1(...) __riscv_vsoxseg3ei16_v_f32m1(__VA_ARGS__)
8311
#define vsoxseg4ei16_v_f32m1(...) __riscv_vsoxseg4ei16_v_f32m1(__VA_ARGS__)
8312
#define vsoxseg5ei16_v_f32m1(...) __riscv_vsoxseg5ei16_v_f32m1(__VA_ARGS__)
8313
#define vsoxseg6ei16_v_f32m1(...) __riscv_vsoxseg6ei16_v_f32m1(__VA_ARGS__)
8314
#define vsoxseg7ei16_v_f32m1(...) __riscv_vsoxseg7ei16_v_f32m1(__VA_ARGS__)
8315
#define vsoxseg8ei16_v_f32m1(...) __riscv_vsoxseg8ei16_v_f32m1(__VA_ARGS__)
8316
#define vsoxseg2ei16_v_f32m2(...) __riscv_vsoxseg2ei16_v_f32m2(__VA_ARGS__)
8317
#define vsoxseg3ei16_v_f32m2(...) __riscv_vsoxseg3ei16_v_f32m2(__VA_ARGS__)
8318
#define vsoxseg4ei16_v_f32m2(...) __riscv_vsoxseg4ei16_v_f32m2(__VA_ARGS__)
8319
#define vsoxseg2ei16_v_f32m4(...) __riscv_vsoxseg2ei16_v_f32m4(__VA_ARGS__)
8320
#define vsoxseg2ei32_v_f32mf2(...) __riscv_vsoxseg2ei32_v_f32mf2(__VA_ARGS__)
8321
#define vsoxseg3ei32_v_f32mf2(...) __riscv_vsoxseg3ei32_v_f32mf2(__VA_ARGS__)
8322
#define vsoxseg4ei32_v_f32mf2(...) __riscv_vsoxseg4ei32_v_f32mf2(__VA_ARGS__)
8323
#define vsoxseg5ei32_v_f32mf2(...) __riscv_vsoxseg5ei32_v_f32mf2(__VA_ARGS__)
8324
#define vsoxseg6ei32_v_f32mf2(...) __riscv_vsoxseg6ei32_v_f32mf2(__VA_ARGS__)
8325
#define vsoxseg7ei32_v_f32mf2(...) __riscv_vsoxseg7ei32_v_f32mf2(__VA_ARGS__)
8326
#define vsoxseg8ei32_v_f32mf2(...) __riscv_vsoxseg8ei32_v_f32mf2(__VA_ARGS__)
8327
#define vsoxseg2ei32_v_f32m1(...) __riscv_vsoxseg2ei32_v_f32m1(__VA_ARGS__)
8328
#define vsoxseg3ei32_v_f32m1(...) __riscv_vsoxseg3ei32_v_f32m1(__VA_ARGS__)
8329
#define vsoxseg4ei32_v_f32m1(...) __riscv_vsoxseg4ei32_v_f32m1(__VA_ARGS__)
8330
#define vsoxseg5ei32_v_f32m1(...) __riscv_vsoxseg5ei32_v_f32m1(__VA_ARGS__)
8331
#define vsoxseg6ei32_v_f32m1(...) __riscv_vsoxseg6ei32_v_f32m1(__VA_ARGS__)
8332
#define vsoxseg7ei32_v_f32m1(...) __riscv_vsoxseg7ei32_v_f32m1(__VA_ARGS__)
8333
#define vsoxseg8ei32_v_f32m1(...) __riscv_vsoxseg8ei32_v_f32m1(__VA_ARGS__)
8334
#define vsoxseg2ei32_v_f32m2(...) __riscv_vsoxseg2ei32_v_f32m2(__VA_ARGS__)
8335
#define vsoxseg3ei32_v_f32m2(...) __riscv_vsoxseg3ei32_v_f32m2(__VA_ARGS__)
8336
#define vsoxseg4ei32_v_f32m2(...) __riscv_vsoxseg4ei32_v_f32m2(__VA_ARGS__)
8337
#define vsoxseg2ei32_v_f32m4(...) __riscv_vsoxseg2ei32_v_f32m4(__VA_ARGS__)
8338
#define vsoxseg2ei64_v_f32mf2(...) __riscv_vsoxseg2ei64_v_f32mf2(__VA_ARGS__)
8339
#define vsoxseg3ei64_v_f32mf2(...) __riscv_vsoxseg3ei64_v_f32mf2(__VA_ARGS__)
8340
#define vsoxseg4ei64_v_f32mf2(...) __riscv_vsoxseg4ei64_v_f32mf2(__VA_ARGS__)
8341
#define vsoxseg5ei64_v_f32mf2(...) __riscv_vsoxseg5ei64_v_f32mf2(__VA_ARGS__)
8342
#define vsoxseg6ei64_v_f32mf2(...) __riscv_vsoxseg6ei64_v_f32mf2(__VA_ARGS__)
8343
#define vsoxseg7ei64_v_f32mf2(...) __riscv_vsoxseg7ei64_v_f32mf2(__VA_ARGS__)
8344
#define vsoxseg8ei64_v_f32mf2(...) __riscv_vsoxseg8ei64_v_f32mf2(__VA_ARGS__)
8345
#define vsoxseg2ei64_v_f32m1(...) __riscv_vsoxseg2ei64_v_f32m1(__VA_ARGS__)
8346
#define vsoxseg3ei64_v_f32m1(...) __riscv_vsoxseg3ei64_v_f32m1(__VA_ARGS__)
8347
#define vsoxseg4ei64_v_f32m1(...) __riscv_vsoxseg4ei64_v_f32m1(__VA_ARGS__)
8348
#define vsoxseg5ei64_v_f32m1(...) __riscv_vsoxseg5ei64_v_f32m1(__VA_ARGS__)
8349
#define vsoxseg6ei64_v_f32m1(...) __riscv_vsoxseg6ei64_v_f32m1(__VA_ARGS__)
8350
#define vsoxseg7ei64_v_f32m1(...) __riscv_vsoxseg7ei64_v_f32m1(__VA_ARGS__)
8351
#define vsoxseg8ei64_v_f32m1(...) __riscv_vsoxseg8ei64_v_f32m1(__VA_ARGS__)
8352
#define vsoxseg2ei64_v_f32m2(...) __riscv_vsoxseg2ei64_v_f32m2(__VA_ARGS__)
8353
#define vsoxseg3ei64_v_f32m2(...) __riscv_vsoxseg3ei64_v_f32m2(__VA_ARGS__)
8354
#define vsoxseg4ei64_v_f32m2(...) __riscv_vsoxseg4ei64_v_f32m2(__VA_ARGS__)
8355
#define vsoxseg2ei64_v_f32m4(...) __riscv_vsoxseg2ei64_v_f32m4(__VA_ARGS__)
8356
#define vsoxseg2ei8_v_f64m1(...) __riscv_vsoxseg2ei8_v_f64m1(__VA_ARGS__)
8357
#define vsoxseg3ei8_v_f64m1(...) __riscv_vsoxseg3ei8_v_f64m1(__VA_ARGS__)
8358
#define vsoxseg4ei8_v_f64m1(...) __riscv_vsoxseg4ei8_v_f64m1(__VA_ARGS__)
8359
#define vsoxseg5ei8_v_f64m1(...) __riscv_vsoxseg5ei8_v_f64m1(__VA_ARGS__)
8360
#define vsoxseg6ei8_v_f64m1(...) __riscv_vsoxseg6ei8_v_f64m1(__VA_ARGS__)
8361
#define vsoxseg7ei8_v_f64m1(...) __riscv_vsoxseg7ei8_v_f64m1(__VA_ARGS__)
8362
#define vsoxseg8ei8_v_f64m1(...) __riscv_vsoxseg8ei8_v_f64m1(__VA_ARGS__)
8363
#define vsoxseg2ei8_v_f64m2(...) __riscv_vsoxseg2ei8_v_f64m2(__VA_ARGS__)
8364
#define vsoxseg3ei8_v_f64m2(...) __riscv_vsoxseg3ei8_v_f64m2(__VA_ARGS__)
8365
#define vsoxseg4ei8_v_f64m2(...) __riscv_vsoxseg4ei8_v_f64m2(__VA_ARGS__)
8366
#define vsoxseg2ei8_v_f64m4(...) __riscv_vsoxseg2ei8_v_f64m4(__VA_ARGS__)
8367
#define vsoxseg2ei16_v_f64m1(...) __riscv_vsoxseg2ei16_v_f64m1(__VA_ARGS__)
8368
#define vsoxseg3ei16_v_f64m1(...) __riscv_vsoxseg3ei16_v_f64m1(__VA_ARGS__)
8369
#define vsoxseg4ei16_v_f64m1(...) __riscv_vsoxseg4ei16_v_f64m1(__VA_ARGS__)
8370
#define vsoxseg5ei16_v_f64m1(...) __riscv_vsoxseg5ei16_v_f64m1(__VA_ARGS__)
8371
#define vsoxseg6ei16_v_f64m1(...) __riscv_vsoxseg6ei16_v_f64m1(__VA_ARGS__)
8372
#define vsoxseg7ei16_v_f64m1(...) __riscv_vsoxseg7ei16_v_f64m1(__VA_ARGS__)
8373
#define vsoxseg8ei16_v_f64m1(...) __riscv_vsoxseg8ei16_v_f64m1(__VA_ARGS__)
8374
#define vsoxseg2ei16_v_f64m2(...) __riscv_vsoxseg2ei16_v_f64m2(__VA_ARGS__)
8375
#define vsoxseg3ei16_v_f64m2(...) __riscv_vsoxseg3ei16_v_f64m2(__VA_ARGS__)
8376
#define vsoxseg4ei16_v_f64m2(...) __riscv_vsoxseg4ei16_v_f64m2(__VA_ARGS__)
8377
#define vsoxseg2ei16_v_f64m4(...) __riscv_vsoxseg2ei16_v_f64m4(__VA_ARGS__)
8378
#define vsoxseg2ei32_v_f64m1(...) __riscv_vsoxseg2ei32_v_f64m1(__VA_ARGS__)
8379
#define vsoxseg3ei32_v_f64m1(...) __riscv_vsoxseg3ei32_v_f64m1(__VA_ARGS__)
8380
#define vsoxseg4ei32_v_f64m1(...) __riscv_vsoxseg4ei32_v_f64m1(__VA_ARGS__)
8381
#define vsoxseg5ei32_v_f64m1(...) __riscv_vsoxseg5ei32_v_f64m1(__VA_ARGS__)
8382
#define vsoxseg6ei32_v_f64m1(...) __riscv_vsoxseg6ei32_v_f64m1(__VA_ARGS__)
8383
#define vsoxseg7ei32_v_f64m1(...) __riscv_vsoxseg7ei32_v_f64m1(__VA_ARGS__)
8384
#define vsoxseg8ei32_v_f64m1(...) __riscv_vsoxseg8ei32_v_f64m1(__VA_ARGS__)
8385
#define vsoxseg2ei32_v_f64m2(...) __riscv_vsoxseg2ei32_v_f64m2(__VA_ARGS__)
8386
#define vsoxseg3ei32_v_f64m2(...) __riscv_vsoxseg3ei32_v_f64m2(__VA_ARGS__)
8387
#define vsoxseg4ei32_v_f64m2(...) __riscv_vsoxseg4ei32_v_f64m2(__VA_ARGS__)
8388
#define vsoxseg2ei32_v_f64m4(...) __riscv_vsoxseg2ei32_v_f64m4(__VA_ARGS__)
8389
#define vsoxseg2ei64_v_f64m1(...) __riscv_vsoxseg2ei64_v_f64m1(__VA_ARGS__)
8390
#define vsoxseg3ei64_v_f64m1(...) __riscv_vsoxseg3ei64_v_f64m1(__VA_ARGS__)
8391
#define vsoxseg4ei64_v_f64m1(...) __riscv_vsoxseg4ei64_v_f64m1(__VA_ARGS__)
8392
#define vsoxseg5ei64_v_f64m1(...) __riscv_vsoxseg5ei64_v_f64m1(__VA_ARGS__)
8393
#define vsoxseg6ei64_v_f64m1(...) __riscv_vsoxseg6ei64_v_f64m1(__VA_ARGS__)
8394
#define vsoxseg7ei64_v_f64m1(...) __riscv_vsoxseg7ei64_v_f64m1(__VA_ARGS__)
8395
#define vsoxseg8ei64_v_f64m1(...) __riscv_vsoxseg8ei64_v_f64m1(__VA_ARGS__)
8396
#define vsoxseg2ei64_v_f64m2(...) __riscv_vsoxseg2ei64_v_f64m2(__VA_ARGS__)
8397
#define vsoxseg3ei64_v_f64m2(...) __riscv_vsoxseg3ei64_v_f64m2(__VA_ARGS__)
8398
#define vsoxseg4ei64_v_f64m2(...) __riscv_vsoxseg4ei64_v_f64m2(__VA_ARGS__)
8399
#define vsoxseg2ei64_v_f64m4(...) __riscv_vsoxseg2ei64_v_f64m4(__VA_ARGS__)
8400
#define vsuxseg2ei8_v_f16mf4(...) __riscv_vsuxseg2ei8_v_f16mf4(__VA_ARGS__)
8401
#define vsuxseg3ei8_v_f16mf4(...) __riscv_vsuxseg3ei8_v_f16mf4(__VA_ARGS__)
8402
#define vsuxseg4ei8_v_f16mf4(...) __riscv_vsuxseg4ei8_v_f16mf4(__VA_ARGS__)
8403
#define vsuxseg5ei8_v_f16mf4(...) __riscv_vsuxseg5ei8_v_f16mf4(__VA_ARGS__)
8404
#define vsuxseg6ei8_v_f16mf4(...) __riscv_vsuxseg6ei8_v_f16mf4(__VA_ARGS__)
8405
#define vsuxseg7ei8_v_f16mf4(...) __riscv_vsuxseg7ei8_v_f16mf4(__VA_ARGS__)
8406
#define vsuxseg8ei8_v_f16mf4(...) __riscv_vsuxseg8ei8_v_f16mf4(__VA_ARGS__)
8407
#define vsuxseg2ei8_v_f16mf2(...) __riscv_vsuxseg2ei8_v_f16mf2(__VA_ARGS__)
8408
#define vsuxseg3ei8_v_f16mf2(...) __riscv_vsuxseg3ei8_v_f16mf2(__VA_ARGS__)
8409
#define vsuxseg4ei8_v_f16mf2(...) __riscv_vsuxseg4ei8_v_f16mf2(__VA_ARGS__)
8410
#define vsuxseg5ei8_v_f16mf2(...) __riscv_vsuxseg5ei8_v_f16mf2(__VA_ARGS__)
8411
#define vsuxseg6ei8_v_f16mf2(...) __riscv_vsuxseg6ei8_v_f16mf2(__VA_ARGS__)
8412
#define vsuxseg7ei8_v_f16mf2(...) __riscv_vsuxseg7ei8_v_f16mf2(__VA_ARGS__)
8413
#define vsuxseg8ei8_v_f16mf2(...) __riscv_vsuxseg8ei8_v_f16mf2(__VA_ARGS__)
8414
#define vsuxseg2ei8_v_f16m1(...) __riscv_vsuxseg2ei8_v_f16m1(__VA_ARGS__)
8415
#define vsuxseg3ei8_v_f16m1(...) __riscv_vsuxseg3ei8_v_f16m1(__VA_ARGS__)
8416
#define vsuxseg4ei8_v_f16m1(...) __riscv_vsuxseg4ei8_v_f16m1(__VA_ARGS__)
8417
#define vsuxseg5ei8_v_f16m1(...) __riscv_vsuxseg5ei8_v_f16m1(__VA_ARGS__)
8418
#define vsuxseg6ei8_v_f16m1(...) __riscv_vsuxseg6ei8_v_f16m1(__VA_ARGS__)
8419
#define vsuxseg7ei8_v_f16m1(...) __riscv_vsuxseg7ei8_v_f16m1(__VA_ARGS__)
8420
#define vsuxseg8ei8_v_f16m1(...) __riscv_vsuxseg8ei8_v_f16m1(__VA_ARGS__)
8421
#define vsuxseg2ei8_v_f16m2(...) __riscv_vsuxseg2ei8_v_f16m2(__VA_ARGS__)
8422
#define vsuxseg3ei8_v_f16m2(...) __riscv_vsuxseg3ei8_v_f16m2(__VA_ARGS__)
8423
#define vsuxseg4ei8_v_f16m2(...) __riscv_vsuxseg4ei8_v_f16m2(__VA_ARGS__)
8424
#define vsuxseg2ei8_v_f16m4(...) __riscv_vsuxseg2ei8_v_f16m4(__VA_ARGS__)
8425
#define vsuxseg2ei16_v_f16mf4(...) __riscv_vsuxseg2ei16_v_f16mf4(__VA_ARGS__)
8426
#define vsuxseg3ei16_v_f16mf4(...) __riscv_vsuxseg3ei16_v_f16mf4(__VA_ARGS__)
8427
#define vsuxseg4ei16_v_f16mf4(...) __riscv_vsuxseg4ei16_v_f16mf4(__VA_ARGS__)
8428
#define vsuxseg5ei16_v_f16mf4(...) __riscv_vsuxseg5ei16_v_f16mf4(__VA_ARGS__)
8429
#define vsuxseg6ei16_v_f16mf4(...) __riscv_vsuxseg6ei16_v_f16mf4(__VA_ARGS__)
8430
#define vsuxseg7ei16_v_f16mf4(...) __riscv_vsuxseg7ei16_v_f16mf4(__VA_ARGS__)
8431
#define vsuxseg8ei16_v_f16mf4(...) __riscv_vsuxseg8ei16_v_f16mf4(__VA_ARGS__)
8432
#define vsuxseg2ei16_v_f16mf2(...) __riscv_vsuxseg2ei16_v_f16mf2(__VA_ARGS__)
8433
#define vsuxseg3ei16_v_f16mf2(...) __riscv_vsuxseg3ei16_v_f16mf2(__VA_ARGS__)
8434
#define vsuxseg4ei16_v_f16mf2(...) __riscv_vsuxseg4ei16_v_f16mf2(__VA_ARGS__)
8435
#define vsuxseg5ei16_v_f16mf2(...) __riscv_vsuxseg5ei16_v_f16mf2(__VA_ARGS__)
8436
#define vsuxseg6ei16_v_f16mf2(...) __riscv_vsuxseg6ei16_v_f16mf2(__VA_ARGS__)
8437
#define vsuxseg7ei16_v_f16mf2(...) __riscv_vsuxseg7ei16_v_f16mf2(__VA_ARGS__)
8438
#define vsuxseg8ei16_v_f16mf2(...) __riscv_vsuxseg8ei16_v_f16mf2(__VA_ARGS__)
8439
#define vsuxseg2ei16_v_f16m1(...) __riscv_vsuxseg2ei16_v_f16m1(__VA_ARGS__)
8440
#define vsuxseg3ei16_v_f16m1(...) __riscv_vsuxseg3ei16_v_f16m1(__VA_ARGS__)
8441
#define vsuxseg4ei16_v_f16m1(...) __riscv_vsuxseg4ei16_v_f16m1(__VA_ARGS__)
8442
#define vsuxseg5ei16_v_f16m1(...) __riscv_vsuxseg5ei16_v_f16m1(__VA_ARGS__)
8443
#define vsuxseg6ei16_v_f16m1(...) __riscv_vsuxseg6ei16_v_f16m1(__VA_ARGS__)
8444
#define vsuxseg7ei16_v_f16m1(...) __riscv_vsuxseg7ei16_v_f16m1(__VA_ARGS__)
8445
#define vsuxseg8ei16_v_f16m1(...) __riscv_vsuxseg8ei16_v_f16m1(__VA_ARGS__)
8446
#define vsuxseg2ei16_v_f16m2(...) __riscv_vsuxseg2ei16_v_f16m2(__VA_ARGS__)
8447
#define vsuxseg3ei16_v_f16m2(...) __riscv_vsuxseg3ei16_v_f16m2(__VA_ARGS__)
8448
#define vsuxseg4ei16_v_f16m2(...) __riscv_vsuxseg4ei16_v_f16m2(__VA_ARGS__)
8449
#define vsuxseg2ei16_v_f16m4(...) __riscv_vsuxseg2ei16_v_f16m4(__VA_ARGS__)
8450
#define vsuxseg2ei32_v_f16mf4(...) __riscv_vsuxseg2ei32_v_f16mf4(__VA_ARGS__)
8451
#define vsuxseg3ei32_v_f16mf4(...) __riscv_vsuxseg3ei32_v_f16mf4(__VA_ARGS__)
8452
#define vsuxseg4ei32_v_f16mf4(...) __riscv_vsuxseg4ei32_v_f16mf4(__VA_ARGS__)
8453
#define vsuxseg5ei32_v_f16mf4(...) __riscv_vsuxseg5ei32_v_f16mf4(__VA_ARGS__)
8454
#define vsuxseg6ei32_v_f16mf4(...) __riscv_vsuxseg6ei32_v_f16mf4(__VA_ARGS__)
8455
#define vsuxseg7ei32_v_f16mf4(...) __riscv_vsuxseg7ei32_v_f16mf4(__VA_ARGS__)
8456
#define vsuxseg8ei32_v_f16mf4(...) __riscv_vsuxseg8ei32_v_f16mf4(__VA_ARGS__)
8457
#define vsuxseg2ei32_v_f16mf2(...) __riscv_vsuxseg2ei32_v_f16mf2(__VA_ARGS__)
8458
#define vsuxseg3ei32_v_f16mf2(...) __riscv_vsuxseg3ei32_v_f16mf2(__VA_ARGS__)
8459
#define vsuxseg4ei32_v_f16mf2(...) __riscv_vsuxseg4ei32_v_f16mf2(__VA_ARGS__)
8460
#define vsuxseg5ei32_v_f16mf2(...) __riscv_vsuxseg5ei32_v_f16mf2(__VA_ARGS__)
8461
#define vsuxseg6ei32_v_f16mf2(...) __riscv_vsuxseg6ei32_v_f16mf2(__VA_ARGS__)
8462
#define vsuxseg7ei32_v_f16mf2(...) __riscv_vsuxseg7ei32_v_f16mf2(__VA_ARGS__)
8463
#define vsuxseg8ei32_v_f16mf2(...) __riscv_vsuxseg8ei32_v_f16mf2(__VA_ARGS__)
8464
#define vsuxseg2ei32_v_f16m1(...) __riscv_vsuxseg2ei32_v_f16m1(__VA_ARGS__)
8465
#define vsuxseg3ei32_v_f16m1(...) __riscv_vsuxseg3ei32_v_f16m1(__VA_ARGS__)
8466
#define vsuxseg4ei32_v_f16m1(...) __riscv_vsuxseg4ei32_v_f16m1(__VA_ARGS__)
8467
#define vsuxseg5ei32_v_f16m1(...) __riscv_vsuxseg5ei32_v_f16m1(__VA_ARGS__)
8468
#define vsuxseg6ei32_v_f16m1(...) __riscv_vsuxseg6ei32_v_f16m1(__VA_ARGS__)
8469
#define vsuxseg7ei32_v_f16m1(...) __riscv_vsuxseg7ei32_v_f16m1(__VA_ARGS__)
8470
#define vsuxseg8ei32_v_f16m1(...) __riscv_vsuxseg8ei32_v_f16m1(__VA_ARGS__)
8471
#define vsuxseg2ei32_v_f16m2(...) __riscv_vsuxseg2ei32_v_f16m2(__VA_ARGS__)
8472
#define vsuxseg3ei32_v_f16m2(...) __riscv_vsuxseg3ei32_v_f16m2(__VA_ARGS__)
8473
#define vsuxseg4ei32_v_f16m2(...) __riscv_vsuxseg4ei32_v_f16m2(__VA_ARGS__)
8474
#define vsuxseg2ei32_v_f16m4(...) __riscv_vsuxseg2ei32_v_f16m4(__VA_ARGS__)
8475
#define vsuxseg2ei64_v_f16mf4(...) __riscv_vsuxseg2ei64_v_f16mf4(__VA_ARGS__)
8476
#define vsuxseg3ei64_v_f16mf4(...) __riscv_vsuxseg3ei64_v_f16mf4(__VA_ARGS__)
8477
#define vsuxseg4ei64_v_f16mf4(...) __riscv_vsuxseg4ei64_v_f16mf4(__VA_ARGS__)
8478
#define vsuxseg5ei64_v_f16mf4(...) __riscv_vsuxseg5ei64_v_f16mf4(__VA_ARGS__)
8479
#define vsuxseg6ei64_v_f16mf4(...) __riscv_vsuxseg6ei64_v_f16mf4(__VA_ARGS__)
8480
#define vsuxseg7ei64_v_f16mf4(...) __riscv_vsuxseg7ei64_v_f16mf4(__VA_ARGS__)
8481
#define vsuxseg8ei64_v_f16mf4(...) __riscv_vsuxseg8ei64_v_f16mf4(__VA_ARGS__)
8482
#define vsuxseg2ei64_v_f16mf2(...) __riscv_vsuxseg2ei64_v_f16mf2(__VA_ARGS__)
8483
#define vsuxseg3ei64_v_f16mf2(...) __riscv_vsuxseg3ei64_v_f16mf2(__VA_ARGS__)
8484
#define vsuxseg4ei64_v_f16mf2(...) __riscv_vsuxseg4ei64_v_f16mf2(__VA_ARGS__)
8485
#define vsuxseg5ei64_v_f16mf2(...) __riscv_vsuxseg5ei64_v_f16mf2(__VA_ARGS__)
8486
#define vsuxseg6ei64_v_f16mf2(...) __riscv_vsuxseg6ei64_v_f16mf2(__VA_ARGS__)
8487
#define vsuxseg7ei64_v_f16mf2(...) __riscv_vsuxseg7ei64_v_f16mf2(__VA_ARGS__)
8488
#define vsuxseg8ei64_v_f16mf2(...) __riscv_vsuxseg8ei64_v_f16mf2(__VA_ARGS__)
8489
#define vsuxseg2ei64_v_f16m1(...) __riscv_vsuxseg2ei64_v_f16m1(__VA_ARGS__)
8490
#define vsuxseg3ei64_v_f16m1(...) __riscv_vsuxseg3ei64_v_f16m1(__VA_ARGS__)
8491
#define vsuxseg4ei64_v_f16m1(...) __riscv_vsuxseg4ei64_v_f16m1(__VA_ARGS__)
8492
#define vsuxseg5ei64_v_f16m1(...) __riscv_vsuxseg5ei64_v_f16m1(__VA_ARGS__)
8493
#define vsuxseg6ei64_v_f16m1(...) __riscv_vsuxseg6ei64_v_f16m1(__VA_ARGS__)
8494
#define vsuxseg7ei64_v_f16m1(...) __riscv_vsuxseg7ei64_v_f16m1(__VA_ARGS__)
8495
#define vsuxseg8ei64_v_f16m1(...) __riscv_vsuxseg8ei64_v_f16m1(__VA_ARGS__)
8496
#define vsuxseg2ei64_v_f16m2(...) __riscv_vsuxseg2ei64_v_f16m2(__VA_ARGS__)
8497
#define vsuxseg3ei64_v_f16m2(...) __riscv_vsuxseg3ei64_v_f16m2(__VA_ARGS__)
8498
#define vsuxseg4ei64_v_f16m2(...) __riscv_vsuxseg4ei64_v_f16m2(__VA_ARGS__)
8499
#define vsuxseg2ei8_v_f32mf2(...) __riscv_vsuxseg2ei8_v_f32mf2(__VA_ARGS__)
8500
#define vsuxseg3ei8_v_f32mf2(...) __riscv_vsuxseg3ei8_v_f32mf2(__VA_ARGS__)
8501
#define vsuxseg4ei8_v_f32mf2(...) __riscv_vsuxseg4ei8_v_f32mf2(__VA_ARGS__)
8502
#define vsuxseg5ei8_v_f32mf2(...) __riscv_vsuxseg5ei8_v_f32mf2(__VA_ARGS__)
8503
#define vsuxseg6ei8_v_f32mf2(...) __riscv_vsuxseg6ei8_v_f32mf2(__VA_ARGS__)
8504
#define vsuxseg7ei8_v_f32mf2(...) __riscv_vsuxseg7ei8_v_f32mf2(__VA_ARGS__)
8505
#define vsuxseg8ei8_v_f32mf2(...) __riscv_vsuxseg8ei8_v_f32mf2(__VA_ARGS__)
8506
#define vsuxseg2ei8_v_f32m1(...) __riscv_vsuxseg2ei8_v_f32m1(__VA_ARGS__)
8507
#define vsuxseg3ei8_v_f32m1(...) __riscv_vsuxseg3ei8_v_f32m1(__VA_ARGS__)
8508
#define vsuxseg4ei8_v_f32m1(...) __riscv_vsuxseg4ei8_v_f32m1(__VA_ARGS__)
8509
#define vsuxseg5ei8_v_f32m1(...) __riscv_vsuxseg5ei8_v_f32m1(__VA_ARGS__)
8510
#define vsuxseg6ei8_v_f32m1(...) __riscv_vsuxseg6ei8_v_f32m1(__VA_ARGS__)
8511
#define vsuxseg7ei8_v_f32m1(...) __riscv_vsuxseg7ei8_v_f32m1(__VA_ARGS__)
8512
#define vsuxseg8ei8_v_f32m1(...) __riscv_vsuxseg8ei8_v_f32m1(__VA_ARGS__)
8513
#define vsuxseg2ei8_v_f32m2(...) __riscv_vsuxseg2ei8_v_f32m2(__VA_ARGS__)
8514
#define vsuxseg3ei8_v_f32m2(...) __riscv_vsuxseg3ei8_v_f32m2(__VA_ARGS__)
8515
#define vsuxseg4ei8_v_f32m2(...) __riscv_vsuxseg4ei8_v_f32m2(__VA_ARGS__)
8516
#define vsuxseg2ei8_v_f32m4(...) __riscv_vsuxseg2ei8_v_f32m4(__VA_ARGS__)
8517
#define vsuxseg2ei16_v_f32mf2(...) __riscv_vsuxseg2ei16_v_f32mf2(__VA_ARGS__)
8518
#define vsuxseg3ei16_v_f32mf2(...) __riscv_vsuxseg3ei16_v_f32mf2(__VA_ARGS__)
8519
#define vsuxseg4ei16_v_f32mf2(...) __riscv_vsuxseg4ei16_v_f32mf2(__VA_ARGS__)
8520
#define vsuxseg5ei16_v_f32mf2(...) __riscv_vsuxseg5ei16_v_f32mf2(__VA_ARGS__)
8521
#define vsuxseg6ei16_v_f32mf2(...) __riscv_vsuxseg6ei16_v_f32mf2(__VA_ARGS__)
8522
#define vsuxseg7ei16_v_f32mf2(...) __riscv_vsuxseg7ei16_v_f32mf2(__VA_ARGS__)
8523
#define vsuxseg8ei16_v_f32mf2(...) __riscv_vsuxseg8ei16_v_f32mf2(__VA_ARGS__)
8524
#define vsuxseg2ei16_v_f32m1(...) __riscv_vsuxseg2ei16_v_f32m1(__VA_ARGS__)
8525
#define vsuxseg3ei16_v_f32m1(...) __riscv_vsuxseg3ei16_v_f32m1(__VA_ARGS__)
8526
#define vsuxseg4ei16_v_f32m1(...) __riscv_vsuxseg4ei16_v_f32m1(__VA_ARGS__)
8527
#define vsuxseg5ei16_v_f32m1(...) __riscv_vsuxseg5ei16_v_f32m1(__VA_ARGS__)
8528
#define vsuxseg6ei16_v_f32m1(...) __riscv_vsuxseg6ei16_v_f32m1(__VA_ARGS__)
8529
#define vsuxseg7ei16_v_f32m1(...) __riscv_vsuxseg7ei16_v_f32m1(__VA_ARGS__)
8530
#define vsuxseg8ei16_v_f32m1(...) __riscv_vsuxseg8ei16_v_f32m1(__VA_ARGS__)
8531
#define vsuxseg2ei16_v_f32m2(...) __riscv_vsuxseg2ei16_v_f32m2(__VA_ARGS__)
8532
#define vsuxseg3ei16_v_f32m2(...) __riscv_vsuxseg3ei16_v_f32m2(__VA_ARGS__)
8533
#define vsuxseg4ei16_v_f32m2(...) __riscv_vsuxseg4ei16_v_f32m2(__VA_ARGS__)
8534
#define vsuxseg2ei16_v_f32m4(...) __riscv_vsuxseg2ei16_v_f32m4(__VA_ARGS__)
8535
#define vsuxseg2ei32_v_f32mf2(...) __riscv_vsuxseg2ei32_v_f32mf2(__VA_ARGS__)
8536
#define vsuxseg3ei32_v_f32mf2(...) __riscv_vsuxseg3ei32_v_f32mf2(__VA_ARGS__)
8537
#define vsuxseg4ei32_v_f32mf2(...) __riscv_vsuxseg4ei32_v_f32mf2(__VA_ARGS__)
8538
#define vsuxseg5ei32_v_f32mf2(...) __riscv_vsuxseg5ei32_v_f32mf2(__VA_ARGS__)
8539
#define vsuxseg6ei32_v_f32mf2(...) __riscv_vsuxseg6ei32_v_f32mf2(__VA_ARGS__)
8540
#define vsuxseg7ei32_v_f32mf2(...) __riscv_vsuxseg7ei32_v_f32mf2(__VA_ARGS__)
8541
#define vsuxseg8ei32_v_f32mf2(...) __riscv_vsuxseg8ei32_v_f32mf2(__VA_ARGS__)
8542
#define vsuxseg2ei32_v_f32m1(...) __riscv_vsuxseg2ei32_v_f32m1(__VA_ARGS__)
8543
#define vsuxseg3ei32_v_f32m1(...) __riscv_vsuxseg3ei32_v_f32m1(__VA_ARGS__)
8544
#define vsuxseg4ei32_v_f32m1(...) __riscv_vsuxseg4ei32_v_f32m1(__VA_ARGS__)
8545
#define vsuxseg5ei32_v_f32m1(...) __riscv_vsuxseg5ei32_v_f32m1(__VA_ARGS__)
8546
#define vsuxseg6ei32_v_f32m1(...) __riscv_vsuxseg6ei32_v_f32m1(__VA_ARGS__)
8547
#define vsuxseg7ei32_v_f32m1(...) __riscv_vsuxseg7ei32_v_f32m1(__VA_ARGS__)
8548
#define vsuxseg8ei32_v_f32m1(...) __riscv_vsuxseg8ei32_v_f32m1(__VA_ARGS__)
8549
#define vsuxseg2ei32_v_f32m2(...) __riscv_vsuxseg2ei32_v_f32m2(__VA_ARGS__)
8550
#define vsuxseg3ei32_v_f32m2(...) __riscv_vsuxseg3ei32_v_f32m2(__VA_ARGS__)
8551
#define vsuxseg4ei32_v_f32m2(...) __riscv_vsuxseg4ei32_v_f32m2(__VA_ARGS__)
8552
#define vsuxseg2ei32_v_f32m4(...) __riscv_vsuxseg2ei32_v_f32m4(__VA_ARGS__)
8553
#define vsuxseg2ei64_v_f32mf2(...) __riscv_vsuxseg2ei64_v_f32mf2(__VA_ARGS__)
8554
#define vsuxseg3ei64_v_f32mf2(...) __riscv_vsuxseg3ei64_v_f32mf2(__VA_ARGS__)
8555
#define vsuxseg4ei64_v_f32mf2(...) __riscv_vsuxseg4ei64_v_f32mf2(__VA_ARGS__)
8556
#define vsuxseg5ei64_v_f32mf2(...) __riscv_vsuxseg5ei64_v_f32mf2(__VA_ARGS__)
8557
#define vsuxseg6ei64_v_f32mf2(...) __riscv_vsuxseg6ei64_v_f32mf2(__VA_ARGS__)
8558
#define vsuxseg7ei64_v_f32mf2(...) __riscv_vsuxseg7ei64_v_f32mf2(__VA_ARGS__)
8559
#define vsuxseg8ei64_v_f32mf2(...) __riscv_vsuxseg8ei64_v_f32mf2(__VA_ARGS__)
8560
#define vsuxseg2ei64_v_f32m1(...) __riscv_vsuxseg2ei64_v_f32m1(__VA_ARGS__)
8561
#define vsuxseg3ei64_v_f32m1(...) __riscv_vsuxseg3ei64_v_f32m1(__VA_ARGS__)
8562
#define vsuxseg4ei64_v_f32m1(...) __riscv_vsuxseg4ei64_v_f32m1(__VA_ARGS__)
8563
#define vsuxseg5ei64_v_f32m1(...) __riscv_vsuxseg5ei64_v_f32m1(__VA_ARGS__)
8564
#define vsuxseg6ei64_v_f32m1(...) __riscv_vsuxseg6ei64_v_f32m1(__VA_ARGS__)
8565
#define vsuxseg7ei64_v_f32m1(...) __riscv_vsuxseg7ei64_v_f32m1(__VA_ARGS__)
8566
#define vsuxseg8ei64_v_f32m1(...) __riscv_vsuxseg8ei64_v_f32m1(__VA_ARGS__)
8567
#define vsuxseg2ei64_v_f32m2(...) __riscv_vsuxseg2ei64_v_f32m2(__VA_ARGS__)
8568
#define vsuxseg3ei64_v_f32m2(...) __riscv_vsuxseg3ei64_v_f32m2(__VA_ARGS__)
8569
#define vsuxseg4ei64_v_f32m2(...) __riscv_vsuxseg4ei64_v_f32m2(__VA_ARGS__)
8570
#define vsuxseg2ei64_v_f32m4(...) __riscv_vsuxseg2ei64_v_f32m4(__VA_ARGS__)
8571
#define vsuxseg2ei8_v_f64m1(...) __riscv_vsuxseg2ei8_v_f64m1(__VA_ARGS__)
8572
#define vsuxseg3ei8_v_f64m1(...) __riscv_vsuxseg3ei8_v_f64m1(__VA_ARGS__)
8573
#define vsuxseg4ei8_v_f64m1(...) __riscv_vsuxseg4ei8_v_f64m1(__VA_ARGS__)
8574
#define vsuxseg5ei8_v_f64m1(...) __riscv_vsuxseg5ei8_v_f64m1(__VA_ARGS__)
8575
#define vsuxseg6ei8_v_f64m1(...) __riscv_vsuxseg6ei8_v_f64m1(__VA_ARGS__)
8576
#define vsuxseg7ei8_v_f64m1(...) __riscv_vsuxseg7ei8_v_f64m1(__VA_ARGS__)
8577
#define vsuxseg8ei8_v_f64m1(...) __riscv_vsuxseg8ei8_v_f64m1(__VA_ARGS__)
8578
#define vsuxseg2ei8_v_f64m2(...) __riscv_vsuxseg2ei8_v_f64m2(__VA_ARGS__)
8579
#define vsuxseg3ei8_v_f64m2(...) __riscv_vsuxseg3ei8_v_f64m2(__VA_ARGS__)
8580
#define vsuxseg4ei8_v_f64m2(...) __riscv_vsuxseg4ei8_v_f64m2(__VA_ARGS__)
8581
#define vsuxseg2ei8_v_f64m4(...) __riscv_vsuxseg2ei8_v_f64m4(__VA_ARGS__)
8582
#define vsuxseg2ei16_v_f64m1(...) __riscv_vsuxseg2ei16_v_f64m1(__VA_ARGS__)
8583
#define vsuxseg3ei16_v_f64m1(...) __riscv_vsuxseg3ei16_v_f64m1(__VA_ARGS__)
8584
#define vsuxseg4ei16_v_f64m1(...) __riscv_vsuxseg4ei16_v_f64m1(__VA_ARGS__)
8585
#define vsuxseg5ei16_v_f64m1(...) __riscv_vsuxseg5ei16_v_f64m1(__VA_ARGS__)
8586
#define vsuxseg6ei16_v_f64m1(...) __riscv_vsuxseg6ei16_v_f64m1(__VA_ARGS__)
8587
#define vsuxseg7ei16_v_f64m1(...) __riscv_vsuxseg7ei16_v_f64m1(__VA_ARGS__)
8588
#define vsuxseg8ei16_v_f64m1(...) __riscv_vsuxseg8ei16_v_f64m1(__VA_ARGS__)
8589
#define vsuxseg2ei16_v_f64m2(...) __riscv_vsuxseg2ei16_v_f64m2(__VA_ARGS__)
8590
#define vsuxseg3ei16_v_f64m2(...) __riscv_vsuxseg3ei16_v_f64m2(__VA_ARGS__)
8591
#define vsuxseg4ei16_v_f64m2(...) __riscv_vsuxseg4ei16_v_f64m2(__VA_ARGS__)
8592
#define vsuxseg2ei16_v_f64m4(...) __riscv_vsuxseg2ei16_v_f64m4(__VA_ARGS__)
8593
#define vsuxseg2ei32_v_f64m1(...) __riscv_vsuxseg2ei32_v_f64m1(__VA_ARGS__)
8594
#define vsuxseg3ei32_v_f64m1(...) __riscv_vsuxseg3ei32_v_f64m1(__VA_ARGS__)
8595
#define vsuxseg4ei32_v_f64m1(...) __riscv_vsuxseg4ei32_v_f64m1(__VA_ARGS__)
8596
#define vsuxseg5ei32_v_f64m1(...) __riscv_vsuxseg5ei32_v_f64m1(__VA_ARGS__)
8597
#define vsuxseg6ei32_v_f64m1(...) __riscv_vsuxseg6ei32_v_f64m1(__VA_ARGS__)
8598
#define vsuxseg7ei32_v_f64m1(...) __riscv_vsuxseg7ei32_v_f64m1(__VA_ARGS__)
8599
#define vsuxseg8ei32_v_f64m1(...) __riscv_vsuxseg8ei32_v_f64m1(__VA_ARGS__)
8600
#define vsuxseg2ei32_v_f64m2(...) __riscv_vsuxseg2ei32_v_f64m2(__VA_ARGS__)
8601
#define vsuxseg3ei32_v_f64m2(...) __riscv_vsuxseg3ei32_v_f64m2(__VA_ARGS__)
8602
#define vsuxseg4ei32_v_f64m2(...) __riscv_vsuxseg4ei32_v_f64m2(__VA_ARGS__)
8603
#define vsuxseg2ei32_v_f64m4(...) __riscv_vsuxseg2ei32_v_f64m4(__VA_ARGS__)
8604
#define vsuxseg2ei64_v_f64m1(...) __riscv_vsuxseg2ei64_v_f64m1(__VA_ARGS__)
8605
#define vsuxseg3ei64_v_f64m1(...) __riscv_vsuxseg3ei64_v_f64m1(__VA_ARGS__)
8606
#define vsuxseg4ei64_v_f64m1(...) __riscv_vsuxseg4ei64_v_f64m1(__VA_ARGS__)
8607
#define vsuxseg5ei64_v_f64m1(...) __riscv_vsuxseg5ei64_v_f64m1(__VA_ARGS__)
8608
#define vsuxseg6ei64_v_f64m1(...) __riscv_vsuxseg6ei64_v_f64m1(__VA_ARGS__)
8609
#define vsuxseg7ei64_v_f64m1(...) __riscv_vsuxseg7ei64_v_f64m1(__VA_ARGS__)
8610
#define vsuxseg8ei64_v_f64m1(...) __riscv_vsuxseg8ei64_v_f64m1(__VA_ARGS__)
8611
#define vsuxseg2ei64_v_f64m2(...) __riscv_vsuxseg2ei64_v_f64m2(__VA_ARGS__)
8612
#define vsuxseg3ei64_v_f64m2(...) __riscv_vsuxseg3ei64_v_f64m2(__VA_ARGS__)
8613
#define vsuxseg4ei64_v_f64m2(...) __riscv_vsuxseg4ei64_v_f64m2(__VA_ARGS__)
8614
#define vsuxseg2ei64_v_f64m4(...) __riscv_vsuxseg2ei64_v_f64m4(__VA_ARGS__)
8615
#define vsoxseg2ei8_v_i8mf8(...) __riscv_vsoxseg2ei8_v_i8mf8(__VA_ARGS__)
8616
#define vsoxseg3ei8_v_i8mf8(...) __riscv_vsoxseg3ei8_v_i8mf8(__VA_ARGS__)
8617
#define vsoxseg4ei8_v_i8mf8(...) __riscv_vsoxseg4ei8_v_i8mf8(__VA_ARGS__)
8618
#define vsoxseg5ei8_v_i8mf8(...) __riscv_vsoxseg5ei8_v_i8mf8(__VA_ARGS__)
8619
#define vsoxseg6ei8_v_i8mf8(...) __riscv_vsoxseg6ei8_v_i8mf8(__VA_ARGS__)
8620
#define vsoxseg7ei8_v_i8mf8(...) __riscv_vsoxseg7ei8_v_i8mf8(__VA_ARGS__)
8621
#define vsoxseg8ei8_v_i8mf8(...) __riscv_vsoxseg8ei8_v_i8mf8(__VA_ARGS__)
8622
#define vsoxseg2ei8_v_i8mf4(...) __riscv_vsoxseg2ei8_v_i8mf4(__VA_ARGS__)
8623
#define vsoxseg3ei8_v_i8mf4(...) __riscv_vsoxseg3ei8_v_i8mf4(__VA_ARGS__)
8624
#define vsoxseg4ei8_v_i8mf4(...) __riscv_vsoxseg4ei8_v_i8mf4(__VA_ARGS__)
8625
#define vsoxseg5ei8_v_i8mf4(...) __riscv_vsoxseg5ei8_v_i8mf4(__VA_ARGS__)
8626
#define vsoxseg6ei8_v_i8mf4(...) __riscv_vsoxseg6ei8_v_i8mf4(__VA_ARGS__)
8627
#define vsoxseg7ei8_v_i8mf4(...) __riscv_vsoxseg7ei8_v_i8mf4(__VA_ARGS__)
8628
#define vsoxseg8ei8_v_i8mf4(...) __riscv_vsoxseg8ei8_v_i8mf4(__VA_ARGS__)
8629
#define vsoxseg2ei8_v_i8mf2(...) __riscv_vsoxseg2ei8_v_i8mf2(__VA_ARGS__)
8630
#define vsoxseg3ei8_v_i8mf2(...) __riscv_vsoxseg3ei8_v_i8mf2(__VA_ARGS__)
8631
#define vsoxseg4ei8_v_i8mf2(...) __riscv_vsoxseg4ei8_v_i8mf2(__VA_ARGS__)
8632
#define vsoxseg5ei8_v_i8mf2(...) __riscv_vsoxseg5ei8_v_i8mf2(__VA_ARGS__)
8633
#define vsoxseg6ei8_v_i8mf2(...) __riscv_vsoxseg6ei8_v_i8mf2(__VA_ARGS__)
8634
#define vsoxseg7ei8_v_i8mf2(...) __riscv_vsoxseg7ei8_v_i8mf2(__VA_ARGS__)
8635
#define vsoxseg8ei8_v_i8mf2(...) __riscv_vsoxseg8ei8_v_i8mf2(__VA_ARGS__)
8636
#define vsoxseg2ei8_v_i8m1(...) __riscv_vsoxseg2ei8_v_i8m1(__VA_ARGS__)
8637
#define vsoxseg3ei8_v_i8m1(...) __riscv_vsoxseg3ei8_v_i8m1(__VA_ARGS__)
8638
#define vsoxseg4ei8_v_i8m1(...) __riscv_vsoxseg4ei8_v_i8m1(__VA_ARGS__)
8639
#define vsoxseg5ei8_v_i8m1(...) __riscv_vsoxseg5ei8_v_i8m1(__VA_ARGS__)
8640
#define vsoxseg6ei8_v_i8m1(...) __riscv_vsoxseg6ei8_v_i8m1(__VA_ARGS__)
8641
#define vsoxseg7ei8_v_i8m1(...) __riscv_vsoxseg7ei8_v_i8m1(__VA_ARGS__)
8642
#define vsoxseg8ei8_v_i8m1(...) __riscv_vsoxseg8ei8_v_i8m1(__VA_ARGS__)
8643
#define vsoxseg2ei8_v_i8m2(...) __riscv_vsoxseg2ei8_v_i8m2(__VA_ARGS__)
8644
#define vsoxseg3ei8_v_i8m2(...) __riscv_vsoxseg3ei8_v_i8m2(__VA_ARGS__)
8645
#define vsoxseg4ei8_v_i8m2(...) __riscv_vsoxseg4ei8_v_i8m2(__VA_ARGS__)
8646
#define vsoxseg2ei8_v_i8m4(...) __riscv_vsoxseg2ei8_v_i8m4(__VA_ARGS__)
8647
#define vsoxseg2ei16_v_i8mf8(...) __riscv_vsoxseg2ei16_v_i8mf8(__VA_ARGS__)
8648
#define vsoxseg3ei16_v_i8mf8(...) __riscv_vsoxseg3ei16_v_i8mf8(__VA_ARGS__)
8649
#define vsoxseg4ei16_v_i8mf8(...) __riscv_vsoxseg4ei16_v_i8mf8(__VA_ARGS__)
8650
#define vsoxseg5ei16_v_i8mf8(...) __riscv_vsoxseg5ei16_v_i8mf8(__VA_ARGS__)
8651
#define vsoxseg6ei16_v_i8mf8(...) __riscv_vsoxseg6ei16_v_i8mf8(__VA_ARGS__)
8652
#define vsoxseg7ei16_v_i8mf8(...) __riscv_vsoxseg7ei16_v_i8mf8(__VA_ARGS__)
8653
#define vsoxseg8ei16_v_i8mf8(...) __riscv_vsoxseg8ei16_v_i8mf8(__VA_ARGS__)
8654
#define vsoxseg2ei16_v_i8mf4(...) __riscv_vsoxseg2ei16_v_i8mf4(__VA_ARGS__)
8655
#define vsoxseg3ei16_v_i8mf4(...) __riscv_vsoxseg3ei16_v_i8mf4(__VA_ARGS__)
8656
#define vsoxseg4ei16_v_i8mf4(...) __riscv_vsoxseg4ei16_v_i8mf4(__VA_ARGS__)
8657
#define vsoxseg5ei16_v_i8mf4(...) __riscv_vsoxseg5ei16_v_i8mf4(__VA_ARGS__)
8658
#define vsoxseg6ei16_v_i8mf4(...) __riscv_vsoxseg6ei16_v_i8mf4(__VA_ARGS__)
8659
#define vsoxseg7ei16_v_i8mf4(...) __riscv_vsoxseg7ei16_v_i8mf4(__VA_ARGS__)
8660
#define vsoxseg8ei16_v_i8mf4(...) __riscv_vsoxseg8ei16_v_i8mf4(__VA_ARGS__)
8661
#define vsoxseg2ei16_v_i8mf2(...) __riscv_vsoxseg2ei16_v_i8mf2(__VA_ARGS__)
8662
#define vsoxseg3ei16_v_i8mf2(...) __riscv_vsoxseg3ei16_v_i8mf2(__VA_ARGS__)
8663
#define vsoxseg4ei16_v_i8mf2(...) __riscv_vsoxseg4ei16_v_i8mf2(__VA_ARGS__)
8664
#define vsoxseg5ei16_v_i8mf2(...) __riscv_vsoxseg5ei16_v_i8mf2(__VA_ARGS__)
8665
#define vsoxseg6ei16_v_i8mf2(...) __riscv_vsoxseg6ei16_v_i8mf2(__VA_ARGS__)
8666
#define vsoxseg7ei16_v_i8mf2(...) __riscv_vsoxseg7ei16_v_i8mf2(__VA_ARGS__)
8667
#define vsoxseg8ei16_v_i8mf2(...) __riscv_vsoxseg8ei16_v_i8mf2(__VA_ARGS__)
8668
#define vsoxseg2ei16_v_i8m1(...) __riscv_vsoxseg2ei16_v_i8m1(__VA_ARGS__)
8669
#define vsoxseg3ei16_v_i8m1(...) __riscv_vsoxseg3ei16_v_i8m1(__VA_ARGS__)
8670
#define vsoxseg4ei16_v_i8m1(...) __riscv_vsoxseg4ei16_v_i8m1(__VA_ARGS__)
8671
#define vsoxseg5ei16_v_i8m1(...) __riscv_vsoxseg5ei16_v_i8m1(__VA_ARGS__)
8672
#define vsoxseg6ei16_v_i8m1(...) __riscv_vsoxseg6ei16_v_i8m1(__VA_ARGS__)
8673
#define vsoxseg7ei16_v_i8m1(...) __riscv_vsoxseg7ei16_v_i8m1(__VA_ARGS__)
8674
#define vsoxseg8ei16_v_i8m1(...) __riscv_vsoxseg8ei16_v_i8m1(__VA_ARGS__)
8675
#define vsoxseg2ei16_v_i8m2(...) __riscv_vsoxseg2ei16_v_i8m2(__VA_ARGS__)
8676
#define vsoxseg3ei16_v_i8m2(...) __riscv_vsoxseg3ei16_v_i8m2(__VA_ARGS__)
8677
#define vsoxseg4ei16_v_i8m2(...) __riscv_vsoxseg4ei16_v_i8m2(__VA_ARGS__)
8678
#define vsoxseg2ei16_v_i8m4(...) __riscv_vsoxseg2ei16_v_i8m4(__VA_ARGS__)
8679
#define vsoxseg2ei32_v_i8mf8(...) __riscv_vsoxseg2ei32_v_i8mf8(__VA_ARGS__)
8680
#define vsoxseg3ei32_v_i8mf8(...) __riscv_vsoxseg3ei32_v_i8mf8(__VA_ARGS__)
8681
#define vsoxseg4ei32_v_i8mf8(...) __riscv_vsoxseg4ei32_v_i8mf8(__VA_ARGS__)
8682
#define vsoxseg5ei32_v_i8mf8(...) __riscv_vsoxseg5ei32_v_i8mf8(__VA_ARGS__)
8683
#define vsoxseg6ei32_v_i8mf8(...) __riscv_vsoxseg6ei32_v_i8mf8(__VA_ARGS__)
8684
#define vsoxseg7ei32_v_i8mf8(...) __riscv_vsoxseg7ei32_v_i8mf8(__VA_ARGS__)
8685
#define vsoxseg8ei32_v_i8mf8(...) __riscv_vsoxseg8ei32_v_i8mf8(__VA_ARGS__)
8686
#define vsoxseg2ei32_v_i8mf4(...) __riscv_vsoxseg2ei32_v_i8mf4(__VA_ARGS__)
8687
#define vsoxseg3ei32_v_i8mf4(...) __riscv_vsoxseg3ei32_v_i8mf4(__VA_ARGS__)
8688
#define vsoxseg4ei32_v_i8mf4(...) __riscv_vsoxseg4ei32_v_i8mf4(__VA_ARGS__)
8689
#define vsoxseg5ei32_v_i8mf4(...) __riscv_vsoxseg5ei32_v_i8mf4(__VA_ARGS__)
8690
#define vsoxseg6ei32_v_i8mf4(...) __riscv_vsoxseg6ei32_v_i8mf4(__VA_ARGS__)
8691
#define vsoxseg7ei32_v_i8mf4(...) __riscv_vsoxseg7ei32_v_i8mf4(__VA_ARGS__)
8692
#define vsoxseg8ei32_v_i8mf4(...) __riscv_vsoxseg8ei32_v_i8mf4(__VA_ARGS__)
8693
#define vsoxseg2ei32_v_i8mf2(...) __riscv_vsoxseg2ei32_v_i8mf2(__VA_ARGS__)
8694
#define vsoxseg3ei32_v_i8mf2(...) __riscv_vsoxseg3ei32_v_i8mf2(__VA_ARGS__)
8695
#define vsoxseg4ei32_v_i8mf2(...) __riscv_vsoxseg4ei32_v_i8mf2(__VA_ARGS__)
8696
#define vsoxseg5ei32_v_i8mf2(...) __riscv_vsoxseg5ei32_v_i8mf2(__VA_ARGS__)
8697
#define vsoxseg6ei32_v_i8mf2(...) __riscv_vsoxseg6ei32_v_i8mf2(__VA_ARGS__)
8698
#define vsoxseg7ei32_v_i8mf2(...) __riscv_vsoxseg7ei32_v_i8mf2(__VA_ARGS__)
8699
#define vsoxseg8ei32_v_i8mf2(...) __riscv_vsoxseg8ei32_v_i8mf2(__VA_ARGS__)
8700
#define vsoxseg2ei32_v_i8m1(...) __riscv_vsoxseg2ei32_v_i8m1(__VA_ARGS__)
8701
#define vsoxseg3ei32_v_i8m1(...) __riscv_vsoxseg3ei32_v_i8m1(__VA_ARGS__)
8702
#define vsoxseg4ei32_v_i8m1(...) __riscv_vsoxseg4ei32_v_i8m1(__VA_ARGS__)
8703
#define vsoxseg5ei32_v_i8m1(...) __riscv_vsoxseg5ei32_v_i8m1(__VA_ARGS__)
8704
#define vsoxseg6ei32_v_i8m1(...) __riscv_vsoxseg6ei32_v_i8m1(__VA_ARGS__)
8705
#define vsoxseg7ei32_v_i8m1(...) __riscv_vsoxseg7ei32_v_i8m1(__VA_ARGS__)
8706
#define vsoxseg8ei32_v_i8m1(...) __riscv_vsoxseg8ei32_v_i8m1(__VA_ARGS__)
8707
#define vsoxseg2ei32_v_i8m2(...) __riscv_vsoxseg2ei32_v_i8m2(__VA_ARGS__)
8708
#define vsoxseg3ei32_v_i8m2(...) __riscv_vsoxseg3ei32_v_i8m2(__VA_ARGS__)
8709
#define vsoxseg4ei32_v_i8m2(...) __riscv_vsoxseg4ei32_v_i8m2(__VA_ARGS__)
8710
#define vsoxseg2ei64_v_i8mf8(...) __riscv_vsoxseg2ei64_v_i8mf8(__VA_ARGS__)
8711
#define vsoxseg3ei64_v_i8mf8(...) __riscv_vsoxseg3ei64_v_i8mf8(__VA_ARGS__)
8712
#define vsoxseg4ei64_v_i8mf8(...) __riscv_vsoxseg4ei64_v_i8mf8(__VA_ARGS__)
8713
#define vsoxseg5ei64_v_i8mf8(...) __riscv_vsoxseg5ei64_v_i8mf8(__VA_ARGS__)
8714
#define vsoxseg6ei64_v_i8mf8(...) __riscv_vsoxseg6ei64_v_i8mf8(__VA_ARGS__)
8715
#define vsoxseg7ei64_v_i8mf8(...) __riscv_vsoxseg7ei64_v_i8mf8(__VA_ARGS__)
8716
#define vsoxseg8ei64_v_i8mf8(...) __riscv_vsoxseg8ei64_v_i8mf8(__VA_ARGS__)
8717
#define vsoxseg2ei64_v_i8mf4(...) __riscv_vsoxseg2ei64_v_i8mf4(__VA_ARGS__)
8718
#define vsoxseg3ei64_v_i8mf4(...) __riscv_vsoxseg3ei64_v_i8mf4(__VA_ARGS__)
8719
#define vsoxseg4ei64_v_i8mf4(...) __riscv_vsoxseg4ei64_v_i8mf4(__VA_ARGS__)
8720
#define vsoxseg5ei64_v_i8mf4(...) __riscv_vsoxseg5ei64_v_i8mf4(__VA_ARGS__)
8721
#define vsoxseg6ei64_v_i8mf4(...) __riscv_vsoxseg6ei64_v_i8mf4(__VA_ARGS__)
8722
#define vsoxseg7ei64_v_i8mf4(...) __riscv_vsoxseg7ei64_v_i8mf4(__VA_ARGS__)
8723
#define vsoxseg8ei64_v_i8mf4(...) __riscv_vsoxseg8ei64_v_i8mf4(__VA_ARGS__)
8724
#define vsoxseg2ei64_v_i8mf2(...) __riscv_vsoxseg2ei64_v_i8mf2(__VA_ARGS__)
8725
#define vsoxseg3ei64_v_i8mf2(...) __riscv_vsoxseg3ei64_v_i8mf2(__VA_ARGS__)
8726
#define vsoxseg4ei64_v_i8mf2(...) __riscv_vsoxseg4ei64_v_i8mf2(__VA_ARGS__)
8727
#define vsoxseg5ei64_v_i8mf2(...) __riscv_vsoxseg5ei64_v_i8mf2(__VA_ARGS__)
8728
#define vsoxseg6ei64_v_i8mf2(...) __riscv_vsoxseg6ei64_v_i8mf2(__VA_ARGS__)
8729
#define vsoxseg7ei64_v_i8mf2(...) __riscv_vsoxseg7ei64_v_i8mf2(__VA_ARGS__)
8730
#define vsoxseg8ei64_v_i8mf2(...) __riscv_vsoxseg8ei64_v_i8mf2(__VA_ARGS__)
8731
#define vsoxseg2ei64_v_i8m1(...) __riscv_vsoxseg2ei64_v_i8m1(__VA_ARGS__)
8732
#define vsoxseg3ei64_v_i8m1(...) __riscv_vsoxseg3ei64_v_i8m1(__VA_ARGS__)
8733
#define vsoxseg4ei64_v_i8m1(...) __riscv_vsoxseg4ei64_v_i8m1(__VA_ARGS__)
8734
#define vsoxseg5ei64_v_i8m1(...) __riscv_vsoxseg5ei64_v_i8m1(__VA_ARGS__)
8735
#define vsoxseg6ei64_v_i8m1(...) __riscv_vsoxseg6ei64_v_i8m1(__VA_ARGS__)
8736
#define vsoxseg7ei64_v_i8m1(...) __riscv_vsoxseg7ei64_v_i8m1(__VA_ARGS__)
8737
#define vsoxseg8ei64_v_i8m1(...) __riscv_vsoxseg8ei64_v_i8m1(__VA_ARGS__)
8738
#define vsoxseg2ei8_v_i16mf4(...) __riscv_vsoxseg2ei8_v_i16mf4(__VA_ARGS__)
8739
#define vsoxseg3ei8_v_i16mf4(...) __riscv_vsoxseg3ei8_v_i16mf4(__VA_ARGS__)
8740
#define vsoxseg4ei8_v_i16mf4(...) __riscv_vsoxseg4ei8_v_i16mf4(__VA_ARGS__)
8741
#define vsoxseg5ei8_v_i16mf4(...) __riscv_vsoxseg5ei8_v_i16mf4(__VA_ARGS__)
8742
#define vsoxseg6ei8_v_i16mf4(...) __riscv_vsoxseg6ei8_v_i16mf4(__VA_ARGS__)
8743
#define vsoxseg7ei8_v_i16mf4(...) __riscv_vsoxseg7ei8_v_i16mf4(__VA_ARGS__)
8744
#define vsoxseg8ei8_v_i16mf4(...) __riscv_vsoxseg8ei8_v_i16mf4(__VA_ARGS__)
8745
#define vsoxseg2ei8_v_i16mf2(...) __riscv_vsoxseg2ei8_v_i16mf2(__VA_ARGS__)
8746
#define vsoxseg3ei8_v_i16mf2(...) __riscv_vsoxseg3ei8_v_i16mf2(__VA_ARGS__)
8747
#define vsoxseg4ei8_v_i16mf2(...) __riscv_vsoxseg4ei8_v_i16mf2(__VA_ARGS__)
8748
#define vsoxseg5ei8_v_i16mf2(...) __riscv_vsoxseg5ei8_v_i16mf2(__VA_ARGS__)
8749
#define vsoxseg6ei8_v_i16mf2(...) __riscv_vsoxseg6ei8_v_i16mf2(__VA_ARGS__)
8750
#define vsoxseg7ei8_v_i16mf2(...) __riscv_vsoxseg7ei8_v_i16mf2(__VA_ARGS__)
8751
#define vsoxseg8ei8_v_i16mf2(...) __riscv_vsoxseg8ei8_v_i16mf2(__VA_ARGS__)
8752
#define vsoxseg2ei8_v_i16m1(...) __riscv_vsoxseg2ei8_v_i16m1(__VA_ARGS__)
8753
#define vsoxseg3ei8_v_i16m1(...) __riscv_vsoxseg3ei8_v_i16m1(__VA_ARGS__)
8754
#define vsoxseg4ei8_v_i16m1(...) __riscv_vsoxseg4ei8_v_i16m1(__VA_ARGS__)
8755
#define vsoxseg5ei8_v_i16m1(...) __riscv_vsoxseg5ei8_v_i16m1(__VA_ARGS__)
8756
#define vsoxseg6ei8_v_i16m1(...) __riscv_vsoxseg6ei8_v_i16m1(__VA_ARGS__)
8757
#define vsoxseg7ei8_v_i16m1(...) __riscv_vsoxseg7ei8_v_i16m1(__VA_ARGS__)
8758
#define vsoxseg8ei8_v_i16m1(...) __riscv_vsoxseg8ei8_v_i16m1(__VA_ARGS__)
8759
#define vsoxseg2ei8_v_i16m2(...) __riscv_vsoxseg2ei8_v_i16m2(__VA_ARGS__)
8760
#define vsoxseg3ei8_v_i16m2(...) __riscv_vsoxseg3ei8_v_i16m2(__VA_ARGS__)
8761
#define vsoxseg4ei8_v_i16m2(...) __riscv_vsoxseg4ei8_v_i16m2(__VA_ARGS__)
8762
#define vsoxseg2ei8_v_i16m4(...) __riscv_vsoxseg2ei8_v_i16m4(__VA_ARGS__)
8763
#define vsoxseg2ei16_v_i16mf4(...) __riscv_vsoxseg2ei16_v_i16mf4(__VA_ARGS__)
8764
#define vsoxseg3ei16_v_i16mf4(...) __riscv_vsoxseg3ei16_v_i16mf4(__VA_ARGS__)
8765
#define vsoxseg4ei16_v_i16mf4(...) __riscv_vsoxseg4ei16_v_i16mf4(__VA_ARGS__)
8766
#define vsoxseg5ei16_v_i16mf4(...) __riscv_vsoxseg5ei16_v_i16mf4(__VA_ARGS__)
8767
#define vsoxseg6ei16_v_i16mf4(...) __riscv_vsoxseg6ei16_v_i16mf4(__VA_ARGS__)
8768
#define vsoxseg7ei16_v_i16mf4(...) __riscv_vsoxseg7ei16_v_i16mf4(__VA_ARGS__)
8769
#define vsoxseg8ei16_v_i16mf4(...) __riscv_vsoxseg8ei16_v_i16mf4(__VA_ARGS__)
8770
#define vsoxseg2ei16_v_i16mf2(...) __riscv_vsoxseg2ei16_v_i16mf2(__VA_ARGS__)
8771
#define vsoxseg3ei16_v_i16mf2(...) __riscv_vsoxseg3ei16_v_i16mf2(__VA_ARGS__)
8772
#define vsoxseg4ei16_v_i16mf2(...) __riscv_vsoxseg4ei16_v_i16mf2(__VA_ARGS__)
8773
#define vsoxseg5ei16_v_i16mf2(...) __riscv_vsoxseg5ei16_v_i16mf2(__VA_ARGS__)
8774
#define vsoxseg6ei16_v_i16mf2(...) __riscv_vsoxseg6ei16_v_i16mf2(__VA_ARGS__)
8775
#define vsoxseg7ei16_v_i16mf2(...) __riscv_vsoxseg7ei16_v_i16mf2(__VA_ARGS__)
8776
#define vsoxseg8ei16_v_i16mf2(...) __riscv_vsoxseg8ei16_v_i16mf2(__VA_ARGS__)
8777
#define vsoxseg2ei16_v_i16m1(...) __riscv_vsoxseg2ei16_v_i16m1(__VA_ARGS__)
8778
#define vsoxseg3ei16_v_i16m1(...) __riscv_vsoxseg3ei16_v_i16m1(__VA_ARGS__)
8779
#define vsoxseg4ei16_v_i16m1(...) __riscv_vsoxseg4ei16_v_i16m1(__VA_ARGS__)
8780
#define vsoxseg5ei16_v_i16m1(...) __riscv_vsoxseg5ei16_v_i16m1(__VA_ARGS__)
8781
#define vsoxseg6ei16_v_i16m1(...) __riscv_vsoxseg6ei16_v_i16m1(__VA_ARGS__)
8782
#define vsoxseg7ei16_v_i16m1(...) __riscv_vsoxseg7ei16_v_i16m1(__VA_ARGS__)
8783
#define vsoxseg8ei16_v_i16m1(...) __riscv_vsoxseg8ei16_v_i16m1(__VA_ARGS__)
8784
#define vsoxseg2ei16_v_i16m2(...) __riscv_vsoxseg2ei16_v_i16m2(__VA_ARGS__)
8785
#define vsoxseg3ei16_v_i16m2(...) __riscv_vsoxseg3ei16_v_i16m2(__VA_ARGS__)
8786
#define vsoxseg4ei16_v_i16m2(...) __riscv_vsoxseg4ei16_v_i16m2(__VA_ARGS__)
8787
#define vsoxseg2ei16_v_i16m4(...) __riscv_vsoxseg2ei16_v_i16m4(__VA_ARGS__)
8788
#define vsoxseg2ei32_v_i16mf4(...) __riscv_vsoxseg2ei32_v_i16mf4(__VA_ARGS__)
8789
#define vsoxseg3ei32_v_i16mf4(...) __riscv_vsoxseg3ei32_v_i16mf4(__VA_ARGS__)
8790
#define vsoxseg4ei32_v_i16mf4(...) __riscv_vsoxseg4ei32_v_i16mf4(__VA_ARGS__)
8791
#define vsoxseg5ei32_v_i16mf4(...) __riscv_vsoxseg5ei32_v_i16mf4(__VA_ARGS__)
8792
#define vsoxseg6ei32_v_i16mf4(...) __riscv_vsoxseg6ei32_v_i16mf4(__VA_ARGS__)
8793
#define vsoxseg7ei32_v_i16mf4(...) __riscv_vsoxseg7ei32_v_i16mf4(__VA_ARGS__)
8794
#define vsoxseg8ei32_v_i16mf4(...) __riscv_vsoxseg8ei32_v_i16mf4(__VA_ARGS__)
8795
#define vsoxseg2ei32_v_i16mf2(...) __riscv_vsoxseg2ei32_v_i16mf2(__VA_ARGS__)
8796
#define vsoxseg3ei32_v_i16mf2(...) __riscv_vsoxseg3ei32_v_i16mf2(__VA_ARGS__)
8797
#define vsoxseg4ei32_v_i16mf2(...) __riscv_vsoxseg4ei32_v_i16mf2(__VA_ARGS__)
8798
#define vsoxseg5ei32_v_i16mf2(...) __riscv_vsoxseg5ei32_v_i16mf2(__VA_ARGS__)
8799
#define vsoxseg6ei32_v_i16mf2(...) __riscv_vsoxseg6ei32_v_i16mf2(__VA_ARGS__)
8800
#define vsoxseg7ei32_v_i16mf2(...) __riscv_vsoxseg7ei32_v_i16mf2(__VA_ARGS__)
8801
#define vsoxseg8ei32_v_i16mf2(...) __riscv_vsoxseg8ei32_v_i16mf2(__VA_ARGS__)
8802
#define vsoxseg2ei32_v_i16m1(...) __riscv_vsoxseg2ei32_v_i16m1(__VA_ARGS__)
8803
#define vsoxseg3ei32_v_i16m1(...) __riscv_vsoxseg3ei32_v_i16m1(__VA_ARGS__)
8804
#define vsoxseg4ei32_v_i16m1(...) __riscv_vsoxseg4ei32_v_i16m1(__VA_ARGS__)
8805
#define vsoxseg5ei32_v_i16m1(...) __riscv_vsoxseg5ei32_v_i16m1(__VA_ARGS__)
8806
#define vsoxseg6ei32_v_i16m1(...) __riscv_vsoxseg6ei32_v_i16m1(__VA_ARGS__)
8807
#define vsoxseg7ei32_v_i16m1(...) __riscv_vsoxseg7ei32_v_i16m1(__VA_ARGS__)
8808
#define vsoxseg8ei32_v_i16m1(...) __riscv_vsoxseg8ei32_v_i16m1(__VA_ARGS__)
8809
#define vsoxseg2ei32_v_i16m2(...) __riscv_vsoxseg2ei32_v_i16m2(__VA_ARGS__)
8810
#define vsoxseg3ei32_v_i16m2(...) __riscv_vsoxseg3ei32_v_i16m2(__VA_ARGS__)
8811
#define vsoxseg4ei32_v_i16m2(...) __riscv_vsoxseg4ei32_v_i16m2(__VA_ARGS__)
8812
#define vsoxseg2ei32_v_i16m4(...) __riscv_vsoxseg2ei32_v_i16m4(__VA_ARGS__)
8813
#define vsoxseg2ei64_v_i16mf4(...) __riscv_vsoxseg2ei64_v_i16mf4(__VA_ARGS__)
8814
#define vsoxseg3ei64_v_i16mf4(...) __riscv_vsoxseg3ei64_v_i16mf4(__VA_ARGS__)
8815
#define vsoxseg4ei64_v_i16mf4(...) __riscv_vsoxseg4ei64_v_i16mf4(__VA_ARGS__)
8816
#define vsoxseg5ei64_v_i16mf4(...) __riscv_vsoxseg5ei64_v_i16mf4(__VA_ARGS__)
8817
#define vsoxseg6ei64_v_i16mf4(...) __riscv_vsoxseg6ei64_v_i16mf4(__VA_ARGS__)
8818
#define vsoxseg7ei64_v_i16mf4(...) __riscv_vsoxseg7ei64_v_i16mf4(__VA_ARGS__)
8819
#define vsoxseg8ei64_v_i16mf4(...) __riscv_vsoxseg8ei64_v_i16mf4(__VA_ARGS__)
8820
#define vsoxseg2ei64_v_i16mf2(...) __riscv_vsoxseg2ei64_v_i16mf2(__VA_ARGS__)
8821
#define vsoxseg3ei64_v_i16mf2(...) __riscv_vsoxseg3ei64_v_i16mf2(__VA_ARGS__)
8822
#define vsoxseg4ei64_v_i16mf2(...) __riscv_vsoxseg4ei64_v_i16mf2(__VA_ARGS__)
8823
#define vsoxseg5ei64_v_i16mf2(...) __riscv_vsoxseg5ei64_v_i16mf2(__VA_ARGS__)
8824
#define vsoxseg6ei64_v_i16mf2(...) __riscv_vsoxseg6ei64_v_i16mf2(__VA_ARGS__)
8825
#define vsoxseg7ei64_v_i16mf2(...) __riscv_vsoxseg7ei64_v_i16mf2(__VA_ARGS__)
8826
#define vsoxseg8ei64_v_i16mf2(...) __riscv_vsoxseg8ei64_v_i16mf2(__VA_ARGS__)
8827
#define vsoxseg2ei64_v_i16m1(...) __riscv_vsoxseg2ei64_v_i16m1(__VA_ARGS__)
8828
#define vsoxseg3ei64_v_i16m1(...) __riscv_vsoxseg3ei64_v_i16m1(__VA_ARGS__)
8829
#define vsoxseg4ei64_v_i16m1(...) __riscv_vsoxseg4ei64_v_i16m1(__VA_ARGS__)
8830
#define vsoxseg5ei64_v_i16m1(...) __riscv_vsoxseg5ei64_v_i16m1(__VA_ARGS__)
8831
#define vsoxseg6ei64_v_i16m1(...) __riscv_vsoxseg6ei64_v_i16m1(__VA_ARGS__)
8832
#define vsoxseg7ei64_v_i16m1(...) __riscv_vsoxseg7ei64_v_i16m1(__VA_ARGS__)
8833
#define vsoxseg8ei64_v_i16m1(...) __riscv_vsoxseg8ei64_v_i16m1(__VA_ARGS__)
8834
#define vsoxseg2ei64_v_i16m2(...) __riscv_vsoxseg2ei64_v_i16m2(__VA_ARGS__)
8835
#define vsoxseg3ei64_v_i16m2(...) __riscv_vsoxseg3ei64_v_i16m2(__VA_ARGS__)
8836
#define vsoxseg4ei64_v_i16m2(...) __riscv_vsoxseg4ei64_v_i16m2(__VA_ARGS__)
8837
#define vsoxseg2ei8_v_i32mf2(...) __riscv_vsoxseg2ei8_v_i32mf2(__VA_ARGS__)
8838
#define vsoxseg3ei8_v_i32mf2(...) __riscv_vsoxseg3ei8_v_i32mf2(__VA_ARGS__)
8839
#define vsoxseg4ei8_v_i32mf2(...) __riscv_vsoxseg4ei8_v_i32mf2(__VA_ARGS__)
8840
#define vsoxseg5ei8_v_i32mf2(...) __riscv_vsoxseg5ei8_v_i32mf2(__VA_ARGS__)
8841
#define vsoxseg6ei8_v_i32mf2(...) __riscv_vsoxseg6ei8_v_i32mf2(__VA_ARGS__)
8842
#define vsoxseg7ei8_v_i32mf2(...) __riscv_vsoxseg7ei8_v_i32mf2(__VA_ARGS__)
8843
#define vsoxseg8ei8_v_i32mf2(...) __riscv_vsoxseg8ei8_v_i32mf2(__VA_ARGS__)
8844
#define vsoxseg2ei8_v_i32m1(...) __riscv_vsoxseg2ei8_v_i32m1(__VA_ARGS__)
8845
#define vsoxseg3ei8_v_i32m1(...) __riscv_vsoxseg3ei8_v_i32m1(__VA_ARGS__)
8846
#define vsoxseg4ei8_v_i32m1(...) __riscv_vsoxseg4ei8_v_i32m1(__VA_ARGS__)
8847
#define vsoxseg5ei8_v_i32m1(...) __riscv_vsoxseg5ei8_v_i32m1(__VA_ARGS__)
8848
#define vsoxseg6ei8_v_i32m1(...) __riscv_vsoxseg6ei8_v_i32m1(__VA_ARGS__)
8849
#define vsoxseg7ei8_v_i32m1(...) __riscv_vsoxseg7ei8_v_i32m1(__VA_ARGS__)
8850
#define vsoxseg8ei8_v_i32m1(...) __riscv_vsoxseg8ei8_v_i32m1(__VA_ARGS__)
8851
#define vsoxseg2ei8_v_i32m2(...) __riscv_vsoxseg2ei8_v_i32m2(__VA_ARGS__)
8852
#define vsoxseg3ei8_v_i32m2(...) __riscv_vsoxseg3ei8_v_i32m2(__VA_ARGS__)
8853
#define vsoxseg4ei8_v_i32m2(...) __riscv_vsoxseg4ei8_v_i32m2(__VA_ARGS__)
8854
#define vsoxseg2ei8_v_i32m4(...) __riscv_vsoxseg2ei8_v_i32m4(__VA_ARGS__)
8855
#define vsoxseg2ei16_v_i32mf2(...) __riscv_vsoxseg2ei16_v_i32mf2(__VA_ARGS__)
8856
#define vsoxseg3ei16_v_i32mf2(...) __riscv_vsoxseg3ei16_v_i32mf2(__VA_ARGS__)
8857
#define vsoxseg4ei16_v_i32mf2(...) __riscv_vsoxseg4ei16_v_i32mf2(__VA_ARGS__)
8858
#define vsoxseg5ei16_v_i32mf2(...) __riscv_vsoxseg5ei16_v_i32mf2(__VA_ARGS__)
8859
#define vsoxseg6ei16_v_i32mf2(...) __riscv_vsoxseg6ei16_v_i32mf2(__VA_ARGS__)
8860
#define vsoxseg7ei16_v_i32mf2(...) __riscv_vsoxseg7ei16_v_i32mf2(__VA_ARGS__)
8861
#define vsoxseg8ei16_v_i32mf2(...) __riscv_vsoxseg8ei16_v_i32mf2(__VA_ARGS__)
8862
#define vsoxseg2ei16_v_i32m1(...) __riscv_vsoxseg2ei16_v_i32m1(__VA_ARGS__)
8863
#define vsoxseg3ei16_v_i32m1(...) __riscv_vsoxseg3ei16_v_i32m1(__VA_ARGS__)
8864
#define vsoxseg4ei16_v_i32m1(...) __riscv_vsoxseg4ei16_v_i32m1(__VA_ARGS__)
8865
#define vsoxseg5ei16_v_i32m1(...) __riscv_vsoxseg5ei16_v_i32m1(__VA_ARGS__)
8866
#define vsoxseg6ei16_v_i32m1(...) __riscv_vsoxseg6ei16_v_i32m1(__VA_ARGS__)
8867
#define vsoxseg7ei16_v_i32m1(...) __riscv_vsoxseg7ei16_v_i32m1(__VA_ARGS__)
8868
#define vsoxseg8ei16_v_i32m1(...) __riscv_vsoxseg8ei16_v_i32m1(__VA_ARGS__)
8869
#define vsoxseg2ei16_v_i32m2(...) __riscv_vsoxseg2ei16_v_i32m2(__VA_ARGS__)
8870
#define vsoxseg3ei16_v_i32m2(...) __riscv_vsoxseg3ei16_v_i32m2(__VA_ARGS__)
8871
#define vsoxseg4ei16_v_i32m2(...) __riscv_vsoxseg4ei16_v_i32m2(__VA_ARGS__)
8872
#define vsoxseg2ei16_v_i32m4(...) __riscv_vsoxseg2ei16_v_i32m4(__VA_ARGS__)
8873
#define vsoxseg2ei32_v_i32mf2(...) __riscv_vsoxseg2ei32_v_i32mf2(__VA_ARGS__)
8874
#define vsoxseg3ei32_v_i32mf2(...) __riscv_vsoxseg3ei32_v_i32mf2(__VA_ARGS__)
8875
#define vsoxseg4ei32_v_i32mf2(...) __riscv_vsoxseg4ei32_v_i32mf2(__VA_ARGS__)
8876
#define vsoxseg5ei32_v_i32mf2(...) __riscv_vsoxseg5ei32_v_i32mf2(__VA_ARGS__)
8877
#define vsoxseg6ei32_v_i32mf2(...) __riscv_vsoxseg6ei32_v_i32mf2(__VA_ARGS__)
8878
#define vsoxseg7ei32_v_i32mf2(...) __riscv_vsoxseg7ei32_v_i32mf2(__VA_ARGS__)
8879
#define vsoxseg8ei32_v_i32mf2(...) __riscv_vsoxseg8ei32_v_i32mf2(__VA_ARGS__)
8880
#define vsoxseg2ei32_v_i32m1(...) __riscv_vsoxseg2ei32_v_i32m1(__VA_ARGS__)
8881
#define vsoxseg3ei32_v_i32m1(...) __riscv_vsoxseg3ei32_v_i32m1(__VA_ARGS__)
8882
#define vsoxseg4ei32_v_i32m1(...) __riscv_vsoxseg4ei32_v_i32m1(__VA_ARGS__)
8883
#define vsoxseg5ei32_v_i32m1(...) __riscv_vsoxseg5ei32_v_i32m1(__VA_ARGS__)
8884
#define vsoxseg6ei32_v_i32m1(...) __riscv_vsoxseg6ei32_v_i32m1(__VA_ARGS__)
8885
#define vsoxseg7ei32_v_i32m1(...) __riscv_vsoxseg7ei32_v_i32m1(__VA_ARGS__)
8886
#define vsoxseg8ei32_v_i32m1(...) __riscv_vsoxseg8ei32_v_i32m1(__VA_ARGS__)
8887
#define vsoxseg2ei32_v_i32m2(...) __riscv_vsoxseg2ei32_v_i32m2(__VA_ARGS__)
8888
#define vsoxseg3ei32_v_i32m2(...) __riscv_vsoxseg3ei32_v_i32m2(__VA_ARGS__)
8889
#define vsoxseg4ei32_v_i32m2(...) __riscv_vsoxseg4ei32_v_i32m2(__VA_ARGS__)
8890
#define vsoxseg2ei32_v_i32m4(...) __riscv_vsoxseg2ei32_v_i32m4(__VA_ARGS__)
8891
#define vsoxseg2ei64_v_i32mf2(...) __riscv_vsoxseg2ei64_v_i32mf2(__VA_ARGS__)
8892
#define vsoxseg3ei64_v_i32mf2(...) __riscv_vsoxseg3ei64_v_i32mf2(__VA_ARGS__)
8893
#define vsoxseg4ei64_v_i32mf2(...) __riscv_vsoxseg4ei64_v_i32mf2(__VA_ARGS__)
8894
#define vsoxseg5ei64_v_i32mf2(...) __riscv_vsoxseg5ei64_v_i32mf2(__VA_ARGS__)
8895
#define vsoxseg6ei64_v_i32mf2(...) __riscv_vsoxseg6ei64_v_i32mf2(__VA_ARGS__)
8896
#define vsoxseg7ei64_v_i32mf2(...) __riscv_vsoxseg7ei64_v_i32mf2(__VA_ARGS__)
8897
#define vsoxseg8ei64_v_i32mf2(...) __riscv_vsoxseg8ei64_v_i32mf2(__VA_ARGS__)
8898
#define vsoxseg2ei64_v_i32m1(...) __riscv_vsoxseg2ei64_v_i32m1(__VA_ARGS__)
8899
#define vsoxseg3ei64_v_i32m1(...) __riscv_vsoxseg3ei64_v_i32m1(__VA_ARGS__)
8900
#define vsoxseg4ei64_v_i32m1(...) __riscv_vsoxseg4ei64_v_i32m1(__VA_ARGS__)
8901
#define vsoxseg5ei64_v_i32m1(...) __riscv_vsoxseg5ei64_v_i32m1(__VA_ARGS__)
8902
#define vsoxseg6ei64_v_i32m1(...) __riscv_vsoxseg6ei64_v_i32m1(__VA_ARGS__)
8903
#define vsoxseg7ei64_v_i32m1(...) __riscv_vsoxseg7ei64_v_i32m1(__VA_ARGS__)
8904
#define vsoxseg8ei64_v_i32m1(...) __riscv_vsoxseg8ei64_v_i32m1(__VA_ARGS__)
8905
#define vsoxseg2ei64_v_i32m2(...) __riscv_vsoxseg2ei64_v_i32m2(__VA_ARGS__)
8906
#define vsoxseg3ei64_v_i32m2(...) __riscv_vsoxseg3ei64_v_i32m2(__VA_ARGS__)
8907
#define vsoxseg4ei64_v_i32m2(...) __riscv_vsoxseg4ei64_v_i32m2(__VA_ARGS__)
8908
#define vsoxseg2ei64_v_i32m4(...) __riscv_vsoxseg2ei64_v_i32m4(__VA_ARGS__)
8909
#define vsoxseg2ei8_v_i64m1(...) __riscv_vsoxseg2ei8_v_i64m1(__VA_ARGS__)
8910
#define vsoxseg3ei8_v_i64m1(...) __riscv_vsoxseg3ei8_v_i64m1(__VA_ARGS__)
8911
#define vsoxseg4ei8_v_i64m1(...) __riscv_vsoxseg4ei8_v_i64m1(__VA_ARGS__)
8912
#define vsoxseg5ei8_v_i64m1(...) __riscv_vsoxseg5ei8_v_i64m1(__VA_ARGS__)
8913
#define vsoxseg6ei8_v_i64m1(...) __riscv_vsoxseg6ei8_v_i64m1(__VA_ARGS__)
8914
#define vsoxseg7ei8_v_i64m1(...) __riscv_vsoxseg7ei8_v_i64m1(__VA_ARGS__)
8915
#define vsoxseg8ei8_v_i64m1(...) __riscv_vsoxseg8ei8_v_i64m1(__VA_ARGS__)
8916
#define vsoxseg2ei8_v_i64m2(...) __riscv_vsoxseg2ei8_v_i64m2(__VA_ARGS__)
8917
#define vsoxseg3ei8_v_i64m2(...) __riscv_vsoxseg3ei8_v_i64m2(__VA_ARGS__)
8918
#define vsoxseg4ei8_v_i64m2(...) __riscv_vsoxseg4ei8_v_i64m2(__VA_ARGS__)
8919
#define vsoxseg2ei8_v_i64m4(...) __riscv_vsoxseg2ei8_v_i64m4(__VA_ARGS__)
8920
#define vsoxseg2ei16_v_i64m1(...) __riscv_vsoxseg2ei16_v_i64m1(__VA_ARGS__)
8921
#define vsoxseg3ei16_v_i64m1(...) __riscv_vsoxseg3ei16_v_i64m1(__VA_ARGS__)
8922
#define vsoxseg4ei16_v_i64m1(...) __riscv_vsoxseg4ei16_v_i64m1(__VA_ARGS__)
8923
#define vsoxseg5ei16_v_i64m1(...) __riscv_vsoxseg5ei16_v_i64m1(__VA_ARGS__)
8924
#define vsoxseg6ei16_v_i64m1(...) __riscv_vsoxseg6ei16_v_i64m1(__VA_ARGS__)
8925
#define vsoxseg7ei16_v_i64m1(...) __riscv_vsoxseg7ei16_v_i64m1(__VA_ARGS__)
8926
#define vsoxseg8ei16_v_i64m1(...) __riscv_vsoxseg8ei16_v_i64m1(__VA_ARGS__)
8927
#define vsoxseg2ei16_v_i64m2(...) __riscv_vsoxseg2ei16_v_i64m2(__VA_ARGS__)
8928
#define vsoxseg3ei16_v_i64m2(...) __riscv_vsoxseg3ei16_v_i64m2(__VA_ARGS__)
8929
#define vsoxseg4ei16_v_i64m2(...) __riscv_vsoxseg4ei16_v_i64m2(__VA_ARGS__)
8930
#define vsoxseg2ei16_v_i64m4(...) __riscv_vsoxseg2ei16_v_i64m4(__VA_ARGS__)
8931
#define vsoxseg2ei32_v_i64m1(...) __riscv_vsoxseg2ei32_v_i64m1(__VA_ARGS__)
8932
#define vsoxseg3ei32_v_i64m1(...) __riscv_vsoxseg3ei32_v_i64m1(__VA_ARGS__)
8933
#define vsoxseg4ei32_v_i64m1(...) __riscv_vsoxseg4ei32_v_i64m1(__VA_ARGS__)
8934
#define vsoxseg5ei32_v_i64m1(...) __riscv_vsoxseg5ei32_v_i64m1(__VA_ARGS__)
8935
#define vsoxseg6ei32_v_i64m1(...) __riscv_vsoxseg6ei32_v_i64m1(__VA_ARGS__)
8936
#define vsoxseg7ei32_v_i64m1(...) __riscv_vsoxseg7ei32_v_i64m1(__VA_ARGS__)
8937
#define vsoxseg8ei32_v_i64m1(...) __riscv_vsoxseg8ei32_v_i64m1(__VA_ARGS__)
8938
#define vsoxseg2ei32_v_i64m2(...) __riscv_vsoxseg2ei32_v_i64m2(__VA_ARGS__)
8939
#define vsoxseg3ei32_v_i64m2(...) __riscv_vsoxseg3ei32_v_i64m2(__VA_ARGS__)
8940
#define vsoxseg4ei32_v_i64m2(...) __riscv_vsoxseg4ei32_v_i64m2(__VA_ARGS__)
8941
#define vsoxseg2ei32_v_i64m4(...) __riscv_vsoxseg2ei32_v_i64m4(__VA_ARGS__)
8942
#define vsoxseg2ei64_v_i64m1(...) __riscv_vsoxseg2ei64_v_i64m1(__VA_ARGS__)
8943
#define vsoxseg3ei64_v_i64m1(...) __riscv_vsoxseg3ei64_v_i64m1(__VA_ARGS__)
8944
#define vsoxseg4ei64_v_i64m1(...) __riscv_vsoxseg4ei64_v_i64m1(__VA_ARGS__)
8945
#define vsoxseg5ei64_v_i64m1(...) __riscv_vsoxseg5ei64_v_i64m1(__VA_ARGS__)
8946
#define vsoxseg6ei64_v_i64m1(...) __riscv_vsoxseg6ei64_v_i64m1(__VA_ARGS__)
8947
#define vsoxseg7ei64_v_i64m1(...) __riscv_vsoxseg7ei64_v_i64m1(__VA_ARGS__)
8948
#define vsoxseg8ei64_v_i64m1(...) __riscv_vsoxseg8ei64_v_i64m1(__VA_ARGS__)
8949
#define vsoxseg2ei64_v_i64m2(...) __riscv_vsoxseg2ei64_v_i64m2(__VA_ARGS__)
8950
#define vsoxseg3ei64_v_i64m2(...) __riscv_vsoxseg3ei64_v_i64m2(__VA_ARGS__)
8951
#define vsoxseg4ei64_v_i64m2(...) __riscv_vsoxseg4ei64_v_i64m2(__VA_ARGS__)
8952
#define vsoxseg2ei64_v_i64m4(...) __riscv_vsoxseg2ei64_v_i64m4(__VA_ARGS__)
8953
#define vsuxseg2ei8_v_i8mf8(...) __riscv_vsuxseg2ei8_v_i8mf8(__VA_ARGS__)
8954
#define vsuxseg3ei8_v_i8mf8(...) __riscv_vsuxseg3ei8_v_i8mf8(__VA_ARGS__)
8955
#define vsuxseg4ei8_v_i8mf8(...) __riscv_vsuxseg4ei8_v_i8mf8(__VA_ARGS__)
8956
#define vsuxseg5ei8_v_i8mf8(...) __riscv_vsuxseg5ei8_v_i8mf8(__VA_ARGS__)
8957
#define vsuxseg6ei8_v_i8mf8(...) __riscv_vsuxseg6ei8_v_i8mf8(__VA_ARGS__)
8958
#define vsuxseg7ei8_v_i8mf8(...) __riscv_vsuxseg7ei8_v_i8mf8(__VA_ARGS__)
8959
#define vsuxseg8ei8_v_i8mf8(...) __riscv_vsuxseg8ei8_v_i8mf8(__VA_ARGS__)
8960
#define vsuxseg2ei8_v_i8mf4(...) __riscv_vsuxseg2ei8_v_i8mf4(__VA_ARGS__)
8961
#define vsuxseg3ei8_v_i8mf4(...) __riscv_vsuxseg3ei8_v_i8mf4(__VA_ARGS__)
8962
#define vsuxseg4ei8_v_i8mf4(...) __riscv_vsuxseg4ei8_v_i8mf4(__VA_ARGS__)
8963
#define vsuxseg5ei8_v_i8mf4(...) __riscv_vsuxseg5ei8_v_i8mf4(__VA_ARGS__)
8964
#define vsuxseg6ei8_v_i8mf4(...) __riscv_vsuxseg6ei8_v_i8mf4(__VA_ARGS__)
8965
#define vsuxseg7ei8_v_i8mf4(...) __riscv_vsuxseg7ei8_v_i8mf4(__VA_ARGS__)
8966
#define vsuxseg8ei8_v_i8mf4(...) __riscv_vsuxseg8ei8_v_i8mf4(__VA_ARGS__)
8967
#define vsuxseg2ei8_v_i8mf2(...) __riscv_vsuxseg2ei8_v_i8mf2(__VA_ARGS__)
8968
#define vsuxseg3ei8_v_i8mf2(...) __riscv_vsuxseg3ei8_v_i8mf2(__VA_ARGS__)
8969
#define vsuxseg4ei8_v_i8mf2(...) __riscv_vsuxseg4ei8_v_i8mf2(__VA_ARGS__)
8970
#define vsuxseg5ei8_v_i8mf2(...) __riscv_vsuxseg5ei8_v_i8mf2(__VA_ARGS__)
8971
#define vsuxseg6ei8_v_i8mf2(...) __riscv_vsuxseg6ei8_v_i8mf2(__VA_ARGS__)
8972
#define vsuxseg7ei8_v_i8mf2(...) __riscv_vsuxseg7ei8_v_i8mf2(__VA_ARGS__)
8973
#define vsuxseg8ei8_v_i8mf2(...) __riscv_vsuxseg8ei8_v_i8mf2(__VA_ARGS__)
8974
#define vsuxseg2ei8_v_i8m1(...) __riscv_vsuxseg2ei8_v_i8m1(__VA_ARGS__)
8975
#define vsuxseg3ei8_v_i8m1(...) __riscv_vsuxseg3ei8_v_i8m1(__VA_ARGS__)
8976
#define vsuxseg4ei8_v_i8m1(...) __riscv_vsuxseg4ei8_v_i8m1(__VA_ARGS__)
8977
#define vsuxseg5ei8_v_i8m1(...) __riscv_vsuxseg5ei8_v_i8m1(__VA_ARGS__)
8978
#define vsuxseg6ei8_v_i8m1(...) __riscv_vsuxseg6ei8_v_i8m1(__VA_ARGS__)
8979
#define vsuxseg7ei8_v_i8m1(...) __riscv_vsuxseg7ei8_v_i8m1(__VA_ARGS__)
8980
#define vsuxseg8ei8_v_i8m1(...) __riscv_vsuxseg8ei8_v_i8m1(__VA_ARGS__)
8981
#define vsuxseg2ei8_v_i8m2(...) __riscv_vsuxseg2ei8_v_i8m2(__VA_ARGS__)
8982
#define vsuxseg3ei8_v_i8m2(...) __riscv_vsuxseg3ei8_v_i8m2(__VA_ARGS__)
8983
#define vsuxseg4ei8_v_i8m2(...) __riscv_vsuxseg4ei8_v_i8m2(__VA_ARGS__)
8984
#define vsuxseg2ei8_v_i8m4(...) __riscv_vsuxseg2ei8_v_i8m4(__VA_ARGS__)
8985
#define vsuxseg2ei16_v_i8mf8(...) __riscv_vsuxseg2ei16_v_i8mf8(__VA_ARGS__)
8986
#define vsuxseg3ei16_v_i8mf8(...) __riscv_vsuxseg3ei16_v_i8mf8(__VA_ARGS__)
8987
#define vsuxseg4ei16_v_i8mf8(...) __riscv_vsuxseg4ei16_v_i8mf8(__VA_ARGS__)
8988
#define vsuxseg5ei16_v_i8mf8(...) __riscv_vsuxseg5ei16_v_i8mf8(__VA_ARGS__)
8989
#define vsuxseg6ei16_v_i8mf8(...) __riscv_vsuxseg6ei16_v_i8mf8(__VA_ARGS__)
8990
#define vsuxseg7ei16_v_i8mf8(...) __riscv_vsuxseg7ei16_v_i8mf8(__VA_ARGS__)
8991
#define vsuxseg8ei16_v_i8mf8(...) __riscv_vsuxseg8ei16_v_i8mf8(__VA_ARGS__)
8992
#define vsuxseg2ei16_v_i8mf4(...) __riscv_vsuxseg2ei16_v_i8mf4(__VA_ARGS__)
8993
#define vsuxseg3ei16_v_i8mf4(...) __riscv_vsuxseg3ei16_v_i8mf4(__VA_ARGS__)
8994
#define vsuxseg4ei16_v_i8mf4(...) __riscv_vsuxseg4ei16_v_i8mf4(__VA_ARGS__)
8995
#define vsuxseg5ei16_v_i8mf4(...) __riscv_vsuxseg5ei16_v_i8mf4(__VA_ARGS__)
8996
#define vsuxseg6ei16_v_i8mf4(...) __riscv_vsuxseg6ei16_v_i8mf4(__VA_ARGS__)
8997
#define vsuxseg7ei16_v_i8mf4(...) __riscv_vsuxseg7ei16_v_i8mf4(__VA_ARGS__)
8998
#define vsuxseg8ei16_v_i8mf4(...) __riscv_vsuxseg8ei16_v_i8mf4(__VA_ARGS__)
8999
#define vsuxseg2ei16_v_i8mf2(...) __riscv_vsuxseg2ei16_v_i8mf2(__VA_ARGS__)
9000
#define vsuxseg3ei16_v_i8mf2(...) __riscv_vsuxseg3ei16_v_i8mf2(__VA_ARGS__)
9001
#define vsuxseg4ei16_v_i8mf2(...) __riscv_vsuxseg4ei16_v_i8mf2(__VA_ARGS__)
9002
#define vsuxseg5ei16_v_i8mf2(...) __riscv_vsuxseg5ei16_v_i8mf2(__VA_ARGS__)
9003
#define vsuxseg6ei16_v_i8mf2(...) __riscv_vsuxseg6ei16_v_i8mf2(__VA_ARGS__)
9004
#define vsuxseg7ei16_v_i8mf2(...) __riscv_vsuxseg7ei16_v_i8mf2(__VA_ARGS__)
9005
#define vsuxseg8ei16_v_i8mf2(...) __riscv_vsuxseg8ei16_v_i8mf2(__VA_ARGS__)
9006
#define vsuxseg2ei16_v_i8m1(...) __riscv_vsuxseg2ei16_v_i8m1(__VA_ARGS__)
9007
#define vsuxseg3ei16_v_i8m1(...) __riscv_vsuxseg3ei16_v_i8m1(__VA_ARGS__)
9008
#define vsuxseg4ei16_v_i8m1(...) __riscv_vsuxseg4ei16_v_i8m1(__VA_ARGS__)
9009
#define vsuxseg5ei16_v_i8m1(...) __riscv_vsuxseg5ei16_v_i8m1(__VA_ARGS__)
9010
#define vsuxseg6ei16_v_i8m1(...) __riscv_vsuxseg6ei16_v_i8m1(__VA_ARGS__)
9011
#define vsuxseg7ei16_v_i8m1(...) __riscv_vsuxseg7ei16_v_i8m1(__VA_ARGS__)
9012
#define vsuxseg8ei16_v_i8m1(...) __riscv_vsuxseg8ei16_v_i8m1(__VA_ARGS__)
9013
#define vsuxseg2ei16_v_i8m2(...) __riscv_vsuxseg2ei16_v_i8m2(__VA_ARGS__)
9014
#define vsuxseg3ei16_v_i8m2(...) __riscv_vsuxseg3ei16_v_i8m2(__VA_ARGS__)
9015
#define vsuxseg4ei16_v_i8m2(...) __riscv_vsuxseg4ei16_v_i8m2(__VA_ARGS__)
9016
#define vsuxseg2ei16_v_i8m4(...) __riscv_vsuxseg2ei16_v_i8m4(__VA_ARGS__)
9017
#define vsuxseg2ei32_v_i8mf8(...) __riscv_vsuxseg2ei32_v_i8mf8(__VA_ARGS__)
9018
#define vsuxseg3ei32_v_i8mf8(...) __riscv_vsuxseg3ei32_v_i8mf8(__VA_ARGS__)
9019
#define vsuxseg4ei32_v_i8mf8(...) __riscv_vsuxseg4ei32_v_i8mf8(__VA_ARGS__)
9020
#define vsuxseg5ei32_v_i8mf8(...) __riscv_vsuxseg5ei32_v_i8mf8(__VA_ARGS__)
9021
#define vsuxseg6ei32_v_i8mf8(...) __riscv_vsuxseg6ei32_v_i8mf8(__VA_ARGS__)
9022
#define vsuxseg7ei32_v_i8mf8(...) __riscv_vsuxseg7ei32_v_i8mf8(__VA_ARGS__)
9023
#define vsuxseg8ei32_v_i8mf8(...) __riscv_vsuxseg8ei32_v_i8mf8(__VA_ARGS__)
9024
#define vsuxseg2ei32_v_i8mf4(...) __riscv_vsuxseg2ei32_v_i8mf4(__VA_ARGS__)
9025
#define vsuxseg3ei32_v_i8mf4(...) __riscv_vsuxseg3ei32_v_i8mf4(__VA_ARGS__)
9026
#define vsuxseg4ei32_v_i8mf4(...) __riscv_vsuxseg4ei32_v_i8mf4(__VA_ARGS__)
9027
#define vsuxseg5ei32_v_i8mf4(...) __riscv_vsuxseg5ei32_v_i8mf4(__VA_ARGS__)
9028
#define vsuxseg6ei32_v_i8mf4(...) __riscv_vsuxseg6ei32_v_i8mf4(__VA_ARGS__)
9029
#define vsuxseg7ei32_v_i8mf4(...) __riscv_vsuxseg7ei32_v_i8mf4(__VA_ARGS__)
9030
#define vsuxseg8ei32_v_i8mf4(...) __riscv_vsuxseg8ei32_v_i8mf4(__VA_ARGS__)
9031
#define vsuxseg2ei32_v_i8mf2(...) __riscv_vsuxseg2ei32_v_i8mf2(__VA_ARGS__)
9032
#define vsuxseg3ei32_v_i8mf2(...) __riscv_vsuxseg3ei32_v_i8mf2(__VA_ARGS__)
9033
#define vsuxseg4ei32_v_i8mf2(...) __riscv_vsuxseg4ei32_v_i8mf2(__VA_ARGS__)
9034
#define vsuxseg5ei32_v_i8mf2(...) __riscv_vsuxseg5ei32_v_i8mf2(__VA_ARGS__)
9035
#define vsuxseg6ei32_v_i8mf2(...) __riscv_vsuxseg6ei32_v_i8mf2(__VA_ARGS__)
9036
#define vsuxseg7ei32_v_i8mf2(...) __riscv_vsuxseg7ei32_v_i8mf2(__VA_ARGS__)
9037
#define vsuxseg8ei32_v_i8mf2(...) __riscv_vsuxseg8ei32_v_i8mf2(__VA_ARGS__)
9038
#define vsuxseg2ei32_v_i8m1(...) __riscv_vsuxseg2ei32_v_i8m1(__VA_ARGS__)
9039
#define vsuxseg3ei32_v_i8m1(...) __riscv_vsuxseg3ei32_v_i8m1(__VA_ARGS__)
9040
#define vsuxseg4ei32_v_i8m1(...) __riscv_vsuxseg4ei32_v_i8m1(__VA_ARGS__)
9041
#define vsuxseg5ei32_v_i8m1(...) __riscv_vsuxseg5ei32_v_i8m1(__VA_ARGS__)
9042
#define vsuxseg6ei32_v_i8m1(...) __riscv_vsuxseg6ei32_v_i8m1(__VA_ARGS__)
9043
#define vsuxseg7ei32_v_i8m1(...) __riscv_vsuxseg7ei32_v_i8m1(__VA_ARGS__)
9044
#define vsuxseg8ei32_v_i8m1(...) __riscv_vsuxseg8ei32_v_i8m1(__VA_ARGS__)
9045
#define vsuxseg2ei32_v_i8m2(...) __riscv_vsuxseg2ei32_v_i8m2(__VA_ARGS__)
9046
#define vsuxseg3ei32_v_i8m2(...) __riscv_vsuxseg3ei32_v_i8m2(__VA_ARGS__)
9047
#define vsuxseg4ei32_v_i8m2(...) __riscv_vsuxseg4ei32_v_i8m2(__VA_ARGS__)
9048
#define vsuxseg2ei64_v_i8mf8(...) __riscv_vsuxseg2ei64_v_i8mf8(__VA_ARGS__)
9049
#define vsuxseg3ei64_v_i8mf8(...) __riscv_vsuxseg3ei64_v_i8mf8(__VA_ARGS__)
9050
#define vsuxseg4ei64_v_i8mf8(...) __riscv_vsuxseg4ei64_v_i8mf8(__VA_ARGS__)
9051
#define vsuxseg5ei64_v_i8mf8(...) __riscv_vsuxseg5ei64_v_i8mf8(__VA_ARGS__)
9052
#define vsuxseg6ei64_v_i8mf8(...) __riscv_vsuxseg6ei64_v_i8mf8(__VA_ARGS__)
9053
#define vsuxseg7ei64_v_i8mf8(...) __riscv_vsuxseg7ei64_v_i8mf8(__VA_ARGS__)
9054
#define vsuxseg8ei64_v_i8mf8(...) __riscv_vsuxseg8ei64_v_i8mf8(__VA_ARGS__)
9055
#define vsuxseg2ei64_v_i8mf4(...) __riscv_vsuxseg2ei64_v_i8mf4(__VA_ARGS__)
9056
#define vsuxseg3ei64_v_i8mf4(...) __riscv_vsuxseg3ei64_v_i8mf4(__VA_ARGS__)
9057
#define vsuxseg4ei64_v_i8mf4(...) __riscv_vsuxseg4ei64_v_i8mf4(__VA_ARGS__)
9058
#define vsuxseg5ei64_v_i8mf4(...) __riscv_vsuxseg5ei64_v_i8mf4(__VA_ARGS__)
9059
#define vsuxseg6ei64_v_i8mf4(...) __riscv_vsuxseg6ei64_v_i8mf4(__VA_ARGS__)
9060
#define vsuxseg7ei64_v_i8mf4(...) __riscv_vsuxseg7ei64_v_i8mf4(__VA_ARGS__)
9061
#define vsuxseg8ei64_v_i8mf4(...) __riscv_vsuxseg8ei64_v_i8mf4(__VA_ARGS__)
9062
#define vsuxseg2ei64_v_i8mf2(...) __riscv_vsuxseg2ei64_v_i8mf2(__VA_ARGS__)
9063
#define vsuxseg3ei64_v_i8mf2(...) __riscv_vsuxseg3ei64_v_i8mf2(__VA_ARGS__)
9064
#define vsuxseg4ei64_v_i8mf2(...) __riscv_vsuxseg4ei64_v_i8mf2(__VA_ARGS__)
9065
#define vsuxseg5ei64_v_i8mf2(...) __riscv_vsuxseg5ei64_v_i8mf2(__VA_ARGS__)
9066
#define vsuxseg6ei64_v_i8mf2(...) __riscv_vsuxseg6ei64_v_i8mf2(__VA_ARGS__)
9067
#define vsuxseg7ei64_v_i8mf2(...) __riscv_vsuxseg7ei64_v_i8mf2(__VA_ARGS__)
9068
#define vsuxseg8ei64_v_i8mf2(...) __riscv_vsuxseg8ei64_v_i8mf2(__VA_ARGS__)
9069
#define vsuxseg2ei64_v_i8m1(...) __riscv_vsuxseg2ei64_v_i8m1(__VA_ARGS__)
9070
#define vsuxseg3ei64_v_i8m1(...) __riscv_vsuxseg3ei64_v_i8m1(__VA_ARGS__)
9071
#define vsuxseg4ei64_v_i8m1(...) __riscv_vsuxseg4ei64_v_i8m1(__VA_ARGS__)
9072
#define vsuxseg5ei64_v_i8m1(...) __riscv_vsuxseg5ei64_v_i8m1(__VA_ARGS__)
9073
#define vsuxseg6ei64_v_i8m1(...) __riscv_vsuxseg6ei64_v_i8m1(__VA_ARGS__)
9074
#define vsuxseg7ei64_v_i8m1(...) __riscv_vsuxseg7ei64_v_i8m1(__VA_ARGS__)
9075
#define vsuxseg8ei64_v_i8m1(...) __riscv_vsuxseg8ei64_v_i8m1(__VA_ARGS__)
9076
#define vsuxseg2ei8_v_i16mf4(...) __riscv_vsuxseg2ei8_v_i16mf4(__VA_ARGS__)
9077
#define vsuxseg3ei8_v_i16mf4(...) __riscv_vsuxseg3ei8_v_i16mf4(__VA_ARGS__)
9078
#define vsuxseg4ei8_v_i16mf4(...) __riscv_vsuxseg4ei8_v_i16mf4(__VA_ARGS__)
9079
#define vsuxseg5ei8_v_i16mf4(...) __riscv_vsuxseg5ei8_v_i16mf4(__VA_ARGS__)
9080
#define vsuxseg6ei8_v_i16mf4(...) __riscv_vsuxseg6ei8_v_i16mf4(__VA_ARGS__)
9081
#define vsuxseg7ei8_v_i16mf4(...) __riscv_vsuxseg7ei8_v_i16mf4(__VA_ARGS__)
9082
#define vsuxseg8ei8_v_i16mf4(...) __riscv_vsuxseg8ei8_v_i16mf4(__VA_ARGS__)
9083
#define vsuxseg2ei8_v_i16mf2(...) __riscv_vsuxseg2ei8_v_i16mf2(__VA_ARGS__)
9084
#define vsuxseg3ei8_v_i16mf2(...) __riscv_vsuxseg3ei8_v_i16mf2(__VA_ARGS__)
9085
#define vsuxseg4ei8_v_i16mf2(...) __riscv_vsuxseg4ei8_v_i16mf2(__VA_ARGS__)
9086
#define vsuxseg5ei8_v_i16mf2(...) __riscv_vsuxseg5ei8_v_i16mf2(__VA_ARGS__)
9087
#define vsuxseg6ei8_v_i16mf2(...) __riscv_vsuxseg6ei8_v_i16mf2(__VA_ARGS__)
9088
#define vsuxseg7ei8_v_i16mf2(...) __riscv_vsuxseg7ei8_v_i16mf2(__VA_ARGS__)
9089
#define vsuxseg8ei8_v_i16mf2(...) __riscv_vsuxseg8ei8_v_i16mf2(__VA_ARGS__)
9090
#define vsuxseg2ei8_v_i16m1(...) __riscv_vsuxseg2ei8_v_i16m1(__VA_ARGS__)
9091
#define vsuxseg3ei8_v_i16m1(...) __riscv_vsuxseg3ei8_v_i16m1(__VA_ARGS__)
9092
#define vsuxseg4ei8_v_i16m1(...) __riscv_vsuxseg4ei8_v_i16m1(__VA_ARGS__)
9093
#define vsuxseg5ei8_v_i16m1(...) __riscv_vsuxseg5ei8_v_i16m1(__VA_ARGS__)
9094
#define vsuxseg6ei8_v_i16m1(...) __riscv_vsuxseg6ei8_v_i16m1(__VA_ARGS__)
9095
#define vsuxseg7ei8_v_i16m1(...) __riscv_vsuxseg7ei8_v_i16m1(__VA_ARGS__)
9096
#define vsuxseg8ei8_v_i16m1(...) __riscv_vsuxseg8ei8_v_i16m1(__VA_ARGS__)
9097
#define vsuxseg2ei8_v_i16m2(...) __riscv_vsuxseg2ei8_v_i16m2(__VA_ARGS__)
9098
#define vsuxseg3ei8_v_i16m2(...) __riscv_vsuxseg3ei8_v_i16m2(__VA_ARGS__)
9099
#define vsuxseg4ei8_v_i16m2(...) __riscv_vsuxseg4ei8_v_i16m2(__VA_ARGS__)
9100
#define vsuxseg2ei8_v_i16m4(...) __riscv_vsuxseg2ei8_v_i16m4(__VA_ARGS__)
9101
#define vsuxseg2ei16_v_i16mf4(...) __riscv_vsuxseg2ei16_v_i16mf4(__VA_ARGS__)
9102
#define vsuxseg3ei16_v_i16mf4(...) __riscv_vsuxseg3ei16_v_i16mf4(__VA_ARGS__)
9103
#define vsuxseg4ei16_v_i16mf4(...) __riscv_vsuxseg4ei16_v_i16mf4(__VA_ARGS__)
9104
#define vsuxseg5ei16_v_i16mf4(...) __riscv_vsuxseg5ei16_v_i16mf4(__VA_ARGS__)
9105
#define vsuxseg6ei16_v_i16mf4(...) __riscv_vsuxseg6ei16_v_i16mf4(__VA_ARGS__)
9106
#define vsuxseg7ei16_v_i16mf4(...) __riscv_vsuxseg7ei16_v_i16mf4(__VA_ARGS__)
9107
#define vsuxseg8ei16_v_i16mf4(...) __riscv_vsuxseg8ei16_v_i16mf4(__VA_ARGS__)
9108
#define vsuxseg2ei16_v_i16mf2(...) __riscv_vsuxseg2ei16_v_i16mf2(__VA_ARGS__)
9109
#define vsuxseg3ei16_v_i16mf2(...) __riscv_vsuxseg3ei16_v_i16mf2(__VA_ARGS__)
9110
#define vsuxseg4ei16_v_i16mf2(...) __riscv_vsuxseg4ei16_v_i16mf2(__VA_ARGS__)
9111
#define vsuxseg5ei16_v_i16mf2(...) __riscv_vsuxseg5ei16_v_i16mf2(__VA_ARGS__)
9112
#define vsuxseg6ei16_v_i16mf2(...) __riscv_vsuxseg6ei16_v_i16mf2(__VA_ARGS__)
9113
#define vsuxseg7ei16_v_i16mf2(...) __riscv_vsuxseg7ei16_v_i16mf2(__VA_ARGS__)
9114
#define vsuxseg8ei16_v_i16mf2(...) __riscv_vsuxseg8ei16_v_i16mf2(__VA_ARGS__)
9115
#define vsuxseg2ei16_v_i16m1(...) __riscv_vsuxseg2ei16_v_i16m1(__VA_ARGS__)
9116
#define vsuxseg3ei16_v_i16m1(...) __riscv_vsuxseg3ei16_v_i16m1(__VA_ARGS__)
9117
#define vsuxseg4ei16_v_i16m1(...) __riscv_vsuxseg4ei16_v_i16m1(__VA_ARGS__)
9118
#define vsuxseg5ei16_v_i16m1(...) __riscv_vsuxseg5ei16_v_i16m1(__VA_ARGS__)
9119
#define vsuxseg6ei16_v_i16m1(...) __riscv_vsuxseg6ei16_v_i16m1(__VA_ARGS__)
9120
#define vsuxseg7ei16_v_i16m1(...) __riscv_vsuxseg7ei16_v_i16m1(__VA_ARGS__)
9121
#define vsuxseg8ei16_v_i16m1(...) __riscv_vsuxseg8ei16_v_i16m1(__VA_ARGS__)
9122
#define vsuxseg2ei16_v_i16m2(...) __riscv_vsuxseg2ei16_v_i16m2(__VA_ARGS__)
9123
#define vsuxseg3ei16_v_i16m2(...) __riscv_vsuxseg3ei16_v_i16m2(__VA_ARGS__)
9124
#define vsuxseg4ei16_v_i16m2(...) __riscv_vsuxseg4ei16_v_i16m2(__VA_ARGS__)
9125
#define vsuxseg2ei16_v_i16m4(...) __riscv_vsuxseg2ei16_v_i16m4(__VA_ARGS__)
9126
#define vsuxseg2ei32_v_i16mf4(...) __riscv_vsuxseg2ei32_v_i16mf4(__VA_ARGS__)
9127
#define vsuxseg3ei32_v_i16mf4(...) __riscv_vsuxseg3ei32_v_i16mf4(__VA_ARGS__)
9128
#define vsuxseg4ei32_v_i16mf4(...) __riscv_vsuxseg4ei32_v_i16mf4(__VA_ARGS__)
9129
#define vsuxseg5ei32_v_i16mf4(...) __riscv_vsuxseg5ei32_v_i16mf4(__VA_ARGS__)
9130
#define vsuxseg6ei32_v_i16mf4(...) __riscv_vsuxseg6ei32_v_i16mf4(__VA_ARGS__)
9131
#define vsuxseg7ei32_v_i16mf4(...) __riscv_vsuxseg7ei32_v_i16mf4(__VA_ARGS__)
9132
#define vsuxseg8ei32_v_i16mf4(...) __riscv_vsuxseg8ei32_v_i16mf4(__VA_ARGS__)
9133
#define vsuxseg2ei32_v_i16mf2(...) __riscv_vsuxseg2ei32_v_i16mf2(__VA_ARGS__)
9134
#define vsuxseg3ei32_v_i16mf2(...) __riscv_vsuxseg3ei32_v_i16mf2(__VA_ARGS__)
9135
#define vsuxseg4ei32_v_i16mf2(...) __riscv_vsuxseg4ei32_v_i16mf2(__VA_ARGS__)
9136
#define vsuxseg5ei32_v_i16mf2(...) __riscv_vsuxseg5ei32_v_i16mf2(__VA_ARGS__)
9137
#define vsuxseg6ei32_v_i16mf2(...) __riscv_vsuxseg6ei32_v_i16mf2(__VA_ARGS__)
9138
#define vsuxseg7ei32_v_i16mf2(...) __riscv_vsuxseg7ei32_v_i16mf2(__VA_ARGS__)
9139
#define vsuxseg8ei32_v_i16mf2(...) __riscv_vsuxseg8ei32_v_i16mf2(__VA_ARGS__)
9140
#define vsuxseg2ei32_v_i16m1(...) __riscv_vsuxseg2ei32_v_i16m1(__VA_ARGS__)
9141
#define vsuxseg3ei32_v_i16m1(...) __riscv_vsuxseg3ei32_v_i16m1(__VA_ARGS__)
9142
#define vsuxseg4ei32_v_i16m1(...) __riscv_vsuxseg4ei32_v_i16m1(__VA_ARGS__)
9143
#define vsuxseg5ei32_v_i16m1(...) __riscv_vsuxseg5ei32_v_i16m1(__VA_ARGS__)
9144
#define vsuxseg6ei32_v_i16m1(...) __riscv_vsuxseg6ei32_v_i16m1(__VA_ARGS__)
9145
#define vsuxseg7ei32_v_i16m1(...) __riscv_vsuxseg7ei32_v_i16m1(__VA_ARGS__)
9146
#define vsuxseg8ei32_v_i16m1(...) __riscv_vsuxseg8ei32_v_i16m1(__VA_ARGS__)
9147
#define vsuxseg2ei32_v_i16m2(...) __riscv_vsuxseg2ei32_v_i16m2(__VA_ARGS__)
9148
#define vsuxseg3ei32_v_i16m2(...) __riscv_vsuxseg3ei32_v_i16m2(__VA_ARGS__)
9149
#define vsuxseg4ei32_v_i16m2(...) __riscv_vsuxseg4ei32_v_i16m2(__VA_ARGS__)
9150
#define vsuxseg2ei32_v_i16m4(...) __riscv_vsuxseg2ei32_v_i16m4(__VA_ARGS__)
9151
#define vsuxseg2ei64_v_i16mf4(...) __riscv_vsuxseg2ei64_v_i16mf4(__VA_ARGS__)
9152
#define vsuxseg3ei64_v_i16mf4(...) __riscv_vsuxseg3ei64_v_i16mf4(__VA_ARGS__)
9153
#define vsuxseg4ei64_v_i16mf4(...) __riscv_vsuxseg4ei64_v_i16mf4(__VA_ARGS__)
9154
#define vsuxseg5ei64_v_i16mf4(...) __riscv_vsuxseg5ei64_v_i16mf4(__VA_ARGS__)
9155
#define vsuxseg6ei64_v_i16mf4(...) __riscv_vsuxseg6ei64_v_i16mf4(__VA_ARGS__)
9156
#define vsuxseg7ei64_v_i16mf4(...) __riscv_vsuxseg7ei64_v_i16mf4(__VA_ARGS__)
9157
#define vsuxseg8ei64_v_i16mf4(...) __riscv_vsuxseg8ei64_v_i16mf4(__VA_ARGS__)
9158
#define vsuxseg2ei64_v_i16mf2(...) __riscv_vsuxseg2ei64_v_i16mf2(__VA_ARGS__)
9159
#define vsuxseg3ei64_v_i16mf2(...) __riscv_vsuxseg3ei64_v_i16mf2(__VA_ARGS__)
9160
#define vsuxseg4ei64_v_i16mf2(...) __riscv_vsuxseg4ei64_v_i16mf2(__VA_ARGS__)
9161
#define vsuxseg5ei64_v_i16mf2(...) __riscv_vsuxseg5ei64_v_i16mf2(__VA_ARGS__)
9162
#define vsuxseg6ei64_v_i16mf2(...) __riscv_vsuxseg6ei64_v_i16mf2(__VA_ARGS__)
9163
#define vsuxseg7ei64_v_i16mf2(...) __riscv_vsuxseg7ei64_v_i16mf2(__VA_ARGS__)
9164
#define vsuxseg8ei64_v_i16mf2(...) __riscv_vsuxseg8ei64_v_i16mf2(__VA_ARGS__)
9165
#define vsuxseg2ei64_v_i16m1(...) __riscv_vsuxseg2ei64_v_i16m1(__VA_ARGS__)
9166
#define vsuxseg3ei64_v_i16m1(...) __riscv_vsuxseg3ei64_v_i16m1(__VA_ARGS__)
9167
#define vsuxseg4ei64_v_i16m1(...) __riscv_vsuxseg4ei64_v_i16m1(__VA_ARGS__)
9168
#define vsuxseg5ei64_v_i16m1(...) __riscv_vsuxseg5ei64_v_i16m1(__VA_ARGS__)
9169
#define vsuxseg6ei64_v_i16m1(...) __riscv_vsuxseg6ei64_v_i16m1(__VA_ARGS__)
9170
#define vsuxseg7ei64_v_i16m1(...) __riscv_vsuxseg7ei64_v_i16m1(__VA_ARGS__)
9171
#define vsuxseg8ei64_v_i16m1(...) __riscv_vsuxseg8ei64_v_i16m1(__VA_ARGS__)
9172
#define vsuxseg2ei64_v_i16m2(...) __riscv_vsuxseg2ei64_v_i16m2(__VA_ARGS__)
9173
#define vsuxseg3ei64_v_i16m2(...) __riscv_vsuxseg3ei64_v_i16m2(__VA_ARGS__)
9174
#define vsuxseg4ei64_v_i16m2(...) __riscv_vsuxseg4ei64_v_i16m2(__VA_ARGS__)
9175
#define vsuxseg2ei8_v_i32mf2(...) __riscv_vsuxseg2ei8_v_i32mf2(__VA_ARGS__)
9176
#define vsuxseg3ei8_v_i32mf2(...) __riscv_vsuxseg3ei8_v_i32mf2(__VA_ARGS__)
9177
#define vsuxseg4ei8_v_i32mf2(...) __riscv_vsuxseg4ei8_v_i32mf2(__VA_ARGS__)
9178
#define vsuxseg5ei8_v_i32mf2(...) __riscv_vsuxseg5ei8_v_i32mf2(__VA_ARGS__)
9179
#define vsuxseg6ei8_v_i32mf2(...) __riscv_vsuxseg6ei8_v_i32mf2(__VA_ARGS__)
9180
#define vsuxseg7ei8_v_i32mf2(...) __riscv_vsuxseg7ei8_v_i32mf2(__VA_ARGS__)
9181
#define vsuxseg8ei8_v_i32mf2(...) __riscv_vsuxseg8ei8_v_i32mf2(__VA_ARGS__)
9182
#define vsuxseg2ei8_v_i32m1(...) __riscv_vsuxseg2ei8_v_i32m1(__VA_ARGS__)
9183
#define vsuxseg3ei8_v_i32m1(...) __riscv_vsuxseg3ei8_v_i32m1(__VA_ARGS__)
9184
#define vsuxseg4ei8_v_i32m1(...) __riscv_vsuxseg4ei8_v_i32m1(__VA_ARGS__)
9185
#define vsuxseg5ei8_v_i32m1(...) __riscv_vsuxseg5ei8_v_i32m1(__VA_ARGS__)
9186
#define vsuxseg6ei8_v_i32m1(...) __riscv_vsuxseg6ei8_v_i32m1(__VA_ARGS__)
9187
#define vsuxseg7ei8_v_i32m1(...) __riscv_vsuxseg7ei8_v_i32m1(__VA_ARGS__)
9188
#define vsuxseg8ei8_v_i32m1(...) __riscv_vsuxseg8ei8_v_i32m1(__VA_ARGS__)
9189
#define vsuxseg2ei8_v_i32m2(...) __riscv_vsuxseg2ei8_v_i32m2(__VA_ARGS__)
9190
#define vsuxseg3ei8_v_i32m2(...) __riscv_vsuxseg3ei8_v_i32m2(__VA_ARGS__)
9191
#define vsuxseg4ei8_v_i32m2(...) __riscv_vsuxseg4ei8_v_i32m2(__VA_ARGS__)
9192
#define vsuxseg2ei8_v_i32m4(...) __riscv_vsuxseg2ei8_v_i32m4(__VA_ARGS__)
9193
#define vsuxseg2ei16_v_i32mf2(...) __riscv_vsuxseg2ei16_v_i32mf2(__VA_ARGS__)
9194
#define vsuxseg3ei16_v_i32mf2(...) __riscv_vsuxseg3ei16_v_i32mf2(__VA_ARGS__)
9195
#define vsuxseg4ei16_v_i32mf2(...) __riscv_vsuxseg4ei16_v_i32mf2(__VA_ARGS__)
9196
#define vsuxseg5ei16_v_i32mf2(...) __riscv_vsuxseg5ei16_v_i32mf2(__VA_ARGS__)
9197
#define vsuxseg6ei16_v_i32mf2(...) __riscv_vsuxseg6ei16_v_i32mf2(__VA_ARGS__)
9198
#define vsuxseg7ei16_v_i32mf2(...) __riscv_vsuxseg7ei16_v_i32mf2(__VA_ARGS__)
9199
#define vsuxseg8ei16_v_i32mf2(...) __riscv_vsuxseg8ei16_v_i32mf2(__VA_ARGS__)
9200
#define vsuxseg2ei16_v_i32m1(...) __riscv_vsuxseg2ei16_v_i32m1(__VA_ARGS__)
9201
#define vsuxseg3ei16_v_i32m1(...) __riscv_vsuxseg3ei16_v_i32m1(__VA_ARGS__)
9202
#define vsuxseg4ei16_v_i32m1(...) __riscv_vsuxseg4ei16_v_i32m1(__VA_ARGS__)
9203
#define vsuxseg5ei16_v_i32m1(...) __riscv_vsuxseg5ei16_v_i32m1(__VA_ARGS__)
9204
#define vsuxseg6ei16_v_i32m1(...) __riscv_vsuxseg6ei16_v_i32m1(__VA_ARGS__)
9205
#define vsuxseg7ei16_v_i32m1(...) __riscv_vsuxseg7ei16_v_i32m1(__VA_ARGS__)
9206
#define vsuxseg8ei16_v_i32m1(...) __riscv_vsuxseg8ei16_v_i32m1(__VA_ARGS__)
9207
#define vsuxseg2ei16_v_i32m2(...) __riscv_vsuxseg2ei16_v_i32m2(__VA_ARGS__)
9208
#define vsuxseg3ei16_v_i32m2(...) __riscv_vsuxseg3ei16_v_i32m2(__VA_ARGS__)
9209
#define vsuxseg4ei16_v_i32m2(...) __riscv_vsuxseg4ei16_v_i32m2(__VA_ARGS__)
9210
#define vsuxseg2ei16_v_i32m4(...) __riscv_vsuxseg2ei16_v_i32m4(__VA_ARGS__)
9211
#define vsuxseg2ei32_v_i32mf2(...) __riscv_vsuxseg2ei32_v_i32mf2(__VA_ARGS__)
9212
#define vsuxseg3ei32_v_i32mf2(...) __riscv_vsuxseg3ei32_v_i32mf2(__VA_ARGS__)
9213
#define vsuxseg4ei32_v_i32mf2(...) __riscv_vsuxseg4ei32_v_i32mf2(__VA_ARGS__)
9214
#define vsuxseg5ei32_v_i32mf2(...) __riscv_vsuxseg5ei32_v_i32mf2(__VA_ARGS__)
9215
#define vsuxseg6ei32_v_i32mf2(...) __riscv_vsuxseg6ei32_v_i32mf2(__VA_ARGS__)
9216
#define vsuxseg7ei32_v_i32mf2(...) __riscv_vsuxseg7ei32_v_i32mf2(__VA_ARGS__)
9217
#define vsuxseg8ei32_v_i32mf2(...) __riscv_vsuxseg8ei32_v_i32mf2(__VA_ARGS__)
9218
#define vsuxseg2ei32_v_i32m1(...) __riscv_vsuxseg2ei32_v_i32m1(__VA_ARGS__)
9219
#define vsuxseg3ei32_v_i32m1(...) __riscv_vsuxseg3ei32_v_i32m1(__VA_ARGS__)
9220
#define vsuxseg4ei32_v_i32m1(...) __riscv_vsuxseg4ei32_v_i32m1(__VA_ARGS__)
9221
#define vsuxseg5ei32_v_i32m1(...) __riscv_vsuxseg5ei32_v_i32m1(__VA_ARGS__)
9222
#define vsuxseg6ei32_v_i32m1(...) __riscv_vsuxseg6ei32_v_i32m1(__VA_ARGS__)
9223
#define vsuxseg7ei32_v_i32m1(...) __riscv_vsuxseg7ei32_v_i32m1(__VA_ARGS__)
9224
#define vsuxseg8ei32_v_i32m1(...) __riscv_vsuxseg8ei32_v_i32m1(__VA_ARGS__)
9225
#define vsuxseg2ei32_v_i32m2(...) __riscv_vsuxseg2ei32_v_i32m2(__VA_ARGS__)
9226
#define vsuxseg3ei32_v_i32m2(...) __riscv_vsuxseg3ei32_v_i32m2(__VA_ARGS__)
9227
#define vsuxseg4ei32_v_i32m2(...) __riscv_vsuxseg4ei32_v_i32m2(__VA_ARGS__)
9228
#define vsuxseg2ei32_v_i32m4(...) __riscv_vsuxseg2ei32_v_i32m4(__VA_ARGS__)
9229
#define vsuxseg2ei64_v_i32mf2(...) __riscv_vsuxseg2ei64_v_i32mf2(__VA_ARGS__)
9230
#define vsuxseg3ei64_v_i32mf2(...) __riscv_vsuxseg3ei64_v_i32mf2(__VA_ARGS__)
9231
#define vsuxseg4ei64_v_i32mf2(...) __riscv_vsuxseg4ei64_v_i32mf2(__VA_ARGS__)
9232
#define vsuxseg5ei64_v_i32mf2(...) __riscv_vsuxseg5ei64_v_i32mf2(__VA_ARGS__)
9233
#define vsuxseg6ei64_v_i32mf2(...) __riscv_vsuxseg6ei64_v_i32mf2(__VA_ARGS__)
9234
#define vsuxseg7ei64_v_i32mf2(...) __riscv_vsuxseg7ei64_v_i32mf2(__VA_ARGS__)
9235
#define vsuxseg8ei64_v_i32mf2(...) __riscv_vsuxseg8ei64_v_i32mf2(__VA_ARGS__)
9236
#define vsuxseg2ei64_v_i32m1(...) __riscv_vsuxseg2ei64_v_i32m1(__VA_ARGS__)
9237
#define vsuxseg3ei64_v_i32m1(...) __riscv_vsuxseg3ei64_v_i32m1(__VA_ARGS__)
9238
#define vsuxseg4ei64_v_i32m1(...) __riscv_vsuxseg4ei64_v_i32m1(__VA_ARGS__)
9239
#define vsuxseg5ei64_v_i32m1(...) __riscv_vsuxseg5ei64_v_i32m1(__VA_ARGS__)
9240
#define vsuxseg6ei64_v_i32m1(...) __riscv_vsuxseg6ei64_v_i32m1(__VA_ARGS__)
9241
#define vsuxseg7ei64_v_i32m1(...) __riscv_vsuxseg7ei64_v_i32m1(__VA_ARGS__)
9242
#define vsuxseg8ei64_v_i32m1(...) __riscv_vsuxseg8ei64_v_i32m1(__VA_ARGS__)
9243
#define vsuxseg2ei64_v_i32m2(...) __riscv_vsuxseg2ei64_v_i32m2(__VA_ARGS__)
9244
#define vsuxseg3ei64_v_i32m2(...) __riscv_vsuxseg3ei64_v_i32m2(__VA_ARGS__)
9245
#define vsuxseg4ei64_v_i32m2(...) __riscv_vsuxseg4ei64_v_i32m2(__VA_ARGS__)
9246
#define vsuxseg2ei64_v_i32m4(...) __riscv_vsuxseg2ei64_v_i32m4(__VA_ARGS__)
9247
#define vsuxseg2ei8_v_i64m1(...) __riscv_vsuxseg2ei8_v_i64m1(__VA_ARGS__)
9248
#define vsuxseg3ei8_v_i64m1(...) __riscv_vsuxseg3ei8_v_i64m1(__VA_ARGS__)
9249
#define vsuxseg4ei8_v_i64m1(...) __riscv_vsuxseg4ei8_v_i64m1(__VA_ARGS__)
9250
#define vsuxseg5ei8_v_i64m1(...) __riscv_vsuxseg5ei8_v_i64m1(__VA_ARGS__)
9251
#define vsuxseg6ei8_v_i64m1(...) __riscv_vsuxseg6ei8_v_i64m1(__VA_ARGS__)
9252
#define vsuxseg7ei8_v_i64m1(...) __riscv_vsuxseg7ei8_v_i64m1(__VA_ARGS__)
9253
#define vsuxseg8ei8_v_i64m1(...) __riscv_vsuxseg8ei8_v_i64m1(__VA_ARGS__)
9254
#define vsuxseg2ei8_v_i64m2(...) __riscv_vsuxseg2ei8_v_i64m2(__VA_ARGS__)
9255
#define vsuxseg3ei8_v_i64m2(...) __riscv_vsuxseg3ei8_v_i64m2(__VA_ARGS__)
9256
#define vsuxseg4ei8_v_i64m2(...) __riscv_vsuxseg4ei8_v_i64m2(__VA_ARGS__)
9257
#define vsuxseg2ei8_v_i64m4(...) __riscv_vsuxseg2ei8_v_i64m4(__VA_ARGS__)
9258
#define vsuxseg2ei16_v_i64m1(...) __riscv_vsuxseg2ei16_v_i64m1(__VA_ARGS__)
9259
#define vsuxseg3ei16_v_i64m1(...) __riscv_vsuxseg3ei16_v_i64m1(__VA_ARGS__)
9260
#define vsuxseg4ei16_v_i64m1(...) __riscv_vsuxseg4ei16_v_i64m1(__VA_ARGS__)
9261
#define vsuxseg5ei16_v_i64m1(...) __riscv_vsuxseg5ei16_v_i64m1(__VA_ARGS__)
9262
#define vsuxseg6ei16_v_i64m1(...) __riscv_vsuxseg6ei16_v_i64m1(__VA_ARGS__)
9263
#define vsuxseg7ei16_v_i64m1(...) __riscv_vsuxseg7ei16_v_i64m1(__VA_ARGS__)
9264
#define vsuxseg8ei16_v_i64m1(...) __riscv_vsuxseg8ei16_v_i64m1(__VA_ARGS__)
9265
#define vsuxseg2ei16_v_i64m2(...) __riscv_vsuxseg2ei16_v_i64m2(__VA_ARGS__)
9266
#define vsuxseg3ei16_v_i64m2(...) __riscv_vsuxseg3ei16_v_i64m2(__VA_ARGS__)
9267
#define vsuxseg4ei16_v_i64m2(...) __riscv_vsuxseg4ei16_v_i64m2(__VA_ARGS__)
9268
#define vsuxseg2ei16_v_i64m4(...) __riscv_vsuxseg2ei16_v_i64m4(__VA_ARGS__)
9269
#define vsuxseg2ei32_v_i64m1(...) __riscv_vsuxseg2ei32_v_i64m1(__VA_ARGS__)
9270
#define vsuxseg3ei32_v_i64m1(...) __riscv_vsuxseg3ei32_v_i64m1(__VA_ARGS__)
9271
#define vsuxseg4ei32_v_i64m1(...) __riscv_vsuxseg4ei32_v_i64m1(__VA_ARGS__)
9272
#define vsuxseg5ei32_v_i64m1(...) __riscv_vsuxseg5ei32_v_i64m1(__VA_ARGS__)
9273
#define vsuxseg6ei32_v_i64m1(...) __riscv_vsuxseg6ei32_v_i64m1(__VA_ARGS__)
9274
#define vsuxseg7ei32_v_i64m1(...) __riscv_vsuxseg7ei32_v_i64m1(__VA_ARGS__)
9275
#define vsuxseg8ei32_v_i64m1(...) __riscv_vsuxseg8ei32_v_i64m1(__VA_ARGS__)
9276
#define vsuxseg2ei32_v_i64m2(...) __riscv_vsuxseg2ei32_v_i64m2(__VA_ARGS__)
9277
#define vsuxseg3ei32_v_i64m2(...) __riscv_vsuxseg3ei32_v_i64m2(__VA_ARGS__)
9278
#define vsuxseg4ei32_v_i64m2(...) __riscv_vsuxseg4ei32_v_i64m2(__VA_ARGS__)
9279
#define vsuxseg2ei32_v_i64m4(...) __riscv_vsuxseg2ei32_v_i64m4(__VA_ARGS__)
9280
#define vsuxseg2ei64_v_i64m1(...) __riscv_vsuxseg2ei64_v_i64m1(__VA_ARGS__)
9281
#define vsuxseg3ei64_v_i64m1(...) __riscv_vsuxseg3ei64_v_i64m1(__VA_ARGS__)
9282
#define vsuxseg4ei64_v_i64m1(...) __riscv_vsuxseg4ei64_v_i64m1(__VA_ARGS__)
9283
#define vsuxseg5ei64_v_i64m1(...) __riscv_vsuxseg5ei64_v_i64m1(__VA_ARGS__)
9284
#define vsuxseg6ei64_v_i64m1(...) __riscv_vsuxseg6ei64_v_i64m1(__VA_ARGS__)
9285
#define vsuxseg7ei64_v_i64m1(...) __riscv_vsuxseg7ei64_v_i64m1(__VA_ARGS__)
9286
#define vsuxseg8ei64_v_i64m1(...) __riscv_vsuxseg8ei64_v_i64m1(__VA_ARGS__)
9287
#define vsuxseg2ei64_v_i64m2(...) __riscv_vsuxseg2ei64_v_i64m2(__VA_ARGS__)
9288
#define vsuxseg3ei64_v_i64m2(...) __riscv_vsuxseg3ei64_v_i64m2(__VA_ARGS__)
9289
#define vsuxseg4ei64_v_i64m2(...) __riscv_vsuxseg4ei64_v_i64m2(__VA_ARGS__)
9290
#define vsuxseg2ei64_v_i64m4(...) __riscv_vsuxseg2ei64_v_i64m4(__VA_ARGS__)
9291
#define vsoxseg2ei8_v_u8mf8(...) __riscv_vsoxseg2ei8_v_u8mf8(__VA_ARGS__)
9292
#define vsoxseg3ei8_v_u8mf8(...) __riscv_vsoxseg3ei8_v_u8mf8(__VA_ARGS__)
9293
#define vsoxseg4ei8_v_u8mf8(...) __riscv_vsoxseg4ei8_v_u8mf8(__VA_ARGS__)
9294
#define vsoxseg5ei8_v_u8mf8(...) __riscv_vsoxseg5ei8_v_u8mf8(__VA_ARGS__)
9295
#define vsoxseg6ei8_v_u8mf8(...) __riscv_vsoxseg6ei8_v_u8mf8(__VA_ARGS__)
9296
#define vsoxseg7ei8_v_u8mf8(...) __riscv_vsoxseg7ei8_v_u8mf8(__VA_ARGS__)
9297
#define vsoxseg8ei8_v_u8mf8(...) __riscv_vsoxseg8ei8_v_u8mf8(__VA_ARGS__)
9298
#define vsoxseg2ei8_v_u8mf4(...) __riscv_vsoxseg2ei8_v_u8mf4(__VA_ARGS__)
9299
#define vsoxseg3ei8_v_u8mf4(...) __riscv_vsoxseg3ei8_v_u8mf4(__VA_ARGS__)
9300
#define vsoxseg4ei8_v_u8mf4(...) __riscv_vsoxseg4ei8_v_u8mf4(__VA_ARGS__)
9301
#define vsoxseg5ei8_v_u8mf4(...) __riscv_vsoxseg5ei8_v_u8mf4(__VA_ARGS__)
9302
#define vsoxseg6ei8_v_u8mf4(...) __riscv_vsoxseg6ei8_v_u8mf4(__VA_ARGS__)
9303
#define vsoxseg7ei8_v_u8mf4(...) __riscv_vsoxseg7ei8_v_u8mf4(__VA_ARGS__)
9304
#define vsoxseg8ei8_v_u8mf4(...) __riscv_vsoxseg8ei8_v_u8mf4(__VA_ARGS__)
9305
#define vsoxseg2ei8_v_u8mf2(...) __riscv_vsoxseg2ei8_v_u8mf2(__VA_ARGS__)
9306
#define vsoxseg3ei8_v_u8mf2(...) __riscv_vsoxseg3ei8_v_u8mf2(__VA_ARGS__)
9307
#define vsoxseg4ei8_v_u8mf2(...) __riscv_vsoxseg4ei8_v_u8mf2(__VA_ARGS__)
9308
#define vsoxseg5ei8_v_u8mf2(...) __riscv_vsoxseg5ei8_v_u8mf2(__VA_ARGS__)
9309
#define vsoxseg6ei8_v_u8mf2(...) __riscv_vsoxseg6ei8_v_u8mf2(__VA_ARGS__)
9310
#define vsoxseg7ei8_v_u8mf2(...) __riscv_vsoxseg7ei8_v_u8mf2(__VA_ARGS__)
9311
#define vsoxseg8ei8_v_u8mf2(...) __riscv_vsoxseg8ei8_v_u8mf2(__VA_ARGS__)
9312
#define vsoxseg2ei8_v_u8m1(...) __riscv_vsoxseg2ei8_v_u8m1(__VA_ARGS__)
9313
#define vsoxseg3ei8_v_u8m1(...) __riscv_vsoxseg3ei8_v_u8m1(__VA_ARGS__)
9314
#define vsoxseg4ei8_v_u8m1(...) __riscv_vsoxseg4ei8_v_u8m1(__VA_ARGS__)
9315
#define vsoxseg5ei8_v_u8m1(...) __riscv_vsoxseg5ei8_v_u8m1(__VA_ARGS__)
9316
#define vsoxseg6ei8_v_u8m1(...) __riscv_vsoxseg6ei8_v_u8m1(__VA_ARGS__)
9317
#define vsoxseg7ei8_v_u8m1(...) __riscv_vsoxseg7ei8_v_u8m1(__VA_ARGS__)
9318
#define vsoxseg8ei8_v_u8m1(...) __riscv_vsoxseg8ei8_v_u8m1(__VA_ARGS__)
9319
#define vsoxseg2ei8_v_u8m2(...) __riscv_vsoxseg2ei8_v_u8m2(__VA_ARGS__)
9320
#define vsoxseg3ei8_v_u8m2(...) __riscv_vsoxseg3ei8_v_u8m2(__VA_ARGS__)
9321
#define vsoxseg4ei8_v_u8m2(...) __riscv_vsoxseg4ei8_v_u8m2(__VA_ARGS__)
9322
#define vsoxseg2ei8_v_u8m4(...) __riscv_vsoxseg2ei8_v_u8m4(__VA_ARGS__)
9323
#define vsoxseg2ei16_v_u8mf8(...) __riscv_vsoxseg2ei16_v_u8mf8(__VA_ARGS__)
9324
#define vsoxseg3ei16_v_u8mf8(...) __riscv_vsoxseg3ei16_v_u8mf8(__VA_ARGS__)
9325
#define vsoxseg4ei16_v_u8mf8(...) __riscv_vsoxseg4ei16_v_u8mf8(__VA_ARGS__)
9326
#define vsoxseg5ei16_v_u8mf8(...) __riscv_vsoxseg5ei16_v_u8mf8(__VA_ARGS__)
9327
#define vsoxseg6ei16_v_u8mf8(...) __riscv_vsoxseg6ei16_v_u8mf8(__VA_ARGS__)
9328
#define vsoxseg7ei16_v_u8mf8(...) __riscv_vsoxseg7ei16_v_u8mf8(__VA_ARGS__)
9329
#define vsoxseg8ei16_v_u8mf8(...) __riscv_vsoxseg8ei16_v_u8mf8(__VA_ARGS__)
9330
#define vsoxseg2ei16_v_u8mf4(...) __riscv_vsoxseg2ei16_v_u8mf4(__VA_ARGS__)
9331
#define vsoxseg3ei16_v_u8mf4(...) __riscv_vsoxseg3ei16_v_u8mf4(__VA_ARGS__)
9332
#define vsoxseg4ei16_v_u8mf4(...) __riscv_vsoxseg4ei16_v_u8mf4(__VA_ARGS__)
9333
#define vsoxseg5ei16_v_u8mf4(...) __riscv_vsoxseg5ei16_v_u8mf4(__VA_ARGS__)
9334
#define vsoxseg6ei16_v_u8mf4(...) __riscv_vsoxseg6ei16_v_u8mf4(__VA_ARGS__)
9335
#define vsoxseg7ei16_v_u8mf4(...) __riscv_vsoxseg7ei16_v_u8mf4(__VA_ARGS__)
9336
#define vsoxseg8ei16_v_u8mf4(...) __riscv_vsoxseg8ei16_v_u8mf4(__VA_ARGS__)
9337
#define vsoxseg2ei16_v_u8mf2(...) __riscv_vsoxseg2ei16_v_u8mf2(__VA_ARGS__)
9338
#define vsoxseg3ei16_v_u8mf2(...) __riscv_vsoxseg3ei16_v_u8mf2(__VA_ARGS__)
9339
#define vsoxseg4ei16_v_u8mf2(...) __riscv_vsoxseg4ei16_v_u8mf2(__VA_ARGS__)
9340
#define vsoxseg5ei16_v_u8mf2(...) __riscv_vsoxseg5ei16_v_u8mf2(__VA_ARGS__)
9341
#define vsoxseg6ei16_v_u8mf2(...) __riscv_vsoxseg6ei16_v_u8mf2(__VA_ARGS__)
9342
#define vsoxseg7ei16_v_u8mf2(...) __riscv_vsoxseg7ei16_v_u8mf2(__VA_ARGS__)
9343
#define vsoxseg8ei16_v_u8mf2(...) __riscv_vsoxseg8ei16_v_u8mf2(__VA_ARGS__)
9344
#define vsoxseg2ei16_v_u8m1(...) __riscv_vsoxseg2ei16_v_u8m1(__VA_ARGS__)
9345
#define vsoxseg3ei16_v_u8m1(...) __riscv_vsoxseg3ei16_v_u8m1(__VA_ARGS__)
9346
#define vsoxseg4ei16_v_u8m1(...) __riscv_vsoxseg4ei16_v_u8m1(__VA_ARGS__)
9347
#define vsoxseg5ei16_v_u8m1(...) __riscv_vsoxseg5ei16_v_u8m1(__VA_ARGS__)
9348
#define vsoxseg6ei16_v_u8m1(...) __riscv_vsoxseg6ei16_v_u8m1(__VA_ARGS__)
9349
#define vsoxseg7ei16_v_u8m1(...) __riscv_vsoxseg7ei16_v_u8m1(__VA_ARGS__)
9350
#define vsoxseg8ei16_v_u8m1(...) __riscv_vsoxseg8ei16_v_u8m1(__VA_ARGS__)
9351
#define vsoxseg2ei16_v_u8m2(...) __riscv_vsoxseg2ei16_v_u8m2(__VA_ARGS__)
9352
#define vsoxseg3ei16_v_u8m2(...) __riscv_vsoxseg3ei16_v_u8m2(__VA_ARGS__)
9353
#define vsoxseg4ei16_v_u8m2(...) __riscv_vsoxseg4ei16_v_u8m2(__VA_ARGS__)
9354
#define vsoxseg2ei16_v_u8m4(...) __riscv_vsoxseg2ei16_v_u8m4(__VA_ARGS__)
9355
#define vsoxseg2ei32_v_u8mf8(...) __riscv_vsoxseg2ei32_v_u8mf8(__VA_ARGS__)
9356
#define vsoxseg3ei32_v_u8mf8(...) __riscv_vsoxseg3ei32_v_u8mf8(__VA_ARGS__)
9357
#define vsoxseg4ei32_v_u8mf8(...) __riscv_vsoxseg4ei32_v_u8mf8(__VA_ARGS__)
9358
#define vsoxseg5ei32_v_u8mf8(...) __riscv_vsoxseg5ei32_v_u8mf8(__VA_ARGS__)
9359
#define vsoxseg6ei32_v_u8mf8(...) __riscv_vsoxseg6ei32_v_u8mf8(__VA_ARGS__)
9360
#define vsoxseg7ei32_v_u8mf8(...) __riscv_vsoxseg7ei32_v_u8mf8(__VA_ARGS__)
9361
#define vsoxseg8ei32_v_u8mf8(...) __riscv_vsoxseg8ei32_v_u8mf8(__VA_ARGS__)
9362
#define vsoxseg2ei32_v_u8mf4(...) __riscv_vsoxseg2ei32_v_u8mf4(__VA_ARGS__)
9363
#define vsoxseg3ei32_v_u8mf4(...) __riscv_vsoxseg3ei32_v_u8mf4(__VA_ARGS__)
9364
#define vsoxseg4ei32_v_u8mf4(...) __riscv_vsoxseg4ei32_v_u8mf4(__VA_ARGS__)
9365
#define vsoxseg5ei32_v_u8mf4(...) __riscv_vsoxseg5ei32_v_u8mf4(__VA_ARGS__)
9366
#define vsoxseg6ei32_v_u8mf4(...) __riscv_vsoxseg6ei32_v_u8mf4(__VA_ARGS__)
9367
#define vsoxseg7ei32_v_u8mf4(...) __riscv_vsoxseg7ei32_v_u8mf4(__VA_ARGS__)
9368
#define vsoxseg8ei32_v_u8mf4(...) __riscv_vsoxseg8ei32_v_u8mf4(__VA_ARGS__)
9369
#define vsoxseg2ei32_v_u8mf2(...) __riscv_vsoxseg2ei32_v_u8mf2(__VA_ARGS__)
9370
#define vsoxseg3ei32_v_u8mf2(...) __riscv_vsoxseg3ei32_v_u8mf2(__VA_ARGS__)
9371
#define vsoxseg4ei32_v_u8mf2(...) __riscv_vsoxseg4ei32_v_u8mf2(__VA_ARGS__)
9372
#define vsoxseg5ei32_v_u8mf2(...) __riscv_vsoxseg5ei32_v_u8mf2(__VA_ARGS__)
9373
#define vsoxseg6ei32_v_u8mf2(...) __riscv_vsoxseg6ei32_v_u8mf2(__VA_ARGS__)
9374
#define vsoxseg7ei32_v_u8mf2(...) __riscv_vsoxseg7ei32_v_u8mf2(__VA_ARGS__)
9375
#define vsoxseg8ei32_v_u8mf2(...) __riscv_vsoxseg8ei32_v_u8mf2(__VA_ARGS__)
9376
#define vsoxseg2ei32_v_u8m1(...) __riscv_vsoxseg2ei32_v_u8m1(__VA_ARGS__)
9377
#define vsoxseg3ei32_v_u8m1(...) __riscv_vsoxseg3ei32_v_u8m1(__VA_ARGS__)
9378
#define vsoxseg4ei32_v_u8m1(...) __riscv_vsoxseg4ei32_v_u8m1(__VA_ARGS__)
9379
#define vsoxseg5ei32_v_u8m1(...) __riscv_vsoxseg5ei32_v_u8m1(__VA_ARGS__)
9380
#define vsoxseg6ei32_v_u8m1(...) __riscv_vsoxseg6ei32_v_u8m1(__VA_ARGS__)
9381
#define vsoxseg7ei32_v_u8m1(...) __riscv_vsoxseg7ei32_v_u8m1(__VA_ARGS__)
9382
#define vsoxseg8ei32_v_u8m1(...) __riscv_vsoxseg8ei32_v_u8m1(__VA_ARGS__)
9383
#define vsoxseg2ei32_v_u8m2(...) __riscv_vsoxseg2ei32_v_u8m2(__VA_ARGS__)
9384
#define vsoxseg3ei32_v_u8m2(...) __riscv_vsoxseg3ei32_v_u8m2(__VA_ARGS__)
9385
#define vsoxseg4ei32_v_u8m2(...) __riscv_vsoxseg4ei32_v_u8m2(__VA_ARGS__)
9386
#define vsoxseg2ei64_v_u8mf8(...) __riscv_vsoxseg2ei64_v_u8mf8(__VA_ARGS__)
9387
#define vsoxseg3ei64_v_u8mf8(...) __riscv_vsoxseg3ei64_v_u8mf8(__VA_ARGS__)
9388
#define vsoxseg4ei64_v_u8mf8(...) __riscv_vsoxseg4ei64_v_u8mf8(__VA_ARGS__)
9389
#define vsoxseg5ei64_v_u8mf8(...) __riscv_vsoxseg5ei64_v_u8mf8(__VA_ARGS__)
9390
#define vsoxseg6ei64_v_u8mf8(...) __riscv_vsoxseg6ei64_v_u8mf8(__VA_ARGS__)
9391
#define vsoxseg7ei64_v_u8mf8(...) __riscv_vsoxseg7ei64_v_u8mf8(__VA_ARGS__)
9392
#define vsoxseg8ei64_v_u8mf8(...) __riscv_vsoxseg8ei64_v_u8mf8(__VA_ARGS__)
9393
#define vsoxseg2ei64_v_u8mf4(...) __riscv_vsoxseg2ei64_v_u8mf4(__VA_ARGS__)
9394
#define vsoxseg3ei64_v_u8mf4(...) __riscv_vsoxseg3ei64_v_u8mf4(__VA_ARGS__)
9395
#define vsoxseg4ei64_v_u8mf4(...) __riscv_vsoxseg4ei64_v_u8mf4(__VA_ARGS__)
9396
#define vsoxseg5ei64_v_u8mf4(...) __riscv_vsoxseg5ei64_v_u8mf4(__VA_ARGS__)
9397
#define vsoxseg6ei64_v_u8mf4(...) __riscv_vsoxseg6ei64_v_u8mf4(__VA_ARGS__)
9398
#define vsoxseg7ei64_v_u8mf4(...) __riscv_vsoxseg7ei64_v_u8mf4(__VA_ARGS__)
9399
#define vsoxseg8ei64_v_u8mf4(...) __riscv_vsoxseg8ei64_v_u8mf4(__VA_ARGS__)
9400
#define vsoxseg2ei64_v_u8mf2(...) __riscv_vsoxseg2ei64_v_u8mf2(__VA_ARGS__)
9401
#define vsoxseg3ei64_v_u8mf2(...) __riscv_vsoxseg3ei64_v_u8mf2(__VA_ARGS__)
9402
#define vsoxseg4ei64_v_u8mf2(...) __riscv_vsoxseg4ei64_v_u8mf2(__VA_ARGS__)
9403
#define vsoxseg5ei64_v_u8mf2(...) __riscv_vsoxseg5ei64_v_u8mf2(__VA_ARGS__)
9404
#define vsoxseg6ei64_v_u8mf2(...) __riscv_vsoxseg6ei64_v_u8mf2(__VA_ARGS__)
9405
#define vsoxseg7ei64_v_u8mf2(...) __riscv_vsoxseg7ei64_v_u8mf2(__VA_ARGS__)
9406
#define vsoxseg8ei64_v_u8mf2(...) __riscv_vsoxseg8ei64_v_u8mf2(__VA_ARGS__)
9407
#define vsoxseg2ei64_v_u8m1(...) __riscv_vsoxseg2ei64_v_u8m1(__VA_ARGS__)
9408
#define vsoxseg3ei64_v_u8m1(...) __riscv_vsoxseg3ei64_v_u8m1(__VA_ARGS__)
9409
#define vsoxseg4ei64_v_u8m1(...) __riscv_vsoxseg4ei64_v_u8m1(__VA_ARGS__)
9410
#define vsoxseg5ei64_v_u8m1(...) __riscv_vsoxseg5ei64_v_u8m1(__VA_ARGS__)
9411
#define vsoxseg6ei64_v_u8m1(...) __riscv_vsoxseg6ei64_v_u8m1(__VA_ARGS__)
9412
#define vsoxseg7ei64_v_u8m1(...) __riscv_vsoxseg7ei64_v_u8m1(__VA_ARGS__)
9413
#define vsoxseg8ei64_v_u8m1(...) __riscv_vsoxseg8ei64_v_u8m1(__VA_ARGS__)
9414
#define vsoxseg2ei8_v_u16mf4(...) __riscv_vsoxseg2ei8_v_u16mf4(__VA_ARGS__)
9415
#define vsoxseg3ei8_v_u16mf4(...) __riscv_vsoxseg3ei8_v_u16mf4(__VA_ARGS__)
9416
#define vsoxseg4ei8_v_u16mf4(...) __riscv_vsoxseg4ei8_v_u16mf4(__VA_ARGS__)
9417
#define vsoxseg5ei8_v_u16mf4(...) __riscv_vsoxseg5ei8_v_u16mf4(__VA_ARGS__)
9418
#define vsoxseg6ei8_v_u16mf4(...) __riscv_vsoxseg6ei8_v_u16mf4(__VA_ARGS__)
9419
#define vsoxseg7ei8_v_u16mf4(...) __riscv_vsoxseg7ei8_v_u16mf4(__VA_ARGS__)
9420
#define vsoxseg8ei8_v_u16mf4(...) __riscv_vsoxseg8ei8_v_u16mf4(__VA_ARGS__)
9421
#define vsoxseg2ei8_v_u16mf2(...) __riscv_vsoxseg2ei8_v_u16mf2(__VA_ARGS__)
9422
#define vsoxseg3ei8_v_u16mf2(...) __riscv_vsoxseg3ei8_v_u16mf2(__VA_ARGS__)
9423
#define vsoxseg4ei8_v_u16mf2(...) __riscv_vsoxseg4ei8_v_u16mf2(__VA_ARGS__)
9424
#define vsoxseg5ei8_v_u16mf2(...) __riscv_vsoxseg5ei8_v_u16mf2(__VA_ARGS__)
9425
#define vsoxseg6ei8_v_u16mf2(...) __riscv_vsoxseg6ei8_v_u16mf2(__VA_ARGS__)
9426
#define vsoxseg7ei8_v_u16mf2(...) __riscv_vsoxseg7ei8_v_u16mf2(__VA_ARGS__)
9427
#define vsoxseg8ei8_v_u16mf2(...) __riscv_vsoxseg8ei8_v_u16mf2(__VA_ARGS__)
9428
#define vsoxseg2ei8_v_u16m1(...) __riscv_vsoxseg2ei8_v_u16m1(__VA_ARGS__)
9429
#define vsoxseg3ei8_v_u16m1(...) __riscv_vsoxseg3ei8_v_u16m1(__VA_ARGS__)
9430
#define vsoxseg4ei8_v_u16m1(...) __riscv_vsoxseg4ei8_v_u16m1(__VA_ARGS__)
9431
#define vsoxseg5ei8_v_u16m1(...) __riscv_vsoxseg5ei8_v_u16m1(__VA_ARGS__)
9432
#define vsoxseg6ei8_v_u16m1(...) __riscv_vsoxseg6ei8_v_u16m1(__VA_ARGS__)
9433
#define vsoxseg7ei8_v_u16m1(...) __riscv_vsoxseg7ei8_v_u16m1(__VA_ARGS__)
9434
#define vsoxseg8ei8_v_u16m1(...) __riscv_vsoxseg8ei8_v_u16m1(__VA_ARGS__)
9435
#define vsoxseg2ei8_v_u16m2(...) __riscv_vsoxseg2ei8_v_u16m2(__VA_ARGS__)
9436
#define vsoxseg3ei8_v_u16m2(...) __riscv_vsoxseg3ei8_v_u16m2(__VA_ARGS__)
9437
#define vsoxseg4ei8_v_u16m2(...) __riscv_vsoxseg4ei8_v_u16m2(__VA_ARGS__)
9438
#define vsoxseg2ei8_v_u16m4(...) __riscv_vsoxseg2ei8_v_u16m4(__VA_ARGS__)
9439
#define vsoxseg2ei16_v_u16mf4(...) __riscv_vsoxseg2ei16_v_u16mf4(__VA_ARGS__)
9440
#define vsoxseg3ei16_v_u16mf4(...) __riscv_vsoxseg3ei16_v_u16mf4(__VA_ARGS__)
9441
#define vsoxseg4ei16_v_u16mf4(...) __riscv_vsoxseg4ei16_v_u16mf4(__VA_ARGS__)
9442
#define vsoxseg5ei16_v_u16mf4(...) __riscv_vsoxseg5ei16_v_u16mf4(__VA_ARGS__)
9443
#define vsoxseg6ei16_v_u16mf4(...) __riscv_vsoxseg6ei16_v_u16mf4(__VA_ARGS__)
9444
#define vsoxseg7ei16_v_u16mf4(...) __riscv_vsoxseg7ei16_v_u16mf4(__VA_ARGS__)
9445
#define vsoxseg8ei16_v_u16mf4(...) __riscv_vsoxseg8ei16_v_u16mf4(__VA_ARGS__)
9446
#define vsoxseg2ei16_v_u16mf2(...) __riscv_vsoxseg2ei16_v_u16mf2(__VA_ARGS__)
9447
#define vsoxseg3ei16_v_u16mf2(...) __riscv_vsoxseg3ei16_v_u16mf2(__VA_ARGS__)
9448
#define vsoxseg4ei16_v_u16mf2(...) __riscv_vsoxseg4ei16_v_u16mf2(__VA_ARGS__)
9449
#define vsoxseg5ei16_v_u16mf2(...) __riscv_vsoxseg5ei16_v_u16mf2(__VA_ARGS__)
9450
#define vsoxseg6ei16_v_u16mf2(...) __riscv_vsoxseg6ei16_v_u16mf2(__VA_ARGS__)
9451
#define vsoxseg7ei16_v_u16mf2(...) __riscv_vsoxseg7ei16_v_u16mf2(__VA_ARGS__)
9452
#define vsoxseg8ei16_v_u16mf2(...) __riscv_vsoxseg8ei16_v_u16mf2(__VA_ARGS__)
9453
#define vsoxseg2ei16_v_u16m1(...) __riscv_vsoxseg2ei16_v_u16m1(__VA_ARGS__)
9454
#define vsoxseg3ei16_v_u16m1(...) __riscv_vsoxseg3ei16_v_u16m1(__VA_ARGS__)
9455
#define vsoxseg4ei16_v_u16m1(...) __riscv_vsoxseg4ei16_v_u16m1(__VA_ARGS__)
9456
#define vsoxseg5ei16_v_u16m1(...) __riscv_vsoxseg5ei16_v_u16m1(__VA_ARGS__)
9457
#define vsoxseg6ei16_v_u16m1(...) __riscv_vsoxseg6ei16_v_u16m1(__VA_ARGS__)
9458
#define vsoxseg7ei16_v_u16m1(...) __riscv_vsoxseg7ei16_v_u16m1(__VA_ARGS__)
9459
#define vsoxseg8ei16_v_u16m1(...) __riscv_vsoxseg8ei16_v_u16m1(__VA_ARGS__)
9460
#define vsoxseg2ei16_v_u16m2(...) __riscv_vsoxseg2ei16_v_u16m2(__VA_ARGS__)
9461
#define vsoxseg3ei16_v_u16m2(...) __riscv_vsoxseg3ei16_v_u16m2(__VA_ARGS__)
9462
#define vsoxseg4ei16_v_u16m2(...) __riscv_vsoxseg4ei16_v_u16m2(__VA_ARGS__)
9463
#define vsoxseg2ei16_v_u16m4(...) __riscv_vsoxseg2ei16_v_u16m4(__VA_ARGS__)
9464
#define vsoxseg2ei32_v_u16mf4(...) __riscv_vsoxseg2ei32_v_u16mf4(__VA_ARGS__)
9465
#define vsoxseg3ei32_v_u16mf4(...) __riscv_vsoxseg3ei32_v_u16mf4(__VA_ARGS__)
9466
#define vsoxseg4ei32_v_u16mf4(...) __riscv_vsoxseg4ei32_v_u16mf4(__VA_ARGS__)
9467
#define vsoxseg5ei32_v_u16mf4(...) __riscv_vsoxseg5ei32_v_u16mf4(__VA_ARGS__)
9468
#define vsoxseg6ei32_v_u16mf4(...) __riscv_vsoxseg6ei32_v_u16mf4(__VA_ARGS__)
9469
#define vsoxseg7ei32_v_u16mf4(...) __riscv_vsoxseg7ei32_v_u16mf4(__VA_ARGS__)
9470
#define vsoxseg8ei32_v_u16mf4(...) __riscv_vsoxseg8ei32_v_u16mf4(__VA_ARGS__)
9471
#define vsoxseg2ei32_v_u16mf2(...) __riscv_vsoxseg2ei32_v_u16mf2(__VA_ARGS__)
9472
#define vsoxseg3ei32_v_u16mf2(...) __riscv_vsoxseg3ei32_v_u16mf2(__VA_ARGS__)
9473
#define vsoxseg4ei32_v_u16mf2(...) __riscv_vsoxseg4ei32_v_u16mf2(__VA_ARGS__)
9474
#define vsoxseg5ei32_v_u16mf2(...) __riscv_vsoxseg5ei32_v_u16mf2(__VA_ARGS__)
9475
#define vsoxseg6ei32_v_u16mf2(...) __riscv_vsoxseg6ei32_v_u16mf2(__VA_ARGS__)
9476
#define vsoxseg7ei32_v_u16mf2(...) __riscv_vsoxseg7ei32_v_u16mf2(__VA_ARGS__)
9477
#define vsoxseg8ei32_v_u16mf2(...) __riscv_vsoxseg8ei32_v_u16mf2(__VA_ARGS__)
9478
#define vsoxseg2ei32_v_u16m1(...) __riscv_vsoxseg2ei32_v_u16m1(__VA_ARGS__)
9479
#define vsoxseg3ei32_v_u16m1(...) __riscv_vsoxseg3ei32_v_u16m1(__VA_ARGS__)
9480
#define vsoxseg4ei32_v_u16m1(...) __riscv_vsoxseg4ei32_v_u16m1(__VA_ARGS__)
9481
#define vsoxseg5ei32_v_u16m1(...) __riscv_vsoxseg5ei32_v_u16m1(__VA_ARGS__)
9482
#define vsoxseg6ei32_v_u16m1(...) __riscv_vsoxseg6ei32_v_u16m1(__VA_ARGS__)
9483
#define vsoxseg7ei32_v_u16m1(...) __riscv_vsoxseg7ei32_v_u16m1(__VA_ARGS__)
9484
#define vsoxseg8ei32_v_u16m1(...) __riscv_vsoxseg8ei32_v_u16m1(__VA_ARGS__)
9485
#define vsoxseg2ei32_v_u16m2(...) __riscv_vsoxseg2ei32_v_u16m2(__VA_ARGS__)
9486
#define vsoxseg3ei32_v_u16m2(...) __riscv_vsoxseg3ei32_v_u16m2(__VA_ARGS__)
9487
#define vsoxseg4ei32_v_u16m2(...) __riscv_vsoxseg4ei32_v_u16m2(__VA_ARGS__)
9488
#define vsoxseg2ei32_v_u16m4(...) __riscv_vsoxseg2ei32_v_u16m4(__VA_ARGS__)
9489
#define vsoxseg2ei64_v_u16mf4(...) __riscv_vsoxseg2ei64_v_u16mf4(__VA_ARGS__)
9490
#define vsoxseg3ei64_v_u16mf4(...) __riscv_vsoxseg3ei64_v_u16mf4(__VA_ARGS__)
9491
#define vsoxseg4ei64_v_u16mf4(...) __riscv_vsoxseg4ei64_v_u16mf4(__VA_ARGS__)
9492
#define vsoxseg5ei64_v_u16mf4(...) __riscv_vsoxseg5ei64_v_u16mf4(__VA_ARGS__)
9493
#define vsoxseg6ei64_v_u16mf4(...) __riscv_vsoxseg6ei64_v_u16mf4(__VA_ARGS__)
9494
#define vsoxseg7ei64_v_u16mf4(...) __riscv_vsoxseg7ei64_v_u16mf4(__VA_ARGS__)
9495
#define vsoxseg8ei64_v_u16mf4(...) __riscv_vsoxseg8ei64_v_u16mf4(__VA_ARGS__)
9496
#define vsoxseg2ei64_v_u16mf2(...) __riscv_vsoxseg2ei64_v_u16mf2(__VA_ARGS__)
9497
#define vsoxseg3ei64_v_u16mf2(...) __riscv_vsoxseg3ei64_v_u16mf2(__VA_ARGS__)
9498
#define vsoxseg4ei64_v_u16mf2(...) __riscv_vsoxseg4ei64_v_u16mf2(__VA_ARGS__)
9499
#define vsoxseg5ei64_v_u16mf2(...) __riscv_vsoxseg5ei64_v_u16mf2(__VA_ARGS__)
9500
#define vsoxseg6ei64_v_u16mf2(...) __riscv_vsoxseg6ei64_v_u16mf2(__VA_ARGS__)
9501
#define vsoxseg7ei64_v_u16mf2(...) __riscv_vsoxseg7ei64_v_u16mf2(__VA_ARGS__)
9502
#define vsoxseg8ei64_v_u16mf2(...) __riscv_vsoxseg8ei64_v_u16mf2(__VA_ARGS__)
9503
#define vsoxseg2ei64_v_u16m1(...) __riscv_vsoxseg2ei64_v_u16m1(__VA_ARGS__)
9504
#define vsoxseg3ei64_v_u16m1(...) __riscv_vsoxseg3ei64_v_u16m1(__VA_ARGS__)
9505
#define vsoxseg4ei64_v_u16m1(...) __riscv_vsoxseg4ei64_v_u16m1(__VA_ARGS__)
9506
#define vsoxseg5ei64_v_u16m1(...) __riscv_vsoxseg5ei64_v_u16m1(__VA_ARGS__)
9507
#define vsoxseg6ei64_v_u16m1(...) __riscv_vsoxseg6ei64_v_u16m1(__VA_ARGS__)
9508
#define vsoxseg7ei64_v_u16m1(...) __riscv_vsoxseg7ei64_v_u16m1(__VA_ARGS__)
9509
#define vsoxseg8ei64_v_u16m1(...) __riscv_vsoxseg8ei64_v_u16m1(__VA_ARGS__)
9510
#define vsoxseg2ei64_v_u16m2(...) __riscv_vsoxseg2ei64_v_u16m2(__VA_ARGS__)
9511
#define vsoxseg3ei64_v_u16m2(...) __riscv_vsoxseg3ei64_v_u16m2(__VA_ARGS__)
9512
#define vsoxseg4ei64_v_u16m2(...) __riscv_vsoxseg4ei64_v_u16m2(__VA_ARGS__)
9513
#define vsoxseg2ei8_v_u32mf2(...) __riscv_vsoxseg2ei8_v_u32mf2(__VA_ARGS__)
9514
#define vsoxseg3ei8_v_u32mf2(...) __riscv_vsoxseg3ei8_v_u32mf2(__VA_ARGS__)
9515
#define vsoxseg4ei8_v_u32mf2(...) __riscv_vsoxseg4ei8_v_u32mf2(__VA_ARGS__)
9516
#define vsoxseg5ei8_v_u32mf2(...) __riscv_vsoxseg5ei8_v_u32mf2(__VA_ARGS__)
9517
#define vsoxseg6ei8_v_u32mf2(...) __riscv_vsoxseg6ei8_v_u32mf2(__VA_ARGS__)
9518
#define vsoxseg7ei8_v_u32mf2(...) __riscv_vsoxseg7ei8_v_u32mf2(__VA_ARGS__)
9519
#define vsoxseg8ei8_v_u32mf2(...) __riscv_vsoxseg8ei8_v_u32mf2(__VA_ARGS__)
9520
#define vsoxseg2ei8_v_u32m1(...) __riscv_vsoxseg2ei8_v_u32m1(__VA_ARGS__)
9521
#define vsoxseg3ei8_v_u32m1(...) __riscv_vsoxseg3ei8_v_u32m1(__VA_ARGS__)
9522
#define vsoxseg4ei8_v_u32m1(...) __riscv_vsoxseg4ei8_v_u32m1(__VA_ARGS__)
9523
#define vsoxseg5ei8_v_u32m1(...) __riscv_vsoxseg5ei8_v_u32m1(__VA_ARGS__)
9524
#define vsoxseg6ei8_v_u32m1(...) __riscv_vsoxseg6ei8_v_u32m1(__VA_ARGS__)
9525
#define vsoxseg7ei8_v_u32m1(...) __riscv_vsoxseg7ei8_v_u32m1(__VA_ARGS__)
9526
#define vsoxseg8ei8_v_u32m1(...) __riscv_vsoxseg8ei8_v_u32m1(__VA_ARGS__)
9527
#define vsoxseg2ei8_v_u32m2(...) __riscv_vsoxseg2ei8_v_u32m2(__VA_ARGS__)
9528
#define vsoxseg3ei8_v_u32m2(...) __riscv_vsoxseg3ei8_v_u32m2(__VA_ARGS__)
9529
#define vsoxseg4ei8_v_u32m2(...) __riscv_vsoxseg4ei8_v_u32m2(__VA_ARGS__)
9530
#define vsoxseg2ei8_v_u32m4(...) __riscv_vsoxseg2ei8_v_u32m4(__VA_ARGS__)
9531
#define vsoxseg2ei16_v_u32mf2(...) __riscv_vsoxseg2ei16_v_u32mf2(__VA_ARGS__)
9532
#define vsoxseg3ei16_v_u32mf2(...) __riscv_vsoxseg3ei16_v_u32mf2(__VA_ARGS__)
9533
#define vsoxseg4ei16_v_u32mf2(...) __riscv_vsoxseg4ei16_v_u32mf2(__VA_ARGS__)
9534
#define vsoxseg5ei16_v_u32mf2(...) __riscv_vsoxseg5ei16_v_u32mf2(__VA_ARGS__)
9535
#define vsoxseg6ei16_v_u32mf2(...) __riscv_vsoxseg6ei16_v_u32mf2(__VA_ARGS__)
9536
#define vsoxseg7ei16_v_u32mf2(...) __riscv_vsoxseg7ei16_v_u32mf2(__VA_ARGS__)
9537
#define vsoxseg8ei16_v_u32mf2(...) __riscv_vsoxseg8ei16_v_u32mf2(__VA_ARGS__)
9538
#define vsoxseg2ei16_v_u32m1(...) __riscv_vsoxseg2ei16_v_u32m1(__VA_ARGS__)
9539
#define vsoxseg3ei16_v_u32m1(...) __riscv_vsoxseg3ei16_v_u32m1(__VA_ARGS__)
9540
#define vsoxseg4ei16_v_u32m1(...) __riscv_vsoxseg4ei16_v_u32m1(__VA_ARGS__)
9541
#define vsoxseg5ei16_v_u32m1(...) __riscv_vsoxseg5ei16_v_u32m1(__VA_ARGS__)
9542
#define vsoxseg6ei16_v_u32m1(...) __riscv_vsoxseg6ei16_v_u32m1(__VA_ARGS__)
9543
#define vsoxseg7ei16_v_u32m1(...) __riscv_vsoxseg7ei16_v_u32m1(__VA_ARGS__)
9544
#define vsoxseg8ei16_v_u32m1(...) __riscv_vsoxseg8ei16_v_u32m1(__VA_ARGS__)
9545
#define vsoxseg2ei16_v_u32m2(...) __riscv_vsoxseg2ei16_v_u32m2(__VA_ARGS__)
9546
#define vsoxseg3ei16_v_u32m2(...) __riscv_vsoxseg3ei16_v_u32m2(__VA_ARGS__)
9547
#define vsoxseg4ei16_v_u32m2(...) __riscv_vsoxseg4ei16_v_u32m2(__VA_ARGS__)
9548
#define vsoxseg2ei16_v_u32m4(...) __riscv_vsoxseg2ei16_v_u32m4(__VA_ARGS__)
9549
#define vsoxseg2ei32_v_u32mf2(...) __riscv_vsoxseg2ei32_v_u32mf2(__VA_ARGS__)
9550
#define vsoxseg3ei32_v_u32mf2(...) __riscv_vsoxseg3ei32_v_u32mf2(__VA_ARGS__)
9551
#define vsoxseg4ei32_v_u32mf2(...) __riscv_vsoxseg4ei32_v_u32mf2(__VA_ARGS__)
9552
#define vsoxseg5ei32_v_u32mf2(...) __riscv_vsoxseg5ei32_v_u32mf2(__VA_ARGS__)
9553
#define vsoxseg6ei32_v_u32mf2(...) __riscv_vsoxseg6ei32_v_u32mf2(__VA_ARGS__)
9554
#define vsoxseg7ei32_v_u32mf2(...) __riscv_vsoxseg7ei32_v_u32mf2(__VA_ARGS__)
9555
#define vsoxseg8ei32_v_u32mf2(...) __riscv_vsoxseg8ei32_v_u32mf2(__VA_ARGS__)
9556
#define vsoxseg2ei32_v_u32m1(...) __riscv_vsoxseg2ei32_v_u32m1(__VA_ARGS__)
9557
#define vsoxseg3ei32_v_u32m1(...) __riscv_vsoxseg3ei32_v_u32m1(__VA_ARGS__)
9558
#define vsoxseg4ei32_v_u32m1(...) __riscv_vsoxseg4ei32_v_u32m1(__VA_ARGS__)
9559
#define vsoxseg5ei32_v_u32m1(...) __riscv_vsoxseg5ei32_v_u32m1(__VA_ARGS__)
9560
#define vsoxseg6ei32_v_u32m1(...) __riscv_vsoxseg6ei32_v_u32m1(__VA_ARGS__)
9561
#define vsoxseg7ei32_v_u32m1(...) __riscv_vsoxseg7ei32_v_u32m1(__VA_ARGS__)
9562
#define vsoxseg8ei32_v_u32m1(...) __riscv_vsoxseg8ei32_v_u32m1(__VA_ARGS__)
9563
#define vsoxseg2ei32_v_u32m2(...) __riscv_vsoxseg2ei32_v_u32m2(__VA_ARGS__)
9564
#define vsoxseg3ei32_v_u32m2(...) __riscv_vsoxseg3ei32_v_u32m2(__VA_ARGS__)
9565
#define vsoxseg4ei32_v_u32m2(...) __riscv_vsoxseg4ei32_v_u32m2(__VA_ARGS__)
9566
#define vsoxseg2ei32_v_u32m4(...) __riscv_vsoxseg2ei32_v_u32m4(__VA_ARGS__)
9567
#define vsoxseg2ei64_v_u32mf2(...) __riscv_vsoxseg2ei64_v_u32mf2(__VA_ARGS__)
9568
#define vsoxseg3ei64_v_u32mf2(...) __riscv_vsoxseg3ei64_v_u32mf2(__VA_ARGS__)
9569
#define vsoxseg4ei64_v_u32mf2(...) __riscv_vsoxseg4ei64_v_u32mf2(__VA_ARGS__)
9570
#define vsoxseg5ei64_v_u32mf2(...) __riscv_vsoxseg5ei64_v_u32mf2(__VA_ARGS__)
9571
#define vsoxseg6ei64_v_u32mf2(...) __riscv_vsoxseg6ei64_v_u32mf2(__VA_ARGS__)
9572
#define vsoxseg7ei64_v_u32mf2(...) __riscv_vsoxseg7ei64_v_u32mf2(__VA_ARGS__)
9573
#define vsoxseg8ei64_v_u32mf2(...) __riscv_vsoxseg8ei64_v_u32mf2(__VA_ARGS__)
9574
#define vsoxseg2ei64_v_u32m1(...) __riscv_vsoxseg2ei64_v_u32m1(__VA_ARGS__)
9575
#define vsoxseg3ei64_v_u32m1(...) __riscv_vsoxseg3ei64_v_u32m1(__VA_ARGS__)
9576
#define vsoxseg4ei64_v_u32m1(...) __riscv_vsoxseg4ei64_v_u32m1(__VA_ARGS__)
9577
#define vsoxseg5ei64_v_u32m1(...) __riscv_vsoxseg5ei64_v_u32m1(__VA_ARGS__)
9578
#define vsoxseg6ei64_v_u32m1(...) __riscv_vsoxseg6ei64_v_u32m1(__VA_ARGS__)
9579
#define vsoxseg7ei64_v_u32m1(...) __riscv_vsoxseg7ei64_v_u32m1(__VA_ARGS__)
9580
#define vsoxseg8ei64_v_u32m1(...) __riscv_vsoxseg8ei64_v_u32m1(__VA_ARGS__)
9581
#define vsoxseg2ei64_v_u32m2(...) __riscv_vsoxseg2ei64_v_u32m2(__VA_ARGS__)
9582
#define vsoxseg3ei64_v_u32m2(...) __riscv_vsoxseg3ei64_v_u32m2(__VA_ARGS__)
9583
#define vsoxseg4ei64_v_u32m2(...) __riscv_vsoxseg4ei64_v_u32m2(__VA_ARGS__)
9584
#define vsoxseg2ei64_v_u32m4(...) __riscv_vsoxseg2ei64_v_u32m4(__VA_ARGS__)
9585
#define vsoxseg2ei8_v_u64m1(...) __riscv_vsoxseg2ei8_v_u64m1(__VA_ARGS__)
9586
#define vsoxseg3ei8_v_u64m1(...) __riscv_vsoxseg3ei8_v_u64m1(__VA_ARGS__)
9587
#define vsoxseg4ei8_v_u64m1(...) __riscv_vsoxseg4ei8_v_u64m1(__VA_ARGS__)
9588
#define vsoxseg5ei8_v_u64m1(...) __riscv_vsoxseg5ei8_v_u64m1(__VA_ARGS__)
9589
#define vsoxseg6ei8_v_u64m1(...) __riscv_vsoxseg6ei8_v_u64m1(__VA_ARGS__)
9590
#define vsoxseg7ei8_v_u64m1(...) __riscv_vsoxseg7ei8_v_u64m1(__VA_ARGS__)
9591
#define vsoxseg8ei8_v_u64m1(...) __riscv_vsoxseg8ei8_v_u64m1(__VA_ARGS__)
9592
#define vsoxseg2ei8_v_u64m2(...) __riscv_vsoxseg2ei8_v_u64m2(__VA_ARGS__)
9593
#define vsoxseg3ei8_v_u64m2(...) __riscv_vsoxseg3ei8_v_u64m2(__VA_ARGS__)
9594
#define vsoxseg4ei8_v_u64m2(...) __riscv_vsoxseg4ei8_v_u64m2(__VA_ARGS__)
9595
#define vsoxseg2ei8_v_u64m4(...) __riscv_vsoxseg2ei8_v_u64m4(__VA_ARGS__)
9596
#define vsoxseg2ei16_v_u64m1(...) __riscv_vsoxseg2ei16_v_u64m1(__VA_ARGS__)
9597
#define vsoxseg3ei16_v_u64m1(...) __riscv_vsoxseg3ei16_v_u64m1(__VA_ARGS__)
9598
#define vsoxseg4ei16_v_u64m1(...) __riscv_vsoxseg4ei16_v_u64m1(__VA_ARGS__)
9599
#define vsoxseg5ei16_v_u64m1(...) __riscv_vsoxseg5ei16_v_u64m1(__VA_ARGS__)
9600
#define vsoxseg6ei16_v_u64m1(...) __riscv_vsoxseg6ei16_v_u64m1(__VA_ARGS__)
9601
#define vsoxseg7ei16_v_u64m1(...) __riscv_vsoxseg7ei16_v_u64m1(__VA_ARGS__)
9602
#define vsoxseg8ei16_v_u64m1(...) __riscv_vsoxseg8ei16_v_u64m1(__VA_ARGS__)
9603
#define vsoxseg2ei16_v_u64m2(...) __riscv_vsoxseg2ei16_v_u64m2(__VA_ARGS__)
9604
#define vsoxseg3ei16_v_u64m2(...) __riscv_vsoxseg3ei16_v_u64m2(__VA_ARGS__)
9605
#define vsoxseg4ei16_v_u64m2(...) __riscv_vsoxseg4ei16_v_u64m2(__VA_ARGS__)
9606
#define vsoxseg2ei16_v_u64m4(...) __riscv_vsoxseg2ei16_v_u64m4(__VA_ARGS__)
9607
#define vsoxseg2ei32_v_u64m1(...) __riscv_vsoxseg2ei32_v_u64m1(__VA_ARGS__)
9608
#define vsoxseg3ei32_v_u64m1(...) __riscv_vsoxseg3ei32_v_u64m1(__VA_ARGS__)
9609
#define vsoxseg4ei32_v_u64m1(...) __riscv_vsoxseg4ei32_v_u64m1(__VA_ARGS__)
9610
#define vsoxseg5ei32_v_u64m1(...) __riscv_vsoxseg5ei32_v_u64m1(__VA_ARGS__)
9611
#define vsoxseg6ei32_v_u64m1(...) __riscv_vsoxseg6ei32_v_u64m1(__VA_ARGS__)
9612
#define vsoxseg7ei32_v_u64m1(...) __riscv_vsoxseg7ei32_v_u64m1(__VA_ARGS__)
9613
#define vsoxseg8ei32_v_u64m1(...) __riscv_vsoxseg8ei32_v_u64m1(__VA_ARGS__)
9614
#define vsoxseg2ei32_v_u64m2(...) __riscv_vsoxseg2ei32_v_u64m2(__VA_ARGS__)
9615
#define vsoxseg3ei32_v_u64m2(...) __riscv_vsoxseg3ei32_v_u64m2(__VA_ARGS__)
9616
#define vsoxseg4ei32_v_u64m2(...) __riscv_vsoxseg4ei32_v_u64m2(__VA_ARGS__)
9617
#define vsoxseg2ei32_v_u64m4(...) __riscv_vsoxseg2ei32_v_u64m4(__VA_ARGS__)
9618
#define vsoxseg2ei64_v_u64m1(...) __riscv_vsoxseg2ei64_v_u64m1(__VA_ARGS__)
9619
#define vsoxseg3ei64_v_u64m1(...) __riscv_vsoxseg3ei64_v_u64m1(__VA_ARGS__)
9620
#define vsoxseg4ei64_v_u64m1(...) __riscv_vsoxseg4ei64_v_u64m1(__VA_ARGS__)
9621
#define vsoxseg5ei64_v_u64m1(...) __riscv_vsoxseg5ei64_v_u64m1(__VA_ARGS__)
9622
#define vsoxseg6ei64_v_u64m1(...) __riscv_vsoxseg6ei64_v_u64m1(__VA_ARGS__)
9623
#define vsoxseg7ei64_v_u64m1(...) __riscv_vsoxseg7ei64_v_u64m1(__VA_ARGS__)
9624
#define vsoxseg8ei64_v_u64m1(...) __riscv_vsoxseg8ei64_v_u64m1(__VA_ARGS__)
9625
#define vsoxseg2ei64_v_u64m2(...) __riscv_vsoxseg2ei64_v_u64m2(__VA_ARGS__)
9626
#define vsoxseg3ei64_v_u64m2(...) __riscv_vsoxseg3ei64_v_u64m2(__VA_ARGS__)
9627
#define vsoxseg4ei64_v_u64m2(...) __riscv_vsoxseg4ei64_v_u64m2(__VA_ARGS__)
9628
#define vsoxseg2ei64_v_u64m4(...) __riscv_vsoxseg2ei64_v_u64m4(__VA_ARGS__)
9629
#define vsuxseg2ei8_v_u8mf8(...) __riscv_vsuxseg2ei8_v_u8mf8(__VA_ARGS__)
9630
#define vsuxseg3ei8_v_u8mf8(...) __riscv_vsuxseg3ei8_v_u8mf8(__VA_ARGS__)
9631
#define vsuxseg4ei8_v_u8mf8(...) __riscv_vsuxseg4ei8_v_u8mf8(__VA_ARGS__)
9632
#define vsuxseg5ei8_v_u8mf8(...) __riscv_vsuxseg5ei8_v_u8mf8(__VA_ARGS__)
9633
#define vsuxseg6ei8_v_u8mf8(...) __riscv_vsuxseg6ei8_v_u8mf8(__VA_ARGS__)
9634
#define vsuxseg7ei8_v_u8mf8(...) __riscv_vsuxseg7ei8_v_u8mf8(__VA_ARGS__)
9635
#define vsuxseg8ei8_v_u8mf8(...) __riscv_vsuxseg8ei8_v_u8mf8(__VA_ARGS__)
9636
#define vsuxseg2ei8_v_u8mf4(...) __riscv_vsuxseg2ei8_v_u8mf4(__VA_ARGS__)
9637
#define vsuxseg3ei8_v_u8mf4(...) __riscv_vsuxseg3ei8_v_u8mf4(__VA_ARGS__)
9638
#define vsuxseg4ei8_v_u8mf4(...) __riscv_vsuxseg4ei8_v_u8mf4(__VA_ARGS__)
9639
#define vsuxseg5ei8_v_u8mf4(...) __riscv_vsuxseg5ei8_v_u8mf4(__VA_ARGS__)
9640
#define vsuxseg6ei8_v_u8mf4(...) __riscv_vsuxseg6ei8_v_u8mf4(__VA_ARGS__)
9641
#define vsuxseg7ei8_v_u8mf4(...) __riscv_vsuxseg7ei8_v_u8mf4(__VA_ARGS__)
9642
#define vsuxseg8ei8_v_u8mf4(...) __riscv_vsuxseg8ei8_v_u8mf4(__VA_ARGS__)
9643
#define vsuxseg2ei8_v_u8mf2(...) __riscv_vsuxseg2ei8_v_u8mf2(__VA_ARGS__)
9644
#define vsuxseg3ei8_v_u8mf2(...) __riscv_vsuxseg3ei8_v_u8mf2(__VA_ARGS__)
9645
#define vsuxseg4ei8_v_u8mf2(...) __riscv_vsuxseg4ei8_v_u8mf2(__VA_ARGS__)
9646
#define vsuxseg5ei8_v_u8mf2(...) __riscv_vsuxseg5ei8_v_u8mf2(__VA_ARGS__)
9647
#define vsuxseg6ei8_v_u8mf2(...) __riscv_vsuxseg6ei8_v_u8mf2(__VA_ARGS__)
9648
#define vsuxseg7ei8_v_u8mf2(...) __riscv_vsuxseg7ei8_v_u8mf2(__VA_ARGS__)
9649
#define vsuxseg8ei8_v_u8mf2(...) __riscv_vsuxseg8ei8_v_u8mf2(__VA_ARGS__)
9650
#define vsuxseg2ei8_v_u8m1(...) __riscv_vsuxseg2ei8_v_u8m1(__VA_ARGS__)
9651
#define vsuxseg3ei8_v_u8m1(...) __riscv_vsuxseg3ei8_v_u8m1(__VA_ARGS__)
9652
#define vsuxseg4ei8_v_u8m1(...) __riscv_vsuxseg4ei8_v_u8m1(__VA_ARGS__)
9653
#define vsuxseg5ei8_v_u8m1(...) __riscv_vsuxseg5ei8_v_u8m1(__VA_ARGS__)
9654
#define vsuxseg6ei8_v_u8m1(...) __riscv_vsuxseg6ei8_v_u8m1(__VA_ARGS__)
9655
#define vsuxseg7ei8_v_u8m1(...) __riscv_vsuxseg7ei8_v_u8m1(__VA_ARGS__)
9656
#define vsuxseg8ei8_v_u8m1(...) __riscv_vsuxseg8ei8_v_u8m1(__VA_ARGS__)
9657
#define vsuxseg2ei8_v_u8m2(...) __riscv_vsuxseg2ei8_v_u8m2(__VA_ARGS__)
9658
#define vsuxseg3ei8_v_u8m2(...) __riscv_vsuxseg3ei8_v_u8m2(__VA_ARGS__)
9659
#define vsuxseg4ei8_v_u8m2(...) __riscv_vsuxseg4ei8_v_u8m2(__VA_ARGS__)
9660
#define vsuxseg2ei8_v_u8m4(...) __riscv_vsuxseg2ei8_v_u8m4(__VA_ARGS__)
9661
#define vsuxseg2ei16_v_u8mf8(...) __riscv_vsuxseg2ei16_v_u8mf8(__VA_ARGS__)
9662
#define vsuxseg3ei16_v_u8mf8(...) __riscv_vsuxseg3ei16_v_u8mf8(__VA_ARGS__)
9663
#define vsuxseg4ei16_v_u8mf8(...) __riscv_vsuxseg4ei16_v_u8mf8(__VA_ARGS__)
9664
#define vsuxseg5ei16_v_u8mf8(...) __riscv_vsuxseg5ei16_v_u8mf8(__VA_ARGS__)
9665
#define vsuxseg6ei16_v_u8mf8(...) __riscv_vsuxseg6ei16_v_u8mf8(__VA_ARGS__)
9666
#define vsuxseg7ei16_v_u8mf8(...) __riscv_vsuxseg7ei16_v_u8mf8(__VA_ARGS__)
9667
#define vsuxseg8ei16_v_u8mf8(...) __riscv_vsuxseg8ei16_v_u8mf8(__VA_ARGS__)
9668
#define vsuxseg2ei16_v_u8mf4(...) __riscv_vsuxseg2ei16_v_u8mf4(__VA_ARGS__)
9669
#define vsuxseg3ei16_v_u8mf4(...) __riscv_vsuxseg3ei16_v_u8mf4(__VA_ARGS__)
9670
#define vsuxseg4ei16_v_u8mf4(...) __riscv_vsuxseg4ei16_v_u8mf4(__VA_ARGS__)
9671
#define vsuxseg5ei16_v_u8mf4(...) __riscv_vsuxseg5ei16_v_u8mf4(__VA_ARGS__)
9672
#define vsuxseg6ei16_v_u8mf4(...) __riscv_vsuxseg6ei16_v_u8mf4(__VA_ARGS__)
9673
#define vsuxseg7ei16_v_u8mf4(...) __riscv_vsuxseg7ei16_v_u8mf4(__VA_ARGS__)
9674
#define vsuxseg8ei16_v_u8mf4(...) __riscv_vsuxseg8ei16_v_u8mf4(__VA_ARGS__)
9675
#define vsuxseg2ei16_v_u8mf2(...) __riscv_vsuxseg2ei16_v_u8mf2(__VA_ARGS__)
9676
#define vsuxseg3ei16_v_u8mf2(...) __riscv_vsuxseg3ei16_v_u8mf2(__VA_ARGS__)
9677
#define vsuxseg4ei16_v_u8mf2(...) __riscv_vsuxseg4ei16_v_u8mf2(__VA_ARGS__)
9678
#define vsuxseg5ei16_v_u8mf2(...) __riscv_vsuxseg5ei16_v_u8mf2(__VA_ARGS__)
9679
#define vsuxseg6ei16_v_u8mf2(...) __riscv_vsuxseg6ei16_v_u8mf2(__VA_ARGS__)
9680
#define vsuxseg7ei16_v_u8mf2(...) __riscv_vsuxseg7ei16_v_u8mf2(__VA_ARGS__)
9681
#define vsuxseg8ei16_v_u8mf2(...) __riscv_vsuxseg8ei16_v_u8mf2(__VA_ARGS__)
9682
#define vsuxseg2ei16_v_u8m1(...) __riscv_vsuxseg2ei16_v_u8m1(__VA_ARGS__)
9683
#define vsuxseg3ei16_v_u8m1(...) __riscv_vsuxseg3ei16_v_u8m1(__VA_ARGS__)
9684
#define vsuxseg4ei16_v_u8m1(...) __riscv_vsuxseg4ei16_v_u8m1(__VA_ARGS__)
9685
#define vsuxseg5ei16_v_u8m1(...) __riscv_vsuxseg5ei16_v_u8m1(__VA_ARGS__)
9686
#define vsuxseg6ei16_v_u8m1(...) __riscv_vsuxseg6ei16_v_u8m1(__VA_ARGS__)
9687
#define vsuxseg7ei16_v_u8m1(...) __riscv_vsuxseg7ei16_v_u8m1(__VA_ARGS__)
9688
#define vsuxseg8ei16_v_u8m1(...) __riscv_vsuxseg8ei16_v_u8m1(__VA_ARGS__)
9689
#define vsuxseg2ei16_v_u8m2(...) __riscv_vsuxseg2ei16_v_u8m2(__VA_ARGS__)
9690
#define vsuxseg3ei16_v_u8m2(...) __riscv_vsuxseg3ei16_v_u8m2(__VA_ARGS__)
9691
#define vsuxseg4ei16_v_u8m2(...) __riscv_vsuxseg4ei16_v_u8m2(__VA_ARGS__)
9692
#define vsuxseg2ei16_v_u8m4(...) __riscv_vsuxseg2ei16_v_u8m4(__VA_ARGS__)
9693
#define vsuxseg2ei32_v_u8mf8(...) __riscv_vsuxseg2ei32_v_u8mf8(__VA_ARGS__)
9694
#define vsuxseg3ei32_v_u8mf8(...) __riscv_vsuxseg3ei32_v_u8mf8(__VA_ARGS__)
9695
#define vsuxseg4ei32_v_u8mf8(...) __riscv_vsuxseg4ei32_v_u8mf8(__VA_ARGS__)
9696
#define vsuxseg5ei32_v_u8mf8(...) __riscv_vsuxseg5ei32_v_u8mf8(__VA_ARGS__)
9697
#define vsuxseg6ei32_v_u8mf8(...) __riscv_vsuxseg6ei32_v_u8mf8(__VA_ARGS__)
9698
#define vsuxseg7ei32_v_u8mf8(...) __riscv_vsuxseg7ei32_v_u8mf8(__VA_ARGS__)
9699
#define vsuxseg8ei32_v_u8mf8(...) __riscv_vsuxseg8ei32_v_u8mf8(__VA_ARGS__)
9700
#define vsuxseg2ei32_v_u8mf4(...) __riscv_vsuxseg2ei32_v_u8mf4(__VA_ARGS__)
9701
#define vsuxseg3ei32_v_u8mf4(...) __riscv_vsuxseg3ei32_v_u8mf4(__VA_ARGS__)
9702
#define vsuxseg4ei32_v_u8mf4(...) __riscv_vsuxseg4ei32_v_u8mf4(__VA_ARGS__)
9703
#define vsuxseg5ei32_v_u8mf4(...) __riscv_vsuxseg5ei32_v_u8mf4(__VA_ARGS__)
9704
#define vsuxseg6ei32_v_u8mf4(...) __riscv_vsuxseg6ei32_v_u8mf4(__VA_ARGS__)
9705
#define vsuxseg7ei32_v_u8mf4(...) __riscv_vsuxseg7ei32_v_u8mf4(__VA_ARGS__)
9706
#define vsuxseg8ei32_v_u8mf4(...) __riscv_vsuxseg8ei32_v_u8mf4(__VA_ARGS__)
9707
#define vsuxseg2ei32_v_u8mf2(...) __riscv_vsuxseg2ei32_v_u8mf2(__VA_ARGS__)
9708
#define vsuxseg3ei32_v_u8mf2(...) __riscv_vsuxseg3ei32_v_u8mf2(__VA_ARGS__)
9709
#define vsuxseg4ei32_v_u8mf2(...) __riscv_vsuxseg4ei32_v_u8mf2(__VA_ARGS__)
9710
#define vsuxseg5ei32_v_u8mf2(...) __riscv_vsuxseg5ei32_v_u8mf2(__VA_ARGS__)
9711
#define vsuxseg6ei32_v_u8mf2(...) __riscv_vsuxseg6ei32_v_u8mf2(__VA_ARGS__)
9712
#define vsuxseg7ei32_v_u8mf2(...) __riscv_vsuxseg7ei32_v_u8mf2(__VA_ARGS__)
9713
#define vsuxseg8ei32_v_u8mf2(...) __riscv_vsuxseg8ei32_v_u8mf2(__VA_ARGS__)
9714
#define vsuxseg2ei32_v_u8m1(...) __riscv_vsuxseg2ei32_v_u8m1(__VA_ARGS__)
9715
#define vsuxseg3ei32_v_u8m1(...) __riscv_vsuxseg3ei32_v_u8m1(__VA_ARGS__)
9716
#define vsuxseg4ei32_v_u8m1(...) __riscv_vsuxseg4ei32_v_u8m1(__VA_ARGS__)
9717
#define vsuxseg5ei32_v_u8m1(...) __riscv_vsuxseg5ei32_v_u8m1(__VA_ARGS__)
9718
#define vsuxseg6ei32_v_u8m1(...) __riscv_vsuxseg6ei32_v_u8m1(__VA_ARGS__)
9719
#define vsuxseg7ei32_v_u8m1(...) __riscv_vsuxseg7ei32_v_u8m1(__VA_ARGS__)
9720
#define vsuxseg8ei32_v_u8m1(...) __riscv_vsuxseg8ei32_v_u8m1(__VA_ARGS__)
9721
#define vsuxseg2ei32_v_u8m2(...) __riscv_vsuxseg2ei32_v_u8m2(__VA_ARGS__)
9722
#define vsuxseg3ei32_v_u8m2(...) __riscv_vsuxseg3ei32_v_u8m2(__VA_ARGS__)
9723
#define vsuxseg4ei32_v_u8m2(...) __riscv_vsuxseg4ei32_v_u8m2(__VA_ARGS__)
9724
#define vsuxseg2ei64_v_u8mf8(...) __riscv_vsuxseg2ei64_v_u8mf8(__VA_ARGS__)
9725
#define vsuxseg3ei64_v_u8mf8(...) __riscv_vsuxseg3ei64_v_u8mf8(__VA_ARGS__)
9726
#define vsuxseg4ei64_v_u8mf8(...) __riscv_vsuxseg4ei64_v_u8mf8(__VA_ARGS__)
9727
#define vsuxseg5ei64_v_u8mf8(...) __riscv_vsuxseg5ei64_v_u8mf8(__VA_ARGS__)
9728
#define vsuxseg6ei64_v_u8mf8(...) __riscv_vsuxseg6ei64_v_u8mf8(__VA_ARGS__)
9729
#define vsuxseg7ei64_v_u8mf8(...) __riscv_vsuxseg7ei64_v_u8mf8(__VA_ARGS__)
9730
#define vsuxseg8ei64_v_u8mf8(...) __riscv_vsuxseg8ei64_v_u8mf8(__VA_ARGS__)
9731
#define vsuxseg2ei64_v_u8mf4(...) __riscv_vsuxseg2ei64_v_u8mf4(__VA_ARGS__)
9732
#define vsuxseg3ei64_v_u8mf4(...) __riscv_vsuxseg3ei64_v_u8mf4(__VA_ARGS__)
9733
#define vsuxseg4ei64_v_u8mf4(...) __riscv_vsuxseg4ei64_v_u8mf4(__VA_ARGS__)
9734
#define vsuxseg5ei64_v_u8mf4(...) __riscv_vsuxseg5ei64_v_u8mf4(__VA_ARGS__)
9735
#define vsuxseg6ei64_v_u8mf4(...) __riscv_vsuxseg6ei64_v_u8mf4(__VA_ARGS__)
9736
#define vsuxseg7ei64_v_u8mf4(...) __riscv_vsuxseg7ei64_v_u8mf4(__VA_ARGS__)
9737
#define vsuxseg8ei64_v_u8mf4(...) __riscv_vsuxseg8ei64_v_u8mf4(__VA_ARGS__)
9738
#define vsuxseg2ei64_v_u8mf2(...) __riscv_vsuxseg2ei64_v_u8mf2(__VA_ARGS__)
9739
#define vsuxseg3ei64_v_u8mf2(...) __riscv_vsuxseg3ei64_v_u8mf2(__VA_ARGS__)
9740
#define vsuxseg4ei64_v_u8mf2(...) __riscv_vsuxseg4ei64_v_u8mf2(__VA_ARGS__)
9741
#define vsuxseg5ei64_v_u8mf2(...) __riscv_vsuxseg5ei64_v_u8mf2(__VA_ARGS__)
9742
#define vsuxseg6ei64_v_u8mf2(...) __riscv_vsuxseg6ei64_v_u8mf2(__VA_ARGS__)
9743
#define vsuxseg7ei64_v_u8mf2(...) __riscv_vsuxseg7ei64_v_u8mf2(__VA_ARGS__)
9744
#define vsuxseg8ei64_v_u8mf2(...) __riscv_vsuxseg8ei64_v_u8mf2(__VA_ARGS__)
9745
#define vsuxseg2ei64_v_u8m1(...) __riscv_vsuxseg2ei64_v_u8m1(__VA_ARGS__)
9746
#define vsuxseg3ei64_v_u8m1(...) __riscv_vsuxseg3ei64_v_u8m1(__VA_ARGS__)
9747
#define vsuxseg4ei64_v_u8m1(...) __riscv_vsuxseg4ei64_v_u8m1(__VA_ARGS__)
9748
#define vsuxseg5ei64_v_u8m1(...) __riscv_vsuxseg5ei64_v_u8m1(__VA_ARGS__)
9749
#define vsuxseg6ei64_v_u8m1(...) __riscv_vsuxseg6ei64_v_u8m1(__VA_ARGS__)
9750
#define vsuxseg7ei64_v_u8m1(...) __riscv_vsuxseg7ei64_v_u8m1(__VA_ARGS__)
9751
#define vsuxseg8ei64_v_u8m1(...) __riscv_vsuxseg8ei64_v_u8m1(__VA_ARGS__)
9752
#define vsuxseg2ei8_v_u16mf4(...) __riscv_vsuxseg2ei8_v_u16mf4(__VA_ARGS__)
9753
#define vsuxseg3ei8_v_u16mf4(...) __riscv_vsuxseg3ei8_v_u16mf4(__VA_ARGS__)
9754
#define vsuxseg4ei8_v_u16mf4(...) __riscv_vsuxseg4ei8_v_u16mf4(__VA_ARGS__)
9755
#define vsuxseg5ei8_v_u16mf4(...) __riscv_vsuxseg5ei8_v_u16mf4(__VA_ARGS__)
9756
#define vsuxseg6ei8_v_u16mf4(...) __riscv_vsuxseg6ei8_v_u16mf4(__VA_ARGS__)
9757
#define vsuxseg7ei8_v_u16mf4(...) __riscv_vsuxseg7ei8_v_u16mf4(__VA_ARGS__)
9758
#define vsuxseg8ei8_v_u16mf4(...) __riscv_vsuxseg8ei8_v_u16mf4(__VA_ARGS__)
9759
#define vsuxseg2ei8_v_u16mf2(...) __riscv_vsuxseg2ei8_v_u16mf2(__VA_ARGS__)
9760
#define vsuxseg3ei8_v_u16mf2(...) __riscv_vsuxseg3ei8_v_u16mf2(__VA_ARGS__)
9761
#define vsuxseg4ei8_v_u16mf2(...) __riscv_vsuxseg4ei8_v_u16mf2(__VA_ARGS__)
9762
#define vsuxseg5ei8_v_u16mf2(...) __riscv_vsuxseg5ei8_v_u16mf2(__VA_ARGS__)
9763
#define vsuxseg6ei8_v_u16mf2(...) __riscv_vsuxseg6ei8_v_u16mf2(__VA_ARGS__)
9764
#define vsuxseg7ei8_v_u16mf2(...) __riscv_vsuxseg7ei8_v_u16mf2(__VA_ARGS__)
9765
#define vsuxseg8ei8_v_u16mf2(...) __riscv_vsuxseg8ei8_v_u16mf2(__VA_ARGS__)
9766
#define vsuxseg2ei8_v_u16m1(...) __riscv_vsuxseg2ei8_v_u16m1(__VA_ARGS__)
9767
#define vsuxseg3ei8_v_u16m1(...) __riscv_vsuxseg3ei8_v_u16m1(__VA_ARGS__)
9768
#define vsuxseg4ei8_v_u16m1(...) __riscv_vsuxseg4ei8_v_u16m1(__VA_ARGS__)
9769
#define vsuxseg5ei8_v_u16m1(...) __riscv_vsuxseg5ei8_v_u16m1(__VA_ARGS__)
9770
#define vsuxseg6ei8_v_u16m1(...) __riscv_vsuxseg6ei8_v_u16m1(__VA_ARGS__)
9771
#define vsuxseg7ei8_v_u16m1(...) __riscv_vsuxseg7ei8_v_u16m1(__VA_ARGS__)
9772
#define vsuxseg8ei8_v_u16m1(...) __riscv_vsuxseg8ei8_v_u16m1(__VA_ARGS__)
9773
#define vsuxseg2ei8_v_u16m2(...) __riscv_vsuxseg2ei8_v_u16m2(__VA_ARGS__)
9774
#define vsuxseg3ei8_v_u16m2(...) __riscv_vsuxseg3ei8_v_u16m2(__VA_ARGS__)
9775
#define vsuxseg4ei8_v_u16m2(...) __riscv_vsuxseg4ei8_v_u16m2(__VA_ARGS__)
9776
#define vsuxseg2ei8_v_u16m4(...) __riscv_vsuxseg2ei8_v_u16m4(__VA_ARGS__)
9777
#define vsuxseg2ei16_v_u16mf4(...) __riscv_vsuxseg2ei16_v_u16mf4(__VA_ARGS__)
9778
#define vsuxseg3ei16_v_u16mf4(...) __riscv_vsuxseg3ei16_v_u16mf4(__VA_ARGS__)
9779
#define vsuxseg4ei16_v_u16mf4(...) __riscv_vsuxseg4ei16_v_u16mf4(__VA_ARGS__)
9780
#define vsuxseg5ei16_v_u16mf4(...) __riscv_vsuxseg5ei16_v_u16mf4(__VA_ARGS__)
9781
#define vsuxseg6ei16_v_u16mf4(...) __riscv_vsuxseg6ei16_v_u16mf4(__VA_ARGS__)
9782
#define vsuxseg7ei16_v_u16mf4(...) __riscv_vsuxseg7ei16_v_u16mf4(__VA_ARGS__)
9783
#define vsuxseg8ei16_v_u16mf4(...) __riscv_vsuxseg8ei16_v_u16mf4(__VA_ARGS__)
9784
#define vsuxseg2ei16_v_u16mf2(...) __riscv_vsuxseg2ei16_v_u16mf2(__VA_ARGS__)
9785
#define vsuxseg3ei16_v_u16mf2(...) __riscv_vsuxseg3ei16_v_u16mf2(__VA_ARGS__)
9786
#define vsuxseg4ei16_v_u16mf2(...) __riscv_vsuxseg4ei16_v_u16mf2(__VA_ARGS__)
9787
#define vsuxseg5ei16_v_u16mf2(...) __riscv_vsuxseg5ei16_v_u16mf2(__VA_ARGS__)
9788
#define vsuxseg6ei16_v_u16mf2(...) __riscv_vsuxseg6ei16_v_u16mf2(__VA_ARGS__)
9789
#define vsuxseg7ei16_v_u16mf2(...) __riscv_vsuxseg7ei16_v_u16mf2(__VA_ARGS__)
9790
#define vsuxseg8ei16_v_u16mf2(...) __riscv_vsuxseg8ei16_v_u16mf2(__VA_ARGS__)
9791
#define vsuxseg2ei16_v_u16m1(...) __riscv_vsuxseg2ei16_v_u16m1(__VA_ARGS__)
9792
#define vsuxseg3ei16_v_u16m1(...) __riscv_vsuxseg3ei16_v_u16m1(__VA_ARGS__)
9793
#define vsuxseg4ei16_v_u16m1(...) __riscv_vsuxseg4ei16_v_u16m1(__VA_ARGS__)
9794
#define vsuxseg5ei16_v_u16m1(...) __riscv_vsuxseg5ei16_v_u16m1(__VA_ARGS__)
9795
#define vsuxseg6ei16_v_u16m1(...) __riscv_vsuxseg6ei16_v_u16m1(__VA_ARGS__)
9796
#define vsuxseg7ei16_v_u16m1(...) __riscv_vsuxseg7ei16_v_u16m1(__VA_ARGS__)
9797
#define vsuxseg8ei16_v_u16m1(...) __riscv_vsuxseg8ei16_v_u16m1(__VA_ARGS__)
9798
#define vsuxseg2ei16_v_u16m2(...) __riscv_vsuxseg2ei16_v_u16m2(__VA_ARGS__)
9799
#define vsuxseg3ei16_v_u16m2(...) __riscv_vsuxseg3ei16_v_u16m2(__VA_ARGS__)
9800
#define vsuxseg4ei16_v_u16m2(...) __riscv_vsuxseg4ei16_v_u16m2(__VA_ARGS__)
9801
#define vsuxseg2ei16_v_u16m4(...) __riscv_vsuxseg2ei16_v_u16m4(__VA_ARGS__)
9802
#define vsuxseg2ei32_v_u16mf4(...) __riscv_vsuxseg2ei32_v_u16mf4(__VA_ARGS__)
9803
#define vsuxseg3ei32_v_u16mf4(...) __riscv_vsuxseg3ei32_v_u16mf4(__VA_ARGS__)
9804
#define vsuxseg4ei32_v_u16mf4(...) __riscv_vsuxseg4ei32_v_u16mf4(__VA_ARGS__)
9805
#define vsuxseg5ei32_v_u16mf4(...) __riscv_vsuxseg5ei32_v_u16mf4(__VA_ARGS__)
9806
#define vsuxseg6ei32_v_u16mf4(...) __riscv_vsuxseg6ei32_v_u16mf4(__VA_ARGS__)
9807
#define vsuxseg7ei32_v_u16mf4(...) __riscv_vsuxseg7ei32_v_u16mf4(__VA_ARGS__)
9808
#define vsuxseg8ei32_v_u16mf4(...) __riscv_vsuxseg8ei32_v_u16mf4(__VA_ARGS__)
9809
#define vsuxseg2ei32_v_u16mf2(...) __riscv_vsuxseg2ei32_v_u16mf2(__VA_ARGS__)
9810
#define vsuxseg3ei32_v_u16mf2(...) __riscv_vsuxseg3ei32_v_u16mf2(__VA_ARGS__)
9811
#define vsuxseg4ei32_v_u16mf2(...) __riscv_vsuxseg4ei32_v_u16mf2(__VA_ARGS__)
9812
#define vsuxseg5ei32_v_u16mf2(...) __riscv_vsuxseg5ei32_v_u16mf2(__VA_ARGS__)
9813
#define vsuxseg6ei32_v_u16mf2(...) __riscv_vsuxseg6ei32_v_u16mf2(__VA_ARGS__)
9814
#define vsuxseg7ei32_v_u16mf2(...) __riscv_vsuxseg7ei32_v_u16mf2(__VA_ARGS__)
9815
#define vsuxseg8ei32_v_u16mf2(...) __riscv_vsuxseg8ei32_v_u16mf2(__VA_ARGS__)
9816
#define vsuxseg2ei32_v_u16m1(...) __riscv_vsuxseg2ei32_v_u16m1(__VA_ARGS__)
9817
#define vsuxseg3ei32_v_u16m1(...) __riscv_vsuxseg3ei32_v_u16m1(__VA_ARGS__)
9818
#define vsuxseg4ei32_v_u16m1(...) __riscv_vsuxseg4ei32_v_u16m1(__VA_ARGS__)
9819
#define vsuxseg5ei32_v_u16m1(...) __riscv_vsuxseg5ei32_v_u16m1(__VA_ARGS__)
9820
#define vsuxseg6ei32_v_u16m1(...) __riscv_vsuxseg6ei32_v_u16m1(__VA_ARGS__)
9821
#define vsuxseg7ei32_v_u16m1(...) __riscv_vsuxseg7ei32_v_u16m1(__VA_ARGS__)
9822
#define vsuxseg8ei32_v_u16m1(...) __riscv_vsuxseg8ei32_v_u16m1(__VA_ARGS__)
9823
#define vsuxseg2ei32_v_u16m2(...) __riscv_vsuxseg2ei32_v_u16m2(__VA_ARGS__)
9824
#define vsuxseg3ei32_v_u16m2(...) __riscv_vsuxseg3ei32_v_u16m2(__VA_ARGS__)
9825
#define vsuxseg4ei32_v_u16m2(...) __riscv_vsuxseg4ei32_v_u16m2(__VA_ARGS__)
9826
#define vsuxseg2ei32_v_u16m4(...) __riscv_vsuxseg2ei32_v_u16m4(__VA_ARGS__)
9827
#define vsuxseg2ei64_v_u16mf4(...) __riscv_vsuxseg2ei64_v_u16mf4(__VA_ARGS__)
9828
#define vsuxseg3ei64_v_u16mf4(...) __riscv_vsuxseg3ei64_v_u16mf4(__VA_ARGS__)
9829
#define vsuxseg4ei64_v_u16mf4(...) __riscv_vsuxseg4ei64_v_u16mf4(__VA_ARGS__)
9830
#define vsuxseg5ei64_v_u16mf4(...) __riscv_vsuxseg5ei64_v_u16mf4(__VA_ARGS__)
9831
#define vsuxseg6ei64_v_u16mf4(...) __riscv_vsuxseg6ei64_v_u16mf4(__VA_ARGS__)
9832
#define vsuxseg7ei64_v_u16mf4(...) __riscv_vsuxseg7ei64_v_u16mf4(__VA_ARGS__)
9833
#define vsuxseg8ei64_v_u16mf4(...) __riscv_vsuxseg8ei64_v_u16mf4(__VA_ARGS__)
9834
#define vsuxseg2ei64_v_u16mf2(...) __riscv_vsuxseg2ei64_v_u16mf2(__VA_ARGS__)
9835
#define vsuxseg3ei64_v_u16mf2(...) __riscv_vsuxseg3ei64_v_u16mf2(__VA_ARGS__)
9836
#define vsuxseg4ei64_v_u16mf2(...) __riscv_vsuxseg4ei64_v_u16mf2(__VA_ARGS__)
9837
#define vsuxseg5ei64_v_u16mf2(...) __riscv_vsuxseg5ei64_v_u16mf2(__VA_ARGS__)
9838
#define vsuxseg6ei64_v_u16mf2(...) __riscv_vsuxseg6ei64_v_u16mf2(__VA_ARGS__)
9839
#define vsuxseg7ei64_v_u16mf2(...) __riscv_vsuxseg7ei64_v_u16mf2(__VA_ARGS__)
9840
#define vsuxseg8ei64_v_u16mf2(...) __riscv_vsuxseg8ei64_v_u16mf2(__VA_ARGS__)
9841
#define vsuxseg2ei64_v_u16m1(...) __riscv_vsuxseg2ei64_v_u16m1(__VA_ARGS__)
9842
#define vsuxseg3ei64_v_u16m1(...) __riscv_vsuxseg3ei64_v_u16m1(__VA_ARGS__)
9843
#define vsuxseg4ei64_v_u16m1(...) __riscv_vsuxseg4ei64_v_u16m1(__VA_ARGS__)
9844
#define vsuxseg5ei64_v_u16m1(...) __riscv_vsuxseg5ei64_v_u16m1(__VA_ARGS__)
9845
#define vsuxseg6ei64_v_u16m1(...) __riscv_vsuxseg6ei64_v_u16m1(__VA_ARGS__)
9846
#define vsuxseg7ei64_v_u16m1(...) __riscv_vsuxseg7ei64_v_u16m1(__VA_ARGS__)
9847
#define vsuxseg8ei64_v_u16m1(...) __riscv_vsuxseg8ei64_v_u16m1(__VA_ARGS__)
9848
#define vsuxseg2ei64_v_u16m2(...) __riscv_vsuxseg2ei64_v_u16m2(__VA_ARGS__)
9849
#define vsuxseg3ei64_v_u16m2(...) __riscv_vsuxseg3ei64_v_u16m2(__VA_ARGS__)
9850
#define vsuxseg4ei64_v_u16m2(...) __riscv_vsuxseg4ei64_v_u16m2(__VA_ARGS__)
9851
#define vsuxseg2ei8_v_u32mf2(...) __riscv_vsuxseg2ei8_v_u32mf2(__VA_ARGS__)
9852
#define vsuxseg3ei8_v_u32mf2(...) __riscv_vsuxseg3ei8_v_u32mf2(__VA_ARGS__)
9853
#define vsuxseg4ei8_v_u32mf2(...) __riscv_vsuxseg4ei8_v_u32mf2(__VA_ARGS__)
9854
#define vsuxseg5ei8_v_u32mf2(...) __riscv_vsuxseg5ei8_v_u32mf2(__VA_ARGS__)
9855
#define vsuxseg6ei8_v_u32mf2(...) __riscv_vsuxseg6ei8_v_u32mf2(__VA_ARGS__)
9856
#define vsuxseg7ei8_v_u32mf2(...) __riscv_vsuxseg7ei8_v_u32mf2(__VA_ARGS__)
9857
#define vsuxseg8ei8_v_u32mf2(...) __riscv_vsuxseg8ei8_v_u32mf2(__VA_ARGS__)
9858
#define vsuxseg2ei8_v_u32m1(...) __riscv_vsuxseg2ei8_v_u32m1(__VA_ARGS__)
9859
#define vsuxseg3ei8_v_u32m1(...) __riscv_vsuxseg3ei8_v_u32m1(__VA_ARGS__)
9860
#define vsuxseg4ei8_v_u32m1(...) __riscv_vsuxseg4ei8_v_u32m1(__VA_ARGS__)
9861
#define vsuxseg5ei8_v_u32m1(...) __riscv_vsuxseg5ei8_v_u32m1(__VA_ARGS__)
9862
#define vsuxseg6ei8_v_u32m1(...) __riscv_vsuxseg6ei8_v_u32m1(__VA_ARGS__)
9863
#define vsuxseg7ei8_v_u32m1(...) __riscv_vsuxseg7ei8_v_u32m1(__VA_ARGS__)
9864
#define vsuxseg8ei8_v_u32m1(...) __riscv_vsuxseg8ei8_v_u32m1(__VA_ARGS__)
9865
#define vsuxseg2ei8_v_u32m2(...) __riscv_vsuxseg2ei8_v_u32m2(__VA_ARGS__)
9866
#define vsuxseg3ei8_v_u32m2(...) __riscv_vsuxseg3ei8_v_u32m2(__VA_ARGS__)
9867
#define vsuxseg4ei8_v_u32m2(...) __riscv_vsuxseg4ei8_v_u32m2(__VA_ARGS__)
9868
#define vsuxseg2ei8_v_u32m4(...) __riscv_vsuxseg2ei8_v_u32m4(__VA_ARGS__)
9869
#define vsuxseg2ei16_v_u32mf2(...) __riscv_vsuxseg2ei16_v_u32mf2(__VA_ARGS__)
9870
#define vsuxseg3ei16_v_u32mf2(...) __riscv_vsuxseg3ei16_v_u32mf2(__VA_ARGS__)
9871
#define vsuxseg4ei16_v_u32mf2(...) __riscv_vsuxseg4ei16_v_u32mf2(__VA_ARGS__)
9872
#define vsuxseg5ei16_v_u32mf2(...) __riscv_vsuxseg5ei16_v_u32mf2(__VA_ARGS__)
9873
#define vsuxseg6ei16_v_u32mf2(...) __riscv_vsuxseg6ei16_v_u32mf2(__VA_ARGS__)
9874
#define vsuxseg7ei16_v_u32mf2(...) __riscv_vsuxseg7ei16_v_u32mf2(__VA_ARGS__)
9875
#define vsuxseg8ei16_v_u32mf2(...) __riscv_vsuxseg8ei16_v_u32mf2(__VA_ARGS__)
9876
#define vsuxseg2ei16_v_u32m1(...) __riscv_vsuxseg2ei16_v_u32m1(__VA_ARGS__)
9877
#define vsuxseg3ei16_v_u32m1(...) __riscv_vsuxseg3ei16_v_u32m1(__VA_ARGS__)
9878
#define vsuxseg4ei16_v_u32m1(...) __riscv_vsuxseg4ei16_v_u32m1(__VA_ARGS__)
9879
#define vsuxseg5ei16_v_u32m1(...) __riscv_vsuxseg5ei16_v_u32m1(__VA_ARGS__)
9880
#define vsuxseg6ei16_v_u32m1(...) __riscv_vsuxseg6ei16_v_u32m1(__VA_ARGS__)
9881
#define vsuxseg7ei16_v_u32m1(...) __riscv_vsuxseg7ei16_v_u32m1(__VA_ARGS__)
9882
#define vsuxseg8ei16_v_u32m1(...) __riscv_vsuxseg8ei16_v_u32m1(__VA_ARGS__)
9883
#define vsuxseg2ei16_v_u32m2(...) __riscv_vsuxseg2ei16_v_u32m2(__VA_ARGS__)
9884
#define vsuxseg3ei16_v_u32m2(...) __riscv_vsuxseg3ei16_v_u32m2(__VA_ARGS__)
9885
#define vsuxseg4ei16_v_u32m2(...) __riscv_vsuxseg4ei16_v_u32m2(__VA_ARGS__)
9886
#define vsuxseg2ei16_v_u32m4(...) __riscv_vsuxseg2ei16_v_u32m4(__VA_ARGS__)
9887
#define vsuxseg2ei32_v_u32mf2(...) __riscv_vsuxseg2ei32_v_u32mf2(__VA_ARGS__)
9888
#define vsuxseg3ei32_v_u32mf2(...) __riscv_vsuxseg3ei32_v_u32mf2(__VA_ARGS__)
9889
#define vsuxseg4ei32_v_u32mf2(...) __riscv_vsuxseg4ei32_v_u32mf2(__VA_ARGS__)
9890
#define vsuxseg5ei32_v_u32mf2(...) __riscv_vsuxseg5ei32_v_u32mf2(__VA_ARGS__)
9891
#define vsuxseg6ei32_v_u32mf2(...) __riscv_vsuxseg6ei32_v_u32mf2(__VA_ARGS__)
9892
#define vsuxseg7ei32_v_u32mf2(...) __riscv_vsuxseg7ei32_v_u32mf2(__VA_ARGS__)
9893
#define vsuxseg8ei32_v_u32mf2(...) __riscv_vsuxseg8ei32_v_u32mf2(__VA_ARGS__)
9894
#define vsuxseg2ei32_v_u32m1(...) __riscv_vsuxseg2ei32_v_u32m1(__VA_ARGS__)
9895
#define vsuxseg3ei32_v_u32m1(...) __riscv_vsuxseg3ei32_v_u32m1(__VA_ARGS__)
9896
#define vsuxseg4ei32_v_u32m1(...) __riscv_vsuxseg4ei32_v_u32m1(__VA_ARGS__)
9897
#define vsuxseg5ei32_v_u32m1(...) __riscv_vsuxseg5ei32_v_u32m1(__VA_ARGS__)
9898
#define vsuxseg6ei32_v_u32m1(...) __riscv_vsuxseg6ei32_v_u32m1(__VA_ARGS__)
9899
#define vsuxseg7ei32_v_u32m1(...) __riscv_vsuxseg7ei32_v_u32m1(__VA_ARGS__)
9900
#define vsuxseg8ei32_v_u32m1(...) __riscv_vsuxseg8ei32_v_u32m1(__VA_ARGS__)
9901
#define vsuxseg2ei32_v_u32m2(...) __riscv_vsuxseg2ei32_v_u32m2(__VA_ARGS__)
9902
#define vsuxseg3ei32_v_u32m2(...) __riscv_vsuxseg3ei32_v_u32m2(__VA_ARGS__)
9903
#define vsuxseg4ei32_v_u32m2(...) __riscv_vsuxseg4ei32_v_u32m2(__VA_ARGS__)
9904
#define vsuxseg2ei32_v_u32m4(...) __riscv_vsuxseg2ei32_v_u32m4(__VA_ARGS__)
9905
#define vsuxseg2ei64_v_u32mf2(...) __riscv_vsuxseg2ei64_v_u32mf2(__VA_ARGS__)
9906
#define vsuxseg3ei64_v_u32mf2(...) __riscv_vsuxseg3ei64_v_u32mf2(__VA_ARGS__)
9907
#define vsuxseg4ei64_v_u32mf2(...) __riscv_vsuxseg4ei64_v_u32mf2(__VA_ARGS__)
9908
#define vsuxseg5ei64_v_u32mf2(...) __riscv_vsuxseg5ei64_v_u32mf2(__VA_ARGS__)
9909
#define vsuxseg6ei64_v_u32mf2(...) __riscv_vsuxseg6ei64_v_u32mf2(__VA_ARGS__)
9910
#define vsuxseg7ei64_v_u32mf2(...) __riscv_vsuxseg7ei64_v_u32mf2(__VA_ARGS__)
9911
#define vsuxseg8ei64_v_u32mf2(...) __riscv_vsuxseg8ei64_v_u32mf2(__VA_ARGS__)
9912
#define vsuxseg2ei64_v_u32m1(...) __riscv_vsuxseg2ei64_v_u32m1(__VA_ARGS__)
9913
#define vsuxseg3ei64_v_u32m1(...) __riscv_vsuxseg3ei64_v_u32m1(__VA_ARGS__)
9914
#define vsuxseg4ei64_v_u32m1(...) __riscv_vsuxseg4ei64_v_u32m1(__VA_ARGS__)
9915
#define vsuxseg5ei64_v_u32m1(...) __riscv_vsuxseg5ei64_v_u32m1(__VA_ARGS__)
9916
#define vsuxseg6ei64_v_u32m1(...) __riscv_vsuxseg6ei64_v_u32m1(__VA_ARGS__)
9917
#define vsuxseg7ei64_v_u32m1(...) __riscv_vsuxseg7ei64_v_u32m1(__VA_ARGS__)
9918
#define vsuxseg8ei64_v_u32m1(...) __riscv_vsuxseg8ei64_v_u32m1(__VA_ARGS__)
9919
#define vsuxseg2ei64_v_u32m2(...) __riscv_vsuxseg2ei64_v_u32m2(__VA_ARGS__)
9920
#define vsuxseg3ei64_v_u32m2(...) __riscv_vsuxseg3ei64_v_u32m2(__VA_ARGS__)
9921
#define vsuxseg4ei64_v_u32m2(...) __riscv_vsuxseg4ei64_v_u32m2(__VA_ARGS__)
9922
#define vsuxseg2ei64_v_u32m4(...) __riscv_vsuxseg2ei64_v_u32m4(__VA_ARGS__)
9923
#define vsuxseg2ei8_v_u64m1(...) __riscv_vsuxseg2ei8_v_u64m1(__VA_ARGS__)
9924
#define vsuxseg3ei8_v_u64m1(...) __riscv_vsuxseg3ei8_v_u64m1(__VA_ARGS__)
9925
#define vsuxseg4ei8_v_u64m1(...) __riscv_vsuxseg4ei8_v_u64m1(__VA_ARGS__)
9926
#define vsuxseg5ei8_v_u64m1(...) __riscv_vsuxseg5ei8_v_u64m1(__VA_ARGS__)
9927
#define vsuxseg6ei8_v_u64m1(...) __riscv_vsuxseg6ei8_v_u64m1(__VA_ARGS__)
9928
#define vsuxseg7ei8_v_u64m1(...) __riscv_vsuxseg7ei8_v_u64m1(__VA_ARGS__)
9929
#define vsuxseg8ei8_v_u64m1(...) __riscv_vsuxseg8ei8_v_u64m1(__VA_ARGS__)
9930
#define vsuxseg2ei8_v_u64m2(...) __riscv_vsuxseg2ei8_v_u64m2(__VA_ARGS__)
9931
#define vsuxseg3ei8_v_u64m2(...) __riscv_vsuxseg3ei8_v_u64m2(__VA_ARGS__)
9932
#define vsuxseg4ei8_v_u64m2(...) __riscv_vsuxseg4ei8_v_u64m2(__VA_ARGS__)
9933
#define vsuxseg2ei8_v_u64m4(...) __riscv_vsuxseg2ei8_v_u64m4(__VA_ARGS__)
9934
#define vsuxseg2ei16_v_u64m1(...) __riscv_vsuxseg2ei16_v_u64m1(__VA_ARGS__)
9935
#define vsuxseg3ei16_v_u64m1(...) __riscv_vsuxseg3ei16_v_u64m1(__VA_ARGS__)
9936
#define vsuxseg4ei16_v_u64m1(...) __riscv_vsuxseg4ei16_v_u64m1(__VA_ARGS__)
9937
#define vsuxseg5ei16_v_u64m1(...) __riscv_vsuxseg5ei16_v_u64m1(__VA_ARGS__)
9938
#define vsuxseg6ei16_v_u64m1(...) __riscv_vsuxseg6ei16_v_u64m1(__VA_ARGS__)
9939
#define vsuxseg7ei16_v_u64m1(...) __riscv_vsuxseg7ei16_v_u64m1(__VA_ARGS__)
9940
#define vsuxseg8ei16_v_u64m1(...) __riscv_vsuxseg8ei16_v_u64m1(__VA_ARGS__)
9941
#define vsuxseg2ei16_v_u64m2(...) __riscv_vsuxseg2ei16_v_u64m2(__VA_ARGS__)
9942
#define vsuxseg3ei16_v_u64m2(...) __riscv_vsuxseg3ei16_v_u64m2(__VA_ARGS__)
9943
#define vsuxseg4ei16_v_u64m2(...) __riscv_vsuxseg4ei16_v_u64m2(__VA_ARGS__)
9944
#define vsuxseg2ei16_v_u64m4(...) __riscv_vsuxseg2ei16_v_u64m4(__VA_ARGS__)
9945
#define vsuxseg2ei32_v_u64m1(...) __riscv_vsuxseg2ei32_v_u64m1(__VA_ARGS__)
9946
#define vsuxseg3ei32_v_u64m1(...) __riscv_vsuxseg3ei32_v_u64m1(__VA_ARGS__)
9947
#define vsuxseg4ei32_v_u64m1(...) __riscv_vsuxseg4ei32_v_u64m1(__VA_ARGS__)
9948
#define vsuxseg5ei32_v_u64m1(...) __riscv_vsuxseg5ei32_v_u64m1(__VA_ARGS__)
9949
#define vsuxseg6ei32_v_u64m1(...) __riscv_vsuxseg6ei32_v_u64m1(__VA_ARGS__)
9950
#define vsuxseg7ei32_v_u64m1(...) __riscv_vsuxseg7ei32_v_u64m1(__VA_ARGS__)
9951
#define vsuxseg8ei32_v_u64m1(...) __riscv_vsuxseg8ei32_v_u64m1(__VA_ARGS__)
9952
#define vsuxseg2ei32_v_u64m2(...) __riscv_vsuxseg2ei32_v_u64m2(__VA_ARGS__)
9953
#define vsuxseg3ei32_v_u64m2(...) __riscv_vsuxseg3ei32_v_u64m2(__VA_ARGS__)
9954
#define vsuxseg4ei32_v_u64m2(...) __riscv_vsuxseg4ei32_v_u64m2(__VA_ARGS__)
9955
#define vsuxseg2ei32_v_u64m4(...) __riscv_vsuxseg2ei32_v_u64m4(__VA_ARGS__)
9956
#define vsuxseg2ei64_v_u64m1(...) __riscv_vsuxseg2ei64_v_u64m1(__VA_ARGS__)
9957
#define vsuxseg3ei64_v_u64m1(...) __riscv_vsuxseg3ei64_v_u64m1(__VA_ARGS__)
9958
#define vsuxseg4ei64_v_u64m1(...) __riscv_vsuxseg4ei64_v_u64m1(__VA_ARGS__)
9959
#define vsuxseg5ei64_v_u64m1(...) __riscv_vsuxseg5ei64_v_u64m1(__VA_ARGS__)
9960
#define vsuxseg6ei64_v_u64m1(...) __riscv_vsuxseg6ei64_v_u64m1(__VA_ARGS__)
9961
#define vsuxseg7ei64_v_u64m1(...) __riscv_vsuxseg7ei64_v_u64m1(__VA_ARGS__)
9962
#define vsuxseg8ei64_v_u64m1(...) __riscv_vsuxseg8ei64_v_u64m1(__VA_ARGS__)
9963
#define vsuxseg2ei64_v_u64m2(...) __riscv_vsuxseg2ei64_v_u64m2(__VA_ARGS__)
9964
#define vsuxseg3ei64_v_u64m2(...) __riscv_vsuxseg3ei64_v_u64m2(__VA_ARGS__)
9965
#define vsuxseg4ei64_v_u64m2(...) __riscv_vsuxseg4ei64_v_u64m2(__VA_ARGS__)
9966
#define vsuxseg2ei64_v_u64m4(...) __riscv_vsuxseg2ei64_v_u64m4(__VA_ARGS__)
9967
// masked functions
9968
#define vsoxseg2ei8_v_f16mf4_m(...) __riscv_vsoxseg2ei8_v_f16mf4_m(__VA_ARGS__)
9969
#define vsoxseg3ei8_v_f16mf4_m(...) __riscv_vsoxseg3ei8_v_f16mf4_m(__VA_ARGS__)
9970
#define vsoxseg4ei8_v_f16mf4_m(...) __riscv_vsoxseg4ei8_v_f16mf4_m(__VA_ARGS__)
9971
#define vsoxseg5ei8_v_f16mf4_m(...) __riscv_vsoxseg5ei8_v_f16mf4_m(__VA_ARGS__)
9972
#define vsoxseg6ei8_v_f16mf4_m(...) __riscv_vsoxseg6ei8_v_f16mf4_m(__VA_ARGS__)
9973
#define vsoxseg7ei8_v_f16mf4_m(...) __riscv_vsoxseg7ei8_v_f16mf4_m(__VA_ARGS__)
9974
#define vsoxseg8ei8_v_f16mf4_m(...) __riscv_vsoxseg8ei8_v_f16mf4_m(__VA_ARGS__)
9975
#define vsoxseg2ei8_v_f16mf2_m(...) __riscv_vsoxseg2ei8_v_f16mf2_m(__VA_ARGS__)
9976
#define vsoxseg3ei8_v_f16mf2_m(...) __riscv_vsoxseg3ei8_v_f16mf2_m(__VA_ARGS__)
9977
#define vsoxseg4ei8_v_f16mf2_m(...) __riscv_vsoxseg4ei8_v_f16mf2_m(__VA_ARGS__)
9978
#define vsoxseg5ei8_v_f16mf2_m(...) __riscv_vsoxseg5ei8_v_f16mf2_m(__VA_ARGS__)
9979
#define vsoxseg6ei8_v_f16mf2_m(...) __riscv_vsoxseg6ei8_v_f16mf2_m(__VA_ARGS__)
9980
#define vsoxseg7ei8_v_f16mf2_m(...) __riscv_vsoxseg7ei8_v_f16mf2_m(__VA_ARGS__)
9981
#define vsoxseg8ei8_v_f16mf2_m(...) __riscv_vsoxseg8ei8_v_f16mf2_m(__VA_ARGS__)
9982
#define vsoxseg2ei8_v_f16m1_m(...) __riscv_vsoxseg2ei8_v_f16m1_m(__VA_ARGS__)
9983
#define vsoxseg3ei8_v_f16m1_m(...) __riscv_vsoxseg3ei8_v_f16m1_m(__VA_ARGS__)
9984
#define vsoxseg4ei8_v_f16m1_m(...) __riscv_vsoxseg4ei8_v_f16m1_m(__VA_ARGS__)
9985
#define vsoxseg5ei8_v_f16m1_m(...) __riscv_vsoxseg5ei8_v_f16m1_m(__VA_ARGS__)
9986
#define vsoxseg6ei8_v_f16m1_m(...) __riscv_vsoxseg6ei8_v_f16m1_m(__VA_ARGS__)
9987
#define vsoxseg7ei8_v_f16m1_m(...) __riscv_vsoxseg7ei8_v_f16m1_m(__VA_ARGS__)
9988
#define vsoxseg8ei8_v_f16m1_m(...) __riscv_vsoxseg8ei8_v_f16m1_m(__VA_ARGS__)
9989
#define vsoxseg2ei8_v_f16m2_m(...) __riscv_vsoxseg2ei8_v_f16m2_m(__VA_ARGS__)
9990
#define vsoxseg3ei8_v_f16m2_m(...) __riscv_vsoxseg3ei8_v_f16m2_m(__VA_ARGS__)
9991
#define vsoxseg4ei8_v_f16m2_m(...) __riscv_vsoxseg4ei8_v_f16m2_m(__VA_ARGS__)
9992
#define vsoxseg2ei8_v_f16m4_m(...) __riscv_vsoxseg2ei8_v_f16m4_m(__VA_ARGS__)
9993
#define vsoxseg2ei16_v_f16mf4_m(...) __riscv_vsoxseg2ei16_v_f16mf4_m(__VA_ARGS__)
9994
#define vsoxseg3ei16_v_f16mf4_m(...) __riscv_vsoxseg3ei16_v_f16mf4_m(__VA_ARGS__)
9995
#define vsoxseg4ei16_v_f16mf4_m(...) __riscv_vsoxseg4ei16_v_f16mf4_m(__VA_ARGS__)
9996
#define vsoxseg5ei16_v_f16mf4_m(...) __riscv_vsoxseg5ei16_v_f16mf4_m(__VA_ARGS__)
9997
#define vsoxseg6ei16_v_f16mf4_m(...) __riscv_vsoxseg6ei16_v_f16mf4_m(__VA_ARGS__)
9998
#define vsoxseg7ei16_v_f16mf4_m(...) __riscv_vsoxseg7ei16_v_f16mf4_m(__VA_ARGS__)
9999
#define vsoxseg8ei16_v_f16mf4_m(...) __riscv_vsoxseg8ei16_v_f16mf4_m(__VA_ARGS__)
10000
#define vsoxseg2ei16_v_f16mf2_m(...) __riscv_vsoxseg2ei16_v_f16mf2_m(__VA_ARGS__)
10001
#define vsoxseg3ei16_v_f16mf2_m(...) __riscv_vsoxseg3ei16_v_f16mf2_m(__VA_ARGS__)
10002
#define vsoxseg4ei16_v_f16mf2_m(...) __riscv_vsoxseg4ei16_v_f16mf2_m(__VA_ARGS__)
10003
#define vsoxseg5ei16_v_f16mf2_m(...) __riscv_vsoxseg5ei16_v_f16mf2_m(__VA_ARGS__)
10004
#define vsoxseg6ei16_v_f16mf2_m(...) __riscv_vsoxseg6ei16_v_f16mf2_m(__VA_ARGS__)
10005
#define vsoxseg7ei16_v_f16mf2_m(...) __riscv_vsoxseg7ei16_v_f16mf2_m(__VA_ARGS__)
10006
#define vsoxseg8ei16_v_f16mf2_m(...) __riscv_vsoxseg8ei16_v_f16mf2_m(__VA_ARGS__)
10007
#define vsoxseg2ei16_v_f16m1_m(...) __riscv_vsoxseg2ei16_v_f16m1_m(__VA_ARGS__)
10008
#define vsoxseg3ei16_v_f16m1_m(...) __riscv_vsoxseg3ei16_v_f16m1_m(__VA_ARGS__)
10009
#define vsoxseg4ei16_v_f16m1_m(...) __riscv_vsoxseg4ei16_v_f16m1_m(__VA_ARGS__)
10010
#define vsoxseg5ei16_v_f16m1_m(...) __riscv_vsoxseg5ei16_v_f16m1_m(__VA_ARGS__)
10011
#define vsoxseg6ei16_v_f16m1_m(...) __riscv_vsoxseg6ei16_v_f16m1_m(__VA_ARGS__)
10012
#define vsoxseg7ei16_v_f16m1_m(...) __riscv_vsoxseg7ei16_v_f16m1_m(__VA_ARGS__)
10013
#define vsoxseg8ei16_v_f16m1_m(...) __riscv_vsoxseg8ei16_v_f16m1_m(__VA_ARGS__)
10014
#define vsoxseg2ei16_v_f16m2_m(...) __riscv_vsoxseg2ei16_v_f16m2_m(__VA_ARGS__)
10015
#define vsoxseg3ei16_v_f16m2_m(...) __riscv_vsoxseg3ei16_v_f16m2_m(__VA_ARGS__)
10016
#define vsoxseg4ei16_v_f16m2_m(...) __riscv_vsoxseg4ei16_v_f16m2_m(__VA_ARGS__)
10017
#define vsoxseg2ei16_v_f16m4_m(...) __riscv_vsoxseg2ei16_v_f16m4_m(__VA_ARGS__)
10018
#define vsoxseg2ei32_v_f16mf4_m(...) __riscv_vsoxseg2ei32_v_f16mf4_m(__VA_ARGS__)
10019
#define vsoxseg3ei32_v_f16mf4_m(...) __riscv_vsoxseg3ei32_v_f16mf4_m(__VA_ARGS__)
10020
#define vsoxseg4ei32_v_f16mf4_m(...) __riscv_vsoxseg4ei32_v_f16mf4_m(__VA_ARGS__)
10021
#define vsoxseg5ei32_v_f16mf4_m(...) __riscv_vsoxseg5ei32_v_f16mf4_m(__VA_ARGS__)
10022
#define vsoxseg6ei32_v_f16mf4_m(...) __riscv_vsoxseg6ei32_v_f16mf4_m(__VA_ARGS__)
10023
#define vsoxseg7ei32_v_f16mf4_m(...) __riscv_vsoxseg7ei32_v_f16mf4_m(__VA_ARGS__)
10024
#define vsoxseg8ei32_v_f16mf4_m(...) __riscv_vsoxseg8ei32_v_f16mf4_m(__VA_ARGS__)
10025
#define vsoxseg2ei32_v_f16mf2_m(...) __riscv_vsoxseg2ei32_v_f16mf2_m(__VA_ARGS__)
10026
#define vsoxseg3ei32_v_f16mf2_m(...) __riscv_vsoxseg3ei32_v_f16mf2_m(__VA_ARGS__)
10027
#define vsoxseg4ei32_v_f16mf2_m(...) __riscv_vsoxseg4ei32_v_f16mf2_m(__VA_ARGS__)
10028
#define vsoxseg5ei32_v_f16mf2_m(...) __riscv_vsoxseg5ei32_v_f16mf2_m(__VA_ARGS__)
10029
#define vsoxseg6ei32_v_f16mf2_m(...) __riscv_vsoxseg6ei32_v_f16mf2_m(__VA_ARGS__)
10030
#define vsoxseg7ei32_v_f16mf2_m(...) __riscv_vsoxseg7ei32_v_f16mf2_m(__VA_ARGS__)
10031
#define vsoxseg8ei32_v_f16mf2_m(...) __riscv_vsoxseg8ei32_v_f16mf2_m(__VA_ARGS__)
10032
#define vsoxseg2ei32_v_f16m1_m(...) __riscv_vsoxseg2ei32_v_f16m1_m(__VA_ARGS__)
10033
#define vsoxseg3ei32_v_f16m1_m(...) __riscv_vsoxseg3ei32_v_f16m1_m(__VA_ARGS__)
10034
#define vsoxseg4ei32_v_f16m1_m(...) __riscv_vsoxseg4ei32_v_f16m1_m(__VA_ARGS__)
10035
#define vsoxseg5ei32_v_f16m1_m(...) __riscv_vsoxseg5ei32_v_f16m1_m(__VA_ARGS__)
10036
#define vsoxseg6ei32_v_f16m1_m(...) __riscv_vsoxseg6ei32_v_f16m1_m(__VA_ARGS__)
10037
#define vsoxseg7ei32_v_f16m1_m(...) __riscv_vsoxseg7ei32_v_f16m1_m(__VA_ARGS__)
10038
#define vsoxseg8ei32_v_f16m1_m(...) __riscv_vsoxseg8ei32_v_f16m1_m(__VA_ARGS__)
10039
#define vsoxseg2ei32_v_f16m2_m(...) __riscv_vsoxseg2ei32_v_f16m2_m(__VA_ARGS__)
10040
#define vsoxseg3ei32_v_f16m2_m(...) __riscv_vsoxseg3ei32_v_f16m2_m(__VA_ARGS__)
10041
#define vsoxseg4ei32_v_f16m2_m(...) __riscv_vsoxseg4ei32_v_f16m2_m(__VA_ARGS__)
10042
#define vsoxseg2ei32_v_f16m4_m(...) __riscv_vsoxseg2ei32_v_f16m4_m(__VA_ARGS__)
10043
#define vsoxseg2ei64_v_f16mf4_m(...) __riscv_vsoxseg2ei64_v_f16mf4_m(__VA_ARGS__)
10044
#define vsoxseg3ei64_v_f16mf4_m(...) __riscv_vsoxseg3ei64_v_f16mf4_m(__VA_ARGS__)
10045
#define vsoxseg4ei64_v_f16mf4_m(...) __riscv_vsoxseg4ei64_v_f16mf4_m(__VA_ARGS__)
10046
#define vsoxseg5ei64_v_f16mf4_m(...) __riscv_vsoxseg5ei64_v_f16mf4_m(__VA_ARGS__)
10047
#define vsoxseg6ei64_v_f16mf4_m(...) __riscv_vsoxseg6ei64_v_f16mf4_m(__VA_ARGS__)
10048
#define vsoxseg7ei64_v_f16mf4_m(...) __riscv_vsoxseg7ei64_v_f16mf4_m(__VA_ARGS__)
10049
#define vsoxseg8ei64_v_f16mf4_m(...) __riscv_vsoxseg8ei64_v_f16mf4_m(__VA_ARGS__)
10050
#define vsoxseg2ei64_v_f16mf2_m(...) __riscv_vsoxseg2ei64_v_f16mf2_m(__VA_ARGS__)
10051
#define vsoxseg3ei64_v_f16mf2_m(...) __riscv_vsoxseg3ei64_v_f16mf2_m(__VA_ARGS__)
10052
#define vsoxseg4ei64_v_f16mf2_m(...) __riscv_vsoxseg4ei64_v_f16mf2_m(__VA_ARGS__)
10053
#define vsoxseg5ei64_v_f16mf2_m(...) __riscv_vsoxseg5ei64_v_f16mf2_m(__VA_ARGS__)
10054
#define vsoxseg6ei64_v_f16mf2_m(...) __riscv_vsoxseg6ei64_v_f16mf2_m(__VA_ARGS__)
10055
#define vsoxseg7ei64_v_f16mf2_m(...) __riscv_vsoxseg7ei64_v_f16mf2_m(__VA_ARGS__)
10056
#define vsoxseg8ei64_v_f16mf2_m(...) __riscv_vsoxseg8ei64_v_f16mf2_m(__VA_ARGS__)
10057
#define vsoxseg2ei64_v_f16m1_m(...) __riscv_vsoxseg2ei64_v_f16m1_m(__VA_ARGS__)
10058
#define vsoxseg3ei64_v_f16m1_m(...) __riscv_vsoxseg3ei64_v_f16m1_m(__VA_ARGS__)
10059
#define vsoxseg4ei64_v_f16m1_m(...) __riscv_vsoxseg4ei64_v_f16m1_m(__VA_ARGS__)
10060
#define vsoxseg5ei64_v_f16m1_m(...) __riscv_vsoxseg5ei64_v_f16m1_m(__VA_ARGS__)
10061
#define vsoxseg6ei64_v_f16m1_m(...) __riscv_vsoxseg6ei64_v_f16m1_m(__VA_ARGS__)
10062
#define vsoxseg7ei64_v_f16m1_m(...) __riscv_vsoxseg7ei64_v_f16m1_m(__VA_ARGS__)
10063
#define vsoxseg8ei64_v_f16m1_m(...) __riscv_vsoxseg8ei64_v_f16m1_m(__VA_ARGS__)
10064
#define vsoxseg2ei64_v_f16m2_m(...) __riscv_vsoxseg2ei64_v_f16m2_m(__VA_ARGS__)
10065
#define vsoxseg3ei64_v_f16m2_m(...) __riscv_vsoxseg3ei64_v_f16m2_m(__VA_ARGS__)
10066
#define vsoxseg4ei64_v_f16m2_m(...) __riscv_vsoxseg4ei64_v_f16m2_m(__VA_ARGS__)
10067
#define vsoxseg2ei8_v_f32mf2_m(...) __riscv_vsoxseg2ei8_v_f32mf2_m(__VA_ARGS__)
10068
#define vsoxseg3ei8_v_f32mf2_m(...) __riscv_vsoxseg3ei8_v_f32mf2_m(__VA_ARGS__)
10069
#define vsoxseg4ei8_v_f32mf2_m(...) __riscv_vsoxseg4ei8_v_f32mf2_m(__VA_ARGS__)
10070
#define vsoxseg5ei8_v_f32mf2_m(...) __riscv_vsoxseg5ei8_v_f32mf2_m(__VA_ARGS__)
10071
#define vsoxseg6ei8_v_f32mf2_m(...) __riscv_vsoxseg6ei8_v_f32mf2_m(__VA_ARGS__)
10072
#define vsoxseg7ei8_v_f32mf2_m(...) __riscv_vsoxseg7ei8_v_f32mf2_m(__VA_ARGS__)
10073
#define vsoxseg8ei8_v_f32mf2_m(...) __riscv_vsoxseg8ei8_v_f32mf2_m(__VA_ARGS__)
10074
#define vsoxseg2ei8_v_f32m1_m(...) __riscv_vsoxseg2ei8_v_f32m1_m(__VA_ARGS__)
10075
#define vsoxseg3ei8_v_f32m1_m(...) __riscv_vsoxseg3ei8_v_f32m1_m(__VA_ARGS__)
10076
#define vsoxseg4ei8_v_f32m1_m(...) __riscv_vsoxseg4ei8_v_f32m1_m(__VA_ARGS__)
10077
#define vsoxseg5ei8_v_f32m1_m(...) __riscv_vsoxseg5ei8_v_f32m1_m(__VA_ARGS__)
10078
#define vsoxseg6ei8_v_f32m1_m(...) __riscv_vsoxseg6ei8_v_f32m1_m(__VA_ARGS__)
10079
#define vsoxseg7ei8_v_f32m1_m(...) __riscv_vsoxseg7ei8_v_f32m1_m(__VA_ARGS__)
10080
#define vsoxseg8ei8_v_f32m1_m(...) __riscv_vsoxseg8ei8_v_f32m1_m(__VA_ARGS__)
10081
#define vsoxseg2ei8_v_f32m2_m(...) __riscv_vsoxseg2ei8_v_f32m2_m(__VA_ARGS__)
10082
#define vsoxseg3ei8_v_f32m2_m(...) __riscv_vsoxseg3ei8_v_f32m2_m(__VA_ARGS__)
10083
#define vsoxseg4ei8_v_f32m2_m(...) __riscv_vsoxseg4ei8_v_f32m2_m(__VA_ARGS__)
10084
#define vsoxseg2ei8_v_f32m4_m(...) __riscv_vsoxseg2ei8_v_f32m4_m(__VA_ARGS__)
10085
#define vsoxseg2ei16_v_f32mf2_m(...) __riscv_vsoxseg2ei16_v_f32mf2_m(__VA_ARGS__)
10086
#define vsoxseg3ei16_v_f32mf2_m(...) __riscv_vsoxseg3ei16_v_f32mf2_m(__VA_ARGS__)
10087
#define vsoxseg4ei16_v_f32mf2_m(...) __riscv_vsoxseg4ei16_v_f32mf2_m(__VA_ARGS__)
10088
#define vsoxseg5ei16_v_f32mf2_m(...) __riscv_vsoxseg5ei16_v_f32mf2_m(__VA_ARGS__)
10089
#define vsoxseg6ei16_v_f32mf2_m(...) __riscv_vsoxseg6ei16_v_f32mf2_m(__VA_ARGS__)
10090
#define vsoxseg7ei16_v_f32mf2_m(...) __riscv_vsoxseg7ei16_v_f32mf2_m(__VA_ARGS__)
10091
#define vsoxseg8ei16_v_f32mf2_m(...) __riscv_vsoxseg8ei16_v_f32mf2_m(__VA_ARGS__)
10092
#define vsoxseg2ei16_v_f32m1_m(...) __riscv_vsoxseg2ei16_v_f32m1_m(__VA_ARGS__)
10093
#define vsoxseg3ei16_v_f32m1_m(...) __riscv_vsoxseg3ei16_v_f32m1_m(__VA_ARGS__)
10094
#define vsoxseg4ei16_v_f32m1_m(...) __riscv_vsoxseg4ei16_v_f32m1_m(__VA_ARGS__)
10095
#define vsoxseg5ei16_v_f32m1_m(...) __riscv_vsoxseg5ei16_v_f32m1_m(__VA_ARGS__)
10096
#define vsoxseg6ei16_v_f32m1_m(...) __riscv_vsoxseg6ei16_v_f32m1_m(__VA_ARGS__)
10097
#define vsoxseg7ei16_v_f32m1_m(...) __riscv_vsoxseg7ei16_v_f32m1_m(__VA_ARGS__)
10098
#define vsoxseg8ei16_v_f32m1_m(...) __riscv_vsoxseg8ei16_v_f32m1_m(__VA_ARGS__)
10099
#define vsoxseg2ei16_v_f32m2_m(...) __riscv_vsoxseg2ei16_v_f32m2_m(__VA_ARGS__)
10100
#define vsoxseg3ei16_v_f32m2_m(...) __riscv_vsoxseg3ei16_v_f32m2_m(__VA_ARGS__)
10101
#define vsoxseg4ei16_v_f32m2_m(...) __riscv_vsoxseg4ei16_v_f32m2_m(__VA_ARGS__)
10102
#define vsoxseg2ei16_v_f32m4_m(...) __riscv_vsoxseg2ei16_v_f32m4_m(__VA_ARGS__)
10103
#define vsoxseg2ei32_v_f32mf2_m(...) __riscv_vsoxseg2ei32_v_f32mf2_m(__VA_ARGS__)
10104
#define vsoxseg3ei32_v_f32mf2_m(...) __riscv_vsoxseg3ei32_v_f32mf2_m(__VA_ARGS__)
10105
#define vsoxseg4ei32_v_f32mf2_m(...) __riscv_vsoxseg4ei32_v_f32mf2_m(__VA_ARGS__)
10106
#define vsoxseg5ei32_v_f32mf2_m(...) __riscv_vsoxseg5ei32_v_f32mf2_m(__VA_ARGS__)
10107
#define vsoxseg6ei32_v_f32mf2_m(...) __riscv_vsoxseg6ei32_v_f32mf2_m(__VA_ARGS__)
10108
#define vsoxseg7ei32_v_f32mf2_m(...) __riscv_vsoxseg7ei32_v_f32mf2_m(__VA_ARGS__)
10109
#define vsoxseg8ei32_v_f32mf2_m(...) __riscv_vsoxseg8ei32_v_f32mf2_m(__VA_ARGS__)
10110
#define vsoxseg2ei32_v_f32m1_m(...) __riscv_vsoxseg2ei32_v_f32m1_m(__VA_ARGS__)
10111
#define vsoxseg3ei32_v_f32m1_m(...) __riscv_vsoxseg3ei32_v_f32m1_m(__VA_ARGS__)
10112
#define vsoxseg4ei32_v_f32m1_m(...) __riscv_vsoxseg4ei32_v_f32m1_m(__VA_ARGS__)
10113
#define vsoxseg5ei32_v_f32m1_m(...) __riscv_vsoxseg5ei32_v_f32m1_m(__VA_ARGS__)
10114
#define vsoxseg6ei32_v_f32m1_m(...) __riscv_vsoxseg6ei32_v_f32m1_m(__VA_ARGS__)
10115
#define vsoxseg7ei32_v_f32m1_m(...) __riscv_vsoxseg7ei32_v_f32m1_m(__VA_ARGS__)
10116
#define vsoxseg8ei32_v_f32m1_m(...) __riscv_vsoxseg8ei32_v_f32m1_m(__VA_ARGS__)
10117
#define vsoxseg2ei32_v_f32m2_m(...) __riscv_vsoxseg2ei32_v_f32m2_m(__VA_ARGS__)
10118
#define vsoxseg3ei32_v_f32m2_m(...) __riscv_vsoxseg3ei32_v_f32m2_m(__VA_ARGS__)
10119
#define vsoxseg4ei32_v_f32m2_m(...) __riscv_vsoxseg4ei32_v_f32m2_m(__VA_ARGS__)
10120
#define vsoxseg2ei32_v_f32m4_m(...) __riscv_vsoxseg2ei32_v_f32m4_m(__VA_ARGS__)
10121
#define vsoxseg2ei64_v_f32mf2_m(...) __riscv_vsoxseg2ei64_v_f32mf2_m(__VA_ARGS__)
10122
#define vsoxseg3ei64_v_f32mf2_m(...) __riscv_vsoxseg3ei64_v_f32mf2_m(__VA_ARGS__)
10123
#define vsoxseg4ei64_v_f32mf2_m(...) __riscv_vsoxseg4ei64_v_f32mf2_m(__VA_ARGS__)
10124
#define vsoxseg5ei64_v_f32mf2_m(...) __riscv_vsoxseg5ei64_v_f32mf2_m(__VA_ARGS__)
10125
#define vsoxseg6ei64_v_f32mf2_m(...) __riscv_vsoxseg6ei64_v_f32mf2_m(__VA_ARGS__)
10126
#define vsoxseg7ei64_v_f32mf2_m(...) __riscv_vsoxseg7ei64_v_f32mf2_m(__VA_ARGS__)
10127
#define vsoxseg8ei64_v_f32mf2_m(...) __riscv_vsoxseg8ei64_v_f32mf2_m(__VA_ARGS__)
10128
#define vsoxseg2ei64_v_f32m1_m(...) __riscv_vsoxseg2ei64_v_f32m1_m(__VA_ARGS__)
10129
#define vsoxseg3ei64_v_f32m1_m(...) __riscv_vsoxseg3ei64_v_f32m1_m(__VA_ARGS__)
10130
#define vsoxseg4ei64_v_f32m1_m(...) __riscv_vsoxseg4ei64_v_f32m1_m(__VA_ARGS__)
10131
#define vsoxseg5ei64_v_f32m1_m(...) __riscv_vsoxseg5ei64_v_f32m1_m(__VA_ARGS__)
10132
#define vsoxseg6ei64_v_f32m1_m(...) __riscv_vsoxseg6ei64_v_f32m1_m(__VA_ARGS__)
10133
#define vsoxseg7ei64_v_f32m1_m(...) __riscv_vsoxseg7ei64_v_f32m1_m(__VA_ARGS__)
10134
#define vsoxseg8ei64_v_f32m1_m(...) __riscv_vsoxseg8ei64_v_f32m1_m(__VA_ARGS__)
10135
#define vsoxseg2ei64_v_f32m2_m(...) __riscv_vsoxseg2ei64_v_f32m2_m(__VA_ARGS__)
10136
#define vsoxseg3ei64_v_f32m2_m(...) __riscv_vsoxseg3ei64_v_f32m2_m(__VA_ARGS__)
10137
#define vsoxseg4ei64_v_f32m2_m(...) __riscv_vsoxseg4ei64_v_f32m2_m(__VA_ARGS__)
10138
#define vsoxseg2ei64_v_f32m4_m(...) __riscv_vsoxseg2ei64_v_f32m4_m(__VA_ARGS__)
10139
#define vsoxseg2ei8_v_f64m1_m(...) __riscv_vsoxseg2ei8_v_f64m1_m(__VA_ARGS__)
10140
#define vsoxseg3ei8_v_f64m1_m(...) __riscv_vsoxseg3ei8_v_f64m1_m(__VA_ARGS__)
10141
#define vsoxseg4ei8_v_f64m1_m(...) __riscv_vsoxseg4ei8_v_f64m1_m(__VA_ARGS__)
10142
#define vsoxseg5ei8_v_f64m1_m(...) __riscv_vsoxseg5ei8_v_f64m1_m(__VA_ARGS__)
10143
#define vsoxseg6ei8_v_f64m1_m(...) __riscv_vsoxseg6ei8_v_f64m1_m(__VA_ARGS__)
10144
#define vsoxseg7ei8_v_f64m1_m(...) __riscv_vsoxseg7ei8_v_f64m1_m(__VA_ARGS__)
10145
#define vsoxseg8ei8_v_f64m1_m(...) __riscv_vsoxseg8ei8_v_f64m1_m(__VA_ARGS__)
10146
#define vsoxseg2ei8_v_f64m2_m(...) __riscv_vsoxseg2ei8_v_f64m2_m(__VA_ARGS__)
10147
#define vsoxseg3ei8_v_f64m2_m(...) __riscv_vsoxseg3ei8_v_f64m2_m(__VA_ARGS__)
10148
#define vsoxseg4ei8_v_f64m2_m(...) __riscv_vsoxseg4ei8_v_f64m2_m(__VA_ARGS__)
10149
#define vsoxseg2ei8_v_f64m4_m(...) __riscv_vsoxseg2ei8_v_f64m4_m(__VA_ARGS__)
10150
#define vsoxseg2ei16_v_f64m1_m(...) __riscv_vsoxseg2ei16_v_f64m1_m(__VA_ARGS__)
10151
#define vsoxseg3ei16_v_f64m1_m(...) __riscv_vsoxseg3ei16_v_f64m1_m(__VA_ARGS__)
10152
#define vsoxseg4ei16_v_f64m1_m(...) __riscv_vsoxseg4ei16_v_f64m1_m(__VA_ARGS__)
10153
#define vsoxseg5ei16_v_f64m1_m(...) __riscv_vsoxseg5ei16_v_f64m1_m(__VA_ARGS__)
10154
#define vsoxseg6ei16_v_f64m1_m(...) __riscv_vsoxseg6ei16_v_f64m1_m(__VA_ARGS__)
10155
#define vsoxseg7ei16_v_f64m1_m(...) __riscv_vsoxseg7ei16_v_f64m1_m(__VA_ARGS__)
10156
#define vsoxseg8ei16_v_f64m1_m(...) __riscv_vsoxseg8ei16_v_f64m1_m(__VA_ARGS__)
10157
#define vsoxseg2ei16_v_f64m2_m(...) __riscv_vsoxseg2ei16_v_f64m2_m(__VA_ARGS__)
10158
#define vsoxseg3ei16_v_f64m2_m(...) __riscv_vsoxseg3ei16_v_f64m2_m(__VA_ARGS__)
10159
#define vsoxseg4ei16_v_f64m2_m(...) __riscv_vsoxseg4ei16_v_f64m2_m(__VA_ARGS__)
10160
#define vsoxseg2ei16_v_f64m4_m(...) __riscv_vsoxseg2ei16_v_f64m4_m(__VA_ARGS__)
10161
#define vsoxseg2ei32_v_f64m1_m(...) __riscv_vsoxseg2ei32_v_f64m1_m(__VA_ARGS__)
10162
#define vsoxseg3ei32_v_f64m1_m(...) __riscv_vsoxseg3ei32_v_f64m1_m(__VA_ARGS__)
10163
#define vsoxseg4ei32_v_f64m1_m(...) __riscv_vsoxseg4ei32_v_f64m1_m(__VA_ARGS__)
10164
#define vsoxseg5ei32_v_f64m1_m(...) __riscv_vsoxseg5ei32_v_f64m1_m(__VA_ARGS__)
10165
#define vsoxseg6ei32_v_f64m1_m(...) __riscv_vsoxseg6ei32_v_f64m1_m(__VA_ARGS__)
10166
#define vsoxseg7ei32_v_f64m1_m(...) __riscv_vsoxseg7ei32_v_f64m1_m(__VA_ARGS__)
10167
#define vsoxseg8ei32_v_f64m1_m(...) __riscv_vsoxseg8ei32_v_f64m1_m(__VA_ARGS__)
10168
#define vsoxseg2ei32_v_f64m2_m(...) __riscv_vsoxseg2ei32_v_f64m2_m(__VA_ARGS__)
10169
#define vsoxseg3ei32_v_f64m2_m(...) __riscv_vsoxseg3ei32_v_f64m2_m(__VA_ARGS__)
10170
#define vsoxseg4ei32_v_f64m2_m(...) __riscv_vsoxseg4ei32_v_f64m2_m(__VA_ARGS__)
10171
#define vsoxseg2ei32_v_f64m4_m(...) __riscv_vsoxseg2ei32_v_f64m4_m(__VA_ARGS__)
10172
#define vsoxseg2ei64_v_f64m1_m(...) __riscv_vsoxseg2ei64_v_f64m1_m(__VA_ARGS__)
10173
#define vsoxseg3ei64_v_f64m1_m(...) __riscv_vsoxseg3ei64_v_f64m1_m(__VA_ARGS__)
10174
#define vsoxseg4ei64_v_f64m1_m(...) __riscv_vsoxseg4ei64_v_f64m1_m(__VA_ARGS__)
10175
#define vsoxseg5ei64_v_f64m1_m(...) __riscv_vsoxseg5ei64_v_f64m1_m(__VA_ARGS__)
10176
#define vsoxseg6ei64_v_f64m1_m(...) __riscv_vsoxseg6ei64_v_f64m1_m(__VA_ARGS__)
10177
#define vsoxseg7ei64_v_f64m1_m(...) __riscv_vsoxseg7ei64_v_f64m1_m(__VA_ARGS__)
10178
#define vsoxseg8ei64_v_f64m1_m(...) __riscv_vsoxseg8ei64_v_f64m1_m(__VA_ARGS__)
10179
#define vsoxseg2ei64_v_f64m2_m(...) __riscv_vsoxseg2ei64_v_f64m2_m(__VA_ARGS__)
10180
#define vsoxseg3ei64_v_f64m2_m(...) __riscv_vsoxseg3ei64_v_f64m2_m(__VA_ARGS__)
10181
#define vsoxseg4ei64_v_f64m2_m(...) __riscv_vsoxseg4ei64_v_f64m2_m(__VA_ARGS__)
10182
#define vsoxseg2ei64_v_f64m4_m(...) __riscv_vsoxseg2ei64_v_f64m4_m(__VA_ARGS__)
10183
#define vsuxseg2ei8_v_f16mf4_m(...) __riscv_vsuxseg2ei8_v_f16mf4_m(__VA_ARGS__)
10184
#define vsuxseg3ei8_v_f16mf4_m(...) __riscv_vsuxseg3ei8_v_f16mf4_m(__VA_ARGS__)
10185
#define vsuxseg4ei8_v_f16mf4_m(...) __riscv_vsuxseg4ei8_v_f16mf4_m(__VA_ARGS__)
10186
#define vsuxseg5ei8_v_f16mf4_m(...) __riscv_vsuxseg5ei8_v_f16mf4_m(__VA_ARGS__)
10187
#define vsuxseg6ei8_v_f16mf4_m(...) __riscv_vsuxseg6ei8_v_f16mf4_m(__VA_ARGS__)
10188
#define vsuxseg7ei8_v_f16mf4_m(...) __riscv_vsuxseg7ei8_v_f16mf4_m(__VA_ARGS__)
10189
#define vsuxseg8ei8_v_f16mf4_m(...) __riscv_vsuxseg8ei8_v_f16mf4_m(__VA_ARGS__)
10190
#define vsuxseg2ei8_v_f16mf2_m(...) __riscv_vsuxseg2ei8_v_f16mf2_m(__VA_ARGS__)
10191
#define vsuxseg3ei8_v_f16mf2_m(...) __riscv_vsuxseg3ei8_v_f16mf2_m(__VA_ARGS__)
10192
#define vsuxseg4ei8_v_f16mf2_m(...) __riscv_vsuxseg4ei8_v_f16mf2_m(__VA_ARGS__)
10193
#define vsuxseg5ei8_v_f16mf2_m(...) __riscv_vsuxseg5ei8_v_f16mf2_m(__VA_ARGS__)
10194
#define vsuxseg6ei8_v_f16mf2_m(...) __riscv_vsuxseg6ei8_v_f16mf2_m(__VA_ARGS__)
10195
#define vsuxseg7ei8_v_f16mf2_m(...) __riscv_vsuxseg7ei8_v_f16mf2_m(__VA_ARGS__)
10196
#define vsuxseg8ei8_v_f16mf2_m(...) __riscv_vsuxseg8ei8_v_f16mf2_m(__VA_ARGS__)
10197
#define vsuxseg2ei8_v_f16m1_m(...) __riscv_vsuxseg2ei8_v_f16m1_m(__VA_ARGS__)
10198
#define vsuxseg3ei8_v_f16m1_m(...) __riscv_vsuxseg3ei8_v_f16m1_m(__VA_ARGS__)
10199
#define vsuxseg4ei8_v_f16m1_m(...) __riscv_vsuxseg4ei8_v_f16m1_m(__VA_ARGS__)
10200
#define vsuxseg5ei8_v_f16m1_m(...) __riscv_vsuxseg5ei8_v_f16m1_m(__VA_ARGS__)
10201
#define vsuxseg6ei8_v_f16m1_m(...) __riscv_vsuxseg6ei8_v_f16m1_m(__VA_ARGS__)
10202
#define vsuxseg7ei8_v_f16m1_m(...) __riscv_vsuxseg7ei8_v_f16m1_m(__VA_ARGS__)
10203
#define vsuxseg8ei8_v_f16m1_m(...) __riscv_vsuxseg8ei8_v_f16m1_m(__VA_ARGS__)
10204
#define vsuxseg2ei8_v_f16m2_m(...) __riscv_vsuxseg2ei8_v_f16m2_m(__VA_ARGS__)
10205
#define vsuxseg3ei8_v_f16m2_m(...) __riscv_vsuxseg3ei8_v_f16m2_m(__VA_ARGS__)
10206
#define vsuxseg4ei8_v_f16m2_m(...) __riscv_vsuxseg4ei8_v_f16m2_m(__VA_ARGS__)
10207
#define vsuxseg2ei8_v_f16m4_m(...) __riscv_vsuxseg2ei8_v_f16m4_m(__VA_ARGS__)
10208
#define vsuxseg2ei16_v_f16mf4_m(...) __riscv_vsuxseg2ei16_v_f16mf4_m(__VA_ARGS__)
10209
#define vsuxseg3ei16_v_f16mf4_m(...) __riscv_vsuxseg3ei16_v_f16mf4_m(__VA_ARGS__)
10210
#define vsuxseg4ei16_v_f16mf4_m(...) __riscv_vsuxseg4ei16_v_f16mf4_m(__VA_ARGS__)
10211
#define vsuxseg5ei16_v_f16mf4_m(...) __riscv_vsuxseg5ei16_v_f16mf4_m(__VA_ARGS__)
10212
#define vsuxseg6ei16_v_f16mf4_m(...) __riscv_vsuxseg6ei16_v_f16mf4_m(__VA_ARGS__)
10213
#define vsuxseg7ei16_v_f16mf4_m(...) __riscv_vsuxseg7ei16_v_f16mf4_m(__VA_ARGS__)
10214
#define vsuxseg8ei16_v_f16mf4_m(...) __riscv_vsuxseg8ei16_v_f16mf4_m(__VA_ARGS__)
10215
#define vsuxseg2ei16_v_f16mf2_m(...) __riscv_vsuxseg2ei16_v_f16mf2_m(__VA_ARGS__)
10216
#define vsuxseg3ei16_v_f16mf2_m(...) __riscv_vsuxseg3ei16_v_f16mf2_m(__VA_ARGS__)
10217
#define vsuxseg4ei16_v_f16mf2_m(...) __riscv_vsuxseg4ei16_v_f16mf2_m(__VA_ARGS__)
10218
#define vsuxseg5ei16_v_f16mf2_m(...) __riscv_vsuxseg5ei16_v_f16mf2_m(__VA_ARGS__)
10219
#define vsuxseg6ei16_v_f16mf2_m(...) __riscv_vsuxseg6ei16_v_f16mf2_m(__VA_ARGS__)
10220
#define vsuxseg7ei16_v_f16mf2_m(...) __riscv_vsuxseg7ei16_v_f16mf2_m(__VA_ARGS__)
10221
#define vsuxseg8ei16_v_f16mf2_m(...) __riscv_vsuxseg8ei16_v_f16mf2_m(__VA_ARGS__)
10222
#define vsuxseg2ei16_v_f16m1_m(...) __riscv_vsuxseg2ei16_v_f16m1_m(__VA_ARGS__)
10223
#define vsuxseg3ei16_v_f16m1_m(...) __riscv_vsuxseg3ei16_v_f16m1_m(__VA_ARGS__)
10224
#define vsuxseg4ei16_v_f16m1_m(...) __riscv_vsuxseg4ei16_v_f16m1_m(__VA_ARGS__)
10225
#define vsuxseg5ei16_v_f16m1_m(...) __riscv_vsuxseg5ei16_v_f16m1_m(__VA_ARGS__)
10226
#define vsuxseg6ei16_v_f16m1_m(...) __riscv_vsuxseg6ei16_v_f16m1_m(__VA_ARGS__)
10227
#define vsuxseg7ei16_v_f16m1_m(...) __riscv_vsuxseg7ei16_v_f16m1_m(__VA_ARGS__)
10228
#define vsuxseg8ei16_v_f16m1_m(...) __riscv_vsuxseg8ei16_v_f16m1_m(__VA_ARGS__)
10229
#define vsuxseg2ei16_v_f16m2_m(...) __riscv_vsuxseg2ei16_v_f16m2_m(__VA_ARGS__)
10230
#define vsuxseg3ei16_v_f16m2_m(...) __riscv_vsuxseg3ei16_v_f16m2_m(__VA_ARGS__)
10231
#define vsuxseg4ei16_v_f16m2_m(...) __riscv_vsuxseg4ei16_v_f16m2_m(__VA_ARGS__)
10232
#define vsuxseg2ei16_v_f16m4_m(...) __riscv_vsuxseg2ei16_v_f16m4_m(__VA_ARGS__)
10233
#define vsuxseg2ei32_v_f16mf4_m(...) __riscv_vsuxseg2ei32_v_f16mf4_m(__VA_ARGS__)
10234
#define vsuxseg3ei32_v_f16mf4_m(...) __riscv_vsuxseg3ei32_v_f16mf4_m(__VA_ARGS__)
10235
#define vsuxseg4ei32_v_f16mf4_m(...) __riscv_vsuxseg4ei32_v_f16mf4_m(__VA_ARGS__)
10236
#define vsuxseg5ei32_v_f16mf4_m(...) __riscv_vsuxseg5ei32_v_f16mf4_m(__VA_ARGS__)
10237
#define vsuxseg6ei32_v_f16mf4_m(...) __riscv_vsuxseg6ei32_v_f16mf4_m(__VA_ARGS__)
10238
#define vsuxseg7ei32_v_f16mf4_m(...) __riscv_vsuxseg7ei32_v_f16mf4_m(__VA_ARGS__)
10239
#define vsuxseg8ei32_v_f16mf4_m(...) __riscv_vsuxseg8ei32_v_f16mf4_m(__VA_ARGS__)
10240
#define vsuxseg2ei32_v_f16mf2_m(...) __riscv_vsuxseg2ei32_v_f16mf2_m(__VA_ARGS__)
10241
#define vsuxseg3ei32_v_f16mf2_m(...) __riscv_vsuxseg3ei32_v_f16mf2_m(__VA_ARGS__)
10242
#define vsuxseg4ei32_v_f16mf2_m(...) __riscv_vsuxseg4ei32_v_f16mf2_m(__VA_ARGS__)
10243
#define vsuxseg5ei32_v_f16mf2_m(...) __riscv_vsuxseg5ei32_v_f16mf2_m(__VA_ARGS__)
10244
#define vsuxseg6ei32_v_f16mf2_m(...) __riscv_vsuxseg6ei32_v_f16mf2_m(__VA_ARGS__)
10245
#define vsuxseg7ei32_v_f16mf2_m(...) __riscv_vsuxseg7ei32_v_f16mf2_m(__VA_ARGS__)
10246
#define vsuxseg8ei32_v_f16mf2_m(...) __riscv_vsuxseg8ei32_v_f16mf2_m(__VA_ARGS__)
10247
#define vsuxseg2ei32_v_f16m1_m(...) __riscv_vsuxseg2ei32_v_f16m1_m(__VA_ARGS__)
10248
#define vsuxseg3ei32_v_f16m1_m(...) __riscv_vsuxseg3ei32_v_f16m1_m(__VA_ARGS__)
10249
#define vsuxseg4ei32_v_f16m1_m(...) __riscv_vsuxseg4ei32_v_f16m1_m(__VA_ARGS__)
10250
#define vsuxseg5ei32_v_f16m1_m(...) __riscv_vsuxseg5ei32_v_f16m1_m(__VA_ARGS__)
10251
#define vsuxseg6ei32_v_f16m1_m(...) __riscv_vsuxseg6ei32_v_f16m1_m(__VA_ARGS__)
10252
#define vsuxseg7ei32_v_f16m1_m(...) __riscv_vsuxseg7ei32_v_f16m1_m(__VA_ARGS__)
10253
#define vsuxseg8ei32_v_f16m1_m(...) __riscv_vsuxseg8ei32_v_f16m1_m(__VA_ARGS__)
10254
#define vsuxseg2ei32_v_f16m2_m(...) __riscv_vsuxseg2ei32_v_f16m2_m(__VA_ARGS__)
10255
#define vsuxseg3ei32_v_f16m2_m(...) __riscv_vsuxseg3ei32_v_f16m2_m(__VA_ARGS__)
10256
#define vsuxseg4ei32_v_f16m2_m(...) __riscv_vsuxseg4ei32_v_f16m2_m(__VA_ARGS__)
10257
#define vsuxseg2ei32_v_f16m4_m(...) __riscv_vsuxseg2ei32_v_f16m4_m(__VA_ARGS__)
10258
#define vsuxseg2ei64_v_f16mf4_m(...) __riscv_vsuxseg2ei64_v_f16mf4_m(__VA_ARGS__)
10259
#define vsuxseg3ei64_v_f16mf4_m(...) __riscv_vsuxseg3ei64_v_f16mf4_m(__VA_ARGS__)
10260
#define vsuxseg4ei64_v_f16mf4_m(...) __riscv_vsuxseg4ei64_v_f16mf4_m(__VA_ARGS__)
10261
#define vsuxseg5ei64_v_f16mf4_m(...) __riscv_vsuxseg5ei64_v_f16mf4_m(__VA_ARGS__)
10262
#define vsuxseg6ei64_v_f16mf4_m(...) __riscv_vsuxseg6ei64_v_f16mf4_m(__VA_ARGS__)
10263
#define vsuxseg7ei64_v_f16mf4_m(...) __riscv_vsuxseg7ei64_v_f16mf4_m(__VA_ARGS__)
10264
#define vsuxseg8ei64_v_f16mf4_m(...) __riscv_vsuxseg8ei64_v_f16mf4_m(__VA_ARGS__)
10265
#define vsuxseg2ei64_v_f16mf2_m(...) __riscv_vsuxseg2ei64_v_f16mf2_m(__VA_ARGS__)
10266
#define vsuxseg3ei64_v_f16mf2_m(...) __riscv_vsuxseg3ei64_v_f16mf2_m(__VA_ARGS__)
10267
#define vsuxseg4ei64_v_f16mf2_m(...) __riscv_vsuxseg4ei64_v_f16mf2_m(__VA_ARGS__)
10268
#define vsuxseg5ei64_v_f16mf2_m(...) __riscv_vsuxseg5ei64_v_f16mf2_m(__VA_ARGS__)
10269
#define vsuxseg6ei64_v_f16mf2_m(...) __riscv_vsuxseg6ei64_v_f16mf2_m(__VA_ARGS__)
10270
#define vsuxseg7ei64_v_f16mf2_m(...) __riscv_vsuxseg7ei64_v_f16mf2_m(__VA_ARGS__)
10271
#define vsuxseg8ei64_v_f16mf2_m(...) __riscv_vsuxseg8ei64_v_f16mf2_m(__VA_ARGS__)
10272
#define vsuxseg2ei64_v_f16m1_m(...) __riscv_vsuxseg2ei64_v_f16m1_m(__VA_ARGS__)
10273
#define vsuxseg3ei64_v_f16m1_m(...) __riscv_vsuxseg3ei64_v_f16m1_m(__VA_ARGS__)
10274
#define vsuxseg4ei64_v_f16m1_m(...) __riscv_vsuxseg4ei64_v_f16m1_m(__VA_ARGS__)
10275
#define vsuxseg5ei64_v_f16m1_m(...) __riscv_vsuxseg5ei64_v_f16m1_m(__VA_ARGS__)
10276
#define vsuxseg6ei64_v_f16m1_m(...) __riscv_vsuxseg6ei64_v_f16m1_m(__VA_ARGS__)
10277
#define vsuxseg7ei64_v_f16m1_m(...) __riscv_vsuxseg7ei64_v_f16m1_m(__VA_ARGS__)
10278
#define vsuxseg8ei64_v_f16m1_m(...) __riscv_vsuxseg8ei64_v_f16m1_m(__VA_ARGS__)
10279
#define vsuxseg2ei64_v_f16m2_m(...) __riscv_vsuxseg2ei64_v_f16m2_m(__VA_ARGS__)
10280
#define vsuxseg3ei64_v_f16m2_m(...) __riscv_vsuxseg3ei64_v_f16m2_m(__VA_ARGS__)
10281
#define vsuxseg4ei64_v_f16m2_m(...) __riscv_vsuxseg4ei64_v_f16m2_m(__VA_ARGS__)
10282
#define vsuxseg2ei8_v_f32mf2_m(...) __riscv_vsuxseg2ei8_v_f32mf2_m(__VA_ARGS__)
10283
#define vsuxseg3ei8_v_f32mf2_m(...) __riscv_vsuxseg3ei8_v_f32mf2_m(__VA_ARGS__)
10284
#define vsuxseg4ei8_v_f32mf2_m(...) __riscv_vsuxseg4ei8_v_f32mf2_m(__VA_ARGS__)
10285
#define vsuxseg5ei8_v_f32mf2_m(...) __riscv_vsuxseg5ei8_v_f32mf2_m(__VA_ARGS__)
10286
#define vsuxseg6ei8_v_f32mf2_m(...) __riscv_vsuxseg6ei8_v_f32mf2_m(__VA_ARGS__)
10287
#define vsuxseg7ei8_v_f32mf2_m(...) __riscv_vsuxseg7ei8_v_f32mf2_m(__VA_ARGS__)
10288
#define vsuxseg8ei8_v_f32mf2_m(...) __riscv_vsuxseg8ei8_v_f32mf2_m(__VA_ARGS__)
10289
#define vsuxseg2ei8_v_f32m1_m(...) __riscv_vsuxseg2ei8_v_f32m1_m(__VA_ARGS__)
10290
#define vsuxseg3ei8_v_f32m1_m(...) __riscv_vsuxseg3ei8_v_f32m1_m(__VA_ARGS__)
10291
#define vsuxseg4ei8_v_f32m1_m(...) __riscv_vsuxseg4ei8_v_f32m1_m(__VA_ARGS__)
10292
#define vsuxseg5ei8_v_f32m1_m(...) __riscv_vsuxseg5ei8_v_f32m1_m(__VA_ARGS__)
10293
#define vsuxseg6ei8_v_f32m1_m(...) __riscv_vsuxseg6ei8_v_f32m1_m(__VA_ARGS__)
10294
#define vsuxseg7ei8_v_f32m1_m(...) __riscv_vsuxseg7ei8_v_f32m1_m(__VA_ARGS__)
10295
#define vsuxseg8ei8_v_f32m1_m(...) __riscv_vsuxseg8ei8_v_f32m1_m(__VA_ARGS__)
10296
#define vsuxseg2ei8_v_f32m2_m(...) __riscv_vsuxseg2ei8_v_f32m2_m(__VA_ARGS__)
10297
#define vsuxseg3ei8_v_f32m2_m(...) __riscv_vsuxseg3ei8_v_f32m2_m(__VA_ARGS__)
10298
#define vsuxseg4ei8_v_f32m2_m(...) __riscv_vsuxseg4ei8_v_f32m2_m(__VA_ARGS__)
10299
#define vsuxseg2ei8_v_f32m4_m(...) __riscv_vsuxseg2ei8_v_f32m4_m(__VA_ARGS__)
10300
#define vsuxseg2ei16_v_f32mf2_m(...) __riscv_vsuxseg2ei16_v_f32mf2_m(__VA_ARGS__)
10301
#define vsuxseg3ei16_v_f32mf2_m(...) __riscv_vsuxseg3ei16_v_f32mf2_m(__VA_ARGS__)
10302
#define vsuxseg4ei16_v_f32mf2_m(...) __riscv_vsuxseg4ei16_v_f32mf2_m(__VA_ARGS__)
10303
#define vsuxseg5ei16_v_f32mf2_m(...) __riscv_vsuxseg5ei16_v_f32mf2_m(__VA_ARGS__)
10304
#define vsuxseg6ei16_v_f32mf2_m(...) __riscv_vsuxseg6ei16_v_f32mf2_m(__VA_ARGS__)
10305
#define vsuxseg7ei16_v_f32mf2_m(...) __riscv_vsuxseg7ei16_v_f32mf2_m(__VA_ARGS__)
10306
#define vsuxseg8ei16_v_f32mf2_m(...) __riscv_vsuxseg8ei16_v_f32mf2_m(__VA_ARGS__)
10307
#define vsuxseg2ei16_v_f32m1_m(...) __riscv_vsuxseg2ei16_v_f32m1_m(__VA_ARGS__)
10308
#define vsuxseg3ei16_v_f32m1_m(...) __riscv_vsuxseg3ei16_v_f32m1_m(__VA_ARGS__)
10309
#define vsuxseg4ei16_v_f32m1_m(...) __riscv_vsuxseg4ei16_v_f32m1_m(__VA_ARGS__)
10310
#define vsuxseg5ei16_v_f32m1_m(...) __riscv_vsuxseg5ei16_v_f32m1_m(__VA_ARGS__)
10311
#define vsuxseg6ei16_v_f32m1_m(...) __riscv_vsuxseg6ei16_v_f32m1_m(__VA_ARGS__)
10312
#define vsuxseg7ei16_v_f32m1_m(...) __riscv_vsuxseg7ei16_v_f32m1_m(__VA_ARGS__)
10313
#define vsuxseg8ei16_v_f32m1_m(...) __riscv_vsuxseg8ei16_v_f32m1_m(__VA_ARGS__)
10314
#define vsuxseg2ei16_v_f32m2_m(...) __riscv_vsuxseg2ei16_v_f32m2_m(__VA_ARGS__)
10315
#define vsuxseg3ei16_v_f32m2_m(...) __riscv_vsuxseg3ei16_v_f32m2_m(__VA_ARGS__)
10316
#define vsuxseg4ei16_v_f32m2_m(...) __riscv_vsuxseg4ei16_v_f32m2_m(__VA_ARGS__)
10317
#define vsuxseg2ei16_v_f32m4_m(...) __riscv_vsuxseg2ei16_v_f32m4_m(__VA_ARGS__)
10318
#define vsuxseg2ei32_v_f32mf2_m(...) __riscv_vsuxseg2ei32_v_f32mf2_m(__VA_ARGS__)
10319
#define vsuxseg3ei32_v_f32mf2_m(...) __riscv_vsuxseg3ei32_v_f32mf2_m(__VA_ARGS__)
10320
#define vsuxseg4ei32_v_f32mf2_m(...) __riscv_vsuxseg4ei32_v_f32mf2_m(__VA_ARGS__)
10321
#define vsuxseg5ei32_v_f32mf2_m(...) __riscv_vsuxseg5ei32_v_f32mf2_m(__VA_ARGS__)
10322
#define vsuxseg6ei32_v_f32mf2_m(...) __riscv_vsuxseg6ei32_v_f32mf2_m(__VA_ARGS__)
10323
#define vsuxseg7ei32_v_f32mf2_m(...) __riscv_vsuxseg7ei32_v_f32mf2_m(__VA_ARGS__)
10324
#define vsuxseg8ei32_v_f32mf2_m(...) __riscv_vsuxseg8ei32_v_f32mf2_m(__VA_ARGS__)
10325
#define vsuxseg2ei32_v_f32m1_m(...) __riscv_vsuxseg2ei32_v_f32m1_m(__VA_ARGS__)
10326
#define vsuxseg3ei32_v_f32m1_m(...) __riscv_vsuxseg3ei32_v_f32m1_m(__VA_ARGS__)
10327
#define vsuxseg4ei32_v_f32m1_m(...) __riscv_vsuxseg4ei32_v_f32m1_m(__VA_ARGS__)
10328
#define vsuxseg5ei32_v_f32m1_m(...) __riscv_vsuxseg5ei32_v_f32m1_m(__VA_ARGS__)
10329
#define vsuxseg6ei32_v_f32m1_m(...) __riscv_vsuxseg6ei32_v_f32m1_m(__VA_ARGS__)
10330
#define vsuxseg7ei32_v_f32m1_m(...) __riscv_vsuxseg7ei32_v_f32m1_m(__VA_ARGS__)
10331
#define vsuxseg8ei32_v_f32m1_m(...) __riscv_vsuxseg8ei32_v_f32m1_m(__VA_ARGS__)
10332
#define vsuxseg2ei32_v_f32m2_m(...) __riscv_vsuxseg2ei32_v_f32m2_m(__VA_ARGS__)
10333
#define vsuxseg3ei32_v_f32m2_m(...) __riscv_vsuxseg3ei32_v_f32m2_m(__VA_ARGS__)
10334
#define vsuxseg4ei32_v_f32m2_m(...) __riscv_vsuxseg4ei32_v_f32m2_m(__VA_ARGS__)
10335
#define vsuxseg2ei32_v_f32m4_m(...) __riscv_vsuxseg2ei32_v_f32m4_m(__VA_ARGS__)
10336
#define vsuxseg2ei64_v_f32mf2_m(...) __riscv_vsuxseg2ei64_v_f32mf2_m(__VA_ARGS__)
10337
#define vsuxseg3ei64_v_f32mf2_m(...) __riscv_vsuxseg3ei64_v_f32mf2_m(__VA_ARGS__)
10338
#define vsuxseg4ei64_v_f32mf2_m(...) __riscv_vsuxseg4ei64_v_f32mf2_m(__VA_ARGS__)
10339
#define vsuxseg5ei64_v_f32mf2_m(...) __riscv_vsuxseg5ei64_v_f32mf2_m(__VA_ARGS__)
10340
#define vsuxseg6ei64_v_f32mf2_m(...) __riscv_vsuxseg6ei64_v_f32mf2_m(__VA_ARGS__)
10341
#define vsuxseg7ei64_v_f32mf2_m(...) __riscv_vsuxseg7ei64_v_f32mf2_m(__VA_ARGS__)
10342
#define vsuxseg8ei64_v_f32mf2_m(...) __riscv_vsuxseg8ei64_v_f32mf2_m(__VA_ARGS__)
10343
#define vsuxseg2ei64_v_f32m1_m(...) __riscv_vsuxseg2ei64_v_f32m1_m(__VA_ARGS__)
10344
#define vsuxseg3ei64_v_f32m1_m(...) __riscv_vsuxseg3ei64_v_f32m1_m(__VA_ARGS__)
10345
#define vsuxseg4ei64_v_f32m1_m(...) __riscv_vsuxseg4ei64_v_f32m1_m(__VA_ARGS__)
10346
#define vsuxseg5ei64_v_f32m1_m(...) __riscv_vsuxseg5ei64_v_f32m1_m(__VA_ARGS__)
10347
#define vsuxseg6ei64_v_f32m1_m(...) __riscv_vsuxseg6ei64_v_f32m1_m(__VA_ARGS__)
10348
#define vsuxseg7ei64_v_f32m1_m(...) __riscv_vsuxseg7ei64_v_f32m1_m(__VA_ARGS__)
10349
#define vsuxseg8ei64_v_f32m1_m(...) __riscv_vsuxseg8ei64_v_f32m1_m(__VA_ARGS__)
10350
#define vsuxseg2ei64_v_f32m2_m(...) __riscv_vsuxseg2ei64_v_f32m2_m(__VA_ARGS__)
10351
#define vsuxseg3ei64_v_f32m2_m(...) __riscv_vsuxseg3ei64_v_f32m2_m(__VA_ARGS__)
10352
#define vsuxseg4ei64_v_f32m2_m(...) __riscv_vsuxseg4ei64_v_f32m2_m(__VA_ARGS__)
10353
#define vsuxseg2ei64_v_f32m4_m(...) __riscv_vsuxseg2ei64_v_f32m4_m(__VA_ARGS__)
10354
#define vsuxseg2ei8_v_f64m1_m(...) __riscv_vsuxseg2ei8_v_f64m1_m(__VA_ARGS__)
10355
#define vsuxseg3ei8_v_f64m1_m(...) __riscv_vsuxseg3ei8_v_f64m1_m(__VA_ARGS__)
10356
#define vsuxseg4ei8_v_f64m1_m(...) __riscv_vsuxseg4ei8_v_f64m1_m(__VA_ARGS__)
10357
#define vsuxseg5ei8_v_f64m1_m(...) __riscv_vsuxseg5ei8_v_f64m1_m(__VA_ARGS__)
10358
#define vsuxseg6ei8_v_f64m1_m(...) __riscv_vsuxseg6ei8_v_f64m1_m(__VA_ARGS__)
10359
#define vsuxseg7ei8_v_f64m1_m(...) __riscv_vsuxseg7ei8_v_f64m1_m(__VA_ARGS__)
10360
#define vsuxseg8ei8_v_f64m1_m(...) __riscv_vsuxseg8ei8_v_f64m1_m(__VA_ARGS__)
10361
#define vsuxseg2ei8_v_f64m2_m(...) __riscv_vsuxseg2ei8_v_f64m2_m(__VA_ARGS__)
10362
#define vsuxseg3ei8_v_f64m2_m(...) __riscv_vsuxseg3ei8_v_f64m2_m(__VA_ARGS__)
10363
#define vsuxseg4ei8_v_f64m2_m(...) __riscv_vsuxseg4ei8_v_f64m2_m(__VA_ARGS__)
10364
#define vsuxseg2ei8_v_f64m4_m(...) __riscv_vsuxseg2ei8_v_f64m4_m(__VA_ARGS__)
10365
#define vsuxseg2ei16_v_f64m1_m(...) __riscv_vsuxseg2ei16_v_f64m1_m(__VA_ARGS__)
10366
#define vsuxseg3ei16_v_f64m1_m(...) __riscv_vsuxseg3ei16_v_f64m1_m(__VA_ARGS__)
10367
#define vsuxseg4ei16_v_f64m1_m(...) __riscv_vsuxseg4ei16_v_f64m1_m(__VA_ARGS__)
10368
#define vsuxseg5ei16_v_f64m1_m(...) __riscv_vsuxseg5ei16_v_f64m1_m(__VA_ARGS__)
10369
#define vsuxseg6ei16_v_f64m1_m(...) __riscv_vsuxseg6ei16_v_f64m1_m(__VA_ARGS__)
10370
#define vsuxseg7ei16_v_f64m1_m(...) __riscv_vsuxseg7ei16_v_f64m1_m(__VA_ARGS__)
10371
#define vsuxseg8ei16_v_f64m1_m(...) __riscv_vsuxseg8ei16_v_f64m1_m(__VA_ARGS__)
10372
#define vsuxseg2ei16_v_f64m2_m(...) __riscv_vsuxseg2ei16_v_f64m2_m(__VA_ARGS__)
10373
#define vsuxseg3ei16_v_f64m2_m(...) __riscv_vsuxseg3ei16_v_f64m2_m(__VA_ARGS__)
10374
#define vsuxseg4ei16_v_f64m2_m(...) __riscv_vsuxseg4ei16_v_f64m2_m(__VA_ARGS__)
10375
#define vsuxseg2ei16_v_f64m4_m(...) __riscv_vsuxseg2ei16_v_f64m4_m(__VA_ARGS__)
10376
#define vsuxseg2ei32_v_f64m1_m(...) __riscv_vsuxseg2ei32_v_f64m1_m(__VA_ARGS__)
10377
#define vsuxseg3ei32_v_f64m1_m(...) __riscv_vsuxseg3ei32_v_f64m1_m(__VA_ARGS__)
10378
#define vsuxseg4ei32_v_f64m1_m(...) __riscv_vsuxseg4ei32_v_f64m1_m(__VA_ARGS__)
10379
#define vsuxseg5ei32_v_f64m1_m(...) __riscv_vsuxseg5ei32_v_f64m1_m(__VA_ARGS__)
10380
#define vsuxseg6ei32_v_f64m1_m(...) __riscv_vsuxseg6ei32_v_f64m1_m(__VA_ARGS__)
10381
#define vsuxseg7ei32_v_f64m1_m(...) __riscv_vsuxseg7ei32_v_f64m1_m(__VA_ARGS__)
10382
#define vsuxseg8ei32_v_f64m1_m(...) __riscv_vsuxseg8ei32_v_f64m1_m(__VA_ARGS__)
10383
#define vsuxseg2ei32_v_f64m2_m(...) __riscv_vsuxseg2ei32_v_f64m2_m(__VA_ARGS__)
10384
#define vsuxseg3ei32_v_f64m2_m(...) __riscv_vsuxseg3ei32_v_f64m2_m(__VA_ARGS__)
10385
#define vsuxseg4ei32_v_f64m2_m(...) __riscv_vsuxseg4ei32_v_f64m2_m(__VA_ARGS__)
10386
#define vsuxseg2ei32_v_f64m4_m(...) __riscv_vsuxseg2ei32_v_f64m4_m(__VA_ARGS__)
10387
#define vsuxseg2ei64_v_f64m1_m(...) __riscv_vsuxseg2ei64_v_f64m1_m(__VA_ARGS__)
10388
#define vsuxseg3ei64_v_f64m1_m(...) __riscv_vsuxseg3ei64_v_f64m1_m(__VA_ARGS__)
10389
#define vsuxseg4ei64_v_f64m1_m(...) __riscv_vsuxseg4ei64_v_f64m1_m(__VA_ARGS__)
10390
#define vsuxseg5ei64_v_f64m1_m(...) __riscv_vsuxseg5ei64_v_f64m1_m(__VA_ARGS__)
10391
#define vsuxseg6ei64_v_f64m1_m(...) __riscv_vsuxseg6ei64_v_f64m1_m(__VA_ARGS__)
10392
#define vsuxseg7ei64_v_f64m1_m(...) __riscv_vsuxseg7ei64_v_f64m1_m(__VA_ARGS__)
10393
#define vsuxseg8ei64_v_f64m1_m(...) __riscv_vsuxseg8ei64_v_f64m1_m(__VA_ARGS__)
10394
#define vsuxseg2ei64_v_f64m2_m(...) __riscv_vsuxseg2ei64_v_f64m2_m(__VA_ARGS__)
10395
#define vsuxseg3ei64_v_f64m2_m(...) __riscv_vsuxseg3ei64_v_f64m2_m(__VA_ARGS__)
10396
#define vsuxseg4ei64_v_f64m2_m(...) __riscv_vsuxseg4ei64_v_f64m2_m(__VA_ARGS__)
10397
#define vsuxseg2ei64_v_f64m4_m(...) __riscv_vsuxseg2ei64_v_f64m4_m(__VA_ARGS__)
10398
#define vsoxseg2ei8_v_i8mf8_m(...) __riscv_vsoxseg2ei8_v_i8mf8_m(__VA_ARGS__)
10399
#define vsoxseg3ei8_v_i8mf8_m(...) __riscv_vsoxseg3ei8_v_i8mf8_m(__VA_ARGS__)
10400
#define vsoxseg4ei8_v_i8mf8_m(...) __riscv_vsoxseg4ei8_v_i8mf8_m(__VA_ARGS__)
10401
#define vsoxseg5ei8_v_i8mf8_m(...) __riscv_vsoxseg5ei8_v_i8mf8_m(__VA_ARGS__)
10402
#define vsoxseg6ei8_v_i8mf8_m(...) __riscv_vsoxseg6ei8_v_i8mf8_m(__VA_ARGS__)
10403
#define vsoxseg7ei8_v_i8mf8_m(...) __riscv_vsoxseg7ei8_v_i8mf8_m(__VA_ARGS__)
10404
#define vsoxseg8ei8_v_i8mf8_m(...) __riscv_vsoxseg8ei8_v_i8mf8_m(__VA_ARGS__)
10405
#define vsoxseg2ei8_v_i8mf4_m(...) __riscv_vsoxseg2ei8_v_i8mf4_m(__VA_ARGS__)
10406
#define vsoxseg3ei8_v_i8mf4_m(...) __riscv_vsoxseg3ei8_v_i8mf4_m(__VA_ARGS__)
10407
#define vsoxseg4ei8_v_i8mf4_m(...) __riscv_vsoxseg4ei8_v_i8mf4_m(__VA_ARGS__)
10408
#define vsoxseg5ei8_v_i8mf4_m(...) __riscv_vsoxseg5ei8_v_i8mf4_m(__VA_ARGS__)
10409
#define vsoxseg6ei8_v_i8mf4_m(...) __riscv_vsoxseg6ei8_v_i8mf4_m(__VA_ARGS__)
10410
#define vsoxseg7ei8_v_i8mf4_m(...) __riscv_vsoxseg7ei8_v_i8mf4_m(__VA_ARGS__)
10411
#define vsoxseg8ei8_v_i8mf4_m(...) __riscv_vsoxseg8ei8_v_i8mf4_m(__VA_ARGS__)
10412
#define vsoxseg2ei8_v_i8mf2_m(...) __riscv_vsoxseg2ei8_v_i8mf2_m(__VA_ARGS__)
10413
#define vsoxseg3ei8_v_i8mf2_m(...) __riscv_vsoxseg3ei8_v_i8mf2_m(__VA_ARGS__)
10414
#define vsoxseg4ei8_v_i8mf2_m(...) __riscv_vsoxseg4ei8_v_i8mf2_m(__VA_ARGS__)
10415
#define vsoxseg5ei8_v_i8mf2_m(...) __riscv_vsoxseg5ei8_v_i8mf2_m(__VA_ARGS__)
10416
#define vsoxseg6ei8_v_i8mf2_m(...) __riscv_vsoxseg6ei8_v_i8mf2_m(__VA_ARGS__)
10417
#define vsoxseg7ei8_v_i8mf2_m(...) __riscv_vsoxseg7ei8_v_i8mf2_m(__VA_ARGS__)
10418
#define vsoxseg8ei8_v_i8mf2_m(...) __riscv_vsoxseg8ei8_v_i8mf2_m(__VA_ARGS__)
10419
#define vsoxseg2ei8_v_i8m1_m(...) __riscv_vsoxseg2ei8_v_i8m1_m(__VA_ARGS__)
10420
#define vsoxseg3ei8_v_i8m1_m(...) __riscv_vsoxseg3ei8_v_i8m1_m(__VA_ARGS__)
10421
#define vsoxseg4ei8_v_i8m1_m(...) __riscv_vsoxseg4ei8_v_i8m1_m(__VA_ARGS__)
10422
#define vsoxseg5ei8_v_i8m1_m(...) __riscv_vsoxseg5ei8_v_i8m1_m(__VA_ARGS__)
10423
#define vsoxseg6ei8_v_i8m1_m(...) __riscv_vsoxseg6ei8_v_i8m1_m(__VA_ARGS__)
10424
#define vsoxseg7ei8_v_i8m1_m(...) __riscv_vsoxseg7ei8_v_i8m1_m(__VA_ARGS__)
10425
#define vsoxseg8ei8_v_i8m1_m(...) __riscv_vsoxseg8ei8_v_i8m1_m(__VA_ARGS__)
10426
#define vsoxseg2ei8_v_i8m2_m(...) __riscv_vsoxseg2ei8_v_i8m2_m(__VA_ARGS__)
10427
#define vsoxseg3ei8_v_i8m2_m(...) __riscv_vsoxseg3ei8_v_i8m2_m(__VA_ARGS__)
10428
#define vsoxseg4ei8_v_i8m2_m(...) __riscv_vsoxseg4ei8_v_i8m2_m(__VA_ARGS__)
10429
#define vsoxseg2ei8_v_i8m4_m(...) __riscv_vsoxseg2ei8_v_i8m4_m(__VA_ARGS__)
10430
#define vsoxseg2ei16_v_i8mf8_m(...) __riscv_vsoxseg2ei16_v_i8mf8_m(__VA_ARGS__)
10431
#define vsoxseg3ei16_v_i8mf8_m(...) __riscv_vsoxseg3ei16_v_i8mf8_m(__VA_ARGS__)
10432
#define vsoxseg4ei16_v_i8mf8_m(...) __riscv_vsoxseg4ei16_v_i8mf8_m(__VA_ARGS__)
10433
#define vsoxseg5ei16_v_i8mf8_m(...) __riscv_vsoxseg5ei16_v_i8mf8_m(__VA_ARGS__)
10434
#define vsoxseg6ei16_v_i8mf8_m(...) __riscv_vsoxseg6ei16_v_i8mf8_m(__VA_ARGS__)
10435
#define vsoxseg7ei16_v_i8mf8_m(...) __riscv_vsoxseg7ei16_v_i8mf8_m(__VA_ARGS__)
10436
#define vsoxseg8ei16_v_i8mf8_m(...) __riscv_vsoxseg8ei16_v_i8mf8_m(__VA_ARGS__)
10437
#define vsoxseg2ei16_v_i8mf4_m(...) __riscv_vsoxseg2ei16_v_i8mf4_m(__VA_ARGS__)
10438
#define vsoxseg3ei16_v_i8mf4_m(...) __riscv_vsoxseg3ei16_v_i8mf4_m(__VA_ARGS__)
10439
#define vsoxseg4ei16_v_i8mf4_m(...) __riscv_vsoxseg4ei16_v_i8mf4_m(__VA_ARGS__)
10440
#define vsoxseg5ei16_v_i8mf4_m(...) __riscv_vsoxseg5ei16_v_i8mf4_m(__VA_ARGS__)
10441
#define vsoxseg6ei16_v_i8mf4_m(...) __riscv_vsoxseg6ei16_v_i8mf4_m(__VA_ARGS__)
10442
#define vsoxseg7ei16_v_i8mf4_m(...) __riscv_vsoxseg7ei16_v_i8mf4_m(__VA_ARGS__)
10443
#define vsoxseg8ei16_v_i8mf4_m(...) __riscv_vsoxseg8ei16_v_i8mf4_m(__VA_ARGS__)
10444
#define vsoxseg2ei16_v_i8mf2_m(...) __riscv_vsoxseg2ei16_v_i8mf2_m(__VA_ARGS__)
10445
#define vsoxseg3ei16_v_i8mf2_m(...) __riscv_vsoxseg3ei16_v_i8mf2_m(__VA_ARGS__)
10446
#define vsoxseg4ei16_v_i8mf2_m(...) __riscv_vsoxseg4ei16_v_i8mf2_m(__VA_ARGS__)
10447
#define vsoxseg5ei16_v_i8mf2_m(...) __riscv_vsoxseg5ei16_v_i8mf2_m(__VA_ARGS__)
10448
#define vsoxseg6ei16_v_i8mf2_m(...) __riscv_vsoxseg6ei16_v_i8mf2_m(__VA_ARGS__)
10449
#define vsoxseg7ei16_v_i8mf2_m(...) __riscv_vsoxseg7ei16_v_i8mf2_m(__VA_ARGS__)
10450
#define vsoxseg8ei16_v_i8mf2_m(...) __riscv_vsoxseg8ei16_v_i8mf2_m(__VA_ARGS__)
10451
#define vsoxseg2ei16_v_i8m1_m(...) __riscv_vsoxseg2ei16_v_i8m1_m(__VA_ARGS__)
10452
#define vsoxseg3ei16_v_i8m1_m(...) __riscv_vsoxseg3ei16_v_i8m1_m(__VA_ARGS__)
10453
#define vsoxseg4ei16_v_i8m1_m(...) __riscv_vsoxseg4ei16_v_i8m1_m(__VA_ARGS__)
10454
#define vsoxseg5ei16_v_i8m1_m(...) __riscv_vsoxseg5ei16_v_i8m1_m(__VA_ARGS__)
10455
#define vsoxseg6ei16_v_i8m1_m(...) __riscv_vsoxseg6ei16_v_i8m1_m(__VA_ARGS__)
10456
#define vsoxseg7ei16_v_i8m1_m(...) __riscv_vsoxseg7ei16_v_i8m1_m(__VA_ARGS__)
10457
#define vsoxseg8ei16_v_i8m1_m(...) __riscv_vsoxseg8ei16_v_i8m1_m(__VA_ARGS__)
10458
#define vsoxseg2ei16_v_i8m2_m(...) __riscv_vsoxseg2ei16_v_i8m2_m(__VA_ARGS__)
10459
#define vsoxseg3ei16_v_i8m2_m(...) __riscv_vsoxseg3ei16_v_i8m2_m(__VA_ARGS__)
10460
#define vsoxseg4ei16_v_i8m2_m(...) __riscv_vsoxseg4ei16_v_i8m2_m(__VA_ARGS__)
10461
#define vsoxseg2ei16_v_i8m4_m(...) __riscv_vsoxseg2ei16_v_i8m4_m(__VA_ARGS__)
10462
#define vsoxseg2ei32_v_i8mf8_m(...) __riscv_vsoxseg2ei32_v_i8mf8_m(__VA_ARGS__)
10463
#define vsoxseg3ei32_v_i8mf8_m(...) __riscv_vsoxseg3ei32_v_i8mf8_m(__VA_ARGS__)
10464
#define vsoxseg4ei32_v_i8mf8_m(...) __riscv_vsoxseg4ei32_v_i8mf8_m(__VA_ARGS__)
10465
#define vsoxseg5ei32_v_i8mf8_m(...) __riscv_vsoxseg5ei32_v_i8mf8_m(__VA_ARGS__)
10466
#define vsoxseg6ei32_v_i8mf8_m(...) __riscv_vsoxseg6ei32_v_i8mf8_m(__VA_ARGS__)
10467
#define vsoxseg7ei32_v_i8mf8_m(...) __riscv_vsoxseg7ei32_v_i8mf8_m(__VA_ARGS__)
10468
#define vsoxseg8ei32_v_i8mf8_m(...) __riscv_vsoxseg8ei32_v_i8mf8_m(__VA_ARGS__)
10469
#define vsoxseg2ei32_v_i8mf4_m(...) __riscv_vsoxseg2ei32_v_i8mf4_m(__VA_ARGS__)
10470
#define vsoxseg3ei32_v_i8mf4_m(...) __riscv_vsoxseg3ei32_v_i8mf4_m(__VA_ARGS__)
10471
#define vsoxseg4ei32_v_i8mf4_m(...) __riscv_vsoxseg4ei32_v_i8mf4_m(__VA_ARGS__)
10472
#define vsoxseg5ei32_v_i8mf4_m(...) __riscv_vsoxseg5ei32_v_i8mf4_m(__VA_ARGS__)
10473
#define vsoxseg6ei32_v_i8mf4_m(...) __riscv_vsoxseg6ei32_v_i8mf4_m(__VA_ARGS__)
10474
#define vsoxseg7ei32_v_i8mf4_m(...) __riscv_vsoxseg7ei32_v_i8mf4_m(__VA_ARGS__)
10475
#define vsoxseg8ei32_v_i8mf4_m(...) __riscv_vsoxseg8ei32_v_i8mf4_m(__VA_ARGS__)
10476
#define vsoxseg2ei32_v_i8mf2_m(...) __riscv_vsoxseg2ei32_v_i8mf2_m(__VA_ARGS__)
10477
#define vsoxseg3ei32_v_i8mf2_m(...) __riscv_vsoxseg3ei32_v_i8mf2_m(__VA_ARGS__)
10478
#define vsoxseg4ei32_v_i8mf2_m(...) __riscv_vsoxseg4ei32_v_i8mf2_m(__VA_ARGS__)
10479
#define vsoxseg5ei32_v_i8mf2_m(...) __riscv_vsoxseg5ei32_v_i8mf2_m(__VA_ARGS__)
10480
#define vsoxseg6ei32_v_i8mf2_m(...) __riscv_vsoxseg6ei32_v_i8mf2_m(__VA_ARGS__)
10481
#define vsoxseg7ei32_v_i8mf2_m(...) __riscv_vsoxseg7ei32_v_i8mf2_m(__VA_ARGS__)
10482
#define vsoxseg8ei32_v_i8mf2_m(...) __riscv_vsoxseg8ei32_v_i8mf2_m(__VA_ARGS__)
10483
#define vsoxseg2ei32_v_i8m1_m(...) __riscv_vsoxseg2ei32_v_i8m1_m(__VA_ARGS__)
10484
#define vsoxseg3ei32_v_i8m1_m(...) __riscv_vsoxseg3ei32_v_i8m1_m(__VA_ARGS__)
10485
#define vsoxseg4ei32_v_i8m1_m(...) __riscv_vsoxseg4ei32_v_i8m1_m(__VA_ARGS__)
10486
#define vsoxseg5ei32_v_i8m1_m(...) __riscv_vsoxseg5ei32_v_i8m1_m(__VA_ARGS__)
10487
#define vsoxseg6ei32_v_i8m1_m(...) __riscv_vsoxseg6ei32_v_i8m1_m(__VA_ARGS__)
10488
#define vsoxseg7ei32_v_i8m1_m(...) __riscv_vsoxseg7ei32_v_i8m1_m(__VA_ARGS__)
10489
#define vsoxseg8ei32_v_i8m1_m(...) __riscv_vsoxseg8ei32_v_i8m1_m(__VA_ARGS__)
10490
#define vsoxseg2ei32_v_i8m2_m(...) __riscv_vsoxseg2ei32_v_i8m2_m(__VA_ARGS__)
10491
#define vsoxseg3ei32_v_i8m2_m(...) __riscv_vsoxseg3ei32_v_i8m2_m(__VA_ARGS__)
10492
#define vsoxseg4ei32_v_i8m2_m(...) __riscv_vsoxseg4ei32_v_i8m2_m(__VA_ARGS__)
10493
#define vsoxseg2ei64_v_i8mf8_m(...) __riscv_vsoxseg2ei64_v_i8mf8_m(__VA_ARGS__)
10494
#define vsoxseg3ei64_v_i8mf8_m(...) __riscv_vsoxseg3ei64_v_i8mf8_m(__VA_ARGS__)
10495
#define vsoxseg4ei64_v_i8mf8_m(...) __riscv_vsoxseg4ei64_v_i8mf8_m(__VA_ARGS__)
10496
#define vsoxseg5ei64_v_i8mf8_m(...) __riscv_vsoxseg5ei64_v_i8mf8_m(__VA_ARGS__)
10497
#define vsoxseg6ei64_v_i8mf8_m(...) __riscv_vsoxseg6ei64_v_i8mf8_m(__VA_ARGS__)
10498
#define vsoxseg7ei64_v_i8mf8_m(...) __riscv_vsoxseg7ei64_v_i8mf8_m(__VA_ARGS__)
10499
#define vsoxseg8ei64_v_i8mf8_m(...) __riscv_vsoxseg8ei64_v_i8mf8_m(__VA_ARGS__)
10500
#define vsoxseg2ei64_v_i8mf4_m(...) __riscv_vsoxseg2ei64_v_i8mf4_m(__VA_ARGS__)
10501
#define vsoxseg3ei64_v_i8mf4_m(...) __riscv_vsoxseg3ei64_v_i8mf4_m(__VA_ARGS__)
10502
#define vsoxseg4ei64_v_i8mf4_m(...) __riscv_vsoxseg4ei64_v_i8mf4_m(__VA_ARGS__)
10503
#define vsoxseg5ei64_v_i8mf4_m(...) __riscv_vsoxseg5ei64_v_i8mf4_m(__VA_ARGS__)
10504
#define vsoxseg6ei64_v_i8mf4_m(...) __riscv_vsoxseg6ei64_v_i8mf4_m(__VA_ARGS__)
10505
#define vsoxseg7ei64_v_i8mf4_m(...) __riscv_vsoxseg7ei64_v_i8mf4_m(__VA_ARGS__)
10506
#define vsoxseg8ei64_v_i8mf4_m(...) __riscv_vsoxseg8ei64_v_i8mf4_m(__VA_ARGS__)
10507
#define vsoxseg2ei64_v_i8mf2_m(...) __riscv_vsoxseg2ei64_v_i8mf2_m(__VA_ARGS__)
10508
#define vsoxseg3ei64_v_i8mf2_m(...) __riscv_vsoxseg3ei64_v_i8mf2_m(__VA_ARGS__)
10509
#define vsoxseg4ei64_v_i8mf2_m(...) __riscv_vsoxseg4ei64_v_i8mf2_m(__VA_ARGS__)
10510
#define vsoxseg5ei64_v_i8mf2_m(...) __riscv_vsoxseg5ei64_v_i8mf2_m(__VA_ARGS__)
10511
#define vsoxseg6ei64_v_i8mf2_m(...) __riscv_vsoxseg6ei64_v_i8mf2_m(__VA_ARGS__)
10512
#define vsoxseg7ei64_v_i8mf2_m(...) __riscv_vsoxseg7ei64_v_i8mf2_m(__VA_ARGS__)
10513
#define vsoxseg8ei64_v_i8mf2_m(...) __riscv_vsoxseg8ei64_v_i8mf2_m(__VA_ARGS__)
10514
#define vsoxseg2ei64_v_i8m1_m(...) __riscv_vsoxseg2ei64_v_i8m1_m(__VA_ARGS__)
10515
#define vsoxseg3ei64_v_i8m1_m(...) __riscv_vsoxseg3ei64_v_i8m1_m(__VA_ARGS__)
10516
#define vsoxseg4ei64_v_i8m1_m(...) __riscv_vsoxseg4ei64_v_i8m1_m(__VA_ARGS__)
10517
#define vsoxseg5ei64_v_i8m1_m(...) __riscv_vsoxseg5ei64_v_i8m1_m(__VA_ARGS__)
10518
#define vsoxseg6ei64_v_i8m1_m(...) __riscv_vsoxseg6ei64_v_i8m1_m(__VA_ARGS__)
10519
#define vsoxseg7ei64_v_i8m1_m(...) __riscv_vsoxseg7ei64_v_i8m1_m(__VA_ARGS__)
10520
#define vsoxseg8ei64_v_i8m1_m(...) __riscv_vsoxseg8ei64_v_i8m1_m(__VA_ARGS__)
10521
#define vsoxseg2ei8_v_i16mf4_m(...) __riscv_vsoxseg2ei8_v_i16mf4_m(__VA_ARGS__)
10522
#define vsoxseg3ei8_v_i16mf4_m(...) __riscv_vsoxseg3ei8_v_i16mf4_m(__VA_ARGS__)
10523
#define vsoxseg4ei8_v_i16mf4_m(...) __riscv_vsoxseg4ei8_v_i16mf4_m(__VA_ARGS__)
10524
#define vsoxseg5ei8_v_i16mf4_m(...) __riscv_vsoxseg5ei8_v_i16mf4_m(__VA_ARGS__)
10525
#define vsoxseg6ei8_v_i16mf4_m(...) __riscv_vsoxseg6ei8_v_i16mf4_m(__VA_ARGS__)
10526
#define vsoxseg7ei8_v_i16mf4_m(...) __riscv_vsoxseg7ei8_v_i16mf4_m(__VA_ARGS__)
10527
#define vsoxseg8ei8_v_i16mf4_m(...) __riscv_vsoxseg8ei8_v_i16mf4_m(__VA_ARGS__)
10528
#define vsoxseg2ei8_v_i16mf2_m(...) __riscv_vsoxseg2ei8_v_i16mf2_m(__VA_ARGS__)
10529
#define vsoxseg3ei8_v_i16mf2_m(...) __riscv_vsoxseg3ei8_v_i16mf2_m(__VA_ARGS__)
10530
#define vsoxseg4ei8_v_i16mf2_m(...) __riscv_vsoxseg4ei8_v_i16mf2_m(__VA_ARGS__)
10531
#define vsoxseg5ei8_v_i16mf2_m(...) __riscv_vsoxseg5ei8_v_i16mf2_m(__VA_ARGS__)
10532
#define vsoxseg6ei8_v_i16mf2_m(...) __riscv_vsoxseg6ei8_v_i16mf2_m(__VA_ARGS__)
10533
#define vsoxseg7ei8_v_i16mf2_m(...) __riscv_vsoxseg7ei8_v_i16mf2_m(__VA_ARGS__)
10534
#define vsoxseg8ei8_v_i16mf2_m(...) __riscv_vsoxseg8ei8_v_i16mf2_m(__VA_ARGS__)
10535
#define vsoxseg2ei8_v_i16m1_m(...) __riscv_vsoxseg2ei8_v_i16m1_m(__VA_ARGS__)
10536
#define vsoxseg3ei8_v_i16m1_m(...) __riscv_vsoxseg3ei8_v_i16m1_m(__VA_ARGS__)
10537
#define vsoxseg4ei8_v_i16m1_m(...) __riscv_vsoxseg4ei8_v_i16m1_m(__VA_ARGS__)
10538
#define vsoxseg5ei8_v_i16m1_m(...) __riscv_vsoxseg5ei8_v_i16m1_m(__VA_ARGS__)
10539
#define vsoxseg6ei8_v_i16m1_m(...) __riscv_vsoxseg6ei8_v_i16m1_m(__VA_ARGS__)
10540
#define vsoxseg7ei8_v_i16m1_m(...) __riscv_vsoxseg7ei8_v_i16m1_m(__VA_ARGS__)
10541
#define vsoxseg8ei8_v_i16m1_m(...) __riscv_vsoxseg8ei8_v_i16m1_m(__VA_ARGS__)
10542
#define vsoxseg2ei8_v_i16m2_m(...) __riscv_vsoxseg2ei8_v_i16m2_m(__VA_ARGS__)
10543
#define vsoxseg3ei8_v_i16m2_m(...) __riscv_vsoxseg3ei8_v_i16m2_m(__VA_ARGS__)
10544
#define vsoxseg4ei8_v_i16m2_m(...) __riscv_vsoxseg4ei8_v_i16m2_m(__VA_ARGS__)
10545
#define vsoxseg2ei8_v_i16m4_m(...) __riscv_vsoxseg2ei8_v_i16m4_m(__VA_ARGS__)
10546
#define vsoxseg2ei16_v_i16mf4_m(...) __riscv_vsoxseg2ei16_v_i16mf4_m(__VA_ARGS__)
10547
#define vsoxseg3ei16_v_i16mf4_m(...) __riscv_vsoxseg3ei16_v_i16mf4_m(__VA_ARGS__)
10548
#define vsoxseg4ei16_v_i16mf4_m(...) __riscv_vsoxseg4ei16_v_i16mf4_m(__VA_ARGS__)
10549
#define vsoxseg5ei16_v_i16mf4_m(...) __riscv_vsoxseg5ei16_v_i16mf4_m(__VA_ARGS__)
10550
#define vsoxseg6ei16_v_i16mf4_m(...) __riscv_vsoxseg6ei16_v_i16mf4_m(__VA_ARGS__)
10551
#define vsoxseg7ei16_v_i16mf4_m(...) __riscv_vsoxseg7ei16_v_i16mf4_m(__VA_ARGS__)
10552
#define vsoxseg8ei16_v_i16mf4_m(...) __riscv_vsoxseg8ei16_v_i16mf4_m(__VA_ARGS__)
10553
#define vsoxseg2ei16_v_i16mf2_m(...) __riscv_vsoxseg2ei16_v_i16mf2_m(__VA_ARGS__)
10554
#define vsoxseg3ei16_v_i16mf2_m(...) __riscv_vsoxseg3ei16_v_i16mf2_m(__VA_ARGS__)
10555
#define vsoxseg4ei16_v_i16mf2_m(...) __riscv_vsoxseg4ei16_v_i16mf2_m(__VA_ARGS__)
10556
#define vsoxseg5ei16_v_i16mf2_m(...) __riscv_vsoxseg5ei16_v_i16mf2_m(__VA_ARGS__)
10557
#define vsoxseg6ei16_v_i16mf2_m(...) __riscv_vsoxseg6ei16_v_i16mf2_m(__VA_ARGS__)
10558
#define vsoxseg7ei16_v_i16mf2_m(...) __riscv_vsoxseg7ei16_v_i16mf2_m(__VA_ARGS__)
10559
#define vsoxseg8ei16_v_i16mf2_m(...) __riscv_vsoxseg8ei16_v_i16mf2_m(__VA_ARGS__)
10560
#define vsoxseg2ei16_v_i16m1_m(...) __riscv_vsoxseg2ei16_v_i16m1_m(__VA_ARGS__)
10561
#define vsoxseg3ei16_v_i16m1_m(...) __riscv_vsoxseg3ei16_v_i16m1_m(__VA_ARGS__)
10562
#define vsoxseg4ei16_v_i16m1_m(...) __riscv_vsoxseg4ei16_v_i16m1_m(__VA_ARGS__)
10563
#define vsoxseg5ei16_v_i16m1_m(...) __riscv_vsoxseg5ei16_v_i16m1_m(__VA_ARGS__)
10564
#define vsoxseg6ei16_v_i16m1_m(...) __riscv_vsoxseg6ei16_v_i16m1_m(__VA_ARGS__)
10565
#define vsoxseg7ei16_v_i16m1_m(...) __riscv_vsoxseg7ei16_v_i16m1_m(__VA_ARGS__)
10566
#define vsoxseg8ei16_v_i16m1_m(...) __riscv_vsoxseg8ei16_v_i16m1_m(__VA_ARGS__)
10567
#define vsoxseg2ei16_v_i16m2_m(...) __riscv_vsoxseg2ei16_v_i16m2_m(__VA_ARGS__)
10568
#define vsoxseg3ei16_v_i16m2_m(...) __riscv_vsoxseg3ei16_v_i16m2_m(__VA_ARGS__)
10569
#define vsoxseg4ei16_v_i16m2_m(...) __riscv_vsoxseg4ei16_v_i16m2_m(__VA_ARGS__)
10570
#define vsoxseg2ei16_v_i16m4_m(...) __riscv_vsoxseg2ei16_v_i16m4_m(__VA_ARGS__)
10571
#define vsoxseg2ei32_v_i16mf4_m(...) __riscv_vsoxseg2ei32_v_i16mf4_m(__VA_ARGS__)
10572
#define vsoxseg3ei32_v_i16mf4_m(...) __riscv_vsoxseg3ei32_v_i16mf4_m(__VA_ARGS__)
10573
#define vsoxseg4ei32_v_i16mf4_m(...) __riscv_vsoxseg4ei32_v_i16mf4_m(__VA_ARGS__)
10574
#define vsoxseg5ei32_v_i16mf4_m(...) __riscv_vsoxseg5ei32_v_i16mf4_m(__VA_ARGS__)
10575
#define vsoxseg6ei32_v_i16mf4_m(...) __riscv_vsoxseg6ei32_v_i16mf4_m(__VA_ARGS__)
10576
#define vsoxseg7ei32_v_i16mf4_m(...) __riscv_vsoxseg7ei32_v_i16mf4_m(__VA_ARGS__)
10577
#define vsoxseg8ei32_v_i16mf4_m(...) __riscv_vsoxseg8ei32_v_i16mf4_m(__VA_ARGS__)
10578
#define vsoxseg2ei32_v_i16mf2_m(...) __riscv_vsoxseg2ei32_v_i16mf2_m(__VA_ARGS__)
10579
#define vsoxseg3ei32_v_i16mf2_m(...) __riscv_vsoxseg3ei32_v_i16mf2_m(__VA_ARGS__)
10580
#define vsoxseg4ei32_v_i16mf2_m(...) __riscv_vsoxseg4ei32_v_i16mf2_m(__VA_ARGS__)
10581
#define vsoxseg5ei32_v_i16mf2_m(...) __riscv_vsoxseg5ei32_v_i16mf2_m(__VA_ARGS__)
10582
#define vsoxseg6ei32_v_i16mf2_m(...) __riscv_vsoxseg6ei32_v_i16mf2_m(__VA_ARGS__)
10583
#define vsoxseg7ei32_v_i16mf2_m(...) __riscv_vsoxseg7ei32_v_i16mf2_m(__VA_ARGS__)
10584
#define vsoxseg8ei32_v_i16mf2_m(...) __riscv_vsoxseg8ei32_v_i16mf2_m(__VA_ARGS__)
10585
#define vsoxseg2ei32_v_i16m1_m(...) __riscv_vsoxseg2ei32_v_i16m1_m(__VA_ARGS__)
10586
#define vsoxseg3ei32_v_i16m1_m(...) __riscv_vsoxseg3ei32_v_i16m1_m(__VA_ARGS__)
10587
#define vsoxseg4ei32_v_i16m1_m(...) __riscv_vsoxseg4ei32_v_i16m1_m(__VA_ARGS__)
10588
#define vsoxseg5ei32_v_i16m1_m(...) __riscv_vsoxseg5ei32_v_i16m1_m(__VA_ARGS__)
10589
#define vsoxseg6ei32_v_i16m1_m(...) __riscv_vsoxseg6ei32_v_i16m1_m(__VA_ARGS__)
10590
#define vsoxseg7ei32_v_i16m1_m(...) __riscv_vsoxseg7ei32_v_i16m1_m(__VA_ARGS__)
10591
#define vsoxseg8ei32_v_i16m1_m(...) __riscv_vsoxseg8ei32_v_i16m1_m(__VA_ARGS__)
10592
#define vsoxseg2ei32_v_i16m2_m(...) __riscv_vsoxseg2ei32_v_i16m2_m(__VA_ARGS__)
10593
#define vsoxseg3ei32_v_i16m2_m(...) __riscv_vsoxseg3ei32_v_i16m2_m(__VA_ARGS__)
10594
#define vsoxseg4ei32_v_i16m2_m(...) __riscv_vsoxseg4ei32_v_i16m2_m(__VA_ARGS__)
10595
#define vsoxseg2ei32_v_i16m4_m(...) __riscv_vsoxseg2ei32_v_i16m4_m(__VA_ARGS__)
10596
#define vsoxseg2ei64_v_i16mf4_m(...) __riscv_vsoxseg2ei64_v_i16mf4_m(__VA_ARGS__)
10597
#define vsoxseg3ei64_v_i16mf4_m(...) __riscv_vsoxseg3ei64_v_i16mf4_m(__VA_ARGS__)
10598
#define vsoxseg4ei64_v_i16mf4_m(...) __riscv_vsoxseg4ei64_v_i16mf4_m(__VA_ARGS__)
10599
#define vsoxseg5ei64_v_i16mf4_m(...) __riscv_vsoxseg5ei64_v_i16mf4_m(__VA_ARGS__)
10600
#define vsoxseg6ei64_v_i16mf4_m(...) __riscv_vsoxseg6ei64_v_i16mf4_m(__VA_ARGS__)
10601
#define vsoxseg7ei64_v_i16mf4_m(...) __riscv_vsoxseg7ei64_v_i16mf4_m(__VA_ARGS__)
10602
#define vsoxseg8ei64_v_i16mf4_m(...) __riscv_vsoxseg8ei64_v_i16mf4_m(__VA_ARGS__)
10603
#define vsoxseg2ei64_v_i16mf2_m(...) __riscv_vsoxseg2ei64_v_i16mf2_m(__VA_ARGS__)
10604
#define vsoxseg3ei64_v_i16mf2_m(...) __riscv_vsoxseg3ei64_v_i16mf2_m(__VA_ARGS__)
10605
#define vsoxseg4ei64_v_i16mf2_m(...) __riscv_vsoxseg4ei64_v_i16mf2_m(__VA_ARGS__)
10606
#define vsoxseg5ei64_v_i16mf2_m(...) __riscv_vsoxseg5ei64_v_i16mf2_m(__VA_ARGS__)
10607
#define vsoxseg6ei64_v_i16mf2_m(...) __riscv_vsoxseg6ei64_v_i16mf2_m(__VA_ARGS__)
10608
#define vsoxseg7ei64_v_i16mf2_m(...) __riscv_vsoxseg7ei64_v_i16mf2_m(__VA_ARGS__)
10609
#define vsoxseg8ei64_v_i16mf2_m(...) __riscv_vsoxseg8ei64_v_i16mf2_m(__VA_ARGS__)
10610
#define vsoxseg2ei64_v_i16m1_m(...) __riscv_vsoxseg2ei64_v_i16m1_m(__VA_ARGS__)
10611
#define vsoxseg3ei64_v_i16m1_m(...) __riscv_vsoxseg3ei64_v_i16m1_m(__VA_ARGS__)
10612
#define vsoxseg4ei64_v_i16m1_m(...) __riscv_vsoxseg4ei64_v_i16m1_m(__VA_ARGS__)
10613
#define vsoxseg5ei64_v_i16m1_m(...) __riscv_vsoxseg5ei64_v_i16m1_m(__VA_ARGS__)
10614
#define vsoxseg6ei64_v_i16m1_m(...) __riscv_vsoxseg6ei64_v_i16m1_m(__VA_ARGS__)
10615
#define vsoxseg7ei64_v_i16m1_m(...) __riscv_vsoxseg7ei64_v_i16m1_m(__VA_ARGS__)
10616
#define vsoxseg8ei64_v_i16m1_m(...) __riscv_vsoxseg8ei64_v_i16m1_m(__VA_ARGS__)
10617
#define vsoxseg2ei64_v_i16m2_m(...) __riscv_vsoxseg2ei64_v_i16m2_m(__VA_ARGS__)
10618
#define vsoxseg3ei64_v_i16m2_m(...) __riscv_vsoxseg3ei64_v_i16m2_m(__VA_ARGS__)
10619
#define vsoxseg4ei64_v_i16m2_m(...) __riscv_vsoxseg4ei64_v_i16m2_m(__VA_ARGS__)
10620
#define vsoxseg2ei8_v_i32mf2_m(...) __riscv_vsoxseg2ei8_v_i32mf2_m(__VA_ARGS__)
10621
#define vsoxseg3ei8_v_i32mf2_m(...) __riscv_vsoxseg3ei8_v_i32mf2_m(__VA_ARGS__)
10622
#define vsoxseg4ei8_v_i32mf2_m(...) __riscv_vsoxseg4ei8_v_i32mf2_m(__VA_ARGS__)
10623
#define vsoxseg5ei8_v_i32mf2_m(...) __riscv_vsoxseg5ei8_v_i32mf2_m(__VA_ARGS__)
10624
#define vsoxseg6ei8_v_i32mf2_m(...) __riscv_vsoxseg6ei8_v_i32mf2_m(__VA_ARGS__)
10625
#define vsoxseg7ei8_v_i32mf2_m(...) __riscv_vsoxseg7ei8_v_i32mf2_m(__VA_ARGS__)
10626
#define vsoxseg8ei8_v_i32mf2_m(...) __riscv_vsoxseg8ei8_v_i32mf2_m(__VA_ARGS__)
10627
#define vsoxseg2ei8_v_i32m1_m(...) __riscv_vsoxseg2ei8_v_i32m1_m(__VA_ARGS__)
10628
#define vsoxseg3ei8_v_i32m1_m(...) __riscv_vsoxseg3ei8_v_i32m1_m(__VA_ARGS__)
10629
#define vsoxseg4ei8_v_i32m1_m(...) __riscv_vsoxseg4ei8_v_i32m1_m(__VA_ARGS__)
10630
#define vsoxseg5ei8_v_i32m1_m(...) __riscv_vsoxseg5ei8_v_i32m1_m(__VA_ARGS__)
10631
#define vsoxseg6ei8_v_i32m1_m(...) __riscv_vsoxseg6ei8_v_i32m1_m(__VA_ARGS__)
10632
#define vsoxseg7ei8_v_i32m1_m(...) __riscv_vsoxseg7ei8_v_i32m1_m(__VA_ARGS__)
10633
#define vsoxseg8ei8_v_i32m1_m(...) __riscv_vsoxseg8ei8_v_i32m1_m(__VA_ARGS__)
10634
#define vsoxseg2ei8_v_i32m2_m(...) __riscv_vsoxseg2ei8_v_i32m2_m(__VA_ARGS__)
10635
#define vsoxseg3ei8_v_i32m2_m(...) __riscv_vsoxseg3ei8_v_i32m2_m(__VA_ARGS__)
10636
#define vsoxseg4ei8_v_i32m2_m(...) __riscv_vsoxseg4ei8_v_i32m2_m(__VA_ARGS__)
10637
#define vsoxseg2ei8_v_i32m4_m(...) __riscv_vsoxseg2ei8_v_i32m4_m(__VA_ARGS__)
10638
#define vsoxseg2ei16_v_i32mf2_m(...) __riscv_vsoxseg2ei16_v_i32mf2_m(__VA_ARGS__)
10639
#define vsoxseg3ei16_v_i32mf2_m(...) __riscv_vsoxseg3ei16_v_i32mf2_m(__VA_ARGS__)
10640
#define vsoxseg4ei16_v_i32mf2_m(...) __riscv_vsoxseg4ei16_v_i32mf2_m(__VA_ARGS__)
10641
#define vsoxseg5ei16_v_i32mf2_m(...) __riscv_vsoxseg5ei16_v_i32mf2_m(__VA_ARGS__)
10642
#define vsoxseg6ei16_v_i32mf2_m(...) __riscv_vsoxseg6ei16_v_i32mf2_m(__VA_ARGS__)
10643
#define vsoxseg7ei16_v_i32mf2_m(...) __riscv_vsoxseg7ei16_v_i32mf2_m(__VA_ARGS__)
10644
#define vsoxseg8ei16_v_i32mf2_m(...) __riscv_vsoxseg8ei16_v_i32mf2_m(__VA_ARGS__)
10645
#define vsoxseg2ei16_v_i32m1_m(...) __riscv_vsoxseg2ei16_v_i32m1_m(__VA_ARGS__)
10646
#define vsoxseg3ei16_v_i32m1_m(...) __riscv_vsoxseg3ei16_v_i32m1_m(__VA_ARGS__)
10647
#define vsoxseg4ei16_v_i32m1_m(...) __riscv_vsoxseg4ei16_v_i32m1_m(__VA_ARGS__)
10648
#define vsoxseg5ei16_v_i32m1_m(...) __riscv_vsoxseg5ei16_v_i32m1_m(__VA_ARGS__)
10649
#define vsoxseg6ei16_v_i32m1_m(...) __riscv_vsoxseg6ei16_v_i32m1_m(__VA_ARGS__)
10650
#define vsoxseg7ei16_v_i32m1_m(...) __riscv_vsoxseg7ei16_v_i32m1_m(__VA_ARGS__)
10651
#define vsoxseg8ei16_v_i32m1_m(...) __riscv_vsoxseg8ei16_v_i32m1_m(__VA_ARGS__)
10652
#define vsoxseg2ei16_v_i32m2_m(...) __riscv_vsoxseg2ei16_v_i32m2_m(__VA_ARGS__)
10653
#define vsoxseg3ei16_v_i32m2_m(...) __riscv_vsoxseg3ei16_v_i32m2_m(__VA_ARGS__)
10654
#define vsoxseg4ei16_v_i32m2_m(...) __riscv_vsoxseg4ei16_v_i32m2_m(__VA_ARGS__)
10655
#define vsoxseg2ei16_v_i32m4_m(...) __riscv_vsoxseg2ei16_v_i32m4_m(__VA_ARGS__)
10656
#define vsoxseg2ei32_v_i32mf2_m(...) __riscv_vsoxseg2ei32_v_i32mf2_m(__VA_ARGS__)
10657
#define vsoxseg3ei32_v_i32mf2_m(...) __riscv_vsoxseg3ei32_v_i32mf2_m(__VA_ARGS__)
10658
#define vsoxseg4ei32_v_i32mf2_m(...) __riscv_vsoxseg4ei32_v_i32mf2_m(__VA_ARGS__)
10659
#define vsoxseg5ei32_v_i32mf2_m(...) __riscv_vsoxseg5ei32_v_i32mf2_m(__VA_ARGS__)
10660
#define vsoxseg6ei32_v_i32mf2_m(...) __riscv_vsoxseg6ei32_v_i32mf2_m(__VA_ARGS__)
10661
#define vsoxseg7ei32_v_i32mf2_m(...) __riscv_vsoxseg7ei32_v_i32mf2_m(__VA_ARGS__)
10662
#define vsoxseg8ei32_v_i32mf2_m(...) __riscv_vsoxseg8ei32_v_i32mf2_m(__VA_ARGS__)
10663
#define vsoxseg2ei32_v_i32m1_m(...) __riscv_vsoxseg2ei32_v_i32m1_m(__VA_ARGS__)
10664
#define vsoxseg3ei32_v_i32m1_m(...) __riscv_vsoxseg3ei32_v_i32m1_m(__VA_ARGS__)
10665
#define vsoxseg4ei32_v_i32m1_m(...) __riscv_vsoxseg4ei32_v_i32m1_m(__VA_ARGS__)
10666
#define vsoxseg5ei32_v_i32m1_m(...) __riscv_vsoxseg5ei32_v_i32m1_m(__VA_ARGS__)
10667
#define vsoxseg6ei32_v_i32m1_m(...) __riscv_vsoxseg6ei32_v_i32m1_m(__VA_ARGS__)
10668
#define vsoxseg7ei32_v_i32m1_m(...) __riscv_vsoxseg7ei32_v_i32m1_m(__VA_ARGS__)
10669
#define vsoxseg8ei32_v_i32m1_m(...) __riscv_vsoxseg8ei32_v_i32m1_m(__VA_ARGS__)
10670
#define vsoxseg2ei32_v_i32m2_m(...) __riscv_vsoxseg2ei32_v_i32m2_m(__VA_ARGS__)
10671
#define vsoxseg3ei32_v_i32m2_m(...) __riscv_vsoxseg3ei32_v_i32m2_m(__VA_ARGS__)
10672
#define vsoxseg4ei32_v_i32m2_m(...) __riscv_vsoxseg4ei32_v_i32m2_m(__VA_ARGS__)
10673
#define vsoxseg2ei32_v_i32m4_m(...) __riscv_vsoxseg2ei32_v_i32m4_m(__VA_ARGS__)
10674
#define vsoxseg2ei64_v_i32mf2_m(...) __riscv_vsoxseg2ei64_v_i32mf2_m(__VA_ARGS__)
10675
#define vsoxseg3ei64_v_i32mf2_m(...) __riscv_vsoxseg3ei64_v_i32mf2_m(__VA_ARGS__)
10676
#define vsoxseg4ei64_v_i32mf2_m(...) __riscv_vsoxseg4ei64_v_i32mf2_m(__VA_ARGS__)
10677
#define vsoxseg5ei64_v_i32mf2_m(...) __riscv_vsoxseg5ei64_v_i32mf2_m(__VA_ARGS__)
10678
#define vsoxseg6ei64_v_i32mf2_m(...) __riscv_vsoxseg6ei64_v_i32mf2_m(__VA_ARGS__)
10679
#define vsoxseg7ei64_v_i32mf2_m(...) __riscv_vsoxseg7ei64_v_i32mf2_m(__VA_ARGS__)
10680
#define vsoxseg8ei64_v_i32mf2_m(...) __riscv_vsoxseg8ei64_v_i32mf2_m(__VA_ARGS__)
10681
#define vsoxseg2ei64_v_i32m1_m(...) __riscv_vsoxseg2ei64_v_i32m1_m(__VA_ARGS__)
10682
#define vsoxseg3ei64_v_i32m1_m(...) __riscv_vsoxseg3ei64_v_i32m1_m(__VA_ARGS__)
10683
#define vsoxseg4ei64_v_i32m1_m(...) __riscv_vsoxseg4ei64_v_i32m1_m(__VA_ARGS__)
10684
#define vsoxseg5ei64_v_i32m1_m(...) __riscv_vsoxseg5ei64_v_i32m1_m(__VA_ARGS__)
10685
#define vsoxseg6ei64_v_i32m1_m(...) __riscv_vsoxseg6ei64_v_i32m1_m(__VA_ARGS__)
10686
#define vsoxseg7ei64_v_i32m1_m(...) __riscv_vsoxseg7ei64_v_i32m1_m(__VA_ARGS__)
10687
#define vsoxseg8ei64_v_i32m1_m(...) __riscv_vsoxseg8ei64_v_i32m1_m(__VA_ARGS__)
10688
#define vsoxseg2ei64_v_i32m2_m(...) __riscv_vsoxseg2ei64_v_i32m2_m(__VA_ARGS__)
10689
#define vsoxseg3ei64_v_i32m2_m(...) __riscv_vsoxseg3ei64_v_i32m2_m(__VA_ARGS__)
10690
#define vsoxseg4ei64_v_i32m2_m(...) __riscv_vsoxseg4ei64_v_i32m2_m(__VA_ARGS__)
10691
#define vsoxseg2ei64_v_i32m4_m(...) __riscv_vsoxseg2ei64_v_i32m4_m(__VA_ARGS__)
10692
#define vsoxseg2ei8_v_i64m1_m(...) __riscv_vsoxseg2ei8_v_i64m1_m(__VA_ARGS__)
10693
#define vsoxseg3ei8_v_i64m1_m(...) __riscv_vsoxseg3ei8_v_i64m1_m(__VA_ARGS__)
10694
#define vsoxseg4ei8_v_i64m1_m(...) __riscv_vsoxseg4ei8_v_i64m1_m(__VA_ARGS__)
10695
#define vsoxseg5ei8_v_i64m1_m(...) __riscv_vsoxseg5ei8_v_i64m1_m(__VA_ARGS__)
10696
#define vsoxseg6ei8_v_i64m1_m(...) __riscv_vsoxseg6ei8_v_i64m1_m(__VA_ARGS__)
10697
#define vsoxseg7ei8_v_i64m1_m(...) __riscv_vsoxseg7ei8_v_i64m1_m(__VA_ARGS__)
10698
#define vsoxseg8ei8_v_i64m1_m(...) __riscv_vsoxseg8ei8_v_i64m1_m(__VA_ARGS__)
10699
#define vsoxseg2ei8_v_i64m2_m(...) __riscv_vsoxseg2ei8_v_i64m2_m(__VA_ARGS__)
10700
#define vsoxseg3ei8_v_i64m2_m(...) __riscv_vsoxseg3ei8_v_i64m2_m(__VA_ARGS__)
10701
#define vsoxseg4ei8_v_i64m2_m(...) __riscv_vsoxseg4ei8_v_i64m2_m(__VA_ARGS__)
10702
#define vsoxseg2ei8_v_i64m4_m(...) __riscv_vsoxseg2ei8_v_i64m4_m(__VA_ARGS__)
10703
#define vsoxseg2ei16_v_i64m1_m(...) __riscv_vsoxseg2ei16_v_i64m1_m(__VA_ARGS__)
10704
#define vsoxseg3ei16_v_i64m1_m(...) __riscv_vsoxseg3ei16_v_i64m1_m(__VA_ARGS__)
10705
#define vsoxseg4ei16_v_i64m1_m(...) __riscv_vsoxseg4ei16_v_i64m1_m(__VA_ARGS__)
10706
#define vsoxseg5ei16_v_i64m1_m(...) __riscv_vsoxseg5ei16_v_i64m1_m(__VA_ARGS__)
10707
#define vsoxseg6ei16_v_i64m1_m(...) __riscv_vsoxseg6ei16_v_i64m1_m(__VA_ARGS__)
10708
#define vsoxseg7ei16_v_i64m1_m(...) __riscv_vsoxseg7ei16_v_i64m1_m(__VA_ARGS__)
10709
#define vsoxseg8ei16_v_i64m1_m(...) __riscv_vsoxseg8ei16_v_i64m1_m(__VA_ARGS__)
10710
#define vsoxseg2ei16_v_i64m2_m(...) __riscv_vsoxseg2ei16_v_i64m2_m(__VA_ARGS__)
10711
#define vsoxseg3ei16_v_i64m2_m(...) __riscv_vsoxseg3ei16_v_i64m2_m(__VA_ARGS__)
10712
#define vsoxseg4ei16_v_i64m2_m(...) __riscv_vsoxseg4ei16_v_i64m2_m(__VA_ARGS__)
10713
#define vsoxseg2ei16_v_i64m4_m(...) __riscv_vsoxseg2ei16_v_i64m4_m(__VA_ARGS__)
10714
#define vsoxseg2ei32_v_i64m1_m(...) __riscv_vsoxseg2ei32_v_i64m1_m(__VA_ARGS__)
10715
#define vsoxseg3ei32_v_i64m1_m(...) __riscv_vsoxseg3ei32_v_i64m1_m(__VA_ARGS__)
10716
#define vsoxseg4ei32_v_i64m1_m(...) __riscv_vsoxseg4ei32_v_i64m1_m(__VA_ARGS__)
10717
#define vsoxseg5ei32_v_i64m1_m(...) __riscv_vsoxseg5ei32_v_i64m1_m(__VA_ARGS__)
10718
#define vsoxseg6ei32_v_i64m1_m(...) __riscv_vsoxseg6ei32_v_i64m1_m(__VA_ARGS__)
10719
#define vsoxseg7ei32_v_i64m1_m(...) __riscv_vsoxseg7ei32_v_i64m1_m(__VA_ARGS__)
10720
#define vsoxseg8ei32_v_i64m1_m(...) __riscv_vsoxseg8ei32_v_i64m1_m(__VA_ARGS__)
10721
#define vsoxseg2ei32_v_i64m2_m(...) __riscv_vsoxseg2ei32_v_i64m2_m(__VA_ARGS__)
10722
#define vsoxseg3ei32_v_i64m2_m(...) __riscv_vsoxseg3ei32_v_i64m2_m(__VA_ARGS__)
10723
#define vsoxseg4ei32_v_i64m2_m(...) __riscv_vsoxseg4ei32_v_i64m2_m(__VA_ARGS__)
10724
#define vsoxseg2ei32_v_i64m4_m(...) __riscv_vsoxseg2ei32_v_i64m4_m(__VA_ARGS__)
10725
#define vsoxseg2ei64_v_i64m1_m(...) __riscv_vsoxseg2ei64_v_i64m1_m(__VA_ARGS__)
10726
#define vsoxseg3ei64_v_i64m1_m(...) __riscv_vsoxseg3ei64_v_i64m1_m(__VA_ARGS__)
10727
#define vsoxseg4ei64_v_i64m1_m(...) __riscv_vsoxseg4ei64_v_i64m1_m(__VA_ARGS__)
10728
#define vsoxseg5ei64_v_i64m1_m(...) __riscv_vsoxseg5ei64_v_i64m1_m(__VA_ARGS__)
10729
#define vsoxseg6ei64_v_i64m1_m(...) __riscv_vsoxseg6ei64_v_i64m1_m(__VA_ARGS__)
10730
#define vsoxseg7ei64_v_i64m1_m(...) __riscv_vsoxseg7ei64_v_i64m1_m(__VA_ARGS__)
10731
#define vsoxseg8ei64_v_i64m1_m(...) __riscv_vsoxseg8ei64_v_i64m1_m(__VA_ARGS__)
10732
#define vsoxseg2ei64_v_i64m2_m(...) __riscv_vsoxseg2ei64_v_i64m2_m(__VA_ARGS__)
10733
#define vsoxseg3ei64_v_i64m2_m(...) __riscv_vsoxseg3ei64_v_i64m2_m(__VA_ARGS__)
10734
#define vsoxseg4ei64_v_i64m2_m(...) __riscv_vsoxseg4ei64_v_i64m2_m(__VA_ARGS__)
10735
#define vsoxseg2ei64_v_i64m4_m(...) __riscv_vsoxseg2ei64_v_i64m4_m(__VA_ARGS__)
10736
#define vsuxseg2ei8_v_i8mf8_m(...) __riscv_vsuxseg2ei8_v_i8mf8_m(__VA_ARGS__)
10737
#define vsuxseg3ei8_v_i8mf8_m(...) __riscv_vsuxseg3ei8_v_i8mf8_m(__VA_ARGS__)
10738
#define vsuxseg4ei8_v_i8mf8_m(...) __riscv_vsuxseg4ei8_v_i8mf8_m(__VA_ARGS__)
10739
#define vsuxseg5ei8_v_i8mf8_m(...) __riscv_vsuxseg5ei8_v_i8mf8_m(__VA_ARGS__)
10740
#define vsuxseg6ei8_v_i8mf8_m(...) __riscv_vsuxseg6ei8_v_i8mf8_m(__VA_ARGS__)
10741
#define vsuxseg7ei8_v_i8mf8_m(...) __riscv_vsuxseg7ei8_v_i8mf8_m(__VA_ARGS__)
10742
#define vsuxseg8ei8_v_i8mf8_m(...) __riscv_vsuxseg8ei8_v_i8mf8_m(__VA_ARGS__)
10743
#define vsuxseg2ei8_v_i8mf4_m(...) __riscv_vsuxseg2ei8_v_i8mf4_m(__VA_ARGS__)
10744
#define vsuxseg3ei8_v_i8mf4_m(...) __riscv_vsuxseg3ei8_v_i8mf4_m(__VA_ARGS__)
10745
#define vsuxseg4ei8_v_i8mf4_m(...) __riscv_vsuxseg4ei8_v_i8mf4_m(__VA_ARGS__)
10746
#define vsuxseg5ei8_v_i8mf4_m(...) __riscv_vsuxseg5ei8_v_i8mf4_m(__VA_ARGS__)
10747
#define vsuxseg6ei8_v_i8mf4_m(...) __riscv_vsuxseg6ei8_v_i8mf4_m(__VA_ARGS__)
10748
#define vsuxseg7ei8_v_i8mf4_m(...) __riscv_vsuxseg7ei8_v_i8mf4_m(__VA_ARGS__)
10749
#define vsuxseg8ei8_v_i8mf4_m(...) __riscv_vsuxseg8ei8_v_i8mf4_m(__VA_ARGS__)
10750
#define vsuxseg2ei8_v_i8mf2_m(...) __riscv_vsuxseg2ei8_v_i8mf2_m(__VA_ARGS__)
10751
#define vsuxseg3ei8_v_i8mf2_m(...) __riscv_vsuxseg3ei8_v_i8mf2_m(__VA_ARGS__)
10752
#define vsuxseg4ei8_v_i8mf2_m(...) __riscv_vsuxseg4ei8_v_i8mf2_m(__VA_ARGS__)
10753
#define vsuxseg5ei8_v_i8mf2_m(...) __riscv_vsuxseg5ei8_v_i8mf2_m(__VA_ARGS__)
10754
#define vsuxseg6ei8_v_i8mf2_m(...) __riscv_vsuxseg6ei8_v_i8mf2_m(__VA_ARGS__)
10755
#define vsuxseg7ei8_v_i8mf2_m(...) __riscv_vsuxseg7ei8_v_i8mf2_m(__VA_ARGS__)
10756
#define vsuxseg8ei8_v_i8mf2_m(...) __riscv_vsuxseg8ei8_v_i8mf2_m(__VA_ARGS__)
10757
#define vsuxseg2ei8_v_i8m1_m(...) __riscv_vsuxseg2ei8_v_i8m1_m(__VA_ARGS__)
10758
#define vsuxseg3ei8_v_i8m1_m(...) __riscv_vsuxseg3ei8_v_i8m1_m(__VA_ARGS__)
10759
#define vsuxseg4ei8_v_i8m1_m(...) __riscv_vsuxseg4ei8_v_i8m1_m(__VA_ARGS__)
10760
#define vsuxseg5ei8_v_i8m1_m(...) __riscv_vsuxseg5ei8_v_i8m1_m(__VA_ARGS__)
10761
#define vsuxseg6ei8_v_i8m1_m(...) __riscv_vsuxseg6ei8_v_i8m1_m(__VA_ARGS__)
10762
#define vsuxseg7ei8_v_i8m1_m(...) __riscv_vsuxseg7ei8_v_i8m1_m(__VA_ARGS__)
10763
#define vsuxseg8ei8_v_i8m1_m(...) __riscv_vsuxseg8ei8_v_i8m1_m(__VA_ARGS__)
10764
#define vsuxseg2ei8_v_i8m2_m(...) __riscv_vsuxseg2ei8_v_i8m2_m(__VA_ARGS__)
10765
#define vsuxseg3ei8_v_i8m2_m(...) __riscv_vsuxseg3ei8_v_i8m2_m(__VA_ARGS__)
10766
#define vsuxseg4ei8_v_i8m2_m(...) __riscv_vsuxseg4ei8_v_i8m2_m(__VA_ARGS__)
10767
#define vsuxseg2ei8_v_i8m4_m(...) __riscv_vsuxseg2ei8_v_i8m4_m(__VA_ARGS__)
10768
#define vsuxseg2ei16_v_i8mf8_m(...) __riscv_vsuxseg2ei16_v_i8mf8_m(__VA_ARGS__)
10769
#define vsuxseg3ei16_v_i8mf8_m(...) __riscv_vsuxseg3ei16_v_i8mf8_m(__VA_ARGS__)
10770
#define vsuxseg4ei16_v_i8mf8_m(...) __riscv_vsuxseg4ei16_v_i8mf8_m(__VA_ARGS__)
10771
#define vsuxseg5ei16_v_i8mf8_m(...) __riscv_vsuxseg5ei16_v_i8mf8_m(__VA_ARGS__)
10772
#define vsuxseg6ei16_v_i8mf8_m(...) __riscv_vsuxseg6ei16_v_i8mf8_m(__VA_ARGS__)
10773
#define vsuxseg7ei16_v_i8mf8_m(...) __riscv_vsuxseg7ei16_v_i8mf8_m(__VA_ARGS__)
10774
#define vsuxseg8ei16_v_i8mf8_m(...) __riscv_vsuxseg8ei16_v_i8mf8_m(__VA_ARGS__)
10775
#define vsuxseg2ei16_v_i8mf4_m(...) __riscv_vsuxseg2ei16_v_i8mf4_m(__VA_ARGS__)
10776
#define vsuxseg3ei16_v_i8mf4_m(...) __riscv_vsuxseg3ei16_v_i8mf4_m(__VA_ARGS__)
10777
#define vsuxseg4ei16_v_i8mf4_m(...) __riscv_vsuxseg4ei16_v_i8mf4_m(__VA_ARGS__)
10778
#define vsuxseg5ei16_v_i8mf4_m(...) __riscv_vsuxseg5ei16_v_i8mf4_m(__VA_ARGS__)
10779
#define vsuxseg6ei16_v_i8mf4_m(...) __riscv_vsuxseg6ei16_v_i8mf4_m(__VA_ARGS__)
10780
#define vsuxseg7ei16_v_i8mf4_m(...) __riscv_vsuxseg7ei16_v_i8mf4_m(__VA_ARGS__)
10781
#define vsuxseg8ei16_v_i8mf4_m(...) __riscv_vsuxseg8ei16_v_i8mf4_m(__VA_ARGS__)
10782
#define vsuxseg2ei16_v_i8mf2_m(...) __riscv_vsuxseg2ei16_v_i8mf2_m(__VA_ARGS__)
10783
#define vsuxseg3ei16_v_i8mf2_m(...) __riscv_vsuxseg3ei16_v_i8mf2_m(__VA_ARGS__)
10784
#define vsuxseg4ei16_v_i8mf2_m(...) __riscv_vsuxseg4ei16_v_i8mf2_m(__VA_ARGS__)
10785
#define vsuxseg5ei16_v_i8mf2_m(...) __riscv_vsuxseg5ei16_v_i8mf2_m(__VA_ARGS__)
10786
#define vsuxseg6ei16_v_i8mf2_m(...) __riscv_vsuxseg6ei16_v_i8mf2_m(__VA_ARGS__)
10787
#define vsuxseg7ei16_v_i8mf2_m(...) __riscv_vsuxseg7ei16_v_i8mf2_m(__VA_ARGS__)
10788
#define vsuxseg8ei16_v_i8mf2_m(...) __riscv_vsuxseg8ei16_v_i8mf2_m(__VA_ARGS__)
10789
#define vsuxseg2ei16_v_i8m1_m(...) __riscv_vsuxseg2ei16_v_i8m1_m(__VA_ARGS__)
10790
#define vsuxseg3ei16_v_i8m1_m(...) __riscv_vsuxseg3ei16_v_i8m1_m(__VA_ARGS__)
10791
#define vsuxseg4ei16_v_i8m1_m(...) __riscv_vsuxseg4ei16_v_i8m1_m(__VA_ARGS__)
10792
#define vsuxseg5ei16_v_i8m1_m(...) __riscv_vsuxseg5ei16_v_i8m1_m(__VA_ARGS__)
10793
#define vsuxseg6ei16_v_i8m1_m(...) __riscv_vsuxseg6ei16_v_i8m1_m(__VA_ARGS__)
10794
#define vsuxseg7ei16_v_i8m1_m(...) __riscv_vsuxseg7ei16_v_i8m1_m(__VA_ARGS__)
10795
#define vsuxseg8ei16_v_i8m1_m(...) __riscv_vsuxseg8ei16_v_i8m1_m(__VA_ARGS__)
10796
#define vsuxseg2ei16_v_i8m2_m(...) __riscv_vsuxseg2ei16_v_i8m2_m(__VA_ARGS__)
10797
#define vsuxseg3ei16_v_i8m2_m(...) __riscv_vsuxseg3ei16_v_i8m2_m(__VA_ARGS__)
10798
#define vsuxseg4ei16_v_i8m2_m(...) __riscv_vsuxseg4ei16_v_i8m2_m(__VA_ARGS__)
10799
#define vsuxseg2ei16_v_i8m4_m(...) __riscv_vsuxseg2ei16_v_i8m4_m(__VA_ARGS__)
10800
#define vsuxseg2ei32_v_i8mf8_m(...) __riscv_vsuxseg2ei32_v_i8mf8_m(__VA_ARGS__)
10801
#define vsuxseg3ei32_v_i8mf8_m(...) __riscv_vsuxseg3ei32_v_i8mf8_m(__VA_ARGS__)
10802
#define vsuxseg4ei32_v_i8mf8_m(...) __riscv_vsuxseg4ei32_v_i8mf8_m(__VA_ARGS__)
10803
#define vsuxseg5ei32_v_i8mf8_m(...) __riscv_vsuxseg5ei32_v_i8mf8_m(__VA_ARGS__)
10804
#define vsuxseg6ei32_v_i8mf8_m(...) __riscv_vsuxseg6ei32_v_i8mf8_m(__VA_ARGS__)
10805
#define vsuxseg7ei32_v_i8mf8_m(...) __riscv_vsuxseg7ei32_v_i8mf8_m(__VA_ARGS__)
10806
#define vsuxseg8ei32_v_i8mf8_m(...) __riscv_vsuxseg8ei32_v_i8mf8_m(__VA_ARGS__)
10807
#define vsuxseg2ei32_v_i8mf4_m(...) __riscv_vsuxseg2ei32_v_i8mf4_m(__VA_ARGS__)
10808
#define vsuxseg3ei32_v_i8mf4_m(...) __riscv_vsuxseg3ei32_v_i8mf4_m(__VA_ARGS__)
10809
#define vsuxseg4ei32_v_i8mf4_m(...) __riscv_vsuxseg4ei32_v_i8mf4_m(__VA_ARGS__)
10810
#define vsuxseg5ei32_v_i8mf4_m(...) __riscv_vsuxseg5ei32_v_i8mf4_m(__VA_ARGS__)
10811
#define vsuxseg6ei32_v_i8mf4_m(...) __riscv_vsuxseg6ei32_v_i8mf4_m(__VA_ARGS__)
10812
#define vsuxseg7ei32_v_i8mf4_m(...) __riscv_vsuxseg7ei32_v_i8mf4_m(__VA_ARGS__)
10813
#define vsuxseg8ei32_v_i8mf4_m(...) __riscv_vsuxseg8ei32_v_i8mf4_m(__VA_ARGS__)
10814
#define vsuxseg2ei32_v_i8mf2_m(...) __riscv_vsuxseg2ei32_v_i8mf2_m(__VA_ARGS__)
10815
#define vsuxseg3ei32_v_i8mf2_m(...) __riscv_vsuxseg3ei32_v_i8mf2_m(__VA_ARGS__)
10816
#define vsuxseg4ei32_v_i8mf2_m(...) __riscv_vsuxseg4ei32_v_i8mf2_m(__VA_ARGS__)
10817
#define vsuxseg5ei32_v_i8mf2_m(...) __riscv_vsuxseg5ei32_v_i8mf2_m(__VA_ARGS__)
10818
#define vsuxseg6ei32_v_i8mf2_m(...) __riscv_vsuxseg6ei32_v_i8mf2_m(__VA_ARGS__)
10819
#define vsuxseg7ei32_v_i8mf2_m(...) __riscv_vsuxseg7ei32_v_i8mf2_m(__VA_ARGS__)
10820
#define vsuxseg8ei32_v_i8mf2_m(...) __riscv_vsuxseg8ei32_v_i8mf2_m(__VA_ARGS__)
10821
#define vsuxseg2ei32_v_i8m1_m(...) __riscv_vsuxseg2ei32_v_i8m1_m(__VA_ARGS__)
10822
#define vsuxseg3ei32_v_i8m1_m(...) __riscv_vsuxseg3ei32_v_i8m1_m(__VA_ARGS__)
10823
#define vsuxseg4ei32_v_i8m1_m(...) __riscv_vsuxseg4ei32_v_i8m1_m(__VA_ARGS__)
10824
#define vsuxseg5ei32_v_i8m1_m(...) __riscv_vsuxseg5ei32_v_i8m1_m(__VA_ARGS__)
10825
#define vsuxseg6ei32_v_i8m1_m(...) __riscv_vsuxseg6ei32_v_i8m1_m(__VA_ARGS__)
10826
#define vsuxseg7ei32_v_i8m1_m(...) __riscv_vsuxseg7ei32_v_i8m1_m(__VA_ARGS__)
10827
#define vsuxseg8ei32_v_i8m1_m(...) __riscv_vsuxseg8ei32_v_i8m1_m(__VA_ARGS__)
10828
#define vsuxseg2ei32_v_i8m2_m(...) __riscv_vsuxseg2ei32_v_i8m2_m(__VA_ARGS__)
10829
#define vsuxseg3ei32_v_i8m2_m(...) __riscv_vsuxseg3ei32_v_i8m2_m(__VA_ARGS__)
10830
#define vsuxseg4ei32_v_i8m2_m(...) __riscv_vsuxseg4ei32_v_i8m2_m(__VA_ARGS__)
10831
#define vsuxseg2ei64_v_i8mf8_m(...) __riscv_vsuxseg2ei64_v_i8mf8_m(__VA_ARGS__)
10832
#define vsuxseg3ei64_v_i8mf8_m(...) __riscv_vsuxseg3ei64_v_i8mf8_m(__VA_ARGS__)
10833
#define vsuxseg4ei64_v_i8mf8_m(...) __riscv_vsuxseg4ei64_v_i8mf8_m(__VA_ARGS__)
10834
#define vsuxseg5ei64_v_i8mf8_m(...) __riscv_vsuxseg5ei64_v_i8mf8_m(__VA_ARGS__)
10835
#define vsuxseg6ei64_v_i8mf8_m(...) __riscv_vsuxseg6ei64_v_i8mf8_m(__VA_ARGS__)
10836
#define vsuxseg7ei64_v_i8mf8_m(...) __riscv_vsuxseg7ei64_v_i8mf8_m(__VA_ARGS__)
10837
#define vsuxseg8ei64_v_i8mf8_m(...) __riscv_vsuxseg8ei64_v_i8mf8_m(__VA_ARGS__)
10838
#define vsuxseg2ei64_v_i8mf4_m(...) __riscv_vsuxseg2ei64_v_i8mf4_m(__VA_ARGS__)
10839
#define vsuxseg3ei64_v_i8mf4_m(...) __riscv_vsuxseg3ei64_v_i8mf4_m(__VA_ARGS__)
10840
#define vsuxseg4ei64_v_i8mf4_m(...) __riscv_vsuxseg4ei64_v_i8mf4_m(__VA_ARGS__)
10841
#define vsuxseg5ei64_v_i8mf4_m(...) __riscv_vsuxseg5ei64_v_i8mf4_m(__VA_ARGS__)
10842
#define vsuxseg6ei64_v_i8mf4_m(...) __riscv_vsuxseg6ei64_v_i8mf4_m(__VA_ARGS__)
10843
#define vsuxseg7ei64_v_i8mf4_m(...) __riscv_vsuxseg7ei64_v_i8mf4_m(__VA_ARGS__)
10844
#define vsuxseg8ei64_v_i8mf4_m(...) __riscv_vsuxseg8ei64_v_i8mf4_m(__VA_ARGS__)
10845
#define vsuxseg2ei64_v_i8mf2_m(...) __riscv_vsuxseg2ei64_v_i8mf2_m(__VA_ARGS__)
10846
#define vsuxseg3ei64_v_i8mf2_m(...) __riscv_vsuxseg3ei64_v_i8mf2_m(__VA_ARGS__)
10847
#define vsuxseg4ei64_v_i8mf2_m(...) __riscv_vsuxseg4ei64_v_i8mf2_m(__VA_ARGS__)
10848
#define vsuxseg5ei64_v_i8mf2_m(...) __riscv_vsuxseg5ei64_v_i8mf2_m(__VA_ARGS__)
10849
#define vsuxseg6ei64_v_i8mf2_m(...) __riscv_vsuxseg6ei64_v_i8mf2_m(__VA_ARGS__)
10850
#define vsuxseg7ei64_v_i8mf2_m(...) __riscv_vsuxseg7ei64_v_i8mf2_m(__VA_ARGS__)
10851
#define vsuxseg8ei64_v_i8mf2_m(...) __riscv_vsuxseg8ei64_v_i8mf2_m(__VA_ARGS__)
10852
#define vsuxseg2ei64_v_i8m1_m(...) __riscv_vsuxseg2ei64_v_i8m1_m(__VA_ARGS__)
10853
#define vsuxseg3ei64_v_i8m1_m(...) __riscv_vsuxseg3ei64_v_i8m1_m(__VA_ARGS__)
10854
#define vsuxseg4ei64_v_i8m1_m(...) __riscv_vsuxseg4ei64_v_i8m1_m(__VA_ARGS__)
10855
#define vsuxseg5ei64_v_i8m1_m(...) __riscv_vsuxseg5ei64_v_i8m1_m(__VA_ARGS__)
10856
#define vsuxseg6ei64_v_i8m1_m(...) __riscv_vsuxseg6ei64_v_i8m1_m(__VA_ARGS__)
10857
#define vsuxseg7ei64_v_i8m1_m(...) __riscv_vsuxseg7ei64_v_i8m1_m(__VA_ARGS__)
10858
#define vsuxseg8ei64_v_i8m1_m(...) __riscv_vsuxseg8ei64_v_i8m1_m(__VA_ARGS__)
10859
#define vsuxseg2ei8_v_i16mf4_m(...) __riscv_vsuxseg2ei8_v_i16mf4_m(__VA_ARGS__)
10860
#define vsuxseg3ei8_v_i16mf4_m(...) __riscv_vsuxseg3ei8_v_i16mf4_m(__VA_ARGS__)
10861
#define vsuxseg4ei8_v_i16mf4_m(...) __riscv_vsuxseg4ei8_v_i16mf4_m(__VA_ARGS__)
10862
#define vsuxseg5ei8_v_i16mf4_m(...) __riscv_vsuxseg5ei8_v_i16mf4_m(__VA_ARGS__)
10863
#define vsuxseg6ei8_v_i16mf4_m(...) __riscv_vsuxseg6ei8_v_i16mf4_m(__VA_ARGS__)
10864
#define vsuxseg7ei8_v_i16mf4_m(...) __riscv_vsuxseg7ei8_v_i16mf4_m(__VA_ARGS__)
10865
#define vsuxseg8ei8_v_i16mf4_m(...) __riscv_vsuxseg8ei8_v_i16mf4_m(__VA_ARGS__)
10866
#define vsuxseg2ei8_v_i16mf2_m(...) __riscv_vsuxseg2ei8_v_i16mf2_m(__VA_ARGS__)
10867
#define vsuxseg3ei8_v_i16mf2_m(...) __riscv_vsuxseg3ei8_v_i16mf2_m(__VA_ARGS__)
10868
#define vsuxseg4ei8_v_i16mf2_m(...) __riscv_vsuxseg4ei8_v_i16mf2_m(__VA_ARGS__)
10869
#define vsuxseg5ei8_v_i16mf2_m(...) __riscv_vsuxseg5ei8_v_i16mf2_m(__VA_ARGS__)
10870
#define vsuxseg6ei8_v_i16mf2_m(...) __riscv_vsuxseg6ei8_v_i16mf2_m(__VA_ARGS__)
10871
#define vsuxseg7ei8_v_i16mf2_m(...) __riscv_vsuxseg7ei8_v_i16mf2_m(__VA_ARGS__)
10872
#define vsuxseg8ei8_v_i16mf2_m(...) __riscv_vsuxseg8ei8_v_i16mf2_m(__VA_ARGS__)
10873
#define vsuxseg2ei8_v_i16m1_m(...) __riscv_vsuxseg2ei8_v_i16m1_m(__VA_ARGS__)
10874
#define vsuxseg3ei8_v_i16m1_m(...) __riscv_vsuxseg3ei8_v_i16m1_m(__VA_ARGS__)
10875
#define vsuxseg4ei8_v_i16m1_m(...) __riscv_vsuxseg4ei8_v_i16m1_m(__VA_ARGS__)
10876
#define vsuxseg5ei8_v_i16m1_m(...) __riscv_vsuxseg5ei8_v_i16m1_m(__VA_ARGS__)
10877
#define vsuxseg6ei8_v_i16m1_m(...) __riscv_vsuxseg6ei8_v_i16m1_m(__VA_ARGS__)
10878
#define vsuxseg7ei8_v_i16m1_m(...) __riscv_vsuxseg7ei8_v_i16m1_m(__VA_ARGS__)
10879
#define vsuxseg8ei8_v_i16m1_m(...) __riscv_vsuxseg8ei8_v_i16m1_m(__VA_ARGS__)
10880
#define vsuxseg2ei8_v_i16m2_m(...) __riscv_vsuxseg2ei8_v_i16m2_m(__VA_ARGS__)
10881
#define vsuxseg3ei8_v_i16m2_m(...) __riscv_vsuxseg3ei8_v_i16m2_m(__VA_ARGS__)
10882
#define vsuxseg4ei8_v_i16m2_m(...) __riscv_vsuxseg4ei8_v_i16m2_m(__VA_ARGS__)
10883
#define vsuxseg2ei8_v_i16m4_m(...) __riscv_vsuxseg2ei8_v_i16m4_m(__VA_ARGS__)
10884
#define vsuxseg2ei16_v_i16mf4_m(...) __riscv_vsuxseg2ei16_v_i16mf4_m(__VA_ARGS__)
10885
#define vsuxseg3ei16_v_i16mf4_m(...) __riscv_vsuxseg3ei16_v_i16mf4_m(__VA_ARGS__)
10886
#define vsuxseg4ei16_v_i16mf4_m(...) __riscv_vsuxseg4ei16_v_i16mf4_m(__VA_ARGS__)
10887
#define vsuxseg5ei16_v_i16mf4_m(...) __riscv_vsuxseg5ei16_v_i16mf4_m(__VA_ARGS__)
10888
#define vsuxseg6ei16_v_i16mf4_m(...) __riscv_vsuxseg6ei16_v_i16mf4_m(__VA_ARGS__)
10889
#define vsuxseg7ei16_v_i16mf4_m(...) __riscv_vsuxseg7ei16_v_i16mf4_m(__VA_ARGS__)
10890
#define vsuxseg8ei16_v_i16mf4_m(...) __riscv_vsuxseg8ei16_v_i16mf4_m(__VA_ARGS__)
10891
#define vsuxseg2ei16_v_i16mf2_m(...) __riscv_vsuxseg2ei16_v_i16mf2_m(__VA_ARGS__)
10892
#define vsuxseg3ei16_v_i16mf2_m(...) __riscv_vsuxseg3ei16_v_i16mf2_m(__VA_ARGS__)
10893
#define vsuxseg4ei16_v_i16mf2_m(...) __riscv_vsuxseg4ei16_v_i16mf2_m(__VA_ARGS__)
10894
#define vsuxseg5ei16_v_i16mf2_m(...) __riscv_vsuxseg5ei16_v_i16mf2_m(__VA_ARGS__)
10895
#define vsuxseg6ei16_v_i16mf2_m(...) __riscv_vsuxseg6ei16_v_i16mf2_m(__VA_ARGS__)
10896
#define vsuxseg7ei16_v_i16mf2_m(...) __riscv_vsuxseg7ei16_v_i16mf2_m(__VA_ARGS__)
10897
#define vsuxseg8ei16_v_i16mf2_m(...) __riscv_vsuxseg8ei16_v_i16mf2_m(__VA_ARGS__)
10898
#define vsuxseg2ei16_v_i16m1_m(...) __riscv_vsuxseg2ei16_v_i16m1_m(__VA_ARGS__)
10899
#define vsuxseg3ei16_v_i16m1_m(...) __riscv_vsuxseg3ei16_v_i16m1_m(__VA_ARGS__)
10900
#define vsuxseg4ei16_v_i16m1_m(...) __riscv_vsuxseg4ei16_v_i16m1_m(__VA_ARGS__)
10901
#define vsuxseg5ei16_v_i16m1_m(...) __riscv_vsuxseg5ei16_v_i16m1_m(__VA_ARGS__)
10902
#define vsuxseg6ei16_v_i16m1_m(...) __riscv_vsuxseg6ei16_v_i16m1_m(__VA_ARGS__)
10903
#define vsuxseg7ei16_v_i16m1_m(...) __riscv_vsuxseg7ei16_v_i16m1_m(__VA_ARGS__)
10904
#define vsuxseg8ei16_v_i16m1_m(...) __riscv_vsuxseg8ei16_v_i16m1_m(__VA_ARGS__)
10905
#define vsuxseg2ei16_v_i16m2_m(...) __riscv_vsuxseg2ei16_v_i16m2_m(__VA_ARGS__)
10906
#define vsuxseg3ei16_v_i16m2_m(...) __riscv_vsuxseg3ei16_v_i16m2_m(__VA_ARGS__)
10907
#define vsuxseg4ei16_v_i16m2_m(...) __riscv_vsuxseg4ei16_v_i16m2_m(__VA_ARGS__)
10908
#define vsuxseg2ei16_v_i16m4_m(...) __riscv_vsuxseg2ei16_v_i16m4_m(__VA_ARGS__)
10909
#define vsuxseg2ei32_v_i16mf4_m(...) __riscv_vsuxseg2ei32_v_i16mf4_m(__VA_ARGS__)
10910
#define vsuxseg3ei32_v_i16mf4_m(...) __riscv_vsuxseg3ei32_v_i16mf4_m(__VA_ARGS__)
10911
#define vsuxseg4ei32_v_i16mf4_m(...) __riscv_vsuxseg4ei32_v_i16mf4_m(__VA_ARGS__)
10912
#define vsuxseg5ei32_v_i16mf4_m(...) __riscv_vsuxseg5ei32_v_i16mf4_m(__VA_ARGS__)
10913
#define vsuxseg6ei32_v_i16mf4_m(...) __riscv_vsuxseg6ei32_v_i16mf4_m(__VA_ARGS__)
10914
#define vsuxseg7ei32_v_i16mf4_m(...) __riscv_vsuxseg7ei32_v_i16mf4_m(__VA_ARGS__)
10915
#define vsuxseg8ei32_v_i16mf4_m(...) __riscv_vsuxseg8ei32_v_i16mf4_m(__VA_ARGS__)
10916
#define vsuxseg2ei32_v_i16mf2_m(...) __riscv_vsuxseg2ei32_v_i16mf2_m(__VA_ARGS__)
10917
#define vsuxseg3ei32_v_i16mf2_m(...) __riscv_vsuxseg3ei32_v_i16mf2_m(__VA_ARGS__)
10918
#define vsuxseg4ei32_v_i16mf2_m(...) __riscv_vsuxseg4ei32_v_i16mf2_m(__VA_ARGS__)
10919
#define vsuxseg5ei32_v_i16mf2_m(...) __riscv_vsuxseg5ei32_v_i16mf2_m(__VA_ARGS__)
10920
#define vsuxseg6ei32_v_i16mf2_m(...) __riscv_vsuxseg6ei32_v_i16mf2_m(__VA_ARGS__)
10921
#define vsuxseg7ei32_v_i16mf2_m(...) __riscv_vsuxseg7ei32_v_i16mf2_m(__VA_ARGS__)
10922
#define vsuxseg8ei32_v_i16mf2_m(...) __riscv_vsuxseg8ei32_v_i16mf2_m(__VA_ARGS__)
10923
#define vsuxseg2ei32_v_i16m1_m(...) __riscv_vsuxseg2ei32_v_i16m1_m(__VA_ARGS__)
10924
#define vsuxseg3ei32_v_i16m1_m(...) __riscv_vsuxseg3ei32_v_i16m1_m(__VA_ARGS__)
10925
#define vsuxseg4ei32_v_i16m1_m(...) __riscv_vsuxseg4ei32_v_i16m1_m(__VA_ARGS__)
10926
#define vsuxseg5ei32_v_i16m1_m(...) __riscv_vsuxseg5ei32_v_i16m1_m(__VA_ARGS__)
10927
#define vsuxseg6ei32_v_i16m1_m(...) __riscv_vsuxseg6ei32_v_i16m1_m(__VA_ARGS__)
10928
#define vsuxseg7ei32_v_i16m1_m(...) __riscv_vsuxseg7ei32_v_i16m1_m(__VA_ARGS__)
10929
#define vsuxseg8ei32_v_i16m1_m(...) __riscv_vsuxseg8ei32_v_i16m1_m(__VA_ARGS__)
10930
#define vsuxseg2ei32_v_i16m2_m(...) __riscv_vsuxseg2ei32_v_i16m2_m(__VA_ARGS__)
10931
#define vsuxseg3ei32_v_i16m2_m(...) __riscv_vsuxseg3ei32_v_i16m2_m(__VA_ARGS__)
10932
#define vsuxseg4ei32_v_i16m2_m(...) __riscv_vsuxseg4ei32_v_i16m2_m(__VA_ARGS__)
10933
#define vsuxseg2ei32_v_i16m4_m(...) __riscv_vsuxseg2ei32_v_i16m4_m(__VA_ARGS__)
10934
#define vsuxseg2ei64_v_i16mf4_m(...) __riscv_vsuxseg2ei64_v_i16mf4_m(__VA_ARGS__)
10935
#define vsuxseg3ei64_v_i16mf4_m(...) __riscv_vsuxseg3ei64_v_i16mf4_m(__VA_ARGS__)
10936
#define vsuxseg4ei64_v_i16mf4_m(...) __riscv_vsuxseg4ei64_v_i16mf4_m(__VA_ARGS__)
10937
#define vsuxseg5ei64_v_i16mf4_m(...) __riscv_vsuxseg5ei64_v_i16mf4_m(__VA_ARGS__)
10938
#define vsuxseg6ei64_v_i16mf4_m(...) __riscv_vsuxseg6ei64_v_i16mf4_m(__VA_ARGS__)
10939
#define vsuxseg7ei64_v_i16mf4_m(...) __riscv_vsuxseg7ei64_v_i16mf4_m(__VA_ARGS__)
10940
#define vsuxseg8ei64_v_i16mf4_m(...) __riscv_vsuxseg8ei64_v_i16mf4_m(__VA_ARGS__)
10941
#define vsuxseg2ei64_v_i16mf2_m(...) __riscv_vsuxseg2ei64_v_i16mf2_m(__VA_ARGS__)
10942
#define vsuxseg3ei64_v_i16mf2_m(...) __riscv_vsuxseg3ei64_v_i16mf2_m(__VA_ARGS__)
10943
#define vsuxseg4ei64_v_i16mf2_m(...) __riscv_vsuxseg4ei64_v_i16mf2_m(__VA_ARGS__)
10944
#define vsuxseg5ei64_v_i16mf2_m(...) __riscv_vsuxseg5ei64_v_i16mf2_m(__VA_ARGS__)
10945
#define vsuxseg6ei64_v_i16mf2_m(...) __riscv_vsuxseg6ei64_v_i16mf2_m(__VA_ARGS__)
10946
#define vsuxseg7ei64_v_i16mf2_m(...) __riscv_vsuxseg7ei64_v_i16mf2_m(__VA_ARGS__)
10947
#define vsuxseg8ei64_v_i16mf2_m(...) __riscv_vsuxseg8ei64_v_i16mf2_m(__VA_ARGS__)
10948
#define vsuxseg2ei64_v_i16m1_m(...) __riscv_vsuxseg2ei64_v_i16m1_m(__VA_ARGS__)
10949
#define vsuxseg3ei64_v_i16m1_m(...) __riscv_vsuxseg3ei64_v_i16m1_m(__VA_ARGS__)
10950
#define vsuxseg4ei64_v_i16m1_m(...) __riscv_vsuxseg4ei64_v_i16m1_m(__VA_ARGS__)
10951
#define vsuxseg5ei64_v_i16m1_m(...) __riscv_vsuxseg5ei64_v_i16m1_m(__VA_ARGS__)
10952
#define vsuxseg6ei64_v_i16m1_m(...) __riscv_vsuxseg6ei64_v_i16m1_m(__VA_ARGS__)
10953
#define vsuxseg7ei64_v_i16m1_m(...) __riscv_vsuxseg7ei64_v_i16m1_m(__VA_ARGS__)
10954
#define vsuxseg8ei64_v_i16m1_m(...) __riscv_vsuxseg8ei64_v_i16m1_m(__VA_ARGS__)
10955
#define vsuxseg2ei64_v_i16m2_m(...) __riscv_vsuxseg2ei64_v_i16m2_m(__VA_ARGS__)
10956
#define vsuxseg3ei64_v_i16m2_m(...) __riscv_vsuxseg3ei64_v_i16m2_m(__VA_ARGS__)
10957
#define vsuxseg4ei64_v_i16m2_m(...) __riscv_vsuxseg4ei64_v_i16m2_m(__VA_ARGS__)
10958
#define vsuxseg2ei8_v_i32mf2_m(...) __riscv_vsuxseg2ei8_v_i32mf2_m(__VA_ARGS__)
10959
#define vsuxseg3ei8_v_i32mf2_m(...) __riscv_vsuxseg3ei8_v_i32mf2_m(__VA_ARGS__)
10960
#define vsuxseg4ei8_v_i32mf2_m(...) __riscv_vsuxseg4ei8_v_i32mf2_m(__VA_ARGS__)
10961
#define vsuxseg5ei8_v_i32mf2_m(...) __riscv_vsuxseg5ei8_v_i32mf2_m(__VA_ARGS__)
10962
#define vsuxseg6ei8_v_i32mf2_m(...) __riscv_vsuxseg6ei8_v_i32mf2_m(__VA_ARGS__)
10963
#define vsuxseg7ei8_v_i32mf2_m(...) __riscv_vsuxseg7ei8_v_i32mf2_m(__VA_ARGS__)
10964
#define vsuxseg8ei8_v_i32mf2_m(...) __riscv_vsuxseg8ei8_v_i32mf2_m(__VA_ARGS__)
10965
#define vsuxseg2ei8_v_i32m1_m(...) __riscv_vsuxseg2ei8_v_i32m1_m(__VA_ARGS__)
10966
#define vsuxseg3ei8_v_i32m1_m(...) __riscv_vsuxseg3ei8_v_i32m1_m(__VA_ARGS__)
10967
#define vsuxseg4ei8_v_i32m1_m(...) __riscv_vsuxseg4ei8_v_i32m1_m(__VA_ARGS__)
10968
#define vsuxseg5ei8_v_i32m1_m(...) __riscv_vsuxseg5ei8_v_i32m1_m(__VA_ARGS__)
10969
#define vsuxseg6ei8_v_i32m1_m(...) __riscv_vsuxseg6ei8_v_i32m1_m(__VA_ARGS__)
10970
#define vsuxseg7ei8_v_i32m1_m(...) __riscv_vsuxseg7ei8_v_i32m1_m(__VA_ARGS__)
10971
#define vsuxseg8ei8_v_i32m1_m(...) __riscv_vsuxseg8ei8_v_i32m1_m(__VA_ARGS__)
10972
#define vsuxseg2ei8_v_i32m2_m(...) __riscv_vsuxseg2ei8_v_i32m2_m(__VA_ARGS__)
10973
#define vsuxseg3ei8_v_i32m2_m(...) __riscv_vsuxseg3ei8_v_i32m2_m(__VA_ARGS__)
10974
#define vsuxseg4ei8_v_i32m2_m(...) __riscv_vsuxseg4ei8_v_i32m2_m(__VA_ARGS__)
10975
#define vsuxseg2ei8_v_i32m4_m(...) __riscv_vsuxseg2ei8_v_i32m4_m(__VA_ARGS__)
10976
#define vsuxseg2ei16_v_i32mf2_m(...) __riscv_vsuxseg2ei16_v_i32mf2_m(__VA_ARGS__)
10977
#define vsuxseg3ei16_v_i32mf2_m(...) __riscv_vsuxseg3ei16_v_i32mf2_m(__VA_ARGS__)
10978
#define vsuxseg4ei16_v_i32mf2_m(...) __riscv_vsuxseg4ei16_v_i32mf2_m(__VA_ARGS__)
10979
#define vsuxseg5ei16_v_i32mf2_m(...) __riscv_vsuxseg5ei16_v_i32mf2_m(__VA_ARGS__)
10980
#define vsuxseg6ei16_v_i32mf2_m(...) __riscv_vsuxseg6ei16_v_i32mf2_m(__VA_ARGS__)
10981
#define vsuxseg7ei16_v_i32mf2_m(...) __riscv_vsuxseg7ei16_v_i32mf2_m(__VA_ARGS__)
10982
#define vsuxseg8ei16_v_i32mf2_m(...) __riscv_vsuxseg8ei16_v_i32mf2_m(__VA_ARGS__)
10983
#define vsuxseg2ei16_v_i32m1_m(...) __riscv_vsuxseg2ei16_v_i32m1_m(__VA_ARGS__)
10984
#define vsuxseg3ei16_v_i32m1_m(...) __riscv_vsuxseg3ei16_v_i32m1_m(__VA_ARGS__)
10985
#define vsuxseg4ei16_v_i32m1_m(...) __riscv_vsuxseg4ei16_v_i32m1_m(__VA_ARGS__)
10986
#define vsuxseg5ei16_v_i32m1_m(...) __riscv_vsuxseg5ei16_v_i32m1_m(__VA_ARGS__)
10987
#define vsuxseg6ei16_v_i32m1_m(...) __riscv_vsuxseg6ei16_v_i32m1_m(__VA_ARGS__)
10988
#define vsuxseg7ei16_v_i32m1_m(...) __riscv_vsuxseg7ei16_v_i32m1_m(__VA_ARGS__)
10989
#define vsuxseg8ei16_v_i32m1_m(...) __riscv_vsuxseg8ei16_v_i32m1_m(__VA_ARGS__)
10990
#define vsuxseg2ei16_v_i32m2_m(...) __riscv_vsuxseg2ei16_v_i32m2_m(__VA_ARGS__)
10991
#define vsuxseg3ei16_v_i32m2_m(...) __riscv_vsuxseg3ei16_v_i32m2_m(__VA_ARGS__)
10992
#define vsuxseg4ei16_v_i32m2_m(...) __riscv_vsuxseg4ei16_v_i32m2_m(__VA_ARGS__)
10993
#define vsuxseg2ei16_v_i32m4_m(...) __riscv_vsuxseg2ei16_v_i32m4_m(__VA_ARGS__)
10994
#define vsuxseg2ei32_v_i32mf2_m(...) __riscv_vsuxseg2ei32_v_i32mf2_m(__VA_ARGS__)
10995
#define vsuxseg3ei32_v_i32mf2_m(...) __riscv_vsuxseg3ei32_v_i32mf2_m(__VA_ARGS__)
10996
#define vsuxseg4ei32_v_i32mf2_m(...) __riscv_vsuxseg4ei32_v_i32mf2_m(__VA_ARGS__)
10997
#define vsuxseg5ei32_v_i32mf2_m(...) __riscv_vsuxseg5ei32_v_i32mf2_m(__VA_ARGS__)
10998
#define vsuxseg6ei32_v_i32mf2_m(...) __riscv_vsuxseg6ei32_v_i32mf2_m(__VA_ARGS__)
10999
#define vsuxseg7ei32_v_i32mf2_m(...) __riscv_vsuxseg7ei32_v_i32mf2_m(__VA_ARGS__)
11000
#define vsuxseg8ei32_v_i32mf2_m(...) __riscv_vsuxseg8ei32_v_i32mf2_m(__VA_ARGS__)
11001
#define vsuxseg2ei32_v_i32m1_m(...) __riscv_vsuxseg2ei32_v_i32m1_m(__VA_ARGS__)
11002
#define vsuxseg3ei32_v_i32m1_m(...) __riscv_vsuxseg3ei32_v_i32m1_m(__VA_ARGS__)
11003
#define vsuxseg4ei32_v_i32m1_m(...) __riscv_vsuxseg4ei32_v_i32m1_m(__VA_ARGS__)
11004
#define vsuxseg5ei32_v_i32m1_m(...) __riscv_vsuxseg5ei32_v_i32m1_m(__VA_ARGS__)
11005
#define vsuxseg6ei32_v_i32m1_m(...) __riscv_vsuxseg6ei32_v_i32m1_m(__VA_ARGS__)
11006
#define vsuxseg7ei32_v_i32m1_m(...) __riscv_vsuxseg7ei32_v_i32m1_m(__VA_ARGS__)
11007
#define vsuxseg8ei32_v_i32m1_m(...) __riscv_vsuxseg8ei32_v_i32m1_m(__VA_ARGS__)
11008
#define vsuxseg2ei32_v_i32m2_m(...) __riscv_vsuxseg2ei32_v_i32m2_m(__VA_ARGS__)
11009
#define vsuxseg3ei32_v_i32m2_m(...) __riscv_vsuxseg3ei32_v_i32m2_m(__VA_ARGS__)
11010
#define vsuxseg4ei32_v_i32m2_m(...) __riscv_vsuxseg4ei32_v_i32m2_m(__VA_ARGS__)
11011
#define vsuxseg2ei32_v_i32m4_m(...) __riscv_vsuxseg2ei32_v_i32m4_m(__VA_ARGS__)
11012
#define vsuxseg2ei64_v_i32mf2_m(...) __riscv_vsuxseg2ei64_v_i32mf2_m(__VA_ARGS__)
11013
#define vsuxseg3ei64_v_i32mf2_m(...) __riscv_vsuxseg3ei64_v_i32mf2_m(__VA_ARGS__)
11014
#define vsuxseg4ei64_v_i32mf2_m(...) __riscv_vsuxseg4ei64_v_i32mf2_m(__VA_ARGS__)
11015
#define vsuxseg5ei64_v_i32mf2_m(...) __riscv_vsuxseg5ei64_v_i32mf2_m(__VA_ARGS__)
11016
#define vsuxseg6ei64_v_i32mf2_m(...) __riscv_vsuxseg6ei64_v_i32mf2_m(__VA_ARGS__)
11017
#define vsuxseg7ei64_v_i32mf2_m(...) __riscv_vsuxseg7ei64_v_i32mf2_m(__VA_ARGS__)
11018
#define vsuxseg8ei64_v_i32mf2_m(...) __riscv_vsuxseg8ei64_v_i32mf2_m(__VA_ARGS__)
11019
#define vsuxseg2ei64_v_i32m1_m(...) __riscv_vsuxseg2ei64_v_i32m1_m(__VA_ARGS__)
11020
#define vsuxseg3ei64_v_i32m1_m(...) __riscv_vsuxseg3ei64_v_i32m1_m(__VA_ARGS__)
11021
#define vsuxseg4ei64_v_i32m1_m(...) __riscv_vsuxseg4ei64_v_i32m1_m(__VA_ARGS__)
11022
#define vsuxseg5ei64_v_i32m1_m(...) __riscv_vsuxseg5ei64_v_i32m1_m(__VA_ARGS__)
11023
#define vsuxseg6ei64_v_i32m1_m(...) __riscv_vsuxseg6ei64_v_i32m1_m(__VA_ARGS__)
11024
#define vsuxseg7ei64_v_i32m1_m(...) __riscv_vsuxseg7ei64_v_i32m1_m(__VA_ARGS__)
11025
#define vsuxseg8ei64_v_i32m1_m(...) __riscv_vsuxseg8ei64_v_i32m1_m(__VA_ARGS__)
11026
#define vsuxseg2ei64_v_i32m2_m(...) __riscv_vsuxseg2ei64_v_i32m2_m(__VA_ARGS__)
11027
#define vsuxseg3ei64_v_i32m2_m(...) __riscv_vsuxseg3ei64_v_i32m2_m(__VA_ARGS__)
11028
#define vsuxseg4ei64_v_i32m2_m(...) __riscv_vsuxseg4ei64_v_i32m2_m(__VA_ARGS__)
11029
#define vsuxseg2ei64_v_i32m4_m(...) __riscv_vsuxseg2ei64_v_i32m4_m(__VA_ARGS__)
11030
#define vsuxseg2ei8_v_i64m1_m(...) __riscv_vsuxseg2ei8_v_i64m1_m(__VA_ARGS__)
11031
#define vsuxseg3ei8_v_i64m1_m(...) __riscv_vsuxseg3ei8_v_i64m1_m(__VA_ARGS__)
11032
#define vsuxseg4ei8_v_i64m1_m(...) __riscv_vsuxseg4ei8_v_i64m1_m(__VA_ARGS__)
11033
#define vsuxseg5ei8_v_i64m1_m(...) __riscv_vsuxseg5ei8_v_i64m1_m(__VA_ARGS__)
11034
#define vsuxseg6ei8_v_i64m1_m(...) __riscv_vsuxseg6ei8_v_i64m1_m(__VA_ARGS__)
11035
#define vsuxseg7ei8_v_i64m1_m(...) __riscv_vsuxseg7ei8_v_i64m1_m(__VA_ARGS__)
11036
#define vsuxseg8ei8_v_i64m1_m(...) __riscv_vsuxseg8ei8_v_i64m1_m(__VA_ARGS__)
11037
#define vsuxseg2ei8_v_i64m2_m(...) __riscv_vsuxseg2ei8_v_i64m2_m(__VA_ARGS__)
11038
#define vsuxseg3ei8_v_i64m2_m(...) __riscv_vsuxseg3ei8_v_i64m2_m(__VA_ARGS__)
11039
#define vsuxseg4ei8_v_i64m2_m(...) __riscv_vsuxseg4ei8_v_i64m2_m(__VA_ARGS__)
11040
#define vsuxseg2ei8_v_i64m4_m(...) __riscv_vsuxseg2ei8_v_i64m4_m(__VA_ARGS__)
11041
#define vsuxseg2ei16_v_i64m1_m(...) __riscv_vsuxseg2ei16_v_i64m1_m(__VA_ARGS__)
11042
#define vsuxseg3ei16_v_i64m1_m(...) __riscv_vsuxseg3ei16_v_i64m1_m(__VA_ARGS__)
11043
#define vsuxseg4ei16_v_i64m1_m(...) __riscv_vsuxseg4ei16_v_i64m1_m(__VA_ARGS__)
11044
#define vsuxseg5ei16_v_i64m1_m(...) __riscv_vsuxseg5ei16_v_i64m1_m(__VA_ARGS__)
11045
#define vsuxseg6ei16_v_i64m1_m(...) __riscv_vsuxseg6ei16_v_i64m1_m(__VA_ARGS__)
11046
#define vsuxseg7ei16_v_i64m1_m(...) __riscv_vsuxseg7ei16_v_i64m1_m(__VA_ARGS__)
11047
#define vsuxseg8ei16_v_i64m1_m(...) __riscv_vsuxseg8ei16_v_i64m1_m(__VA_ARGS__)
11048
#define vsuxseg2ei16_v_i64m2_m(...) __riscv_vsuxseg2ei16_v_i64m2_m(__VA_ARGS__)
11049
#define vsuxseg3ei16_v_i64m2_m(...) __riscv_vsuxseg3ei16_v_i64m2_m(__VA_ARGS__)
11050
#define vsuxseg4ei16_v_i64m2_m(...) __riscv_vsuxseg4ei16_v_i64m2_m(__VA_ARGS__)
11051
#define vsuxseg2ei16_v_i64m4_m(...) __riscv_vsuxseg2ei16_v_i64m4_m(__VA_ARGS__)
11052
#define vsuxseg2ei32_v_i64m1_m(...) __riscv_vsuxseg2ei32_v_i64m1_m(__VA_ARGS__)
11053
#define vsuxseg3ei32_v_i64m1_m(...) __riscv_vsuxseg3ei32_v_i64m1_m(__VA_ARGS__)
11054
#define vsuxseg4ei32_v_i64m1_m(...) __riscv_vsuxseg4ei32_v_i64m1_m(__VA_ARGS__)
11055
#define vsuxseg5ei32_v_i64m1_m(...) __riscv_vsuxseg5ei32_v_i64m1_m(__VA_ARGS__)
11056
#define vsuxseg6ei32_v_i64m1_m(...) __riscv_vsuxseg6ei32_v_i64m1_m(__VA_ARGS__)
11057
#define vsuxseg7ei32_v_i64m1_m(...) __riscv_vsuxseg7ei32_v_i64m1_m(__VA_ARGS__)
11058
#define vsuxseg8ei32_v_i64m1_m(...) __riscv_vsuxseg8ei32_v_i64m1_m(__VA_ARGS__)
11059
#define vsuxseg2ei32_v_i64m2_m(...) __riscv_vsuxseg2ei32_v_i64m2_m(__VA_ARGS__)
11060
#define vsuxseg3ei32_v_i64m2_m(...) __riscv_vsuxseg3ei32_v_i64m2_m(__VA_ARGS__)
11061
#define vsuxseg4ei32_v_i64m2_m(...) __riscv_vsuxseg4ei32_v_i64m2_m(__VA_ARGS__)
11062
#define vsuxseg2ei32_v_i64m4_m(...) __riscv_vsuxseg2ei32_v_i64m4_m(__VA_ARGS__)
11063
#define vsuxseg2ei64_v_i64m1_m(...) __riscv_vsuxseg2ei64_v_i64m1_m(__VA_ARGS__)
11064
#define vsuxseg3ei64_v_i64m1_m(...) __riscv_vsuxseg3ei64_v_i64m1_m(__VA_ARGS__)
11065
#define vsuxseg4ei64_v_i64m1_m(...) __riscv_vsuxseg4ei64_v_i64m1_m(__VA_ARGS__)
11066
#define vsuxseg5ei64_v_i64m1_m(...) __riscv_vsuxseg5ei64_v_i64m1_m(__VA_ARGS__)
11067
#define vsuxseg6ei64_v_i64m1_m(...) __riscv_vsuxseg6ei64_v_i64m1_m(__VA_ARGS__)
11068
#define vsuxseg7ei64_v_i64m1_m(...) __riscv_vsuxseg7ei64_v_i64m1_m(__VA_ARGS__)
11069
#define vsuxseg8ei64_v_i64m1_m(...) __riscv_vsuxseg8ei64_v_i64m1_m(__VA_ARGS__)
11070
#define vsuxseg2ei64_v_i64m2_m(...) __riscv_vsuxseg2ei64_v_i64m2_m(__VA_ARGS__)
11071
#define vsuxseg3ei64_v_i64m2_m(...) __riscv_vsuxseg3ei64_v_i64m2_m(__VA_ARGS__)
11072
#define vsuxseg4ei64_v_i64m2_m(...) __riscv_vsuxseg4ei64_v_i64m2_m(__VA_ARGS__)
11073
#define vsuxseg2ei64_v_i64m4_m(...) __riscv_vsuxseg2ei64_v_i64m4_m(__VA_ARGS__)
11074
#define vsoxseg2ei8_v_u8mf8_m(...) __riscv_vsoxseg2ei8_v_u8mf8_m(__VA_ARGS__)
11075
#define vsoxseg3ei8_v_u8mf8_m(...) __riscv_vsoxseg3ei8_v_u8mf8_m(__VA_ARGS__)
11076
#define vsoxseg4ei8_v_u8mf8_m(...) __riscv_vsoxseg4ei8_v_u8mf8_m(__VA_ARGS__)
11077
#define vsoxseg5ei8_v_u8mf8_m(...) __riscv_vsoxseg5ei8_v_u8mf8_m(__VA_ARGS__)
11078
#define vsoxseg6ei8_v_u8mf8_m(...) __riscv_vsoxseg6ei8_v_u8mf8_m(__VA_ARGS__)
11079
#define vsoxseg7ei8_v_u8mf8_m(...) __riscv_vsoxseg7ei8_v_u8mf8_m(__VA_ARGS__)
11080
#define vsoxseg8ei8_v_u8mf8_m(...) __riscv_vsoxseg8ei8_v_u8mf8_m(__VA_ARGS__)
11081
#define vsoxseg2ei8_v_u8mf4_m(...) __riscv_vsoxseg2ei8_v_u8mf4_m(__VA_ARGS__)
11082
#define vsoxseg3ei8_v_u8mf4_m(...) __riscv_vsoxseg3ei8_v_u8mf4_m(__VA_ARGS__)
11083
#define vsoxseg4ei8_v_u8mf4_m(...) __riscv_vsoxseg4ei8_v_u8mf4_m(__VA_ARGS__)
11084
#define vsoxseg5ei8_v_u8mf4_m(...) __riscv_vsoxseg5ei8_v_u8mf4_m(__VA_ARGS__)
11085
#define vsoxseg6ei8_v_u8mf4_m(...) __riscv_vsoxseg6ei8_v_u8mf4_m(__VA_ARGS__)
11086
#define vsoxseg7ei8_v_u8mf4_m(...) __riscv_vsoxseg7ei8_v_u8mf4_m(__VA_ARGS__)
11087
#define vsoxseg8ei8_v_u8mf4_m(...) __riscv_vsoxseg8ei8_v_u8mf4_m(__VA_ARGS__)
11088
#define vsoxseg2ei8_v_u8mf2_m(...) __riscv_vsoxseg2ei8_v_u8mf2_m(__VA_ARGS__)
11089
#define vsoxseg3ei8_v_u8mf2_m(...) __riscv_vsoxseg3ei8_v_u8mf2_m(__VA_ARGS__)
11090
#define vsoxseg4ei8_v_u8mf2_m(...) __riscv_vsoxseg4ei8_v_u8mf2_m(__VA_ARGS__)
11091
#define vsoxseg5ei8_v_u8mf2_m(...) __riscv_vsoxseg5ei8_v_u8mf2_m(__VA_ARGS__)
11092
#define vsoxseg6ei8_v_u8mf2_m(...) __riscv_vsoxseg6ei8_v_u8mf2_m(__VA_ARGS__)
11093
#define vsoxseg7ei8_v_u8mf2_m(...) __riscv_vsoxseg7ei8_v_u8mf2_m(__VA_ARGS__)
11094
#define vsoxseg8ei8_v_u8mf2_m(...) __riscv_vsoxseg8ei8_v_u8mf2_m(__VA_ARGS__)
11095
#define vsoxseg2ei8_v_u8m1_m(...) __riscv_vsoxseg2ei8_v_u8m1_m(__VA_ARGS__)
11096
#define vsoxseg3ei8_v_u8m1_m(...) __riscv_vsoxseg3ei8_v_u8m1_m(__VA_ARGS__)
11097
#define vsoxseg4ei8_v_u8m1_m(...) __riscv_vsoxseg4ei8_v_u8m1_m(__VA_ARGS__)
11098
#define vsoxseg5ei8_v_u8m1_m(...) __riscv_vsoxseg5ei8_v_u8m1_m(__VA_ARGS__)
11099
#define vsoxseg6ei8_v_u8m1_m(...) __riscv_vsoxseg6ei8_v_u8m1_m(__VA_ARGS__)
11100
#define vsoxseg7ei8_v_u8m1_m(...) __riscv_vsoxseg7ei8_v_u8m1_m(__VA_ARGS__)
11101
#define vsoxseg8ei8_v_u8m1_m(...) __riscv_vsoxseg8ei8_v_u8m1_m(__VA_ARGS__)
11102
#define vsoxseg2ei8_v_u8m2_m(...) __riscv_vsoxseg2ei8_v_u8m2_m(__VA_ARGS__)
11103
#define vsoxseg3ei8_v_u8m2_m(...) __riscv_vsoxseg3ei8_v_u8m2_m(__VA_ARGS__)
11104
#define vsoxseg4ei8_v_u8m2_m(...) __riscv_vsoxseg4ei8_v_u8m2_m(__VA_ARGS__)
11105
#define vsoxseg2ei8_v_u8m4_m(...) __riscv_vsoxseg2ei8_v_u8m4_m(__VA_ARGS__)
11106
#define vsoxseg2ei16_v_u8mf8_m(...) __riscv_vsoxseg2ei16_v_u8mf8_m(__VA_ARGS__)
11107
#define vsoxseg3ei16_v_u8mf8_m(...) __riscv_vsoxseg3ei16_v_u8mf8_m(__VA_ARGS__)
11108
#define vsoxseg4ei16_v_u8mf8_m(...) __riscv_vsoxseg4ei16_v_u8mf8_m(__VA_ARGS__)
11109
#define vsoxseg5ei16_v_u8mf8_m(...) __riscv_vsoxseg5ei16_v_u8mf8_m(__VA_ARGS__)
11110
#define vsoxseg6ei16_v_u8mf8_m(...) __riscv_vsoxseg6ei16_v_u8mf8_m(__VA_ARGS__)
11111
#define vsoxseg7ei16_v_u8mf8_m(...) __riscv_vsoxseg7ei16_v_u8mf8_m(__VA_ARGS__)
11112
#define vsoxseg8ei16_v_u8mf8_m(...) __riscv_vsoxseg8ei16_v_u8mf8_m(__VA_ARGS__)
11113
#define vsoxseg2ei16_v_u8mf4_m(...) __riscv_vsoxseg2ei16_v_u8mf4_m(__VA_ARGS__)
11114
#define vsoxseg3ei16_v_u8mf4_m(...) __riscv_vsoxseg3ei16_v_u8mf4_m(__VA_ARGS__)
11115
#define vsoxseg4ei16_v_u8mf4_m(...) __riscv_vsoxseg4ei16_v_u8mf4_m(__VA_ARGS__)
11116
#define vsoxseg5ei16_v_u8mf4_m(...) __riscv_vsoxseg5ei16_v_u8mf4_m(__VA_ARGS__)
11117
#define vsoxseg6ei16_v_u8mf4_m(...) __riscv_vsoxseg6ei16_v_u8mf4_m(__VA_ARGS__)
11118
#define vsoxseg7ei16_v_u8mf4_m(...) __riscv_vsoxseg7ei16_v_u8mf4_m(__VA_ARGS__)
11119
#define vsoxseg8ei16_v_u8mf4_m(...) __riscv_vsoxseg8ei16_v_u8mf4_m(__VA_ARGS__)
11120
#define vsoxseg2ei16_v_u8mf2_m(...) __riscv_vsoxseg2ei16_v_u8mf2_m(__VA_ARGS__)
11121
#define vsoxseg3ei16_v_u8mf2_m(...) __riscv_vsoxseg3ei16_v_u8mf2_m(__VA_ARGS__)
11122
#define vsoxseg4ei16_v_u8mf2_m(...) __riscv_vsoxseg4ei16_v_u8mf2_m(__VA_ARGS__)
11123
#define vsoxseg5ei16_v_u8mf2_m(...) __riscv_vsoxseg5ei16_v_u8mf2_m(__VA_ARGS__)
11124
#define vsoxseg6ei16_v_u8mf2_m(...) __riscv_vsoxseg6ei16_v_u8mf2_m(__VA_ARGS__)
11125
#define vsoxseg7ei16_v_u8mf2_m(...) __riscv_vsoxseg7ei16_v_u8mf2_m(__VA_ARGS__)
11126
#define vsoxseg8ei16_v_u8mf2_m(...) __riscv_vsoxseg8ei16_v_u8mf2_m(__VA_ARGS__)
11127
#define vsoxseg2ei16_v_u8m1_m(...) __riscv_vsoxseg2ei16_v_u8m1_m(__VA_ARGS__)
11128
#define vsoxseg3ei16_v_u8m1_m(...) __riscv_vsoxseg3ei16_v_u8m1_m(__VA_ARGS__)
11129
#define vsoxseg4ei16_v_u8m1_m(...) __riscv_vsoxseg4ei16_v_u8m1_m(__VA_ARGS__)
11130
#define vsoxseg5ei16_v_u8m1_m(...) __riscv_vsoxseg5ei16_v_u8m1_m(__VA_ARGS__)
11131
#define vsoxseg6ei16_v_u8m1_m(...) __riscv_vsoxseg6ei16_v_u8m1_m(__VA_ARGS__)
11132
#define vsoxseg7ei16_v_u8m1_m(...) __riscv_vsoxseg7ei16_v_u8m1_m(__VA_ARGS__)
11133
#define vsoxseg8ei16_v_u8m1_m(...) __riscv_vsoxseg8ei16_v_u8m1_m(__VA_ARGS__)
11134
#define vsoxseg2ei16_v_u8m2_m(...) __riscv_vsoxseg2ei16_v_u8m2_m(__VA_ARGS__)
11135
#define vsoxseg3ei16_v_u8m2_m(...) __riscv_vsoxseg3ei16_v_u8m2_m(__VA_ARGS__)
11136
#define vsoxseg4ei16_v_u8m2_m(...) __riscv_vsoxseg4ei16_v_u8m2_m(__VA_ARGS__)
11137
#define vsoxseg2ei16_v_u8m4_m(...) __riscv_vsoxseg2ei16_v_u8m4_m(__VA_ARGS__)
11138
#define vsoxseg2ei32_v_u8mf8_m(...) __riscv_vsoxseg2ei32_v_u8mf8_m(__VA_ARGS__)
11139
#define vsoxseg3ei32_v_u8mf8_m(...) __riscv_vsoxseg3ei32_v_u8mf8_m(__VA_ARGS__)
11140
#define vsoxseg4ei32_v_u8mf8_m(...) __riscv_vsoxseg4ei32_v_u8mf8_m(__VA_ARGS__)
11141
#define vsoxseg5ei32_v_u8mf8_m(...) __riscv_vsoxseg5ei32_v_u8mf8_m(__VA_ARGS__)
11142
#define vsoxseg6ei32_v_u8mf8_m(...) __riscv_vsoxseg6ei32_v_u8mf8_m(__VA_ARGS__)
11143
#define vsoxseg7ei32_v_u8mf8_m(...) __riscv_vsoxseg7ei32_v_u8mf8_m(__VA_ARGS__)
11144
#define vsoxseg8ei32_v_u8mf8_m(...) __riscv_vsoxseg8ei32_v_u8mf8_m(__VA_ARGS__)
11145
#define vsoxseg2ei32_v_u8mf4_m(...) __riscv_vsoxseg2ei32_v_u8mf4_m(__VA_ARGS__)
11146
#define vsoxseg3ei32_v_u8mf4_m(...) __riscv_vsoxseg3ei32_v_u8mf4_m(__VA_ARGS__)
11147
#define vsoxseg4ei32_v_u8mf4_m(...) __riscv_vsoxseg4ei32_v_u8mf4_m(__VA_ARGS__)
11148
#define vsoxseg5ei32_v_u8mf4_m(...) __riscv_vsoxseg5ei32_v_u8mf4_m(__VA_ARGS__)
11149
#define vsoxseg6ei32_v_u8mf4_m(...) __riscv_vsoxseg6ei32_v_u8mf4_m(__VA_ARGS__)
11150
#define vsoxseg7ei32_v_u8mf4_m(...) __riscv_vsoxseg7ei32_v_u8mf4_m(__VA_ARGS__)
11151
#define vsoxseg8ei32_v_u8mf4_m(...) __riscv_vsoxseg8ei32_v_u8mf4_m(__VA_ARGS__)
11152
#define vsoxseg2ei32_v_u8mf2_m(...) __riscv_vsoxseg2ei32_v_u8mf2_m(__VA_ARGS__)
11153
#define vsoxseg3ei32_v_u8mf2_m(...) __riscv_vsoxseg3ei32_v_u8mf2_m(__VA_ARGS__)
11154
#define vsoxseg4ei32_v_u8mf2_m(...) __riscv_vsoxseg4ei32_v_u8mf2_m(__VA_ARGS__)
11155
#define vsoxseg5ei32_v_u8mf2_m(...) __riscv_vsoxseg5ei32_v_u8mf2_m(__VA_ARGS__)
11156
#define vsoxseg6ei32_v_u8mf2_m(...) __riscv_vsoxseg6ei32_v_u8mf2_m(__VA_ARGS__)
11157
#define vsoxseg7ei32_v_u8mf2_m(...) __riscv_vsoxseg7ei32_v_u8mf2_m(__VA_ARGS__)
11158
#define vsoxseg8ei32_v_u8mf2_m(...) __riscv_vsoxseg8ei32_v_u8mf2_m(__VA_ARGS__)
11159
#define vsoxseg2ei32_v_u8m1_m(...) __riscv_vsoxseg2ei32_v_u8m1_m(__VA_ARGS__)
11160
#define vsoxseg3ei32_v_u8m1_m(...) __riscv_vsoxseg3ei32_v_u8m1_m(__VA_ARGS__)
11161
#define vsoxseg4ei32_v_u8m1_m(...) __riscv_vsoxseg4ei32_v_u8m1_m(__VA_ARGS__)
11162
#define vsoxseg5ei32_v_u8m1_m(...) __riscv_vsoxseg5ei32_v_u8m1_m(__VA_ARGS__)
11163
#define vsoxseg6ei32_v_u8m1_m(...) __riscv_vsoxseg6ei32_v_u8m1_m(__VA_ARGS__)
11164
#define vsoxseg7ei32_v_u8m1_m(...) __riscv_vsoxseg7ei32_v_u8m1_m(__VA_ARGS__)
11165
#define vsoxseg8ei32_v_u8m1_m(...) __riscv_vsoxseg8ei32_v_u8m1_m(__VA_ARGS__)
11166
#define vsoxseg2ei32_v_u8m2_m(...) __riscv_vsoxseg2ei32_v_u8m2_m(__VA_ARGS__)
11167
#define vsoxseg3ei32_v_u8m2_m(...) __riscv_vsoxseg3ei32_v_u8m2_m(__VA_ARGS__)
11168
#define vsoxseg4ei32_v_u8m2_m(...) __riscv_vsoxseg4ei32_v_u8m2_m(__VA_ARGS__)
11169
#define vsoxseg2ei64_v_u8mf8_m(...) __riscv_vsoxseg2ei64_v_u8mf8_m(__VA_ARGS__)
11170
#define vsoxseg3ei64_v_u8mf8_m(...) __riscv_vsoxseg3ei64_v_u8mf8_m(__VA_ARGS__)
11171
#define vsoxseg4ei64_v_u8mf8_m(...) __riscv_vsoxseg4ei64_v_u8mf8_m(__VA_ARGS__)
11172
#define vsoxseg5ei64_v_u8mf8_m(...) __riscv_vsoxseg5ei64_v_u8mf8_m(__VA_ARGS__)
11173
#define vsoxseg6ei64_v_u8mf8_m(...) __riscv_vsoxseg6ei64_v_u8mf8_m(__VA_ARGS__)
11174
#define vsoxseg7ei64_v_u8mf8_m(...) __riscv_vsoxseg7ei64_v_u8mf8_m(__VA_ARGS__)
11175
#define vsoxseg8ei64_v_u8mf8_m(...) __riscv_vsoxseg8ei64_v_u8mf8_m(__VA_ARGS__)
11176
#define vsoxseg2ei64_v_u8mf4_m(...) __riscv_vsoxseg2ei64_v_u8mf4_m(__VA_ARGS__)
11177
#define vsoxseg3ei64_v_u8mf4_m(...) __riscv_vsoxseg3ei64_v_u8mf4_m(__VA_ARGS__)
11178
#define vsoxseg4ei64_v_u8mf4_m(...) __riscv_vsoxseg4ei64_v_u8mf4_m(__VA_ARGS__)
11179
#define vsoxseg5ei64_v_u8mf4_m(...) __riscv_vsoxseg5ei64_v_u8mf4_m(__VA_ARGS__)
11180
#define vsoxseg6ei64_v_u8mf4_m(...) __riscv_vsoxseg6ei64_v_u8mf4_m(__VA_ARGS__)
11181
#define vsoxseg7ei64_v_u8mf4_m(...) __riscv_vsoxseg7ei64_v_u8mf4_m(__VA_ARGS__)
11182
#define vsoxseg8ei64_v_u8mf4_m(...) __riscv_vsoxseg8ei64_v_u8mf4_m(__VA_ARGS__)
11183
#define vsoxseg2ei64_v_u8mf2_m(...) __riscv_vsoxseg2ei64_v_u8mf2_m(__VA_ARGS__)
11184
#define vsoxseg3ei64_v_u8mf2_m(...) __riscv_vsoxseg3ei64_v_u8mf2_m(__VA_ARGS__)
11185
#define vsoxseg4ei64_v_u8mf2_m(...) __riscv_vsoxseg4ei64_v_u8mf2_m(__VA_ARGS__)
11186
#define vsoxseg5ei64_v_u8mf2_m(...) __riscv_vsoxseg5ei64_v_u8mf2_m(__VA_ARGS__)
11187
#define vsoxseg6ei64_v_u8mf2_m(...) __riscv_vsoxseg6ei64_v_u8mf2_m(__VA_ARGS__)
11188
#define vsoxseg7ei64_v_u8mf2_m(...) __riscv_vsoxseg7ei64_v_u8mf2_m(__VA_ARGS__)
11189
#define vsoxseg8ei64_v_u8mf2_m(...) __riscv_vsoxseg8ei64_v_u8mf2_m(__VA_ARGS__)
11190
#define vsoxseg2ei64_v_u8m1_m(...) __riscv_vsoxseg2ei64_v_u8m1_m(__VA_ARGS__)
11191
#define vsoxseg3ei64_v_u8m1_m(...) __riscv_vsoxseg3ei64_v_u8m1_m(__VA_ARGS__)
11192
#define vsoxseg4ei64_v_u8m1_m(...) __riscv_vsoxseg4ei64_v_u8m1_m(__VA_ARGS__)
11193
#define vsoxseg5ei64_v_u8m1_m(...) __riscv_vsoxseg5ei64_v_u8m1_m(__VA_ARGS__)
11194
#define vsoxseg6ei64_v_u8m1_m(...) __riscv_vsoxseg6ei64_v_u8m1_m(__VA_ARGS__)
11195
#define vsoxseg7ei64_v_u8m1_m(...) __riscv_vsoxseg7ei64_v_u8m1_m(__VA_ARGS__)
11196
#define vsoxseg8ei64_v_u8m1_m(...) __riscv_vsoxseg8ei64_v_u8m1_m(__VA_ARGS__)
11197
#define vsoxseg2ei8_v_u16mf4_m(...) __riscv_vsoxseg2ei8_v_u16mf4_m(__VA_ARGS__)
11198
#define vsoxseg3ei8_v_u16mf4_m(...) __riscv_vsoxseg3ei8_v_u16mf4_m(__VA_ARGS__)
11199
#define vsoxseg4ei8_v_u16mf4_m(...) __riscv_vsoxseg4ei8_v_u16mf4_m(__VA_ARGS__)
11200
#define vsoxseg5ei8_v_u16mf4_m(...) __riscv_vsoxseg5ei8_v_u16mf4_m(__VA_ARGS__)
11201
#define vsoxseg6ei8_v_u16mf4_m(...) __riscv_vsoxseg6ei8_v_u16mf4_m(__VA_ARGS__)
11202
#define vsoxseg7ei8_v_u16mf4_m(...) __riscv_vsoxseg7ei8_v_u16mf4_m(__VA_ARGS__)
11203
#define vsoxseg8ei8_v_u16mf4_m(...) __riscv_vsoxseg8ei8_v_u16mf4_m(__VA_ARGS__)
11204
#define vsoxseg2ei8_v_u16mf2_m(...) __riscv_vsoxseg2ei8_v_u16mf2_m(__VA_ARGS__)
11205
#define vsoxseg3ei8_v_u16mf2_m(...) __riscv_vsoxseg3ei8_v_u16mf2_m(__VA_ARGS__)
11206
#define vsoxseg4ei8_v_u16mf2_m(...) __riscv_vsoxseg4ei8_v_u16mf2_m(__VA_ARGS__)
11207
#define vsoxseg5ei8_v_u16mf2_m(...) __riscv_vsoxseg5ei8_v_u16mf2_m(__VA_ARGS__)
11208
#define vsoxseg6ei8_v_u16mf2_m(...) __riscv_vsoxseg6ei8_v_u16mf2_m(__VA_ARGS__)
11209
#define vsoxseg7ei8_v_u16mf2_m(...) __riscv_vsoxseg7ei8_v_u16mf2_m(__VA_ARGS__)
11210
#define vsoxseg8ei8_v_u16mf2_m(...) __riscv_vsoxseg8ei8_v_u16mf2_m(__VA_ARGS__)
11211
#define vsoxseg2ei8_v_u16m1_m(...) __riscv_vsoxseg2ei8_v_u16m1_m(__VA_ARGS__)
11212
#define vsoxseg3ei8_v_u16m1_m(...) __riscv_vsoxseg3ei8_v_u16m1_m(__VA_ARGS__)
11213
#define vsoxseg4ei8_v_u16m1_m(...) __riscv_vsoxseg4ei8_v_u16m1_m(__VA_ARGS__)
11214
#define vsoxseg5ei8_v_u16m1_m(...) __riscv_vsoxseg5ei8_v_u16m1_m(__VA_ARGS__)
11215
#define vsoxseg6ei8_v_u16m1_m(...) __riscv_vsoxseg6ei8_v_u16m1_m(__VA_ARGS__)
11216
#define vsoxseg7ei8_v_u16m1_m(...) __riscv_vsoxseg7ei8_v_u16m1_m(__VA_ARGS__)
11217
#define vsoxseg8ei8_v_u16m1_m(...) __riscv_vsoxseg8ei8_v_u16m1_m(__VA_ARGS__)
11218
#define vsoxseg2ei8_v_u16m2_m(...) __riscv_vsoxseg2ei8_v_u16m2_m(__VA_ARGS__)
11219
#define vsoxseg3ei8_v_u16m2_m(...) __riscv_vsoxseg3ei8_v_u16m2_m(__VA_ARGS__)
11220
#define vsoxseg4ei8_v_u16m2_m(...) __riscv_vsoxseg4ei8_v_u16m2_m(__VA_ARGS__)
11221
#define vsoxseg2ei8_v_u16m4_m(...) __riscv_vsoxseg2ei8_v_u16m4_m(__VA_ARGS__)
11222
#define vsoxseg2ei16_v_u16mf4_m(...) __riscv_vsoxseg2ei16_v_u16mf4_m(__VA_ARGS__)
11223
#define vsoxseg3ei16_v_u16mf4_m(...) __riscv_vsoxseg3ei16_v_u16mf4_m(__VA_ARGS__)
11224
#define vsoxseg4ei16_v_u16mf4_m(...) __riscv_vsoxseg4ei16_v_u16mf4_m(__VA_ARGS__)
11225
#define vsoxseg5ei16_v_u16mf4_m(...) __riscv_vsoxseg5ei16_v_u16mf4_m(__VA_ARGS__)
11226
#define vsoxseg6ei16_v_u16mf4_m(...) __riscv_vsoxseg6ei16_v_u16mf4_m(__VA_ARGS__)
11227
#define vsoxseg7ei16_v_u16mf4_m(...) __riscv_vsoxseg7ei16_v_u16mf4_m(__VA_ARGS__)
11228
#define vsoxseg8ei16_v_u16mf4_m(...) __riscv_vsoxseg8ei16_v_u16mf4_m(__VA_ARGS__)
11229
#define vsoxseg2ei16_v_u16mf2_m(...) __riscv_vsoxseg2ei16_v_u16mf2_m(__VA_ARGS__)
11230
#define vsoxseg3ei16_v_u16mf2_m(...) __riscv_vsoxseg3ei16_v_u16mf2_m(__VA_ARGS__)
11231
#define vsoxseg4ei16_v_u16mf2_m(...) __riscv_vsoxseg4ei16_v_u16mf2_m(__VA_ARGS__)
11232
#define vsoxseg5ei16_v_u16mf2_m(...) __riscv_vsoxseg5ei16_v_u16mf2_m(__VA_ARGS__)
11233
#define vsoxseg6ei16_v_u16mf2_m(...) __riscv_vsoxseg6ei16_v_u16mf2_m(__VA_ARGS__)
11234
#define vsoxseg7ei16_v_u16mf2_m(...) __riscv_vsoxseg7ei16_v_u16mf2_m(__VA_ARGS__)
11235
#define vsoxseg8ei16_v_u16mf2_m(...) __riscv_vsoxseg8ei16_v_u16mf2_m(__VA_ARGS__)
11236
#define vsoxseg2ei16_v_u16m1_m(...) __riscv_vsoxseg2ei16_v_u16m1_m(__VA_ARGS__)
11237
#define vsoxseg3ei16_v_u16m1_m(...) __riscv_vsoxseg3ei16_v_u16m1_m(__VA_ARGS__)
11238
#define vsoxseg4ei16_v_u16m1_m(...) __riscv_vsoxseg4ei16_v_u16m1_m(__VA_ARGS__)
11239
#define vsoxseg5ei16_v_u16m1_m(...) __riscv_vsoxseg5ei16_v_u16m1_m(__VA_ARGS__)
11240
#define vsoxseg6ei16_v_u16m1_m(...) __riscv_vsoxseg6ei16_v_u16m1_m(__VA_ARGS__)
11241
#define vsoxseg7ei16_v_u16m1_m(...) __riscv_vsoxseg7ei16_v_u16m1_m(__VA_ARGS__)
11242
#define vsoxseg8ei16_v_u16m1_m(...) __riscv_vsoxseg8ei16_v_u16m1_m(__VA_ARGS__)
11243
#define vsoxseg2ei16_v_u16m2_m(...) __riscv_vsoxseg2ei16_v_u16m2_m(__VA_ARGS__)
11244
#define vsoxseg3ei16_v_u16m2_m(...) __riscv_vsoxseg3ei16_v_u16m2_m(__VA_ARGS__)
11245
#define vsoxseg4ei16_v_u16m2_m(...) __riscv_vsoxseg4ei16_v_u16m2_m(__VA_ARGS__)
11246
#define vsoxseg2ei16_v_u16m4_m(...) __riscv_vsoxseg2ei16_v_u16m4_m(__VA_ARGS__)
11247
#define vsoxseg2ei32_v_u16mf4_m(...) __riscv_vsoxseg2ei32_v_u16mf4_m(__VA_ARGS__)
11248
#define vsoxseg3ei32_v_u16mf4_m(...) __riscv_vsoxseg3ei32_v_u16mf4_m(__VA_ARGS__)
11249
#define vsoxseg4ei32_v_u16mf4_m(...) __riscv_vsoxseg4ei32_v_u16mf4_m(__VA_ARGS__)
11250
#define vsoxseg5ei32_v_u16mf4_m(...) __riscv_vsoxseg5ei32_v_u16mf4_m(__VA_ARGS__)
11251
#define vsoxseg6ei32_v_u16mf4_m(...) __riscv_vsoxseg6ei32_v_u16mf4_m(__VA_ARGS__)
11252
#define vsoxseg7ei32_v_u16mf4_m(...) __riscv_vsoxseg7ei32_v_u16mf4_m(__VA_ARGS__)
11253
#define vsoxseg8ei32_v_u16mf4_m(...) __riscv_vsoxseg8ei32_v_u16mf4_m(__VA_ARGS__)
11254
#define vsoxseg2ei32_v_u16mf2_m(...) __riscv_vsoxseg2ei32_v_u16mf2_m(__VA_ARGS__)
11255
#define vsoxseg3ei32_v_u16mf2_m(...) __riscv_vsoxseg3ei32_v_u16mf2_m(__VA_ARGS__)
11256
#define vsoxseg4ei32_v_u16mf2_m(...) __riscv_vsoxseg4ei32_v_u16mf2_m(__VA_ARGS__)
11257
#define vsoxseg5ei32_v_u16mf2_m(...) __riscv_vsoxseg5ei32_v_u16mf2_m(__VA_ARGS__)
11258
#define vsoxseg6ei32_v_u16mf2_m(...) __riscv_vsoxseg6ei32_v_u16mf2_m(__VA_ARGS__)
11259
#define vsoxseg7ei32_v_u16mf2_m(...) __riscv_vsoxseg7ei32_v_u16mf2_m(__VA_ARGS__)
11260
#define vsoxseg8ei32_v_u16mf2_m(...) __riscv_vsoxseg8ei32_v_u16mf2_m(__VA_ARGS__)
11261
#define vsoxseg2ei32_v_u16m1_m(...) __riscv_vsoxseg2ei32_v_u16m1_m(__VA_ARGS__)
11262
#define vsoxseg3ei32_v_u16m1_m(...) __riscv_vsoxseg3ei32_v_u16m1_m(__VA_ARGS__)
11263
#define vsoxseg4ei32_v_u16m1_m(...) __riscv_vsoxseg4ei32_v_u16m1_m(__VA_ARGS__)
11264
#define vsoxseg5ei32_v_u16m1_m(...) __riscv_vsoxseg5ei32_v_u16m1_m(__VA_ARGS__)
11265
#define vsoxseg6ei32_v_u16m1_m(...) __riscv_vsoxseg6ei32_v_u16m1_m(__VA_ARGS__)
11266
#define vsoxseg7ei32_v_u16m1_m(...) __riscv_vsoxseg7ei32_v_u16m1_m(__VA_ARGS__)
11267
#define vsoxseg8ei32_v_u16m1_m(...) __riscv_vsoxseg8ei32_v_u16m1_m(__VA_ARGS__)
11268
#define vsoxseg2ei32_v_u16m2_m(...) __riscv_vsoxseg2ei32_v_u16m2_m(__VA_ARGS__)
11269
#define vsoxseg3ei32_v_u16m2_m(...) __riscv_vsoxseg3ei32_v_u16m2_m(__VA_ARGS__)
11270
#define vsoxseg4ei32_v_u16m2_m(...) __riscv_vsoxseg4ei32_v_u16m2_m(__VA_ARGS__)
11271
#define vsoxseg2ei32_v_u16m4_m(...) __riscv_vsoxseg2ei32_v_u16m4_m(__VA_ARGS__)
11272
#define vsoxseg2ei64_v_u16mf4_m(...) __riscv_vsoxseg2ei64_v_u16mf4_m(__VA_ARGS__)
11273
#define vsoxseg3ei64_v_u16mf4_m(...) __riscv_vsoxseg3ei64_v_u16mf4_m(__VA_ARGS__)
11274
#define vsoxseg4ei64_v_u16mf4_m(...) __riscv_vsoxseg4ei64_v_u16mf4_m(__VA_ARGS__)
11275
#define vsoxseg5ei64_v_u16mf4_m(...) __riscv_vsoxseg5ei64_v_u16mf4_m(__VA_ARGS__)
11276
#define vsoxseg6ei64_v_u16mf4_m(...) __riscv_vsoxseg6ei64_v_u16mf4_m(__VA_ARGS__)
11277
#define vsoxseg7ei64_v_u16mf4_m(...) __riscv_vsoxseg7ei64_v_u16mf4_m(__VA_ARGS__)
11278
#define vsoxseg8ei64_v_u16mf4_m(...) __riscv_vsoxseg8ei64_v_u16mf4_m(__VA_ARGS__)
11279
#define vsoxseg2ei64_v_u16mf2_m(...) __riscv_vsoxseg2ei64_v_u16mf2_m(__VA_ARGS__)
11280
#define vsoxseg3ei64_v_u16mf2_m(...) __riscv_vsoxseg3ei64_v_u16mf2_m(__VA_ARGS__)
11281
#define vsoxseg4ei64_v_u16mf2_m(...) __riscv_vsoxseg4ei64_v_u16mf2_m(__VA_ARGS__)
11282
#define vsoxseg5ei64_v_u16mf2_m(...) __riscv_vsoxseg5ei64_v_u16mf2_m(__VA_ARGS__)
11283
#define vsoxseg6ei64_v_u16mf2_m(...) __riscv_vsoxseg6ei64_v_u16mf2_m(__VA_ARGS__)
11284
#define vsoxseg7ei64_v_u16mf2_m(...) __riscv_vsoxseg7ei64_v_u16mf2_m(__VA_ARGS__)
11285
#define vsoxseg8ei64_v_u16mf2_m(...) __riscv_vsoxseg8ei64_v_u16mf2_m(__VA_ARGS__)
11286
#define vsoxseg2ei64_v_u16m1_m(...) __riscv_vsoxseg2ei64_v_u16m1_m(__VA_ARGS__)
11287
#define vsoxseg3ei64_v_u16m1_m(...) __riscv_vsoxseg3ei64_v_u16m1_m(__VA_ARGS__)
11288
#define vsoxseg4ei64_v_u16m1_m(...) __riscv_vsoxseg4ei64_v_u16m1_m(__VA_ARGS__)
11289
#define vsoxseg5ei64_v_u16m1_m(...) __riscv_vsoxseg5ei64_v_u16m1_m(__VA_ARGS__)
11290
#define vsoxseg6ei64_v_u16m1_m(...) __riscv_vsoxseg6ei64_v_u16m1_m(__VA_ARGS__)
11291
#define vsoxseg7ei64_v_u16m1_m(...) __riscv_vsoxseg7ei64_v_u16m1_m(__VA_ARGS__)
11292
#define vsoxseg8ei64_v_u16m1_m(...) __riscv_vsoxseg8ei64_v_u16m1_m(__VA_ARGS__)
11293
#define vsoxseg2ei64_v_u16m2_m(...) __riscv_vsoxseg2ei64_v_u16m2_m(__VA_ARGS__)
11294
#define vsoxseg3ei64_v_u16m2_m(...) __riscv_vsoxseg3ei64_v_u16m2_m(__VA_ARGS__)
11295
#define vsoxseg4ei64_v_u16m2_m(...) __riscv_vsoxseg4ei64_v_u16m2_m(__VA_ARGS__)
11296
#define vsoxseg2ei8_v_u32mf2_m(...) __riscv_vsoxseg2ei8_v_u32mf2_m(__VA_ARGS__)
11297
#define vsoxseg3ei8_v_u32mf2_m(...) __riscv_vsoxseg3ei8_v_u32mf2_m(__VA_ARGS__)
11298
#define vsoxseg4ei8_v_u32mf2_m(...) __riscv_vsoxseg4ei8_v_u32mf2_m(__VA_ARGS__)
11299
#define vsoxseg5ei8_v_u32mf2_m(...) __riscv_vsoxseg5ei8_v_u32mf2_m(__VA_ARGS__)
11300
#define vsoxseg6ei8_v_u32mf2_m(...) __riscv_vsoxseg6ei8_v_u32mf2_m(__VA_ARGS__)
11301
#define vsoxseg7ei8_v_u32mf2_m(...) __riscv_vsoxseg7ei8_v_u32mf2_m(__VA_ARGS__)
11302
#define vsoxseg8ei8_v_u32mf2_m(...) __riscv_vsoxseg8ei8_v_u32mf2_m(__VA_ARGS__)
11303
#define vsoxseg2ei8_v_u32m1_m(...) __riscv_vsoxseg2ei8_v_u32m1_m(__VA_ARGS__)
11304
#define vsoxseg3ei8_v_u32m1_m(...) __riscv_vsoxseg3ei8_v_u32m1_m(__VA_ARGS__)
11305
#define vsoxseg4ei8_v_u32m1_m(...) __riscv_vsoxseg4ei8_v_u32m1_m(__VA_ARGS__)
11306
#define vsoxseg5ei8_v_u32m1_m(...) __riscv_vsoxseg5ei8_v_u32m1_m(__VA_ARGS__)
11307
#define vsoxseg6ei8_v_u32m1_m(...) __riscv_vsoxseg6ei8_v_u32m1_m(__VA_ARGS__)
11308
#define vsoxseg7ei8_v_u32m1_m(...) __riscv_vsoxseg7ei8_v_u32m1_m(__VA_ARGS__)
11309
#define vsoxseg8ei8_v_u32m1_m(...) __riscv_vsoxseg8ei8_v_u32m1_m(__VA_ARGS__)
11310
#define vsoxseg2ei8_v_u32m2_m(...) __riscv_vsoxseg2ei8_v_u32m2_m(__VA_ARGS__)
11311
#define vsoxseg3ei8_v_u32m2_m(...) __riscv_vsoxseg3ei8_v_u32m2_m(__VA_ARGS__)
11312
#define vsoxseg4ei8_v_u32m2_m(...) __riscv_vsoxseg4ei8_v_u32m2_m(__VA_ARGS__)
11313
#define vsoxseg2ei8_v_u32m4_m(...) __riscv_vsoxseg2ei8_v_u32m4_m(__VA_ARGS__)
11314
#define vsoxseg2ei16_v_u32mf2_m(...) __riscv_vsoxseg2ei16_v_u32mf2_m(__VA_ARGS__)
11315
#define vsoxseg3ei16_v_u32mf2_m(...) __riscv_vsoxseg3ei16_v_u32mf2_m(__VA_ARGS__)
11316
#define vsoxseg4ei16_v_u32mf2_m(...) __riscv_vsoxseg4ei16_v_u32mf2_m(__VA_ARGS__)
11317
#define vsoxseg5ei16_v_u32mf2_m(...) __riscv_vsoxseg5ei16_v_u32mf2_m(__VA_ARGS__)
11318
#define vsoxseg6ei16_v_u32mf2_m(...) __riscv_vsoxseg6ei16_v_u32mf2_m(__VA_ARGS__)
11319
#define vsoxseg7ei16_v_u32mf2_m(...) __riscv_vsoxseg7ei16_v_u32mf2_m(__VA_ARGS__)
11320
#define vsoxseg8ei16_v_u32mf2_m(...) __riscv_vsoxseg8ei16_v_u32mf2_m(__VA_ARGS__)
11321
#define vsoxseg2ei16_v_u32m1_m(...) __riscv_vsoxseg2ei16_v_u32m1_m(__VA_ARGS__)
11322
#define vsoxseg3ei16_v_u32m1_m(...) __riscv_vsoxseg3ei16_v_u32m1_m(__VA_ARGS__)
11323
#define vsoxseg4ei16_v_u32m1_m(...) __riscv_vsoxseg4ei16_v_u32m1_m(__VA_ARGS__)
11324
#define vsoxseg5ei16_v_u32m1_m(...) __riscv_vsoxseg5ei16_v_u32m1_m(__VA_ARGS__)
11325
#define vsoxseg6ei16_v_u32m1_m(...) __riscv_vsoxseg6ei16_v_u32m1_m(__VA_ARGS__)
11326
#define vsoxseg7ei16_v_u32m1_m(...) __riscv_vsoxseg7ei16_v_u32m1_m(__VA_ARGS__)
11327
#define vsoxseg8ei16_v_u32m1_m(...) __riscv_vsoxseg8ei16_v_u32m1_m(__VA_ARGS__)
11328
#define vsoxseg2ei16_v_u32m2_m(...) __riscv_vsoxseg2ei16_v_u32m2_m(__VA_ARGS__)
11329
#define vsoxseg3ei16_v_u32m2_m(...) __riscv_vsoxseg3ei16_v_u32m2_m(__VA_ARGS__)
11330
#define vsoxseg4ei16_v_u32m2_m(...) __riscv_vsoxseg4ei16_v_u32m2_m(__VA_ARGS__)
11331
#define vsoxseg2ei16_v_u32m4_m(...) __riscv_vsoxseg2ei16_v_u32m4_m(__VA_ARGS__)
11332
#define vsoxseg2ei32_v_u32mf2_m(...) __riscv_vsoxseg2ei32_v_u32mf2_m(__VA_ARGS__)
11333
#define vsoxseg3ei32_v_u32mf2_m(...) __riscv_vsoxseg3ei32_v_u32mf2_m(__VA_ARGS__)
11334
#define vsoxseg4ei32_v_u32mf2_m(...) __riscv_vsoxseg4ei32_v_u32mf2_m(__VA_ARGS__)
11335
#define vsoxseg5ei32_v_u32mf2_m(...) __riscv_vsoxseg5ei32_v_u32mf2_m(__VA_ARGS__)
11336
#define vsoxseg6ei32_v_u32mf2_m(...) __riscv_vsoxseg6ei32_v_u32mf2_m(__VA_ARGS__)
11337
#define vsoxseg7ei32_v_u32mf2_m(...) __riscv_vsoxseg7ei32_v_u32mf2_m(__VA_ARGS__)
11338
#define vsoxseg8ei32_v_u32mf2_m(...) __riscv_vsoxseg8ei32_v_u32mf2_m(__VA_ARGS__)
11339
#define vsoxseg2ei32_v_u32m1_m(...) __riscv_vsoxseg2ei32_v_u32m1_m(__VA_ARGS__)
11340
#define vsoxseg3ei32_v_u32m1_m(...) __riscv_vsoxseg3ei32_v_u32m1_m(__VA_ARGS__)
11341
#define vsoxseg4ei32_v_u32m1_m(...) __riscv_vsoxseg4ei32_v_u32m1_m(__VA_ARGS__)
11342
#define vsoxseg5ei32_v_u32m1_m(...) __riscv_vsoxseg5ei32_v_u32m1_m(__VA_ARGS__)
11343
#define vsoxseg6ei32_v_u32m1_m(...) __riscv_vsoxseg6ei32_v_u32m1_m(__VA_ARGS__)
11344
#define vsoxseg7ei32_v_u32m1_m(...) __riscv_vsoxseg7ei32_v_u32m1_m(__VA_ARGS__)
11345
#define vsoxseg8ei32_v_u32m1_m(...) __riscv_vsoxseg8ei32_v_u32m1_m(__VA_ARGS__)
11346
#define vsoxseg2ei32_v_u32m2_m(...) __riscv_vsoxseg2ei32_v_u32m2_m(__VA_ARGS__)
11347
#define vsoxseg3ei32_v_u32m2_m(...) __riscv_vsoxseg3ei32_v_u32m2_m(__VA_ARGS__)
11348
#define vsoxseg4ei32_v_u32m2_m(...) __riscv_vsoxseg4ei32_v_u32m2_m(__VA_ARGS__)
11349
#define vsoxseg2ei32_v_u32m4_m(...) __riscv_vsoxseg2ei32_v_u32m4_m(__VA_ARGS__)
11350
#define vsoxseg2ei64_v_u32mf2_m(...) __riscv_vsoxseg2ei64_v_u32mf2_m(__VA_ARGS__)
11351
#define vsoxseg3ei64_v_u32mf2_m(...) __riscv_vsoxseg3ei64_v_u32mf2_m(__VA_ARGS__)
11352
#define vsoxseg4ei64_v_u32mf2_m(...) __riscv_vsoxseg4ei64_v_u32mf2_m(__VA_ARGS__)
11353
#define vsoxseg5ei64_v_u32mf2_m(...) __riscv_vsoxseg5ei64_v_u32mf2_m(__VA_ARGS__)
11354
#define vsoxseg6ei64_v_u32mf2_m(...) __riscv_vsoxseg6ei64_v_u32mf2_m(__VA_ARGS__)
11355
#define vsoxseg7ei64_v_u32mf2_m(...) __riscv_vsoxseg7ei64_v_u32mf2_m(__VA_ARGS__)
11356
#define vsoxseg8ei64_v_u32mf2_m(...) __riscv_vsoxseg8ei64_v_u32mf2_m(__VA_ARGS__)
11357
#define vsoxseg2ei64_v_u32m1_m(...) __riscv_vsoxseg2ei64_v_u32m1_m(__VA_ARGS__)
11358
#define vsoxseg3ei64_v_u32m1_m(...) __riscv_vsoxseg3ei64_v_u32m1_m(__VA_ARGS__)
11359
#define vsoxseg4ei64_v_u32m1_m(...) __riscv_vsoxseg4ei64_v_u32m1_m(__VA_ARGS__)
11360
#define vsoxseg5ei64_v_u32m1_m(...) __riscv_vsoxseg5ei64_v_u32m1_m(__VA_ARGS__)
11361
#define vsoxseg6ei64_v_u32m1_m(...) __riscv_vsoxseg6ei64_v_u32m1_m(__VA_ARGS__)
11362
#define vsoxseg7ei64_v_u32m1_m(...) __riscv_vsoxseg7ei64_v_u32m1_m(__VA_ARGS__)
11363
#define vsoxseg8ei64_v_u32m1_m(...) __riscv_vsoxseg8ei64_v_u32m1_m(__VA_ARGS__)
11364
#define vsoxseg2ei64_v_u32m2_m(...) __riscv_vsoxseg2ei64_v_u32m2_m(__VA_ARGS__)
11365
#define vsoxseg3ei64_v_u32m2_m(...) __riscv_vsoxseg3ei64_v_u32m2_m(__VA_ARGS__)
11366
#define vsoxseg4ei64_v_u32m2_m(...) __riscv_vsoxseg4ei64_v_u32m2_m(__VA_ARGS__)
11367
#define vsoxseg2ei64_v_u32m4_m(...) __riscv_vsoxseg2ei64_v_u32m4_m(__VA_ARGS__)
11368
#define vsoxseg2ei8_v_u64m1_m(...) __riscv_vsoxseg2ei8_v_u64m1_m(__VA_ARGS__)
11369
#define vsoxseg3ei8_v_u64m1_m(...) __riscv_vsoxseg3ei8_v_u64m1_m(__VA_ARGS__)
11370
#define vsoxseg4ei8_v_u64m1_m(...) __riscv_vsoxseg4ei8_v_u64m1_m(__VA_ARGS__)
11371
#define vsoxseg5ei8_v_u64m1_m(...) __riscv_vsoxseg5ei8_v_u64m1_m(__VA_ARGS__)
11372
#define vsoxseg6ei8_v_u64m1_m(...) __riscv_vsoxseg6ei8_v_u64m1_m(__VA_ARGS__)
11373
#define vsoxseg7ei8_v_u64m1_m(...) __riscv_vsoxseg7ei8_v_u64m1_m(__VA_ARGS__)
11374
#define vsoxseg8ei8_v_u64m1_m(...) __riscv_vsoxseg8ei8_v_u64m1_m(__VA_ARGS__)
11375
#define vsoxseg2ei8_v_u64m2_m(...) __riscv_vsoxseg2ei8_v_u64m2_m(__VA_ARGS__)
11376
#define vsoxseg3ei8_v_u64m2_m(...) __riscv_vsoxseg3ei8_v_u64m2_m(__VA_ARGS__)
11377
#define vsoxseg4ei8_v_u64m2_m(...) __riscv_vsoxseg4ei8_v_u64m2_m(__VA_ARGS__)
11378
#define vsoxseg2ei8_v_u64m4_m(...) __riscv_vsoxseg2ei8_v_u64m4_m(__VA_ARGS__)
11379
#define vsoxseg2ei16_v_u64m1_m(...) __riscv_vsoxseg2ei16_v_u64m1_m(__VA_ARGS__)
11380
#define vsoxseg3ei16_v_u64m1_m(...) __riscv_vsoxseg3ei16_v_u64m1_m(__VA_ARGS__)
11381
#define vsoxseg4ei16_v_u64m1_m(...) __riscv_vsoxseg4ei16_v_u64m1_m(__VA_ARGS__)
11382
#define vsoxseg5ei16_v_u64m1_m(...) __riscv_vsoxseg5ei16_v_u64m1_m(__VA_ARGS__)
11383
#define vsoxseg6ei16_v_u64m1_m(...) __riscv_vsoxseg6ei16_v_u64m1_m(__VA_ARGS__)
11384
#define vsoxseg7ei16_v_u64m1_m(...) __riscv_vsoxseg7ei16_v_u64m1_m(__VA_ARGS__)
11385
#define vsoxseg8ei16_v_u64m1_m(...) __riscv_vsoxseg8ei16_v_u64m1_m(__VA_ARGS__)
11386
#define vsoxseg2ei16_v_u64m2_m(...) __riscv_vsoxseg2ei16_v_u64m2_m(__VA_ARGS__)
11387
#define vsoxseg3ei16_v_u64m2_m(...) __riscv_vsoxseg3ei16_v_u64m2_m(__VA_ARGS__)
11388
#define vsoxseg4ei16_v_u64m2_m(...) __riscv_vsoxseg4ei16_v_u64m2_m(__VA_ARGS__)
11389
#define vsoxseg2ei16_v_u64m4_m(...) __riscv_vsoxseg2ei16_v_u64m4_m(__VA_ARGS__)
11390
#define vsoxseg2ei32_v_u64m1_m(...) __riscv_vsoxseg2ei32_v_u64m1_m(__VA_ARGS__)
11391
#define vsoxseg3ei32_v_u64m1_m(...) __riscv_vsoxseg3ei32_v_u64m1_m(__VA_ARGS__)
11392
#define vsoxseg4ei32_v_u64m1_m(...) __riscv_vsoxseg4ei32_v_u64m1_m(__VA_ARGS__)
11393
#define vsoxseg5ei32_v_u64m1_m(...) __riscv_vsoxseg5ei32_v_u64m1_m(__VA_ARGS__)
11394
#define vsoxseg6ei32_v_u64m1_m(...) __riscv_vsoxseg6ei32_v_u64m1_m(__VA_ARGS__)
11395
#define vsoxseg7ei32_v_u64m1_m(...) __riscv_vsoxseg7ei32_v_u64m1_m(__VA_ARGS__)
11396
#define vsoxseg8ei32_v_u64m1_m(...) __riscv_vsoxseg8ei32_v_u64m1_m(__VA_ARGS__)
11397
#define vsoxseg2ei32_v_u64m2_m(...) __riscv_vsoxseg2ei32_v_u64m2_m(__VA_ARGS__)
11398
#define vsoxseg3ei32_v_u64m2_m(...) __riscv_vsoxseg3ei32_v_u64m2_m(__VA_ARGS__)
11399
#define vsoxseg4ei32_v_u64m2_m(...) __riscv_vsoxseg4ei32_v_u64m2_m(__VA_ARGS__)
11400
#define vsoxseg2ei32_v_u64m4_m(...) __riscv_vsoxseg2ei32_v_u64m4_m(__VA_ARGS__)
11401
#define vsoxseg2ei64_v_u64m1_m(...) __riscv_vsoxseg2ei64_v_u64m1_m(__VA_ARGS__)
11402
#define vsoxseg3ei64_v_u64m1_m(...) __riscv_vsoxseg3ei64_v_u64m1_m(__VA_ARGS__)
11403
#define vsoxseg4ei64_v_u64m1_m(...) __riscv_vsoxseg4ei64_v_u64m1_m(__VA_ARGS__)
11404
#define vsoxseg5ei64_v_u64m1_m(...) __riscv_vsoxseg5ei64_v_u64m1_m(__VA_ARGS__)
11405
#define vsoxseg6ei64_v_u64m1_m(...) __riscv_vsoxseg6ei64_v_u64m1_m(__VA_ARGS__)
11406
#define vsoxseg7ei64_v_u64m1_m(...) __riscv_vsoxseg7ei64_v_u64m1_m(__VA_ARGS__)
11407
#define vsoxseg8ei64_v_u64m1_m(...) __riscv_vsoxseg8ei64_v_u64m1_m(__VA_ARGS__)
11408
#define vsoxseg2ei64_v_u64m2_m(...) __riscv_vsoxseg2ei64_v_u64m2_m(__VA_ARGS__)
11409
#define vsoxseg3ei64_v_u64m2_m(...) __riscv_vsoxseg3ei64_v_u64m2_m(__VA_ARGS__)
11410
#define vsoxseg4ei64_v_u64m2_m(...) __riscv_vsoxseg4ei64_v_u64m2_m(__VA_ARGS__)
11411
#define vsoxseg2ei64_v_u64m4_m(...) __riscv_vsoxseg2ei64_v_u64m4_m(__VA_ARGS__)
11412
#define vsuxseg2ei8_v_u8mf8_m(...) __riscv_vsuxseg2ei8_v_u8mf8_m(__VA_ARGS__)
11413
#define vsuxseg3ei8_v_u8mf8_m(...) __riscv_vsuxseg3ei8_v_u8mf8_m(__VA_ARGS__)
11414
#define vsuxseg4ei8_v_u8mf8_m(...) __riscv_vsuxseg4ei8_v_u8mf8_m(__VA_ARGS__)
11415
#define vsuxseg5ei8_v_u8mf8_m(...) __riscv_vsuxseg5ei8_v_u8mf8_m(__VA_ARGS__)
11416
#define vsuxseg6ei8_v_u8mf8_m(...) __riscv_vsuxseg6ei8_v_u8mf8_m(__VA_ARGS__)
11417
#define vsuxseg7ei8_v_u8mf8_m(...) __riscv_vsuxseg7ei8_v_u8mf8_m(__VA_ARGS__)
11418
#define vsuxseg8ei8_v_u8mf8_m(...) __riscv_vsuxseg8ei8_v_u8mf8_m(__VA_ARGS__)
11419
#define vsuxseg2ei8_v_u8mf4_m(...) __riscv_vsuxseg2ei8_v_u8mf4_m(__VA_ARGS__)
11420
#define vsuxseg3ei8_v_u8mf4_m(...) __riscv_vsuxseg3ei8_v_u8mf4_m(__VA_ARGS__)
11421
#define vsuxseg4ei8_v_u8mf4_m(...) __riscv_vsuxseg4ei8_v_u8mf4_m(__VA_ARGS__)
11422
#define vsuxseg5ei8_v_u8mf4_m(...) __riscv_vsuxseg5ei8_v_u8mf4_m(__VA_ARGS__)
11423
#define vsuxseg6ei8_v_u8mf4_m(...) __riscv_vsuxseg6ei8_v_u8mf4_m(__VA_ARGS__)
11424
#define vsuxseg7ei8_v_u8mf4_m(...) __riscv_vsuxseg7ei8_v_u8mf4_m(__VA_ARGS__)
11425
#define vsuxseg8ei8_v_u8mf4_m(...) __riscv_vsuxseg8ei8_v_u8mf4_m(__VA_ARGS__)
11426
#define vsuxseg2ei8_v_u8mf2_m(...) __riscv_vsuxseg2ei8_v_u8mf2_m(__VA_ARGS__)
11427
#define vsuxseg3ei8_v_u8mf2_m(...) __riscv_vsuxseg3ei8_v_u8mf2_m(__VA_ARGS__)
11428
#define vsuxseg4ei8_v_u8mf2_m(...) __riscv_vsuxseg4ei8_v_u8mf2_m(__VA_ARGS__)
11429
#define vsuxseg5ei8_v_u8mf2_m(...) __riscv_vsuxseg5ei8_v_u8mf2_m(__VA_ARGS__)
11430
#define vsuxseg6ei8_v_u8mf2_m(...) __riscv_vsuxseg6ei8_v_u8mf2_m(__VA_ARGS__)
11431
#define vsuxseg7ei8_v_u8mf2_m(...) __riscv_vsuxseg7ei8_v_u8mf2_m(__VA_ARGS__)
11432
#define vsuxseg8ei8_v_u8mf2_m(...) __riscv_vsuxseg8ei8_v_u8mf2_m(__VA_ARGS__)
11433
#define vsuxseg2ei8_v_u8m1_m(...) __riscv_vsuxseg2ei8_v_u8m1_m(__VA_ARGS__)
11434
#define vsuxseg3ei8_v_u8m1_m(...) __riscv_vsuxseg3ei8_v_u8m1_m(__VA_ARGS__)
11435
#define vsuxseg4ei8_v_u8m1_m(...) __riscv_vsuxseg4ei8_v_u8m1_m(__VA_ARGS__)
11436
#define vsuxseg5ei8_v_u8m1_m(...) __riscv_vsuxseg5ei8_v_u8m1_m(__VA_ARGS__)
11437
#define vsuxseg6ei8_v_u8m1_m(...) __riscv_vsuxseg6ei8_v_u8m1_m(__VA_ARGS__)
11438
#define vsuxseg7ei8_v_u8m1_m(...) __riscv_vsuxseg7ei8_v_u8m1_m(__VA_ARGS__)
11439
#define vsuxseg8ei8_v_u8m1_m(...) __riscv_vsuxseg8ei8_v_u8m1_m(__VA_ARGS__)
11440
#define vsuxseg2ei8_v_u8m2_m(...) __riscv_vsuxseg2ei8_v_u8m2_m(__VA_ARGS__)
11441
#define vsuxseg3ei8_v_u8m2_m(...) __riscv_vsuxseg3ei8_v_u8m2_m(__VA_ARGS__)
11442
#define vsuxseg4ei8_v_u8m2_m(...) __riscv_vsuxseg4ei8_v_u8m2_m(__VA_ARGS__)
11443
#define vsuxseg2ei8_v_u8m4_m(...) __riscv_vsuxseg2ei8_v_u8m4_m(__VA_ARGS__)
11444
#define vsuxseg2ei16_v_u8mf8_m(...) __riscv_vsuxseg2ei16_v_u8mf8_m(__VA_ARGS__)
11445
#define vsuxseg3ei16_v_u8mf8_m(...) __riscv_vsuxseg3ei16_v_u8mf8_m(__VA_ARGS__)
11446
#define vsuxseg4ei16_v_u8mf8_m(...) __riscv_vsuxseg4ei16_v_u8mf8_m(__VA_ARGS__)
11447
#define vsuxseg5ei16_v_u8mf8_m(...) __riscv_vsuxseg5ei16_v_u8mf8_m(__VA_ARGS__)
11448
#define vsuxseg6ei16_v_u8mf8_m(...) __riscv_vsuxseg6ei16_v_u8mf8_m(__VA_ARGS__)
11449
#define vsuxseg7ei16_v_u8mf8_m(...) __riscv_vsuxseg7ei16_v_u8mf8_m(__VA_ARGS__)
11450
#define vsuxseg8ei16_v_u8mf8_m(...) __riscv_vsuxseg8ei16_v_u8mf8_m(__VA_ARGS__)
11451
#define vsuxseg2ei16_v_u8mf4_m(...) __riscv_vsuxseg2ei16_v_u8mf4_m(__VA_ARGS__)
11452
#define vsuxseg3ei16_v_u8mf4_m(...) __riscv_vsuxseg3ei16_v_u8mf4_m(__VA_ARGS__)
11453
#define vsuxseg4ei16_v_u8mf4_m(...) __riscv_vsuxseg4ei16_v_u8mf4_m(__VA_ARGS__)
11454
#define vsuxseg5ei16_v_u8mf4_m(...) __riscv_vsuxseg5ei16_v_u8mf4_m(__VA_ARGS__)
11455
#define vsuxseg6ei16_v_u8mf4_m(...) __riscv_vsuxseg6ei16_v_u8mf4_m(__VA_ARGS__)
11456
#define vsuxseg7ei16_v_u8mf4_m(...) __riscv_vsuxseg7ei16_v_u8mf4_m(__VA_ARGS__)
11457
#define vsuxseg8ei16_v_u8mf4_m(...) __riscv_vsuxseg8ei16_v_u8mf4_m(__VA_ARGS__)
11458
#define vsuxseg2ei16_v_u8mf2_m(...) __riscv_vsuxseg2ei16_v_u8mf2_m(__VA_ARGS__)
11459
#define vsuxseg3ei16_v_u8mf2_m(...) __riscv_vsuxseg3ei16_v_u8mf2_m(__VA_ARGS__)
11460
#define vsuxseg4ei16_v_u8mf2_m(...) __riscv_vsuxseg4ei16_v_u8mf2_m(__VA_ARGS__)
11461
#define vsuxseg5ei16_v_u8mf2_m(...) __riscv_vsuxseg5ei16_v_u8mf2_m(__VA_ARGS__)
11462
#define vsuxseg6ei16_v_u8mf2_m(...) __riscv_vsuxseg6ei16_v_u8mf2_m(__VA_ARGS__)
11463
#define vsuxseg7ei16_v_u8mf2_m(...) __riscv_vsuxseg7ei16_v_u8mf2_m(__VA_ARGS__)
11464
#define vsuxseg8ei16_v_u8mf2_m(...) __riscv_vsuxseg8ei16_v_u8mf2_m(__VA_ARGS__)
11465
#define vsuxseg2ei16_v_u8m1_m(...) __riscv_vsuxseg2ei16_v_u8m1_m(__VA_ARGS__)
11466
#define vsuxseg3ei16_v_u8m1_m(...) __riscv_vsuxseg3ei16_v_u8m1_m(__VA_ARGS__)
11467
#define vsuxseg4ei16_v_u8m1_m(...) __riscv_vsuxseg4ei16_v_u8m1_m(__VA_ARGS__)
11468
#define vsuxseg5ei16_v_u8m1_m(...) __riscv_vsuxseg5ei16_v_u8m1_m(__VA_ARGS__)
11469
#define vsuxseg6ei16_v_u8m1_m(...) __riscv_vsuxseg6ei16_v_u8m1_m(__VA_ARGS__)
11470
#define vsuxseg7ei16_v_u8m1_m(...) __riscv_vsuxseg7ei16_v_u8m1_m(__VA_ARGS__)
11471
#define vsuxseg8ei16_v_u8m1_m(...) __riscv_vsuxseg8ei16_v_u8m1_m(__VA_ARGS__)
11472
#define vsuxseg2ei16_v_u8m2_m(...) __riscv_vsuxseg2ei16_v_u8m2_m(__VA_ARGS__)
11473
#define vsuxseg3ei16_v_u8m2_m(...) __riscv_vsuxseg3ei16_v_u8m2_m(__VA_ARGS__)
11474
#define vsuxseg4ei16_v_u8m2_m(...) __riscv_vsuxseg4ei16_v_u8m2_m(__VA_ARGS__)
11475
#define vsuxseg2ei16_v_u8m4_m(...) __riscv_vsuxseg2ei16_v_u8m4_m(__VA_ARGS__)
11476
#define vsuxseg2ei32_v_u8mf8_m(...) __riscv_vsuxseg2ei32_v_u8mf8_m(__VA_ARGS__)
11477
#define vsuxseg3ei32_v_u8mf8_m(...) __riscv_vsuxseg3ei32_v_u8mf8_m(__VA_ARGS__)
11478
#define vsuxseg4ei32_v_u8mf8_m(...) __riscv_vsuxseg4ei32_v_u8mf8_m(__VA_ARGS__)
11479
#define vsuxseg5ei32_v_u8mf8_m(...) __riscv_vsuxseg5ei32_v_u8mf8_m(__VA_ARGS__)
11480
#define vsuxseg6ei32_v_u8mf8_m(...) __riscv_vsuxseg6ei32_v_u8mf8_m(__VA_ARGS__)
11481
#define vsuxseg7ei32_v_u8mf8_m(...) __riscv_vsuxseg7ei32_v_u8mf8_m(__VA_ARGS__)
11482
#define vsuxseg8ei32_v_u8mf8_m(...) __riscv_vsuxseg8ei32_v_u8mf8_m(__VA_ARGS__)
11483
#define vsuxseg2ei32_v_u8mf4_m(...) __riscv_vsuxseg2ei32_v_u8mf4_m(__VA_ARGS__)
11484
#define vsuxseg3ei32_v_u8mf4_m(...) __riscv_vsuxseg3ei32_v_u8mf4_m(__VA_ARGS__)
11485
#define vsuxseg4ei32_v_u8mf4_m(...) __riscv_vsuxseg4ei32_v_u8mf4_m(__VA_ARGS__)
11486
#define vsuxseg5ei32_v_u8mf4_m(...) __riscv_vsuxseg5ei32_v_u8mf4_m(__VA_ARGS__)
11487
#define vsuxseg6ei32_v_u8mf4_m(...) __riscv_vsuxseg6ei32_v_u8mf4_m(__VA_ARGS__)
11488
#define vsuxseg7ei32_v_u8mf4_m(...) __riscv_vsuxseg7ei32_v_u8mf4_m(__VA_ARGS__)
11489
#define vsuxseg8ei32_v_u8mf4_m(...) __riscv_vsuxseg8ei32_v_u8mf4_m(__VA_ARGS__)
11490
#define vsuxseg2ei32_v_u8mf2_m(...) __riscv_vsuxseg2ei32_v_u8mf2_m(__VA_ARGS__)
11491
#define vsuxseg3ei32_v_u8mf2_m(...) __riscv_vsuxseg3ei32_v_u8mf2_m(__VA_ARGS__)
11492
#define vsuxseg4ei32_v_u8mf2_m(...) __riscv_vsuxseg4ei32_v_u8mf2_m(__VA_ARGS__)
11493
#define vsuxseg5ei32_v_u8mf2_m(...) __riscv_vsuxseg5ei32_v_u8mf2_m(__VA_ARGS__)
11494
#define vsuxseg6ei32_v_u8mf2_m(...) __riscv_vsuxseg6ei32_v_u8mf2_m(__VA_ARGS__)
11495
#define vsuxseg7ei32_v_u8mf2_m(...) __riscv_vsuxseg7ei32_v_u8mf2_m(__VA_ARGS__)
11496
#define vsuxseg8ei32_v_u8mf2_m(...) __riscv_vsuxseg8ei32_v_u8mf2_m(__VA_ARGS__)
11497
#define vsuxseg2ei32_v_u8m1_m(...) __riscv_vsuxseg2ei32_v_u8m1_m(__VA_ARGS__)
11498
#define vsuxseg3ei32_v_u8m1_m(...) __riscv_vsuxseg3ei32_v_u8m1_m(__VA_ARGS__)
11499
#define vsuxseg4ei32_v_u8m1_m(...) __riscv_vsuxseg4ei32_v_u8m1_m(__VA_ARGS__)
11500
#define vsuxseg5ei32_v_u8m1_m(...) __riscv_vsuxseg5ei32_v_u8m1_m(__VA_ARGS__)
11501
#define vsuxseg6ei32_v_u8m1_m(...) __riscv_vsuxseg6ei32_v_u8m1_m(__VA_ARGS__)
11502
#define vsuxseg7ei32_v_u8m1_m(...) __riscv_vsuxseg7ei32_v_u8m1_m(__VA_ARGS__)
11503
#define vsuxseg8ei32_v_u8m1_m(...) __riscv_vsuxseg8ei32_v_u8m1_m(__VA_ARGS__)
11504
#define vsuxseg2ei32_v_u8m2_m(...) __riscv_vsuxseg2ei32_v_u8m2_m(__VA_ARGS__)
11505
#define vsuxseg3ei32_v_u8m2_m(...) __riscv_vsuxseg3ei32_v_u8m2_m(__VA_ARGS__)
11506
#define vsuxseg4ei32_v_u8m2_m(...) __riscv_vsuxseg4ei32_v_u8m2_m(__VA_ARGS__)
11507
#define vsuxseg2ei64_v_u8mf8_m(...) __riscv_vsuxseg2ei64_v_u8mf8_m(__VA_ARGS__)
11508
#define vsuxseg3ei64_v_u8mf8_m(...) __riscv_vsuxseg3ei64_v_u8mf8_m(__VA_ARGS__)
11509
#define vsuxseg4ei64_v_u8mf8_m(...) __riscv_vsuxseg4ei64_v_u8mf8_m(__VA_ARGS__)
11510
#define vsuxseg5ei64_v_u8mf8_m(...) __riscv_vsuxseg5ei64_v_u8mf8_m(__VA_ARGS__)
11511
#define vsuxseg6ei64_v_u8mf8_m(...) __riscv_vsuxseg6ei64_v_u8mf8_m(__VA_ARGS__)
11512
#define vsuxseg7ei64_v_u8mf8_m(...) __riscv_vsuxseg7ei64_v_u8mf8_m(__VA_ARGS__)
11513
#define vsuxseg8ei64_v_u8mf8_m(...) __riscv_vsuxseg8ei64_v_u8mf8_m(__VA_ARGS__)
11514
#define vsuxseg2ei64_v_u8mf4_m(...) __riscv_vsuxseg2ei64_v_u8mf4_m(__VA_ARGS__)
11515
#define vsuxseg3ei64_v_u8mf4_m(...) __riscv_vsuxseg3ei64_v_u8mf4_m(__VA_ARGS__)
11516
#define vsuxseg4ei64_v_u8mf4_m(...) __riscv_vsuxseg4ei64_v_u8mf4_m(__VA_ARGS__)
11517
#define vsuxseg5ei64_v_u8mf4_m(...) __riscv_vsuxseg5ei64_v_u8mf4_m(__VA_ARGS__)
11518
#define vsuxseg6ei64_v_u8mf4_m(...) __riscv_vsuxseg6ei64_v_u8mf4_m(__VA_ARGS__)
11519
#define vsuxseg7ei64_v_u8mf4_m(...) __riscv_vsuxseg7ei64_v_u8mf4_m(__VA_ARGS__)
11520
#define vsuxseg8ei64_v_u8mf4_m(...) __riscv_vsuxseg8ei64_v_u8mf4_m(__VA_ARGS__)
11521
#define vsuxseg2ei64_v_u8mf2_m(...) __riscv_vsuxseg2ei64_v_u8mf2_m(__VA_ARGS__)
11522
#define vsuxseg3ei64_v_u8mf2_m(...) __riscv_vsuxseg3ei64_v_u8mf2_m(__VA_ARGS__)
11523
#define vsuxseg4ei64_v_u8mf2_m(...) __riscv_vsuxseg4ei64_v_u8mf2_m(__VA_ARGS__)
11524
#define vsuxseg5ei64_v_u8mf2_m(...) __riscv_vsuxseg5ei64_v_u8mf2_m(__VA_ARGS__)
11525
#define vsuxseg6ei64_v_u8mf2_m(...) __riscv_vsuxseg6ei64_v_u8mf2_m(__VA_ARGS__)
11526
#define vsuxseg7ei64_v_u8mf2_m(...) __riscv_vsuxseg7ei64_v_u8mf2_m(__VA_ARGS__)
11527
#define vsuxseg8ei64_v_u8mf2_m(...) __riscv_vsuxseg8ei64_v_u8mf2_m(__VA_ARGS__)
11528
#define vsuxseg2ei64_v_u8m1_m(...) __riscv_vsuxseg2ei64_v_u8m1_m(__VA_ARGS__)
11529
#define vsuxseg3ei64_v_u8m1_m(...) __riscv_vsuxseg3ei64_v_u8m1_m(__VA_ARGS__)
11530
#define vsuxseg4ei64_v_u8m1_m(...) __riscv_vsuxseg4ei64_v_u8m1_m(__VA_ARGS__)
11531
#define vsuxseg5ei64_v_u8m1_m(...) __riscv_vsuxseg5ei64_v_u8m1_m(__VA_ARGS__)
11532
#define vsuxseg6ei64_v_u8m1_m(...) __riscv_vsuxseg6ei64_v_u8m1_m(__VA_ARGS__)
11533
#define vsuxseg7ei64_v_u8m1_m(...) __riscv_vsuxseg7ei64_v_u8m1_m(__VA_ARGS__)
11534
#define vsuxseg8ei64_v_u8m1_m(...) __riscv_vsuxseg8ei64_v_u8m1_m(__VA_ARGS__)
11535
#define vsuxseg2ei8_v_u16mf4_m(...) __riscv_vsuxseg2ei8_v_u16mf4_m(__VA_ARGS__)
11536
#define vsuxseg3ei8_v_u16mf4_m(...) __riscv_vsuxseg3ei8_v_u16mf4_m(__VA_ARGS__)
11537
#define vsuxseg4ei8_v_u16mf4_m(...) __riscv_vsuxseg4ei8_v_u16mf4_m(__VA_ARGS__)
11538
#define vsuxseg5ei8_v_u16mf4_m(...) __riscv_vsuxseg5ei8_v_u16mf4_m(__VA_ARGS__)
11539
#define vsuxseg6ei8_v_u16mf4_m(...) __riscv_vsuxseg6ei8_v_u16mf4_m(__VA_ARGS__)
11540
#define vsuxseg7ei8_v_u16mf4_m(...) __riscv_vsuxseg7ei8_v_u16mf4_m(__VA_ARGS__)
11541
#define vsuxseg8ei8_v_u16mf4_m(...) __riscv_vsuxseg8ei8_v_u16mf4_m(__VA_ARGS__)
11542
#define vsuxseg2ei8_v_u16mf2_m(...) __riscv_vsuxseg2ei8_v_u16mf2_m(__VA_ARGS__)
11543
#define vsuxseg3ei8_v_u16mf2_m(...) __riscv_vsuxseg3ei8_v_u16mf2_m(__VA_ARGS__)
11544
#define vsuxseg4ei8_v_u16mf2_m(...) __riscv_vsuxseg4ei8_v_u16mf2_m(__VA_ARGS__)
11545
#define vsuxseg5ei8_v_u16mf2_m(...) __riscv_vsuxseg5ei8_v_u16mf2_m(__VA_ARGS__)
11546
#define vsuxseg6ei8_v_u16mf2_m(...) __riscv_vsuxseg6ei8_v_u16mf2_m(__VA_ARGS__)
11547
#define vsuxseg7ei8_v_u16mf2_m(...) __riscv_vsuxseg7ei8_v_u16mf2_m(__VA_ARGS__)
11548
#define vsuxseg8ei8_v_u16mf2_m(...) __riscv_vsuxseg8ei8_v_u16mf2_m(__VA_ARGS__)
11549
#define vsuxseg2ei8_v_u16m1_m(...) __riscv_vsuxseg2ei8_v_u16m1_m(__VA_ARGS__)
11550
#define vsuxseg3ei8_v_u16m1_m(...) __riscv_vsuxseg3ei8_v_u16m1_m(__VA_ARGS__)
11551
#define vsuxseg4ei8_v_u16m1_m(...) __riscv_vsuxseg4ei8_v_u16m1_m(__VA_ARGS__)
11552
#define vsuxseg5ei8_v_u16m1_m(...) __riscv_vsuxseg5ei8_v_u16m1_m(__VA_ARGS__)
11553
#define vsuxseg6ei8_v_u16m1_m(...) __riscv_vsuxseg6ei8_v_u16m1_m(__VA_ARGS__)
11554
#define vsuxseg7ei8_v_u16m1_m(...) __riscv_vsuxseg7ei8_v_u16m1_m(__VA_ARGS__)
11555
#define vsuxseg8ei8_v_u16m1_m(...) __riscv_vsuxseg8ei8_v_u16m1_m(__VA_ARGS__)
11556
#define vsuxseg2ei8_v_u16m2_m(...) __riscv_vsuxseg2ei8_v_u16m2_m(__VA_ARGS__)
11557
#define vsuxseg3ei8_v_u16m2_m(...) __riscv_vsuxseg3ei8_v_u16m2_m(__VA_ARGS__)
11558
#define vsuxseg4ei8_v_u16m2_m(...) __riscv_vsuxseg4ei8_v_u16m2_m(__VA_ARGS__)
11559
#define vsuxseg2ei8_v_u16m4_m(...) __riscv_vsuxseg2ei8_v_u16m4_m(__VA_ARGS__)
11560
#define vsuxseg2ei16_v_u16mf4_m(...) __riscv_vsuxseg2ei16_v_u16mf4_m(__VA_ARGS__)
11561
#define vsuxseg3ei16_v_u16mf4_m(...) __riscv_vsuxseg3ei16_v_u16mf4_m(__VA_ARGS__)
11562
#define vsuxseg4ei16_v_u16mf4_m(...) __riscv_vsuxseg4ei16_v_u16mf4_m(__VA_ARGS__)
11563
#define vsuxseg5ei16_v_u16mf4_m(...) __riscv_vsuxseg5ei16_v_u16mf4_m(__VA_ARGS__)
11564
#define vsuxseg6ei16_v_u16mf4_m(...) __riscv_vsuxseg6ei16_v_u16mf4_m(__VA_ARGS__)
11565
#define vsuxseg7ei16_v_u16mf4_m(...) __riscv_vsuxseg7ei16_v_u16mf4_m(__VA_ARGS__)
11566
#define vsuxseg8ei16_v_u16mf4_m(...) __riscv_vsuxseg8ei16_v_u16mf4_m(__VA_ARGS__)
11567
#define vsuxseg2ei16_v_u16mf2_m(...) __riscv_vsuxseg2ei16_v_u16mf2_m(__VA_ARGS__)
11568
#define vsuxseg3ei16_v_u16mf2_m(...) __riscv_vsuxseg3ei16_v_u16mf2_m(__VA_ARGS__)
11569
#define vsuxseg4ei16_v_u16mf2_m(...) __riscv_vsuxseg4ei16_v_u16mf2_m(__VA_ARGS__)
11570
#define vsuxseg5ei16_v_u16mf2_m(...) __riscv_vsuxseg5ei16_v_u16mf2_m(__VA_ARGS__)
11571
#define vsuxseg6ei16_v_u16mf2_m(...) __riscv_vsuxseg6ei16_v_u16mf2_m(__VA_ARGS__)
11572
#define vsuxseg7ei16_v_u16mf2_m(...) __riscv_vsuxseg7ei16_v_u16mf2_m(__VA_ARGS__)
11573
#define vsuxseg8ei16_v_u16mf2_m(...) __riscv_vsuxseg8ei16_v_u16mf2_m(__VA_ARGS__)
11574
#define vsuxseg2ei16_v_u16m1_m(...) __riscv_vsuxseg2ei16_v_u16m1_m(__VA_ARGS__)
11575
#define vsuxseg3ei16_v_u16m1_m(...) __riscv_vsuxseg3ei16_v_u16m1_m(__VA_ARGS__)
11576
#define vsuxseg4ei16_v_u16m1_m(...) __riscv_vsuxseg4ei16_v_u16m1_m(__VA_ARGS__)
11577
#define vsuxseg5ei16_v_u16m1_m(...) __riscv_vsuxseg5ei16_v_u16m1_m(__VA_ARGS__)
11578
#define vsuxseg6ei16_v_u16m1_m(...) __riscv_vsuxseg6ei16_v_u16m1_m(__VA_ARGS__)
11579
#define vsuxseg7ei16_v_u16m1_m(...) __riscv_vsuxseg7ei16_v_u16m1_m(__VA_ARGS__)
11580
#define vsuxseg8ei16_v_u16m1_m(...) __riscv_vsuxseg8ei16_v_u16m1_m(__VA_ARGS__)
11581
#define vsuxseg2ei16_v_u16m2_m(...) __riscv_vsuxseg2ei16_v_u16m2_m(__VA_ARGS__)
11582
#define vsuxseg3ei16_v_u16m2_m(...) __riscv_vsuxseg3ei16_v_u16m2_m(__VA_ARGS__)
11583
#define vsuxseg4ei16_v_u16m2_m(...) __riscv_vsuxseg4ei16_v_u16m2_m(__VA_ARGS__)
11584
#define vsuxseg2ei16_v_u16m4_m(...) __riscv_vsuxseg2ei16_v_u16m4_m(__VA_ARGS__)
11585
#define vsuxseg2ei32_v_u16mf4_m(...) __riscv_vsuxseg2ei32_v_u16mf4_m(__VA_ARGS__)
11586
#define vsuxseg3ei32_v_u16mf4_m(...) __riscv_vsuxseg3ei32_v_u16mf4_m(__VA_ARGS__)
11587
#define vsuxseg4ei32_v_u16mf4_m(...) __riscv_vsuxseg4ei32_v_u16mf4_m(__VA_ARGS__)
11588
#define vsuxseg5ei32_v_u16mf4_m(...) __riscv_vsuxseg5ei32_v_u16mf4_m(__VA_ARGS__)
11589
#define vsuxseg6ei32_v_u16mf4_m(...) __riscv_vsuxseg6ei32_v_u16mf4_m(__VA_ARGS__)
11590
#define vsuxseg7ei32_v_u16mf4_m(...) __riscv_vsuxseg7ei32_v_u16mf4_m(__VA_ARGS__)
11591
#define vsuxseg8ei32_v_u16mf4_m(...) __riscv_vsuxseg8ei32_v_u16mf4_m(__VA_ARGS__)
11592
#define vsuxseg2ei32_v_u16mf2_m(...) __riscv_vsuxseg2ei32_v_u16mf2_m(__VA_ARGS__)
11593
#define vsuxseg3ei32_v_u16mf2_m(...) __riscv_vsuxseg3ei32_v_u16mf2_m(__VA_ARGS__)
11594
#define vsuxseg4ei32_v_u16mf2_m(...) __riscv_vsuxseg4ei32_v_u16mf2_m(__VA_ARGS__)
11595
#define vsuxseg5ei32_v_u16mf2_m(...) __riscv_vsuxseg5ei32_v_u16mf2_m(__VA_ARGS__)
11596
#define vsuxseg6ei32_v_u16mf2_m(...) __riscv_vsuxseg6ei32_v_u16mf2_m(__VA_ARGS__)
11597
#define vsuxseg7ei32_v_u16mf2_m(...) __riscv_vsuxseg7ei32_v_u16mf2_m(__VA_ARGS__)
11598
#define vsuxseg8ei32_v_u16mf2_m(...) __riscv_vsuxseg8ei32_v_u16mf2_m(__VA_ARGS__)
11599
#define vsuxseg2ei32_v_u16m1_m(...) __riscv_vsuxseg2ei32_v_u16m1_m(__VA_ARGS__)
11600
#define vsuxseg3ei32_v_u16m1_m(...) __riscv_vsuxseg3ei32_v_u16m1_m(__VA_ARGS__)
11601
#define vsuxseg4ei32_v_u16m1_m(...) __riscv_vsuxseg4ei32_v_u16m1_m(__VA_ARGS__)
11602
#define vsuxseg5ei32_v_u16m1_m(...) __riscv_vsuxseg5ei32_v_u16m1_m(__VA_ARGS__)
11603
#define vsuxseg6ei32_v_u16m1_m(...) __riscv_vsuxseg6ei32_v_u16m1_m(__VA_ARGS__)
11604
#define vsuxseg7ei32_v_u16m1_m(...) __riscv_vsuxseg7ei32_v_u16m1_m(__VA_ARGS__)
11605
#define vsuxseg8ei32_v_u16m1_m(...) __riscv_vsuxseg8ei32_v_u16m1_m(__VA_ARGS__)
11606
#define vsuxseg2ei32_v_u16m2_m(...) __riscv_vsuxseg2ei32_v_u16m2_m(__VA_ARGS__)
11607
#define vsuxseg3ei32_v_u16m2_m(...) __riscv_vsuxseg3ei32_v_u16m2_m(__VA_ARGS__)
11608
#define vsuxseg4ei32_v_u16m2_m(...) __riscv_vsuxseg4ei32_v_u16m2_m(__VA_ARGS__)
11609
#define vsuxseg2ei32_v_u16m4_m(...) __riscv_vsuxseg2ei32_v_u16m4_m(__VA_ARGS__)
11610
#define vsuxseg2ei64_v_u16mf4_m(...) __riscv_vsuxseg2ei64_v_u16mf4_m(__VA_ARGS__)
11611
#define vsuxseg3ei64_v_u16mf4_m(...) __riscv_vsuxseg3ei64_v_u16mf4_m(__VA_ARGS__)
11612
#define vsuxseg4ei64_v_u16mf4_m(...) __riscv_vsuxseg4ei64_v_u16mf4_m(__VA_ARGS__)
11613
#define vsuxseg5ei64_v_u16mf4_m(...) __riscv_vsuxseg5ei64_v_u16mf4_m(__VA_ARGS__)
11614
#define vsuxseg6ei64_v_u16mf4_m(...) __riscv_vsuxseg6ei64_v_u16mf4_m(__VA_ARGS__)
11615
#define vsuxseg7ei64_v_u16mf4_m(...) __riscv_vsuxseg7ei64_v_u16mf4_m(__VA_ARGS__)
11616
#define vsuxseg8ei64_v_u16mf4_m(...) __riscv_vsuxseg8ei64_v_u16mf4_m(__VA_ARGS__)
11617
#define vsuxseg2ei64_v_u16mf2_m(...) __riscv_vsuxseg2ei64_v_u16mf2_m(__VA_ARGS__)
11618
#define vsuxseg3ei64_v_u16mf2_m(...) __riscv_vsuxseg3ei64_v_u16mf2_m(__VA_ARGS__)
11619
#define vsuxseg4ei64_v_u16mf2_m(...) __riscv_vsuxseg4ei64_v_u16mf2_m(__VA_ARGS__)
11620
#define vsuxseg5ei64_v_u16mf2_m(...) __riscv_vsuxseg5ei64_v_u16mf2_m(__VA_ARGS__)
11621
#define vsuxseg6ei64_v_u16mf2_m(...) __riscv_vsuxseg6ei64_v_u16mf2_m(__VA_ARGS__)
11622
#define vsuxseg7ei64_v_u16mf2_m(...) __riscv_vsuxseg7ei64_v_u16mf2_m(__VA_ARGS__)
11623
#define vsuxseg8ei64_v_u16mf2_m(...) __riscv_vsuxseg8ei64_v_u16mf2_m(__VA_ARGS__)
11624
#define vsuxseg2ei64_v_u16m1_m(...) __riscv_vsuxseg2ei64_v_u16m1_m(__VA_ARGS__)
11625
#define vsuxseg3ei64_v_u16m1_m(...) __riscv_vsuxseg3ei64_v_u16m1_m(__VA_ARGS__)
11626
#define vsuxseg4ei64_v_u16m1_m(...) __riscv_vsuxseg4ei64_v_u16m1_m(__VA_ARGS__)
11627
#define vsuxseg5ei64_v_u16m1_m(...) __riscv_vsuxseg5ei64_v_u16m1_m(__VA_ARGS__)
11628
#define vsuxseg6ei64_v_u16m1_m(...) __riscv_vsuxseg6ei64_v_u16m1_m(__VA_ARGS__)
11629
#define vsuxseg7ei64_v_u16m1_m(...) __riscv_vsuxseg7ei64_v_u16m1_m(__VA_ARGS__)
11630
#define vsuxseg8ei64_v_u16m1_m(...) __riscv_vsuxseg8ei64_v_u16m1_m(__VA_ARGS__)
11631
#define vsuxseg2ei64_v_u16m2_m(...) __riscv_vsuxseg2ei64_v_u16m2_m(__VA_ARGS__)
11632
#define vsuxseg3ei64_v_u16m2_m(...) __riscv_vsuxseg3ei64_v_u16m2_m(__VA_ARGS__)
11633
#define vsuxseg4ei64_v_u16m2_m(...) __riscv_vsuxseg4ei64_v_u16m2_m(__VA_ARGS__)
11634
#define vsuxseg2ei8_v_u32mf2_m(...) __riscv_vsuxseg2ei8_v_u32mf2_m(__VA_ARGS__)
11635
#define vsuxseg3ei8_v_u32mf2_m(...) __riscv_vsuxseg3ei8_v_u32mf2_m(__VA_ARGS__)
11636
#define vsuxseg4ei8_v_u32mf2_m(...) __riscv_vsuxseg4ei8_v_u32mf2_m(__VA_ARGS__)
11637
#define vsuxseg5ei8_v_u32mf2_m(...) __riscv_vsuxseg5ei8_v_u32mf2_m(__VA_ARGS__)
11638
#define vsuxseg6ei8_v_u32mf2_m(...) __riscv_vsuxseg6ei8_v_u32mf2_m(__VA_ARGS__)
11639
#define vsuxseg7ei8_v_u32mf2_m(...) __riscv_vsuxseg7ei8_v_u32mf2_m(__VA_ARGS__)
11640
#define vsuxseg8ei8_v_u32mf2_m(...) __riscv_vsuxseg8ei8_v_u32mf2_m(__VA_ARGS__)
11641
#define vsuxseg2ei8_v_u32m1_m(...) __riscv_vsuxseg2ei8_v_u32m1_m(__VA_ARGS__)
11642
#define vsuxseg3ei8_v_u32m1_m(...) __riscv_vsuxseg3ei8_v_u32m1_m(__VA_ARGS__)
11643
#define vsuxseg4ei8_v_u32m1_m(...) __riscv_vsuxseg4ei8_v_u32m1_m(__VA_ARGS__)
11644
#define vsuxseg5ei8_v_u32m1_m(...) __riscv_vsuxseg5ei8_v_u32m1_m(__VA_ARGS__)
11645
#define vsuxseg6ei8_v_u32m1_m(...) __riscv_vsuxseg6ei8_v_u32m1_m(__VA_ARGS__)
11646
#define vsuxseg7ei8_v_u32m1_m(...) __riscv_vsuxseg7ei8_v_u32m1_m(__VA_ARGS__)
11647
#define vsuxseg8ei8_v_u32m1_m(...) __riscv_vsuxseg8ei8_v_u32m1_m(__VA_ARGS__)
11648
#define vsuxseg2ei8_v_u32m2_m(...) __riscv_vsuxseg2ei8_v_u32m2_m(__VA_ARGS__)
11649
#define vsuxseg3ei8_v_u32m2_m(...) __riscv_vsuxseg3ei8_v_u32m2_m(__VA_ARGS__)
11650
#define vsuxseg4ei8_v_u32m2_m(...) __riscv_vsuxseg4ei8_v_u32m2_m(__VA_ARGS__)
11651
#define vsuxseg2ei8_v_u32m4_m(...) __riscv_vsuxseg2ei8_v_u32m4_m(__VA_ARGS__)
11652
#define vsuxseg2ei16_v_u32mf2_m(...) __riscv_vsuxseg2ei16_v_u32mf2_m(__VA_ARGS__)
11653
#define vsuxseg3ei16_v_u32mf2_m(...) __riscv_vsuxseg3ei16_v_u32mf2_m(__VA_ARGS__)
11654
#define vsuxseg4ei16_v_u32mf2_m(...) __riscv_vsuxseg4ei16_v_u32mf2_m(__VA_ARGS__)
11655
#define vsuxseg5ei16_v_u32mf2_m(...) __riscv_vsuxseg5ei16_v_u32mf2_m(__VA_ARGS__)
11656
#define vsuxseg6ei16_v_u32mf2_m(...) __riscv_vsuxseg6ei16_v_u32mf2_m(__VA_ARGS__)
11657
#define vsuxseg7ei16_v_u32mf2_m(...) __riscv_vsuxseg7ei16_v_u32mf2_m(__VA_ARGS__)
11658
#define vsuxseg8ei16_v_u32mf2_m(...) __riscv_vsuxseg8ei16_v_u32mf2_m(__VA_ARGS__)
11659
#define vsuxseg2ei16_v_u32m1_m(...) __riscv_vsuxseg2ei16_v_u32m1_m(__VA_ARGS__)
11660
#define vsuxseg3ei16_v_u32m1_m(...) __riscv_vsuxseg3ei16_v_u32m1_m(__VA_ARGS__)
11661
#define vsuxseg4ei16_v_u32m1_m(...) __riscv_vsuxseg4ei16_v_u32m1_m(__VA_ARGS__)
11662
#define vsuxseg5ei16_v_u32m1_m(...) __riscv_vsuxseg5ei16_v_u32m1_m(__VA_ARGS__)
11663
#define vsuxseg6ei16_v_u32m1_m(...) __riscv_vsuxseg6ei16_v_u32m1_m(__VA_ARGS__)
11664
#define vsuxseg7ei16_v_u32m1_m(...) __riscv_vsuxseg7ei16_v_u32m1_m(__VA_ARGS__)
11665
#define vsuxseg8ei16_v_u32m1_m(...) __riscv_vsuxseg8ei16_v_u32m1_m(__VA_ARGS__)
11666
#define vsuxseg2ei16_v_u32m2_m(...) __riscv_vsuxseg2ei16_v_u32m2_m(__VA_ARGS__)
11667
#define vsuxseg3ei16_v_u32m2_m(...) __riscv_vsuxseg3ei16_v_u32m2_m(__VA_ARGS__)
11668
#define vsuxseg4ei16_v_u32m2_m(...) __riscv_vsuxseg4ei16_v_u32m2_m(__VA_ARGS__)
11669
#define vsuxseg2ei16_v_u32m4_m(...) __riscv_vsuxseg2ei16_v_u32m4_m(__VA_ARGS__)
11670
#define vsuxseg2ei32_v_u32mf2_m(...) __riscv_vsuxseg2ei32_v_u32mf2_m(__VA_ARGS__)
11671
#define vsuxseg3ei32_v_u32mf2_m(...) __riscv_vsuxseg3ei32_v_u32mf2_m(__VA_ARGS__)
11672
#define vsuxseg4ei32_v_u32mf2_m(...) __riscv_vsuxseg4ei32_v_u32mf2_m(__VA_ARGS__)
11673
#define vsuxseg5ei32_v_u32mf2_m(...) __riscv_vsuxseg5ei32_v_u32mf2_m(__VA_ARGS__)
11674
#define vsuxseg6ei32_v_u32mf2_m(...) __riscv_vsuxseg6ei32_v_u32mf2_m(__VA_ARGS__)
11675
#define vsuxseg7ei32_v_u32mf2_m(...) __riscv_vsuxseg7ei32_v_u32mf2_m(__VA_ARGS__)
11676
#define vsuxseg8ei32_v_u32mf2_m(...) __riscv_vsuxseg8ei32_v_u32mf2_m(__VA_ARGS__)
11677
#define vsuxseg2ei32_v_u32m1_m(...) __riscv_vsuxseg2ei32_v_u32m1_m(__VA_ARGS__)
11678
#define vsuxseg3ei32_v_u32m1_m(...) __riscv_vsuxseg3ei32_v_u32m1_m(__VA_ARGS__)
11679
#define vsuxseg4ei32_v_u32m1_m(...) __riscv_vsuxseg4ei32_v_u32m1_m(__VA_ARGS__)
11680
#define vsuxseg5ei32_v_u32m1_m(...) __riscv_vsuxseg5ei32_v_u32m1_m(__VA_ARGS__)
11681
#define vsuxseg6ei32_v_u32m1_m(...) __riscv_vsuxseg6ei32_v_u32m1_m(__VA_ARGS__)
11682
#define vsuxseg7ei32_v_u32m1_m(...) __riscv_vsuxseg7ei32_v_u32m1_m(__VA_ARGS__)
11683
#define vsuxseg8ei32_v_u32m1_m(...) __riscv_vsuxseg8ei32_v_u32m1_m(__VA_ARGS__)
11684
#define vsuxseg2ei32_v_u32m2_m(...) __riscv_vsuxseg2ei32_v_u32m2_m(__VA_ARGS__)
11685
#define vsuxseg3ei32_v_u32m2_m(...) __riscv_vsuxseg3ei32_v_u32m2_m(__VA_ARGS__)
11686
#define vsuxseg4ei32_v_u32m2_m(...) __riscv_vsuxseg4ei32_v_u32m2_m(__VA_ARGS__)
11687
#define vsuxseg2ei32_v_u32m4_m(...) __riscv_vsuxseg2ei32_v_u32m4_m(__VA_ARGS__)
11688
#define vsuxseg2ei64_v_u32mf2_m(...) __riscv_vsuxseg2ei64_v_u32mf2_m(__VA_ARGS__)
11689
#define vsuxseg3ei64_v_u32mf2_m(...) __riscv_vsuxseg3ei64_v_u32mf2_m(__VA_ARGS__)
11690
#define vsuxseg4ei64_v_u32mf2_m(...) __riscv_vsuxseg4ei64_v_u32mf2_m(__VA_ARGS__)
11691
#define vsuxseg5ei64_v_u32mf2_m(...) __riscv_vsuxseg5ei64_v_u32mf2_m(__VA_ARGS__)
11692
#define vsuxseg6ei64_v_u32mf2_m(...) __riscv_vsuxseg6ei64_v_u32mf2_m(__VA_ARGS__)
11693
#define vsuxseg7ei64_v_u32mf2_m(...) __riscv_vsuxseg7ei64_v_u32mf2_m(__VA_ARGS__)
11694
#define vsuxseg8ei64_v_u32mf2_m(...) __riscv_vsuxseg8ei64_v_u32mf2_m(__VA_ARGS__)
11695
#define vsuxseg2ei64_v_u32m1_m(...) __riscv_vsuxseg2ei64_v_u32m1_m(__VA_ARGS__)
11696
#define vsuxseg3ei64_v_u32m1_m(...) __riscv_vsuxseg3ei64_v_u32m1_m(__VA_ARGS__)
11697
#define vsuxseg4ei64_v_u32m1_m(...) __riscv_vsuxseg4ei64_v_u32m1_m(__VA_ARGS__)
11698
#define vsuxseg5ei64_v_u32m1_m(...) __riscv_vsuxseg5ei64_v_u32m1_m(__VA_ARGS__)
11699
#define vsuxseg6ei64_v_u32m1_m(...) __riscv_vsuxseg6ei64_v_u32m1_m(__VA_ARGS__)
11700
#define vsuxseg7ei64_v_u32m1_m(...) __riscv_vsuxseg7ei64_v_u32m1_m(__VA_ARGS__)
11701
#define vsuxseg8ei64_v_u32m1_m(...) __riscv_vsuxseg8ei64_v_u32m1_m(__VA_ARGS__)
11702
#define vsuxseg2ei64_v_u32m2_m(...) __riscv_vsuxseg2ei64_v_u32m2_m(__VA_ARGS__)
11703
#define vsuxseg3ei64_v_u32m2_m(...) __riscv_vsuxseg3ei64_v_u32m2_m(__VA_ARGS__)
11704
#define vsuxseg4ei64_v_u32m2_m(...) __riscv_vsuxseg4ei64_v_u32m2_m(__VA_ARGS__)
11705
#define vsuxseg2ei64_v_u32m4_m(...) __riscv_vsuxseg2ei64_v_u32m4_m(__VA_ARGS__)
11706
#define vsuxseg2ei8_v_u64m1_m(...) __riscv_vsuxseg2ei8_v_u64m1_m(__VA_ARGS__)
11707
#define vsuxseg3ei8_v_u64m1_m(...) __riscv_vsuxseg3ei8_v_u64m1_m(__VA_ARGS__)
11708
#define vsuxseg4ei8_v_u64m1_m(...) __riscv_vsuxseg4ei8_v_u64m1_m(__VA_ARGS__)
11709
#define vsuxseg5ei8_v_u64m1_m(...) __riscv_vsuxseg5ei8_v_u64m1_m(__VA_ARGS__)
11710
#define vsuxseg6ei8_v_u64m1_m(...) __riscv_vsuxseg6ei8_v_u64m1_m(__VA_ARGS__)
11711
#define vsuxseg7ei8_v_u64m1_m(...) __riscv_vsuxseg7ei8_v_u64m1_m(__VA_ARGS__)
11712
#define vsuxseg8ei8_v_u64m1_m(...) __riscv_vsuxseg8ei8_v_u64m1_m(__VA_ARGS__)
11713
#define vsuxseg2ei8_v_u64m2_m(...) __riscv_vsuxseg2ei8_v_u64m2_m(__VA_ARGS__)
11714
#define vsuxseg3ei8_v_u64m2_m(...) __riscv_vsuxseg3ei8_v_u64m2_m(__VA_ARGS__)
11715
#define vsuxseg4ei8_v_u64m2_m(...) __riscv_vsuxseg4ei8_v_u64m2_m(__VA_ARGS__)
11716
#define vsuxseg2ei8_v_u64m4_m(...) __riscv_vsuxseg2ei8_v_u64m4_m(__VA_ARGS__)
11717
#define vsuxseg2ei16_v_u64m1_m(...) __riscv_vsuxseg2ei16_v_u64m1_m(__VA_ARGS__)
11718
#define vsuxseg3ei16_v_u64m1_m(...) __riscv_vsuxseg3ei16_v_u64m1_m(__VA_ARGS__)
11719
#define vsuxseg4ei16_v_u64m1_m(...) __riscv_vsuxseg4ei16_v_u64m1_m(__VA_ARGS__)
11720
#define vsuxseg5ei16_v_u64m1_m(...) __riscv_vsuxseg5ei16_v_u64m1_m(__VA_ARGS__)
11721
#define vsuxseg6ei16_v_u64m1_m(...) __riscv_vsuxseg6ei16_v_u64m1_m(__VA_ARGS__)
11722
#define vsuxseg7ei16_v_u64m1_m(...) __riscv_vsuxseg7ei16_v_u64m1_m(__VA_ARGS__)
11723
#define vsuxseg8ei16_v_u64m1_m(...) __riscv_vsuxseg8ei16_v_u64m1_m(__VA_ARGS__)
11724
#define vsuxseg2ei16_v_u64m2_m(...) __riscv_vsuxseg2ei16_v_u64m2_m(__VA_ARGS__)
11725
#define vsuxseg3ei16_v_u64m2_m(...) __riscv_vsuxseg3ei16_v_u64m2_m(__VA_ARGS__)
11726
#define vsuxseg4ei16_v_u64m2_m(...) __riscv_vsuxseg4ei16_v_u64m2_m(__VA_ARGS__)
11727
#define vsuxseg2ei16_v_u64m4_m(...) __riscv_vsuxseg2ei16_v_u64m4_m(__VA_ARGS__)
11728
#define vsuxseg2ei32_v_u64m1_m(...) __riscv_vsuxseg2ei32_v_u64m1_m(__VA_ARGS__)
11729
#define vsuxseg3ei32_v_u64m1_m(...) __riscv_vsuxseg3ei32_v_u64m1_m(__VA_ARGS__)
11730
#define vsuxseg4ei32_v_u64m1_m(...) __riscv_vsuxseg4ei32_v_u64m1_m(__VA_ARGS__)
11731
#define vsuxseg5ei32_v_u64m1_m(...) __riscv_vsuxseg5ei32_v_u64m1_m(__VA_ARGS__)
11732
#define vsuxseg6ei32_v_u64m1_m(...) __riscv_vsuxseg6ei32_v_u64m1_m(__VA_ARGS__)
11733
#define vsuxseg7ei32_v_u64m1_m(...) __riscv_vsuxseg7ei32_v_u64m1_m(__VA_ARGS__)
11734
#define vsuxseg8ei32_v_u64m1_m(...) __riscv_vsuxseg8ei32_v_u64m1_m(__VA_ARGS__)
11735
#define vsuxseg2ei32_v_u64m2_m(...) __riscv_vsuxseg2ei32_v_u64m2_m(__VA_ARGS__)
11736
#define vsuxseg3ei32_v_u64m2_m(...) __riscv_vsuxseg3ei32_v_u64m2_m(__VA_ARGS__)
11737
#define vsuxseg4ei32_v_u64m2_m(...) __riscv_vsuxseg4ei32_v_u64m2_m(__VA_ARGS__)
11738
#define vsuxseg2ei32_v_u64m4_m(...) __riscv_vsuxseg2ei32_v_u64m4_m(__VA_ARGS__)
11739
#define vsuxseg2ei64_v_u64m1_m(...) __riscv_vsuxseg2ei64_v_u64m1_m(__VA_ARGS__)
11740
#define vsuxseg3ei64_v_u64m1_m(...) __riscv_vsuxseg3ei64_v_u64m1_m(__VA_ARGS__)
11741
#define vsuxseg4ei64_v_u64m1_m(...) __riscv_vsuxseg4ei64_v_u64m1_m(__VA_ARGS__)
11742
#define vsuxseg5ei64_v_u64m1_m(...) __riscv_vsuxseg5ei64_v_u64m1_m(__VA_ARGS__)
11743
#define vsuxseg6ei64_v_u64m1_m(...) __riscv_vsuxseg6ei64_v_u64m1_m(__VA_ARGS__)
11744
#define vsuxseg7ei64_v_u64m1_m(...) __riscv_vsuxseg7ei64_v_u64m1_m(__VA_ARGS__)
11745
#define vsuxseg8ei64_v_u64m1_m(...) __riscv_vsuxseg8ei64_v_u64m1_m(__VA_ARGS__)
11746
#define vsuxseg2ei64_v_u64m2_m(...) __riscv_vsuxseg2ei64_v_u64m2_m(__VA_ARGS__)
11747
#define vsuxseg3ei64_v_u64m2_m(...) __riscv_vsuxseg3ei64_v_u64m2_m(__VA_ARGS__)
11748
#define vsuxseg4ei64_v_u64m2_m(...) __riscv_vsuxseg4ei64_v_u64m2_m(__VA_ARGS__)
11749
#define vsuxseg2ei64_v_u64m4_m(...) __riscv_vsuxseg2ei64_v_u64m4_m(__VA_ARGS__)
11750
#define vadd_vv_i8mf8(...) __riscv_vadd_vv_i8mf8(__VA_ARGS__)
11751
#define vadd_vx_i8mf8(...) __riscv_vadd_vx_i8mf8(__VA_ARGS__)
11752
#define vadd_vv_i8mf4(...) __riscv_vadd_vv_i8mf4(__VA_ARGS__)
11753
#define vadd_vx_i8mf4(...) __riscv_vadd_vx_i8mf4(__VA_ARGS__)
11754
#define vadd_vv_i8mf2(...) __riscv_vadd_vv_i8mf2(__VA_ARGS__)
11755
#define vadd_vx_i8mf2(...) __riscv_vadd_vx_i8mf2(__VA_ARGS__)
11756
#define vadd_vv_i8m1(...) __riscv_vadd_vv_i8m1(__VA_ARGS__)
11757
#define vadd_vx_i8m1(...) __riscv_vadd_vx_i8m1(__VA_ARGS__)
11758
#define vadd_vv_i8m2(...) __riscv_vadd_vv_i8m2(__VA_ARGS__)
11759
#define vadd_vx_i8m2(...) __riscv_vadd_vx_i8m2(__VA_ARGS__)
11760
#define vadd_vv_i8m4(...) __riscv_vadd_vv_i8m4(__VA_ARGS__)
11761
#define vadd_vx_i8m4(...) __riscv_vadd_vx_i8m4(__VA_ARGS__)
11762
#define vadd_vv_i8m8(...) __riscv_vadd_vv_i8m8(__VA_ARGS__)
11763
#define vadd_vx_i8m8(...) __riscv_vadd_vx_i8m8(__VA_ARGS__)
11764
#define vadd_vv_i16mf4(...) __riscv_vadd_vv_i16mf4(__VA_ARGS__)
11765
#define vadd_vx_i16mf4(...) __riscv_vadd_vx_i16mf4(__VA_ARGS__)
11766
#define vadd_vv_i16mf2(...) __riscv_vadd_vv_i16mf2(__VA_ARGS__)
11767
#define vadd_vx_i16mf2(...) __riscv_vadd_vx_i16mf2(__VA_ARGS__)
11768
#define vadd_vv_i16m1(...) __riscv_vadd_vv_i16m1(__VA_ARGS__)
11769
#define vadd_vx_i16m1(...) __riscv_vadd_vx_i16m1(__VA_ARGS__)
11770
#define vadd_vv_i16m2(...) __riscv_vadd_vv_i16m2(__VA_ARGS__)
11771
#define vadd_vx_i16m2(...) __riscv_vadd_vx_i16m2(__VA_ARGS__)
11772
#define vadd_vv_i16m4(...) __riscv_vadd_vv_i16m4(__VA_ARGS__)
11773
#define vadd_vx_i16m4(...) __riscv_vadd_vx_i16m4(__VA_ARGS__)
11774
#define vadd_vv_i16m8(...) __riscv_vadd_vv_i16m8(__VA_ARGS__)
11775
#define vadd_vx_i16m8(...) __riscv_vadd_vx_i16m8(__VA_ARGS__)
11776
#define vadd_vv_i32mf2(...) __riscv_vadd_vv_i32mf2(__VA_ARGS__)
11777
#define vadd_vx_i32mf2(...) __riscv_vadd_vx_i32mf2(__VA_ARGS__)
11778
#define vadd_vv_i32m1(...) __riscv_vadd_vv_i32m1(__VA_ARGS__)
11779
#define vadd_vx_i32m1(...) __riscv_vadd_vx_i32m1(__VA_ARGS__)
11780
#define vadd_vv_i32m2(...) __riscv_vadd_vv_i32m2(__VA_ARGS__)
11781
#define vadd_vx_i32m2(...) __riscv_vadd_vx_i32m2(__VA_ARGS__)
11782
#define vadd_vv_i32m4(...) __riscv_vadd_vv_i32m4(__VA_ARGS__)
11783
#define vadd_vx_i32m4(...) __riscv_vadd_vx_i32m4(__VA_ARGS__)
11784
#define vadd_vv_i32m8(...) __riscv_vadd_vv_i32m8(__VA_ARGS__)
11785
#define vadd_vx_i32m8(...) __riscv_vadd_vx_i32m8(__VA_ARGS__)
11786
#define vadd_vv_i64m1(...) __riscv_vadd_vv_i64m1(__VA_ARGS__)
11787
#define vadd_vx_i64m1(...) __riscv_vadd_vx_i64m1(__VA_ARGS__)
11788
#define vadd_vv_i64m2(...) __riscv_vadd_vv_i64m2(__VA_ARGS__)
11789
#define vadd_vx_i64m2(...) __riscv_vadd_vx_i64m2(__VA_ARGS__)
11790
#define vadd_vv_i64m4(...) __riscv_vadd_vv_i64m4(__VA_ARGS__)
11791
#define vadd_vx_i64m4(...) __riscv_vadd_vx_i64m4(__VA_ARGS__)
11792
#define vadd_vv_i64m8(...) __riscv_vadd_vv_i64m8(__VA_ARGS__)
11793
#define vadd_vx_i64m8(...) __riscv_vadd_vx_i64m8(__VA_ARGS__)
11794
#define vsub_vv_i8mf8(...) __riscv_vsub_vv_i8mf8(__VA_ARGS__)
11795
#define vsub_vx_i8mf8(...) __riscv_vsub_vx_i8mf8(__VA_ARGS__)
11796
#define vsub_vv_i8mf4(...) __riscv_vsub_vv_i8mf4(__VA_ARGS__)
11797
#define vsub_vx_i8mf4(...) __riscv_vsub_vx_i8mf4(__VA_ARGS__)
11798
#define vsub_vv_i8mf2(...) __riscv_vsub_vv_i8mf2(__VA_ARGS__)
11799
#define vsub_vx_i8mf2(...) __riscv_vsub_vx_i8mf2(__VA_ARGS__)
11800
#define vsub_vv_i8m1(...) __riscv_vsub_vv_i8m1(__VA_ARGS__)
11801
#define vsub_vx_i8m1(...) __riscv_vsub_vx_i8m1(__VA_ARGS__)
11802
#define vsub_vv_i8m2(...) __riscv_vsub_vv_i8m2(__VA_ARGS__)
11803
#define vsub_vx_i8m2(...) __riscv_vsub_vx_i8m2(__VA_ARGS__)
11804
#define vsub_vv_i8m4(...) __riscv_vsub_vv_i8m4(__VA_ARGS__)
11805
#define vsub_vx_i8m4(...) __riscv_vsub_vx_i8m4(__VA_ARGS__)
11806
#define vsub_vv_i8m8(...) __riscv_vsub_vv_i8m8(__VA_ARGS__)
11807
#define vsub_vx_i8m8(...) __riscv_vsub_vx_i8m8(__VA_ARGS__)
11808
#define vsub_vv_i16mf4(...) __riscv_vsub_vv_i16mf4(__VA_ARGS__)
11809
#define vsub_vx_i16mf4(...) __riscv_vsub_vx_i16mf4(__VA_ARGS__)
11810
#define vsub_vv_i16mf2(...) __riscv_vsub_vv_i16mf2(__VA_ARGS__)
11811
#define vsub_vx_i16mf2(...) __riscv_vsub_vx_i16mf2(__VA_ARGS__)
11812
#define vsub_vv_i16m1(...) __riscv_vsub_vv_i16m1(__VA_ARGS__)
11813
#define vsub_vx_i16m1(...) __riscv_vsub_vx_i16m1(__VA_ARGS__)
11814
#define vsub_vv_i16m2(...) __riscv_vsub_vv_i16m2(__VA_ARGS__)
11815
#define vsub_vx_i16m2(...) __riscv_vsub_vx_i16m2(__VA_ARGS__)
11816
#define vsub_vv_i16m4(...) __riscv_vsub_vv_i16m4(__VA_ARGS__)
11817
#define vsub_vx_i16m4(...) __riscv_vsub_vx_i16m4(__VA_ARGS__)
11818
#define vsub_vv_i16m8(...) __riscv_vsub_vv_i16m8(__VA_ARGS__)
11819
#define vsub_vx_i16m8(...) __riscv_vsub_vx_i16m8(__VA_ARGS__)
11820
#define vsub_vv_i32mf2(...) __riscv_vsub_vv_i32mf2(__VA_ARGS__)
11821
#define vsub_vx_i32mf2(...) __riscv_vsub_vx_i32mf2(__VA_ARGS__)
11822
#define vsub_vv_i32m1(...) __riscv_vsub_vv_i32m1(__VA_ARGS__)
11823
#define vsub_vx_i32m1(...) __riscv_vsub_vx_i32m1(__VA_ARGS__)
11824
#define vsub_vv_i32m2(...) __riscv_vsub_vv_i32m2(__VA_ARGS__)
11825
#define vsub_vx_i32m2(...) __riscv_vsub_vx_i32m2(__VA_ARGS__)
11826
#define vsub_vv_i32m4(...) __riscv_vsub_vv_i32m4(__VA_ARGS__)
11827
#define vsub_vx_i32m4(...) __riscv_vsub_vx_i32m4(__VA_ARGS__)
11828
#define vsub_vv_i32m8(...) __riscv_vsub_vv_i32m8(__VA_ARGS__)
11829
#define vsub_vx_i32m8(...) __riscv_vsub_vx_i32m8(__VA_ARGS__)
11830
#define vsub_vv_i64m1(...) __riscv_vsub_vv_i64m1(__VA_ARGS__)
11831
#define vsub_vx_i64m1(...) __riscv_vsub_vx_i64m1(__VA_ARGS__)
11832
#define vsub_vv_i64m2(...) __riscv_vsub_vv_i64m2(__VA_ARGS__)
11833
#define vsub_vx_i64m2(...) __riscv_vsub_vx_i64m2(__VA_ARGS__)
11834
#define vsub_vv_i64m4(...) __riscv_vsub_vv_i64m4(__VA_ARGS__)
11835
#define vsub_vx_i64m4(...) __riscv_vsub_vx_i64m4(__VA_ARGS__)
11836
#define vsub_vv_i64m8(...) __riscv_vsub_vv_i64m8(__VA_ARGS__)
11837
#define vsub_vx_i64m8(...) __riscv_vsub_vx_i64m8(__VA_ARGS__)
11838
#define vrsub_vx_i8mf8(...) __riscv_vrsub_vx_i8mf8(__VA_ARGS__)
11839
#define vrsub_vx_i8mf4(...) __riscv_vrsub_vx_i8mf4(__VA_ARGS__)
11840
#define vrsub_vx_i8mf2(...) __riscv_vrsub_vx_i8mf2(__VA_ARGS__)
11841
#define vrsub_vx_i8m1(...) __riscv_vrsub_vx_i8m1(__VA_ARGS__)
11842
#define vrsub_vx_i8m2(...) __riscv_vrsub_vx_i8m2(__VA_ARGS__)
11843
#define vrsub_vx_i8m4(...) __riscv_vrsub_vx_i8m4(__VA_ARGS__)
11844
#define vrsub_vx_i8m8(...) __riscv_vrsub_vx_i8m8(__VA_ARGS__)
11845
#define vrsub_vx_i16mf4(...) __riscv_vrsub_vx_i16mf4(__VA_ARGS__)
11846
#define vrsub_vx_i16mf2(...) __riscv_vrsub_vx_i16mf2(__VA_ARGS__)
11847
#define vrsub_vx_i16m1(...) __riscv_vrsub_vx_i16m1(__VA_ARGS__)
11848
#define vrsub_vx_i16m2(...) __riscv_vrsub_vx_i16m2(__VA_ARGS__)
11849
#define vrsub_vx_i16m4(...) __riscv_vrsub_vx_i16m4(__VA_ARGS__)
11850
#define vrsub_vx_i16m8(...) __riscv_vrsub_vx_i16m8(__VA_ARGS__)
11851
#define vrsub_vx_i32mf2(...) __riscv_vrsub_vx_i32mf2(__VA_ARGS__)
11852
#define vrsub_vx_i32m1(...) __riscv_vrsub_vx_i32m1(__VA_ARGS__)
11853
#define vrsub_vx_i32m2(...) __riscv_vrsub_vx_i32m2(__VA_ARGS__)
11854
#define vrsub_vx_i32m4(...) __riscv_vrsub_vx_i32m4(__VA_ARGS__)
11855
#define vrsub_vx_i32m8(...) __riscv_vrsub_vx_i32m8(__VA_ARGS__)
11856
#define vrsub_vx_i64m1(...) __riscv_vrsub_vx_i64m1(__VA_ARGS__)
11857
#define vrsub_vx_i64m2(...) __riscv_vrsub_vx_i64m2(__VA_ARGS__)
11858
#define vrsub_vx_i64m4(...) __riscv_vrsub_vx_i64m4(__VA_ARGS__)
11859
#define vrsub_vx_i64m8(...) __riscv_vrsub_vx_i64m8(__VA_ARGS__)
11860
#define vneg_v_i8mf8(...) __riscv_vneg_v_i8mf8(__VA_ARGS__)
11861
#define vneg_v_i8mf4(...) __riscv_vneg_v_i8mf4(__VA_ARGS__)
11862
#define vneg_v_i8mf2(...) __riscv_vneg_v_i8mf2(__VA_ARGS__)
11863
#define vneg_v_i8m1(...) __riscv_vneg_v_i8m1(__VA_ARGS__)
11864
#define vneg_v_i8m2(...) __riscv_vneg_v_i8m2(__VA_ARGS__)
11865
#define vneg_v_i8m4(...) __riscv_vneg_v_i8m4(__VA_ARGS__)
11866
#define vneg_v_i8m8(...) __riscv_vneg_v_i8m8(__VA_ARGS__)
11867
#define vneg_v_i16mf4(...) __riscv_vneg_v_i16mf4(__VA_ARGS__)
11868
#define vneg_v_i16mf2(...) __riscv_vneg_v_i16mf2(__VA_ARGS__)
11869
#define vneg_v_i16m1(...) __riscv_vneg_v_i16m1(__VA_ARGS__)
11870
#define vneg_v_i16m2(...) __riscv_vneg_v_i16m2(__VA_ARGS__)
11871
#define vneg_v_i16m4(...) __riscv_vneg_v_i16m4(__VA_ARGS__)
11872
#define vneg_v_i16m8(...) __riscv_vneg_v_i16m8(__VA_ARGS__)
11873
#define vneg_v_i32mf2(...) __riscv_vneg_v_i32mf2(__VA_ARGS__)
11874
#define vneg_v_i32m1(...) __riscv_vneg_v_i32m1(__VA_ARGS__)
11875
#define vneg_v_i32m2(...) __riscv_vneg_v_i32m2(__VA_ARGS__)
11876
#define vneg_v_i32m4(...) __riscv_vneg_v_i32m4(__VA_ARGS__)
11877
#define vneg_v_i32m8(...) __riscv_vneg_v_i32m8(__VA_ARGS__)
11878
#define vneg_v_i64m1(...) __riscv_vneg_v_i64m1(__VA_ARGS__)
11879
#define vneg_v_i64m2(...) __riscv_vneg_v_i64m2(__VA_ARGS__)
11880
#define vneg_v_i64m4(...) __riscv_vneg_v_i64m4(__VA_ARGS__)
11881
#define vneg_v_i64m8(...) __riscv_vneg_v_i64m8(__VA_ARGS__)
11882
#define vadd_vv_u8mf8(...) __riscv_vadd_vv_u8mf8(__VA_ARGS__)
11883
#define vadd_vx_u8mf8(...) __riscv_vadd_vx_u8mf8(__VA_ARGS__)
11884
#define vadd_vv_u8mf4(...) __riscv_vadd_vv_u8mf4(__VA_ARGS__)
11885
#define vadd_vx_u8mf4(...) __riscv_vadd_vx_u8mf4(__VA_ARGS__)
11886
#define vadd_vv_u8mf2(...) __riscv_vadd_vv_u8mf2(__VA_ARGS__)
11887
#define vadd_vx_u8mf2(...) __riscv_vadd_vx_u8mf2(__VA_ARGS__)
11888
#define vadd_vv_u8m1(...) __riscv_vadd_vv_u8m1(__VA_ARGS__)
11889
#define vadd_vx_u8m1(...) __riscv_vadd_vx_u8m1(__VA_ARGS__)
11890
#define vadd_vv_u8m2(...) __riscv_vadd_vv_u8m2(__VA_ARGS__)
11891
#define vadd_vx_u8m2(...) __riscv_vadd_vx_u8m2(__VA_ARGS__)
11892
#define vadd_vv_u8m4(...) __riscv_vadd_vv_u8m4(__VA_ARGS__)
11893
#define vadd_vx_u8m4(...) __riscv_vadd_vx_u8m4(__VA_ARGS__)
11894
#define vadd_vv_u8m8(...) __riscv_vadd_vv_u8m8(__VA_ARGS__)
11895
#define vadd_vx_u8m8(...) __riscv_vadd_vx_u8m8(__VA_ARGS__)
11896
#define vadd_vv_u16mf4(...) __riscv_vadd_vv_u16mf4(__VA_ARGS__)
11897
#define vadd_vx_u16mf4(...) __riscv_vadd_vx_u16mf4(__VA_ARGS__)
11898
#define vadd_vv_u16mf2(...) __riscv_vadd_vv_u16mf2(__VA_ARGS__)
11899
#define vadd_vx_u16mf2(...) __riscv_vadd_vx_u16mf2(__VA_ARGS__)
11900
#define vadd_vv_u16m1(...) __riscv_vadd_vv_u16m1(__VA_ARGS__)
11901
#define vadd_vx_u16m1(...) __riscv_vadd_vx_u16m1(__VA_ARGS__)
11902
#define vadd_vv_u16m2(...) __riscv_vadd_vv_u16m2(__VA_ARGS__)
11903
#define vadd_vx_u16m2(...) __riscv_vadd_vx_u16m2(__VA_ARGS__)
11904
#define vadd_vv_u16m4(...) __riscv_vadd_vv_u16m4(__VA_ARGS__)
11905
#define vadd_vx_u16m4(...) __riscv_vadd_vx_u16m4(__VA_ARGS__)
11906
#define vadd_vv_u16m8(...) __riscv_vadd_vv_u16m8(__VA_ARGS__)
11907
#define vadd_vx_u16m8(...) __riscv_vadd_vx_u16m8(__VA_ARGS__)
11908
#define vadd_vv_u32mf2(...) __riscv_vadd_vv_u32mf2(__VA_ARGS__)
11909
#define vadd_vx_u32mf2(...) __riscv_vadd_vx_u32mf2(__VA_ARGS__)
11910
#define vadd_vv_u32m1(...) __riscv_vadd_vv_u32m1(__VA_ARGS__)
11911
#define vadd_vx_u32m1(...) __riscv_vadd_vx_u32m1(__VA_ARGS__)
11912
#define vadd_vv_u32m2(...) __riscv_vadd_vv_u32m2(__VA_ARGS__)
11913
#define vadd_vx_u32m2(...) __riscv_vadd_vx_u32m2(__VA_ARGS__)
11914
#define vadd_vv_u32m4(...) __riscv_vadd_vv_u32m4(__VA_ARGS__)
11915
#define vadd_vx_u32m4(...) __riscv_vadd_vx_u32m4(__VA_ARGS__)
11916
#define vadd_vv_u32m8(...) __riscv_vadd_vv_u32m8(__VA_ARGS__)
11917
#define vadd_vx_u32m8(...) __riscv_vadd_vx_u32m8(__VA_ARGS__)
11918
#define vadd_vv_u64m1(...) __riscv_vadd_vv_u64m1(__VA_ARGS__)
11919
#define vadd_vx_u64m1(...) __riscv_vadd_vx_u64m1(__VA_ARGS__)
11920
#define vadd_vv_u64m2(...) __riscv_vadd_vv_u64m2(__VA_ARGS__)
11921
#define vadd_vx_u64m2(...) __riscv_vadd_vx_u64m2(__VA_ARGS__)
11922
#define vadd_vv_u64m4(...) __riscv_vadd_vv_u64m4(__VA_ARGS__)
11923
#define vadd_vx_u64m4(...) __riscv_vadd_vx_u64m4(__VA_ARGS__)
11924
#define vadd_vv_u64m8(...) __riscv_vadd_vv_u64m8(__VA_ARGS__)
11925
#define vadd_vx_u64m8(...) __riscv_vadd_vx_u64m8(__VA_ARGS__)
11926
#define vsub_vv_u8mf8(...) __riscv_vsub_vv_u8mf8(__VA_ARGS__)
11927
#define vsub_vx_u8mf8(...) __riscv_vsub_vx_u8mf8(__VA_ARGS__)
11928
#define vsub_vv_u8mf4(...) __riscv_vsub_vv_u8mf4(__VA_ARGS__)
11929
#define vsub_vx_u8mf4(...) __riscv_vsub_vx_u8mf4(__VA_ARGS__)
11930
#define vsub_vv_u8mf2(...) __riscv_vsub_vv_u8mf2(__VA_ARGS__)
11931
#define vsub_vx_u8mf2(...) __riscv_vsub_vx_u8mf2(__VA_ARGS__)
11932
#define vsub_vv_u8m1(...) __riscv_vsub_vv_u8m1(__VA_ARGS__)
11933
#define vsub_vx_u8m1(...) __riscv_vsub_vx_u8m1(__VA_ARGS__)
11934
#define vsub_vv_u8m2(...) __riscv_vsub_vv_u8m2(__VA_ARGS__)
11935
#define vsub_vx_u8m2(...) __riscv_vsub_vx_u8m2(__VA_ARGS__)
11936
#define vsub_vv_u8m4(...) __riscv_vsub_vv_u8m4(__VA_ARGS__)
11937
#define vsub_vx_u8m4(...) __riscv_vsub_vx_u8m4(__VA_ARGS__)
11938
#define vsub_vv_u8m8(...) __riscv_vsub_vv_u8m8(__VA_ARGS__)
11939
#define vsub_vx_u8m8(...) __riscv_vsub_vx_u8m8(__VA_ARGS__)
11940
#define vsub_vv_u16mf4(...) __riscv_vsub_vv_u16mf4(__VA_ARGS__)
11941
#define vsub_vx_u16mf4(...) __riscv_vsub_vx_u16mf4(__VA_ARGS__)
11942
#define vsub_vv_u16mf2(...) __riscv_vsub_vv_u16mf2(__VA_ARGS__)
11943
#define vsub_vx_u16mf2(...) __riscv_vsub_vx_u16mf2(__VA_ARGS__)
11944
#define vsub_vv_u16m1(...) __riscv_vsub_vv_u16m1(__VA_ARGS__)
11945
#define vsub_vx_u16m1(...) __riscv_vsub_vx_u16m1(__VA_ARGS__)
11946
#define vsub_vv_u16m2(...) __riscv_vsub_vv_u16m2(__VA_ARGS__)
11947
#define vsub_vx_u16m2(...) __riscv_vsub_vx_u16m2(__VA_ARGS__)
11948
#define vsub_vv_u16m4(...) __riscv_vsub_vv_u16m4(__VA_ARGS__)
11949
#define vsub_vx_u16m4(...) __riscv_vsub_vx_u16m4(__VA_ARGS__)
11950
#define vsub_vv_u16m8(...) __riscv_vsub_vv_u16m8(__VA_ARGS__)
11951
#define vsub_vx_u16m8(...) __riscv_vsub_vx_u16m8(__VA_ARGS__)
11952
#define vsub_vv_u32mf2(...) __riscv_vsub_vv_u32mf2(__VA_ARGS__)
11953
#define vsub_vx_u32mf2(...) __riscv_vsub_vx_u32mf2(__VA_ARGS__)
11954
#define vsub_vv_u32m1(...) __riscv_vsub_vv_u32m1(__VA_ARGS__)
11955
#define vsub_vx_u32m1(...) __riscv_vsub_vx_u32m1(__VA_ARGS__)
11956
#define vsub_vv_u32m2(...) __riscv_vsub_vv_u32m2(__VA_ARGS__)
11957
#define vsub_vx_u32m2(...) __riscv_vsub_vx_u32m2(__VA_ARGS__)
11958
#define vsub_vv_u32m4(...) __riscv_vsub_vv_u32m4(__VA_ARGS__)
11959
#define vsub_vx_u32m4(...) __riscv_vsub_vx_u32m4(__VA_ARGS__)
11960
#define vsub_vv_u32m8(...) __riscv_vsub_vv_u32m8(__VA_ARGS__)
11961
#define vsub_vx_u32m8(...) __riscv_vsub_vx_u32m8(__VA_ARGS__)
11962
#define vsub_vv_u64m1(...) __riscv_vsub_vv_u64m1(__VA_ARGS__)
11963
#define vsub_vx_u64m1(...) __riscv_vsub_vx_u64m1(__VA_ARGS__)
11964
#define vsub_vv_u64m2(...) __riscv_vsub_vv_u64m2(__VA_ARGS__)
11965
#define vsub_vx_u64m2(...) __riscv_vsub_vx_u64m2(__VA_ARGS__)
11966
#define vsub_vv_u64m4(...) __riscv_vsub_vv_u64m4(__VA_ARGS__)
11967
#define vsub_vx_u64m4(...) __riscv_vsub_vx_u64m4(__VA_ARGS__)
11968
#define vsub_vv_u64m8(...) __riscv_vsub_vv_u64m8(__VA_ARGS__)
11969
#define vsub_vx_u64m8(...) __riscv_vsub_vx_u64m8(__VA_ARGS__)
11970
#define vrsub_vx_u8mf8(...) __riscv_vrsub_vx_u8mf8(__VA_ARGS__)
11971
#define vrsub_vx_u8mf4(...) __riscv_vrsub_vx_u8mf4(__VA_ARGS__)
11972
#define vrsub_vx_u8mf2(...) __riscv_vrsub_vx_u8mf2(__VA_ARGS__)
11973
#define vrsub_vx_u8m1(...) __riscv_vrsub_vx_u8m1(__VA_ARGS__)
11974
#define vrsub_vx_u8m2(...) __riscv_vrsub_vx_u8m2(__VA_ARGS__)
11975
#define vrsub_vx_u8m4(...) __riscv_vrsub_vx_u8m4(__VA_ARGS__)
11976
#define vrsub_vx_u8m8(...) __riscv_vrsub_vx_u8m8(__VA_ARGS__)
11977
#define vrsub_vx_u16mf4(...) __riscv_vrsub_vx_u16mf4(__VA_ARGS__)
11978
#define vrsub_vx_u16mf2(...) __riscv_vrsub_vx_u16mf2(__VA_ARGS__)
11979
#define vrsub_vx_u16m1(...) __riscv_vrsub_vx_u16m1(__VA_ARGS__)
11980
#define vrsub_vx_u16m2(...) __riscv_vrsub_vx_u16m2(__VA_ARGS__)
11981
#define vrsub_vx_u16m4(...) __riscv_vrsub_vx_u16m4(__VA_ARGS__)
11982
#define vrsub_vx_u16m8(...) __riscv_vrsub_vx_u16m8(__VA_ARGS__)
11983
#define vrsub_vx_u32mf2(...) __riscv_vrsub_vx_u32mf2(__VA_ARGS__)
11984
#define vrsub_vx_u32m1(...) __riscv_vrsub_vx_u32m1(__VA_ARGS__)
11985
#define vrsub_vx_u32m2(...) __riscv_vrsub_vx_u32m2(__VA_ARGS__)
11986
#define vrsub_vx_u32m4(...) __riscv_vrsub_vx_u32m4(__VA_ARGS__)
11987
#define vrsub_vx_u32m8(...) __riscv_vrsub_vx_u32m8(__VA_ARGS__)
11988
#define vrsub_vx_u64m1(...) __riscv_vrsub_vx_u64m1(__VA_ARGS__)
11989
#define vrsub_vx_u64m2(...) __riscv_vrsub_vx_u64m2(__VA_ARGS__)
11990
#define vrsub_vx_u64m4(...) __riscv_vrsub_vx_u64m4(__VA_ARGS__)
11991
#define vrsub_vx_u64m8(...) __riscv_vrsub_vx_u64m8(__VA_ARGS__)
11992
// masked functions
11993
#define vadd_vv_i8mf8_m(...) __riscv_vadd_vv_i8mf8_tumu(__VA_ARGS__)
11994
#define vadd_vx_i8mf8_m(...) __riscv_vadd_vx_i8mf8_tumu(__VA_ARGS__)
11995
#define vadd_vv_i8mf4_m(...) __riscv_vadd_vv_i8mf4_tumu(__VA_ARGS__)
11996
#define vadd_vx_i8mf4_m(...) __riscv_vadd_vx_i8mf4_tumu(__VA_ARGS__)
11997
#define vadd_vv_i8mf2_m(...) __riscv_vadd_vv_i8mf2_tumu(__VA_ARGS__)
11998
#define vadd_vx_i8mf2_m(...) __riscv_vadd_vx_i8mf2_tumu(__VA_ARGS__)
11999
#define vadd_vv_i8m1_m(...) __riscv_vadd_vv_i8m1_tumu(__VA_ARGS__)
12000
#define vadd_vx_i8m1_m(...) __riscv_vadd_vx_i8m1_tumu(__VA_ARGS__)
12001
#define vadd_vv_i8m2_m(...) __riscv_vadd_vv_i8m2_tumu(__VA_ARGS__)
12002
#define vadd_vx_i8m2_m(...) __riscv_vadd_vx_i8m2_tumu(__VA_ARGS__)
12003
#define vadd_vv_i8m4_m(...) __riscv_vadd_vv_i8m4_tumu(__VA_ARGS__)
12004
#define vadd_vx_i8m4_m(...) __riscv_vadd_vx_i8m4_tumu(__VA_ARGS__)
12005
#define vadd_vv_i8m8_m(...) __riscv_vadd_vv_i8m8_tumu(__VA_ARGS__)
12006
#define vadd_vx_i8m8_m(...) __riscv_vadd_vx_i8m8_tumu(__VA_ARGS__)
12007
#define vadd_vv_i16mf4_m(...) __riscv_vadd_vv_i16mf4_tumu(__VA_ARGS__)
12008
#define vadd_vx_i16mf4_m(...) __riscv_vadd_vx_i16mf4_tumu(__VA_ARGS__)
12009
#define vadd_vv_i16mf2_m(...) __riscv_vadd_vv_i16mf2_tumu(__VA_ARGS__)
12010
#define vadd_vx_i16mf2_m(...) __riscv_vadd_vx_i16mf2_tumu(__VA_ARGS__)
12011
#define vadd_vv_i16m1_m(...) __riscv_vadd_vv_i16m1_tumu(__VA_ARGS__)
12012
#define vadd_vx_i16m1_m(...) __riscv_vadd_vx_i16m1_tumu(__VA_ARGS__)
12013
#define vadd_vv_i16m2_m(...) __riscv_vadd_vv_i16m2_tumu(__VA_ARGS__)
12014
#define vadd_vx_i16m2_m(...) __riscv_vadd_vx_i16m2_tumu(__VA_ARGS__)
12015
#define vadd_vv_i16m4_m(...) __riscv_vadd_vv_i16m4_tumu(__VA_ARGS__)
12016
#define vadd_vx_i16m4_m(...) __riscv_vadd_vx_i16m4_tumu(__VA_ARGS__)
12017
#define vadd_vv_i16m8_m(...) __riscv_vadd_vv_i16m8_tumu(__VA_ARGS__)
12018
#define vadd_vx_i16m8_m(...) __riscv_vadd_vx_i16m8_tumu(__VA_ARGS__)
12019
#define vadd_vv_i32mf2_m(...) __riscv_vadd_vv_i32mf2_tumu(__VA_ARGS__)
12020
#define vadd_vx_i32mf2_m(...) __riscv_vadd_vx_i32mf2_tumu(__VA_ARGS__)
12021
#define vadd_vv_i32m1_m(...) __riscv_vadd_vv_i32m1_tumu(__VA_ARGS__)
12022
#define vadd_vx_i32m1_m(...) __riscv_vadd_vx_i32m1_tumu(__VA_ARGS__)
12023
#define vadd_vv_i32m2_m(...) __riscv_vadd_vv_i32m2_tumu(__VA_ARGS__)
12024
#define vadd_vx_i32m2_m(...) __riscv_vadd_vx_i32m2_tumu(__VA_ARGS__)
12025
#define vadd_vv_i32m4_m(...) __riscv_vadd_vv_i32m4_tumu(__VA_ARGS__)
12026
#define vadd_vx_i32m4_m(...) __riscv_vadd_vx_i32m4_tumu(__VA_ARGS__)
12027
#define vadd_vv_i32m8_m(...) __riscv_vadd_vv_i32m8_tumu(__VA_ARGS__)
12028
#define vadd_vx_i32m8_m(...) __riscv_vadd_vx_i32m8_tumu(__VA_ARGS__)
12029
#define vadd_vv_i64m1_m(...) __riscv_vadd_vv_i64m1_tumu(__VA_ARGS__)
12030
#define vadd_vx_i64m1_m(...) __riscv_vadd_vx_i64m1_tumu(__VA_ARGS__)
12031
#define vadd_vv_i64m2_m(...) __riscv_vadd_vv_i64m2_tumu(__VA_ARGS__)
12032
#define vadd_vx_i64m2_m(...) __riscv_vadd_vx_i64m2_tumu(__VA_ARGS__)
12033
#define vadd_vv_i64m4_m(...) __riscv_vadd_vv_i64m4_tumu(__VA_ARGS__)
12034
#define vadd_vx_i64m4_m(...) __riscv_vadd_vx_i64m4_tumu(__VA_ARGS__)
12035
#define vadd_vv_i64m8_m(...) __riscv_vadd_vv_i64m8_tumu(__VA_ARGS__)
12036
#define vadd_vx_i64m8_m(...) __riscv_vadd_vx_i64m8_tumu(__VA_ARGS__)
12037
#define vsub_vv_i8mf8_m(...) __riscv_vsub_vv_i8mf8_tumu(__VA_ARGS__)
12038
#define vsub_vx_i8mf8_m(...) __riscv_vsub_vx_i8mf8_tumu(__VA_ARGS__)
12039
#define vsub_vv_i8mf4_m(...) __riscv_vsub_vv_i8mf4_tumu(__VA_ARGS__)
12040
#define vsub_vx_i8mf4_m(...) __riscv_vsub_vx_i8mf4_tumu(__VA_ARGS__)
12041
#define vsub_vv_i8mf2_m(...) __riscv_vsub_vv_i8mf2_tumu(__VA_ARGS__)
12042
#define vsub_vx_i8mf2_m(...) __riscv_vsub_vx_i8mf2_tumu(__VA_ARGS__)
12043
#define vsub_vv_i8m1_m(...) __riscv_vsub_vv_i8m1_tumu(__VA_ARGS__)
12044
#define vsub_vx_i8m1_m(...) __riscv_vsub_vx_i8m1_tumu(__VA_ARGS__)
12045
#define vsub_vv_i8m2_m(...) __riscv_vsub_vv_i8m2_tumu(__VA_ARGS__)
12046
#define vsub_vx_i8m2_m(...) __riscv_vsub_vx_i8m2_tumu(__VA_ARGS__)
12047
#define vsub_vv_i8m4_m(...) __riscv_vsub_vv_i8m4_tumu(__VA_ARGS__)
12048
#define vsub_vx_i8m4_m(...) __riscv_vsub_vx_i8m4_tumu(__VA_ARGS__)
12049
#define vsub_vv_i8m8_m(...) __riscv_vsub_vv_i8m8_tumu(__VA_ARGS__)
12050
#define vsub_vx_i8m8_m(...) __riscv_vsub_vx_i8m8_tumu(__VA_ARGS__)
12051
#define vsub_vv_i16mf4_m(...) __riscv_vsub_vv_i16mf4_tumu(__VA_ARGS__)
12052
#define vsub_vx_i16mf4_m(...) __riscv_vsub_vx_i16mf4_tumu(__VA_ARGS__)
12053
#define vsub_vv_i16mf2_m(...) __riscv_vsub_vv_i16mf2_tumu(__VA_ARGS__)
12054
#define vsub_vx_i16mf2_m(...) __riscv_vsub_vx_i16mf2_tumu(__VA_ARGS__)
12055
#define vsub_vv_i16m1_m(...) __riscv_vsub_vv_i16m1_tumu(__VA_ARGS__)
12056
#define vsub_vx_i16m1_m(...) __riscv_vsub_vx_i16m1_tumu(__VA_ARGS__)
12057
#define vsub_vv_i16m2_m(...) __riscv_vsub_vv_i16m2_tumu(__VA_ARGS__)
12058
#define vsub_vx_i16m2_m(...) __riscv_vsub_vx_i16m2_tumu(__VA_ARGS__)
12059
#define vsub_vv_i16m4_m(...) __riscv_vsub_vv_i16m4_tumu(__VA_ARGS__)
12060
#define vsub_vx_i16m4_m(...) __riscv_vsub_vx_i16m4_tumu(__VA_ARGS__)
12061
#define vsub_vv_i16m8_m(...) __riscv_vsub_vv_i16m8_tumu(__VA_ARGS__)
12062
#define vsub_vx_i16m8_m(...) __riscv_vsub_vx_i16m8_tumu(__VA_ARGS__)
12063
#define vsub_vv_i32mf2_m(...) __riscv_vsub_vv_i32mf2_tumu(__VA_ARGS__)
12064
#define vsub_vx_i32mf2_m(...) __riscv_vsub_vx_i32mf2_tumu(__VA_ARGS__)
12065
#define vsub_vv_i32m1_m(...) __riscv_vsub_vv_i32m1_tumu(__VA_ARGS__)
12066
#define vsub_vx_i32m1_m(...) __riscv_vsub_vx_i32m1_tumu(__VA_ARGS__)
12067
#define vsub_vv_i32m2_m(...) __riscv_vsub_vv_i32m2_tumu(__VA_ARGS__)
12068
#define vsub_vx_i32m2_m(...) __riscv_vsub_vx_i32m2_tumu(__VA_ARGS__)
12069
#define vsub_vv_i32m4_m(...) __riscv_vsub_vv_i32m4_tumu(__VA_ARGS__)
12070
#define vsub_vx_i32m4_m(...) __riscv_vsub_vx_i32m4_tumu(__VA_ARGS__)
12071
#define vsub_vv_i32m8_m(...) __riscv_vsub_vv_i32m8_tumu(__VA_ARGS__)
12072
#define vsub_vx_i32m8_m(...) __riscv_vsub_vx_i32m8_tumu(__VA_ARGS__)
12073
#define vsub_vv_i64m1_m(...) __riscv_vsub_vv_i64m1_tumu(__VA_ARGS__)
12074
#define vsub_vx_i64m1_m(...) __riscv_vsub_vx_i64m1_tumu(__VA_ARGS__)
12075
#define vsub_vv_i64m2_m(...) __riscv_vsub_vv_i64m2_tumu(__VA_ARGS__)
12076
#define vsub_vx_i64m2_m(...) __riscv_vsub_vx_i64m2_tumu(__VA_ARGS__)
12077
#define vsub_vv_i64m4_m(...) __riscv_vsub_vv_i64m4_tumu(__VA_ARGS__)
12078
#define vsub_vx_i64m4_m(...) __riscv_vsub_vx_i64m4_tumu(__VA_ARGS__)
12079
#define vsub_vv_i64m8_m(...) __riscv_vsub_vv_i64m8_tumu(__VA_ARGS__)
12080
#define vsub_vx_i64m8_m(...) __riscv_vsub_vx_i64m8_tumu(__VA_ARGS__)
12081
#define vrsub_vx_i8mf8_m(...) __riscv_vrsub_vx_i8mf8_tumu(__VA_ARGS__)
12082
#define vrsub_vx_i8mf4_m(...) __riscv_vrsub_vx_i8mf4_tumu(__VA_ARGS__)
12083
#define vrsub_vx_i8mf2_m(...) __riscv_vrsub_vx_i8mf2_tumu(__VA_ARGS__)
12084
#define vrsub_vx_i8m1_m(...) __riscv_vrsub_vx_i8m1_tumu(__VA_ARGS__)
12085
#define vrsub_vx_i8m2_m(...) __riscv_vrsub_vx_i8m2_tumu(__VA_ARGS__)
12086
#define vrsub_vx_i8m4_m(...) __riscv_vrsub_vx_i8m4_tumu(__VA_ARGS__)
12087
#define vrsub_vx_i8m8_m(...) __riscv_vrsub_vx_i8m8_tumu(__VA_ARGS__)
12088
#define vrsub_vx_i16mf4_m(...) __riscv_vrsub_vx_i16mf4_tumu(__VA_ARGS__)
12089
#define vrsub_vx_i16mf2_m(...) __riscv_vrsub_vx_i16mf2_tumu(__VA_ARGS__)
12090
#define vrsub_vx_i16m1_m(...) __riscv_vrsub_vx_i16m1_tumu(__VA_ARGS__)
12091
#define vrsub_vx_i16m2_m(...) __riscv_vrsub_vx_i16m2_tumu(__VA_ARGS__)
12092
#define vrsub_vx_i16m4_m(...) __riscv_vrsub_vx_i16m4_tumu(__VA_ARGS__)
12093
#define vrsub_vx_i16m8_m(...) __riscv_vrsub_vx_i16m8_tumu(__VA_ARGS__)
12094
#define vrsub_vx_i32mf2_m(...) __riscv_vrsub_vx_i32mf2_tumu(__VA_ARGS__)
12095
#define vrsub_vx_i32m1_m(...) __riscv_vrsub_vx_i32m1_tumu(__VA_ARGS__)
12096
#define vrsub_vx_i32m2_m(...) __riscv_vrsub_vx_i32m2_tumu(__VA_ARGS__)
12097
#define vrsub_vx_i32m4_m(...) __riscv_vrsub_vx_i32m4_tumu(__VA_ARGS__)
12098
#define vrsub_vx_i32m8_m(...) __riscv_vrsub_vx_i32m8_tumu(__VA_ARGS__)
12099
#define vrsub_vx_i64m1_m(...) __riscv_vrsub_vx_i64m1_tumu(__VA_ARGS__)
12100
#define vrsub_vx_i64m2_m(...) __riscv_vrsub_vx_i64m2_tumu(__VA_ARGS__)
12101
#define vrsub_vx_i64m4_m(...) __riscv_vrsub_vx_i64m4_tumu(__VA_ARGS__)
12102
#define vrsub_vx_i64m8_m(...) __riscv_vrsub_vx_i64m8_tumu(__VA_ARGS__)
12103
#define vneg_v_i8mf8_m(...) __riscv_vneg_v_i8mf8_tumu(__VA_ARGS__)
12104
#define vneg_v_i8mf4_m(...) __riscv_vneg_v_i8mf4_tumu(__VA_ARGS__)
12105
#define vneg_v_i8mf2_m(...) __riscv_vneg_v_i8mf2_tumu(__VA_ARGS__)
12106
#define vneg_v_i8m1_m(...) __riscv_vneg_v_i8m1_tumu(__VA_ARGS__)
12107
#define vneg_v_i8m2_m(...) __riscv_vneg_v_i8m2_tumu(__VA_ARGS__)
12108
#define vneg_v_i8m4_m(...) __riscv_vneg_v_i8m4_tumu(__VA_ARGS__)
12109
#define vneg_v_i8m8_m(...) __riscv_vneg_v_i8m8_tumu(__VA_ARGS__)
12110
#define vneg_v_i16mf4_m(...) __riscv_vneg_v_i16mf4_tumu(__VA_ARGS__)
12111
#define vneg_v_i16mf2_m(...) __riscv_vneg_v_i16mf2_tumu(__VA_ARGS__)
12112
#define vneg_v_i16m1_m(...) __riscv_vneg_v_i16m1_tumu(__VA_ARGS__)
12113
#define vneg_v_i16m2_m(...) __riscv_vneg_v_i16m2_tumu(__VA_ARGS__)
12114
#define vneg_v_i16m4_m(...) __riscv_vneg_v_i16m4_tumu(__VA_ARGS__)
12115
#define vneg_v_i16m8_m(...) __riscv_vneg_v_i16m8_tumu(__VA_ARGS__)
12116
#define vneg_v_i32mf2_m(...) __riscv_vneg_v_i32mf2_tumu(__VA_ARGS__)
12117
#define vneg_v_i32m1_m(...) __riscv_vneg_v_i32m1_tumu(__VA_ARGS__)
12118
#define vneg_v_i32m2_m(...) __riscv_vneg_v_i32m2_tumu(__VA_ARGS__)
12119
#define vneg_v_i32m4_m(...) __riscv_vneg_v_i32m4_tumu(__VA_ARGS__)
12120
#define vneg_v_i32m8_m(...) __riscv_vneg_v_i32m8_tumu(__VA_ARGS__)
12121
#define vneg_v_i64m1_m(...) __riscv_vneg_v_i64m1_tumu(__VA_ARGS__)
12122
#define vneg_v_i64m2_m(...) __riscv_vneg_v_i64m2_tumu(__VA_ARGS__)
12123
#define vneg_v_i64m4_m(...) __riscv_vneg_v_i64m4_tumu(__VA_ARGS__)
12124
#define vneg_v_i64m8_m(...) __riscv_vneg_v_i64m8_tumu(__VA_ARGS__)
12125
#define vadd_vv_u8mf8_m(...) __riscv_vadd_vv_u8mf8_tumu(__VA_ARGS__)
12126
#define vadd_vx_u8mf8_m(...) __riscv_vadd_vx_u8mf8_tumu(__VA_ARGS__)
12127
#define vadd_vv_u8mf4_m(...) __riscv_vadd_vv_u8mf4_tumu(__VA_ARGS__)
12128
#define vadd_vx_u8mf4_m(...) __riscv_vadd_vx_u8mf4_tumu(__VA_ARGS__)
12129
#define vadd_vv_u8mf2_m(...) __riscv_vadd_vv_u8mf2_tumu(__VA_ARGS__)
12130
#define vadd_vx_u8mf2_m(...) __riscv_vadd_vx_u8mf2_tumu(__VA_ARGS__)
12131
#define vadd_vv_u8m1_m(...) __riscv_vadd_vv_u8m1_tumu(__VA_ARGS__)
12132
#define vadd_vx_u8m1_m(...) __riscv_vadd_vx_u8m1_tumu(__VA_ARGS__)
12133
#define vadd_vv_u8m2_m(...) __riscv_vadd_vv_u8m2_tumu(__VA_ARGS__)
12134
#define vadd_vx_u8m2_m(...) __riscv_vadd_vx_u8m2_tumu(__VA_ARGS__)
12135
#define vadd_vv_u8m4_m(...) __riscv_vadd_vv_u8m4_tumu(__VA_ARGS__)
12136
#define vadd_vx_u8m4_m(...) __riscv_vadd_vx_u8m4_tumu(__VA_ARGS__)
12137
#define vadd_vv_u8m8_m(...) __riscv_vadd_vv_u8m8_tumu(__VA_ARGS__)
12138
#define vadd_vx_u8m8_m(...) __riscv_vadd_vx_u8m8_tumu(__VA_ARGS__)
12139
#define vadd_vv_u16mf4_m(...) __riscv_vadd_vv_u16mf4_tumu(__VA_ARGS__)
12140
#define vadd_vx_u16mf4_m(...) __riscv_vadd_vx_u16mf4_tumu(__VA_ARGS__)
12141
#define vadd_vv_u16mf2_m(...) __riscv_vadd_vv_u16mf2_tumu(__VA_ARGS__)
12142
#define vadd_vx_u16mf2_m(...) __riscv_vadd_vx_u16mf2_tumu(__VA_ARGS__)
12143
#define vadd_vv_u16m1_m(...) __riscv_vadd_vv_u16m1_tumu(__VA_ARGS__)
12144
#define vadd_vx_u16m1_m(...) __riscv_vadd_vx_u16m1_tumu(__VA_ARGS__)
12145
#define vadd_vv_u16m2_m(...) __riscv_vadd_vv_u16m2_tumu(__VA_ARGS__)
12146
#define vadd_vx_u16m2_m(...) __riscv_vadd_vx_u16m2_tumu(__VA_ARGS__)
12147
#define vadd_vv_u16m4_m(...) __riscv_vadd_vv_u16m4_tumu(__VA_ARGS__)
12148
#define vadd_vx_u16m4_m(...) __riscv_vadd_vx_u16m4_tumu(__VA_ARGS__)
12149
#define vadd_vv_u16m8_m(...) __riscv_vadd_vv_u16m8_tumu(__VA_ARGS__)
12150
#define vadd_vx_u16m8_m(...) __riscv_vadd_vx_u16m8_tumu(__VA_ARGS__)
12151
#define vadd_vv_u32mf2_m(...) __riscv_vadd_vv_u32mf2_tumu(__VA_ARGS__)
12152
#define vadd_vx_u32mf2_m(...) __riscv_vadd_vx_u32mf2_tumu(__VA_ARGS__)
12153
#define vadd_vv_u32m1_m(...) __riscv_vadd_vv_u32m1_tumu(__VA_ARGS__)
12154
#define vadd_vx_u32m1_m(...) __riscv_vadd_vx_u32m1_tumu(__VA_ARGS__)
12155
#define vadd_vv_u32m2_m(...) __riscv_vadd_vv_u32m2_tumu(__VA_ARGS__)
12156
#define vadd_vx_u32m2_m(...) __riscv_vadd_vx_u32m2_tumu(__VA_ARGS__)
12157
#define vadd_vv_u32m4_m(...) __riscv_vadd_vv_u32m4_tumu(__VA_ARGS__)
12158
#define vadd_vx_u32m4_m(...) __riscv_vadd_vx_u32m4_tumu(__VA_ARGS__)
12159
#define vadd_vv_u32m8_m(...) __riscv_vadd_vv_u32m8_tumu(__VA_ARGS__)
12160
#define vadd_vx_u32m8_m(...) __riscv_vadd_vx_u32m8_tumu(__VA_ARGS__)
12161
#define vadd_vv_u64m1_m(...) __riscv_vadd_vv_u64m1_tumu(__VA_ARGS__)
12162
#define vadd_vx_u64m1_m(...) __riscv_vadd_vx_u64m1_tumu(__VA_ARGS__)
12163
#define vadd_vv_u64m2_m(...) __riscv_vadd_vv_u64m2_tumu(__VA_ARGS__)
12164
#define vadd_vx_u64m2_m(...) __riscv_vadd_vx_u64m2_tumu(__VA_ARGS__)
12165
#define vadd_vv_u64m4_m(...) __riscv_vadd_vv_u64m4_tumu(__VA_ARGS__)
12166
#define vadd_vx_u64m4_m(...) __riscv_vadd_vx_u64m4_tumu(__VA_ARGS__)
12167
#define vadd_vv_u64m8_m(...) __riscv_vadd_vv_u64m8_tumu(__VA_ARGS__)
12168
#define vadd_vx_u64m8_m(...) __riscv_vadd_vx_u64m8_tumu(__VA_ARGS__)
12169
#define vsub_vv_u8mf8_m(...) __riscv_vsub_vv_u8mf8_tumu(__VA_ARGS__)
12170
#define vsub_vx_u8mf8_m(...) __riscv_vsub_vx_u8mf8_tumu(__VA_ARGS__)
12171
#define vsub_vv_u8mf4_m(...) __riscv_vsub_vv_u8mf4_tumu(__VA_ARGS__)
12172
#define vsub_vx_u8mf4_m(...) __riscv_vsub_vx_u8mf4_tumu(__VA_ARGS__)
12173
#define vsub_vv_u8mf2_m(...) __riscv_vsub_vv_u8mf2_tumu(__VA_ARGS__)
12174
#define vsub_vx_u8mf2_m(...) __riscv_vsub_vx_u8mf2_tumu(__VA_ARGS__)
12175
#define vsub_vv_u8m1_m(...) __riscv_vsub_vv_u8m1_tumu(__VA_ARGS__)
12176
#define vsub_vx_u8m1_m(...) __riscv_vsub_vx_u8m1_tumu(__VA_ARGS__)
12177
#define vsub_vv_u8m2_m(...) __riscv_vsub_vv_u8m2_tumu(__VA_ARGS__)
12178
#define vsub_vx_u8m2_m(...) __riscv_vsub_vx_u8m2_tumu(__VA_ARGS__)
12179
#define vsub_vv_u8m4_m(...) __riscv_vsub_vv_u8m4_tumu(__VA_ARGS__)
12180
#define vsub_vx_u8m4_m(...) __riscv_vsub_vx_u8m4_tumu(__VA_ARGS__)
12181
#define vsub_vv_u8m8_m(...) __riscv_vsub_vv_u8m8_tumu(__VA_ARGS__)
12182
#define vsub_vx_u8m8_m(...) __riscv_vsub_vx_u8m8_tumu(__VA_ARGS__)
12183
#define vsub_vv_u16mf4_m(...) __riscv_vsub_vv_u16mf4_tumu(__VA_ARGS__)
12184
#define vsub_vx_u16mf4_m(...) __riscv_vsub_vx_u16mf4_tumu(__VA_ARGS__)
12185
#define vsub_vv_u16mf2_m(...) __riscv_vsub_vv_u16mf2_tumu(__VA_ARGS__)
12186
#define vsub_vx_u16mf2_m(...) __riscv_vsub_vx_u16mf2_tumu(__VA_ARGS__)
12187
#define vsub_vv_u16m1_m(...) __riscv_vsub_vv_u16m1_tumu(__VA_ARGS__)
12188
#define vsub_vx_u16m1_m(...) __riscv_vsub_vx_u16m1_tumu(__VA_ARGS__)
12189
#define vsub_vv_u16m2_m(...) __riscv_vsub_vv_u16m2_tumu(__VA_ARGS__)
12190
#define vsub_vx_u16m2_m(...) __riscv_vsub_vx_u16m2_tumu(__VA_ARGS__)
12191
#define vsub_vv_u16m4_m(...) __riscv_vsub_vv_u16m4_tumu(__VA_ARGS__)
12192
#define vsub_vx_u16m4_m(...) __riscv_vsub_vx_u16m4_tumu(__VA_ARGS__)
12193
#define vsub_vv_u16m8_m(...) __riscv_vsub_vv_u16m8_tumu(__VA_ARGS__)
12194
#define vsub_vx_u16m8_m(...) __riscv_vsub_vx_u16m8_tumu(__VA_ARGS__)
12195
#define vsub_vv_u32mf2_m(...) __riscv_vsub_vv_u32mf2_tumu(__VA_ARGS__)
12196
#define vsub_vx_u32mf2_m(...) __riscv_vsub_vx_u32mf2_tumu(__VA_ARGS__)
12197
#define vsub_vv_u32m1_m(...) __riscv_vsub_vv_u32m1_tumu(__VA_ARGS__)
12198
#define vsub_vx_u32m1_m(...) __riscv_vsub_vx_u32m1_tumu(__VA_ARGS__)
12199
#define vsub_vv_u32m2_m(...) __riscv_vsub_vv_u32m2_tumu(__VA_ARGS__)
12200
#define vsub_vx_u32m2_m(...) __riscv_vsub_vx_u32m2_tumu(__VA_ARGS__)
12201
#define vsub_vv_u32m4_m(...) __riscv_vsub_vv_u32m4_tumu(__VA_ARGS__)
12202
#define vsub_vx_u32m4_m(...) __riscv_vsub_vx_u32m4_tumu(__VA_ARGS__)
12203
#define vsub_vv_u32m8_m(...) __riscv_vsub_vv_u32m8_tumu(__VA_ARGS__)
12204
#define vsub_vx_u32m8_m(...) __riscv_vsub_vx_u32m8_tumu(__VA_ARGS__)
12205
#define vsub_vv_u64m1_m(...) __riscv_vsub_vv_u64m1_tumu(__VA_ARGS__)
12206
#define vsub_vx_u64m1_m(...) __riscv_vsub_vx_u64m1_tumu(__VA_ARGS__)
12207
#define vsub_vv_u64m2_m(...) __riscv_vsub_vv_u64m2_tumu(__VA_ARGS__)
12208
#define vsub_vx_u64m2_m(...) __riscv_vsub_vx_u64m2_tumu(__VA_ARGS__)
12209
#define vsub_vv_u64m4_m(...) __riscv_vsub_vv_u64m4_tumu(__VA_ARGS__)
12210
#define vsub_vx_u64m4_m(...) __riscv_vsub_vx_u64m4_tumu(__VA_ARGS__)
12211
#define vsub_vv_u64m8_m(...) __riscv_vsub_vv_u64m8_tumu(__VA_ARGS__)
12212
#define vsub_vx_u64m8_m(...) __riscv_vsub_vx_u64m8_tumu(__VA_ARGS__)
12213
#define vrsub_vx_u8mf8_m(...) __riscv_vrsub_vx_u8mf8_tumu(__VA_ARGS__)
12214
#define vrsub_vx_u8mf4_m(...) __riscv_vrsub_vx_u8mf4_tumu(__VA_ARGS__)
12215
#define vrsub_vx_u8mf2_m(...) __riscv_vrsub_vx_u8mf2_tumu(__VA_ARGS__)
12216
#define vrsub_vx_u8m1_m(...) __riscv_vrsub_vx_u8m1_tumu(__VA_ARGS__)
12217
#define vrsub_vx_u8m2_m(...) __riscv_vrsub_vx_u8m2_tumu(__VA_ARGS__)
12218
#define vrsub_vx_u8m4_m(...) __riscv_vrsub_vx_u8m4_tumu(__VA_ARGS__)
12219
#define vrsub_vx_u8m8_m(...) __riscv_vrsub_vx_u8m8_tumu(__VA_ARGS__)
12220
#define vrsub_vx_u16mf4_m(...) __riscv_vrsub_vx_u16mf4_tumu(__VA_ARGS__)
12221
#define vrsub_vx_u16mf2_m(...) __riscv_vrsub_vx_u16mf2_tumu(__VA_ARGS__)
12222
#define vrsub_vx_u16m1_m(...) __riscv_vrsub_vx_u16m1_tumu(__VA_ARGS__)
12223
#define vrsub_vx_u16m2_m(...) __riscv_vrsub_vx_u16m2_tumu(__VA_ARGS__)
12224
#define vrsub_vx_u16m4_m(...) __riscv_vrsub_vx_u16m4_tumu(__VA_ARGS__)
12225
#define vrsub_vx_u16m8_m(...) __riscv_vrsub_vx_u16m8_tumu(__VA_ARGS__)
12226
#define vrsub_vx_u32mf2_m(...) __riscv_vrsub_vx_u32mf2_tumu(__VA_ARGS__)
12227
#define vrsub_vx_u32m1_m(...) __riscv_vrsub_vx_u32m1_tumu(__VA_ARGS__)
12228
#define vrsub_vx_u32m2_m(...) __riscv_vrsub_vx_u32m2_tumu(__VA_ARGS__)
12229
#define vrsub_vx_u32m4_m(...) __riscv_vrsub_vx_u32m4_tumu(__VA_ARGS__)
12230
#define vrsub_vx_u32m8_m(...) __riscv_vrsub_vx_u32m8_tumu(__VA_ARGS__)
12231
#define vrsub_vx_u64m1_m(...) __riscv_vrsub_vx_u64m1_tumu(__VA_ARGS__)
12232
#define vrsub_vx_u64m2_m(...) __riscv_vrsub_vx_u64m2_tumu(__VA_ARGS__)
12233
#define vrsub_vx_u64m4_m(...) __riscv_vrsub_vx_u64m4_tumu(__VA_ARGS__)
12234
#define vrsub_vx_u64m8_m(...) __riscv_vrsub_vx_u64m8_tumu(__VA_ARGS__)
12235
#define vwadd_vv_i16mf4(...) __riscv_vwadd_vv_i16mf4(__VA_ARGS__)
12236
#define vwadd_vx_i16mf4(...) __riscv_vwadd_vx_i16mf4(__VA_ARGS__)
12237
#define vwadd_wv_i16mf4(...) __riscv_vwadd_wv_i16mf4(__VA_ARGS__)
12238
#define vwadd_wx_i16mf4(...) __riscv_vwadd_wx_i16mf4(__VA_ARGS__)
12239
#define vwadd_vv_i16mf2(...) __riscv_vwadd_vv_i16mf2(__VA_ARGS__)
12240
#define vwadd_vx_i16mf2(...) __riscv_vwadd_vx_i16mf2(__VA_ARGS__)
12241
#define vwadd_wv_i16mf2(...) __riscv_vwadd_wv_i16mf2(__VA_ARGS__)
12242
#define vwadd_wx_i16mf2(...) __riscv_vwadd_wx_i16mf2(__VA_ARGS__)
12243
#define vwadd_vv_i16m1(...) __riscv_vwadd_vv_i16m1(__VA_ARGS__)
12244
#define vwadd_vx_i16m1(...) __riscv_vwadd_vx_i16m1(__VA_ARGS__)
12245
#define vwadd_wv_i16m1(...) __riscv_vwadd_wv_i16m1(__VA_ARGS__)
12246
#define vwadd_wx_i16m1(...) __riscv_vwadd_wx_i16m1(__VA_ARGS__)
12247
#define vwadd_vv_i16m2(...) __riscv_vwadd_vv_i16m2(__VA_ARGS__)
12248
#define vwadd_vx_i16m2(...) __riscv_vwadd_vx_i16m2(__VA_ARGS__)
12249
#define vwadd_wv_i16m2(...) __riscv_vwadd_wv_i16m2(__VA_ARGS__)
12250
#define vwadd_wx_i16m2(...) __riscv_vwadd_wx_i16m2(__VA_ARGS__)
12251
#define vwadd_vv_i16m4(...) __riscv_vwadd_vv_i16m4(__VA_ARGS__)
12252
#define vwadd_vx_i16m4(...) __riscv_vwadd_vx_i16m4(__VA_ARGS__)
12253
#define vwadd_wv_i16m4(...) __riscv_vwadd_wv_i16m4(__VA_ARGS__)
12254
#define vwadd_wx_i16m4(...) __riscv_vwadd_wx_i16m4(__VA_ARGS__)
12255
#define vwadd_vv_i16m8(...) __riscv_vwadd_vv_i16m8(__VA_ARGS__)
12256
#define vwadd_vx_i16m8(...) __riscv_vwadd_vx_i16m8(__VA_ARGS__)
12257
#define vwadd_wv_i16m8(...) __riscv_vwadd_wv_i16m8(__VA_ARGS__)
12258
#define vwadd_wx_i16m8(...) __riscv_vwadd_wx_i16m8(__VA_ARGS__)
12259
#define vwadd_vv_i32mf2(...) __riscv_vwadd_vv_i32mf2(__VA_ARGS__)
12260
#define vwadd_vx_i32mf2(...) __riscv_vwadd_vx_i32mf2(__VA_ARGS__)
12261
#define vwadd_wv_i32mf2(...) __riscv_vwadd_wv_i32mf2(__VA_ARGS__)
12262
#define vwadd_wx_i32mf2(...) __riscv_vwadd_wx_i32mf2(__VA_ARGS__)
12263
#define vwadd_vv_i32m1(...) __riscv_vwadd_vv_i32m1(__VA_ARGS__)
12264
#define vwadd_vx_i32m1(...) __riscv_vwadd_vx_i32m1(__VA_ARGS__)
12265
#define vwadd_wv_i32m1(...) __riscv_vwadd_wv_i32m1(__VA_ARGS__)
12266
#define vwadd_wx_i32m1(...) __riscv_vwadd_wx_i32m1(__VA_ARGS__)
12267
#define vwadd_vv_i32m2(...) __riscv_vwadd_vv_i32m2(__VA_ARGS__)
12268
#define vwadd_vx_i32m2(...) __riscv_vwadd_vx_i32m2(__VA_ARGS__)
12269
#define vwadd_wv_i32m2(...) __riscv_vwadd_wv_i32m2(__VA_ARGS__)
12270
#define vwadd_wx_i32m2(...) __riscv_vwadd_wx_i32m2(__VA_ARGS__)
12271
#define vwadd_vv_i32m4(...) __riscv_vwadd_vv_i32m4(__VA_ARGS__)
12272
#define vwadd_vx_i32m4(...) __riscv_vwadd_vx_i32m4(__VA_ARGS__)
12273
#define vwadd_wv_i32m4(...) __riscv_vwadd_wv_i32m4(__VA_ARGS__)
12274
#define vwadd_wx_i32m4(...) __riscv_vwadd_wx_i32m4(__VA_ARGS__)
12275
#define vwadd_vv_i32m8(...) __riscv_vwadd_vv_i32m8(__VA_ARGS__)
12276
#define vwadd_vx_i32m8(...) __riscv_vwadd_vx_i32m8(__VA_ARGS__)
12277
#define vwadd_wv_i32m8(...) __riscv_vwadd_wv_i32m8(__VA_ARGS__)
12278
#define vwadd_wx_i32m8(...) __riscv_vwadd_wx_i32m8(__VA_ARGS__)
12279
#define vwadd_vv_i64m1(...) __riscv_vwadd_vv_i64m1(__VA_ARGS__)
12280
#define vwadd_vx_i64m1(...) __riscv_vwadd_vx_i64m1(__VA_ARGS__)
12281
#define vwadd_wv_i64m1(...) __riscv_vwadd_wv_i64m1(__VA_ARGS__)
12282
#define vwadd_wx_i64m1(...) __riscv_vwadd_wx_i64m1(__VA_ARGS__)
12283
#define vwadd_vv_i64m2(...) __riscv_vwadd_vv_i64m2(__VA_ARGS__)
12284
#define vwadd_vx_i64m2(...) __riscv_vwadd_vx_i64m2(__VA_ARGS__)
12285
#define vwadd_wv_i64m2(...) __riscv_vwadd_wv_i64m2(__VA_ARGS__)
12286
#define vwadd_wx_i64m2(...) __riscv_vwadd_wx_i64m2(__VA_ARGS__)
12287
#define vwadd_vv_i64m4(...) __riscv_vwadd_vv_i64m4(__VA_ARGS__)
12288
#define vwadd_vx_i64m4(...) __riscv_vwadd_vx_i64m4(__VA_ARGS__)
12289
#define vwadd_wv_i64m4(...) __riscv_vwadd_wv_i64m4(__VA_ARGS__)
12290
#define vwadd_wx_i64m4(...) __riscv_vwadd_wx_i64m4(__VA_ARGS__)
12291
#define vwadd_vv_i64m8(...) __riscv_vwadd_vv_i64m8(__VA_ARGS__)
12292
#define vwadd_vx_i64m8(...) __riscv_vwadd_vx_i64m8(__VA_ARGS__)
12293
#define vwadd_wv_i64m8(...) __riscv_vwadd_wv_i64m8(__VA_ARGS__)
12294
#define vwadd_wx_i64m8(...) __riscv_vwadd_wx_i64m8(__VA_ARGS__)
12295
#define vwsub_vv_i16mf4(...) __riscv_vwsub_vv_i16mf4(__VA_ARGS__)
12296
#define vwsub_vx_i16mf4(...) __riscv_vwsub_vx_i16mf4(__VA_ARGS__)
12297
#define vwsub_wv_i16mf4(...) __riscv_vwsub_wv_i16mf4(__VA_ARGS__)
12298
#define vwsub_wx_i16mf4(...) __riscv_vwsub_wx_i16mf4(__VA_ARGS__)
12299
#define vwsub_vv_i16mf2(...) __riscv_vwsub_vv_i16mf2(__VA_ARGS__)
12300
#define vwsub_vx_i16mf2(...) __riscv_vwsub_vx_i16mf2(__VA_ARGS__)
12301
#define vwsub_wv_i16mf2(...) __riscv_vwsub_wv_i16mf2(__VA_ARGS__)
12302
#define vwsub_wx_i16mf2(...) __riscv_vwsub_wx_i16mf2(__VA_ARGS__)
12303
#define vwsub_vv_i16m1(...) __riscv_vwsub_vv_i16m1(__VA_ARGS__)
12304
#define vwsub_vx_i16m1(...) __riscv_vwsub_vx_i16m1(__VA_ARGS__)
12305
#define vwsub_wv_i16m1(...) __riscv_vwsub_wv_i16m1(__VA_ARGS__)
12306
#define vwsub_wx_i16m1(...) __riscv_vwsub_wx_i16m1(__VA_ARGS__)
12307
#define vwsub_vv_i16m2(...) __riscv_vwsub_vv_i16m2(__VA_ARGS__)
12308
#define vwsub_vx_i16m2(...) __riscv_vwsub_vx_i16m2(__VA_ARGS__)
12309
#define vwsub_wv_i16m2(...) __riscv_vwsub_wv_i16m2(__VA_ARGS__)
12310
#define vwsub_wx_i16m2(...) __riscv_vwsub_wx_i16m2(__VA_ARGS__)
12311
#define vwsub_vv_i16m4(...) __riscv_vwsub_vv_i16m4(__VA_ARGS__)
12312
#define vwsub_vx_i16m4(...) __riscv_vwsub_vx_i16m4(__VA_ARGS__)
12313
#define vwsub_wv_i16m4(...) __riscv_vwsub_wv_i16m4(__VA_ARGS__)
12314
#define vwsub_wx_i16m4(...) __riscv_vwsub_wx_i16m4(__VA_ARGS__)
12315
#define vwsub_vv_i16m8(...) __riscv_vwsub_vv_i16m8(__VA_ARGS__)
12316
#define vwsub_vx_i16m8(...) __riscv_vwsub_vx_i16m8(__VA_ARGS__)
12317
#define vwsub_wv_i16m8(...) __riscv_vwsub_wv_i16m8(__VA_ARGS__)
12318
#define vwsub_wx_i16m8(...) __riscv_vwsub_wx_i16m8(__VA_ARGS__)
12319
#define vwsub_vv_i32mf2(...) __riscv_vwsub_vv_i32mf2(__VA_ARGS__)
12320
#define vwsub_vx_i32mf2(...) __riscv_vwsub_vx_i32mf2(__VA_ARGS__)
12321
#define vwsub_wv_i32mf2(...) __riscv_vwsub_wv_i32mf2(__VA_ARGS__)
12322
#define vwsub_wx_i32mf2(...) __riscv_vwsub_wx_i32mf2(__VA_ARGS__)
12323
#define vwsub_vv_i32m1(...) __riscv_vwsub_vv_i32m1(__VA_ARGS__)
12324
#define vwsub_vx_i32m1(...) __riscv_vwsub_vx_i32m1(__VA_ARGS__)
12325
#define vwsub_wv_i32m1(...) __riscv_vwsub_wv_i32m1(__VA_ARGS__)
12326
#define vwsub_wx_i32m1(...) __riscv_vwsub_wx_i32m1(__VA_ARGS__)
12327
#define vwsub_vv_i32m2(...) __riscv_vwsub_vv_i32m2(__VA_ARGS__)
12328
#define vwsub_vx_i32m2(...) __riscv_vwsub_vx_i32m2(__VA_ARGS__)
12329
#define vwsub_wv_i32m2(...) __riscv_vwsub_wv_i32m2(__VA_ARGS__)
12330
#define vwsub_wx_i32m2(...) __riscv_vwsub_wx_i32m2(__VA_ARGS__)
12331
#define vwsub_vv_i32m4(...) __riscv_vwsub_vv_i32m4(__VA_ARGS__)
12332
#define vwsub_vx_i32m4(...) __riscv_vwsub_vx_i32m4(__VA_ARGS__)
12333
#define vwsub_wv_i32m4(...) __riscv_vwsub_wv_i32m4(__VA_ARGS__)
12334
#define vwsub_wx_i32m4(...) __riscv_vwsub_wx_i32m4(__VA_ARGS__)
12335
#define vwsub_vv_i32m8(...) __riscv_vwsub_vv_i32m8(__VA_ARGS__)
12336
#define vwsub_vx_i32m8(...) __riscv_vwsub_vx_i32m8(__VA_ARGS__)
12337
#define vwsub_wv_i32m8(...) __riscv_vwsub_wv_i32m8(__VA_ARGS__)
12338
#define vwsub_wx_i32m8(...) __riscv_vwsub_wx_i32m8(__VA_ARGS__)
12339
#define vwsub_vv_i64m1(...) __riscv_vwsub_vv_i64m1(__VA_ARGS__)
12340
#define vwsub_vx_i64m1(...) __riscv_vwsub_vx_i64m1(__VA_ARGS__)
12341
#define vwsub_wv_i64m1(...) __riscv_vwsub_wv_i64m1(__VA_ARGS__)
12342
#define vwsub_wx_i64m1(...) __riscv_vwsub_wx_i64m1(__VA_ARGS__)
12343
#define vwsub_vv_i64m2(...) __riscv_vwsub_vv_i64m2(__VA_ARGS__)
12344
#define vwsub_vx_i64m2(...) __riscv_vwsub_vx_i64m2(__VA_ARGS__)
12345
#define vwsub_wv_i64m2(...) __riscv_vwsub_wv_i64m2(__VA_ARGS__)
12346
#define vwsub_wx_i64m2(...) __riscv_vwsub_wx_i64m2(__VA_ARGS__)
12347
#define vwsub_vv_i64m4(...) __riscv_vwsub_vv_i64m4(__VA_ARGS__)
12348
#define vwsub_vx_i64m4(...) __riscv_vwsub_vx_i64m4(__VA_ARGS__)
12349
#define vwsub_wv_i64m4(...) __riscv_vwsub_wv_i64m4(__VA_ARGS__)
12350
#define vwsub_wx_i64m4(...) __riscv_vwsub_wx_i64m4(__VA_ARGS__)
12351
#define vwsub_vv_i64m8(...) __riscv_vwsub_vv_i64m8(__VA_ARGS__)
12352
#define vwsub_vx_i64m8(...) __riscv_vwsub_vx_i64m8(__VA_ARGS__)
12353
#define vwsub_wv_i64m8(...) __riscv_vwsub_wv_i64m8(__VA_ARGS__)
12354
#define vwsub_wx_i64m8(...) __riscv_vwsub_wx_i64m8(__VA_ARGS__)
12355
#define vwaddu_vv_u16mf4(...) __riscv_vwaddu_vv_u16mf4(__VA_ARGS__)
12356
#define vwaddu_vx_u16mf4(...) __riscv_vwaddu_vx_u16mf4(__VA_ARGS__)
12357
#define vwaddu_wv_u16mf4(...) __riscv_vwaddu_wv_u16mf4(__VA_ARGS__)
12358
#define vwaddu_wx_u16mf4(...) __riscv_vwaddu_wx_u16mf4(__VA_ARGS__)
12359
#define vwaddu_vv_u16mf2(...) __riscv_vwaddu_vv_u16mf2(__VA_ARGS__)
12360
#define vwaddu_vx_u16mf2(...) __riscv_vwaddu_vx_u16mf2(__VA_ARGS__)
12361
#define vwaddu_wv_u16mf2(...) __riscv_vwaddu_wv_u16mf2(__VA_ARGS__)
12362
#define vwaddu_wx_u16mf2(...) __riscv_vwaddu_wx_u16mf2(__VA_ARGS__)
12363
#define vwaddu_vv_u16m1(...) __riscv_vwaddu_vv_u16m1(__VA_ARGS__)
12364
#define vwaddu_vx_u16m1(...) __riscv_vwaddu_vx_u16m1(__VA_ARGS__)
12365
#define vwaddu_wv_u16m1(...) __riscv_vwaddu_wv_u16m1(__VA_ARGS__)
12366
#define vwaddu_wx_u16m1(...) __riscv_vwaddu_wx_u16m1(__VA_ARGS__)
12367
#define vwaddu_vv_u16m2(...) __riscv_vwaddu_vv_u16m2(__VA_ARGS__)
12368
#define vwaddu_vx_u16m2(...) __riscv_vwaddu_vx_u16m2(__VA_ARGS__)
12369
#define vwaddu_wv_u16m2(...) __riscv_vwaddu_wv_u16m2(__VA_ARGS__)
12370
#define vwaddu_wx_u16m2(...) __riscv_vwaddu_wx_u16m2(__VA_ARGS__)
12371
#define vwaddu_vv_u16m4(...) __riscv_vwaddu_vv_u16m4(__VA_ARGS__)
12372
#define vwaddu_vx_u16m4(...) __riscv_vwaddu_vx_u16m4(__VA_ARGS__)
12373
#define vwaddu_wv_u16m4(...) __riscv_vwaddu_wv_u16m4(__VA_ARGS__)
12374
#define vwaddu_wx_u16m4(...) __riscv_vwaddu_wx_u16m4(__VA_ARGS__)
12375
#define vwaddu_vv_u16m8(...) __riscv_vwaddu_vv_u16m8(__VA_ARGS__)
12376
#define vwaddu_vx_u16m8(...) __riscv_vwaddu_vx_u16m8(__VA_ARGS__)
12377
#define vwaddu_wv_u16m8(...) __riscv_vwaddu_wv_u16m8(__VA_ARGS__)
12378
#define vwaddu_wx_u16m8(...) __riscv_vwaddu_wx_u16m8(__VA_ARGS__)
12379
#define vwaddu_vv_u32mf2(...) __riscv_vwaddu_vv_u32mf2(__VA_ARGS__)
12380
#define vwaddu_vx_u32mf2(...) __riscv_vwaddu_vx_u32mf2(__VA_ARGS__)
12381
#define vwaddu_wv_u32mf2(...) __riscv_vwaddu_wv_u32mf2(__VA_ARGS__)
12382
#define vwaddu_wx_u32mf2(...) __riscv_vwaddu_wx_u32mf2(__VA_ARGS__)
12383
#define vwaddu_vv_u32m1(...) __riscv_vwaddu_vv_u32m1(__VA_ARGS__)
12384
#define vwaddu_vx_u32m1(...) __riscv_vwaddu_vx_u32m1(__VA_ARGS__)
12385
#define vwaddu_wv_u32m1(...) __riscv_vwaddu_wv_u32m1(__VA_ARGS__)
12386
#define vwaddu_wx_u32m1(...) __riscv_vwaddu_wx_u32m1(__VA_ARGS__)
12387
#define vwaddu_vv_u32m2(...) __riscv_vwaddu_vv_u32m2(__VA_ARGS__)
12388
#define vwaddu_vx_u32m2(...) __riscv_vwaddu_vx_u32m2(__VA_ARGS__)
12389
#define vwaddu_wv_u32m2(...) __riscv_vwaddu_wv_u32m2(__VA_ARGS__)
12390
#define vwaddu_wx_u32m2(...) __riscv_vwaddu_wx_u32m2(__VA_ARGS__)
12391
#define vwaddu_vv_u32m4(...) __riscv_vwaddu_vv_u32m4(__VA_ARGS__)
12392
#define vwaddu_vx_u32m4(...) __riscv_vwaddu_vx_u32m4(__VA_ARGS__)
12393
#define vwaddu_wv_u32m4(...) __riscv_vwaddu_wv_u32m4(__VA_ARGS__)
12394
#define vwaddu_wx_u32m4(...) __riscv_vwaddu_wx_u32m4(__VA_ARGS__)
12395
#define vwaddu_vv_u32m8(...) __riscv_vwaddu_vv_u32m8(__VA_ARGS__)
12396
#define vwaddu_vx_u32m8(...) __riscv_vwaddu_vx_u32m8(__VA_ARGS__)
12397
#define vwaddu_wv_u32m8(...) __riscv_vwaddu_wv_u32m8(__VA_ARGS__)
12398
#define vwaddu_wx_u32m8(...) __riscv_vwaddu_wx_u32m8(__VA_ARGS__)
12399
#define vwaddu_vv_u64m1(...) __riscv_vwaddu_vv_u64m1(__VA_ARGS__)
12400
#define vwaddu_vx_u64m1(...) __riscv_vwaddu_vx_u64m1(__VA_ARGS__)
12401
#define vwaddu_wv_u64m1(...) __riscv_vwaddu_wv_u64m1(__VA_ARGS__)
12402
#define vwaddu_wx_u64m1(...) __riscv_vwaddu_wx_u64m1(__VA_ARGS__)
12403
#define vwaddu_vv_u64m2(...) __riscv_vwaddu_vv_u64m2(__VA_ARGS__)
12404
#define vwaddu_vx_u64m2(...) __riscv_vwaddu_vx_u64m2(__VA_ARGS__)
12405
#define vwaddu_wv_u64m2(...) __riscv_vwaddu_wv_u64m2(__VA_ARGS__)
12406
#define vwaddu_wx_u64m2(...) __riscv_vwaddu_wx_u64m2(__VA_ARGS__)
12407
#define vwaddu_vv_u64m4(...) __riscv_vwaddu_vv_u64m4(__VA_ARGS__)
12408
#define vwaddu_vx_u64m4(...) __riscv_vwaddu_vx_u64m4(__VA_ARGS__)
12409
#define vwaddu_wv_u64m4(...) __riscv_vwaddu_wv_u64m4(__VA_ARGS__)
12410
#define vwaddu_wx_u64m4(...) __riscv_vwaddu_wx_u64m4(__VA_ARGS__)
12411
#define vwaddu_vv_u64m8(...) __riscv_vwaddu_vv_u64m8(__VA_ARGS__)
12412
#define vwaddu_vx_u64m8(...) __riscv_vwaddu_vx_u64m8(__VA_ARGS__)
12413
#define vwaddu_wv_u64m8(...) __riscv_vwaddu_wv_u64m8(__VA_ARGS__)
12414
#define vwaddu_wx_u64m8(...) __riscv_vwaddu_wx_u64m8(__VA_ARGS__)
12415
#define vwsubu_vv_u16mf4(...) __riscv_vwsubu_vv_u16mf4(__VA_ARGS__)
12416
#define vwsubu_vx_u16mf4(...) __riscv_vwsubu_vx_u16mf4(__VA_ARGS__)
12417
#define vwsubu_wv_u16mf4(...) __riscv_vwsubu_wv_u16mf4(__VA_ARGS__)
12418
#define vwsubu_wx_u16mf4(...) __riscv_vwsubu_wx_u16mf4(__VA_ARGS__)
12419
#define vwsubu_vv_u16mf2(...) __riscv_vwsubu_vv_u16mf2(__VA_ARGS__)
12420
#define vwsubu_vx_u16mf2(...) __riscv_vwsubu_vx_u16mf2(__VA_ARGS__)
12421
#define vwsubu_wv_u16mf2(...) __riscv_vwsubu_wv_u16mf2(__VA_ARGS__)
12422
#define vwsubu_wx_u16mf2(...) __riscv_vwsubu_wx_u16mf2(__VA_ARGS__)
12423
#define vwsubu_vv_u16m1(...) __riscv_vwsubu_vv_u16m1(__VA_ARGS__)
12424
#define vwsubu_vx_u16m1(...) __riscv_vwsubu_vx_u16m1(__VA_ARGS__)
12425
#define vwsubu_wv_u16m1(...) __riscv_vwsubu_wv_u16m1(__VA_ARGS__)
12426
#define vwsubu_wx_u16m1(...) __riscv_vwsubu_wx_u16m1(__VA_ARGS__)
12427
#define vwsubu_vv_u16m2(...) __riscv_vwsubu_vv_u16m2(__VA_ARGS__)
12428
#define vwsubu_vx_u16m2(...) __riscv_vwsubu_vx_u16m2(__VA_ARGS__)
12429
#define vwsubu_wv_u16m2(...) __riscv_vwsubu_wv_u16m2(__VA_ARGS__)
12430
#define vwsubu_wx_u16m2(...) __riscv_vwsubu_wx_u16m2(__VA_ARGS__)
12431
#define vwsubu_vv_u16m4(...) __riscv_vwsubu_vv_u16m4(__VA_ARGS__)
12432
#define vwsubu_vx_u16m4(...) __riscv_vwsubu_vx_u16m4(__VA_ARGS__)
12433
#define vwsubu_wv_u16m4(...) __riscv_vwsubu_wv_u16m4(__VA_ARGS__)
12434
#define vwsubu_wx_u16m4(...) __riscv_vwsubu_wx_u16m4(__VA_ARGS__)
12435
#define vwsubu_vv_u16m8(...) __riscv_vwsubu_vv_u16m8(__VA_ARGS__)
12436
#define vwsubu_vx_u16m8(...) __riscv_vwsubu_vx_u16m8(__VA_ARGS__)
12437
#define vwsubu_wv_u16m8(...) __riscv_vwsubu_wv_u16m8(__VA_ARGS__)
12438
#define vwsubu_wx_u16m8(...) __riscv_vwsubu_wx_u16m8(__VA_ARGS__)
12439
#define vwsubu_vv_u32mf2(...) __riscv_vwsubu_vv_u32mf2(__VA_ARGS__)
12440
#define vwsubu_vx_u32mf2(...) __riscv_vwsubu_vx_u32mf2(__VA_ARGS__)
12441
#define vwsubu_wv_u32mf2(...) __riscv_vwsubu_wv_u32mf2(__VA_ARGS__)
12442
#define vwsubu_wx_u32mf2(...) __riscv_vwsubu_wx_u32mf2(__VA_ARGS__)
12443
#define vwsubu_vv_u32m1(...) __riscv_vwsubu_vv_u32m1(__VA_ARGS__)
12444
#define vwsubu_vx_u32m1(...) __riscv_vwsubu_vx_u32m1(__VA_ARGS__)
12445
#define vwsubu_wv_u32m1(...) __riscv_vwsubu_wv_u32m1(__VA_ARGS__)
12446
#define vwsubu_wx_u32m1(...) __riscv_vwsubu_wx_u32m1(__VA_ARGS__)
12447
#define vwsubu_vv_u32m2(...) __riscv_vwsubu_vv_u32m2(__VA_ARGS__)
12448
#define vwsubu_vx_u32m2(...) __riscv_vwsubu_vx_u32m2(__VA_ARGS__)
12449
#define vwsubu_wv_u32m2(...) __riscv_vwsubu_wv_u32m2(__VA_ARGS__)
12450
#define vwsubu_wx_u32m2(...) __riscv_vwsubu_wx_u32m2(__VA_ARGS__)
12451
#define vwsubu_vv_u32m4(...) __riscv_vwsubu_vv_u32m4(__VA_ARGS__)
12452
#define vwsubu_vx_u32m4(...) __riscv_vwsubu_vx_u32m4(__VA_ARGS__)
12453
#define vwsubu_wv_u32m4(...) __riscv_vwsubu_wv_u32m4(__VA_ARGS__)
12454
#define vwsubu_wx_u32m4(...) __riscv_vwsubu_wx_u32m4(__VA_ARGS__)
12455
#define vwsubu_vv_u32m8(...) __riscv_vwsubu_vv_u32m8(__VA_ARGS__)
12456
#define vwsubu_vx_u32m8(...) __riscv_vwsubu_vx_u32m8(__VA_ARGS__)
12457
#define vwsubu_wv_u32m8(...) __riscv_vwsubu_wv_u32m8(__VA_ARGS__)
12458
#define vwsubu_wx_u32m8(...) __riscv_vwsubu_wx_u32m8(__VA_ARGS__)
12459
#define vwsubu_vv_u64m1(...) __riscv_vwsubu_vv_u64m1(__VA_ARGS__)
12460
#define vwsubu_vx_u64m1(...) __riscv_vwsubu_vx_u64m1(__VA_ARGS__)
12461
#define vwsubu_wv_u64m1(...) __riscv_vwsubu_wv_u64m1(__VA_ARGS__)
12462
#define vwsubu_wx_u64m1(...) __riscv_vwsubu_wx_u64m1(__VA_ARGS__)
12463
#define vwsubu_vv_u64m2(...) __riscv_vwsubu_vv_u64m2(__VA_ARGS__)
12464
#define vwsubu_vx_u64m2(...) __riscv_vwsubu_vx_u64m2(__VA_ARGS__)
12465
#define vwsubu_wv_u64m2(...) __riscv_vwsubu_wv_u64m2(__VA_ARGS__)
12466
#define vwsubu_wx_u64m2(...) __riscv_vwsubu_wx_u64m2(__VA_ARGS__)
12467
#define vwsubu_vv_u64m4(...) __riscv_vwsubu_vv_u64m4(__VA_ARGS__)
12468
#define vwsubu_vx_u64m4(...) __riscv_vwsubu_vx_u64m4(__VA_ARGS__)
12469
#define vwsubu_wv_u64m4(...) __riscv_vwsubu_wv_u64m4(__VA_ARGS__)
12470
#define vwsubu_wx_u64m4(...) __riscv_vwsubu_wx_u64m4(__VA_ARGS__)
12471
#define vwsubu_vv_u64m8(...) __riscv_vwsubu_vv_u64m8(__VA_ARGS__)
12472
#define vwsubu_vx_u64m8(...) __riscv_vwsubu_vx_u64m8(__VA_ARGS__)
12473
#define vwsubu_wv_u64m8(...) __riscv_vwsubu_wv_u64m8(__VA_ARGS__)
12474
#define vwsubu_wx_u64m8(...) __riscv_vwsubu_wx_u64m8(__VA_ARGS__)
12475
// masked functions
12476
#define vwadd_vv_i16mf4_m(...) __riscv_vwadd_vv_i16mf4_tumu(__VA_ARGS__)
12477
#define vwadd_vx_i16mf4_m(...) __riscv_vwadd_vx_i16mf4_tumu(__VA_ARGS__)
12478
#define vwadd_wv_i16mf4_m(...) __riscv_vwadd_wv_i16mf4_tumu(__VA_ARGS__)
12479
#define vwadd_wx_i16mf4_m(...) __riscv_vwadd_wx_i16mf4_tumu(__VA_ARGS__)
12480
#define vwadd_vv_i16mf2_m(...) __riscv_vwadd_vv_i16mf2_tumu(__VA_ARGS__)
12481
#define vwadd_vx_i16mf2_m(...) __riscv_vwadd_vx_i16mf2_tumu(__VA_ARGS__)
12482
#define vwadd_wv_i16mf2_m(...) __riscv_vwadd_wv_i16mf2_tumu(__VA_ARGS__)
12483
#define vwadd_wx_i16mf2_m(...) __riscv_vwadd_wx_i16mf2_tumu(__VA_ARGS__)
12484
#define vwadd_vv_i16m1_m(...) __riscv_vwadd_vv_i16m1_tumu(__VA_ARGS__)
12485
#define vwadd_vx_i16m1_m(...) __riscv_vwadd_vx_i16m1_tumu(__VA_ARGS__)
12486
#define vwadd_wv_i16m1_m(...) __riscv_vwadd_wv_i16m1_tumu(__VA_ARGS__)
12487
#define vwadd_wx_i16m1_m(...) __riscv_vwadd_wx_i16m1_tumu(__VA_ARGS__)
12488
#define vwadd_vv_i16m2_m(...) __riscv_vwadd_vv_i16m2_tumu(__VA_ARGS__)
12489
#define vwadd_vx_i16m2_m(...) __riscv_vwadd_vx_i16m2_tumu(__VA_ARGS__)
12490
#define vwadd_wv_i16m2_m(...) __riscv_vwadd_wv_i16m2_tumu(__VA_ARGS__)
12491
#define vwadd_wx_i16m2_m(...) __riscv_vwadd_wx_i16m2_tumu(__VA_ARGS__)
12492
#define vwadd_vv_i16m4_m(...) __riscv_vwadd_vv_i16m4_tumu(__VA_ARGS__)
12493
#define vwadd_vx_i16m4_m(...) __riscv_vwadd_vx_i16m4_tumu(__VA_ARGS__)
12494
#define vwadd_wv_i16m4_m(...) __riscv_vwadd_wv_i16m4_tumu(__VA_ARGS__)
12495
#define vwadd_wx_i16m4_m(...) __riscv_vwadd_wx_i16m4_tumu(__VA_ARGS__)
12496
#define vwadd_vv_i16m8_m(...) __riscv_vwadd_vv_i16m8_tumu(__VA_ARGS__)
12497
#define vwadd_vx_i16m8_m(...) __riscv_vwadd_vx_i16m8_tumu(__VA_ARGS__)
12498
#define vwadd_wv_i16m8_m(...) __riscv_vwadd_wv_i16m8_tumu(__VA_ARGS__)
12499
#define vwadd_wx_i16m8_m(...) __riscv_vwadd_wx_i16m8_tumu(__VA_ARGS__)
12500
#define vwadd_vv_i32mf2_m(...) __riscv_vwadd_vv_i32mf2_tumu(__VA_ARGS__)
12501
#define vwadd_vx_i32mf2_m(...) __riscv_vwadd_vx_i32mf2_tumu(__VA_ARGS__)
12502
#define vwadd_wv_i32mf2_m(...) __riscv_vwadd_wv_i32mf2_tumu(__VA_ARGS__)
12503
#define vwadd_wx_i32mf2_m(...) __riscv_vwadd_wx_i32mf2_tumu(__VA_ARGS__)
12504
#define vwadd_vv_i32m1_m(...) __riscv_vwadd_vv_i32m1_tumu(__VA_ARGS__)
12505
#define vwadd_vx_i32m1_m(...) __riscv_vwadd_vx_i32m1_tumu(__VA_ARGS__)
12506
#define vwadd_wv_i32m1_m(...) __riscv_vwadd_wv_i32m1_tumu(__VA_ARGS__)
12507
#define vwadd_wx_i32m1_m(...) __riscv_vwadd_wx_i32m1_tumu(__VA_ARGS__)
12508
#define vwadd_vv_i32m2_m(...) __riscv_vwadd_vv_i32m2_tumu(__VA_ARGS__)
12509
#define vwadd_vx_i32m2_m(...) __riscv_vwadd_vx_i32m2_tumu(__VA_ARGS__)
12510
#define vwadd_wv_i32m2_m(...) __riscv_vwadd_wv_i32m2_tumu(__VA_ARGS__)
12511
#define vwadd_wx_i32m2_m(...) __riscv_vwadd_wx_i32m2_tumu(__VA_ARGS__)
12512
#define vwadd_vv_i32m4_m(...) __riscv_vwadd_vv_i32m4_tumu(__VA_ARGS__)
12513
#define vwadd_vx_i32m4_m(...) __riscv_vwadd_vx_i32m4_tumu(__VA_ARGS__)
12514
#define vwadd_wv_i32m4_m(...) __riscv_vwadd_wv_i32m4_tumu(__VA_ARGS__)
12515
#define vwadd_wx_i32m4_m(...) __riscv_vwadd_wx_i32m4_tumu(__VA_ARGS__)
12516
#define vwadd_vv_i32m8_m(...) __riscv_vwadd_vv_i32m8_tumu(__VA_ARGS__)
12517
#define vwadd_vx_i32m8_m(...) __riscv_vwadd_vx_i32m8_tumu(__VA_ARGS__)
12518
#define vwadd_wv_i32m8_m(...) __riscv_vwadd_wv_i32m8_tumu(__VA_ARGS__)
12519
#define vwadd_wx_i32m8_m(...) __riscv_vwadd_wx_i32m8_tumu(__VA_ARGS__)
12520
#define vwadd_vv_i64m1_m(...) __riscv_vwadd_vv_i64m1_tumu(__VA_ARGS__)
12521
#define vwadd_vx_i64m1_m(...) __riscv_vwadd_vx_i64m1_tumu(__VA_ARGS__)
12522
#define vwadd_wv_i64m1_m(...) __riscv_vwadd_wv_i64m1_tumu(__VA_ARGS__)
12523
#define vwadd_wx_i64m1_m(...) __riscv_vwadd_wx_i64m1_tumu(__VA_ARGS__)
12524
#define vwadd_vv_i64m2_m(...) __riscv_vwadd_vv_i64m2_tumu(__VA_ARGS__)
12525
#define vwadd_vx_i64m2_m(...) __riscv_vwadd_vx_i64m2_tumu(__VA_ARGS__)
12526
#define vwadd_wv_i64m2_m(...) __riscv_vwadd_wv_i64m2_tumu(__VA_ARGS__)
12527
#define vwadd_wx_i64m2_m(...) __riscv_vwadd_wx_i64m2_tumu(__VA_ARGS__)
12528
#define vwadd_vv_i64m4_m(...) __riscv_vwadd_vv_i64m4_tumu(__VA_ARGS__)
12529
#define vwadd_vx_i64m4_m(...) __riscv_vwadd_vx_i64m4_tumu(__VA_ARGS__)
12530
#define vwadd_wv_i64m4_m(...) __riscv_vwadd_wv_i64m4_tumu(__VA_ARGS__)
12531
#define vwadd_wx_i64m4_m(...) __riscv_vwadd_wx_i64m4_tumu(__VA_ARGS__)
12532
#define vwadd_vv_i64m8_m(...) __riscv_vwadd_vv_i64m8_tumu(__VA_ARGS__)
12533
#define vwadd_vx_i64m8_m(...) __riscv_vwadd_vx_i64m8_tumu(__VA_ARGS__)
12534
#define vwadd_wv_i64m8_m(...) __riscv_vwadd_wv_i64m8_tumu(__VA_ARGS__)
12535
#define vwadd_wx_i64m8_m(...) __riscv_vwadd_wx_i64m8_tumu(__VA_ARGS__)
12536
#define vwsub_vv_i16mf4_m(...) __riscv_vwsub_vv_i16mf4_tumu(__VA_ARGS__)
12537
#define vwsub_vx_i16mf4_m(...) __riscv_vwsub_vx_i16mf4_tumu(__VA_ARGS__)
12538
#define vwsub_wv_i16mf4_m(...) __riscv_vwsub_wv_i16mf4_tumu(__VA_ARGS__)
12539
#define vwsub_wx_i16mf4_m(...) __riscv_vwsub_wx_i16mf4_tumu(__VA_ARGS__)
12540
#define vwsub_vv_i16mf2_m(...) __riscv_vwsub_vv_i16mf2_tumu(__VA_ARGS__)
12541
#define vwsub_vx_i16mf2_m(...) __riscv_vwsub_vx_i16mf2_tumu(__VA_ARGS__)
12542
#define vwsub_wv_i16mf2_m(...) __riscv_vwsub_wv_i16mf2_tumu(__VA_ARGS__)
12543
#define vwsub_wx_i16mf2_m(...) __riscv_vwsub_wx_i16mf2_tumu(__VA_ARGS__)
12544
#define vwsub_vv_i16m1_m(...) __riscv_vwsub_vv_i16m1_tumu(__VA_ARGS__)
12545
#define vwsub_vx_i16m1_m(...) __riscv_vwsub_vx_i16m1_tumu(__VA_ARGS__)
12546
#define vwsub_wv_i16m1_m(...) __riscv_vwsub_wv_i16m1_tumu(__VA_ARGS__)
12547
#define vwsub_wx_i16m1_m(...) __riscv_vwsub_wx_i16m1_tumu(__VA_ARGS__)
12548
#define vwsub_vv_i16m2_m(...) __riscv_vwsub_vv_i16m2_tumu(__VA_ARGS__)
12549
#define vwsub_vx_i16m2_m(...) __riscv_vwsub_vx_i16m2_tumu(__VA_ARGS__)
12550
#define vwsub_wv_i16m2_m(...) __riscv_vwsub_wv_i16m2_tumu(__VA_ARGS__)
12551
#define vwsub_wx_i16m2_m(...) __riscv_vwsub_wx_i16m2_tumu(__VA_ARGS__)
12552
#define vwsub_vv_i16m4_m(...) __riscv_vwsub_vv_i16m4_tumu(__VA_ARGS__)
12553
#define vwsub_vx_i16m4_m(...) __riscv_vwsub_vx_i16m4_tumu(__VA_ARGS__)
12554
#define vwsub_wv_i16m4_m(...) __riscv_vwsub_wv_i16m4_tumu(__VA_ARGS__)
12555
#define vwsub_wx_i16m4_m(...) __riscv_vwsub_wx_i16m4_tumu(__VA_ARGS__)
12556
#define vwsub_vv_i16m8_m(...) __riscv_vwsub_vv_i16m8_tumu(__VA_ARGS__)
12557
#define vwsub_vx_i16m8_m(...) __riscv_vwsub_vx_i16m8_tumu(__VA_ARGS__)
12558
#define vwsub_wv_i16m8_m(...) __riscv_vwsub_wv_i16m8_tumu(__VA_ARGS__)
12559
#define vwsub_wx_i16m8_m(...) __riscv_vwsub_wx_i16m8_tumu(__VA_ARGS__)
12560
#define vwsub_vv_i32mf2_m(...) __riscv_vwsub_vv_i32mf2_tumu(__VA_ARGS__)
12561
#define vwsub_vx_i32mf2_m(...) __riscv_vwsub_vx_i32mf2_tumu(__VA_ARGS__)
12562
#define vwsub_wv_i32mf2_m(...) __riscv_vwsub_wv_i32mf2_tumu(__VA_ARGS__)
12563
#define vwsub_wx_i32mf2_m(...) __riscv_vwsub_wx_i32mf2_tumu(__VA_ARGS__)
12564
#define vwsub_vv_i32m1_m(...) __riscv_vwsub_vv_i32m1_tumu(__VA_ARGS__)
12565
#define vwsub_vx_i32m1_m(...) __riscv_vwsub_vx_i32m1_tumu(__VA_ARGS__)
12566
#define vwsub_wv_i32m1_m(...) __riscv_vwsub_wv_i32m1_tumu(__VA_ARGS__)
12567
#define vwsub_wx_i32m1_m(...) __riscv_vwsub_wx_i32m1_tumu(__VA_ARGS__)
12568
#define vwsub_vv_i32m2_m(...) __riscv_vwsub_vv_i32m2_tumu(__VA_ARGS__)
12569
#define vwsub_vx_i32m2_m(...) __riscv_vwsub_vx_i32m2_tumu(__VA_ARGS__)
12570
#define vwsub_wv_i32m2_m(...) __riscv_vwsub_wv_i32m2_tumu(__VA_ARGS__)
12571
#define vwsub_wx_i32m2_m(...) __riscv_vwsub_wx_i32m2_tumu(__VA_ARGS__)
12572
#define vwsub_vv_i32m4_m(...) __riscv_vwsub_vv_i32m4_tumu(__VA_ARGS__)
12573
#define vwsub_vx_i32m4_m(...) __riscv_vwsub_vx_i32m4_tumu(__VA_ARGS__)
12574
#define vwsub_wv_i32m4_m(...) __riscv_vwsub_wv_i32m4_tumu(__VA_ARGS__)
12575
#define vwsub_wx_i32m4_m(...) __riscv_vwsub_wx_i32m4_tumu(__VA_ARGS__)
12576
#define vwsub_vv_i32m8_m(...) __riscv_vwsub_vv_i32m8_tumu(__VA_ARGS__)
12577
#define vwsub_vx_i32m8_m(...) __riscv_vwsub_vx_i32m8_tumu(__VA_ARGS__)
12578
#define vwsub_wv_i32m8_m(...) __riscv_vwsub_wv_i32m8_tumu(__VA_ARGS__)
12579
#define vwsub_wx_i32m8_m(...) __riscv_vwsub_wx_i32m8_tumu(__VA_ARGS__)
12580
#define vwsub_vv_i64m1_m(...) __riscv_vwsub_vv_i64m1_tumu(__VA_ARGS__)
12581
#define vwsub_vx_i64m1_m(...) __riscv_vwsub_vx_i64m1_tumu(__VA_ARGS__)
12582
#define vwsub_wv_i64m1_m(...) __riscv_vwsub_wv_i64m1_tumu(__VA_ARGS__)
12583
#define vwsub_wx_i64m1_m(...) __riscv_vwsub_wx_i64m1_tumu(__VA_ARGS__)
12584
#define vwsub_vv_i64m2_m(...) __riscv_vwsub_vv_i64m2_tumu(__VA_ARGS__)
12585
#define vwsub_vx_i64m2_m(...) __riscv_vwsub_vx_i64m2_tumu(__VA_ARGS__)
12586
#define vwsub_wv_i64m2_m(...) __riscv_vwsub_wv_i64m2_tumu(__VA_ARGS__)
12587
#define vwsub_wx_i64m2_m(...) __riscv_vwsub_wx_i64m2_tumu(__VA_ARGS__)
12588
#define vwsub_vv_i64m4_m(...) __riscv_vwsub_vv_i64m4_tumu(__VA_ARGS__)
12589
#define vwsub_vx_i64m4_m(...) __riscv_vwsub_vx_i64m4_tumu(__VA_ARGS__)
12590
#define vwsub_wv_i64m4_m(...) __riscv_vwsub_wv_i64m4_tumu(__VA_ARGS__)
12591
#define vwsub_wx_i64m4_m(...) __riscv_vwsub_wx_i64m4_tumu(__VA_ARGS__)
12592
#define vwsub_vv_i64m8_m(...) __riscv_vwsub_vv_i64m8_tumu(__VA_ARGS__)
12593
#define vwsub_vx_i64m8_m(...) __riscv_vwsub_vx_i64m8_tumu(__VA_ARGS__)
12594
#define vwsub_wv_i64m8_m(...) __riscv_vwsub_wv_i64m8_tumu(__VA_ARGS__)
12595
#define vwsub_wx_i64m8_m(...) __riscv_vwsub_wx_i64m8_tumu(__VA_ARGS__)
12596
#define vwaddu_vv_u16mf4_m(...) __riscv_vwaddu_vv_u16mf4_tumu(__VA_ARGS__)
12597
#define vwaddu_vx_u16mf4_m(...) __riscv_vwaddu_vx_u16mf4_tumu(__VA_ARGS__)
12598
#define vwaddu_wv_u16mf4_m(...) __riscv_vwaddu_wv_u16mf4_tumu(__VA_ARGS__)
12599
#define vwaddu_wx_u16mf4_m(...) __riscv_vwaddu_wx_u16mf4_tumu(__VA_ARGS__)
12600
#define vwaddu_vv_u16mf2_m(...) __riscv_vwaddu_vv_u16mf2_tumu(__VA_ARGS__)
12601
#define vwaddu_vx_u16mf2_m(...) __riscv_vwaddu_vx_u16mf2_tumu(__VA_ARGS__)
12602
#define vwaddu_wv_u16mf2_m(...) __riscv_vwaddu_wv_u16mf2_tumu(__VA_ARGS__)
12603
#define vwaddu_wx_u16mf2_m(...) __riscv_vwaddu_wx_u16mf2_tumu(__VA_ARGS__)
12604
#define vwaddu_vv_u16m1_m(...) __riscv_vwaddu_vv_u16m1_tumu(__VA_ARGS__)
12605
#define vwaddu_vx_u16m1_m(...) __riscv_vwaddu_vx_u16m1_tumu(__VA_ARGS__)
12606
#define vwaddu_wv_u16m1_m(...) __riscv_vwaddu_wv_u16m1_tumu(__VA_ARGS__)
12607
#define vwaddu_wx_u16m1_m(...) __riscv_vwaddu_wx_u16m1_tumu(__VA_ARGS__)
12608
#define vwaddu_vv_u16m2_m(...) __riscv_vwaddu_vv_u16m2_tumu(__VA_ARGS__)
12609
#define vwaddu_vx_u16m2_m(...) __riscv_vwaddu_vx_u16m2_tumu(__VA_ARGS__)
12610
#define vwaddu_wv_u16m2_m(...) __riscv_vwaddu_wv_u16m2_tumu(__VA_ARGS__)
12611
#define vwaddu_wx_u16m2_m(...) __riscv_vwaddu_wx_u16m2_tumu(__VA_ARGS__)
12612
#define vwaddu_vv_u16m4_m(...) __riscv_vwaddu_vv_u16m4_tumu(__VA_ARGS__)
12613
#define vwaddu_vx_u16m4_m(...) __riscv_vwaddu_vx_u16m4_tumu(__VA_ARGS__)
12614
#define vwaddu_wv_u16m4_m(...) __riscv_vwaddu_wv_u16m4_tumu(__VA_ARGS__)
12615
#define vwaddu_wx_u16m4_m(...) __riscv_vwaddu_wx_u16m4_tumu(__VA_ARGS__)
12616
#define vwaddu_vv_u16m8_m(...) __riscv_vwaddu_vv_u16m8_tumu(__VA_ARGS__)
12617
#define vwaddu_vx_u16m8_m(...) __riscv_vwaddu_vx_u16m8_tumu(__VA_ARGS__)
12618
#define vwaddu_wv_u16m8_m(...) __riscv_vwaddu_wv_u16m8_tumu(__VA_ARGS__)
12619
#define vwaddu_wx_u16m8_m(...) __riscv_vwaddu_wx_u16m8_tumu(__VA_ARGS__)
12620
#define vwaddu_vv_u32mf2_m(...) __riscv_vwaddu_vv_u32mf2_tumu(__VA_ARGS__)
12621
#define vwaddu_vx_u32mf2_m(...) __riscv_vwaddu_vx_u32mf2_tumu(__VA_ARGS__)
12622
#define vwaddu_wv_u32mf2_m(...) __riscv_vwaddu_wv_u32mf2_tumu(__VA_ARGS__)
12623
#define vwaddu_wx_u32mf2_m(...) __riscv_vwaddu_wx_u32mf2_tumu(__VA_ARGS__)
12624
#define vwaddu_vv_u32m1_m(...) __riscv_vwaddu_vv_u32m1_tumu(__VA_ARGS__)
12625
#define vwaddu_vx_u32m1_m(...) __riscv_vwaddu_vx_u32m1_tumu(__VA_ARGS__)
12626
#define vwaddu_wv_u32m1_m(...) __riscv_vwaddu_wv_u32m1_tumu(__VA_ARGS__)
12627
#define vwaddu_wx_u32m1_m(...) __riscv_vwaddu_wx_u32m1_tumu(__VA_ARGS__)
12628
#define vwaddu_vv_u32m2_m(...) __riscv_vwaddu_vv_u32m2_tumu(__VA_ARGS__)
12629
#define vwaddu_vx_u32m2_m(...) __riscv_vwaddu_vx_u32m2_tumu(__VA_ARGS__)
12630
#define vwaddu_wv_u32m2_m(...) __riscv_vwaddu_wv_u32m2_tumu(__VA_ARGS__)
12631
#define vwaddu_wx_u32m2_m(...) __riscv_vwaddu_wx_u32m2_tumu(__VA_ARGS__)
12632
#define vwaddu_vv_u32m4_m(...) __riscv_vwaddu_vv_u32m4_tumu(__VA_ARGS__)
12633
#define vwaddu_vx_u32m4_m(...) __riscv_vwaddu_vx_u32m4_tumu(__VA_ARGS__)
12634
#define vwaddu_wv_u32m4_m(...) __riscv_vwaddu_wv_u32m4_tumu(__VA_ARGS__)
12635
#define vwaddu_wx_u32m4_m(...) __riscv_vwaddu_wx_u32m4_tumu(__VA_ARGS__)
12636
#define vwaddu_vv_u32m8_m(...) __riscv_vwaddu_vv_u32m8_tumu(__VA_ARGS__)
12637
#define vwaddu_vx_u32m8_m(...) __riscv_vwaddu_vx_u32m8_tumu(__VA_ARGS__)
12638
#define vwaddu_wv_u32m8_m(...) __riscv_vwaddu_wv_u32m8_tumu(__VA_ARGS__)
12639
#define vwaddu_wx_u32m8_m(...) __riscv_vwaddu_wx_u32m8_tumu(__VA_ARGS__)
12640
#define vwaddu_vv_u64m1_m(...) __riscv_vwaddu_vv_u64m1_tumu(__VA_ARGS__)
12641
#define vwaddu_vx_u64m1_m(...) __riscv_vwaddu_vx_u64m1_tumu(__VA_ARGS__)
12642
#define vwaddu_wv_u64m1_m(...) __riscv_vwaddu_wv_u64m1_tumu(__VA_ARGS__)
12643
#define vwaddu_wx_u64m1_m(...) __riscv_vwaddu_wx_u64m1_tumu(__VA_ARGS__)
12644
#define vwaddu_vv_u64m2_m(...) __riscv_vwaddu_vv_u64m2_tumu(__VA_ARGS__)
12645
#define vwaddu_vx_u64m2_m(...) __riscv_vwaddu_vx_u64m2_tumu(__VA_ARGS__)
12646
#define vwaddu_wv_u64m2_m(...) __riscv_vwaddu_wv_u64m2_tumu(__VA_ARGS__)
12647
#define vwaddu_wx_u64m2_m(...) __riscv_vwaddu_wx_u64m2_tumu(__VA_ARGS__)
12648
#define vwaddu_vv_u64m4_m(...) __riscv_vwaddu_vv_u64m4_tumu(__VA_ARGS__)
12649
#define vwaddu_vx_u64m4_m(...) __riscv_vwaddu_vx_u64m4_tumu(__VA_ARGS__)
12650
#define vwaddu_wv_u64m4_m(...) __riscv_vwaddu_wv_u64m4_tumu(__VA_ARGS__)
12651
#define vwaddu_wx_u64m4_m(...) __riscv_vwaddu_wx_u64m4_tumu(__VA_ARGS__)
12652
#define vwaddu_vv_u64m8_m(...) __riscv_vwaddu_vv_u64m8_tumu(__VA_ARGS__)
12653
#define vwaddu_vx_u64m8_m(...) __riscv_vwaddu_vx_u64m8_tumu(__VA_ARGS__)
12654
#define vwaddu_wv_u64m8_m(...) __riscv_vwaddu_wv_u64m8_tumu(__VA_ARGS__)
12655
#define vwaddu_wx_u64m8_m(...) __riscv_vwaddu_wx_u64m8_tumu(__VA_ARGS__)
12656
#define vwsubu_vv_u16mf4_m(...) __riscv_vwsubu_vv_u16mf4_tumu(__VA_ARGS__)
12657
#define vwsubu_vx_u16mf4_m(...) __riscv_vwsubu_vx_u16mf4_tumu(__VA_ARGS__)
12658
#define vwsubu_wv_u16mf4_m(...) __riscv_vwsubu_wv_u16mf4_tumu(__VA_ARGS__)
12659
#define vwsubu_wx_u16mf4_m(...) __riscv_vwsubu_wx_u16mf4_tumu(__VA_ARGS__)
12660
#define vwsubu_vv_u16mf2_m(...) __riscv_vwsubu_vv_u16mf2_tumu(__VA_ARGS__)
12661
#define vwsubu_vx_u16mf2_m(...) __riscv_vwsubu_vx_u16mf2_tumu(__VA_ARGS__)
12662
#define vwsubu_wv_u16mf2_m(...) __riscv_vwsubu_wv_u16mf2_tumu(__VA_ARGS__)
12663
#define vwsubu_wx_u16mf2_m(...) __riscv_vwsubu_wx_u16mf2_tumu(__VA_ARGS__)
12664
#define vwsubu_vv_u16m1_m(...) __riscv_vwsubu_vv_u16m1_tumu(__VA_ARGS__)
12665
#define vwsubu_vx_u16m1_m(...) __riscv_vwsubu_vx_u16m1_tumu(__VA_ARGS__)
12666
#define vwsubu_wv_u16m1_m(...) __riscv_vwsubu_wv_u16m1_tumu(__VA_ARGS__)
12667
#define vwsubu_wx_u16m1_m(...) __riscv_vwsubu_wx_u16m1_tumu(__VA_ARGS__)
12668
#define vwsubu_vv_u16m2_m(...) __riscv_vwsubu_vv_u16m2_tumu(__VA_ARGS__)
12669
#define vwsubu_vx_u16m2_m(...) __riscv_vwsubu_vx_u16m2_tumu(__VA_ARGS__)
12670
#define vwsubu_wv_u16m2_m(...) __riscv_vwsubu_wv_u16m2_tumu(__VA_ARGS__)
12671
#define vwsubu_wx_u16m2_m(...) __riscv_vwsubu_wx_u16m2_tumu(__VA_ARGS__)
12672
#define vwsubu_vv_u16m4_m(...) __riscv_vwsubu_vv_u16m4_tumu(__VA_ARGS__)
12673
#define vwsubu_vx_u16m4_m(...) __riscv_vwsubu_vx_u16m4_tumu(__VA_ARGS__)
12674
#define vwsubu_wv_u16m4_m(...) __riscv_vwsubu_wv_u16m4_tumu(__VA_ARGS__)
12675
#define vwsubu_wx_u16m4_m(...) __riscv_vwsubu_wx_u16m4_tumu(__VA_ARGS__)
12676
#define vwsubu_vv_u16m8_m(...) __riscv_vwsubu_vv_u16m8_tumu(__VA_ARGS__)
12677
#define vwsubu_vx_u16m8_m(...) __riscv_vwsubu_vx_u16m8_tumu(__VA_ARGS__)
12678
#define vwsubu_wv_u16m8_m(...) __riscv_vwsubu_wv_u16m8_tumu(__VA_ARGS__)
12679
#define vwsubu_wx_u16m8_m(...) __riscv_vwsubu_wx_u16m8_tumu(__VA_ARGS__)
12680
#define vwsubu_vv_u32mf2_m(...) __riscv_vwsubu_vv_u32mf2_tumu(__VA_ARGS__)
12681
#define vwsubu_vx_u32mf2_m(...) __riscv_vwsubu_vx_u32mf2_tumu(__VA_ARGS__)
12682
#define vwsubu_wv_u32mf2_m(...) __riscv_vwsubu_wv_u32mf2_tumu(__VA_ARGS__)
12683
#define vwsubu_wx_u32mf2_m(...) __riscv_vwsubu_wx_u32mf2_tumu(__VA_ARGS__)
12684
#define vwsubu_vv_u32m1_m(...) __riscv_vwsubu_vv_u32m1_tumu(__VA_ARGS__)
12685
#define vwsubu_vx_u32m1_m(...) __riscv_vwsubu_vx_u32m1_tumu(__VA_ARGS__)
12686
#define vwsubu_wv_u32m1_m(...) __riscv_vwsubu_wv_u32m1_tumu(__VA_ARGS__)
12687
#define vwsubu_wx_u32m1_m(...) __riscv_vwsubu_wx_u32m1_tumu(__VA_ARGS__)
12688
#define vwsubu_vv_u32m2_m(...) __riscv_vwsubu_vv_u32m2_tumu(__VA_ARGS__)
12689
#define vwsubu_vx_u32m2_m(...) __riscv_vwsubu_vx_u32m2_tumu(__VA_ARGS__)
12690
#define vwsubu_wv_u32m2_m(...) __riscv_vwsubu_wv_u32m2_tumu(__VA_ARGS__)
12691
#define vwsubu_wx_u32m2_m(...) __riscv_vwsubu_wx_u32m2_tumu(__VA_ARGS__)
12692
#define vwsubu_vv_u32m4_m(...) __riscv_vwsubu_vv_u32m4_tumu(__VA_ARGS__)
12693
#define vwsubu_vx_u32m4_m(...) __riscv_vwsubu_vx_u32m4_tumu(__VA_ARGS__)
12694
#define vwsubu_wv_u32m4_m(...) __riscv_vwsubu_wv_u32m4_tumu(__VA_ARGS__)
12695
#define vwsubu_wx_u32m4_m(...) __riscv_vwsubu_wx_u32m4_tumu(__VA_ARGS__)
12696
#define vwsubu_vv_u32m8_m(...) __riscv_vwsubu_vv_u32m8_tumu(__VA_ARGS__)
12697
#define vwsubu_vx_u32m8_m(...) __riscv_vwsubu_vx_u32m8_tumu(__VA_ARGS__)
12698
#define vwsubu_wv_u32m8_m(...) __riscv_vwsubu_wv_u32m8_tumu(__VA_ARGS__)
12699
#define vwsubu_wx_u32m8_m(...) __riscv_vwsubu_wx_u32m8_tumu(__VA_ARGS__)
12700
#define vwsubu_vv_u64m1_m(...) __riscv_vwsubu_vv_u64m1_tumu(__VA_ARGS__)
12701
#define vwsubu_vx_u64m1_m(...) __riscv_vwsubu_vx_u64m1_tumu(__VA_ARGS__)
12702
#define vwsubu_wv_u64m1_m(...) __riscv_vwsubu_wv_u64m1_tumu(__VA_ARGS__)
12703
#define vwsubu_wx_u64m1_m(...) __riscv_vwsubu_wx_u64m1_tumu(__VA_ARGS__)
12704
#define vwsubu_vv_u64m2_m(...) __riscv_vwsubu_vv_u64m2_tumu(__VA_ARGS__)
12705
#define vwsubu_vx_u64m2_m(...) __riscv_vwsubu_vx_u64m2_tumu(__VA_ARGS__)
12706
#define vwsubu_wv_u64m2_m(...) __riscv_vwsubu_wv_u64m2_tumu(__VA_ARGS__)
12707
#define vwsubu_wx_u64m2_m(...) __riscv_vwsubu_wx_u64m2_tumu(__VA_ARGS__)
12708
#define vwsubu_vv_u64m4_m(...) __riscv_vwsubu_vv_u64m4_tumu(__VA_ARGS__)
12709
#define vwsubu_vx_u64m4_m(...) __riscv_vwsubu_vx_u64m4_tumu(__VA_ARGS__)
12710
#define vwsubu_wv_u64m4_m(...) __riscv_vwsubu_wv_u64m4_tumu(__VA_ARGS__)
12711
#define vwsubu_wx_u64m4_m(...) __riscv_vwsubu_wx_u64m4_tumu(__VA_ARGS__)
12712
#define vwsubu_vv_u64m8_m(...) __riscv_vwsubu_vv_u64m8_tumu(__VA_ARGS__)
12713
#define vwsubu_vx_u64m8_m(...) __riscv_vwsubu_vx_u64m8_tumu(__VA_ARGS__)
12714
#define vwsubu_wv_u64m8_m(...) __riscv_vwsubu_wv_u64m8_tumu(__VA_ARGS__)
12715
#define vwsubu_wx_u64m8_m(...) __riscv_vwsubu_wx_u64m8_tumu(__VA_ARGS__)
12716
#define vsext_vf2_i16mf4(...) __riscv_vsext_vf2_i16mf4(__VA_ARGS__)
12717
#define vsext_vf2_i16mf2(...) __riscv_vsext_vf2_i16mf2(__VA_ARGS__)
12718
#define vsext_vf2_i16m1(...) __riscv_vsext_vf2_i16m1(__VA_ARGS__)
12719
#define vsext_vf2_i16m2(...) __riscv_vsext_vf2_i16m2(__VA_ARGS__)
12720
#define vsext_vf2_i16m4(...) __riscv_vsext_vf2_i16m4(__VA_ARGS__)
12721
#define vsext_vf2_i16m8(...) __riscv_vsext_vf2_i16m8(__VA_ARGS__)
12722
#define vsext_vf4_i32mf2(...) __riscv_vsext_vf4_i32mf2(__VA_ARGS__)
12723
#define vsext_vf4_i32m1(...) __riscv_vsext_vf4_i32m1(__VA_ARGS__)
12724
#define vsext_vf4_i32m2(...) __riscv_vsext_vf4_i32m2(__VA_ARGS__)
12725
#define vsext_vf4_i32m4(...) __riscv_vsext_vf4_i32m4(__VA_ARGS__)
12726
#define vsext_vf4_i32m8(...) __riscv_vsext_vf4_i32m8(__VA_ARGS__)
12727
#define vsext_vf8_i64m1(...) __riscv_vsext_vf8_i64m1(__VA_ARGS__)
12728
#define vsext_vf8_i64m2(...) __riscv_vsext_vf8_i64m2(__VA_ARGS__)
12729
#define vsext_vf8_i64m4(...) __riscv_vsext_vf8_i64m4(__VA_ARGS__)
12730
#define vsext_vf8_i64m8(...) __riscv_vsext_vf8_i64m8(__VA_ARGS__)
12731
#define vsext_vf2_i32mf2(...) __riscv_vsext_vf2_i32mf2(__VA_ARGS__)
12732
#define vsext_vf2_i32m1(...) __riscv_vsext_vf2_i32m1(__VA_ARGS__)
12733
#define vsext_vf2_i32m2(...) __riscv_vsext_vf2_i32m2(__VA_ARGS__)
12734
#define vsext_vf2_i32m4(...) __riscv_vsext_vf2_i32m4(__VA_ARGS__)
12735
#define vsext_vf2_i32m8(...) __riscv_vsext_vf2_i32m8(__VA_ARGS__)
12736
#define vsext_vf4_i64m1(...) __riscv_vsext_vf4_i64m1(__VA_ARGS__)
12737
#define vsext_vf4_i64m2(...) __riscv_vsext_vf4_i64m2(__VA_ARGS__)
12738
#define vsext_vf4_i64m4(...) __riscv_vsext_vf4_i64m4(__VA_ARGS__)
12739
#define vsext_vf4_i64m8(...) __riscv_vsext_vf4_i64m8(__VA_ARGS__)
12740
#define vsext_vf2_i64m1(...) __riscv_vsext_vf2_i64m1(__VA_ARGS__)
12741
#define vsext_vf2_i64m2(...) __riscv_vsext_vf2_i64m2(__VA_ARGS__)
12742
#define vsext_vf2_i64m4(...) __riscv_vsext_vf2_i64m4(__VA_ARGS__)
12743
#define vsext_vf2_i64m8(...) __riscv_vsext_vf2_i64m8(__VA_ARGS__)
12744
#define vzext_vf2_u16mf4(...) __riscv_vzext_vf2_u16mf4(__VA_ARGS__)
12745
#define vzext_vf2_u16mf2(...) __riscv_vzext_vf2_u16mf2(__VA_ARGS__)
12746
#define vzext_vf2_u16m1(...) __riscv_vzext_vf2_u16m1(__VA_ARGS__)
12747
#define vzext_vf2_u16m2(...) __riscv_vzext_vf2_u16m2(__VA_ARGS__)
12748
#define vzext_vf2_u16m4(...) __riscv_vzext_vf2_u16m4(__VA_ARGS__)
12749
#define vzext_vf2_u16m8(...) __riscv_vzext_vf2_u16m8(__VA_ARGS__)
12750
#define vzext_vf4_u32mf2(...) __riscv_vzext_vf4_u32mf2(__VA_ARGS__)
12751
#define vzext_vf4_u32m1(...) __riscv_vzext_vf4_u32m1(__VA_ARGS__)
12752
#define vzext_vf4_u32m2(...) __riscv_vzext_vf4_u32m2(__VA_ARGS__)
12753
#define vzext_vf4_u32m4(...) __riscv_vzext_vf4_u32m4(__VA_ARGS__)
12754
#define vzext_vf4_u32m8(...) __riscv_vzext_vf4_u32m8(__VA_ARGS__)
12755
#define vzext_vf8_u64m1(...) __riscv_vzext_vf8_u64m1(__VA_ARGS__)
12756
#define vzext_vf8_u64m2(...) __riscv_vzext_vf8_u64m2(__VA_ARGS__)
12757
#define vzext_vf8_u64m4(...) __riscv_vzext_vf8_u64m4(__VA_ARGS__)
12758
#define vzext_vf8_u64m8(...) __riscv_vzext_vf8_u64m8(__VA_ARGS__)
12759
#define vzext_vf2_u32mf2(...) __riscv_vzext_vf2_u32mf2(__VA_ARGS__)
12760
#define vzext_vf2_u32m1(...) __riscv_vzext_vf2_u32m1(__VA_ARGS__)
12761
#define vzext_vf2_u32m2(...) __riscv_vzext_vf2_u32m2(__VA_ARGS__)
12762
#define vzext_vf2_u32m4(...) __riscv_vzext_vf2_u32m4(__VA_ARGS__)
12763
#define vzext_vf2_u32m8(...) __riscv_vzext_vf2_u32m8(__VA_ARGS__)
12764
#define vzext_vf4_u64m1(...) __riscv_vzext_vf4_u64m1(__VA_ARGS__)
12765
#define vzext_vf4_u64m2(...) __riscv_vzext_vf4_u64m2(__VA_ARGS__)
12766
#define vzext_vf4_u64m4(...) __riscv_vzext_vf4_u64m4(__VA_ARGS__)
12767
#define vzext_vf4_u64m8(...) __riscv_vzext_vf4_u64m8(__VA_ARGS__)
12768
#define vzext_vf2_u64m1(...) __riscv_vzext_vf2_u64m1(__VA_ARGS__)
12769
#define vzext_vf2_u64m2(...) __riscv_vzext_vf2_u64m2(__VA_ARGS__)
12770
#define vzext_vf2_u64m4(...) __riscv_vzext_vf2_u64m4(__VA_ARGS__)
12771
#define vzext_vf2_u64m8(...) __riscv_vzext_vf2_u64m8(__VA_ARGS__)
12772
// masked functions
12773
#define vsext_vf2_i16mf4_m(...) __riscv_vsext_vf2_i16mf4_tumu(__VA_ARGS__)
12774
#define vsext_vf2_i16mf2_m(...) __riscv_vsext_vf2_i16mf2_tumu(__VA_ARGS__)
12775
#define vsext_vf2_i16m1_m(...) __riscv_vsext_vf2_i16m1_tumu(__VA_ARGS__)
12776
#define vsext_vf2_i16m2_m(...) __riscv_vsext_vf2_i16m2_tumu(__VA_ARGS__)
12777
#define vsext_vf2_i16m4_m(...) __riscv_vsext_vf2_i16m4_tumu(__VA_ARGS__)
12778
#define vsext_vf2_i16m8_m(...) __riscv_vsext_vf2_i16m8_tumu(__VA_ARGS__)
12779
#define vsext_vf4_i32mf2_m(...) __riscv_vsext_vf4_i32mf2_tumu(__VA_ARGS__)
12780
#define vsext_vf4_i32m1_m(...) __riscv_vsext_vf4_i32m1_tumu(__VA_ARGS__)
12781
#define vsext_vf4_i32m2_m(...) __riscv_vsext_vf4_i32m2_tumu(__VA_ARGS__)
12782
#define vsext_vf4_i32m4_m(...) __riscv_vsext_vf4_i32m4_tumu(__VA_ARGS__)
12783
#define vsext_vf4_i32m8_m(...) __riscv_vsext_vf4_i32m8_tumu(__VA_ARGS__)
12784
#define vsext_vf8_i64m1_m(...) __riscv_vsext_vf8_i64m1_tumu(__VA_ARGS__)
12785
#define vsext_vf8_i64m2_m(...) __riscv_vsext_vf8_i64m2_tumu(__VA_ARGS__)
12786
#define vsext_vf8_i64m4_m(...) __riscv_vsext_vf8_i64m4_tumu(__VA_ARGS__)
12787
#define vsext_vf8_i64m8_m(...) __riscv_vsext_vf8_i64m8_tumu(__VA_ARGS__)
12788
#define vsext_vf2_i32mf2_m(...) __riscv_vsext_vf2_i32mf2_tumu(__VA_ARGS__)
12789
#define vsext_vf2_i32m1_m(...) __riscv_vsext_vf2_i32m1_tumu(__VA_ARGS__)
12790
#define vsext_vf2_i32m2_m(...) __riscv_vsext_vf2_i32m2_tumu(__VA_ARGS__)
12791
#define vsext_vf2_i32m4_m(...) __riscv_vsext_vf2_i32m4_tumu(__VA_ARGS__)
12792
#define vsext_vf2_i32m8_m(...) __riscv_vsext_vf2_i32m8_tumu(__VA_ARGS__)
12793
#define vsext_vf4_i64m1_m(...) __riscv_vsext_vf4_i64m1_tumu(__VA_ARGS__)
12794
#define vsext_vf4_i64m2_m(...) __riscv_vsext_vf4_i64m2_tumu(__VA_ARGS__)
12795
#define vsext_vf4_i64m4_m(...) __riscv_vsext_vf4_i64m4_tumu(__VA_ARGS__)
12796
#define vsext_vf4_i64m8_m(...) __riscv_vsext_vf4_i64m8_tumu(__VA_ARGS__)
12797
#define vsext_vf2_i64m1_m(...) __riscv_vsext_vf2_i64m1_tumu(__VA_ARGS__)
12798
#define vsext_vf2_i64m2_m(...) __riscv_vsext_vf2_i64m2_tumu(__VA_ARGS__)
12799
#define vsext_vf2_i64m4_m(...) __riscv_vsext_vf2_i64m4_tumu(__VA_ARGS__)
12800
#define vsext_vf2_i64m8_m(...) __riscv_vsext_vf2_i64m8_tumu(__VA_ARGS__)
12801
#define vzext_vf2_u16mf4_m(...) __riscv_vzext_vf2_u16mf4_tumu(__VA_ARGS__)
12802
#define vzext_vf2_u16mf2_m(...) __riscv_vzext_vf2_u16mf2_tumu(__VA_ARGS__)
12803
#define vzext_vf2_u16m1_m(...) __riscv_vzext_vf2_u16m1_tumu(__VA_ARGS__)
12804
#define vzext_vf2_u16m2_m(...) __riscv_vzext_vf2_u16m2_tumu(__VA_ARGS__)
12805
#define vzext_vf2_u16m4_m(...) __riscv_vzext_vf2_u16m4_tumu(__VA_ARGS__)
12806
#define vzext_vf2_u16m8_m(...) __riscv_vzext_vf2_u16m8_tumu(__VA_ARGS__)
12807
#define vzext_vf4_u32mf2_m(...) __riscv_vzext_vf4_u32mf2_tumu(__VA_ARGS__)
12808
#define vzext_vf4_u32m1_m(...) __riscv_vzext_vf4_u32m1_tumu(__VA_ARGS__)
12809
#define vzext_vf4_u32m2_m(...) __riscv_vzext_vf4_u32m2_tumu(__VA_ARGS__)
12810
#define vzext_vf4_u32m4_m(...) __riscv_vzext_vf4_u32m4_tumu(__VA_ARGS__)
12811
#define vzext_vf4_u32m8_m(...) __riscv_vzext_vf4_u32m8_tumu(__VA_ARGS__)
12812
#define vzext_vf8_u64m1_m(...) __riscv_vzext_vf8_u64m1_tumu(__VA_ARGS__)
12813
#define vzext_vf8_u64m2_m(...) __riscv_vzext_vf8_u64m2_tumu(__VA_ARGS__)
12814
#define vzext_vf8_u64m4_m(...) __riscv_vzext_vf8_u64m4_tumu(__VA_ARGS__)
12815
#define vzext_vf8_u64m8_m(...) __riscv_vzext_vf8_u64m8_tumu(__VA_ARGS__)
12816
#define vzext_vf2_u32mf2_m(...) __riscv_vzext_vf2_u32mf2_tumu(__VA_ARGS__)
12817
#define vzext_vf2_u32m1_m(...) __riscv_vzext_vf2_u32m1_tumu(__VA_ARGS__)
12818
#define vzext_vf2_u32m2_m(...) __riscv_vzext_vf2_u32m2_tumu(__VA_ARGS__)
12819
#define vzext_vf2_u32m4_m(...) __riscv_vzext_vf2_u32m4_tumu(__VA_ARGS__)
12820
#define vzext_vf2_u32m8_m(...) __riscv_vzext_vf2_u32m8_tumu(__VA_ARGS__)
12821
#define vzext_vf4_u64m1_m(...) __riscv_vzext_vf4_u64m1_tumu(__VA_ARGS__)
12822
#define vzext_vf4_u64m2_m(...) __riscv_vzext_vf4_u64m2_tumu(__VA_ARGS__)
12823
#define vzext_vf4_u64m4_m(...) __riscv_vzext_vf4_u64m4_tumu(__VA_ARGS__)
12824
#define vzext_vf4_u64m8_m(...) __riscv_vzext_vf4_u64m8_tumu(__VA_ARGS__)
12825
#define vzext_vf2_u64m1_m(...) __riscv_vzext_vf2_u64m1_tumu(__VA_ARGS__)
12826
#define vzext_vf2_u64m2_m(...) __riscv_vzext_vf2_u64m2_tumu(__VA_ARGS__)
12827
#define vzext_vf2_u64m4_m(...) __riscv_vzext_vf2_u64m4_tumu(__VA_ARGS__)
12828
#define vzext_vf2_u64m8_m(...) __riscv_vzext_vf2_u64m8_tumu(__VA_ARGS__)
12829
#define vadc_vvm_i8mf8(...) __riscv_vadc_vvm_i8mf8(__VA_ARGS__)
12830
#define vadc_vxm_i8mf8(...) __riscv_vadc_vxm_i8mf8(__VA_ARGS__)
12831
#define vadc_vvm_i8mf4(...) __riscv_vadc_vvm_i8mf4(__VA_ARGS__)
12832
#define vadc_vxm_i8mf4(...) __riscv_vadc_vxm_i8mf4(__VA_ARGS__)
12833
#define vadc_vvm_i8mf2(...) __riscv_vadc_vvm_i8mf2(__VA_ARGS__)
12834
#define vadc_vxm_i8mf2(...) __riscv_vadc_vxm_i8mf2(__VA_ARGS__)
12835
#define vadc_vvm_i8m1(...) __riscv_vadc_vvm_i8m1(__VA_ARGS__)
12836
#define vadc_vxm_i8m1(...) __riscv_vadc_vxm_i8m1(__VA_ARGS__)
12837
#define vadc_vvm_i8m2(...) __riscv_vadc_vvm_i8m2(__VA_ARGS__)
12838
#define vadc_vxm_i8m2(...) __riscv_vadc_vxm_i8m2(__VA_ARGS__)
12839
#define vadc_vvm_i8m4(...) __riscv_vadc_vvm_i8m4(__VA_ARGS__)
12840
#define vadc_vxm_i8m4(...) __riscv_vadc_vxm_i8m4(__VA_ARGS__)
12841
#define vadc_vvm_i8m8(...) __riscv_vadc_vvm_i8m8(__VA_ARGS__)
12842
#define vadc_vxm_i8m8(...) __riscv_vadc_vxm_i8m8(__VA_ARGS__)
12843
#define vadc_vvm_i16mf4(...) __riscv_vadc_vvm_i16mf4(__VA_ARGS__)
12844
#define vadc_vxm_i16mf4(...) __riscv_vadc_vxm_i16mf4(__VA_ARGS__)
12845
#define vadc_vvm_i16mf2(...) __riscv_vadc_vvm_i16mf2(__VA_ARGS__)
12846
#define vadc_vxm_i16mf2(...) __riscv_vadc_vxm_i16mf2(__VA_ARGS__)
12847
#define vadc_vvm_i16m1(...) __riscv_vadc_vvm_i16m1(__VA_ARGS__)
12848
#define vadc_vxm_i16m1(...) __riscv_vadc_vxm_i16m1(__VA_ARGS__)
12849
#define vadc_vvm_i16m2(...) __riscv_vadc_vvm_i16m2(__VA_ARGS__)
12850
#define vadc_vxm_i16m2(...) __riscv_vadc_vxm_i16m2(__VA_ARGS__)
12851
#define vadc_vvm_i16m4(...) __riscv_vadc_vvm_i16m4(__VA_ARGS__)
12852
#define vadc_vxm_i16m4(...) __riscv_vadc_vxm_i16m4(__VA_ARGS__)
12853
#define vadc_vvm_i16m8(...) __riscv_vadc_vvm_i16m8(__VA_ARGS__)
12854
#define vadc_vxm_i16m8(...) __riscv_vadc_vxm_i16m8(__VA_ARGS__)
12855
#define vadc_vvm_i32mf2(...) __riscv_vadc_vvm_i32mf2(__VA_ARGS__)
12856
#define vadc_vxm_i32mf2(...) __riscv_vadc_vxm_i32mf2(__VA_ARGS__)
12857
#define vadc_vvm_i32m1(...) __riscv_vadc_vvm_i32m1(__VA_ARGS__)
12858
#define vadc_vxm_i32m1(...) __riscv_vadc_vxm_i32m1(__VA_ARGS__)
12859
#define vadc_vvm_i32m2(...) __riscv_vadc_vvm_i32m2(__VA_ARGS__)
12860
#define vadc_vxm_i32m2(...) __riscv_vadc_vxm_i32m2(__VA_ARGS__)
12861
#define vadc_vvm_i32m4(...) __riscv_vadc_vvm_i32m4(__VA_ARGS__)
12862
#define vadc_vxm_i32m4(...) __riscv_vadc_vxm_i32m4(__VA_ARGS__)
12863
#define vadc_vvm_i32m8(...) __riscv_vadc_vvm_i32m8(__VA_ARGS__)
12864
#define vadc_vxm_i32m8(...) __riscv_vadc_vxm_i32m8(__VA_ARGS__)
12865
#define vadc_vvm_i64m1(...) __riscv_vadc_vvm_i64m1(__VA_ARGS__)
12866
#define vadc_vxm_i64m1(...) __riscv_vadc_vxm_i64m1(__VA_ARGS__)
12867
#define vadc_vvm_i64m2(...) __riscv_vadc_vvm_i64m2(__VA_ARGS__)
12868
#define vadc_vxm_i64m2(...) __riscv_vadc_vxm_i64m2(__VA_ARGS__)
12869
#define vadc_vvm_i64m4(...) __riscv_vadc_vvm_i64m4(__VA_ARGS__)
12870
#define vadc_vxm_i64m4(...) __riscv_vadc_vxm_i64m4(__VA_ARGS__)
12871
#define vadc_vvm_i64m8(...) __riscv_vadc_vvm_i64m8(__VA_ARGS__)
12872
#define vadc_vxm_i64m8(...) __riscv_vadc_vxm_i64m8(__VA_ARGS__)
12873
#define vsbc_vvm_i8mf8(...) __riscv_vsbc_vvm_i8mf8(__VA_ARGS__)
12874
#define vsbc_vxm_i8mf8(...) __riscv_vsbc_vxm_i8mf8(__VA_ARGS__)
12875
#define vsbc_vvm_i8mf4(...) __riscv_vsbc_vvm_i8mf4(__VA_ARGS__)
12876
#define vsbc_vxm_i8mf4(...) __riscv_vsbc_vxm_i8mf4(__VA_ARGS__)
12877
#define vsbc_vvm_i8mf2(...) __riscv_vsbc_vvm_i8mf2(__VA_ARGS__)
12878
#define vsbc_vxm_i8mf2(...) __riscv_vsbc_vxm_i8mf2(__VA_ARGS__)
12879
#define vsbc_vvm_i8m1(...) __riscv_vsbc_vvm_i8m1(__VA_ARGS__)
12880
#define vsbc_vxm_i8m1(...) __riscv_vsbc_vxm_i8m1(__VA_ARGS__)
12881
#define vsbc_vvm_i8m2(...) __riscv_vsbc_vvm_i8m2(__VA_ARGS__)
12882
#define vsbc_vxm_i8m2(...) __riscv_vsbc_vxm_i8m2(__VA_ARGS__)
12883
#define vsbc_vvm_i8m4(...) __riscv_vsbc_vvm_i8m4(__VA_ARGS__)
12884
#define vsbc_vxm_i8m4(...) __riscv_vsbc_vxm_i8m4(__VA_ARGS__)
12885
#define vsbc_vvm_i8m8(...) __riscv_vsbc_vvm_i8m8(__VA_ARGS__)
12886
#define vsbc_vxm_i8m8(...) __riscv_vsbc_vxm_i8m8(__VA_ARGS__)
12887
#define vsbc_vvm_i16mf4(...) __riscv_vsbc_vvm_i16mf4(__VA_ARGS__)
12888
#define vsbc_vxm_i16mf4(...) __riscv_vsbc_vxm_i16mf4(__VA_ARGS__)
12889
#define vsbc_vvm_i16mf2(...) __riscv_vsbc_vvm_i16mf2(__VA_ARGS__)
12890
#define vsbc_vxm_i16mf2(...) __riscv_vsbc_vxm_i16mf2(__VA_ARGS__)
12891
#define vsbc_vvm_i16m1(...) __riscv_vsbc_vvm_i16m1(__VA_ARGS__)
12892
#define vsbc_vxm_i16m1(...) __riscv_vsbc_vxm_i16m1(__VA_ARGS__)
12893
#define vsbc_vvm_i16m2(...) __riscv_vsbc_vvm_i16m2(__VA_ARGS__)
12894
#define vsbc_vxm_i16m2(...) __riscv_vsbc_vxm_i16m2(__VA_ARGS__)
12895
#define vsbc_vvm_i16m4(...) __riscv_vsbc_vvm_i16m4(__VA_ARGS__)
12896
#define vsbc_vxm_i16m4(...) __riscv_vsbc_vxm_i16m4(__VA_ARGS__)
12897
#define vsbc_vvm_i16m8(...) __riscv_vsbc_vvm_i16m8(__VA_ARGS__)
12898
#define vsbc_vxm_i16m8(...) __riscv_vsbc_vxm_i16m8(__VA_ARGS__)
12899
#define vsbc_vvm_i32mf2(...) __riscv_vsbc_vvm_i32mf2(__VA_ARGS__)
12900
#define vsbc_vxm_i32mf2(...) __riscv_vsbc_vxm_i32mf2(__VA_ARGS__)
12901
#define vsbc_vvm_i32m1(...) __riscv_vsbc_vvm_i32m1(__VA_ARGS__)
12902
#define vsbc_vxm_i32m1(...) __riscv_vsbc_vxm_i32m1(__VA_ARGS__)
12903
#define vsbc_vvm_i32m2(...) __riscv_vsbc_vvm_i32m2(__VA_ARGS__)
12904
#define vsbc_vxm_i32m2(...) __riscv_vsbc_vxm_i32m2(__VA_ARGS__)
12905
#define vsbc_vvm_i32m4(...) __riscv_vsbc_vvm_i32m4(__VA_ARGS__)
12906
#define vsbc_vxm_i32m4(...) __riscv_vsbc_vxm_i32m4(__VA_ARGS__)
12907
#define vsbc_vvm_i32m8(...) __riscv_vsbc_vvm_i32m8(__VA_ARGS__)
12908
#define vsbc_vxm_i32m8(...) __riscv_vsbc_vxm_i32m8(__VA_ARGS__)
12909
#define vsbc_vvm_i64m1(...) __riscv_vsbc_vvm_i64m1(__VA_ARGS__)
12910
#define vsbc_vxm_i64m1(...) __riscv_vsbc_vxm_i64m1(__VA_ARGS__)
12911
#define vsbc_vvm_i64m2(...) __riscv_vsbc_vvm_i64m2(__VA_ARGS__)
12912
#define vsbc_vxm_i64m2(...) __riscv_vsbc_vxm_i64m2(__VA_ARGS__)
12913
#define vsbc_vvm_i64m4(...) __riscv_vsbc_vvm_i64m4(__VA_ARGS__)
12914
#define vsbc_vxm_i64m4(...) __riscv_vsbc_vxm_i64m4(__VA_ARGS__)
12915
#define vsbc_vvm_i64m8(...) __riscv_vsbc_vvm_i64m8(__VA_ARGS__)
12916
#define vsbc_vxm_i64m8(...) __riscv_vsbc_vxm_i64m8(__VA_ARGS__)
12917
#define vadc_vvm_u8mf8(...) __riscv_vadc_vvm_u8mf8(__VA_ARGS__)
12918
#define vadc_vxm_u8mf8(...) __riscv_vadc_vxm_u8mf8(__VA_ARGS__)
12919
#define vadc_vvm_u8mf4(...) __riscv_vadc_vvm_u8mf4(__VA_ARGS__)
12920
#define vadc_vxm_u8mf4(...) __riscv_vadc_vxm_u8mf4(__VA_ARGS__)
12921
#define vadc_vvm_u8mf2(...) __riscv_vadc_vvm_u8mf2(__VA_ARGS__)
12922
#define vadc_vxm_u8mf2(...) __riscv_vadc_vxm_u8mf2(__VA_ARGS__)
12923
#define vadc_vvm_u8m1(...) __riscv_vadc_vvm_u8m1(__VA_ARGS__)
12924
#define vadc_vxm_u8m1(...) __riscv_vadc_vxm_u8m1(__VA_ARGS__)
12925
#define vadc_vvm_u8m2(...) __riscv_vadc_vvm_u8m2(__VA_ARGS__)
12926
#define vadc_vxm_u8m2(...) __riscv_vadc_vxm_u8m2(__VA_ARGS__)
12927
#define vadc_vvm_u8m4(...) __riscv_vadc_vvm_u8m4(__VA_ARGS__)
12928
#define vadc_vxm_u8m4(...) __riscv_vadc_vxm_u8m4(__VA_ARGS__)
12929
#define vadc_vvm_u8m8(...) __riscv_vadc_vvm_u8m8(__VA_ARGS__)
12930
#define vadc_vxm_u8m8(...) __riscv_vadc_vxm_u8m8(__VA_ARGS__)
12931
#define vadc_vvm_u16mf4(...) __riscv_vadc_vvm_u16mf4(__VA_ARGS__)
12932
#define vadc_vxm_u16mf4(...) __riscv_vadc_vxm_u16mf4(__VA_ARGS__)
12933
#define vadc_vvm_u16mf2(...) __riscv_vadc_vvm_u16mf2(__VA_ARGS__)
12934
#define vadc_vxm_u16mf2(...) __riscv_vadc_vxm_u16mf2(__VA_ARGS__)
12935
#define vadc_vvm_u16m1(...) __riscv_vadc_vvm_u16m1(__VA_ARGS__)
12936
#define vadc_vxm_u16m1(...) __riscv_vadc_vxm_u16m1(__VA_ARGS__)
12937
#define vadc_vvm_u16m2(...) __riscv_vadc_vvm_u16m2(__VA_ARGS__)
12938
#define vadc_vxm_u16m2(...) __riscv_vadc_vxm_u16m2(__VA_ARGS__)
12939
#define vadc_vvm_u16m4(...) __riscv_vadc_vvm_u16m4(__VA_ARGS__)
12940
#define vadc_vxm_u16m4(...) __riscv_vadc_vxm_u16m4(__VA_ARGS__)
12941
#define vadc_vvm_u16m8(...) __riscv_vadc_vvm_u16m8(__VA_ARGS__)
12942
#define vadc_vxm_u16m8(...) __riscv_vadc_vxm_u16m8(__VA_ARGS__)
12943
#define vadc_vvm_u32mf2(...) __riscv_vadc_vvm_u32mf2(__VA_ARGS__)
12944
#define vadc_vxm_u32mf2(...) __riscv_vadc_vxm_u32mf2(__VA_ARGS__)
12945
#define vadc_vvm_u32m1(...) __riscv_vadc_vvm_u32m1(__VA_ARGS__)
12946
#define vadc_vxm_u32m1(...) __riscv_vadc_vxm_u32m1(__VA_ARGS__)
12947
#define vadc_vvm_u32m2(...) __riscv_vadc_vvm_u32m2(__VA_ARGS__)
12948
#define vadc_vxm_u32m2(...) __riscv_vadc_vxm_u32m2(__VA_ARGS__)
12949
#define vadc_vvm_u32m4(...) __riscv_vadc_vvm_u32m4(__VA_ARGS__)
12950
#define vadc_vxm_u32m4(...) __riscv_vadc_vxm_u32m4(__VA_ARGS__)
12951
#define vadc_vvm_u32m8(...) __riscv_vadc_vvm_u32m8(__VA_ARGS__)
12952
#define vadc_vxm_u32m8(...) __riscv_vadc_vxm_u32m8(__VA_ARGS__)
12953
#define vadc_vvm_u64m1(...) __riscv_vadc_vvm_u64m1(__VA_ARGS__)
12954
#define vadc_vxm_u64m1(...) __riscv_vadc_vxm_u64m1(__VA_ARGS__)
12955
#define vadc_vvm_u64m2(...) __riscv_vadc_vvm_u64m2(__VA_ARGS__)
12956
#define vadc_vxm_u64m2(...) __riscv_vadc_vxm_u64m2(__VA_ARGS__)
12957
#define vadc_vvm_u64m4(...) __riscv_vadc_vvm_u64m4(__VA_ARGS__)
12958
#define vadc_vxm_u64m4(...) __riscv_vadc_vxm_u64m4(__VA_ARGS__)
12959
#define vadc_vvm_u64m8(...) __riscv_vadc_vvm_u64m8(__VA_ARGS__)
12960
#define vadc_vxm_u64m8(...) __riscv_vadc_vxm_u64m8(__VA_ARGS__)
12961
#define vsbc_vvm_u8mf8(...) __riscv_vsbc_vvm_u8mf8(__VA_ARGS__)
12962
#define vsbc_vxm_u8mf8(...) __riscv_vsbc_vxm_u8mf8(__VA_ARGS__)
12963
#define vsbc_vvm_u8mf4(...) __riscv_vsbc_vvm_u8mf4(__VA_ARGS__)
12964
#define vsbc_vxm_u8mf4(...) __riscv_vsbc_vxm_u8mf4(__VA_ARGS__)
12965
#define vsbc_vvm_u8mf2(...) __riscv_vsbc_vvm_u8mf2(__VA_ARGS__)
12966
#define vsbc_vxm_u8mf2(...) __riscv_vsbc_vxm_u8mf2(__VA_ARGS__)
12967
#define vsbc_vvm_u8m1(...) __riscv_vsbc_vvm_u8m1(__VA_ARGS__)
12968
#define vsbc_vxm_u8m1(...) __riscv_vsbc_vxm_u8m1(__VA_ARGS__)
12969
#define vsbc_vvm_u8m2(...) __riscv_vsbc_vvm_u8m2(__VA_ARGS__)
12970
#define vsbc_vxm_u8m2(...) __riscv_vsbc_vxm_u8m2(__VA_ARGS__)
12971
#define vsbc_vvm_u8m4(...) __riscv_vsbc_vvm_u8m4(__VA_ARGS__)
12972
#define vsbc_vxm_u8m4(...) __riscv_vsbc_vxm_u8m4(__VA_ARGS__)
12973
#define vsbc_vvm_u8m8(...) __riscv_vsbc_vvm_u8m8(__VA_ARGS__)
12974
#define vsbc_vxm_u8m8(...) __riscv_vsbc_vxm_u8m8(__VA_ARGS__)
12975
#define vsbc_vvm_u16mf4(...) __riscv_vsbc_vvm_u16mf4(__VA_ARGS__)
12976
#define vsbc_vxm_u16mf4(...) __riscv_vsbc_vxm_u16mf4(__VA_ARGS__)
12977
#define vsbc_vvm_u16mf2(...) __riscv_vsbc_vvm_u16mf2(__VA_ARGS__)
12978
#define vsbc_vxm_u16mf2(...) __riscv_vsbc_vxm_u16mf2(__VA_ARGS__)
12979
#define vsbc_vvm_u16m1(...) __riscv_vsbc_vvm_u16m1(__VA_ARGS__)
12980
#define vsbc_vxm_u16m1(...) __riscv_vsbc_vxm_u16m1(__VA_ARGS__)
12981
#define vsbc_vvm_u16m2(...) __riscv_vsbc_vvm_u16m2(__VA_ARGS__)
12982
#define vsbc_vxm_u16m2(...) __riscv_vsbc_vxm_u16m2(__VA_ARGS__)
12983
#define vsbc_vvm_u16m4(...) __riscv_vsbc_vvm_u16m4(__VA_ARGS__)
12984
#define vsbc_vxm_u16m4(...) __riscv_vsbc_vxm_u16m4(__VA_ARGS__)
12985
#define vsbc_vvm_u16m8(...) __riscv_vsbc_vvm_u16m8(__VA_ARGS__)
12986
#define vsbc_vxm_u16m8(...) __riscv_vsbc_vxm_u16m8(__VA_ARGS__)
12987
#define vsbc_vvm_u32mf2(...) __riscv_vsbc_vvm_u32mf2(__VA_ARGS__)
12988
#define vsbc_vxm_u32mf2(...) __riscv_vsbc_vxm_u32mf2(__VA_ARGS__)
12989
#define vsbc_vvm_u32m1(...) __riscv_vsbc_vvm_u32m1(__VA_ARGS__)
12990
#define vsbc_vxm_u32m1(...) __riscv_vsbc_vxm_u32m1(__VA_ARGS__)
12991
#define vsbc_vvm_u32m2(...) __riscv_vsbc_vvm_u32m2(__VA_ARGS__)
12992
#define vsbc_vxm_u32m2(...) __riscv_vsbc_vxm_u32m2(__VA_ARGS__)
12993
#define vsbc_vvm_u32m4(...) __riscv_vsbc_vvm_u32m4(__VA_ARGS__)
12994
#define vsbc_vxm_u32m4(...) __riscv_vsbc_vxm_u32m4(__VA_ARGS__)
12995
#define vsbc_vvm_u32m8(...) __riscv_vsbc_vvm_u32m8(__VA_ARGS__)
12996
#define vsbc_vxm_u32m8(...) __riscv_vsbc_vxm_u32m8(__VA_ARGS__)
12997
#define vsbc_vvm_u64m1(...) __riscv_vsbc_vvm_u64m1(__VA_ARGS__)
12998
#define vsbc_vxm_u64m1(...) __riscv_vsbc_vxm_u64m1(__VA_ARGS__)
12999
#define vsbc_vvm_u64m2(...) __riscv_vsbc_vvm_u64m2(__VA_ARGS__)
13000
#define vsbc_vxm_u64m2(...) __riscv_vsbc_vxm_u64m2(__VA_ARGS__)
13001
#define vsbc_vvm_u64m4(...) __riscv_vsbc_vvm_u64m4(__VA_ARGS__)
13002
#define vsbc_vxm_u64m4(...) __riscv_vsbc_vxm_u64m4(__VA_ARGS__)
13003
#define vsbc_vvm_u64m8(...) __riscv_vsbc_vvm_u64m8(__VA_ARGS__)
13004
#define vsbc_vxm_u64m8(...) __riscv_vsbc_vxm_u64m8(__VA_ARGS__)
13005
#define vmadc_vvm_i8mf8_b64(...) __riscv_vmadc_vvm_i8mf8_b64(__VA_ARGS__)
13006
#define vmadc_vxm_i8mf8_b64(...) __riscv_vmadc_vxm_i8mf8_b64(__VA_ARGS__)
13007
#define vmadc_vv_i8mf8_b64(...) __riscv_vmadc_vv_i8mf8_b64(__VA_ARGS__)
13008
#define vmadc_vx_i8mf8_b64(...) __riscv_vmadc_vx_i8mf8_b64(__VA_ARGS__)
13009
#define vmadc_vvm_i8mf4_b32(...) __riscv_vmadc_vvm_i8mf4_b32(__VA_ARGS__)
13010
#define vmadc_vxm_i8mf4_b32(...) __riscv_vmadc_vxm_i8mf4_b32(__VA_ARGS__)
13011
#define vmadc_vv_i8mf4_b32(...) __riscv_vmadc_vv_i8mf4_b32(__VA_ARGS__)
13012
#define vmadc_vx_i8mf4_b32(...) __riscv_vmadc_vx_i8mf4_b32(__VA_ARGS__)
13013
#define vmadc_vvm_i8mf2_b16(...) __riscv_vmadc_vvm_i8mf2_b16(__VA_ARGS__)
13014
#define vmadc_vxm_i8mf2_b16(...) __riscv_vmadc_vxm_i8mf2_b16(__VA_ARGS__)
13015
#define vmadc_vv_i8mf2_b16(...) __riscv_vmadc_vv_i8mf2_b16(__VA_ARGS__)
13016
#define vmadc_vx_i8mf2_b16(...) __riscv_vmadc_vx_i8mf2_b16(__VA_ARGS__)
13017
#define vmadc_vvm_i8m1_b8(...) __riscv_vmadc_vvm_i8m1_b8(__VA_ARGS__)
13018
#define vmadc_vxm_i8m1_b8(...) __riscv_vmadc_vxm_i8m1_b8(__VA_ARGS__)
13019
#define vmadc_vv_i8m1_b8(...) __riscv_vmadc_vv_i8m1_b8(__VA_ARGS__)
13020
#define vmadc_vx_i8m1_b8(...) __riscv_vmadc_vx_i8m1_b8(__VA_ARGS__)
13021
#define vmadc_vvm_i8m2_b4(...) __riscv_vmadc_vvm_i8m2_b4(__VA_ARGS__)
13022
#define vmadc_vxm_i8m2_b4(...) __riscv_vmadc_vxm_i8m2_b4(__VA_ARGS__)
13023
#define vmadc_vv_i8m2_b4(...) __riscv_vmadc_vv_i8m2_b4(__VA_ARGS__)
13024
#define vmadc_vx_i8m2_b4(...) __riscv_vmadc_vx_i8m2_b4(__VA_ARGS__)
13025
#define vmadc_vvm_i8m4_b2(...) __riscv_vmadc_vvm_i8m4_b2(__VA_ARGS__)
13026
#define vmadc_vxm_i8m4_b2(...) __riscv_vmadc_vxm_i8m4_b2(__VA_ARGS__)
13027
#define vmadc_vv_i8m4_b2(...) __riscv_vmadc_vv_i8m4_b2(__VA_ARGS__)
13028
#define vmadc_vx_i8m4_b2(...) __riscv_vmadc_vx_i8m4_b2(__VA_ARGS__)
13029
#define vmadc_vvm_i8m8_b1(...) __riscv_vmadc_vvm_i8m8_b1(__VA_ARGS__)
13030
#define vmadc_vxm_i8m8_b1(...) __riscv_vmadc_vxm_i8m8_b1(__VA_ARGS__)
13031
#define vmadc_vv_i8m8_b1(...) __riscv_vmadc_vv_i8m8_b1(__VA_ARGS__)
13032
#define vmadc_vx_i8m8_b1(...) __riscv_vmadc_vx_i8m8_b1(__VA_ARGS__)
13033
#define vmadc_vvm_i16mf4_b64(...) __riscv_vmadc_vvm_i16mf4_b64(__VA_ARGS__)
13034
#define vmadc_vxm_i16mf4_b64(...) __riscv_vmadc_vxm_i16mf4_b64(__VA_ARGS__)
13035
#define vmadc_vv_i16mf4_b64(...) __riscv_vmadc_vv_i16mf4_b64(__VA_ARGS__)
13036
#define vmadc_vx_i16mf4_b64(...) __riscv_vmadc_vx_i16mf4_b64(__VA_ARGS__)
13037
#define vmadc_vvm_i16mf2_b32(...) __riscv_vmadc_vvm_i16mf2_b32(__VA_ARGS__)
13038
#define vmadc_vxm_i16mf2_b32(...) __riscv_vmadc_vxm_i16mf2_b32(__VA_ARGS__)
13039
#define vmadc_vv_i16mf2_b32(...) __riscv_vmadc_vv_i16mf2_b32(__VA_ARGS__)
13040
#define vmadc_vx_i16mf2_b32(...) __riscv_vmadc_vx_i16mf2_b32(__VA_ARGS__)
13041
#define vmadc_vvm_i16m1_b16(...) __riscv_vmadc_vvm_i16m1_b16(__VA_ARGS__)
13042
#define vmadc_vxm_i16m1_b16(...) __riscv_vmadc_vxm_i16m1_b16(__VA_ARGS__)
13043
#define vmadc_vv_i16m1_b16(...) __riscv_vmadc_vv_i16m1_b16(__VA_ARGS__)
13044
#define vmadc_vx_i16m1_b16(...) __riscv_vmadc_vx_i16m1_b16(__VA_ARGS__)
13045
#define vmadc_vvm_i16m2_b8(...) __riscv_vmadc_vvm_i16m2_b8(__VA_ARGS__)
13046
#define vmadc_vxm_i16m2_b8(...) __riscv_vmadc_vxm_i16m2_b8(__VA_ARGS__)
13047
#define vmadc_vv_i16m2_b8(...) __riscv_vmadc_vv_i16m2_b8(__VA_ARGS__)
13048
#define vmadc_vx_i16m2_b8(...) __riscv_vmadc_vx_i16m2_b8(__VA_ARGS__)
13049
#define vmadc_vvm_i16m4_b4(...) __riscv_vmadc_vvm_i16m4_b4(__VA_ARGS__)
13050
#define vmadc_vxm_i16m4_b4(...) __riscv_vmadc_vxm_i16m4_b4(__VA_ARGS__)
13051
#define vmadc_vv_i16m4_b4(...) __riscv_vmadc_vv_i16m4_b4(__VA_ARGS__)
13052
#define vmadc_vx_i16m4_b4(...) __riscv_vmadc_vx_i16m4_b4(__VA_ARGS__)
13053
#define vmadc_vvm_i16m8_b2(...) __riscv_vmadc_vvm_i16m8_b2(__VA_ARGS__)
13054
#define vmadc_vxm_i16m8_b2(...) __riscv_vmadc_vxm_i16m8_b2(__VA_ARGS__)
13055
#define vmadc_vv_i16m8_b2(...) __riscv_vmadc_vv_i16m8_b2(__VA_ARGS__)
13056
#define vmadc_vx_i16m8_b2(...) __riscv_vmadc_vx_i16m8_b2(__VA_ARGS__)
13057
#define vmadc_vvm_i32mf2_b64(...) __riscv_vmadc_vvm_i32mf2_b64(__VA_ARGS__)
13058
#define vmadc_vxm_i32mf2_b64(...) __riscv_vmadc_vxm_i32mf2_b64(__VA_ARGS__)
13059
#define vmadc_vv_i32mf2_b64(...) __riscv_vmadc_vv_i32mf2_b64(__VA_ARGS__)
13060
#define vmadc_vx_i32mf2_b64(...) __riscv_vmadc_vx_i32mf2_b64(__VA_ARGS__)
13061
#define vmadc_vvm_i32m1_b32(...) __riscv_vmadc_vvm_i32m1_b32(__VA_ARGS__)
13062
#define vmadc_vxm_i32m1_b32(...) __riscv_vmadc_vxm_i32m1_b32(__VA_ARGS__)
13063
#define vmadc_vv_i32m1_b32(...) __riscv_vmadc_vv_i32m1_b32(__VA_ARGS__)
13064
#define vmadc_vx_i32m1_b32(...) __riscv_vmadc_vx_i32m1_b32(__VA_ARGS__)
13065
#define vmadc_vvm_i32m2_b16(...) __riscv_vmadc_vvm_i32m2_b16(__VA_ARGS__)
13066
#define vmadc_vxm_i32m2_b16(...) __riscv_vmadc_vxm_i32m2_b16(__VA_ARGS__)
13067
#define vmadc_vv_i32m2_b16(...) __riscv_vmadc_vv_i32m2_b16(__VA_ARGS__)
13068
#define vmadc_vx_i32m2_b16(...) __riscv_vmadc_vx_i32m2_b16(__VA_ARGS__)
13069
#define vmadc_vvm_i32m4_b8(...) __riscv_vmadc_vvm_i32m4_b8(__VA_ARGS__)
13070
#define vmadc_vxm_i32m4_b8(...) __riscv_vmadc_vxm_i32m4_b8(__VA_ARGS__)
13071
#define vmadc_vv_i32m4_b8(...) __riscv_vmadc_vv_i32m4_b8(__VA_ARGS__)
13072
#define vmadc_vx_i32m4_b8(...) __riscv_vmadc_vx_i32m4_b8(__VA_ARGS__)
13073
#define vmadc_vvm_i32m8_b4(...) __riscv_vmadc_vvm_i32m8_b4(__VA_ARGS__)
13074
#define vmadc_vxm_i32m8_b4(...) __riscv_vmadc_vxm_i32m8_b4(__VA_ARGS__)
13075
#define vmadc_vv_i32m8_b4(...) __riscv_vmadc_vv_i32m8_b4(__VA_ARGS__)
13076
#define vmadc_vx_i32m8_b4(...) __riscv_vmadc_vx_i32m8_b4(__VA_ARGS__)
13077
#define vmadc_vvm_i64m1_b64(...) __riscv_vmadc_vvm_i64m1_b64(__VA_ARGS__)
13078
#define vmadc_vxm_i64m1_b64(...) __riscv_vmadc_vxm_i64m1_b64(__VA_ARGS__)
13079
#define vmadc_vv_i64m1_b64(...) __riscv_vmadc_vv_i64m1_b64(__VA_ARGS__)
13080
#define vmadc_vx_i64m1_b64(...) __riscv_vmadc_vx_i64m1_b64(__VA_ARGS__)
13081
#define vmadc_vvm_i64m2_b32(...) __riscv_vmadc_vvm_i64m2_b32(__VA_ARGS__)
13082
#define vmadc_vxm_i64m2_b32(...) __riscv_vmadc_vxm_i64m2_b32(__VA_ARGS__)
13083
#define vmadc_vv_i64m2_b32(...) __riscv_vmadc_vv_i64m2_b32(__VA_ARGS__)
13084
#define vmadc_vx_i64m2_b32(...) __riscv_vmadc_vx_i64m2_b32(__VA_ARGS__)
13085
#define vmadc_vvm_i64m4_b16(...) __riscv_vmadc_vvm_i64m4_b16(__VA_ARGS__)
13086
#define vmadc_vxm_i64m4_b16(...) __riscv_vmadc_vxm_i64m4_b16(__VA_ARGS__)
13087
#define vmadc_vv_i64m4_b16(...) __riscv_vmadc_vv_i64m4_b16(__VA_ARGS__)
13088
#define vmadc_vx_i64m4_b16(...) __riscv_vmadc_vx_i64m4_b16(__VA_ARGS__)
13089
#define vmadc_vvm_i64m8_b8(...) __riscv_vmadc_vvm_i64m8_b8(__VA_ARGS__)
13090
#define vmadc_vxm_i64m8_b8(...) __riscv_vmadc_vxm_i64m8_b8(__VA_ARGS__)
13091
#define vmadc_vv_i64m8_b8(...) __riscv_vmadc_vv_i64m8_b8(__VA_ARGS__)
13092
#define vmadc_vx_i64m8_b8(...) __riscv_vmadc_vx_i64m8_b8(__VA_ARGS__)
13093
#define vmsbc_vvm_i8mf8_b64(...) __riscv_vmsbc_vvm_i8mf8_b64(__VA_ARGS__)
13094
#define vmsbc_vxm_i8mf8_b64(...) __riscv_vmsbc_vxm_i8mf8_b64(__VA_ARGS__)
13095
#define vmsbc_vv_i8mf8_b64(...) __riscv_vmsbc_vv_i8mf8_b64(__VA_ARGS__)
13096
#define vmsbc_vx_i8mf8_b64(...) __riscv_vmsbc_vx_i8mf8_b64(__VA_ARGS__)
13097
#define vmsbc_vvm_i8mf4_b32(...) __riscv_vmsbc_vvm_i8mf4_b32(__VA_ARGS__)
13098
#define vmsbc_vxm_i8mf4_b32(...) __riscv_vmsbc_vxm_i8mf4_b32(__VA_ARGS__)
13099
#define vmsbc_vv_i8mf4_b32(...) __riscv_vmsbc_vv_i8mf4_b32(__VA_ARGS__)
13100
#define vmsbc_vx_i8mf4_b32(...) __riscv_vmsbc_vx_i8mf4_b32(__VA_ARGS__)
13101
#define vmsbc_vvm_i8mf2_b16(...) __riscv_vmsbc_vvm_i8mf2_b16(__VA_ARGS__)
13102
#define vmsbc_vxm_i8mf2_b16(...) __riscv_vmsbc_vxm_i8mf2_b16(__VA_ARGS__)
13103
#define vmsbc_vv_i8mf2_b16(...) __riscv_vmsbc_vv_i8mf2_b16(__VA_ARGS__)
13104
#define vmsbc_vx_i8mf2_b16(...) __riscv_vmsbc_vx_i8mf2_b16(__VA_ARGS__)
13105
#define vmsbc_vvm_i8m1_b8(...) __riscv_vmsbc_vvm_i8m1_b8(__VA_ARGS__)
13106
#define vmsbc_vxm_i8m1_b8(...) __riscv_vmsbc_vxm_i8m1_b8(__VA_ARGS__)
13107
#define vmsbc_vv_i8m1_b8(...) __riscv_vmsbc_vv_i8m1_b8(__VA_ARGS__)
13108
#define vmsbc_vx_i8m1_b8(...) __riscv_vmsbc_vx_i8m1_b8(__VA_ARGS__)
13109
#define vmsbc_vvm_i8m2_b4(...) __riscv_vmsbc_vvm_i8m2_b4(__VA_ARGS__)
13110
#define vmsbc_vxm_i8m2_b4(...) __riscv_vmsbc_vxm_i8m2_b4(__VA_ARGS__)
13111
#define vmsbc_vv_i8m2_b4(...) __riscv_vmsbc_vv_i8m2_b4(__VA_ARGS__)
13112
#define vmsbc_vx_i8m2_b4(...) __riscv_vmsbc_vx_i8m2_b4(__VA_ARGS__)
13113
#define vmsbc_vvm_i8m4_b2(...) __riscv_vmsbc_vvm_i8m4_b2(__VA_ARGS__)
13114
#define vmsbc_vxm_i8m4_b2(...) __riscv_vmsbc_vxm_i8m4_b2(__VA_ARGS__)
13115
#define vmsbc_vv_i8m4_b2(...) __riscv_vmsbc_vv_i8m4_b2(__VA_ARGS__)
13116
#define vmsbc_vx_i8m4_b2(...) __riscv_vmsbc_vx_i8m4_b2(__VA_ARGS__)
13117
#define vmsbc_vvm_i8m8_b1(...) __riscv_vmsbc_vvm_i8m8_b1(__VA_ARGS__)
13118
#define vmsbc_vxm_i8m8_b1(...) __riscv_vmsbc_vxm_i8m8_b1(__VA_ARGS__)
13119
#define vmsbc_vv_i8m8_b1(...) __riscv_vmsbc_vv_i8m8_b1(__VA_ARGS__)
13120
#define vmsbc_vx_i8m8_b1(...) __riscv_vmsbc_vx_i8m8_b1(__VA_ARGS__)
13121
#define vmsbc_vvm_i16mf4_b64(...) __riscv_vmsbc_vvm_i16mf4_b64(__VA_ARGS__)
13122
#define vmsbc_vxm_i16mf4_b64(...) __riscv_vmsbc_vxm_i16mf4_b64(__VA_ARGS__)
13123
#define vmsbc_vv_i16mf4_b64(...) __riscv_vmsbc_vv_i16mf4_b64(__VA_ARGS__)
13124
#define vmsbc_vx_i16mf4_b64(...) __riscv_vmsbc_vx_i16mf4_b64(__VA_ARGS__)
13125
#define vmsbc_vvm_i16mf2_b32(...) __riscv_vmsbc_vvm_i16mf2_b32(__VA_ARGS__)
13126
#define vmsbc_vxm_i16mf2_b32(...) __riscv_vmsbc_vxm_i16mf2_b32(__VA_ARGS__)
13127
#define vmsbc_vv_i16mf2_b32(...) __riscv_vmsbc_vv_i16mf2_b32(__VA_ARGS__)
13128
#define vmsbc_vx_i16mf2_b32(...) __riscv_vmsbc_vx_i16mf2_b32(__VA_ARGS__)
13129
#define vmsbc_vvm_i16m1_b16(...) __riscv_vmsbc_vvm_i16m1_b16(__VA_ARGS__)
13130
#define vmsbc_vxm_i16m1_b16(...) __riscv_vmsbc_vxm_i16m1_b16(__VA_ARGS__)
13131
#define vmsbc_vv_i16m1_b16(...) __riscv_vmsbc_vv_i16m1_b16(__VA_ARGS__)
13132
#define vmsbc_vx_i16m1_b16(...) __riscv_vmsbc_vx_i16m1_b16(__VA_ARGS__)
13133
#define vmsbc_vvm_i16m2_b8(...) __riscv_vmsbc_vvm_i16m2_b8(__VA_ARGS__)
13134
#define vmsbc_vxm_i16m2_b8(...) __riscv_vmsbc_vxm_i16m2_b8(__VA_ARGS__)
13135
#define vmsbc_vv_i16m2_b8(...) __riscv_vmsbc_vv_i16m2_b8(__VA_ARGS__)
13136
#define vmsbc_vx_i16m2_b8(...) __riscv_vmsbc_vx_i16m2_b8(__VA_ARGS__)
13137
#define vmsbc_vvm_i16m4_b4(...) __riscv_vmsbc_vvm_i16m4_b4(__VA_ARGS__)
13138
#define vmsbc_vxm_i16m4_b4(...) __riscv_vmsbc_vxm_i16m4_b4(__VA_ARGS__)
13139
#define vmsbc_vv_i16m4_b4(...) __riscv_vmsbc_vv_i16m4_b4(__VA_ARGS__)
13140
#define vmsbc_vx_i16m4_b4(...) __riscv_vmsbc_vx_i16m4_b4(__VA_ARGS__)
13141
#define vmsbc_vvm_i16m8_b2(...) __riscv_vmsbc_vvm_i16m8_b2(__VA_ARGS__)
13142
#define vmsbc_vxm_i16m8_b2(...) __riscv_vmsbc_vxm_i16m8_b2(__VA_ARGS__)
13143
#define vmsbc_vv_i16m8_b2(...) __riscv_vmsbc_vv_i16m8_b2(__VA_ARGS__)
13144
#define vmsbc_vx_i16m8_b2(...) __riscv_vmsbc_vx_i16m8_b2(__VA_ARGS__)
13145
#define vmsbc_vvm_i32mf2_b64(...) __riscv_vmsbc_vvm_i32mf2_b64(__VA_ARGS__)
13146
#define vmsbc_vxm_i32mf2_b64(...) __riscv_vmsbc_vxm_i32mf2_b64(__VA_ARGS__)
13147
#define vmsbc_vv_i32mf2_b64(...) __riscv_vmsbc_vv_i32mf2_b64(__VA_ARGS__)
13148
#define vmsbc_vx_i32mf2_b64(...) __riscv_vmsbc_vx_i32mf2_b64(__VA_ARGS__)
13149
#define vmsbc_vvm_i32m1_b32(...) __riscv_vmsbc_vvm_i32m1_b32(__VA_ARGS__)
13150
#define vmsbc_vxm_i32m1_b32(...) __riscv_vmsbc_vxm_i32m1_b32(__VA_ARGS__)
13151
#define vmsbc_vv_i32m1_b32(...) __riscv_vmsbc_vv_i32m1_b32(__VA_ARGS__)
13152
#define vmsbc_vx_i32m1_b32(...) __riscv_vmsbc_vx_i32m1_b32(__VA_ARGS__)
13153
#define vmsbc_vvm_i32m2_b16(...) __riscv_vmsbc_vvm_i32m2_b16(__VA_ARGS__)
13154
#define vmsbc_vxm_i32m2_b16(...) __riscv_vmsbc_vxm_i32m2_b16(__VA_ARGS__)
13155
#define vmsbc_vv_i32m2_b16(...) __riscv_vmsbc_vv_i32m2_b16(__VA_ARGS__)
13156
#define vmsbc_vx_i32m2_b16(...) __riscv_vmsbc_vx_i32m2_b16(__VA_ARGS__)
13157
#define vmsbc_vvm_i32m4_b8(...) __riscv_vmsbc_vvm_i32m4_b8(__VA_ARGS__)
13158
#define vmsbc_vxm_i32m4_b8(...) __riscv_vmsbc_vxm_i32m4_b8(__VA_ARGS__)
13159
#define vmsbc_vv_i32m4_b8(...) __riscv_vmsbc_vv_i32m4_b8(__VA_ARGS__)
13160
#define vmsbc_vx_i32m4_b8(...) __riscv_vmsbc_vx_i32m4_b8(__VA_ARGS__)
13161
#define vmsbc_vvm_i32m8_b4(...) __riscv_vmsbc_vvm_i32m8_b4(__VA_ARGS__)
13162
#define vmsbc_vxm_i32m8_b4(...) __riscv_vmsbc_vxm_i32m8_b4(__VA_ARGS__)
13163
#define vmsbc_vv_i32m8_b4(...) __riscv_vmsbc_vv_i32m8_b4(__VA_ARGS__)
13164
#define vmsbc_vx_i32m8_b4(...) __riscv_vmsbc_vx_i32m8_b4(__VA_ARGS__)
13165
#define vmsbc_vvm_i64m1_b64(...) __riscv_vmsbc_vvm_i64m1_b64(__VA_ARGS__)
13166
#define vmsbc_vxm_i64m1_b64(...) __riscv_vmsbc_vxm_i64m1_b64(__VA_ARGS__)
13167
#define vmsbc_vv_i64m1_b64(...) __riscv_vmsbc_vv_i64m1_b64(__VA_ARGS__)
13168
#define vmsbc_vx_i64m1_b64(...) __riscv_vmsbc_vx_i64m1_b64(__VA_ARGS__)
13169
#define vmsbc_vvm_i64m2_b32(...) __riscv_vmsbc_vvm_i64m2_b32(__VA_ARGS__)
13170
#define vmsbc_vxm_i64m2_b32(...) __riscv_vmsbc_vxm_i64m2_b32(__VA_ARGS__)
13171
#define vmsbc_vv_i64m2_b32(...) __riscv_vmsbc_vv_i64m2_b32(__VA_ARGS__)
13172
#define vmsbc_vx_i64m2_b32(...) __riscv_vmsbc_vx_i64m2_b32(__VA_ARGS__)
13173
#define vmsbc_vvm_i64m4_b16(...) __riscv_vmsbc_vvm_i64m4_b16(__VA_ARGS__)
13174
#define vmsbc_vxm_i64m4_b16(...) __riscv_vmsbc_vxm_i64m4_b16(__VA_ARGS__)
13175
#define vmsbc_vv_i64m4_b16(...) __riscv_vmsbc_vv_i64m4_b16(__VA_ARGS__)
13176
#define vmsbc_vx_i64m4_b16(...) __riscv_vmsbc_vx_i64m4_b16(__VA_ARGS__)
13177
#define vmsbc_vvm_i64m8_b8(...) __riscv_vmsbc_vvm_i64m8_b8(__VA_ARGS__)
13178
#define vmsbc_vxm_i64m8_b8(...) __riscv_vmsbc_vxm_i64m8_b8(__VA_ARGS__)
13179
#define vmsbc_vv_i64m8_b8(...) __riscv_vmsbc_vv_i64m8_b8(__VA_ARGS__)
13180
#define vmsbc_vx_i64m8_b8(...) __riscv_vmsbc_vx_i64m8_b8(__VA_ARGS__)
13181
#define vmadc_vvm_u8mf8_b64(...) __riscv_vmadc_vvm_u8mf8_b64(__VA_ARGS__)
13182
#define vmadc_vxm_u8mf8_b64(...) __riscv_vmadc_vxm_u8mf8_b64(__VA_ARGS__)
13183
#define vmadc_vv_u8mf8_b64(...) __riscv_vmadc_vv_u8mf8_b64(__VA_ARGS__)
13184
#define vmadc_vx_u8mf8_b64(...) __riscv_vmadc_vx_u8mf8_b64(__VA_ARGS__)
13185
#define vmadc_vvm_u8mf4_b32(...) __riscv_vmadc_vvm_u8mf4_b32(__VA_ARGS__)
13186
#define vmadc_vxm_u8mf4_b32(...) __riscv_vmadc_vxm_u8mf4_b32(__VA_ARGS__)
13187
#define vmadc_vv_u8mf4_b32(...) __riscv_vmadc_vv_u8mf4_b32(__VA_ARGS__)
13188
#define vmadc_vx_u8mf4_b32(...) __riscv_vmadc_vx_u8mf4_b32(__VA_ARGS__)
13189
#define vmadc_vvm_u8mf2_b16(...) __riscv_vmadc_vvm_u8mf2_b16(__VA_ARGS__)
13190
#define vmadc_vxm_u8mf2_b16(...) __riscv_vmadc_vxm_u8mf2_b16(__VA_ARGS__)
13191
#define vmadc_vv_u8mf2_b16(...) __riscv_vmadc_vv_u8mf2_b16(__VA_ARGS__)
13192
#define vmadc_vx_u8mf2_b16(...) __riscv_vmadc_vx_u8mf2_b16(__VA_ARGS__)
13193
#define vmadc_vvm_u8m1_b8(...) __riscv_vmadc_vvm_u8m1_b8(__VA_ARGS__)
13194
#define vmadc_vxm_u8m1_b8(...) __riscv_vmadc_vxm_u8m1_b8(__VA_ARGS__)
13195
#define vmadc_vv_u8m1_b8(...) __riscv_vmadc_vv_u8m1_b8(__VA_ARGS__)
13196
#define vmadc_vx_u8m1_b8(...) __riscv_vmadc_vx_u8m1_b8(__VA_ARGS__)
13197
#define vmadc_vvm_u8m2_b4(...) __riscv_vmadc_vvm_u8m2_b4(__VA_ARGS__)
13198
#define vmadc_vxm_u8m2_b4(...) __riscv_vmadc_vxm_u8m2_b4(__VA_ARGS__)
13199
#define vmadc_vv_u8m2_b4(...) __riscv_vmadc_vv_u8m2_b4(__VA_ARGS__)
13200
#define vmadc_vx_u8m2_b4(...) __riscv_vmadc_vx_u8m2_b4(__VA_ARGS__)
13201
#define vmadc_vvm_u8m4_b2(...) __riscv_vmadc_vvm_u8m4_b2(__VA_ARGS__)
13202
#define vmadc_vxm_u8m4_b2(...) __riscv_vmadc_vxm_u8m4_b2(__VA_ARGS__)
13203
#define vmadc_vv_u8m4_b2(...) __riscv_vmadc_vv_u8m4_b2(__VA_ARGS__)
13204
#define vmadc_vx_u8m4_b2(...) __riscv_vmadc_vx_u8m4_b2(__VA_ARGS__)
13205
#define vmadc_vvm_u8m8_b1(...) __riscv_vmadc_vvm_u8m8_b1(__VA_ARGS__)
13206
#define vmadc_vxm_u8m8_b1(...) __riscv_vmadc_vxm_u8m8_b1(__VA_ARGS__)
13207
#define vmadc_vv_u8m8_b1(...) __riscv_vmadc_vv_u8m8_b1(__VA_ARGS__)
13208
#define vmadc_vx_u8m8_b1(...) __riscv_vmadc_vx_u8m8_b1(__VA_ARGS__)
13209
#define vmadc_vvm_u16mf4_b64(...) __riscv_vmadc_vvm_u16mf4_b64(__VA_ARGS__)
13210
#define vmadc_vxm_u16mf4_b64(...) __riscv_vmadc_vxm_u16mf4_b64(__VA_ARGS__)
13211
#define vmadc_vv_u16mf4_b64(...) __riscv_vmadc_vv_u16mf4_b64(__VA_ARGS__)
13212
#define vmadc_vx_u16mf4_b64(...) __riscv_vmadc_vx_u16mf4_b64(__VA_ARGS__)
13213
#define vmadc_vvm_u16mf2_b32(...) __riscv_vmadc_vvm_u16mf2_b32(__VA_ARGS__)
13214
#define vmadc_vxm_u16mf2_b32(...) __riscv_vmadc_vxm_u16mf2_b32(__VA_ARGS__)
13215
#define vmadc_vv_u16mf2_b32(...) __riscv_vmadc_vv_u16mf2_b32(__VA_ARGS__)
13216
#define vmadc_vx_u16mf2_b32(...) __riscv_vmadc_vx_u16mf2_b32(__VA_ARGS__)
13217
#define vmadc_vvm_u16m1_b16(...) __riscv_vmadc_vvm_u16m1_b16(__VA_ARGS__)
13218
#define vmadc_vxm_u16m1_b16(...) __riscv_vmadc_vxm_u16m1_b16(__VA_ARGS__)
13219
#define vmadc_vv_u16m1_b16(...) __riscv_vmadc_vv_u16m1_b16(__VA_ARGS__)
13220
#define vmadc_vx_u16m1_b16(...) __riscv_vmadc_vx_u16m1_b16(__VA_ARGS__)
13221
#define vmadc_vvm_u16m2_b8(...) __riscv_vmadc_vvm_u16m2_b8(__VA_ARGS__)
13222
#define vmadc_vxm_u16m2_b8(...) __riscv_vmadc_vxm_u16m2_b8(__VA_ARGS__)
13223
#define vmadc_vv_u16m2_b8(...) __riscv_vmadc_vv_u16m2_b8(__VA_ARGS__)
13224
#define vmadc_vx_u16m2_b8(...) __riscv_vmadc_vx_u16m2_b8(__VA_ARGS__)
13225
#define vmadc_vvm_u16m4_b4(...) __riscv_vmadc_vvm_u16m4_b4(__VA_ARGS__)
13226
#define vmadc_vxm_u16m4_b4(...) __riscv_vmadc_vxm_u16m4_b4(__VA_ARGS__)
13227
#define vmadc_vv_u16m4_b4(...) __riscv_vmadc_vv_u16m4_b4(__VA_ARGS__)
13228
#define vmadc_vx_u16m4_b4(...) __riscv_vmadc_vx_u16m4_b4(__VA_ARGS__)
13229
#define vmadc_vvm_u16m8_b2(...) __riscv_vmadc_vvm_u16m8_b2(__VA_ARGS__)
13230
#define vmadc_vxm_u16m8_b2(...) __riscv_vmadc_vxm_u16m8_b2(__VA_ARGS__)
13231
#define vmadc_vv_u16m8_b2(...) __riscv_vmadc_vv_u16m8_b2(__VA_ARGS__)
13232
#define vmadc_vx_u16m8_b2(...) __riscv_vmadc_vx_u16m8_b2(__VA_ARGS__)
13233
#define vmadc_vvm_u32mf2_b64(...) __riscv_vmadc_vvm_u32mf2_b64(__VA_ARGS__)
13234
#define vmadc_vxm_u32mf2_b64(...) __riscv_vmadc_vxm_u32mf2_b64(__VA_ARGS__)
13235
#define vmadc_vv_u32mf2_b64(...) __riscv_vmadc_vv_u32mf2_b64(__VA_ARGS__)
13236
#define vmadc_vx_u32mf2_b64(...) __riscv_vmadc_vx_u32mf2_b64(__VA_ARGS__)
13237
#define vmadc_vvm_u32m1_b32(...) __riscv_vmadc_vvm_u32m1_b32(__VA_ARGS__)
13238
#define vmadc_vxm_u32m1_b32(...) __riscv_vmadc_vxm_u32m1_b32(__VA_ARGS__)
13239
#define vmadc_vv_u32m1_b32(...) __riscv_vmadc_vv_u32m1_b32(__VA_ARGS__)
13240
#define vmadc_vx_u32m1_b32(...) __riscv_vmadc_vx_u32m1_b32(__VA_ARGS__)
13241
#define vmadc_vvm_u32m2_b16(...) __riscv_vmadc_vvm_u32m2_b16(__VA_ARGS__)
13242
#define vmadc_vxm_u32m2_b16(...) __riscv_vmadc_vxm_u32m2_b16(__VA_ARGS__)
13243
#define vmadc_vv_u32m2_b16(...) __riscv_vmadc_vv_u32m2_b16(__VA_ARGS__)
13244
#define vmadc_vx_u32m2_b16(...) __riscv_vmadc_vx_u32m2_b16(__VA_ARGS__)
13245
#define vmadc_vvm_u32m4_b8(...) __riscv_vmadc_vvm_u32m4_b8(__VA_ARGS__)
13246
#define vmadc_vxm_u32m4_b8(...) __riscv_vmadc_vxm_u32m4_b8(__VA_ARGS__)
13247
#define vmadc_vv_u32m4_b8(...) __riscv_vmadc_vv_u32m4_b8(__VA_ARGS__)
13248
#define vmadc_vx_u32m4_b8(...) __riscv_vmadc_vx_u32m4_b8(__VA_ARGS__)
13249
#define vmadc_vvm_u32m8_b4(...) __riscv_vmadc_vvm_u32m8_b4(__VA_ARGS__)
13250
#define vmadc_vxm_u32m8_b4(...) __riscv_vmadc_vxm_u32m8_b4(__VA_ARGS__)
13251
#define vmadc_vv_u32m8_b4(...) __riscv_vmadc_vv_u32m8_b4(__VA_ARGS__)
13252
#define vmadc_vx_u32m8_b4(...) __riscv_vmadc_vx_u32m8_b4(__VA_ARGS__)
13253
#define vmadc_vvm_u64m1_b64(...) __riscv_vmadc_vvm_u64m1_b64(__VA_ARGS__)
13254
#define vmadc_vxm_u64m1_b64(...) __riscv_vmadc_vxm_u64m1_b64(__VA_ARGS__)
13255
#define vmadc_vv_u64m1_b64(...) __riscv_vmadc_vv_u64m1_b64(__VA_ARGS__)
13256
#define vmadc_vx_u64m1_b64(...) __riscv_vmadc_vx_u64m1_b64(__VA_ARGS__)
13257
#define vmadc_vvm_u64m2_b32(...) __riscv_vmadc_vvm_u64m2_b32(__VA_ARGS__)
13258
#define vmadc_vxm_u64m2_b32(...) __riscv_vmadc_vxm_u64m2_b32(__VA_ARGS__)
13259
#define vmadc_vv_u64m2_b32(...) __riscv_vmadc_vv_u64m2_b32(__VA_ARGS__)
13260
#define vmadc_vx_u64m2_b32(...) __riscv_vmadc_vx_u64m2_b32(__VA_ARGS__)
13261
#define vmadc_vvm_u64m4_b16(...) __riscv_vmadc_vvm_u64m4_b16(__VA_ARGS__)
13262
#define vmadc_vxm_u64m4_b16(...) __riscv_vmadc_vxm_u64m4_b16(__VA_ARGS__)
13263
#define vmadc_vv_u64m4_b16(...) __riscv_vmadc_vv_u64m4_b16(__VA_ARGS__)
13264
#define vmadc_vx_u64m4_b16(...) __riscv_vmadc_vx_u64m4_b16(__VA_ARGS__)
13265
#define vmadc_vvm_u64m8_b8(...) __riscv_vmadc_vvm_u64m8_b8(__VA_ARGS__)
13266
#define vmadc_vxm_u64m8_b8(...) __riscv_vmadc_vxm_u64m8_b8(__VA_ARGS__)
13267
#define vmadc_vv_u64m8_b8(...) __riscv_vmadc_vv_u64m8_b8(__VA_ARGS__)
13268
#define vmadc_vx_u64m8_b8(...) __riscv_vmadc_vx_u64m8_b8(__VA_ARGS__)
13269
#define vmsbc_vvm_u8mf8_b64(...) __riscv_vmsbc_vvm_u8mf8_b64(__VA_ARGS__)
13270
#define vmsbc_vxm_u8mf8_b64(...) __riscv_vmsbc_vxm_u8mf8_b64(__VA_ARGS__)
13271
#define vmsbc_vv_u8mf8_b64(...) __riscv_vmsbc_vv_u8mf8_b64(__VA_ARGS__)
13272
#define vmsbc_vx_u8mf8_b64(...) __riscv_vmsbc_vx_u8mf8_b64(__VA_ARGS__)
13273
#define vmsbc_vvm_u8mf4_b32(...) __riscv_vmsbc_vvm_u8mf4_b32(__VA_ARGS__)
13274
#define vmsbc_vxm_u8mf4_b32(...) __riscv_vmsbc_vxm_u8mf4_b32(__VA_ARGS__)
13275
#define vmsbc_vv_u8mf4_b32(...) __riscv_vmsbc_vv_u8mf4_b32(__VA_ARGS__)
13276
#define vmsbc_vx_u8mf4_b32(...) __riscv_vmsbc_vx_u8mf4_b32(__VA_ARGS__)
13277
#define vmsbc_vvm_u8mf2_b16(...) __riscv_vmsbc_vvm_u8mf2_b16(__VA_ARGS__)
13278
#define vmsbc_vxm_u8mf2_b16(...) __riscv_vmsbc_vxm_u8mf2_b16(__VA_ARGS__)
13279
#define vmsbc_vv_u8mf2_b16(...) __riscv_vmsbc_vv_u8mf2_b16(__VA_ARGS__)
13280
#define vmsbc_vx_u8mf2_b16(...) __riscv_vmsbc_vx_u8mf2_b16(__VA_ARGS__)
13281
#define vmsbc_vvm_u8m1_b8(...) __riscv_vmsbc_vvm_u8m1_b8(__VA_ARGS__)
13282
#define vmsbc_vxm_u8m1_b8(...) __riscv_vmsbc_vxm_u8m1_b8(__VA_ARGS__)
13283
#define vmsbc_vv_u8m1_b8(...) __riscv_vmsbc_vv_u8m1_b8(__VA_ARGS__)
13284
#define vmsbc_vx_u8m1_b8(...) __riscv_vmsbc_vx_u8m1_b8(__VA_ARGS__)
13285
#define vmsbc_vvm_u8m2_b4(...) __riscv_vmsbc_vvm_u8m2_b4(__VA_ARGS__)
13286
#define vmsbc_vxm_u8m2_b4(...) __riscv_vmsbc_vxm_u8m2_b4(__VA_ARGS__)
13287
#define vmsbc_vv_u8m2_b4(...) __riscv_vmsbc_vv_u8m2_b4(__VA_ARGS__)
13288
#define vmsbc_vx_u8m2_b4(...) __riscv_vmsbc_vx_u8m2_b4(__VA_ARGS__)
13289
#define vmsbc_vvm_u8m4_b2(...) __riscv_vmsbc_vvm_u8m4_b2(__VA_ARGS__)
13290
#define vmsbc_vxm_u8m4_b2(...) __riscv_vmsbc_vxm_u8m4_b2(__VA_ARGS__)
13291
#define vmsbc_vv_u8m4_b2(...) __riscv_vmsbc_vv_u8m4_b2(__VA_ARGS__)
13292
#define vmsbc_vx_u8m4_b2(...) __riscv_vmsbc_vx_u8m4_b2(__VA_ARGS__)
13293
#define vmsbc_vvm_u8m8_b1(...) __riscv_vmsbc_vvm_u8m8_b1(__VA_ARGS__)
13294
#define vmsbc_vxm_u8m8_b1(...) __riscv_vmsbc_vxm_u8m8_b1(__VA_ARGS__)
13295
#define vmsbc_vv_u8m8_b1(...) __riscv_vmsbc_vv_u8m8_b1(__VA_ARGS__)
13296
#define vmsbc_vx_u8m8_b1(...) __riscv_vmsbc_vx_u8m8_b1(__VA_ARGS__)
13297
#define vmsbc_vvm_u16mf4_b64(...) __riscv_vmsbc_vvm_u16mf4_b64(__VA_ARGS__)
13298
#define vmsbc_vxm_u16mf4_b64(...) __riscv_vmsbc_vxm_u16mf4_b64(__VA_ARGS__)
13299
#define vmsbc_vv_u16mf4_b64(...) __riscv_vmsbc_vv_u16mf4_b64(__VA_ARGS__)
13300
#define vmsbc_vx_u16mf4_b64(...) __riscv_vmsbc_vx_u16mf4_b64(__VA_ARGS__)
13301
#define vmsbc_vvm_u16mf2_b32(...) __riscv_vmsbc_vvm_u16mf2_b32(__VA_ARGS__)
13302
#define vmsbc_vxm_u16mf2_b32(...) __riscv_vmsbc_vxm_u16mf2_b32(__VA_ARGS__)
13303
#define vmsbc_vv_u16mf2_b32(...) __riscv_vmsbc_vv_u16mf2_b32(__VA_ARGS__)
13304
#define vmsbc_vx_u16mf2_b32(...) __riscv_vmsbc_vx_u16mf2_b32(__VA_ARGS__)
13305
#define vmsbc_vvm_u16m1_b16(...) __riscv_vmsbc_vvm_u16m1_b16(__VA_ARGS__)
13306
#define vmsbc_vxm_u16m1_b16(...) __riscv_vmsbc_vxm_u16m1_b16(__VA_ARGS__)
13307
#define vmsbc_vv_u16m1_b16(...) __riscv_vmsbc_vv_u16m1_b16(__VA_ARGS__)
13308
#define vmsbc_vx_u16m1_b16(...) __riscv_vmsbc_vx_u16m1_b16(__VA_ARGS__)
13309
#define vmsbc_vvm_u16m2_b8(...) __riscv_vmsbc_vvm_u16m2_b8(__VA_ARGS__)
13310
#define vmsbc_vxm_u16m2_b8(...) __riscv_vmsbc_vxm_u16m2_b8(__VA_ARGS__)
13311
#define vmsbc_vv_u16m2_b8(...) __riscv_vmsbc_vv_u16m2_b8(__VA_ARGS__)
13312
#define vmsbc_vx_u16m2_b8(...) __riscv_vmsbc_vx_u16m2_b8(__VA_ARGS__)
13313
#define vmsbc_vvm_u16m4_b4(...) __riscv_vmsbc_vvm_u16m4_b4(__VA_ARGS__)
13314
#define vmsbc_vxm_u16m4_b4(...) __riscv_vmsbc_vxm_u16m4_b4(__VA_ARGS__)
13315
#define vmsbc_vv_u16m4_b4(...) __riscv_vmsbc_vv_u16m4_b4(__VA_ARGS__)
13316
#define vmsbc_vx_u16m4_b4(...) __riscv_vmsbc_vx_u16m4_b4(__VA_ARGS__)
13317
#define vmsbc_vvm_u16m8_b2(...) __riscv_vmsbc_vvm_u16m8_b2(__VA_ARGS__)
13318
#define vmsbc_vxm_u16m8_b2(...) __riscv_vmsbc_vxm_u16m8_b2(__VA_ARGS__)
13319
#define vmsbc_vv_u16m8_b2(...) __riscv_vmsbc_vv_u16m8_b2(__VA_ARGS__)
13320
#define vmsbc_vx_u16m8_b2(...) __riscv_vmsbc_vx_u16m8_b2(__VA_ARGS__)
13321
#define vmsbc_vvm_u32mf2_b64(...) __riscv_vmsbc_vvm_u32mf2_b64(__VA_ARGS__)
13322
#define vmsbc_vxm_u32mf2_b64(...) __riscv_vmsbc_vxm_u32mf2_b64(__VA_ARGS__)
13323
#define vmsbc_vv_u32mf2_b64(...) __riscv_vmsbc_vv_u32mf2_b64(__VA_ARGS__)
13324
#define vmsbc_vx_u32mf2_b64(...) __riscv_vmsbc_vx_u32mf2_b64(__VA_ARGS__)
13325
#define vmsbc_vvm_u32m1_b32(...) __riscv_vmsbc_vvm_u32m1_b32(__VA_ARGS__)
13326
#define vmsbc_vxm_u32m1_b32(...) __riscv_vmsbc_vxm_u32m1_b32(__VA_ARGS__)
13327
#define vmsbc_vv_u32m1_b32(...) __riscv_vmsbc_vv_u32m1_b32(__VA_ARGS__)
13328
#define vmsbc_vx_u32m1_b32(...) __riscv_vmsbc_vx_u32m1_b32(__VA_ARGS__)
13329
#define vmsbc_vvm_u32m2_b16(...) __riscv_vmsbc_vvm_u32m2_b16(__VA_ARGS__)
13330
#define vmsbc_vxm_u32m2_b16(...) __riscv_vmsbc_vxm_u32m2_b16(__VA_ARGS__)
13331
#define vmsbc_vv_u32m2_b16(...) __riscv_vmsbc_vv_u32m2_b16(__VA_ARGS__)
13332
#define vmsbc_vx_u32m2_b16(...) __riscv_vmsbc_vx_u32m2_b16(__VA_ARGS__)
13333
#define vmsbc_vvm_u32m4_b8(...) __riscv_vmsbc_vvm_u32m4_b8(__VA_ARGS__)
13334
#define vmsbc_vxm_u32m4_b8(...) __riscv_vmsbc_vxm_u32m4_b8(__VA_ARGS__)
13335
#define vmsbc_vv_u32m4_b8(...) __riscv_vmsbc_vv_u32m4_b8(__VA_ARGS__)
13336
#define vmsbc_vx_u32m4_b8(...) __riscv_vmsbc_vx_u32m4_b8(__VA_ARGS__)
13337
#define vmsbc_vvm_u32m8_b4(...) __riscv_vmsbc_vvm_u32m8_b4(__VA_ARGS__)
13338
#define vmsbc_vxm_u32m8_b4(...) __riscv_vmsbc_vxm_u32m8_b4(__VA_ARGS__)
13339
#define vmsbc_vv_u32m8_b4(...) __riscv_vmsbc_vv_u32m8_b4(__VA_ARGS__)
13340
#define vmsbc_vx_u32m8_b4(...) __riscv_vmsbc_vx_u32m8_b4(__VA_ARGS__)
13341
#define vmsbc_vvm_u64m1_b64(...) __riscv_vmsbc_vvm_u64m1_b64(__VA_ARGS__)
13342
#define vmsbc_vxm_u64m1_b64(...) __riscv_vmsbc_vxm_u64m1_b64(__VA_ARGS__)
13343
#define vmsbc_vv_u64m1_b64(...) __riscv_vmsbc_vv_u64m1_b64(__VA_ARGS__)
13344
#define vmsbc_vx_u64m1_b64(...) __riscv_vmsbc_vx_u64m1_b64(__VA_ARGS__)
13345
#define vmsbc_vvm_u64m2_b32(...) __riscv_vmsbc_vvm_u64m2_b32(__VA_ARGS__)
13346
#define vmsbc_vxm_u64m2_b32(...) __riscv_vmsbc_vxm_u64m2_b32(__VA_ARGS__)
13347
#define vmsbc_vv_u64m2_b32(...) __riscv_vmsbc_vv_u64m2_b32(__VA_ARGS__)
13348
#define vmsbc_vx_u64m2_b32(...) __riscv_vmsbc_vx_u64m2_b32(__VA_ARGS__)
13349
#define vmsbc_vvm_u64m4_b16(...) __riscv_vmsbc_vvm_u64m4_b16(__VA_ARGS__)
13350
#define vmsbc_vxm_u64m4_b16(...) __riscv_vmsbc_vxm_u64m4_b16(__VA_ARGS__)
13351
#define vmsbc_vv_u64m4_b16(...) __riscv_vmsbc_vv_u64m4_b16(__VA_ARGS__)
13352
#define vmsbc_vx_u64m4_b16(...) __riscv_vmsbc_vx_u64m4_b16(__VA_ARGS__)
13353
#define vmsbc_vvm_u64m8_b8(...) __riscv_vmsbc_vvm_u64m8_b8(__VA_ARGS__)
13354
#define vmsbc_vxm_u64m8_b8(...) __riscv_vmsbc_vxm_u64m8_b8(__VA_ARGS__)
13355
#define vmsbc_vv_u64m8_b8(...) __riscv_vmsbc_vv_u64m8_b8(__VA_ARGS__)
13356
#define vmsbc_vx_u64m8_b8(...) __riscv_vmsbc_vx_u64m8_b8(__VA_ARGS__)
13357
#define vand_vv_i8mf8(...) __riscv_vand_vv_i8mf8(__VA_ARGS__)
13358
#define vand_vx_i8mf8(...) __riscv_vand_vx_i8mf8(__VA_ARGS__)
13359
#define vand_vv_i8mf4(...) __riscv_vand_vv_i8mf4(__VA_ARGS__)
13360
#define vand_vx_i8mf4(...) __riscv_vand_vx_i8mf4(__VA_ARGS__)
13361
#define vand_vv_i8mf2(...) __riscv_vand_vv_i8mf2(__VA_ARGS__)
13362
#define vand_vx_i8mf2(...) __riscv_vand_vx_i8mf2(__VA_ARGS__)
13363
#define vand_vv_i8m1(...) __riscv_vand_vv_i8m1(__VA_ARGS__)
13364
#define vand_vx_i8m1(...) __riscv_vand_vx_i8m1(__VA_ARGS__)
13365
#define vand_vv_i8m2(...) __riscv_vand_vv_i8m2(__VA_ARGS__)
13366
#define vand_vx_i8m2(...) __riscv_vand_vx_i8m2(__VA_ARGS__)
13367
#define vand_vv_i8m4(...) __riscv_vand_vv_i8m4(__VA_ARGS__)
13368
#define vand_vx_i8m4(...) __riscv_vand_vx_i8m4(__VA_ARGS__)
13369
#define vand_vv_i8m8(...) __riscv_vand_vv_i8m8(__VA_ARGS__)
13370
#define vand_vx_i8m8(...) __riscv_vand_vx_i8m8(__VA_ARGS__)
13371
#define vand_vv_i16mf4(...) __riscv_vand_vv_i16mf4(__VA_ARGS__)
13372
#define vand_vx_i16mf4(...) __riscv_vand_vx_i16mf4(__VA_ARGS__)
13373
#define vand_vv_i16mf2(...) __riscv_vand_vv_i16mf2(__VA_ARGS__)
13374
#define vand_vx_i16mf2(...) __riscv_vand_vx_i16mf2(__VA_ARGS__)
13375
#define vand_vv_i16m1(...) __riscv_vand_vv_i16m1(__VA_ARGS__)
13376
#define vand_vx_i16m1(...) __riscv_vand_vx_i16m1(__VA_ARGS__)
13377
#define vand_vv_i16m2(...) __riscv_vand_vv_i16m2(__VA_ARGS__)
13378
#define vand_vx_i16m2(...) __riscv_vand_vx_i16m2(__VA_ARGS__)
13379
#define vand_vv_i16m4(...) __riscv_vand_vv_i16m4(__VA_ARGS__)
13380
#define vand_vx_i16m4(...) __riscv_vand_vx_i16m4(__VA_ARGS__)
13381
#define vand_vv_i16m8(...) __riscv_vand_vv_i16m8(__VA_ARGS__)
13382
#define vand_vx_i16m8(...) __riscv_vand_vx_i16m8(__VA_ARGS__)
13383
#define vand_vv_i32mf2(...) __riscv_vand_vv_i32mf2(__VA_ARGS__)
13384
#define vand_vx_i32mf2(...) __riscv_vand_vx_i32mf2(__VA_ARGS__)
13385
#define vand_vv_i32m1(...) __riscv_vand_vv_i32m1(__VA_ARGS__)
13386
#define vand_vx_i32m1(...) __riscv_vand_vx_i32m1(__VA_ARGS__)
13387
#define vand_vv_i32m2(...) __riscv_vand_vv_i32m2(__VA_ARGS__)
13388
#define vand_vx_i32m2(...) __riscv_vand_vx_i32m2(__VA_ARGS__)
13389
#define vand_vv_i32m4(...) __riscv_vand_vv_i32m4(__VA_ARGS__)
13390
#define vand_vx_i32m4(...) __riscv_vand_vx_i32m4(__VA_ARGS__)
13391
#define vand_vv_i32m8(...) __riscv_vand_vv_i32m8(__VA_ARGS__)
13392
#define vand_vx_i32m8(...) __riscv_vand_vx_i32m8(__VA_ARGS__)
13393
#define vand_vv_i64m1(...) __riscv_vand_vv_i64m1(__VA_ARGS__)
13394
#define vand_vx_i64m1(...) __riscv_vand_vx_i64m1(__VA_ARGS__)
13395
#define vand_vv_i64m2(...) __riscv_vand_vv_i64m2(__VA_ARGS__)
13396
#define vand_vx_i64m2(...) __riscv_vand_vx_i64m2(__VA_ARGS__)
13397
#define vand_vv_i64m4(...) __riscv_vand_vv_i64m4(__VA_ARGS__)
13398
#define vand_vx_i64m4(...) __riscv_vand_vx_i64m4(__VA_ARGS__)
13399
#define vand_vv_i64m8(...) __riscv_vand_vv_i64m8(__VA_ARGS__)
13400
#define vand_vx_i64m8(...) __riscv_vand_vx_i64m8(__VA_ARGS__)
13401
#define vor_vv_i8mf8(...) __riscv_vor_vv_i8mf8(__VA_ARGS__)
13402
#define vor_vx_i8mf8(...) __riscv_vor_vx_i8mf8(__VA_ARGS__)
13403
#define vor_vv_i8mf4(...) __riscv_vor_vv_i8mf4(__VA_ARGS__)
13404
#define vor_vx_i8mf4(...) __riscv_vor_vx_i8mf4(__VA_ARGS__)
13405
#define vor_vv_i8mf2(...) __riscv_vor_vv_i8mf2(__VA_ARGS__)
13406
#define vor_vx_i8mf2(...) __riscv_vor_vx_i8mf2(__VA_ARGS__)
13407
#define vor_vv_i8m1(...) __riscv_vor_vv_i8m1(__VA_ARGS__)
13408
#define vor_vx_i8m1(...) __riscv_vor_vx_i8m1(__VA_ARGS__)
13409
#define vor_vv_i8m2(...) __riscv_vor_vv_i8m2(__VA_ARGS__)
13410
#define vor_vx_i8m2(...) __riscv_vor_vx_i8m2(__VA_ARGS__)
13411
#define vor_vv_i8m4(...) __riscv_vor_vv_i8m4(__VA_ARGS__)
13412
#define vor_vx_i8m4(...) __riscv_vor_vx_i8m4(__VA_ARGS__)
13413
#define vor_vv_i8m8(...) __riscv_vor_vv_i8m8(__VA_ARGS__)
13414
#define vor_vx_i8m8(...) __riscv_vor_vx_i8m8(__VA_ARGS__)
13415
#define vor_vv_i16mf4(...) __riscv_vor_vv_i16mf4(__VA_ARGS__)
13416
#define vor_vx_i16mf4(...) __riscv_vor_vx_i16mf4(__VA_ARGS__)
13417
#define vor_vv_i16mf2(...) __riscv_vor_vv_i16mf2(__VA_ARGS__)
13418
#define vor_vx_i16mf2(...) __riscv_vor_vx_i16mf2(__VA_ARGS__)
13419
#define vor_vv_i16m1(...) __riscv_vor_vv_i16m1(__VA_ARGS__)
13420
#define vor_vx_i16m1(...) __riscv_vor_vx_i16m1(__VA_ARGS__)
13421
#define vor_vv_i16m2(...) __riscv_vor_vv_i16m2(__VA_ARGS__)
13422
#define vor_vx_i16m2(...) __riscv_vor_vx_i16m2(__VA_ARGS__)
13423
#define vor_vv_i16m4(...) __riscv_vor_vv_i16m4(__VA_ARGS__)
13424
#define vor_vx_i16m4(...) __riscv_vor_vx_i16m4(__VA_ARGS__)
13425
#define vor_vv_i16m8(...) __riscv_vor_vv_i16m8(__VA_ARGS__)
13426
#define vor_vx_i16m8(...) __riscv_vor_vx_i16m8(__VA_ARGS__)
13427
#define vor_vv_i32mf2(...) __riscv_vor_vv_i32mf2(__VA_ARGS__)
13428
#define vor_vx_i32mf2(...) __riscv_vor_vx_i32mf2(__VA_ARGS__)
13429
#define vor_vv_i32m1(...) __riscv_vor_vv_i32m1(__VA_ARGS__)
13430
#define vor_vx_i32m1(...) __riscv_vor_vx_i32m1(__VA_ARGS__)
13431
#define vor_vv_i32m2(...) __riscv_vor_vv_i32m2(__VA_ARGS__)
13432
#define vor_vx_i32m2(...) __riscv_vor_vx_i32m2(__VA_ARGS__)
13433
#define vor_vv_i32m4(...) __riscv_vor_vv_i32m4(__VA_ARGS__)
13434
#define vor_vx_i32m4(...) __riscv_vor_vx_i32m4(__VA_ARGS__)
13435
#define vor_vv_i32m8(...) __riscv_vor_vv_i32m8(__VA_ARGS__)
13436
#define vor_vx_i32m8(...) __riscv_vor_vx_i32m8(__VA_ARGS__)
13437
#define vor_vv_i64m1(...) __riscv_vor_vv_i64m1(__VA_ARGS__)
13438
#define vor_vx_i64m1(...) __riscv_vor_vx_i64m1(__VA_ARGS__)
13439
#define vor_vv_i64m2(...) __riscv_vor_vv_i64m2(__VA_ARGS__)
13440
#define vor_vx_i64m2(...) __riscv_vor_vx_i64m2(__VA_ARGS__)
13441
#define vor_vv_i64m4(...) __riscv_vor_vv_i64m4(__VA_ARGS__)
13442
#define vor_vx_i64m4(...) __riscv_vor_vx_i64m4(__VA_ARGS__)
13443
#define vor_vv_i64m8(...) __riscv_vor_vv_i64m8(__VA_ARGS__)
13444
#define vor_vx_i64m8(...) __riscv_vor_vx_i64m8(__VA_ARGS__)
13445
#define vxor_vv_i8mf8(...) __riscv_vxor_vv_i8mf8(__VA_ARGS__)
13446
#define vxor_vx_i8mf8(...) __riscv_vxor_vx_i8mf8(__VA_ARGS__)
13447
#define vxor_vv_i8mf4(...) __riscv_vxor_vv_i8mf4(__VA_ARGS__)
13448
#define vxor_vx_i8mf4(...) __riscv_vxor_vx_i8mf4(__VA_ARGS__)
13449
#define vxor_vv_i8mf2(...) __riscv_vxor_vv_i8mf2(__VA_ARGS__)
13450
#define vxor_vx_i8mf2(...) __riscv_vxor_vx_i8mf2(__VA_ARGS__)
13451
#define vxor_vv_i8m1(...) __riscv_vxor_vv_i8m1(__VA_ARGS__)
13452
#define vxor_vx_i8m1(...) __riscv_vxor_vx_i8m1(__VA_ARGS__)
13453
#define vxor_vv_i8m2(...) __riscv_vxor_vv_i8m2(__VA_ARGS__)
13454
#define vxor_vx_i8m2(...) __riscv_vxor_vx_i8m2(__VA_ARGS__)
13455
#define vxor_vv_i8m4(...) __riscv_vxor_vv_i8m4(__VA_ARGS__)
13456
#define vxor_vx_i8m4(...) __riscv_vxor_vx_i8m4(__VA_ARGS__)
13457
#define vxor_vv_i8m8(...) __riscv_vxor_vv_i8m8(__VA_ARGS__)
13458
#define vxor_vx_i8m8(...) __riscv_vxor_vx_i8m8(__VA_ARGS__)
13459
#define vxor_vv_i16mf4(...) __riscv_vxor_vv_i16mf4(__VA_ARGS__)
13460
#define vxor_vx_i16mf4(...) __riscv_vxor_vx_i16mf4(__VA_ARGS__)
13461
#define vxor_vv_i16mf2(...) __riscv_vxor_vv_i16mf2(__VA_ARGS__)
13462
#define vxor_vx_i16mf2(...) __riscv_vxor_vx_i16mf2(__VA_ARGS__)
13463
#define vxor_vv_i16m1(...) __riscv_vxor_vv_i16m1(__VA_ARGS__)
13464
#define vxor_vx_i16m1(...) __riscv_vxor_vx_i16m1(__VA_ARGS__)
13465
#define vxor_vv_i16m2(...) __riscv_vxor_vv_i16m2(__VA_ARGS__)
13466
#define vxor_vx_i16m2(...) __riscv_vxor_vx_i16m2(__VA_ARGS__)
13467
#define vxor_vv_i16m4(...) __riscv_vxor_vv_i16m4(__VA_ARGS__)
13468
#define vxor_vx_i16m4(...) __riscv_vxor_vx_i16m4(__VA_ARGS__)
13469
#define vxor_vv_i16m8(...) __riscv_vxor_vv_i16m8(__VA_ARGS__)
13470
#define vxor_vx_i16m8(...) __riscv_vxor_vx_i16m8(__VA_ARGS__)
13471
#define vxor_vv_i32mf2(...) __riscv_vxor_vv_i32mf2(__VA_ARGS__)
13472
#define vxor_vx_i32mf2(...) __riscv_vxor_vx_i32mf2(__VA_ARGS__)
13473
#define vxor_vv_i32m1(...) __riscv_vxor_vv_i32m1(__VA_ARGS__)
13474
#define vxor_vx_i32m1(...) __riscv_vxor_vx_i32m1(__VA_ARGS__)
13475
#define vxor_vv_i32m2(...) __riscv_vxor_vv_i32m2(__VA_ARGS__)
13476
#define vxor_vx_i32m2(...) __riscv_vxor_vx_i32m2(__VA_ARGS__)
13477
#define vxor_vv_i32m4(...) __riscv_vxor_vv_i32m4(__VA_ARGS__)
13478
#define vxor_vx_i32m4(...) __riscv_vxor_vx_i32m4(__VA_ARGS__)
13479
#define vxor_vv_i32m8(...) __riscv_vxor_vv_i32m8(__VA_ARGS__)
13480
#define vxor_vx_i32m8(...) __riscv_vxor_vx_i32m8(__VA_ARGS__)
13481
#define vxor_vv_i64m1(...) __riscv_vxor_vv_i64m1(__VA_ARGS__)
13482
#define vxor_vx_i64m1(...) __riscv_vxor_vx_i64m1(__VA_ARGS__)
13483
#define vxor_vv_i64m2(...) __riscv_vxor_vv_i64m2(__VA_ARGS__)
13484
#define vxor_vx_i64m2(...) __riscv_vxor_vx_i64m2(__VA_ARGS__)
13485
#define vxor_vv_i64m4(...) __riscv_vxor_vv_i64m4(__VA_ARGS__)
13486
#define vxor_vx_i64m4(...) __riscv_vxor_vx_i64m4(__VA_ARGS__)
13487
#define vxor_vv_i64m8(...) __riscv_vxor_vv_i64m8(__VA_ARGS__)
13488
#define vxor_vx_i64m8(...) __riscv_vxor_vx_i64m8(__VA_ARGS__)
13489
#define vand_vv_u8mf8(...) __riscv_vand_vv_u8mf8(__VA_ARGS__)
13490
#define vand_vx_u8mf8(...) __riscv_vand_vx_u8mf8(__VA_ARGS__)
13491
#define vand_vv_u8mf4(...) __riscv_vand_vv_u8mf4(__VA_ARGS__)
13492
#define vand_vx_u8mf4(...) __riscv_vand_vx_u8mf4(__VA_ARGS__)
13493
#define vand_vv_u8mf2(...) __riscv_vand_vv_u8mf2(__VA_ARGS__)
13494
#define vand_vx_u8mf2(...) __riscv_vand_vx_u8mf2(__VA_ARGS__)
13495
#define vand_vv_u8m1(...) __riscv_vand_vv_u8m1(__VA_ARGS__)
13496
#define vand_vx_u8m1(...) __riscv_vand_vx_u8m1(__VA_ARGS__)
13497
#define vand_vv_u8m2(...) __riscv_vand_vv_u8m2(__VA_ARGS__)
13498
#define vand_vx_u8m2(...) __riscv_vand_vx_u8m2(__VA_ARGS__)
13499
#define vand_vv_u8m4(...) __riscv_vand_vv_u8m4(__VA_ARGS__)
13500
#define vand_vx_u8m4(...) __riscv_vand_vx_u8m4(__VA_ARGS__)
13501
#define vand_vv_u8m8(...) __riscv_vand_vv_u8m8(__VA_ARGS__)
13502
#define vand_vx_u8m8(...) __riscv_vand_vx_u8m8(__VA_ARGS__)
13503
#define vand_vv_u16mf4(...) __riscv_vand_vv_u16mf4(__VA_ARGS__)
13504
#define vand_vx_u16mf4(...) __riscv_vand_vx_u16mf4(__VA_ARGS__)
13505
#define vand_vv_u16mf2(...) __riscv_vand_vv_u16mf2(__VA_ARGS__)
13506
#define vand_vx_u16mf2(...) __riscv_vand_vx_u16mf2(__VA_ARGS__)
13507
#define vand_vv_u16m1(...) __riscv_vand_vv_u16m1(__VA_ARGS__)
13508
#define vand_vx_u16m1(...) __riscv_vand_vx_u16m1(__VA_ARGS__)
13509
#define vand_vv_u16m2(...) __riscv_vand_vv_u16m2(__VA_ARGS__)
13510
#define vand_vx_u16m2(...) __riscv_vand_vx_u16m2(__VA_ARGS__)
13511
#define vand_vv_u16m4(...) __riscv_vand_vv_u16m4(__VA_ARGS__)
13512
#define vand_vx_u16m4(...) __riscv_vand_vx_u16m4(__VA_ARGS__)
13513
#define vand_vv_u16m8(...) __riscv_vand_vv_u16m8(__VA_ARGS__)
13514
#define vand_vx_u16m8(...) __riscv_vand_vx_u16m8(__VA_ARGS__)
13515
#define vand_vv_u32mf2(...) __riscv_vand_vv_u32mf2(__VA_ARGS__)
13516
#define vand_vx_u32mf2(...) __riscv_vand_vx_u32mf2(__VA_ARGS__)
13517
#define vand_vv_u32m1(...) __riscv_vand_vv_u32m1(__VA_ARGS__)
13518
#define vand_vx_u32m1(...) __riscv_vand_vx_u32m1(__VA_ARGS__)
13519
#define vand_vv_u32m2(...) __riscv_vand_vv_u32m2(__VA_ARGS__)
13520
#define vand_vx_u32m2(...) __riscv_vand_vx_u32m2(__VA_ARGS__)
13521
#define vand_vv_u32m4(...) __riscv_vand_vv_u32m4(__VA_ARGS__)
13522
#define vand_vx_u32m4(...) __riscv_vand_vx_u32m4(__VA_ARGS__)
13523
#define vand_vv_u32m8(...) __riscv_vand_vv_u32m8(__VA_ARGS__)
13524
#define vand_vx_u32m8(...) __riscv_vand_vx_u32m8(__VA_ARGS__)
13525
#define vand_vv_u64m1(...) __riscv_vand_vv_u64m1(__VA_ARGS__)
13526
#define vand_vx_u64m1(...) __riscv_vand_vx_u64m1(__VA_ARGS__)
13527
#define vand_vv_u64m2(...) __riscv_vand_vv_u64m2(__VA_ARGS__)
13528
#define vand_vx_u64m2(...) __riscv_vand_vx_u64m2(__VA_ARGS__)
13529
#define vand_vv_u64m4(...) __riscv_vand_vv_u64m4(__VA_ARGS__)
13530
#define vand_vx_u64m4(...) __riscv_vand_vx_u64m4(__VA_ARGS__)
13531
#define vand_vv_u64m8(...) __riscv_vand_vv_u64m8(__VA_ARGS__)
13532
#define vand_vx_u64m8(...) __riscv_vand_vx_u64m8(__VA_ARGS__)
13533
#define vor_vv_u8mf8(...) __riscv_vor_vv_u8mf8(__VA_ARGS__)
13534
#define vor_vx_u8mf8(...) __riscv_vor_vx_u8mf8(__VA_ARGS__)
13535
#define vor_vv_u8mf4(...) __riscv_vor_vv_u8mf4(__VA_ARGS__)
13536
#define vor_vx_u8mf4(...) __riscv_vor_vx_u8mf4(__VA_ARGS__)
13537
#define vor_vv_u8mf2(...) __riscv_vor_vv_u8mf2(__VA_ARGS__)
13538
#define vor_vx_u8mf2(...) __riscv_vor_vx_u8mf2(__VA_ARGS__)
13539
#define vor_vv_u8m1(...) __riscv_vor_vv_u8m1(__VA_ARGS__)
13540
#define vor_vx_u8m1(...) __riscv_vor_vx_u8m1(__VA_ARGS__)
13541
#define vor_vv_u8m2(...) __riscv_vor_vv_u8m2(__VA_ARGS__)
13542
#define vor_vx_u8m2(...) __riscv_vor_vx_u8m2(__VA_ARGS__)
13543
#define vor_vv_u8m4(...) __riscv_vor_vv_u8m4(__VA_ARGS__)
13544
#define vor_vx_u8m4(...) __riscv_vor_vx_u8m4(__VA_ARGS__)
13545
#define vor_vv_u8m8(...) __riscv_vor_vv_u8m8(__VA_ARGS__)
13546
#define vor_vx_u8m8(...) __riscv_vor_vx_u8m8(__VA_ARGS__)
13547
#define vor_vv_u16mf4(...) __riscv_vor_vv_u16mf4(__VA_ARGS__)
13548
#define vor_vx_u16mf4(...) __riscv_vor_vx_u16mf4(__VA_ARGS__)
13549
#define vor_vv_u16mf2(...) __riscv_vor_vv_u16mf2(__VA_ARGS__)
13550
#define vor_vx_u16mf2(...) __riscv_vor_vx_u16mf2(__VA_ARGS__)
13551
#define vor_vv_u16m1(...) __riscv_vor_vv_u16m1(__VA_ARGS__)
13552
#define vor_vx_u16m1(...) __riscv_vor_vx_u16m1(__VA_ARGS__)
13553
#define vor_vv_u16m2(...) __riscv_vor_vv_u16m2(__VA_ARGS__)
13554
#define vor_vx_u16m2(...) __riscv_vor_vx_u16m2(__VA_ARGS__)
13555
#define vor_vv_u16m4(...) __riscv_vor_vv_u16m4(__VA_ARGS__)
13556
#define vor_vx_u16m4(...) __riscv_vor_vx_u16m4(__VA_ARGS__)
13557
#define vor_vv_u16m8(...) __riscv_vor_vv_u16m8(__VA_ARGS__)
13558
#define vor_vx_u16m8(...) __riscv_vor_vx_u16m8(__VA_ARGS__)
13559
#define vor_vv_u32mf2(...) __riscv_vor_vv_u32mf2(__VA_ARGS__)
13560
#define vor_vx_u32mf2(...) __riscv_vor_vx_u32mf2(__VA_ARGS__)
13561
#define vor_vv_u32m1(...) __riscv_vor_vv_u32m1(__VA_ARGS__)
13562
#define vor_vx_u32m1(...) __riscv_vor_vx_u32m1(__VA_ARGS__)
13563
#define vor_vv_u32m2(...) __riscv_vor_vv_u32m2(__VA_ARGS__)
13564
#define vor_vx_u32m2(...) __riscv_vor_vx_u32m2(__VA_ARGS__)
13565
#define vor_vv_u32m4(...) __riscv_vor_vv_u32m4(__VA_ARGS__)
13566
#define vor_vx_u32m4(...) __riscv_vor_vx_u32m4(__VA_ARGS__)
13567
#define vor_vv_u32m8(...) __riscv_vor_vv_u32m8(__VA_ARGS__)
13568
#define vor_vx_u32m8(...) __riscv_vor_vx_u32m8(__VA_ARGS__)
13569
#define vor_vv_u64m1(...) __riscv_vor_vv_u64m1(__VA_ARGS__)
13570
#define vor_vx_u64m1(...) __riscv_vor_vx_u64m1(__VA_ARGS__)
13571
#define vor_vv_u64m2(...) __riscv_vor_vv_u64m2(__VA_ARGS__)
13572
#define vor_vx_u64m2(...) __riscv_vor_vx_u64m2(__VA_ARGS__)
13573
#define vor_vv_u64m4(...) __riscv_vor_vv_u64m4(__VA_ARGS__)
13574
#define vor_vx_u64m4(...) __riscv_vor_vx_u64m4(__VA_ARGS__)
13575
#define vor_vv_u64m8(...) __riscv_vor_vv_u64m8(__VA_ARGS__)
13576
#define vor_vx_u64m8(...) __riscv_vor_vx_u64m8(__VA_ARGS__)
13577
#define vxor_vv_u8mf8(...) __riscv_vxor_vv_u8mf8(__VA_ARGS__)
13578
#define vxor_vx_u8mf8(...) __riscv_vxor_vx_u8mf8(__VA_ARGS__)
13579
#define vxor_vv_u8mf4(...) __riscv_vxor_vv_u8mf4(__VA_ARGS__)
13580
#define vxor_vx_u8mf4(...) __riscv_vxor_vx_u8mf4(__VA_ARGS__)
13581
#define vxor_vv_u8mf2(...) __riscv_vxor_vv_u8mf2(__VA_ARGS__)
13582
#define vxor_vx_u8mf2(...) __riscv_vxor_vx_u8mf2(__VA_ARGS__)
13583
#define vxor_vv_u8m1(...) __riscv_vxor_vv_u8m1(__VA_ARGS__)
13584
#define vxor_vx_u8m1(...) __riscv_vxor_vx_u8m1(__VA_ARGS__)
13585
#define vxor_vv_u8m2(...) __riscv_vxor_vv_u8m2(__VA_ARGS__)
13586
#define vxor_vx_u8m2(...) __riscv_vxor_vx_u8m2(__VA_ARGS__)
13587
#define vxor_vv_u8m4(...) __riscv_vxor_vv_u8m4(__VA_ARGS__)
13588
#define vxor_vx_u8m4(...) __riscv_vxor_vx_u8m4(__VA_ARGS__)
13589
#define vxor_vv_u8m8(...) __riscv_vxor_vv_u8m8(__VA_ARGS__)
13590
#define vxor_vx_u8m8(...) __riscv_vxor_vx_u8m8(__VA_ARGS__)
13591
#define vxor_vv_u16mf4(...) __riscv_vxor_vv_u16mf4(__VA_ARGS__)
13592
#define vxor_vx_u16mf4(...) __riscv_vxor_vx_u16mf4(__VA_ARGS__)
13593
#define vxor_vv_u16mf2(...) __riscv_vxor_vv_u16mf2(__VA_ARGS__)
13594
#define vxor_vx_u16mf2(...) __riscv_vxor_vx_u16mf2(__VA_ARGS__)
13595
#define vxor_vv_u16m1(...) __riscv_vxor_vv_u16m1(__VA_ARGS__)
13596
#define vxor_vx_u16m1(...) __riscv_vxor_vx_u16m1(__VA_ARGS__)
13597
#define vxor_vv_u16m2(...) __riscv_vxor_vv_u16m2(__VA_ARGS__)
13598
#define vxor_vx_u16m2(...) __riscv_vxor_vx_u16m2(__VA_ARGS__)
13599
#define vxor_vv_u16m4(...) __riscv_vxor_vv_u16m4(__VA_ARGS__)
13600
#define vxor_vx_u16m4(...) __riscv_vxor_vx_u16m4(__VA_ARGS__)
13601
#define vxor_vv_u16m8(...) __riscv_vxor_vv_u16m8(__VA_ARGS__)
13602
#define vxor_vx_u16m8(...) __riscv_vxor_vx_u16m8(__VA_ARGS__)
13603
#define vxor_vv_u32mf2(...) __riscv_vxor_vv_u32mf2(__VA_ARGS__)
13604
#define vxor_vx_u32mf2(...) __riscv_vxor_vx_u32mf2(__VA_ARGS__)
13605
#define vxor_vv_u32m1(...) __riscv_vxor_vv_u32m1(__VA_ARGS__)
13606
#define vxor_vx_u32m1(...) __riscv_vxor_vx_u32m1(__VA_ARGS__)
13607
#define vxor_vv_u32m2(...) __riscv_vxor_vv_u32m2(__VA_ARGS__)
13608
#define vxor_vx_u32m2(...) __riscv_vxor_vx_u32m2(__VA_ARGS__)
13609
#define vxor_vv_u32m4(...) __riscv_vxor_vv_u32m4(__VA_ARGS__)
13610
#define vxor_vx_u32m4(...) __riscv_vxor_vx_u32m4(__VA_ARGS__)
13611
#define vxor_vv_u32m8(...) __riscv_vxor_vv_u32m8(__VA_ARGS__)
13612
#define vxor_vx_u32m8(...) __riscv_vxor_vx_u32m8(__VA_ARGS__)
13613
#define vxor_vv_u64m1(...) __riscv_vxor_vv_u64m1(__VA_ARGS__)
13614
#define vxor_vx_u64m1(...) __riscv_vxor_vx_u64m1(__VA_ARGS__)
13615
#define vxor_vv_u64m2(...) __riscv_vxor_vv_u64m2(__VA_ARGS__)
13616
#define vxor_vx_u64m2(...) __riscv_vxor_vx_u64m2(__VA_ARGS__)
13617
#define vxor_vv_u64m4(...) __riscv_vxor_vv_u64m4(__VA_ARGS__)
13618
#define vxor_vx_u64m4(...) __riscv_vxor_vx_u64m4(__VA_ARGS__)
13619
#define vxor_vv_u64m8(...) __riscv_vxor_vv_u64m8(__VA_ARGS__)
13620
#define vxor_vx_u64m8(...) __riscv_vxor_vx_u64m8(__VA_ARGS__)
13621
// masked functions
13622
#define vand_vv_i8mf8_m(...) __riscv_vand_vv_i8mf8_tumu(__VA_ARGS__)
13623
#define vand_vx_i8mf8_m(...) __riscv_vand_vx_i8mf8_tumu(__VA_ARGS__)
13624
#define vand_vv_i8mf4_m(...) __riscv_vand_vv_i8mf4_tumu(__VA_ARGS__)
13625
#define vand_vx_i8mf4_m(...) __riscv_vand_vx_i8mf4_tumu(__VA_ARGS__)
13626
#define vand_vv_i8mf2_m(...) __riscv_vand_vv_i8mf2_tumu(__VA_ARGS__)
13627
#define vand_vx_i8mf2_m(...) __riscv_vand_vx_i8mf2_tumu(__VA_ARGS__)
13628
#define vand_vv_i8m1_m(...) __riscv_vand_vv_i8m1_tumu(__VA_ARGS__)
13629
#define vand_vx_i8m1_m(...) __riscv_vand_vx_i8m1_tumu(__VA_ARGS__)
13630
#define vand_vv_i8m2_m(...) __riscv_vand_vv_i8m2_tumu(__VA_ARGS__)
13631
#define vand_vx_i8m2_m(...) __riscv_vand_vx_i8m2_tumu(__VA_ARGS__)
13632
#define vand_vv_i8m4_m(...) __riscv_vand_vv_i8m4_tumu(__VA_ARGS__)
13633
#define vand_vx_i8m4_m(...) __riscv_vand_vx_i8m4_tumu(__VA_ARGS__)
13634
#define vand_vv_i8m8_m(...) __riscv_vand_vv_i8m8_tumu(__VA_ARGS__)
13635
#define vand_vx_i8m8_m(...) __riscv_vand_vx_i8m8_tumu(__VA_ARGS__)
13636
#define vand_vv_i16mf4_m(...) __riscv_vand_vv_i16mf4_tumu(__VA_ARGS__)
13637
#define vand_vx_i16mf4_m(...) __riscv_vand_vx_i16mf4_tumu(__VA_ARGS__)
13638
#define vand_vv_i16mf2_m(...) __riscv_vand_vv_i16mf2_tumu(__VA_ARGS__)
13639
#define vand_vx_i16mf2_m(...) __riscv_vand_vx_i16mf2_tumu(__VA_ARGS__)
13640
#define vand_vv_i16m1_m(...) __riscv_vand_vv_i16m1_tumu(__VA_ARGS__)
13641
#define vand_vx_i16m1_m(...) __riscv_vand_vx_i16m1_tumu(__VA_ARGS__)
13642
#define vand_vv_i16m2_m(...) __riscv_vand_vv_i16m2_tumu(__VA_ARGS__)
13643
#define vand_vx_i16m2_m(...) __riscv_vand_vx_i16m2_tumu(__VA_ARGS__)
13644
#define vand_vv_i16m4_m(...) __riscv_vand_vv_i16m4_tumu(__VA_ARGS__)
13645
#define vand_vx_i16m4_m(...) __riscv_vand_vx_i16m4_tumu(__VA_ARGS__)
13646
#define vand_vv_i16m8_m(...) __riscv_vand_vv_i16m8_tumu(__VA_ARGS__)
13647
#define vand_vx_i16m8_m(...) __riscv_vand_vx_i16m8_tumu(__VA_ARGS__)
13648
#define vand_vv_i32mf2_m(...) __riscv_vand_vv_i32mf2_tumu(__VA_ARGS__)
13649
#define vand_vx_i32mf2_m(...) __riscv_vand_vx_i32mf2_tumu(__VA_ARGS__)
13650
#define vand_vv_i32m1_m(...) __riscv_vand_vv_i32m1_tumu(__VA_ARGS__)
13651
#define vand_vx_i32m1_m(...) __riscv_vand_vx_i32m1_tumu(__VA_ARGS__)
13652
#define vand_vv_i32m2_m(...) __riscv_vand_vv_i32m2_tumu(__VA_ARGS__)
13653
#define vand_vx_i32m2_m(...) __riscv_vand_vx_i32m2_tumu(__VA_ARGS__)
13654
#define vand_vv_i32m4_m(...) __riscv_vand_vv_i32m4_tumu(__VA_ARGS__)
13655
#define vand_vx_i32m4_m(...) __riscv_vand_vx_i32m4_tumu(__VA_ARGS__)
13656
#define vand_vv_i32m8_m(...) __riscv_vand_vv_i32m8_tumu(__VA_ARGS__)
13657
#define vand_vx_i32m8_m(...) __riscv_vand_vx_i32m8_tumu(__VA_ARGS__)
13658
#define vand_vv_i64m1_m(...) __riscv_vand_vv_i64m1_tumu(__VA_ARGS__)
13659
#define vand_vx_i64m1_m(...) __riscv_vand_vx_i64m1_tumu(__VA_ARGS__)
13660
#define vand_vv_i64m2_m(...) __riscv_vand_vv_i64m2_tumu(__VA_ARGS__)
13661
#define vand_vx_i64m2_m(...) __riscv_vand_vx_i64m2_tumu(__VA_ARGS__)
13662
#define vand_vv_i64m4_m(...) __riscv_vand_vv_i64m4_tumu(__VA_ARGS__)
13663
#define vand_vx_i64m4_m(...) __riscv_vand_vx_i64m4_tumu(__VA_ARGS__)
13664
#define vand_vv_i64m8_m(...) __riscv_vand_vv_i64m8_tumu(__VA_ARGS__)
13665
#define vand_vx_i64m8_m(...) __riscv_vand_vx_i64m8_tumu(__VA_ARGS__)
13666
#define vor_vv_i8mf8_m(...) __riscv_vor_vv_i8mf8_tumu(__VA_ARGS__)
13667
#define vor_vx_i8mf8_m(...) __riscv_vor_vx_i8mf8_tumu(__VA_ARGS__)
13668
#define vor_vv_i8mf4_m(...) __riscv_vor_vv_i8mf4_tumu(__VA_ARGS__)
13669
#define vor_vx_i8mf4_m(...) __riscv_vor_vx_i8mf4_tumu(__VA_ARGS__)
13670
#define vor_vv_i8mf2_m(...) __riscv_vor_vv_i8mf2_tumu(__VA_ARGS__)
13671
#define vor_vx_i8mf2_m(...) __riscv_vor_vx_i8mf2_tumu(__VA_ARGS__)
13672
#define vor_vv_i8m1_m(...) __riscv_vor_vv_i8m1_tumu(__VA_ARGS__)
13673
#define vor_vx_i8m1_m(...) __riscv_vor_vx_i8m1_tumu(__VA_ARGS__)
13674
#define vor_vv_i8m2_m(...) __riscv_vor_vv_i8m2_tumu(__VA_ARGS__)
13675
#define vor_vx_i8m2_m(...) __riscv_vor_vx_i8m2_tumu(__VA_ARGS__)
13676
#define vor_vv_i8m4_m(...) __riscv_vor_vv_i8m4_tumu(__VA_ARGS__)
13677
#define vor_vx_i8m4_m(...) __riscv_vor_vx_i8m4_tumu(__VA_ARGS__)
13678
#define vor_vv_i8m8_m(...) __riscv_vor_vv_i8m8_tumu(__VA_ARGS__)
13679
#define vor_vx_i8m8_m(...) __riscv_vor_vx_i8m8_tumu(__VA_ARGS__)
13680
#define vor_vv_i16mf4_m(...) __riscv_vor_vv_i16mf4_tumu(__VA_ARGS__)
13681
#define vor_vx_i16mf4_m(...) __riscv_vor_vx_i16mf4_tumu(__VA_ARGS__)
13682
#define vor_vv_i16mf2_m(...) __riscv_vor_vv_i16mf2_tumu(__VA_ARGS__)
13683
#define vor_vx_i16mf2_m(...) __riscv_vor_vx_i16mf2_tumu(__VA_ARGS__)
13684
#define vor_vv_i16m1_m(...) __riscv_vor_vv_i16m1_tumu(__VA_ARGS__)
13685
#define vor_vx_i16m1_m(...) __riscv_vor_vx_i16m1_tumu(__VA_ARGS__)
13686
#define vor_vv_i16m2_m(...) __riscv_vor_vv_i16m2_tumu(__VA_ARGS__)
13687
#define vor_vx_i16m2_m(...) __riscv_vor_vx_i16m2_tumu(__VA_ARGS__)
13688
#define vor_vv_i16m4_m(...) __riscv_vor_vv_i16m4_tumu(__VA_ARGS__)
13689
#define vor_vx_i16m4_m(...) __riscv_vor_vx_i16m4_tumu(__VA_ARGS__)
13690
#define vor_vv_i16m8_m(...) __riscv_vor_vv_i16m8_tumu(__VA_ARGS__)
13691
#define vor_vx_i16m8_m(...) __riscv_vor_vx_i16m8_tumu(__VA_ARGS__)
13692
#define vor_vv_i32mf2_m(...) __riscv_vor_vv_i32mf2_tumu(__VA_ARGS__)
13693
#define vor_vx_i32mf2_m(...) __riscv_vor_vx_i32mf2_tumu(__VA_ARGS__)
13694
#define vor_vv_i32m1_m(...) __riscv_vor_vv_i32m1_tumu(__VA_ARGS__)
13695
#define vor_vx_i32m1_m(...) __riscv_vor_vx_i32m1_tumu(__VA_ARGS__)
13696
#define vor_vv_i32m2_m(...) __riscv_vor_vv_i32m2_tumu(__VA_ARGS__)
13697
#define vor_vx_i32m2_m(...) __riscv_vor_vx_i32m2_tumu(__VA_ARGS__)
13698
#define vor_vv_i32m4_m(...) __riscv_vor_vv_i32m4_tumu(__VA_ARGS__)
13699
#define vor_vx_i32m4_m(...) __riscv_vor_vx_i32m4_tumu(__VA_ARGS__)
13700
#define vor_vv_i32m8_m(...) __riscv_vor_vv_i32m8_tumu(__VA_ARGS__)
13701
#define vor_vx_i32m8_m(...) __riscv_vor_vx_i32m8_tumu(__VA_ARGS__)
13702
#define vor_vv_i64m1_m(...) __riscv_vor_vv_i64m1_tumu(__VA_ARGS__)
13703
#define vor_vx_i64m1_m(...) __riscv_vor_vx_i64m1_tumu(__VA_ARGS__)
13704
#define vor_vv_i64m2_m(...) __riscv_vor_vv_i64m2_tumu(__VA_ARGS__)
13705
#define vor_vx_i64m2_m(...) __riscv_vor_vx_i64m2_tumu(__VA_ARGS__)
13706
#define vor_vv_i64m4_m(...) __riscv_vor_vv_i64m4_tumu(__VA_ARGS__)
13707
#define vor_vx_i64m4_m(...) __riscv_vor_vx_i64m4_tumu(__VA_ARGS__)
13708
#define vor_vv_i64m8_m(...) __riscv_vor_vv_i64m8_tumu(__VA_ARGS__)
13709
#define vor_vx_i64m8_m(...) __riscv_vor_vx_i64m8_tumu(__VA_ARGS__)
13710
#define vxor_vv_i8mf8_m(...) __riscv_vxor_vv_i8mf8_tumu(__VA_ARGS__)
13711
#define vxor_vx_i8mf8_m(...) __riscv_vxor_vx_i8mf8_tumu(__VA_ARGS__)
13712
#define vxor_vv_i8mf4_m(...) __riscv_vxor_vv_i8mf4_tumu(__VA_ARGS__)
13713
#define vxor_vx_i8mf4_m(...) __riscv_vxor_vx_i8mf4_tumu(__VA_ARGS__)
13714
#define vxor_vv_i8mf2_m(...) __riscv_vxor_vv_i8mf2_tumu(__VA_ARGS__)
13715
#define vxor_vx_i8mf2_m(...) __riscv_vxor_vx_i8mf2_tumu(__VA_ARGS__)
13716
#define vxor_vv_i8m1_m(...) __riscv_vxor_vv_i8m1_tumu(__VA_ARGS__)
13717
#define vxor_vx_i8m1_m(...) __riscv_vxor_vx_i8m1_tumu(__VA_ARGS__)
13718
#define vxor_vv_i8m2_m(...) __riscv_vxor_vv_i8m2_tumu(__VA_ARGS__)
13719
#define vxor_vx_i8m2_m(...) __riscv_vxor_vx_i8m2_tumu(__VA_ARGS__)
13720
#define vxor_vv_i8m4_m(...) __riscv_vxor_vv_i8m4_tumu(__VA_ARGS__)
13721
#define vxor_vx_i8m4_m(...) __riscv_vxor_vx_i8m4_tumu(__VA_ARGS__)
13722
#define vxor_vv_i8m8_m(...) __riscv_vxor_vv_i8m8_tumu(__VA_ARGS__)
13723
#define vxor_vx_i8m8_m(...) __riscv_vxor_vx_i8m8_tumu(__VA_ARGS__)
13724
#define vxor_vv_i16mf4_m(...) __riscv_vxor_vv_i16mf4_tumu(__VA_ARGS__)
13725
#define vxor_vx_i16mf4_m(...) __riscv_vxor_vx_i16mf4_tumu(__VA_ARGS__)
13726
#define vxor_vv_i16mf2_m(...) __riscv_vxor_vv_i16mf2_tumu(__VA_ARGS__)
13727
#define vxor_vx_i16mf2_m(...) __riscv_vxor_vx_i16mf2_tumu(__VA_ARGS__)
13728
#define vxor_vv_i16m1_m(...) __riscv_vxor_vv_i16m1_tumu(__VA_ARGS__)
13729
#define vxor_vx_i16m1_m(...) __riscv_vxor_vx_i16m1_tumu(__VA_ARGS__)
13730
#define vxor_vv_i16m2_m(...) __riscv_vxor_vv_i16m2_tumu(__VA_ARGS__)
13731
#define vxor_vx_i16m2_m(...) __riscv_vxor_vx_i16m2_tumu(__VA_ARGS__)
13732
#define vxor_vv_i16m4_m(...) __riscv_vxor_vv_i16m4_tumu(__VA_ARGS__)
13733
#define vxor_vx_i16m4_m(...) __riscv_vxor_vx_i16m4_tumu(__VA_ARGS__)
13734
#define vxor_vv_i16m8_m(...) __riscv_vxor_vv_i16m8_tumu(__VA_ARGS__)
13735
#define vxor_vx_i16m8_m(...) __riscv_vxor_vx_i16m8_tumu(__VA_ARGS__)
13736
#define vxor_vv_i32mf2_m(...) __riscv_vxor_vv_i32mf2_tumu(__VA_ARGS__)
13737
#define vxor_vx_i32mf2_m(...) __riscv_vxor_vx_i32mf2_tumu(__VA_ARGS__)
13738
#define vxor_vv_i32m1_m(...) __riscv_vxor_vv_i32m1_tumu(__VA_ARGS__)
13739
#define vxor_vx_i32m1_m(...) __riscv_vxor_vx_i32m1_tumu(__VA_ARGS__)
13740
#define vxor_vv_i32m2_m(...) __riscv_vxor_vv_i32m2_tumu(__VA_ARGS__)
13741
#define vxor_vx_i32m2_m(...) __riscv_vxor_vx_i32m2_tumu(__VA_ARGS__)
13742
#define vxor_vv_i32m4_m(...) __riscv_vxor_vv_i32m4_tumu(__VA_ARGS__)
13743
#define vxor_vx_i32m4_m(...) __riscv_vxor_vx_i32m4_tumu(__VA_ARGS__)
13744
#define vxor_vv_i32m8_m(...) __riscv_vxor_vv_i32m8_tumu(__VA_ARGS__)
13745
#define vxor_vx_i32m8_m(...) __riscv_vxor_vx_i32m8_tumu(__VA_ARGS__)
13746
#define vxor_vv_i64m1_m(...) __riscv_vxor_vv_i64m1_tumu(__VA_ARGS__)
13747
#define vxor_vx_i64m1_m(...) __riscv_vxor_vx_i64m1_tumu(__VA_ARGS__)
13748
#define vxor_vv_i64m2_m(...) __riscv_vxor_vv_i64m2_tumu(__VA_ARGS__)
13749
#define vxor_vx_i64m2_m(...) __riscv_vxor_vx_i64m2_tumu(__VA_ARGS__)
13750
#define vxor_vv_i64m4_m(...) __riscv_vxor_vv_i64m4_tumu(__VA_ARGS__)
13751
#define vxor_vx_i64m4_m(...) __riscv_vxor_vx_i64m4_tumu(__VA_ARGS__)
13752
#define vxor_vv_i64m8_m(...) __riscv_vxor_vv_i64m8_tumu(__VA_ARGS__)
13753
#define vxor_vx_i64m8_m(...) __riscv_vxor_vx_i64m8_tumu(__VA_ARGS__)
13754
#define vand_vv_u8mf8_m(...) __riscv_vand_vv_u8mf8_tumu(__VA_ARGS__)
13755
#define vand_vx_u8mf8_m(...) __riscv_vand_vx_u8mf8_tumu(__VA_ARGS__)
13756
#define vand_vv_u8mf4_m(...) __riscv_vand_vv_u8mf4_tumu(__VA_ARGS__)
13757
#define vand_vx_u8mf4_m(...) __riscv_vand_vx_u8mf4_tumu(__VA_ARGS__)
13758
#define vand_vv_u8mf2_m(...) __riscv_vand_vv_u8mf2_tumu(__VA_ARGS__)
13759
#define vand_vx_u8mf2_m(...) __riscv_vand_vx_u8mf2_tumu(__VA_ARGS__)
13760
#define vand_vv_u8m1_m(...) __riscv_vand_vv_u8m1_tumu(__VA_ARGS__)
13761
#define vand_vx_u8m1_m(...) __riscv_vand_vx_u8m1_tumu(__VA_ARGS__)
13762
#define vand_vv_u8m2_m(...) __riscv_vand_vv_u8m2_tumu(__VA_ARGS__)
13763
#define vand_vx_u8m2_m(...) __riscv_vand_vx_u8m2_tumu(__VA_ARGS__)
13764
#define vand_vv_u8m4_m(...) __riscv_vand_vv_u8m4_tumu(__VA_ARGS__)
13765
#define vand_vx_u8m4_m(...) __riscv_vand_vx_u8m4_tumu(__VA_ARGS__)
13766
#define vand_vv_u8m8_m(...) __riscv_vand_vv_u8m8_tumu(__VA_ARGS__)
13767
#define vand_vx_u8m8_m(...) __riscv_vand_vx_u8m8_tumu(__VA_ARGS__)
13768
#define vand_vv_u16mf4_m(...) __riscv_vand_vv_u16mf4_tumu(__VA_ARGS__)
13769
#define vand_vx_u16mf4_m(...) __riscv_vand_vx_u16mf4_tumu(__VA_ARGS__)
13770
#define vand_vv_u16mf2_m(...) __riscv_vand_vv_u16mf2_tumu(__VA_ARGS__)
13771
#define vand_vx_u16mf2_m(...) __riscv_vand_vx_u16mf2_tumu(__VA_ARGS__)
13772
#define vand_vv_u16m1_m(...) __riscv_vand_vv_u16m1_tumu(__VA_ARGS__)
13773
#define vand_vx_u16m1_m(...) __riscv_vand_vx_u16m1_tumu(__VA_ARGS__)
13774
#define vand_vv_u16m2_m(...) __riscv_vand_vv_u16m2_tumu(__VA_ARGS__)
13775
#define vand_vx_u16m2_m(...) __riscv_vand_vx_u16m2_tumu(__VA_ARGS__)
13776
#define vand_vv_u16m4_m(...) __riscv_vand_vv_u16m4_tumu(__VA_ARGS__)
13777
#define vand_vx_u16m4_m(...) __riscv_vand_vx_u16m4_tumu(__VA_ARGS__)
13778
#define vand_vv_u16m8_m(...) __riscv_vand_vv_u16m8_tumu(__VA_ARGS__)
13779
#define vand_vx_u16m8_m(...) __riscv_vand_vx_u16m8_tumu(__VA_ARGS__)
13780
#define vand_vv_u32mf2_m(...) __riscv_vand_vv_u32mf2_tumu(__VA_ARGS__)
13781
#define vand_vx_u32mf2_m(...) __riscv_vand_vx_u32mf2_tumu(__VA_ARGS__)
13782
#define vand_vv_u32m1_m(...) __riscv_vand_vv_u32m1_tumu(__VA_ARGS__)
13783
#define vand_vx_u32m1_m(...) __riscv_vand_vx_u32m1_tumu(__VA_ARGS__)
13784
#define vand_vv_u32m2_m(...) __riscv_vand_vv_u32m2_tumu(__VA_ARGS__)
13785
#define vand_vx_u32m2_m(...) __riscv_vand_vx_u32m2_tumu(__VA_ARGS__)
13786
#define vand_vv_u32m4_m(...) __riscv_vand_vv_u32m4_tumu(__VA_ARGS__)
13787
#define vand_vx_u32m4_m(...) __riscv_vand_vx_u32m4_tumu(__VA_ARGS__)
13788
#define vand_vv_u32m8_m(...) __riscv_vand_vv_u32m8_tumu(__VA_ARGS__)
13789
#define vand_vx_u32m8_m(...) __riscv_vand_vx_u32m8_tumu(__VA_ARGS__)
13790
#define vand_vv_u64m1_m(...) __riscv_vand_vv_u64m1_tumu(__VA_ARGS__)
13791
#define vand_vx_u64m1_m(...) __riscv_vand_vx_u64m1_tumu(__VA_ARGS__)
13792
#define vand_vv_u64m2_m(...) __riscv_vand_vv_u64m2_tumu(__VA_ARGS__)
13793
#define vand_vx_u64m2_m(...) __riscv_vand_vx_u64m2_tumu(__VA_ARGS__)
13794
#define vand_vv_u64m4_m(...) __riscv_vand_vv_u64m4_tumu(__VA_ARGS__)
13795
#define vand_vx_u64m4_m(...) __riscv_vand_vx_u64m4_tumu(__VA_ARGS__)
13796
#define vand_vv_u64m8_m(...) __riscv_vand_vv_u64m8_tumu(__VA_ARGS__)
13797
#define vand_vx_u64m8_m(...) __riscv_vand_vx_u64m8_tumu(__VA_ARGS__)
13798
#define vor_vv_u8mf8_m(...) __riscv_vor_vv_u8mf8_tumu(__VA_ARGS__)
13799
#define vor_vx_u8mf8_m(...) __riscv_vor_vx_u8mf8_tumu(__VA_ARGS__)
13800
#define vor_vv_u8mf4_m(...) __riscv_vor_vv_u8mf4_tumu(__VA_ARGS__)
13801
#define vor_vx_u8mf4_m(...) __riscv_vor_vx_u8mf4_tumu(__VA_ARGS__)
13802
#define vor_vv_u8mf2_m(...) __riscv_vor_vv_u8mf2_tumu(__VA_ARGS__)
13803
#define vor_vx_u8mf2_m(...) __riscv_vor_vx_u8mf2_tumu(__VA_ARGS__)
13804
#define vor_vv_u8m1_m(...) __riscv_vor_vv_u8m1_tumu(__VA_ARGS__)
13805
#define vor_vx_u8m1_m(...) __riscv_vor_vx_u8m1_tumu(__VA_ARGS__)
13806
#define vor_vv_u8m2_m(...) __riscv_vor_vv_u8m2_tumu(__VA_ARGS__)
13807
#define vor_vx_u8m2_m(...) __riscv_vor_vx_u8m2_tumu(__VA_ARGS__)
13808
#define vor_vv_u8m4_m(...) __riscv_vor_vv_u8m4_tumu(__VA_ARGS__)
13809
#define vor_vx_u8m4_m(...) __riscv_vor_vx_u8m4_tumu(__VA_ARGS__)
13810
#define vor_vv_u8m8_m(...) __riscv_vor_vv_u8m8_tumu(__VA_ARGS__)
13811
#define vor_vx_u8m8_m(...) __riscv_vor_vx_u8m8_tumu(__VA_ARGS__)
13812
#define vor_vv_u16mf4_m(...) __riscv_vor_vv_u16mf4_tumu(__VA_ARGS__)
13813
#define vor_vx_u16mf4_m(...) __riscv_vor_vx_u16mf4_tumu(__VA_ARGS__)
13814
#define vor_vv_u16mf2_m(...) __riscv_vor_vv_u16mf2_tumu(__VA_ARGS__)
13815
#define vor_vx_u16mf2_m(...) __riscv_vor_vx_u16mf2_tumu(__VA_ARGS__)
13816
#define vor_vv_u16m1_m(...) __riscv_vor_vv_u16m1_tumu(__VA_ARGS__)
13817
#define vor_vx_u16m1_m(...) __riscv_vor_vx_u16m1_tumu(__VA_ARGS__)
13818
#define vor_vv_u16m2_m(...) __riscv_vor_vv_u16m2_tumu(__VA_ARGS__)
13819
#define vor_vx_u16m2_m(...) __riscv_vor_vx_u16m2_tumu(__VA_ARGS__)
13820
#define vor_vv_u16m4_m(...) __riscv_vor_vv_u16m4_tumu(__VA_ARGS__)
13821
#define vor_vx_u16m4_m(...) __riscv_vor_vx_u16m4_tumu(__VA_ARGS__)
13822
#define vor_vv_u16m8_m(...) __riscv_vor_vv_u16m8_tumu(__VA_ARGS__)
13823
#define vor_vx_u16m8_m(...) __riscv_vor_vx_u16m8_tumu(__VA_ARGS__)
13824
#define vor_vv_u32mf2_m(...) __riscv_vor_vv_u32mf2_tumu(__VA_ARGS__)
13825
#define vor_vx_u32mf2_m(...) __riscv_vor_vx_u32mf2_tumu(__VA_ARGS__)
13826
#define vor_vv_u32m1_m(...) __riscv_vor_vv_u32m1_tumu(__VA_ARGS__)
13827
#define vor_vx_u32m1_m(...) __riscv_vor_vx_u32m1_tumu(__VA_ARGS__)
13828
#define vor_vv_u32m2_m(...) __riscv_vor_vv_u32m2_tumu(__VA_ARGS__)
13829
#define vor_vx_u32m2_m(...) __riscv_vor_vx_u32m2_tumu(__VA_ARGS__)
13830
#define vor_vv_u32m4_m(...) __riscv_vor_vv_u32m4_tumu(__VA_ARGS__)
13831
#define vor_vx_u32m4_m(...) __riscv_vor_vx_u32m4_tumu(__VA_ARGS__)
13832
#define vor_vv_u32m8_m(...) __riscv_vor_vv_u32m8_tumu(__VA_ARGS__)
13833
#define vor_vx_u32m8_m(...) __riscv_vor_vx_u32m8_tumu(__VA_ARGS__)
13834
#define vor_vv_u64m1_m(...) __riscv_vor_vv_u64m1_tumu(__VA_ARGS__)
13835
#define vor_vx_u64m1_m(...) __riscv_vor_vx_u64m1_tumu(__VA_ARGS__)
13836
#define vor_vv_u64m2_m(...) __riscv_vor_vv_u64m2_tumu(__VA_ARGS__)
13837
#define vor_vx_u64m2_m(...) __riscv_vor_vx_u64m2_tumu(__VA_ARGS__)
13838
#define vor_vv_u64m4_m(...) __riscv_vor_vv_u64m4_tumu(__VA_ARGS__)
13839
#define vor_vx_u64m4_m(...) __riscv_vor_vx_u64m4_tumu(__VA_ARGS__)
13840
#define vor_vv_u64m8_m(...) __riscv_vor_vv_u64m8_tumu(__VA_ARGS__)
13841
#define vor_vx_u64m8_m(...) __riscv_vor_vx_u64m8_tumu(__VA_ARGS__)
13842
#define vxor_vv_u8mf8_m(...) __riscv_vxor_vv_u8mf8_tumu(__VA_ARGS__)
13843
#define vxor_vx_u8mf8_m(...) __riscv_vxor_vx_u8mf8_tumu(__VA_ARGS__)
13844
#define vxor_vv_u8mf4_m(...) __riscv_vxor_vv_u8mf4_tumu(__VA_ARGS__)
13845
#define vxor_vx_u8mf4_m(...) __riscv_vxor_vx_u8mf4_tumu(__VA_ARGS__)
13846
#define vxor_vv_u8mf2_m(...) __riscv_vxor_vv_u8mf2_tumu(__VA_ARGS__)
13847
#define vxor_vx_u8mf2_m(...) __riscv_vxor_vx_u8mf2_tumu(__VA_ARGS__)
13848
#define vxor_vv_u8m1_m(...) __riscv_vxor_vv_u8m1_tumu(__VA_ARGS__)
13849
#define vxor_vx_u8m1_m(...) __riscv_vxor_vx_u8m1_tumu(__VA_ARGS__)
13850
#define vxor_vv_u8m2_m(...) __riscv_vxor_vv_u8m2_tumu(__VA_ARGS__)
13851
#define vxor_vx_u8m2_m(...) __riscv_vxor_vx_u8m2_tumu(__VA_ARGS__)
13852
#define vxor_vv_u8m4_m(...) __riscv_vxor_vv_u8m4_tumu(__VA_ARGS__)
13853
#define vxor_vx_u8m4_m(...) __riscv_vxor_vx_u8m4_tumu(__VA_ARGS__)
13854
#define vxor_vv_u8m8_m(...) __riscv_vxor_vv_u8m8_tumu(__VA_ARGS__)
13855
#define vxor_vx_u8m8_m(...) __riscv_vxor_vx_u8m8_tumu(__VA_ARGS__)
13856
#define vxor_vv_u16mf4_m(...) __riscv_vxor_vv_u16mf4_tumu(__VA_ARGS__)
13857
#define vxor_vx_u16mf4_m(...) __riscv_vxor_vx_u16mf4_tumu(__VA_ARGS__)
13858
#define vxor_vv_u16mf2_m(...) __riscv_vxor_vv_u16mf2_tumu(__VA_ARGS__)
13859
#define vxor_vx_u16mf2_m(...) __riscv_vxor_vx_u16mf2_tumu(__VA_ARGS__)
13860
#define vxor_vv_u16m1_m(...) __riscv_vxor_vv_u16m1_tumu(__VA_ARGS__)
13861
#define vxor_vx_u16m1_m(...) __riscv_vxor_vx_u16m1_tumu(__VA_ARGS__)
13862
#define vxor_vv_u16m2_m(...) __riscv_vxor_vv_u16m2_tumu(__VA_ARGS__)
13863
#define vxor_vx_u16m2_m(...) __riscv_vxor_vx_u16m2_tumu(__VA_ARGS__)
13864
#define vxor_vv_u16m4_m(...) __riscv_vxor_vv_u16m4_tumu(__VA_ARGS__)
13865
#define vxor_vx_u16m4_m(...) __riscv_vxor_vx_u16m4_tumu(__VA_ARGS__)
13866
#define vxor_vv_u16m8_m(...) __riscv_vxor_vv_u16m8_tumu(__VA_ARGS__)
13867
#define vxor_vx_u16m8_m(...) __riscv_vxor_vx_u16m8_tumu(__VA_ARGS__)
13868
#define vxor_vv_u32mf2_m(...) __riscv_vxor_vv_u32mf2_tumu(__VA_ARGS__)
13869
#define vxor_vx_u32mf2_m(...) __riscv_vxor_vx_u32mf2_tumu(__VA_ARGS__)
13870
#define vxor_vv_u32m1_m(...) __riscv_vxor_vv_u32m1_tumu(__VA_ARGS__)
13871
#define vxor_vx_u32m1_m(...) __riscv_vxor_vx_u32m1_tumu(__VA_ARGS__)
13872
#define vxor_vv_u32m2_m(...) __riscv_vxor_vv_u32m2_tumu(__VA_ARGS__)
13873
#define vxor_vx_u32m2_m(...) __riscv_vxor_vx_u32m2_tumu(__VA_ARGS__)
13874
#define vxor_vv_u32m4_m(...) __riscv_vxor_vv_u32m4_tumu(__VA_ARGS__)
13875
#define vxor_vx_u32m4_m(...) __riscv_vxor_vx_u32m4_tumu(__VA_ARGS__)
13876
#define vxor_vv_u32m8_m(...) __riscv_vxor_vv_u32m8_tumu(__VA_ARGS__)
13877
#define vxor_vx_u32m8_m(...) __riscv_vxor_vx_u32m8_tumu(__VA_ARGS__)
13878
#define vxor_vv_u64m1_m(...) __riscv_vxor_vv_u64m1_tumu(__VA_ARGS__)
13879
#define vxor_vx_u64m1_m(...) __riscv_vxor_vx_u64m1_tumu(__VA_ARGS__)
13880
#define vxor_vv_u64m2_m(...) __riscv_vxor_vv_u64m2_tumu(__VA_ARGS__)
13881
#define vxor_vx_u64m2_m(...) __riscv_vxor_vx_u64m2_tumu(__VA_ARGS__)
13882
#define vxor_vv_u64m4_m(...) __riscv_vxor_vv_u64m4_tumu(__VA_ARGS__)
13883
#define vxor_vx_u64m4_m(...) __riscv_vxor_vx_u64m4_tumu(__VA_ARGS__)
13884
#define vxor_vv_u64m8_m(...) __riscv_vxor_vv_u64m8_tumu(__VA_ARGS__)
13885
#define vxor_vx_u64m8_m(...) __riscv_vxor_vx_u64m8_tumu(__VA_ARGS__)
13886
#define vnot_v_i8mf8(...) __riscv_vnot_v_i8mf8(__VA_ARGS__)
13887
#define vnot_v_i8mf4(...) __riscv_vnot_v_i8mf4(__VA_ARGS__)
13888
#define vnot_v_i8mf2(...) __riscv_vnot_v_i8mf2(__VA_ARGS__)
13889
#define vnot_v_i8m1(...) __riscv_vnot_v_i8m1(__VA_ARGS__)
13890
#define vnot_v_i8m2(...) __riscv_vnot_v_i8m2(__VA_ARGS__)
13891
#define vnot_v_i8m4(...) __riscv_vnot_v_i8m4(__VA_ARGS__)
13892
#define vnot_v_i8m8(...) __riscv_vnot_v_i8m8(__VA_ARGS__)
13893
#define vnot_v_i16mf4(...) __riscv_vnot_v_i16mf4(__VA_ARGS__)
13894
#define vnot_v_i16mf2(...) __riscv_vnot_v_i16mf2(__VA_ARGS__)
13895
#define vnot_v_i16m1(...) __riscv_vnot_v_i16m1(__VA_ARGS__)
13896
#define vnot_v_i16m2(...) __riscv_vnot_v_i16m2(__VA_ARGS__)
13897
#define vnot_v_i16m4(...) __riscv_vnot_v_i16m4(__VA_ARGS__)
13898
#define vnot_v_i16m8(...) __riscv_vnot_v_i16m8(__VA_ARGS__)
13899
#define vnot_v_i32mf2(...) __riscv_vnot_v_i32mf2(__VA_ARGS__)
13900
#define vnot_v_i32m1(...) __riscv_vnot_v_i32m1(__VA_ARGS__)
13901
#define vnot_v_i32m2(...) __riscv_vnot_v_i32m2(__VA_ARGS__)
13902
#define vnot_v_i32m4(...) __riscv_vnot_v_i32m4(__VA_ARGS__)
13903
#define vnot_v_i32m8(...) __riscv_vnot_v_i32m8(__VA_ARGS__)
13904
#define vnot_v_i64m1(...) __riscv_vnot_v_i64m1(__VA_ARGS__)
13905
#define vnot_v_i64m2(...) __riscv_vnot_v_i64m2(__VA_ARGS__)
13906
#define vnot_v_i64m4(...) __riscv_vnot_v_i64m4(__VA_ARGS__)
13907
#define vnot_v_i64m8(...) __riscv_vnot_v_i64m8(__VA_ARGS__)
13908
#define vnot_v_u8mf8(...) __riscv_vnot_v_u8mf8(__VA_ARGS__)
13909
#define vnot_v_u8mf4(...) __riscv_vnot_v_u8mf4(__VA_ARGS__)
13910
#define vnot_v_u8mf2(...) __riscv_vnot_v_u8mf2(__VA_ARGS__)
13911
#define vnot_v_u8m1(...) __riscv_vnot_v_u8m1(__VA_ARGS__)
13912
#define vnot_v_u8m2(...) __riscv_vnot_v_u8m2(__VA_ARGS__)
13913
#define vnot_v_u8m4(...) __riscv_vnot_v_u8m4(__VA_ARGS__)
13914
#define vnot_v_u8m8(...) __riscv_vnot_v_u8m8(__VA_ARGS__)
13915
#define vnot_v_u16mf4(...) __riscv_vnot_v_u16mf4(__VA_ARGS__)
13916
#define vnot_v_u16mf2(...) __riscv_vnot_v_u16mf2(__VA_ARGS__)
13917
#define vnot_v_u16m1(...) __riscv_vnot_v_u16m1(__VA_ARGS__)
13918
#define vnot_v_u16m2(...) __riscv_vnot_v_u16m2(__VA_ARGS__)
13919
#define vnot_v_u16m4(...) __riscv_vnot_v_u16m4(__VA_ARGS__)
13920
#define vnot_v_u16m8(...) __riscv_vnot_v_u16m8(__VA_ARGS__)
13921
#define vnot_v_u32mf2(...) __riscv_vnot_v_u32mf2(__VA_ARGS__)
13922
#define vnot_v_u32m1(...) __riscv_vnot_v_u32m1(__VA_ARGS__)
13923
#define vnot_v_u32m2(...) __riscv_vnot_v_u32m2(__VA_ARGS__)
13924
#define vnot_v_u32m4(...) __riscv_vnot_v_u32m4(__VA_ARGS__)
13925
#define vnot_v_u32m8(...) __riscv_vnot_v_u32m8(__VA_ARGS__)
13926
#define vnot_v_u64m1(...) __riscv_vnot_v_u64m1(__VA_ARGS__)
13927
#define vnot_v_u64m2(...) __riscv_vnot_v_u64m2(__VA_ARGS__)
13928
#define vnot_v_u64m4(...) __riscv_vnot_v_u64m4(__VA_ARGS__)
13929
#define vnot_v_u64m8(...) __riscv_vnot_v_u64m8(__VA_ARGS__)
13930
// masked functions
13931
#define vnot_v_i8mf8_m(...) __riscv_vnot_v_i8mf8_tumu(__VA_ARGS__)
13932
#define vnot_v_i8mf4_m(...) __riscv_vnot_v_i8mf4_tumu(__VA_ARGS__)
13933
#define vnot_v_i8mf2_m(...) __riscv_vnot_v_i8mf2_tumu(__VA_ARGS__)
13934
#define vnot_v_i8m1_m(...) __riscv_vnot_v_i8m1_tumu(__VA_ARGS__)
13935
#define vnot_v_i8m2_m(...) __riscv_vnot_v_i8m2_tumu(__VA_ARGS__)
13936
#define vnot_v_i8m4_m(...) __riscv_vnot_v_i8m4_tumu(__VA_ARGS__)
13937
#define vnot_v_i8m8_m(...) __riscv_vnot_v_i8m8_tumu(__VA_ARGS__)
13938
#define vnot_v_i16mf4_m(...) __riscv_vnot_v_i16mf4_tumu(__VA_ARGS__)
13939
#define vnot_v_i16mf2_m(...) __riscv_vnot_v_i16mf2_tumu(__VA_ARGS__)
13940
#define vnot_v_i16m1_m(...) __riscv_vnot_v_i16m1_tumu(__VA_ARGS__)
13941
#define vnot_v_i16m2_m(...) __riscv_vnot_v_i16m2_tumu(__VA_ARGS__)
13942
#define vnot_v_i16m4_m(...) __riscv_vnot_v_i16m4_tumu(__VA_ARGS__)
13943
#define vnot_v_i16m8_m(...) __riscv_vnot_v_i16m8_tumu(__VA_ARGS__)
13944
#define vnot_v_i32mf2_m(...) __riscv_vnot_v_i32mf2_tumu(__VA_ARGS__)
13945
#define vnot_v_i32m1_m(...) __riscv_vnot_v_i32m1_tumu(__VA_ARGS__)
13946
#define vnot_v_i32m2_m(...) __riscv_vnot_v_i32m2_tumu(__VA_ARGS__)
13947
#define vnot_v_i32m4_m(...) __riscv_vnot_v_i32m4_tumu(__VA_ARGS__)
13948
#define vnot_v_i32m8_m(...) __riscv_vnot_v_i32m8_tumu(__VA_ARGS__)
13949
#define vnot_v_i64m1_m(...) __riscv_vnot_v_i64m1_tumu(__VA_ARGS__)
13950
#define vnot_v_i64m2_m(...) __riscv_vnot_v_i64m2_tumu(__VA_ARGS__)
13951
#define vnot_v_i64m4_m(...) __riscv_vnot_v_i64m4_tumu(__VA_ARGS__)
13952
#define vnot_v_i64m8_m(...) __riscv_vnot_v_i64m8_tumu(__VA_ARGS__)
13953
#define vnot_v_u8mf8_m(...) __riscv_vnot_v_u8mf8_tumu(__VA_ARGS__)
13954
#define vnot_v_u8mf4_m(...) __riscv_vnot_v_u8mf4_tumu(__VA_ARGS__)
13955
#define vnot_v_u8mf2_m(...) __riscv_vnot_v_u8mf2_tumu(__VA_ARGS__)
13956
#define vnot_v_u8m1_m(...) __riscv_vnot_v_u8m1_tumu(__VA_ARGS__)
13957
#define vnot_v_u8m2_m(...) __riscv_vnot_v_u8m2_tumu(__VA_ARGS__)
13958
#define vnot_v_u8m4_m(...) __riscv_vnot_v_u8m4_tumu(__VA_ARGS__)
13959
#define vnot_v_u8m8_m(...) __riscv_vnot_v_u8m8_tumu(__VA_ARGS__)
13960
#define vnot_v_u16mf4_m(...) __riscv_vnot_v_u16mf4_tumu(__VA_ARGS__)
13961
#define vnot_v_u16mf2_m(...) __riscv_vnot_v_u16mf2_tumu(__VA_ARGS__)
13962
#define vnot_v_u16m1_m(...) __riscv_vnot_v_u16m1_tumu(__VA_ARGS__)
13963
#define vnot_v_u16m2_m(...) __riscv_vnot_v_u16m2_tumu(__VA_ARGS__)
13964
#define vnot_v_u16m4_m(...) __riscv_vnot_v_u16m4_tumu(__VA_ARGS__)
13965
#define vnot_v_u16m8_m(...) __riscv_vnot_v_u16m8_tumu(__VA_ARGS__)
13966
#define vnot_v_u32mf2_m(...) __riscv_vnot_v_u32mf2_tumu(__VA_ARGS__)
13967
#define vnot_v_u32m1_m(...) __riscv_vnot_v_u32m1_tumu(__VA_ARGS__)
13968
#define vnot_v_u32m2_m(...) __riscv_vnot_v_u32m2_tumu(__VA_ARGS__)
13969
#define vnot_v_u32m4_m(...) __riscv_vnot_v_u32m4_tumu(__VA_ARGS__)
13970
#define vnot_v_u32m8_m(...) __riscv_vnot_v_u32m8_tumu(__VA_ARGS__)
13971
#define vnot_v_u64m1_m(...) __riscv_vnot_v_u64m1_tumu(__VA_ARGS__)
13972
#define vnot_v_u64m2_m(...) __riscv_vnot_v_u64m2_tumu(__VA_ARGS__)
13973
#define vnot_v_u64m4_m(...) __riscv_vnot_v_u64m4_tumu(__VA_ARGS__)
13974
#define vnot_v_u64m8_m(...) __riscv_vnot_v_u64m8_tumu(__VA_ARGS__)
13975
#define vsll_vv_i8mf8(...) __riscv_vsll_vv_i8mf8(__VA_ARGS__)
13976
#define vsll_vx_i8mf8(...) __riscv_vsll_vx_i8mf8(__VA_ARGS__)
13977
#define vsll_vv_i8mf4(...) __riscv_vsll_vv_i8mf4(__VA_ARGS__)
13978
#define vsll_vx_i8mf4(...) __riscv_vsll_vx_i8mf4(__VA_ARGS__)
13979
#define vsll_vv_i8mf2(...) __riscv_vsll_vv_i8mf2(__VA_ARGS__)
13980
#define vsll_vx_i8mf2(...) __riscv_vsll_vx_i8mf2(__VA_ARGS__)
13981
#define vsll_vv_i8m1(...) __riscv_vsll_vv_i8m1(__VA_ARGS__)
13982
#define vsll_vx_i8m1(...) __riscv_vsll_vx_i8m1(__VA_ARGS__)
13983
#define vsll_vv_i8m2(...) __riscv_vsll_vv_i8m2(__VA_ARGS__)
13984
#define vsll_vx_i8m2(...) __riscv_vsll_vx_i8m2(__VA_ARGS__)
13985
#define vsll_vv_i8m4(...) __riscv_vsll_vv_i8m4(__VA_ARGS__)
13986
#define vsll_vx_i8m4(...) __riscv_vsll_vx_i8m4(__VA_ARGS__)
13987
#define vsll_vv_i8m8(...) __riscv_vsll_vv_i8m8(__VA_ARGS__)
13988
#define vsll_vx_i8m8(...) __riscv_vsll_vx_i8m8(__VA_ARGS__)
13989
#define vsll_vv_i16mf4(...) __riscv_vsll_vv_i16mf4(__VA_ARGS__)
13990
#define vsll_vx_i16mf4(...) __riscv_vsll_vx_i16mf4(__VA_ARGS__)
13991
#define vsll_vv_i16mf2(...) __riscv_vsll_vv_i16mf2(__VA_ARGS__)
13992
#define vsll_vx_i16mf2(...) __riscv_vsll_vx_i16mf2(__VA_ARGS__)
13993
#define vsll_vv_i16m1(...) __riscv_vsll_vv_i16m1(__VA_ARGS__)
13994
#define vsll_vx_i16m1(...) __riscv_vsll_vx_i16m1(__VA_ARGS__)
13995
#define vsll_vv_i16m2(...) __riscv_vsll_vv_i16m2(__VA_ARGS__)
13996
#define vsll_vx_i16m2(...) __riscv_vsll_vx_i16m2(__VA_ARGS__)
13997
#define vsll_vv_i16m4(...) __riscv_vsll_vv_i16m4(__VA_ARGS__)
13998
#define vsll_vx_i16m4(...) __riscv_vsll_vx_i16m4(__VA_ARGS__)
13999
#define vsll_vv_i16m8(...) __riscv_vsll_vv_i16m8(__VA_ARGS__)
14000
#define vsll_vx_i16m8(...) __riscv_vsll_vx_i16m8(__VA_ARGS__)
14001
#define vsll_vv_i32mf2(...) __riscv_vsll_vv_i32mf2(__VA_ARGS__)
14002
#define vsll_vx_i32mf2(...) __riscv_vsll_vx_i32mf2(__VA_ARGS__)
14003
#define vsll_vv_i32m1(...) __riscv_vsll_vv_i32m1(__VA_ARGS__)
14004
#define vsll_vx_i32m1(...) __riscv_vsll_vx_i32m1(__VA_ARGS__)
14005
#define vsll_vv_i32m2(...) __riscv_vsll_vv_i32m2(__VA_ARGS__)
14006
#define vsll_vx_i32m2(...) __riscv_vsll_vx_i32m2(__VA_ARGS__)
14007
#define vsll_vv_i32m4(...) __riscv_vsll_vv_i32m4(__VA_ARGS__)
14008
#define vsll_vx_i32m4(...) __riscv_vsll_vx_i32m4(__VA_ARGS__)
14009
#define vsll_vv_i32m8(...) __riscv_vsll_vv_i32m8(__VA_ARGS__)
14010
#define vsll_vx_i32m8(...) __riscv_vsll_vx_i32m8(__VA_ARGS__)
14011
#define vsll_vv_i64m1(...) __riscv_vsll_vv_i64m1(__VA_ARGS__)
14012
#define vsll_vx_i64m1(...) __riscv_vsll_vx_i64m1(__VA_ARGS__)
14013
#define vsll_vv_i64m2(...) __riscv_vsll_vv_i64m2(__VA_ARGS__)
14014
#define vsll_vx_i64m2(...) __riscv_vsll_vx_i64m2(__VA_ARGS__)
14015
#define vsll_vv_i64m4(...) __riscv_vsll_vv_i64m4(__VA_ARGS__)
14016
#define vsll_vx_i64m4(...) __riscv_vsll_vx_i64m4(__VA_ARGS__)
14017
#define vsll_vv_i64m8(...) __riscv_vsll_vv_i64m8(__VA_ARGS__)
14018
#define vsll_vx_i64m8(...) __riscv_vsll_vx_i64m8(__VA_ARGS__)
14019
#define vsra_vv_i8mf8(...) __riscv_vsra_vv_i8mf8(__VA_ARGS__)
14020
#define vsra_vx_i8mf8(...) __riscv_vsra_vx_i8mf8(__VA_ARGS__)
14021
#define vsra_vv_i8mf4(...) __riscv_vsra_vv_i8mf4(__VA_ARGS__)
14022
#define vsra_vx_i8mf4(...) __riscv_vsra_vx_i8mf4(__VA_ARGS__)
14023
#define vsra_vv_i8mf2(...) __riscv_vsra_vv_i8mf2(__VA_ARGS__)
14024
#define vsra_vx_i8mf2(...) __riscv_vsra_vx_i8mf2(__VA_ARGS__)
14025
#define vsra_vv_i8m1(...) __riscv_vsra_vv_i8m1(__VA_ARGS__)
14026
#define vsra_vx_i8m1(...) __riscv_vsra_vx_i8m1(__VA_ARGS__)
14027
#define vsra_vv_i8m2(...) __riscv_vsra_vv_i8m2(__VA_ARGS__)
14028
#define vsra_vx_i8m2(...) __riscv_vsra_vx_i8m2(__VA_ARGS__)
14029
#define vsra_vv_i8m4(...) __riscv_vsra_vv_i8m4(__VA_ARGS__)
14030
#define vsra_vx_i8m4(...) __riscv_vsra_vx_i8m4(__VA_ARGS__)
14031
#define vsra_vv_i8m8(...) __riscv_vsra_vv_i8m8(__VA_ARGS__)
14032
#define vsra_vx_i8m8(...) __riscv_vsra_vx_i8m8(__VA_ARGS__)
14033
#define vsra_vv_i16mf4(...) __riscv_vsra_vv_i16mf4(__VA_ARGS__)
14034
#define vsra_vx_i16mf4(...) __riscv_vsra_vx_i16mf4(__VA_ARGS__)
14035
#define vsra_vv_i16mf2(...) __riscv_vsra_vv_i16mf2(__VA_ARGS__)
14036
#define vsra_vx_i16mf2(...) __riscv_vsra_vx_i16mf2(__VA_ARGS__)
14037
#define vsra_vv_i16m1(...) __riscv_vsra_vv_i16m1(__VA_ARGS__)
14038
#define vsra_vx_i16m1(...) __riscv_vsra_vx_i16m1(__VA_ARGS__)
14039
#define vsra_vv_i16m2(...) __riscv_vsra_vv_i16m2(__VA_ARGS__)
14040
#define vsra_vx_i16m2(...) __riscv_vsra_vx_i16m2(__VA_ARGS__)
14041
#define vsra_vv_i16m4(...) __riscv_vsra_vv_i16m4(__VA_ARGS__)
14042
#define vsra_vx_i16m4(...) __riscv_vsra_vx_i16m4(__VA_ARGS__)
14043
#define vsra_vv_i16m8(...) __riscv_vsra_vv_i16m8(__VA_ARGS__)
14044
#define vsra_vx_i16m8(...) __riscv_vsra_vx_i16m8(__VA_ARGS__)
14045
#define vsra_vv_i32mf2(...) __riscv_vsra_vv_i32mf2(__VA_ARGS__)
14046
#define vsra_vx_i32mf2(...) __riscv_vsra_vx_i32mf2(__VA_ARGS__)
14047
#define vsra_vv_i32m1(...) __riscv_vsra_vv_i32m1(__VA_ARGS__)
14048
#define vsra_vx_i32m1(...) __riscv_vsra_vx_i32m1(__VA_ARGS__)
14049
#define vsra_vv_i32m2(...) __riscv_vsra_vv_i32m2(__VA_ARGS__)
14050
#define vsra_vx_i32m2(...) __riscv_vsra_vx_i32m2(__VA_ARGS__)
14051
#define vsra_vv_i32m4(...) __riscv_vsra_vv_i32m4(__VA_ARGS__)
14052
#define vsra_vx_i32m4(...) __riscv_vsra_vx_i32m4(__VA_ARGS__)
14053
#define vsra_vv_i32m8(...) __riscv_vsra_vv_i32m8(__VA_ARGS__)
14054
#define vsra_vx_i32m8(...) __riscv_vsra_vx_i32m8(__VA_ARGS__)
14055
#define vsra_vv_i64m1(...) __riscv_vsra_vv_i64m1(__VA_ARGS__)
14056
#define vsra_vx_i64m1(...) __riscv_vsra_vx_i64m1(__VA_ARGS__)
14057
#define vsra_vv_i64m2(...) __riscv_vsra_vv_i64m2(__VA_ARGS__)
14058
#define vsra_vx_i64m2(...) __riscv_vsra_vx_i64m2(__VA_ARGS__)
14059
#define vsra_vv_i64m4(...) __riscv_vsra_vv_i64m4(__VA_ARGS__)
14060
#define vsra_vx_i64m4(...) __riscv_vsra_vx_i64m4(__VA_ARGS__)
14061
#define vsra_vv_i64m8(...) __riscv_vsra_vv_i64m8(__VA_ARGS__)
14062
#define vsra_vx_i64m8(...) __riscv_vsra_vx_i64m8(__VA_ARGS__)
14063
#define vsll_vv_u8mf8(...) __riscv_vsll_vv_u8mf8(__VA_ARGS__)
14064
#define vsll_vx_u8mf8(...) __riscv_vsll_vx_u8mf8(__VA_ARGS__)
14065
#define vsll_vv_u8mf4(...) __riscv_vsll_vv_u8mf4(__VA_ARGS__)
14066
#define vsll_vx_u8mf4(...) __riscv_vsll_vx_u8mf4(__VA_ARGS__)
14067
#define vsll_vv_u8mf2(...) __riscv_vsll_vv_u8mf2(__VA_ARGS__)
14068
#define vsll_vx_u8mf2(...) __riscv_vsll_vx_u8mf2(__VA_ARGS__)
14069
#define vsll_vv_u8m1(...) __riscv_vsll_vv_u8m1(__VA_ARGS__)
14070
#define vsll_vx_u8m1(...) __riscv_vsll_vx_u8m1(__VA_ARGS__)
14071
#define vsll_vv_u8m2(...) __riscv_vsll_vv_u8m2(__VA_ARGS__)
14072
#define vsll_vx_u8m2(...) __riscv_vsll_vx_u8m2(__VA_ARGS__)
14073
#define vsll_vv_u8m4(...) __riscv_vsll_vv_u8m4(__VA_ARGS__)
14074
#define vsll_vx_u8m4(...) __riscv_vsll_vx_u8m4(__VA_ARGS__)
14075
#define vsll_vv_u8m8(...) __riscv_vsll_vv_u8m8(__VA_ARGS__)
14076
#define vsll_vx_u8m8(...) __riscv_vsll_vx_u8m8(__VA_ARGS__)
14077
#define vsll_vv_u16mf4(...) __riscv_vsll_vv_u16mf4(__VA_ARGS__)
14078
#define vsll_vx_u16mf4(...) __riscv_vsll_vx_u16mf4(__VA_ARGS__)
14079
#define vsll_vv_u16mf2(...) __riscv_vsll_vv_u16mf2(__VA_ARGS__)
14080
#define vsll_vx_u16mf2(...) __riscv_vsll_vx_u16mf2(__VA_ARGS__)
14081
#define vsll_vv_u16m1(...) __riscv_vsll_vv_u16m1(__VA_ARGS__)
14082
#define vsll_vx_u16m1(...) __riscv_vsll_vx_u16m1(__VA_ARGS__)
14083
#define vsll_vv_u16m2(...) __riscv_vsll_vv_u16m2(__VA_ARGS__)
14084
#define vsll_vx_u16m2(...) __riscv_vsll_vx_u16m2(__VA_ARGS__)
14085
#define vsll_vv_u16m4(...) __riscv_vsll_vv_u16m4(__VA_ARGS__)
14086
#define vsll_vx_u16m4(...) __riscv_vsll_vx_u16m4(__VA_ARGS__)
14087
#define vsll_vv_u16m8(...) __riscv_vsll_vv_u16m8(__VA_ARGS__)
14088
#define vsll_vx_u16m8(...) __riscv_vsll_vx_u16m8(__VA_ARGS__)
14089
#define vsll_vv_u32mf2(...) __riscv_vsll_vv_u32mf2(__VA_ARGS__)
14090
#define vsll_vx_u32mf2(...) __riscv_vsll_vx_u32mf2(__VA_ARGS__)
14091
#define vsll_vv_u32m1(...) __riscv_vsll_vv_u32m1(__VA_ARGS__)
14092
#define vsll_vx_u32m1(...) __riscv_vsll_vx_u32m1(__VA_ARGS__)
14093
#define vsll_vv_u32m2(...) __riscv_vsll_vv_u32m2(__VA_ARGS__)
14094
#define vsll_vx_u32m2(...) __riscv_vsll_vx_u32m2(__VA_ARGS__)
14095
#define vsll_vv_u32m4(...) __riscv_vsll_vv_u32m4(__VA_ARGS__)
14096
#define vsll_vx_u32m4(...) __riscv_vsll_vx_u32m4(__VA_ARGS__)
14097
#define vsll_vv_u32m8(...) __riscv_vsll_vv_u32m8(__VA_ARGS__)
14098
#define vsll_vx_u32m8(...) __riscv_vsll_vx_u32m8(__VA_ARGS__)
14099
#define vsll_vv_u64m1(...) __riscv_vsll_vv_u64m1(__VA_ARGS__)
14100
#define vsll_vx_u64m1(...) __riscv_vsll_vx_u64m1(__VA_ARGS__)
14101
#define vsll_vv_u64m2(...) __riscv_vsll_vv_u64m2(__VA_ARGS__)
14102
#define vsll_vx_u64m2(...) __riscv_vsll_vx_u64m2(__VA_ARGS__)
14103
#define vsll_vv_u64m4(...) __riscv_vsll_vv_u64m4(__VA_ARGS__)
14104
#define vsll_vx_u64m4(...) __riscv_vsll_vx_u64m4(__VA_ARGS__)
14105
#define vsll_vv_u64m8(...) __riscv_vsll_vv_u64m8(__VA_ARGS__)
14106
#define vsll_vx_u64m8(...) __riscv_vsll_vx_u64m8(__VA_ARGS__)
14107
#define vsrl_vv_u8mf8(...) __riscv_vsrl_vv_u8mf8(__VA_ARGS__)
14108
#define vsrl_vx_u8mf8(...) __riscv_vsrl_vx_u8mf8(__VA_ARGS__)
14109
#define vsrl_vv_u8mf4(...) __riscv_vsrl_vv_u8mf4(__VA_ARGS__)
14110
#define vsrl_vx_u8mf4(...) __riscv_vsrl_vx_u8mf4(__VA_ARGS__)
14111
#define vsrl_vv_u8mf2(...) __riscv_vsrl_vv_u8mf2(__VA_ARGS__)
14112
#define vsrl_vx_u8mf2(...) __riscv_vsrl_vx_u8mf2(__VA_ARGS__)
14113
#define vsrl_vv_u8m1(...) __riscv_vsrl_vv_u8m1(__VA_ARGS__)
14114
#define vsrl_vx_u8m1(...) __riscv_vsrl_vx_u8m1(__VA_ARGS__)
14115
#define vsrl_vv_u8m2(...) __riscv_vsrl_vv_u8m2(__VA_ARGS__)
14116
#define vsrl_vx_u8m2(...) __riscv_vsrl_vx_u8m2(__VA_ARGS__)
14117
#define vsrl_vv_u8m4(...) __riscv_vsrl_vv_u8m4(__VA_ARGS__)
14118
#define vsrl_vx_u8m4(...) __riscv_vsrl_vx_u8m4(__VA_ARGS__)
14119
#define vsrl_vv_u8m8(...) __riscv_vsrl_vv_u8m8(__VA_ARGS__)
14120
#define vsrl_vx_u8m8(...) __riscv_vsrl_vx_u8m8(__VA_ARGS__)
14121
#define vsrl_vv_u16mf4(...) __riscv_vsrl_vv_u16mf4(__VA_ARGS__)
14122
#define vsrl_vx_u16mf4(...) __riscv_vsrl_vx_u16mf4(__VA_ARGS__)
14123
#define vsrl_vv_u16mf2(...) __riscv_vsrl_vv_u16mf2(__VA_ARGS__)
14124
#define vsrl_vx_u16mf2(...) __riscv_vsrl_vx_u16mf2(__VA_ARGS__)
14125
#define vsrl_vv_u16m1(...) __riscv_vsrl_vv_u16m1(__VA_ARGS__)
14126
#define vsrl_vx_u16m1(...) __riscv_vsrl_vx_u16m1(__VA_ARGS__)
14127
#define vsrl_vv_u16m2(...) __riscv_vsrl_vv_u16m2(__VA_ARGS__)
14128
#define vsrl_vx_u16m2(...) __riscv_vsrl_vx_u16m2(__VA_ARGS__)
14129
#define vsrl_vv_u16m4(...) __riscv_vsrl_vv_u16m4(__VA_ARGS__)
14130
#define vsrl_vx_u16m4(...) __riscv_vsrl_vx_u16m4(__VA_ARGS__)
14131
#define vsrl_vv_u16m8(...) __riscv_vsrl_vv_u16m8(__VA_ARGS__)
14132
#define vsrl_vx_u16m8(...) __riscv_vsrl_vx_u16m8(__VA_ARGS__)
14133
#define vsrl_vv_u32mf2(...) __riscv_vsrl_vv_u32mf2(__VA_ARGS__)
14134
#define vsrl_vx_u32mf2(...) __riscv_vsrl_vx_u32mf2(__VA_ARGS__)
14135
#define vsrl_vv_u32m1(...) __riscv_vsrl_vv_u32m1(__VA_ARGS__)
14136
#define vsrl_vx_u32m1(...) __riscv_vsrl_vx_u32m1(__VA_ARGS__)
14137
#define vsrl_vv_u32m2(...) __riscv_vsrl_vv_u32m2(__VA_ARGS__)
14138
#define vsrl_vx_u32m2(...) __riscv_vsrl_vx_u32m2(__VA_ARGS__)
14139
#define vsrl_vv_u32m4(...) __riscv_vsrl_vv_u32m4(__VA_ARGS__)
14140
#define vsrl_vx_u32m4(...) __riscv_vsrl_vx_u32m4(__VA_ARGS__)
14141
#define vsrl_vv_u32m8(...) __riscv_vsrl_vv_u32m8(__VA_ARGS__)
14142
#define vsrl_vx_u32m8(...) __riscv_vsrl_vx_u32m8(__VA_ARGS__)
14143
#define vsrl_vv_u64m1(...) __riscv_vsrl_vv_u64m1(__VA_ARGS__)
14144
#define vsrl_vx_u64m1(...) __riscv_vsrl_vx_u64m1(__VA_ARGS__)
14145
#define vsrl_vv_u64m2(...) __riscv_vsrl_vv_u64m2(__VA_ARGS__)
14146
#define vsrl_vx_u64m2(...) __riscv_vsrl_vx_u64m2(__VA_ARGS__)
14147
#define vsrl_vv_u64m4(...) __riscv_vsrl_vv_u64m4(__VA_ARGS__)
14148
#define vsrl_vx_u64m4(...) __riscv_vsrl_vx_u64m4(__VA_ARGS__)
14149
#define vsrl_vv_u64m8(...) __riscv_vsrl_vv_u64m8(__VA_ARGS__)
14150
#define vsrl_vx_u64m8(...) __riscv_vsrl_vx_u64m8(__VA_ARGS__)
14151
// masked functions
14152
#define vsll_vv_i8mf8_m(...) __riscv_vsll_vv_i8mf8_tumu(__VA_ARGS__)
14153
#define vsll_vx_i8mf8_m(...) __riscv_vsll_vx_i8mf8_tumu(__VA_ARGS__)
14154
#define vsll_vv_i8mf4_m(...) __riscv_vsll_vv_i8mf4_tumu(__VA_ARGS__)
14155
#define vsll_vx_i8mf4_m(...) __riscv_vsll_vx_i8mf4_tumu(__VA_ARGS__)
14156
#define vsll_vv_i8mf2_m(...) __riscv_vsll_vv_i8mf2_tumu(__VA_ARGS__)
14157
#define vsll_vx_i8mf2_m(...) __riscv_vsll_vx_i8mf2_tumu(__VA_ARGS__)
14158
#define vsll_vv_i8m1_m(...) __riscv_vsll_vv_i8m1_tumu(__VA_ARGS__)
14159
#define vsll_vx_i8m1_m(...) __riscv_vsll_vx_i8m1_tumu(__VA_ARGS__)
14160
#define vsll_vv_i8m2_m(...) __riscv_vsll_vv_i8m2_tumu(__VA_ARGS__)
14161
#define vsll_vx_i8m2_m(...) __riscv_vsll_vx_i8m2_tumu(__VA_ARGS__)
14162
#define vsll_vv_i8m4_m(...) __riscv_vsll_vv_i8m4_tumu(__VA_ARGS__)
14163
#define vsll_vx_i8m4_m(...) __riscv_vsll_vx_i8m4_tumu(__VA_ARGS__)
14164
#define vsll_vv_i8m8_m(...) __riscv_vsll_vv_i8m8_tumu(__VA_ARGS__)
14165
#define vsll_vx_i8m8_m(...) __riscv_vsll_vx_i8m8_tumu(__VA_ARGS__)
14166
#define vsll_vv_i16mf4_m(...) __riscv_vsll_vv_i16mf4_tumu(__VA_ARGS__)
14167
#define vsll_vx_i16mf4_m(...) __riscv_vsll_vx_i16mf4_tumu(__VA_ARGS__)
14168
#define vsll_vv_i16mf2_m(...) __riscv_vsll_vv_i16mf2_tumu(__VA_ARGS__)
14169
#define vsll_vx_i16mf2_m(...) __riscv_vsll_vx_i16mf2_tumu(__VA_ARGS__)
14170
#define vsll_vv_i16m1_m(...) __riscv_vsll_vv_i16m1_tumu(__VA_ARGS__)
14171
#define vsll_vx_i16m1_m(...) __riscv_vsll_vx_i16m1_tumu(__VA_ARGS__)
14172
#define vsll_vv_i16m2_m(...) __riscv_vsll_vv_i16m2_tumu(__VA_ARGS__)
14173
#define vsll_vx_i16m2_m(...) __riscv_vsll_vx_i16m2_tumu(__VA_ARGS__)
14174
#define vsll_vv_i16m4_m(...) __riscv_vsll_vv_i16m4_tumu(__VA_ARGS__)
14175
#define vsll_vx_i16m4_m(...) __riscv_vsll_vx_i16m4_tumu(__VA_ARGS__)
14176
#define vsll_vv_i16m8_m(...) __riscv_vsll_vv_i16m8_tumu(__VA_ARGS__)
14177
#define vsll_vx_i16m8_m(...) __riscv_vsll_vx_i16m8_tumu(__VA_ARGS__)
14178
#define vsll_vv_i32mf2_m(...) __riscv_vsll_vv_i32mf2_tumu(__VA_ARGS__)
14179
#define vsll_vx_i32mf2_m(...) __riscv_vsll_vx_i32mf2_tumu(__VA_ARGS__)
14180
#define vsll_vv_i32m1_m(...) __riscv_vsll_vv_i32m1_tumu(__VA_ARGS__)
14181
#define vsll_vx_i32m1_m(...) __riscv_vsll_vx_i32m1_tumu(__VA_ARGS__)
14182
#define vsll_vv_i32m2_m(...) __riscv_vsll_vv_i32m2_tumu(__VA_ARGS__)
14183
#define vsll_vx_i32m2_m(...) __riscv_vsll_vx_i32m2_tumu(__VA_ARGS__)
14184
#define vsll_vv_i32m4_m(...) __riscv_vsll_vv_i32m4_tumu(__VA_ARGS__)
14185
#define vsll_vx_i32m4_m(...) __riscv_vsll_vx_i32m4_tumu(__VA_ARGS__)
14186
#define vsll_vv_i32m8_m(...) __riscv_vsll_vv_i32m8_tumu(__VA_ARGS__)
14187
#define vsll_vx_i32m8_m(...) __riscv_vsll_vx_i32m8_tumu(__VA_ARGS__)
14188
#define vsll_vv_i64m1_m(...) __riscv_vsll_vv_i64m1_tumu(__VA_ARGS__)
14189
#define vsll_vx_i64m1_m(...) __riscv_vsll_vx_i64m1_tumu(__VA_ARGS__)
14190
#define vsll_vv_i64m2_m(...) __riscv_vsll_vv_i64m2_tumu(__VA_ARGS__)
14191
#define vsll_vx_i64m2_m(...) __riscv_vsll_vx_i64m2_tumu(__VA_ARGS__)
14192
#define vsll_vv_i64m4_m(...) __riscv_vsll_vv_i64m4_tumu(__VA_ARGS__)
14193
#define vsll_vx_i64m4_m(...) __riscv_vsll_vx_i64m4_tumu(__VA_ARGS__)
14194
#define vsll_vv_i64m8_m(...) __riscv_vsll_vv_i64m8_tumu(__VA_ARGS__)
14195
#define vsll_vx_i64m8_m(...) __riscv_vsll_vx_i64m8_tumu(__VA_ARGS__)
14196
#define vsra_vv_i8mf8_m(...) __riscv_vsra_vv_i8mf8_tumu(__VA_ARGS__)
14197
#define vsra_vx_i8mf8_m(...) __riscv_vsra_vx_i8mf8_tumu(__VA_ARGS__)
14198
#define vsra_vv_i8mf4_m(...) __riscv_vsra_vv_i8mf4_tumu(__VA_ARGS__)
14199
#define vsra_vx_i8mf4_m(...) __riscv_vsra_vx_i8mf4_tumu(__VA_ARGS__)
14200
#define vsra_vv_i8mf2_m(...) __riscv_vsra_vv_i8mf2_tumu(__VA_ARGS__)
14201
#define vsra_vx_i8mf2_m(...) __riscv_vsra_vx_i8mf2_tumu(__VA_ARGS__)
14202
#define vsra_vv_i8m1_m(...) __riscv_vsra_vv_i8m1_tumu(__VA_ARGS__)
14203
#define vsra_vx_i8m1_m(...) __riscv_vsra_vx_i8m1_tumu(__VA_ARGS__)
14204
#define vsra_vv_i8m2_m(...) __riscv_vsra_vv_i8m2_tumu(__VA_ARGS__)
14205
#define vsra_vx_i8m2_m(...) __riscv_vsra_vx_i8m2_tumu(__VA_ARGS__)
14206
#define vsra_vv_i8m4_m(...) __riscv_vsra_vv_i8m4_tumu(__VA_ARGS__)
14207
#define vsra_vx_i8m4_m(...) __riscv_vsra_vx_i8m4_tumu(__VA_ARGS__)
14208
#define vsra_vv_i8m8_m(...) __riscv_vsra_vv_i8m8_tumu(__VA_ARGS__)
14209
#define vsra_vx_i8m8_m(...) __riscv_vsra_vx_i8m8_tumu(__VA_ARGS__)
14210
#define vsra_vv_i16mf4_m(...) __riscv_vsra_vv_i16mf4_tumu(__VA_ARGS__)
14211
#define vsra_vx_i16mf4_m(...) __riscv_vsra_vx_i16mf4_tumu(__VA_ARGS__)
14212
#define vsra_vv_i16mf2_m(...) __riscv_vsra_vv_i16mf2_tumu(__VA_ARGS__)
14213
#define vsra_vx_i16mf2_m(...) __riscv_vsra_vx_i16mf2_tumu(__VA_ARGS__)
14214
#define vsra_vv_i16m1_m(...) __riscv_vsra_vv_i16m1_tumu(__VA_ARGS__)
14215
#define vsra_vx_i16m1_m(...) __riscv_vsra_vx_i16m1_tumu(__VA_ARGS__)
14216
#define vsra_vv_i16m2_m(...) __riscv_vsra_vv_i16m2_tumu(__VA_ARGS__)
14217
#define vsra_vx_i16m2_m(...) __riscv_vsra_vx_i16m2_tumu(__VA_ARGS__)
14218
#define vsra_vv_i16m4_m(...) __riscv_vsra_vv_i16m4_tumu(__VA_ARGS__)
14219
#define vsra_vx_i16m4_m(...) __riscv_vsra_vx_i16m4_tumu(__VA_ARGS__)
14220
#define vsra_vv_i16m8_m(...) __riscv_vsra_vv_i16m8_tumu(__VA_ARGS__)
14221
#define vsra_vx_i16m8_m(...) __riscv_vsra_vx_i16m8_tumu(__VA_ARGS__)
14222
#define vsra_vv_i32mf2_m(...) __riscv_vsra_vv_i32mf2_tumu(__VA_ARGS__)
14223
#define vsra_vx_i32mf2_m(...) __riscv_vsra_vx_i32mf2_tumu(__VA_ARGS__)
14224
#define vsra_vv_i32m1_m(...) __riscv_vsra_vv_i32m1_tumu(__VA_ARGS__)
14225
#define vsra_vx_i32m1_m(...) __riscv_vsra_vx_i32m1_tumu(__VA_ARGS__)
14226
#define vsra_vv_i32m2_m(...) __riscv_vsra_vv_i32m2_tumu(__VA_ARGS__)
14227
#define vsra_vx_i32m2_m(...) __riscv_vsra_vx_i32m2_tumu(__VA_ARGS__)
14228
#define vsra_vv_i32m4_m(...) __riscv_vsra_vv_i32m4_tumu(__VA_ARGS__)
14229
#define vsra_vx_i32m4_m(...) __riscv_vsra_vx_i32m4_tumu(__VA_ARGS__)
14230
#define vsra_vv_i32m8_m(...) __riscv_vsra_vv_i32m8_tumu(__VA_ARGS__)
14231
#define vsra_vx_i32m8_m(...) __riscv_vsra_vx_i32m8_tumu(__VA_ARGS__)
14232
#define vsra_vv_i64m1_m(...) __riscv_vsra_vv_i64m1_tumu(__VA_ARGS__)
14233
#define vsra_vx_i64m1_m(...) __riscv_vsra_vx_i64m1_tumu(__VA_ARGS__)
14234
#define vsra_vv_i64m2_m(...) __riscv_vsra_vv_i64m2_tumu(__VA_ARGS__)
14235
#define vsra_vx_i64m2_m(...) __riscv_vsra_vx_i64m2_tumu(__VA_ARGS__)
14236
#define vsra_vv_i64m4_m(...) __riscv_vsra_vv_i64m4_tumu(__VA_ARGS__)
14237
#define vsra_vx_i64m4_m(...) __riscv_vsra_vx_i64m4_tumu(__VA_ARGS__)
14238
#define vsra_vv_i64m8_m(...) __riscv_vsra_vv_i64m8_tumu(__VA_ARGS__)
14239
#define vsra_vx_i64m8_m(...) __riscv_vsra_vx_i64m8_tumu(__VA_ARGS__)
14240
#define vsll_vv_u8mf8_m(...) __riscv_vsll_vv_u8mf8_tumu(__VA_ARGS__)
14241
#define vsll_vx_u8mf8_m(...) __riscv_vsll_vx_u8mf8_tumu(__VA_ARGS__)
14242
#define vsll_vv_u8mf4_m(...) __riscv_vsll_vv_u8mf4_tumu(__VA_ARGS__)
14243
#define vsll_vx_u8mf4_m(...) __riscv_vsll_vx_u8mf4_tumu(__VA_ARGS__)
14244
#define vsll_vv_u8mf2_m(...) __riscv_vsll_vv_u8mf2_tumu(__VA_ARGS__)
14245
#define vsll_vx_u8mf2_m(...) __riscv_vsll_vx_u8mf2_tumu(__VA_ARGS__)
14246
#define vsll_vv_u8m1_m(...) __riscv_vsll_vv_u8m1_tumu(__VA_ARGS__)
14247
#define vsll_vx_u8m1_m(...) __riscv_vsll_vx_u8m1_tumu(__VA_ARGS__)
14248
#define vsll_vv_u8m2_m(...) __riscv_vsll_vv_u8m2_tumu(__VA_ARGS__)
14249
#define vsll_vx_u8m2_m(...) __riscv_vsll_vx_u8m2_tumu(__VA_ARGS__)
14250
#define vsll_vv_u8m4_m(...) __riscv_vsll_vv_u8m4_tumu(__VA_ARGS__)
14251
#define vsll_vx_u8m4_m(...) __riscv_vsll_vx_u8m4_tumu(__VA_ARGS__)
14252
#define vsll_vv_u8m8_m(...) __riscv_vsll_vv_u8m8_tumu(__VA_ARGS__)
14253
#define vsll_vx_u8m8_m(...) __riscv_vsll_vx_u8m8_tumu(__VA_ARGS__)
14254
#define vsll_vv_u16mf4_m(...) __riscv_vsll_vv_u16mf4_tumu(__VA_ARGS__)
14255
#define vsll_vx_u16mf4_m(...) __riscv_vsll_vx_u16mf4_tumu(__VA_ARGS__)
14256
#define vsll_vv_u16mf2_m(...) __riscv_vsll_vv_u16mf2_tumu(__VA_ARGS__)
14257
#define vsll_vx_u16mf2_m(...) __riscv_vsll_vx_u16mf2_tumu(__VA_ARGS__)
14258
#define vsll_vv_u16m1_m(...) __riscv_vsll_vv_u16m1_tumu(__VA_ARGS__)
14259
#define vsll_vx_u16m1_m(...) __riscv_vsll_vx_u16m1_tumu(__VA_ARGS__)
14260
#define vsll_vv_u16m2_m(...) __riscv_vsll_vv_u16m2_tumu(__VA_ARGS__)
14261
#define vsll_vx_u16m2_m(...) __riscv_vsll_vx_u16m2_tumu(__VA_ARGS__)
14262
#define vsll_vv_u16m4_m(...) __riscv_vsll_vv_u16m4_tumu(__VA_ARGS__)
14263
#define vsll_vx_u16m4_m(...) __riscv_vsll_vx_u16m4_tumu(__VA_ARGS__)
14264
#define vsll_vv_u16m8_m(...) __riscv_vsll_vv_u16m8_tumu(__VA_ARGS__)
14265
#define vsll_vx_u16m8_m(...) __riscv_vsll_vx_u16m8_tumu(__VA_ARGS__)
14266
#define vsll_vv_u32mf2_m(...) __riscv_vsll_vv_u32mf2_tumu(__VA_ARGS__)
14267
#define vsll_vx_u32mf2_m(...) __riscv_vsll_vx_u32mf2_tumu(__VA_ARGS__)
14268
#define vsll_vv_u32m1_m(...) __riscv_vsll_vv_u32m1_tumu(__VA_ARGS__)
14269
#define vsll_vx_u32m1_m(...) __riscv_vsll_vx_u32m1_tumu(__VA_ARGS__)
14270
#define vsll_vv_u32m2_m(...) __riscv_vsll_vv_u32m2_tumu(__VA_ARGS__)
14271
#define vsll_vx_u32m2_m(...) __riscv_vsll_vx_u32m2_tumu(__VA_ARGS__)
14272
#define vsll_vv_u32m4_m(...) __riscv_vsll_vv_u32m4_tumu(__VA_ARGS__)
14273
#define vsll_vx_u32m4_m(...) __riscv_vsll_vx_u32m4_tumu(__VA_ARGS__)
14274
#define vsll_vv_u32m8_m(...) __riscv_vsll_vv_u32m8_tumu(__VA_ARGS__)
14275
#define vsll_vx_u32m8_m(...) __riscv_vsll_vx_u32m8_tumu(__VA_ARGS__)
14276
#define vsll_vv_u64m1_m(...) __riscv_vsll_vv_u64m1_tumu(__VA_ARGS__)
14277
#define vsll_vx_u64m1_m(...) __riscv_vsll_vx_u64m1_tumu(__VA_ARGS__)
14278
#define vsll_vv_u64m2_m(...) __riscv_vsll_vv_u64m2_tumu(__VA_ARGS__)
14279
#define vsll_vx_u64m2_m(...) __riscv_vsll_vx_u64m2_tumu(__VA_ARGS__)
14280
#define vsll_vv_u64m4_m(...) __riscv_vsll_vv_u64m4_tumu(__VA_ARGS__)
14281
#define vsll_vx_u64m4_m(...) __riscv_vsll_vx_u64m4_tumu(__VA_ARGS__)
14282
#define vsll_vv_u64m8_m(...) __riscv_vsll_vv_u64m8_tumu(__VA_ARGS__)
14283
#define vsll_vx_u64m8_m(...) __riscv_vsll_vx_u64m8_tumu(__VA_ARGS__)
14284
#define vsrl_vv_u8mf8_m(...) __riscv_vsrl_vv_u8mf8_tumu(__VA_ARGS__)
14285
#define vsrl_vx_u8mf8_m(...) __riscv_vsrl_vx_u8mf8_tumu(__VA_ARGS__)
14286
#define vsrl_vv_u8mf4_m(...) __riscv_vsrl_vv_u8mf4_tumu(__VA_ARGS__)
14287
#define vsrl_vx_u8mf4_m(...) __riscv_vsrl_vx_u8mf4_tumu(__VA_ARGS__)
14288
#define vsrl_vv_u8mf2_m(...) __riscv_vsrl_vv_u8mf2_tumu(__VA_ARGS__)
14289
#define vsrl_vx_u8mf2_m(...) __riscv_vsrl_vx_u8mf2_tumu(__VA_ARGS__)
14290
#define vsrl_vv_u8m1_m(...) __riscv_vsrl_vv_u8m1_tumu(__VA_ARGS__)
14291
#define vsrl_vx_u8m1_m(...) __riscv_vsrl_vx_u8m1_tumu(__VA_ARGS__)
14292
#define vsrl_vv_u8m2_m(...) __riscv_vsrl_vv_u8m2_tumu(__VA_ARGS__)
14293
#define vsrl_vx_u8m2_m(...) __riscv_vsrl_vx_u8m2_tumu(__VA_ARGS__)
14294
#define vsrl_vv_u8m4_m(...) __riscv_vsrl_vv_u8m4_tumu(__VA_ARGS__)
14295
#define vsrl_vx_u8m4_m(...) __riscv_vsrl_vx_u8m4_tumu(__VA_ARGS__)
14296
#define vsrl_vv_u8m8_m(...) __riscv_vsrl_vv_u8m8_tumu(__VA_ARGS__)
14297
#define vsrl_vx_u8m8_m(...) __riscv_vsrl_vx_u8m8_tumu(__VA_ARGS__)
14298
#define vsrl_vv_u16mf4_m(...) __riscv_vsrl_vv_u16mf4_tumu(__VA_ARGS__)
14299
#define vsrl_vx_u16mf4_m(...) __riscv_vsrl_vx_u16mf4_tumu(__VA_ARGS__)
14300
#define vsrl_vv_u16mf2_m(...) __riscv_vsrl_vv_u16mf2_tumu(__VA_ARGS__)
14301
#define vsrl_vx_u16mf2_m(...) __riscv_vsrl_vx_u16mf2_tumu(__VA_ARGS__)
14302
#define vsrl_vv_u16m1_m(...) __riscv_vsrl_vv_u16m1_tumu(__VA_ARGS__)
14303
#define vsrl_vx_u16m1_m(...) __riscv_vsrl_vx_u16m1_tumu(__VA_ARGS__)
14304
#define vsrl_vv_u16m2_m(...) __riscv_vsrl_vv_u16m2_tumu(__VA_ARGS__)
14305
#define vsrl_vx_u16m2_m(...) __riscv_vsrl_vx_u16m2_tumu(__VA_ARGS__)
14306
#define vsrl_vv_u16m4_m(...) __riscv_vsrl_vv_u16m4_tumu(__VA_ARGS__)
14307
#define vsrl_vx_u16m4_m(...) __riscv_vsrl_vx_u16m4_tumu(__VA_ARGS__)
14308
#define vsrl_vv_u16m8_m(...) __riscv_vsrl_vv_u16m8_tumu(__VA_ARGS__)
14309
#define vsrl_vx_u16m8_m(...) __riscv_vsrl_vx_u16m8_tumu(__VA_ARGS__)
14310
#define vsrl_vv_u32mf2_m(...) __riscv_vsrl_vv_u32mf2_tumu(__VA_ARGS__)
14311
#define vsrl_vx_u32mf2_m(...) __riscv_vsrl_vx_u32mf2_tumu(__VA_ARGS__)
14312
#define vsrl_vv_u32m1_m(...) __riscv_vsrl_vv_u32m1_tumu(__VA_ARGS__)
14313
#define vsrl_vx_u32m1_m(...) __riscv_vsrl_vx_u32m1_tumu(__VA_ARGS__)
14314
#define vsrl_vv_u32m2_m(...) __riscv_vsrl_vv_u32m2_tumu(__VA_ARGS__)
14315
#define vsrl_vx_u32m2_m(...) __riscv_vsrl_vx_u32m2_tumu(__VA_ARGS__)
14316
#define vsrl_vv_u32m4_m(...) __riscv_vsrl_vv_u32m4_tumu(__VA_ARGS__)
14317
#define vsrl_vx_u32m4_m(...) __riscv_vsrl_vx_u32m4_tumu(__VA_ARGS__)
14318
#define vsrl_vv_u32m8_m(...) __riscv_vsrl_vv_u32m8_tumu(__VA_ARGS__)
14319
#define vsrl_vx_u32m8_m(...) __riscv_vsrl_vx_u32m8_tumu(__VA_ARGS__)
14320
#define vsrl_vv_u64m1_m(...) __riscv_vsrl_vv_u64m1_tumu(__VA_ARGS__)
14321
#define vsrl_vx_u64m1_m(...) __riscv_vsrl_vx_u64m1_tumu(__VA_ARGS__)
14322
#define vsrl_vv_u64m2_m(...) __riscv_vsrl_vv_u64m2_tumu(__VA_ARGS__)
14323
#define vsrl_vx_u64m2_m(...) __riscv_vsrl_vx_u64m2_tumu(__VA_ARGS__)
14324
#define vsrl_vv_u64m4_m(...) __riscv_vsrl_vv_u64m4_tumu(__VA_ARGS__)
14325
#define vsrl_vx_u64m4_m(...) __riscv_vsrl_vx_u64m4_tumu(__VA_ARGS__)
14326
#define vsrl_vv_u64m8_m(...) __riscv_vsrl_vv_u64m8_tumu(__VA_ARGS__)
14327
#define vsrl_vx_u64m8_m(...) __riscv_vsrl_vx_u64m8_tumu(__VA_ARGS__)
14328
#define vnsra_wv_i8mf8(...) __riscv_vnsra_wv_i8mf8(__VA_ARGS__)
14329
#define vnsra_wx_i8mf8(...) __riscv_vnsra_wx_i8mf8(__VA_ARGS__)
14330
#define vnsra_wv_i8mf4(...) __riscv_vnsra_wv_i8mf4(__VA_ARGS__)
14331
#define vnsra_wx_i8mf4(...) __riscv_vnsra_wx_i8mf4(__VA_ARGS__)
14332
#define vnsra_wv_i8mf2(...) __riscv_vnsra_wv_i8mf2(__VA_ARGS__)
14333
#define vnsra_wx_i8mf2(...) __riscv_vnsra_wx_i8mf2(__VA_ARGS__)
14334
#define vnsra_wv_i8m1(...) __riscv_vnsra_wv_i8m1(__VA_ARGS__)
14335
#define vnsra_wx_i8m1(...) __riscv_vnsra_wx_i8m1(__VA_ARGS__)
14336
#define vnsra_wv_i8m2(...) __riscv_vnsra_wv_i8m2(__VA_ARGS__)
14337
#define vnsra_wx_i8m2(...) __riscv_vnsra_wx_i8m2(__VA_ARGS__)
14338
#define vnsra_wv_i8m4(...) __riscv_vnsra_wv_i8m4(__VA_ARGS__)
14339
#define vnsra_wx_i8m4(...) __riscv_vnsra_wx_i8m4(__VA_ARGS__)
14340
#define vnsra_wv_i16mf4(...) __riscv_vnsra_wv_i16mf4(__VA_ARGS__)
14341
#define vnsra_wx_i16mf4(...) __riscv_vnsra_wx_i16mf4(__VA_ARGS__)
14342
#define vnsra_wv_i16mf2(...) __riscv_vnsra_wv_i16mf2(__VA_ARGS__)
14343
#define vnsra_wx_i16mf2(...) __riscv_vnsra_wx_i16mf2(__VA_ARGS__)
14344
#define vnsra_wv_i16m1(...) __riscv_vnsra_wv_i16m1(__VA_ARGS__)
14345
#define vnsra_wx_i16m1(...) __riscv_vnsra_wx_i16m1(__VA_ARGS__)
14346
#define vnsra_wv_i16m2(...) __riscv_vnsra_wv_i16m2(__VA_ARGS__)
14347
#define vnsra_wx_i16m2(...) __riscv_vnsra_wx_i16m2(__VA_ARGS__)
14348
#define vnsra_wv_i16m4(...) __riscv_vnsra_wv_i16m4(__VA_ARGS__)
14349
#define vnsra_wx_i16m4(...) __riscv_vnsra_wx_i16m4(__VA_ARGS__)
14350
#define vnsra_wv_i32mf2(...) __riscv_vnsra_wv_i32mf2(__VA_ARGS__)
14351
#define vnsra_wx_i32mf2(...) __riscv_vnsra_wx_i32mf2(__VA_ARGS__)
14352
#define vnsra_wv_i32m1(...) __riscv_vnsra_wv_i32m1(__VA_ARGS__)
14353
#define vnsra_wx_i32m1(...) __riscv_vnsra_wx_i32m1(__VA_ARGS__)
14354
#define vnsra_wv_i32m2(...) __riscv_vnsra_wv_i32m2(__VA_ARGS__)
14355
#define vnsra_wx_i32m2(...) __riscv_vnsra_wx_i32m2(__VA_ARGS__)
14356
#define vnsra_wv_i32m4(...) __riscv_vnsra_wv_i32m4(__VA_ARGS__)
14357
#define vnsra_wx_i32m4(...) __riscv_vnsra_wx_i32m4(__VA_ARGS__)
14358
#define vnsrl_wv_u8mf8(...) __riscv_vnsrl_wv_u8mf8(__VA_ARGS__)
14359
#define vnsrl_wx_u8mf8(...) __riscv_vnsrl_wx_u8mf8(__VA_ARGS__)
14360
#define vnsrl_wv_u8mf4(...) __riscv_vnsrl_wv_u8mf4(__VA_ARGS__)
14361
#define vnsrl_wx_u8mf4(...) __riscv_vnsrl_wx_u8mf4(__VA_ARGS__)
14362
#define vnsrl_wv_u8mf2(...) __riscv_vnsrl_wv_u8mf2(__VA_ARGS__)
14363
#define vnsrl_wx_u8mf2(...) __riscv_vnsrl_wx_u8mf2(__VA_ARGS__)
14364
#define vnsrl_wv_u8m1(...) __riscv_vnsrl_wv_u8m1(__VA_ARGS__)
14365
#define vnsrl_wx_u8m1(...) __riscv_vnsrl_wx_u8m1(__VA_ARGS__)
14366
#define vnsrl_wv_u8m2(...) __riscv_vnsrl_wv_u8m2(__VA_ARGS__)
14367
#define vnsrl_wx_u8m2(...) __riscv_vnsrl_wx_u8m2(__VA_ARGS__)
14368
#define vnsrl_wv_u8m4(...) __riscv_vnsrl_wv_u8m4(__VA_ARGS__)
14369
#define vnsrl_wx_u8m4(...) __riscv_vnsrl_wx_u8m4(__VA_ARGS__)
14370
#define vnsrl_wv_u16mf4(...) __riscv_vnsrl_wv_u16mf4(__VA_ARGS__)
14371
#define vnsrl_wx_u16mf4(...) __riscv_vnsrl_wx_u16mf4(__VA_ARGS__)
14372
#define vnsrl_wv_u16mf2(...) __riscv_vnsrl_wv_u16mf2(__VA_ARGS__)
14373
#define vnsrl_wx_u16mf2(...) __riscv_vnsrl_wx_u16mf2(__VA_ARGS__)
14374
#define vnsrl_wv_u16m1(...) __riscv_vnsrl_wv_u16m1(__VA_ARGS__)
14375
#define vnsrl_wx_u16m1(...) __riscv_vnsrl_wx_u16m1(__VA_ARGS__)
14376
#define vnsrl_wv_u16m2(...) __riscv_vnsrl_wv_u16m2(__VA_ARGS__)
14377
#define vnsrl_wx_u16m2(...) __riscv_vnsrl_wx_u16m2(__VA_ARGS__)
14378
#define vnsrl_wv_u16m4(...) __riscv_vnsrl_wv_u16m4(__VA_ARGS__)
14379
#define vnsrl_wx_u16m4(...) __riscv_vnsrl_wx_u16m4(__VA_ARGS__)
14380
#define vnsrl_wv_u32mf2(...) __riscv_vnsrl_wv_u32mf2(__VA_ARGS__)
14381
#define vnsrl_wx_u32mf2(...) __riscv_vnsrl_wx_u32mf2(__VA_ARGS__)
14382
#define vnsrl_wv_u32m1(...) __riscv_vnsrl_wv_u32m1(__VA_ARGS__)
14383
#define vnsrl_wx_u32m1(...) __riscv_vnsrl_wx_u32m1(__VA_ARGS__)
14384
#define vnsrl_wv_u32m2(...) __riscv_vnsrl_wv_u32m2(__VA_ARGS__)
14385
#define vnsrl_wx_u32m2(...) __riscv_vnsrl_wx_u32m2(__VA_ARGS__)
14386
#define vnsrl_wv_u32m4(...) __riscv_vnsrl_wv_u32m4(__VA_ARGS__)
14387
#define vnsrl_wx_u32m4(...) __riscv_vnsrl_wx_u32m4(__VA_ARGS__)
14388
// masked functions
14389
#define vnsra_wv_i8mf8_m(...) __riscv_vnsra_wv_i8mf8_tumu(__VA_ARGS__)
14390
#define vnsra_wx_i8mf8_m(...) __riscv_vnsra_wx_i8mf8_tumu(__VA_ARGS__)
14391
#define vnsra_wv_i8mf4_m(...) __riscv_vnsra_wv_i8mf4_tumu(__VA_ARGS__)
14392
#define vnsra_wx_i8mf4_m(...) __riscv_vnsra_wx_i8mf4_tumu(__VA_ARGS__)
14393
#define vnsra_wv_i8mf2_m(...) __riscv_vnsra_wv_i8mf2_tumu(__VA_ARGS__)
14394
#define vnsra_wx_i8mf2_m(...) __riscv_vnsra_wx_i8mf2_tumu(__VA_ARGS__)
14395
#define vnsra_wv_i8m1_m(...) __riscv_vnsra_wv_i8m1_tumu(__VA_ARGS__)
14396
#define vnsra_wx_i8m1_m(...) __riscv_vnsra_wx_i8m1_tumu(__VA_ARGS__)
14397
#define vnsra_wv_i8m2_m(...) __riscv_vnsra_wv_i8m2_tumu(__VA_ARGS__)
14398
#define vnsra_wx_i8m2_m(...) __riscv_vnsra_wx_i8m2_tumu(__VA_ARGS__)
14399
#define vnsra_wv_i8m4_m(...) __riscv_vnsra_wv_i8m4_tumu(__VA_ARGS__)
14400
#define vnsra_wx_i8m4_m(...) __riscv_vnsra_wx_i8m4_tumu(__VA_ARGS__)
14401
#define vnsra_wv_i16mf4_m(...) __riscv_vnsra_wv_i16mf4_tumu(__VA_ARGS__)
14402
#define vnsra_wx_i16mf4_m(...) __riscv_vnsra_wx_i16mf4_tumu(__VA_ARGS__)
14403
#define vnsra_wv_i16mf2_m(...) __riscv_vnsra_wv_i16mf2_tumu(__VA_ARGS__)
14404
#define vnsra_wx_i16mf2_m(...) __riscv_vnsra_wx_i16mf2_tumu(__VA_ARGS__)
14405
#define vnsra_wv_i16m1_m(...) __riscv_vnsra_wv_i16m1_tumu(__VA_ARGS__)
14406
#define vnsra_wx_i16m1_m(...) __riscv_vnsra_wx_i16m1_tumu(__VA_ARGS__)
14407
#define vnsra_wv_i16m2_m(...) __riscv_vnsra_wv_i16m2_tumu(__VA_ARGS__)
14408
#define vnsra_wx_i16m2_m(...) __riscv_vnsra_wx_i16m2_tumu(__VA_ARGS__)
14409
#define vnsra_wv_i16m4_m(...) __riscv_vnsra_wv_i16m4_tumu(__VA_ARGS__)
14410
#define vnsra_wx_i16m4_m(...) __riscv_vnsra_wx_i16m4_tumu(__VA_ARGS__)
14411
#define vnsra_wv_i32mf2_m(...) __riscv_vnsra_wv_i32mf2_tumu(__VA_ARGS__)
14412
#define vnsra_wx_i32mf2_m(...) __riscv_vnsra_wx_i32mf2_tumu(__VA_ARGS__)
14413
#define vnsra_wv_i32m1_m(...) __riscv_vnsra_wv_i32m1_tumu(__VA_ARGS__)
14414
#define vnsra_wx_i32m1_m(...) __riscv_vnsra_wx_i32m1_tumu(__VA_ARGS__)
14415
#define vnsra_wv_i32m2_m(...) __riscv_vnsra_wv_i32m2_tumu(__VA_ARGS__)
14416
#define vnsra_wx_i32m2_m(...) __riscv_vnsra_wx_i32m2_tumu(__VA_ARGS__)
14417
#define vnsra_wv_i32m4_m(...) __riscv_vnsra_wv_i32m4_tumu(__VA_ARGS__)
14418
#define vnsra_wx_i32m4_m(...) __riscv_vnsra_wx_i32m4_tumu(__VA_ARGS__)
14419
#define vnsrl_wv_u8mf8_m(...) __riscv_vnsrl_wv_u8mf8_tumu(__VA_ARGS__)
14420
#define vnsrl_wx_u8mf8_m(...) __riscv_vnsrl_wx_u8mf8_tumu(__VA_ARGS__)
14421
#define vnsrl_wv_u8mf4_m(...) __riscv_vnsrl_wv_u8mf4_tumu(__VA_ARGS__)
14422
#define vnsrl_wx_u8mf4_m(...) __riscv_vnsrl_wx_u8mf4_tumu(__VA_ARGS__)
14423
#define vnsrl_wv_u8mf2_m(...) __riscv_vnsrl_wv_u8mf2_tumu(__VA_ARGS__)
14424
#define vnsrl_wx_u8mf2_m(...) __riscv_vnsrl_wx_u8mf2_tumu(__VA_ARGS__)
14425
#define vnsrl_wv_u8m1_m(...) __riscv_vnsrl_wv_u8m1_tumu(__VA_ARGS__)
14426
#define vnsrl_wx_u8m1_m(...) __riscv_vnsrl_wx_u8m1_tumu(__VA_ARGS__)
14427
#define vnsrl_wv_u8m2_m(...) __riscv_vnsrl_wv_u8m2_tumu(__VA_ARGS__)
14428
#define vnsrl_wx_u8m2_m(...) __riscv_vnsrl_wx_u8m2_tumu(__VA_ARGS__)
14429
#define vnsrl_wv_u8m4_m(...) __riscv_vnsrl_wv_u8m4_tumu(__VA_ARGS__)
14430
#define vnsrl_wx_u8m4_m(...) __riscv_vnsrl_wx_u8m4_tumu(__VA_ARGS__)
14431
#define vnsrl_wv_u16mf4_m(...) __riscv_vnsrl_wv_u16mf4_tumu(__VA_ARGS__)
14432
#define vnsrl_wx_u16mf4_m(...) __riscv_vnsrl_wx_u16mf4_tumu(__VA_ARGS__)
14433
#define vnsrl_wv_u16mf2_m(...) __riscv_vnsrl_wv_u16mf2_tumu(__VA_ARGS__)
14434
#define vnsrl_wx_u16mf2_m(...) __riscv_vnsrl_wx_u16mf2_tumu(__VA_ARGS__)
14435
#define vnsrl_wv_u16m1_m(...) __riscv_vnsrl_wv_u16m1_tumu(__VA_ARGS__)
14436
#define vnsrl_wx_u16m1_m(...) __riscv_vnsrl_wx_u16m1_tumu(__VA_ARGS__)
14437
#define vnsrl_wv_u16m2_m(...) __riscv_vnsrl_wv_u16m2_tumu(__VA_ARGS__)
14438
#define vnsrl_wx_u16m2_m(...) __riscv_vnsrl_wx_u16m2_tumu(__VA_ARGS__)
14439
#define vnsrl_wv_u16m4_m(...) __riscv_vnsrl_wv_u16m4_tumu(__VA_ARGS__)
14440
#define vnsrl_wx_u16m4_m(...) __riscv_vnsrl_wx_u16m4_tumu(__VA_ARGS__)
14441
#define vnsrl_wv_u32mf2_m(...) __riscv_vnsrl_wv_u32mf2_tumu(__VA_ARGS__)
14442
#define vnsrl_wx_u32mf2_m(...) __riscv_vnsrl_wx_u32mf2_tumu(__VA_ARGS__)
14443
#define vnsrl_wv_u32m1_m(...) __riscv_vnsrl_wv_u32m1_tumu(__VA_ARGS__)
14444
#define vnsrl_wx_u32m1_m(...) __riscv_vnsrl_wx_u32m1_tumu(__VA_ARGS__)
14445
#define vnsrl_wv_u32m2_m(...) __riscv_vnsrl_wv_u32m2_tumu(__VA_ARGS__)
14446
#define vnsrl_wx_u32m2_m(...) __riscv_vnsrl_wx_u32m2_tumu(__VA_ARGS__)
14447
#define vnsrl_wv_u32m4_m(...) __riscv_vnsrl_wv_u32m4_tumu(__VA_ARGS__)
14448
#define vnsrl_wx_u32m4_m(...) __riscv_vnsrl_wx_u32m4_tumu(__VA_ARGS__)
14449
#define vmseq_vv_i8mf8_b64(...) __riscv_vmseq_vv_i8mf8_b64(__VA_ARGS__)
14450
#define vmseq_vx_i8mf8_b64(...) __riscv_vmseq_vx_i8mf8_b64(__VA_ARGS__)
14451
#define vmseq_vv_i8mf4_b32(...) __riscv_vmseq_vv_i8mf4_b32(__VA_ARGS__)
14452
#define vmseq_vx_i8mf4_b32(...) __riscv_vmseq_vx_i8mf4_b32(__VA_ARGS__)
14453
#define vmseq_vv_i8mf2_b16(...) __riscv_vmseq_vv_i8mf2_b16(__VA_ARGS__)
14454
#define vmseq_vx_i8mf2_b16(...) __riscv_vmseq_vx_i8mf2_b16(__VA_ARGS__)
14455
#define vmseq_vv_i8m1_b8(...) __riscv_vmseq_vv_i8m1_b8(__VA_ARGS__)
14456
#define vmseq_vx_i8m1_b8(...) __riscv_vmseq_vx_i8m1_b8(__VA_ARGS__)
14457
#define vmseq_vv_i8m2_b4(...) __riscv_vmseq_vv_i8m2_b4(__VA_ARGS__)
14458
#define vmseq_vx_i8m2_b4(...) __riscv_vmseq_vx_i8m2_b4(__VA_ARGS__)
14459
#define vmseq_vv_i8m4_b2(...) __riscv_vmseq_vv_i8m4_b2(__VA_ARGS__)
14460
#define vmseq_vx_i8m4_b2(...) __riscv_vmseq_vx_i8m4_b2(__VA_ARGS__)
14461
#define vmseq_vv_i8m8_b1(...) __riscv_vmseq_vv_i8m8_b1(__VA_ARGS__)
14462
#define vmseq_vx_i8m8_b1(...) __riscv_vmseq_vx_i8m8_b1(__VA_ARGS__)
14463
#define vmseq_vv_i16mf4_b64(...) __riscv_vmseq_vv_i16mf4_b64(__VA_ARGS__)
14464
#define vmseq_vx_i16mf4_b64(...) __riscv_vmseq_vx_i16mf4_b64(__VA_ARGS__)
14465
#define vmseq_vv_i16mf2_b32(...) __riscv_vmseq_vv_i16mf2_b32(__VA_ARGS__)
14466
#define vmseq_vx_i16mf2_b32(...) __riscv_vmseq_vx_i16mf2_b32(__VA_ARGS__)
14467
#define vmseq_vv_i16m1_b16(...) __riscv_vmseq_vv_i16m1_b16(__VA_ARGS__)
14468
#define vmseq_vx_i16m1_b16(...) __riscv_vmseq_vx_i16m1_b16(__VA_ARGS__)
14469
#define vmseq_vv_i16m2_b8(...) __riscv_vmseq_vv_i16m2_b8(__VA_ARGS__)
14470
#define vmseq_vx_i16m2_b8(...) __riscv_vmseq_vx_i16m2_b8(__VA_ARGS__)
14471
#define vmseq_vv_i16m4_b4(...) __riscv_vmseq_vv_i16m4_b4(__VA_ARGS__)
14472
#define vmseq_vx_i16m4_b4(...) __riscv_vmseq_vx_i16m4_b4(__VA_ARGS__)
14473
#define vmseq_vv_i16m8_b2(...) __riscv_vmseq_vv_i16m8_b2(__VA_ARGS__)
14474
#define vmseq_vx_i16m8_b2(...) __riscv_vmseq_vx_i16m8_b2(__VA_ARGS__)
14475
#define vmseq_vv_i32mf2_b64(...) __riscv_vmseq_vv_i32mf2_b64(__VA_ARGS__)
14476
#define vmseq_vx_i32mf2_b64(...) __riscv_vmseq_vx_i32mf2_b64(__VA_ARGS__)
14477
#define vmseq_vv_i32m1_b32(...) __riscv_vmseq_vv_i32m1_b32(__VA_ARGS__)
14478
#define vmseq_vx_i32m1_b32(...) __riscv_vmseq_vx_i32m1_b32(__VA_ARGS__)
14479
#define vmseq_vv_i32m2_b16(...) __riscv_vmseq_vv_i32m2_b16(__VA_ARGS__)
14480
#define vmseq_vx_i32m2_b16(...) __riscv_vmseq_vx_i32m2_b16(__VA_ARGS__)
14481
#define vmseq_vv_i32m4_b8(...) __riscv_vmseq_vv_i32m4_b8(__VA_ARGS__)
14482
#define vmseq_vx_i32m4_b8(...) __riscv_vmseq_vx_i32m4_b8(__VA_ARGS__)
14483
#define vmseq_vv_i32m8_b4(...) __riscv_vmseq_vv_i32m8_b4(__VA_ARGS__)
14484
#define vmseq_vx_i32m8_b4(...) __riscv_vmseq_vx_i32m8_b4(__VA_ARGS__)
14485
#define vmseq_vv_i64m1_b64(...) __riscv_vmseq_vv_i64m1_b64(__VA_ARGS__)
14486
#define vmseq_vx_i64m1_b64(...) __riscv_vmseq_vx_i64m1_b64(__VA_ARGS__)
14487
#define vmseq_vv_i64m2_b32(...) __riscv_vmseq_vv_i64m2_b32(__VA_ARGS__)
14488
#define vmseq_vx_i64m2_b32(...) __riscv_vmseq_vx_i64m2_b32(__VA_ARGS__)
14489
#define vmseq_vv_i64m4_b16(...) __riscv_vmseq_vv_i64m4_b16(__VA_ARGS__)
14490
#define vmseq_vx_i64m4_b16(...) __riscv_vmseq_vx_i64m4_b16(__VA_ARGS__)
14491
#define vmseq_vv_i64m8_b8(...) __riscv_vmseq_vv_i64m8_b8(__VA_ARGS__)
14492
#define vmseq_vx_i64m8_b8(...) __riscv_vmseq_vx_i64m8_b8(__VA_ARGS__)
14493
#define vmsne_vv_i8mf8_b64(...) __riscv_vmsne_vv_i8mf8_b64(__VA_ARGS__)
14494
#define vmsne_vx_i8mf8_b64(...) __riscv_vmsne_vx_i8mf8_b64(__VA_ARGS__)
14495
#define vmsne_vv_i8mf4_b32(...) __riscv_vmsne_vv_i8mf4_b32(__VA_ARGS__)
14496
#define vmsne_vx_i8mf4_b32(...) __riscv_vmsne_vx_i8mf4_b32(__VA_ARGS__)
14497
#define vmsne_vv_i8mf2_b16(...) __riscv_vmsne_vv_i8mf2_b16(__VA_ARGS__)
14498
#define vmsne_vx_i8mf2_b16(...) __riscv_vmsne_vx_i8mf2_b16(__VA_ARGS__)
14499
#define vmsne_vv_i8m1_b8(...) __riscv_vmsne_vv_i8m1_b8(__VA_ARGS__)
14500
#define vmsne_vx_i8m1_b8(...) __riscv_vmsne_vx_i8m1_b8(__VA_ARGS__)
14501
#define vmsne_vv_i8m2_b4(...) __riscv_vmsne_vv_i8m2_b4(__VA_ARGS__)
14502
#define vmsne_vx_i8m2_b4(...) __riscv_vmsne_vx_i8m2_b4(__VA_ARGS__)
14503
#define vmsne_vv_i8m4_b2(...) __riscv_vmsne_vv_i8m4_b2(__VA_ARGS__)
14504
#define vmsne_vx_i8m4_b2(...) __riscv_vmsne_vx_i8m4_b2(__VA_ARGS__)
14505
#define vmsne_vv_i8m8_b1(...) __riscv_vmsne_vv_i8m8_b1(__VA_ARGS__)
14506
#define vmsne_vx_i8m8_b1(...) __riscv_vmsne_vx_i8m8_b1(__VA_ARGS__)
14507
#define vmsne_vv_i16mf4_b64(...) __riscv_vmsne_vv_i16mf4_b64(__VA_ARGS__)
14508
#define vmsne_vx_i16mf4_b64(...) __riscv_vmsne_vx_i16mf4_b64(__VA_ARGS__)
14509
#define vmsne_vv_i16mf2_b32(...) __riscv_vmsne_vv_i16mf2_b32(__VA_ARGS__)
14510
#define vmsne_vx_i16mf2_b32(...) __riscv_vmsne_vx_i16mf2_b32(__VA_ARGS__)
14511
#define vmsne_vv_i16m1_b16(...) __riscv_vmsne_vv_i16m1_b16(__VA_ARGS__)
14512
#define vmsne_vx_i16m1_b16(...) __riscv_vmsne_vx_i16m1_b16(__VA_ARGS__)
14513
#define vmsne_vv_i16m2_b8(...) __riscv_vmsne_vv_i16m2_b8(__VA_ARGS__)
14514
#define vmsne_vx_i16m2_b8(...) __riscv_vmsne_vx_i16m2_b8(__VA_ARGS__)
14515
#define vmsne_vv_i16m4_b4(...) __riscv_vmsne_vv_i16m4_b4(__VA_ARGS__)
14516
#define vmsne_vx_i16m4_b4(...) __riscv_vmsne_vx_i16m4_b4(__VA_ARGS__)
14517
#define vmsne_vv_i16m8_b2(...) __riscv_vmsne_vv_i16m8_b2(__VA_ARGS__)
14518
#define vmsne_vx_i16m8_b2(...) __riscv_vmsne_vx_i16m8_b2(__VA_ARGS__)
14519
#define vmsne_vv_i32mf2_b64(...) __riscv_vmsne_vv_i32mf2_b64(__VA_ARGS__)
14520
#define vmsne_vx_i32mf2_b64(...) __riscv_vmsne_vx_i32mf2_b64(__VA_ARGS__)
14521
#define vmsne_vv_i32m1_b32(...) __riscv_vmsne_vv_i32m1_b32(__VA_ARGS__)
14522
#define vmsne_vx_i32m1_b32(...) __riscv_vmsne_vx_i32m1_b32(__VA_ARGS__)
14523
#define vmsne_vv_i32m2_b16(...) __riscv_vmsne_vv_i32m2_b16(__VA_ARGS__)
14524
#define vmsne_vx_i32m2_b16(...) __riscv_vmsne_vx_i32m2_b16(__VA_ARGS__)
14525
#define vmsne_vv_i32m4_b8(...) __riscv_vmsne_vv_i32m4_b8(__VA_ARGS__)
14526
#define vmsne_vx_i32m4_b8(...) __riscv_vmsne_vx_i32m4_b8(__VA_ARGS__)
14527
#define vmsne_vv_i32m8_b4(...) __riscv_vmsne_vv_i32m8_b4(__VA_ARGS__)
14528
#define vmsne_vx_i32m8_b4(...) __riscv_vmsne_vx_i32m8_b4(__VA_ARGS__)
14529
#define vmsne_vv_i64m1_b64(...) __riscv_vmsne_vv_i64m1_b64(__VA_ARGS__)
14530
#define vmsne_vx_i64m1_b64(...) __riscv_vmsne_vx_i64m1_b64(__VA_ARGS__)
14531
#define vmsne_vv_i64m2_b32(...) __riscv_vmsne_vv_i64m2_b32(__VA_ARGS__)
14532
#define vmsne_vx_i64m2_b32(...) __riscv_vmsne_vx_i64m2_b32(__VA_ARGS__)
14533
#define vmsne_vv_i64m4_b16(...) __riscv_vmsne_vv_i64m4_b16(__VA_ARGS__)
14534
#define vmsne_vx_i64m4_b16(...) __riscv_vmsne_vx_i64m4_b16(__VA_ARGS__)
14535
#define vmsne_vv_i64m8_b8(...) __riscv_vmsne_vv_i64m8_b8(__VA_ARGS__)
14536
#define vmsne_vx_i64m8_b8(...) __riscv_vmsne_vx_i64m8_b8(__VA_ARGS__)
14537
#define vmslt_vv_i8mf8_b64(...) __riscv_vmslt_vv_i8mf8_b64(__VA_ARGS__)
14538
#define vmslt_vx_i8mf8_b64(...) __riscv_vmslt_vx_i8mf8_b64(__VA_ARGS__)
14539
#define vmslt_vv_i8mf4_b32(...) __riscv_vmslt_vv_i8mf4_b32(__VA_ARGS__)
14540
#define vmslt_vx_i8mf4_b32(...) __riscv_vmslt_vx_i8mf4_b32(__VA_ARGS__)
14541
#define vmslt_vv_i8mf2_b16(...) __riscv_vmslt_vv_i8mf2_b16(__VA_ARGS__)
14542
#define vmslt_vx_i8mf2_b16(...) __riscv_vmslt_vx_i8mf2_b16(__VA_ARGS__)
14543
#define vmslt_vv_i8m1_b8(...) __riscv_vmslt_vv_i8m1_b8(__VA_ARGS__)
14544
#define vmslt_vx_i8m1_b8(...) __riscv_vmslt_vx_i8m1_b8(__VA_ARGS__)
14545
#define vmslt_vv_i8m2_b4(...) __riscv_vmslt_vv_i8m2_b4(__VA_ARGS__)
14546
#define vmslt_vx_i8m2_b4(...) __riscv_vmslt_vx_i8m2_b4(__VA_ARGS__)
14547
#define vmslt_vv_i8m4_b2(...) __riscv_vmslt_vv_i8m4_b2(__VA_ARGS__)
14548
#define vmslt_vx_i8m4_b2(...) __riscv_vmslt_vx_i8m4_b2(__VA_ARGS__)
14549
#define vmslt_vv_i8m8_b1(...) __riscv_vmslt_vv_i8m8_b1(__VA_ARGS__)
14550
#define vmslt_vx_i8m8_b1(...) __riscv_vmslt_vx_i8m8_b1(__VA_ARGS__)
14551
#define vmslt_vv_i16mf4_b64(...) __riscv_vmslt_vv_i16mf4_b64(__VA_ARGS__)
14552
#define vmslt_vx_i16mf4_b64(...) __riscv_vmslt_vx_i16mf4_b64(__VA_ARGS__)
14553
#define vmslt_vv_i16mf2_b32(...) __riscv_vmslt_vv_i16mf2_b32(__VA_ARGS__)
14554
#define vmslt_vx_i16mf2_b32(...) __riscv_vmslt_vx_i16mf2_b32(__VA_ARGS__)
14555
#define vmslt_vv_i16m1_b16(...) __riscv_vmslt_vv_i16m1_b16(__VA_ARGS__)
14556
#define vmslt_vx_i16m1_b16(...) __riscv_vmslt_vx_i16m1_b16(__VA_ARGS__)
14557
#define vmslt_vv_i16m2_b8(...) __riscv_vmslt_vv_i16m2_b8(__VA_ARGS__)
14558
#define vmslt_vx_i16m2_b8(...) __riscv_vmslt_vx_i16m2_b8(__VA_ARGS__)
14559
#define vmslt_vv_i16m4_b4(...) __riscv_vmslt_vv_i16m4_b4(__VA_ARGS__)
14560
#define vmslt_vx_i16m4_b4(...) __riscv_vmslt_vx_i16m4_b4(__VA_ARGS__)
14561
#define vmslt_vv_i16m8_b2(...) __riscv_vmslt_vv_i16m8_b2(__VA_ARGS__)
14562
#define vmslt_vx_i16m8_b2(...) __riscv_vmslt_vx_i16m8_b2(__VA_ARGS__)
14563
#define vmslt_vv_i32mf2_b64(...) __riscv_vmslt_vv_i32mf2_b64(__VA_ARGS__)
14564
#define vmslt_vx_i32mf2_b64(...) __riscv_vmslt_vx_i32mf2_b64(__VA_ARGS__)
14565
#define vmslt_vv_i32m1_b32(...) __riscv_vmslt_vv_i32m1_b32(__VA_ARGS__)
14566
#define vmslt_vx_i32m1_b32(...) __riscv_vmslt_vx_i32m1_b32(__VA_ARGS__)
14567
#define vmslt_vv_i32m2_b16(...) __riscv_vmslt_vv_i32m2_b16(__VA_ARGS__)
14568
#define vmslt_vx_i32m2_b16(...) __riscv_vmslt_vx_i32m2_b16(__VA_ARGS__)
14569
#define vmslt_vv_i32m4_b8(...) __riscv_vmslt_vv_i32m4_b8(__VA_ARGS__)
14570
#define vmslt_vx_i32m4_b8(...) __riscv_vmslt_vx_i32m4_b8(__VA_ARGS__)
14571
#define vmslt_vv_i32m8_b4(...) __riscv_vmslt_vv_i32m8_b4(__VA_ARGS__)
14572
#define vmslt_vx_i32m8_b4(...) __riscv_vmslt_vx_i32m8_b4(__VA_ARGS__)
14573
#define vmslt_vv_i64m1_b64(...) __riscv_vmslt_vv_i64m1_b64(__VA_ARGS__)
14574
#define vmslt_vx_i64m1_b64(...) __riscv_vmslt_vx_i64m1_b64(__VA_ARGS__)
14575
#define vmslt_vv_i64m2_b32(...) __riscv_vmslt_vv_i64m2_b32(__VA_ARGS__)
14576
#define vmslt_vx_i64m2_b32(...) __riscv_vmslt_vx_i64m2_b32(__VA_ARGS__)
14577
#define vmslt_vv_i64m4_b16(...) __riscv_vmslt_vv_i64m4_b16(__VA_ARGS__)
14578
#define vmslt_vx_i64m4_b16(...) __riscv_vmslt_vx_i64m4_b16(__VA_ARGS__)
14579
#define vmslt_vv_i64m8_b8(...) __riscv_vmslt_vv_i64m8_b8(__VA_ARGS__)
14580
#define vmslt_vx_i64m8_b8(...) __riscv_vmslt_vx_i64m8_b8(__VA_ARGS__)
14581
#define vmsle_vv_i8mf8_b64(...) __riscv_vmsle_vv_i8mf8_b64(__VA_ARGS__)
14582
#define vmsle_vx_i8mf8_b64(...) __riscv_vmsle_vx_i8mf8_b64(__VA_ARGS__)
14583
#define vmsle_vv_i8mf4_b32(...) __riscv_vmsle_vv_i8mf4_b32(__VA_ARGS__)
14584
#define vmsle_vx_i8mf4_b32(...) __riscv_vmsle_vx_i8mf4_b32(__VA_ARGS__)
14585
#define vmsle_vv_i8mf2_b16(...) __riscv_vmsle_vv_i8mf2_b16(__VA_ARGS__)
14586
#define vmsle_vx_i8mf2_b16(...) __riscv_vmsle_vx_i8mf2_b16(__VA_ARGS__)
14587
#define vmsle_vv_i8m1_b8(...) __riscv_vmsle_vv_i8m1_b8(__VA_ARGS__)
14588
#define vmsle_vx_i8m1_b8(...) __riscv_vmsle_vx_i8m1_b8(__VA_ARGS__)
14589
#define vmsle_vv_i8m2_b4(...) __riscv_vmsle_vv_i8m2_b4(__VA_ARGS__)
14590
#define vmsle_vx_i8m2_b4(...) __riscv_vmsle_vx_i8m2_b4(__VA_ARGS__)
14591
#define vmsle_vv_i8m4_b2(...) __riscv_vmsle_vv_i8m4_b2(__VA_ARGS__)
14592
#define vmsle_vx_i8m4_b2(...) __riscv_vmsle_vx_i8m4_b2(__VA_ARGS__)
14593
#define vmsle_vv_i8m8_b1(...) __riscv_vmsle_vv_i8m8_b1(__VA_ARGS__)
14594
#define vmsle_vx_i8m8_b1(...) __riscv_vmsle_vx_i8m8_b1(__VA_ARGS__)
14595
#define vmsle_vv_i16mf4_b64(...) __riscv_vmsle_vv_i16mf4_b64(__VA_ARGS__)
14596
#define vmsle_vx_i16mf4_b64(...) __riscv_vmsle_vx_i16mf4_b64(__VA_ARGS__)
14597
#define vmsle_vv_i16mf2_b32(...) __riscv_vmsle_vv_i16mf2_b32(__VA_ARGS__)
14598
#define vmsle_vx_i16mf2_b32(...) __riscv_vmsle_vx_i16mf2_b32(__VA_ARGS__)
14599
#define vmsle_vv_i16m1_b16(...) __riscv_vmsle_vv_i16m1_b16(__VA_ARGS__)
14600
#define vmsle_vx_i16m1_b16(...) __riscv_vmsle_vx_i16m1_b16(__VA_ARGS__)
14601
#define vmsle_vv_i16m2_b8(...) __riscv_vmsle_vv_i16m2_b8(__VA_ARGS__)
14602
#define vmsle_vx_i16m2_b8(...) __riscv_vmsle_vx_i16m2_b8(__VA_ARGS__)
14603
#define vmsle_vv_i16m4_b4(...) __riscv_vmsle_vv_i16m4_b4(__VA_ARGS__)
14604
#define vmsle_vx_i16m4_b4(...) __riscv_vmsle_vx_i16m4_b4(__VA_ARGS__)
14605
#define vmsle_vv_i16m8_b2(...) __riscv_vmsle_vv_i16m8_b2(__VA_ARGS__)
14606
#define vmsle_vx_i16m8_b2(...) __riscv_vmsle_vx_i16m8_b2(__VA_ARGS__)
14607
#define vmsle_vv_i32mf2_b64(...) __riscv_vmsle_vv_i32mf2_b64(__VA_ARGS__)
14608
#define vmsle_vx_i32mf2_b64(...) __riscv_vmsle_vx_i32mf2_b64(__VA_ARGS__)
14609
#define vmsle_vv_i32m1_b32(...) __riscv_vmsle_vv_i32m1_b32(__VA_ARGS__)
14610
#define vmsle_vx_i32m1_b32(...) __riscv_vmsle_vx_i32m1_b32(__VA_ARGS__)
14611
#define vmsle_vv_i32m2_b16(...) __riscv_vmsle_vv_i32m2_b16(__VA_ARGS__)
14612
#define vmsle_vx_i32m2_b16(...) __riscv_vmsle_vx_i32m2_b16(__VA_ARGS__)
14613
#define vmsle_vv_i32m4_b8(...) __riscv_vmsle_vv_i32m4_b8(__VA_ARGS__)
14614
#define vmsle_vx_i32m4_b8(...) __riscv_vmsle_vx_i32m4_b8(__VA_ARGS__)
14615
#define vmsle_vv_i32m8_b4(...) __riscv_vmsle_vv_i32m8_b4(__VA_ARGS__)
14616
#define vmsle_vx_i32m8_b4(...) __riscv_vmsle_vx_i32m8_b4(__VA_ARGS__)
14617
#define vmsle_vv_i64m1_b64(...) __riscv_vmsle_vv_i64m1_b64(__VA_ARGS__)
14618
#define vmsle_vx_i64m1_b64(...) __riscv_vmsle_vx_i64m1_b64(__VA_ARGS__)
14619
#define vmsle_vv_i64m2_b32(...) __riscv_vmsle_vv_i64m2_b32(__VA_ARGS__)
14620
#define vmsle_vx_i64m2_b32(...) __riscv_vmsle_vx_i64m2_b32(__VA_ARGS__)
14621
#define vmsle_vv_i64m4_b16(...) __riscv_vmsle_vv_i64m4_b16(__VA_ARGS__)
14622
#define vmsle_vx_i64m4_b16(...) __riscv_vmsle_vx_i64m4_b16(__VA_ARGS__)
14623
#define vmsle_vv_i64m8_b8(...) __riscv_vmsle_vv_i64m8_b8(__VA_ARGS__)
14624
#define vmsle_vx_i64m8_b8(...) __riscv_vmsle_vx_i64m8_b8(__VA_ARGS__)
14625
#define vmsgt_vv_i8mf8_b64(...) __riscv_vmsgt_vv_i8mf8_b64(__VA_ARGS__)
14626
#define vmsgt_vx_i8mf8_b64(...) __riscv_vmsgt_vx_i8mf8_b64(__VA_ARGS__)
14627
#define vmsgt_vv_i8mf4_b32(...) __riscv_vmsgt_vv_i8mf4_b32(__VA_ARGS__)
14628
#define vmsgt_vx_i8mf4_b32(...) __riscv_vmsgt_vx_i8mf4_b32(__VA_ARGS__)
14629
#define vmsgt_vv_i8mf2_b16(...) __riscv_vmsgt_vv_i8mf2_b16(__VA_ARGS__)
14630
#define vmsgt_vx_i8mf2_b16(...) __riscv_vmsgt_vx_i8mf2_b16(__VA_ARGS__)
14631
#define vmsgt_vv_i8m1_b8(...) __riscv_vmsgt_vv_i8m1_b8(__VA_ARGS__)
14632
#define vmsgt_vx_i8m1_b8(...) __riscv_vmsgt_vx_i8m1_b8(__VA_ARGS__)
14633
#define vmsgt_vv_i8m2_b4(...) __riscv_vmsgt_vv_i8m2_b4(__VA_ARGS__)
14634
#define vmsgt_vx_i8m2_b4(...) __riscv_vmsgt_vx_i8m2_b4(__VA_ARGS__)
14635
#define vmsgt_vv_i8m4_b2(...) __riscv_vmsgt_vv_i8m4_b2(__VA_ARGS__)
14636
#define vmsgt_vx_i8m4_b2(...) __riscv_vmsgt_vx_i8m4_b2(__VA_ARGS__)
14637
#define vmsgt_vv_i8m8_b1(...) __riscv_vmsgt_vv_i8m8_b1(__VA_ARGS__)
14638
#define vmsgt_vx_i8m8_b1(...) __riscv_vmsgt_vx_i8m8_b1(__VA_ARGS__)
14639
#define vmsgt_vv_i16mf4_b64(...) __riscv_vmsgt_vv_i16mf4_b64(__VA_ARGS__)
14640
#define vmsgt_vx_i16mf4_b64(...) __riscv_vmsgt_vx_i16mf4_b64(__VA_ARGS__)
14641
#define vmsgt_vv_i16mf2_b32(...) __riscv_vmsgt_vv_i16mf2_b32(__VA_ARGS__)
14642
#define vmsgt_vx_i16mf2_b32(...) __riscv_vmsgt_vx_i16mf2_b32(__VA_ARGS__)
14643
#define vmsgt_vv_i16m1_b16(...) __riscv_vmsgt_vv_i16m1_b16(__VA_ARGS__)
14644
#define vmsgt_vx_i16m1_b16(...) __riscv_vmsgt_vx_i16m1_b16(__VA_ARGS__)
14645
#define vmsgt_vv_i16m2_b8(...) __riscv_vmsgt_vv_i16m2_b8(__VA_ARGS__)
14646
#define vmsgt_vx_i16m2_b8(...) __riscv_vmsgt_vx_i16m2_b8(__VA_ARGS__)
14647
#define vmsgt_vv_i16m4_b4(...) __riscv_vmsgt_vv_i16m4_b4(__VA_ARGS__)
14648
#define vmsgt_vx_i16m4_b4(...) __riscv_vmsgt_vx_i16m4_b4(__VA_ARGS__)
14649
#define vmsgt_vv_i16m8_b2(...) __riscv_vmsgt_vv_i16m8_b2(__VA_ARGS__)
14650
#define vmsgt_vx_i16m8_b2(...) __riscv_vmsgt_vx_i16m8_b2(__VA_ARGS__)
14651
#define vmsgt_vv_i32mf2_b64(...) __riscv_vmsgt_vv_i32mf2_b64(__VA_ARGS__)
14652
#define vmsgt_vx_i32mf2_b64(...) __riscv_vmsgt_vx_i32mf2_b64(__VA_ARGS__)
14653
#define vmsgt_vv_i32m1_b32(...) __riscv_vmsgt_vv_i32m1_b32(__VA_ARGS__)
14654
#define vmsgt_vx_i32m1_b32(...) __riscv_vmsgt_vx_i32m1_b32(__VA_ARGS__)
14655
#define vmsgt_vv_i32m2_b16(...) __riscv_vmsgt_vv_i32m2_b16(__VA_ARGS__)
14656
#define vmsgt_vx_i32m2_b16(...) __riscv_vmsgt_vx_i32m2_b16(__VA_ARGS__)
14657
#define vmsgt_vv_i32m4_b8(...) __riscv_vmsgt_vv_i32m4_b8(__VA_ARGS__)
14658
#define vmsgt_vx_i32m4_b8(...) __riscv_vmsgt_vx_i32m4_b8(__VA_ARGS__)
14659
#define vmsgt_vv_i32m8_b4(...) __riscv_vmsgt_vv_i32m8_b4(__VA_ARGS__)
14660
#define vmsgt_vx_i32m8_b4(...) __riscv_vmsgt_vx_i32m8_b4(__VA_ARGS__)
14661
#define vmsgt_vv_i64m1_b64(...) __riscv_vmsgt_vv_i64m1_b64(__VA_ARGS__)
14662
#define vmsgt_vx_i64m1_b64(...) __riscv_vmsgt_vx_i64m1_b64(__VA_ARGS__)
14663
#define vmsgt_vv_i64m2_b32(...) __riscv_vmsgt_vv_i64m2_b32(__VA_ARGS__)
14664
#define vmsgt_vx_i64m2_b32(...) __riscv_vmsgt_vx_i64m2_b32(__VA_ARGS__)
14665
#define vmsgt_vv_i64m4_b16(...) __riscv_vmsgt_vv_i64m4_b16(__VA_ARGS__)
14666
#define vmsgt_vx_i64m4_b16(...) __riscv_vmsgt_vx_i64m4_b16(__VA_ARGS__)
14667
#define vmsgt_vv_i64m8_b8(...) __riscv_vmsgt_vv_i64m8_b8(__VA_ARGS__)
14668
#define vmsgt_vx_i64m8_b8(...) __riscv_vmsgt_vx_i64m8_b8(__VA_ARGS__)
14669
#define vmsge_vv_i8mf8_b64(...) __riscv_vmsge_vv_i8mf8_b64(__VA_ARGS__)
14670
#define vmsge_vx_i8mf8_b64(...) __riscv_vmsge_vx_i8mf8_b64(__VA_ARGS__)
14671
#define vmsge_vv_i8mf4_b32(...) __riscv_vmsge_vv_i8mf4_b32(__VA_ARGS__)
14672
#define vmsge_vx_i8mf4_b32(...) __riscv_vmsge_vx_i8mf4_b32(__VA_ARGS__)
14673
#define vmsge_vv_i8mf2_b16(...) __riscv_vmsge_vv_i8mf2_b16(__VA_ARGS__)
14674
#define vmsge_vx_i8mf2_b16(...) __riscv_vmsge_vx_i8mf2_b16(__VA_ARGS__)
14675
#define vmsge_vv_i8m1_b8(...) __riscv_vmsge_vv_i8m1_b8(__VA_ARGS__)
14676
#define vmsge_vx_i8m1_b8(...) __riscv_vmsge_vx_i8m1_b8(__VA_ARGS__)
14677
#define vmsge_vv_i8m2_b4(...) __riscv_vmsge_vv_i8m2_b4(__VA_ARGS__)
14678
#define vmsge_vx_i8m2_b4(...) __riscv_vmsge_vx_i8m2_b4(__VA_ARGS__)
14679
#define vmsge_vv_i8m4_b2(...) __riscv_vmsge_vv_i8m4_b2(__VA_ARGS__)
14680
#define vmsge_vx_i8m4_b2(...) __riscv_vmsge_vx_i8m4_b2(__VA_ARGS__)
14681
#define vmsge_vv_i8m8_b1(...) __riscv_vmsge_vv_i8m8_b1(__VA_ARGS__)
14682
#define vmsge_vx_i8m8_b1(...) __riscv_vmsge_vx_i8m8_b1(__VA_ARGS__)
14683
#define vmsge_vv_i16mf4_b64(...) __riscv_vmsge_vv_i16mf4_b64(__VA_ARGS__)
14684
#define vmsge_vx_i16mf4_b64(...) __riscv_vmsge_vx_i16mf4_b64(__VA_ARGS__)
14685
#define vmsge_vv_i16mf2_b32(...) __riscv_vmsge_vv_i16mf2_b32(__VA_ARGS__)
14686
#define vmsge_vx_i16mf2_b32(...) __riscv_vmsge_vx_i16mf2_b32(__VA_ARGS__)
14687
#define vmsge_vv_i16m1_b16(...) __riscv_vmsge_vv_i16m1_b16(__VA_ARGS__)
14688
#define vmsge_vx_i16m1_b16(...) __riscv_vmsge_vx_i16m1_b16(__VA_ARGS__)
14689
#define vmsge_vv_i16m2_b8(...) __riscv_vmsge_vv_i16m2_b8(__VA_ARGS__)
14690
#define vmsge_vx_i16m2_b8(...) __riscv_vmsge_vx_i16m2_b8(__VA_ARGS__)
14691
#define vmsge_vv_i16m4_b4(...) __riscv_vmsge_vv_i16m4_b4(__VA_ARGS__)
14692
#define vmsge_vx_i16m4_b4(...) __riscv_vmsge_vx_i16m4_b4(__VA_ARGS__)
14693
#define vmsge_vv_i16m8_b2(...) __riscv_vmsge_vv_i16m8_b2(__VA_ARGS__)
14694
#define vmsge_vx_i16m8_b2(...) __riscv_vmsge_vx_i16m8_b2(__VA_ARGS__)
14695
#define vmsge_vv_i32mf2_b64(...) __riscv_vmsge_vv_i32mf2_b64(__VA_ARGS__)
14696
#define vmsge_vx_i32mf2_b64(...) __riscv_vmsge_vx_i32mf2_b64(__VA_ARGS__)
14697
#define vmsge_vv_i32m1_b32(...) __riscv_vmsge_vv_i32m1_b32(__VA_ARGS__)
14698
#define vmsge_vx_i32m1_b32(...) __riscv_vmsge_vx_i32m1_b32(__VA_ARGS__)
14699
#define vmsge_vv_i32m2_b16(...) __riscv_vmsge_vv_i32m2_b16(__VA_ARGS__)
14700
#define vmsge_vx_i32m2_b16(...) __riscv_vmsge_vx_i32m2_b16(__VA_ARGS__)
14701
#define vmsge_vv_i32m4_b8(...) __riscv_vmsge_vv_i32m4_b8(__VA_ARGS__)
14702
#define vmsge_vx_i32m4_b8(...) __riscv_vmsge_vx_i32m4_b8(__VA_ARGS__)
14703
#define vmsge_vv_i32m8_b4(...) __riscv_vmsge_vv_i32m8_b4(__VA_ARGS__)
14704
#define vmsge_vx_i32m8_b4(...) __riscv_vmsge_vx_i32m8_b4(__VA_ARGS__)
14705
#define vmsge_vv_i64m1_b64(...) __riscv_vmsge_vv_i64m1_b64(__VA_ARGS__)
14706
#define vmsge_vx_i64m1_b64(...) __riscv_vmsge_vx_i64m1_b64(__VA_ARGS__)
14707
#define vmsge_vv_i64m2_b32(...) __riscv_vmsge_vv_i64m2_b32(__VA_ARGS__)
14708
#define vmsge_vx_i64m2_b32(...) __riscv_vmsge_vx_i64m2_b32(__VA_ARGS__)
14709
#define vmsge_vv_i64m4_b16(...) __riscv_vmsge_vv_i64m4_b16(__VA_ARGS__)
14710
#define vmsge_vx_i64m4_b16(...) __riscv_vmsge_vx_i64m4_b16(__VA_ARGS__)
14711
#define vmsge_vv_i64m8_b8(...) __riscv_vmsge_vv_i64m8_b8(__VA_ARGS__)
14712
#define vmsge_vx_i64m8_b8(...) __riscv_vmsge_vx_i64m8_b8(__VA_ARGS__)
14713
#define vmseq_vv_u8mf8_b64(...) __riscv_vmseq_vv_u8mf8_b64(__VA_ARGS__)
14714
#define vmseq_vx_u8mf8_b64(...) __riscv_vmseq_vx_u8mf8_b64(__VA_ARGS__)
14715
#define vmseq_vv_u8mf4_b32(...) __riscv_vmseq_vv_u8mf4_b32(__VA_ARGS__)
14716
#define vmseq_vx_u8mf4_b32(...) __riscv_vmseq_vx_u8mf4_b32(__VA_ARGS__)
14717
#define vmseq_vv_u8mf2_b16(...) __riscv_vmseq_vv_u8mf2_b16(__VA_ARGS__)
14718
#define vmseq_vx_u8mf2_b16(...) __riscv_vmseq_vx_u8mf2_b16(__VA_ARGS__)
14719
#define vmseq_vv_u8m1_b8(...) __riscv_vmseq_vv_u8m1_b8(__VA_ARGS__)
14720
#define vmseq_vx_u8m1_b8(...) __riscv_vmseq_vx_u8m1_b8(__VA_ARGS__)
14721
#define vmseq_vv_u8m2_b4(...) __riscv_vmseq_vv_u8m2_b4(__VA_ARGS__)
14722
#define vmseq_vx_u8m2_b4(...) __riscv_vmseq_vx_u8m2_b4(__VA_ARGS__)
14723
#define vmseq_vv_u8m4_b2(...) __riscv_vmseq_vv_u8m4_b2(__VA_ARGS__)
14724
#define vmseq_vx_u8m4_b2(...) __riscv_vmseq_vx_u8m4_b2(__VA_ARGS__)
14725
#define vmseq_vv_u8m8_b1(...) __riscv_vmseq_vv_u8m8_b1(__VA_ARGS__)
14726
#define vmseq_vx_u8m8_b1(...) __riscv_vmseq_vx_u8m8_b1(__VA_ARGS__)
14727
#define vmseq_vv_u16mf4_b64(...) __riscv_vmseq_vv_u16mf4_b64(__VA_ARGS__)
14728
#define vmseq_vx_u16mf4_b64(...) __riscv_vmseq_vx_u16mf4_b64(__VA_ARGS__)
14729
#define vmseq_vv_u16mf2_b32(...) __riscv_vmseq_vv_u16mf2_b32(__VA_ARGS__)
14730
#define vmseq_vx_u16mf2_b32(...) __riscv_vmseq_vx_u16mf2_b32(__VA_ARGS__)
14731
#define vmseq_vv_u16m1_b16(...) __riscv_vmseq_vv_u16m1_b16(__VA_ARGS__)
14732
#define vmseq_vx_u16m1_b16(...) __riscv_vmseq_vx_u16m1_b16(__VA_ARGS__)
14733
#define vmseq_vv_u16m2_b8(...) __riscv_vmseq_vv_u16m2_b8(__VA_ARGS__)
14734
#define vmseq_vx_u16m2_b8(...) __riscv_vmseq_vx_u16m2_b8(__VA_ARGS__)
14735
#define vmseq_vv_u16m4_b4(...) __riscv_vmseq_vv_u16m4_b4(__VA_ARGS__)
14736
#define vmseq_vx_u16m4_b4(...) __riscv_vmseq_vx_u16m4_b4(__VA_ARGS__)
14737
#define vmseq_vv_u16m8_b2(...) __riscv_vmseq_vv_u16m8_b2(__VA_ARGS__)
14738
#define vmseq_vx_u16m8_b2(...) __riscv_vmseq_vx_u16m8_b2(__VA_ARGS__)
14739
#define vmseq_vv_u32mf2_b64(...) __riscv_vmseq_vv_u32mf2_b64(__VA_ARGS__)
14740
#define vmseq_vx_u32mf2_b64(...) __riscv_vmseq_vx_u32mf2_b64(__VA_ARGS__)
14741
#define vmseq_vv_u32m1_b32(...) __riscv_vmseq_vv_u32m1_b32(__VA_ARGS__)
14742
#define vmseq_vx_u32m1_b32(...) __riscv_vmseq_vx_u32m1_b32(__VA_ARGS__)
14743
#define vmseq_vv_u32m2_b16(...) __riscv_vmseq_vv_u32m2_b16(__VA_ARGS__)
14744
#define vmseq_vx_u32m2_b16(...) __riscv_vmseq_vx_u32m2_b16(__VA_ARGS__)
14745
#define vmseq_vv_u32m4_b8(...) __riscv_vmseq_vv_u32m4_b8(__VA_ARGS__)
14746
#define vmseq_vx_u32m4_b8(...) __riscv_vmseq_vx_u32m4_b8(__VA_ARGS__)
14747
#define vmseq_vv_u32m8_b4(...) __riscv_vmseq_vv_u32m8_b4(__VA_ARGS__)
14748
#define vmseq_vx_u32m8_b4(...) __riscv_vmseq_vx_u32m8_b4(__VA_ARGS__)
14749
#define vmseq_vv_u64m1_b64(...) __riscv_vmseq_vv_u64m1_b64(__VA_ARGS__)
14750
#define vmseq_vx_u64m1_b64(...) __riscv_vmseq_vx_u64m1_b64(__VA_ARGS__)
14751
#define vmseq_vv_u64m2_b32(...) __riscv_vmseq_vv_u64m2_b32(__VA_ARGS__)
14752
#define vmseq_vx_u64m2_b32(...) __riscv_vmseq_vx_u64m2_b32(__VA_ARGS__)
14753
#define vmseq_vv_u64m4_b16(...) __riscv_vmseq_vv_u64m4_b16(__VA_ARGS__)
14754
#define vmseq_vx_u64m4_b16(...) __riscv_vmseq_vx_u64m4_b16(__VA_ARGS__)
14755
#define vmseq_vv_u64m8_b8(...) __riscv_vmseq_vv_u64m8_b8(__VA_ARGS__)
14756
#define vmseq_vx_u64m8_b8(...) __riscv_vmseq_vx_u64m8_b8(__VA_ARGS__)
14757
#define vmsne_vv_u8mf8_b64(...) __riscv_vmsne_vv_u8mf8_b64(__VA_ARGS__)
14758
#define vmsne_vx_u8mf8_b64(...) __riscv_vmsne_vx_u8mf8_b64(__VA_ARGS__)
14759
#define vmsne_vv_u8mf4_b32(...) __riscv_vmsne_vv_u8mf4_b32(__VA_ARGS__)
14760
#define vmsne_vx_u8mf4_b32(...) __riscv_vmsne_vx_u8mf4_b32(__VA_ARGS__)
14761
#define vmsne_vv_u8mf2_b16(...) __riscv_vmsne_vv_u8mf2_b16(__VA_ARGS__)
14762
#define vmsne_vx_u8mf2_b16(...) __riscv_vmsne_vx_u8mf2_b16(__VA_ARGS__)
14763
#define vmsne_vv_u8m1_b8(...) __riscv_vmsne_vv_u8m1_b8(__VA_ARGS__)
14764
#define vmsne_vx_u8m1_b8(...) __riscv_vmsne_vx_u8m1_b8(__VA_ARGS__)
14765
#define vmsne_vv_u8m2_b4(...) __riscv_vmsne_vv_u8m2_b4(__VA_ARGS__)
14766
#define vmsne_vx_u8m2_b4(...) __riscv_vmsne_vx_u8m2_b4(__VA_ARGS__)
14767
#define vmsne_vv_u8m4_b2(...) __riscv_vmsne_vv_u8m4_b2(__VA_ARGS__)
14768
#define vmsne_vx_u8m4_b2(...) __riscv_vmsne_vx_u8m4_b2(__VA_ARGS__)
14769
#define vmsne_vv_u8m8_b1(...) __riscv_vmsne_vv_u8m8_b1(__VA_ARGS__)
14770
#define vmsne_vx_u8m8_b1(...) __riscv_vmsne_vx_u8m8_b1(__VA_ARGS__)
14771
#define vmsne_vv_u16mf4_b64(...) __riscv_vmsne_vv_u16mf4_b64(__VA_ARGS__)
14772
#define vmsne_vx_u16mf4_b64(...) __riscv_vmsne_vx_u16mf4_b64(__VA_ARGS__)
14773
#define vmsne_vv_u16mf2_b32(...) __riscv_vmsne_vv_u16mf2_b32(__VA_ARGS__)
14774
#define vmsne_vx_u16mf2_b32(...) __riscv_vmsne_vx_u16mf2_b32(__VA_ARGS__)
14775
#define vmsne_vv_u16m1_b16(...) __riscv_vmsne_vv_u16m1_b16(__VA_ARGS__)
14776
#define vmsne_vx_u16m1_b16(...) __riscv_vmsne_vx_u16m1_b16(__VA_ARGS__)
14777
#define vmsne_vv_u16m2_b8(...) __riscv_vmsne_vv_u16m2_b8(__VA_ARGS__)
14778
#define vmsne_vx_u16m2_b8(...) __riscv_vmsne_vx_u16m2_b8(__VA_ARGS__)
14779
#define vmsne_vv_u16m4_b4(...) __riscv_vmsne_vv_u16m4_b4(__VA_ARGS__)
14780
#define vmsne_vx_u16m4_b4(...) __riscv_vmsne_vx_u16m4_b4(__VA_ARGS__)
14781
#define vmsne_vv_u16m8_b2(...) __riscv_vmsne_vv_u16m8_b2(__VA_ARGS__)
14782
#define vmsne_vx_u16m8_b2(...) __riscv_vmsne_vx_u16m8_b2(__VA_ARGS__)
14783
#define vmsne_vv_u32mf2_b64(...) __riscv_vmsne_vv_u32mf2_b64(__VA_ARGS__)
14784
#define vmsne_vx_u32mf2_b64(...) __riscv_vmsne_vx_u32mf2_b64(__VA_ARGS__)
14785
#define vmsne_vv_u32m1_b32(...) __riscv_vmsne_vv_u32m1_b32(__VA_ARGS__)
14786
#define vmsne_vx_u32m1_b32(...) __riscv_vmsne_vx_u32m1_b32(__VA_ARGS__)
14787
#define vmsne_vv_u32m2_b16(...) __riscv_vmsne_vv_u32m2_b16(__VA_ARGS__)
14788
#define vmsne_vx_u32m2_b16(...) __riscv_vmsne_vx_u32m2_b16(__VA_ARGS__)
14789
#define vmsne_vv_u32m4_b8(...) __riscv_vmsne_vv_u32m4_b8(__VA_ARGS__)
14790
#define vmsne_vx_u32m4_b8(...) __riscv_vmsne_vx_u32m4_b8(__VA_ARGS__)
14791
#define vmsne_vv_u32m8_b4(...) __riscv_vmsne_vv_u32m8_b4(__VA_ARGS__)
14792
#define vmsne_vx_u32m8_b4(...) __riscv_vmsne_vx_u32m8_b4(__VA_ARGS__)
14793
#define vmsne_vv_u64m1_b64(...) __riscv_vmsne_vv_u64m1_b64(__VA_ARGS__)
14794
#define vmsne_vx_u64m1_b64(...) __riscv_vmsne_vx_u64m1_b64(__VA_ARGS__)
14795
#define vmsne_vv_u64m2_b32(...) __riscv_vmsne_vv_u64m2_b32(__VA_ARGS__)
14796
#define vmsne_vx_u64m2_b32(...) __riscv_vmsne_vx_u64m2_b32(__VA_ARGS__)
14797
#define vmsne_vv_u64m4_b16(...) __riscv_vmsne_vv_u64m4_b16(__VA_ARGS__)
14798
#define vmsne_vx_u64m4_b16(...) __riscv_vmsne_vx_u64m4_b16(__VA_ARGS__)
14799
#define vmsne_vv_u64m8_b8(...) __riscv_vmsne_vv_u64m8_b8(__VA_ARGS__)
14800
#define vmsne_vx_u64m8_b8(...) __riscv_vmsne_vx_u64m8_b8(__VA_ARGS__)
14801
#define vmsltu_vv_u8mf8_b64(...) __riscv_vmsltu_vv_u8mf8_b64(__VA_ARGS__)
14802
#define vmsltu_vx_u8mf8_b64(...) __riscv_vmsltu_vx_u8mf8_b64(__VA_ARGS__)
14803
#define vmsltu_vv_u8mf4_b32(...) __riscv_vmsltu_vv_u8mf4_b32(__VA_ARGS__)
14804
#define vmsltu_vx_u8mf4_b32(...) __riscv_vmsltu_vx_u8mf4_b32(__VA_ARGS__)
14805
#define vmsltu_vv_u8mf2_b16(...) __riscv_vmsltu_vv_u8mf2_b16(__VA_ARGS__)
14806
#define vmsltu_vx_u8mf2_b16(...) __riscv_vmsltu_vx_u8mf2_b16(__VA_ARGS__)
14807
#define vmsltu_vv_u8m1_b8(...) __riscv_vmsltu_vv_u8m1_b8(__VA_ARGS__)
14808
#define vmsltu_vx_u8m1_b8(...) __riscv_vmsltu_vx_u8m1_b8(__VA_ARGS__)
14809
#define vmsltu_vv_u8m2_b4(...) __riscv_vmsltu_vv_u8m2_b4(__VA_ARGS__)
14810
#define vmsltu_vx_u8m2_b4(...) __riscv_vmsltu_vx_u8m2_b4(__VA_ARGS__)
14811
#define vmsltu_vv_u8m4_b2(...) __riscv_vmsltu_vv_u8m4_b2(__VA_ARGS__)
14812
#define vmsltu_vx_u8m4_b2(...) __riscv_vmsltu_vx_u8m4_b2(__VA_ARGS__)
14813
#define vmsltu_vv_u8m8_b1(...) __riscv_vmsltu_vv_u8m8_b1(__VA_ARGS__)
14814
#define vmsltu_vx_u8m8_b1(...) __riscv_vmsltu_vx_u8m8_b1(__VA_ARGS__)
14815
#define vmsltu_vv_u16mf4_b64(...) __riscv_vmsltu_vv_u16mf4_b64(__VA_ARGS__)
14816
#define vmsltu_vx_u16mf4_b64(...) __riscv_vmsltu_vx_u16mf4_b64(__VA_ARGS__)
14817
#define vmsltu_vv_u16mf2_b32(...) __riscv_vmsltu_vv_u16mf2_b32(__VA_ARGS__)
14818
#define vmsltu_vx_u16mf2_b32(...) __riscv_vmsltu_vx_u16mf2_b32(__VA_ARGS__)
14819
#define vmsltu_vv_u16m1_b16(...) __riscv_vmsltu_vv_u16m1_b16(__VA_ARGS__)
14820
#define vmsltu_vx_u16m1_b16(...) __riscv_vmsltu_vx_u16m1_b16(__VA_ARGS__)
14821
#define vmsltu_vv_u16m2_b8(...) __riscv_vmsltu_vv_u16m2_b8(__VA_ARGS__)
14822
#define vmsltu_vx_u16m2_b8(...) __riscv_vmsltu_vx_u16m2_b8(__VA_ARGS__)
14823
#define vmsltu_vv_u16m4_b4(...) __riscv_vmsltu_vv_u16m4_b4(__VA_ARGS__)
14824
#define vmsltu_vx_u16m4_b4(...) __riscv_vmsltu_vx_u16m4_b4(__VA_ARGS__)
14825
#define vmsltu_vv_u16m8_b2(...) __riscv_vmsltu_vv_u16m8_b2(__VA_ARGS__)
14826
#define vmsltu_vx_u16m8_b2(...) __riscv_vmsltu_vx_u16m8_b2(__VA_ARGS__)
14827
#define vmsltu_vv_u32mf2_b64(...) __riscv_vmsltu_vv_u32mf2_b64(__VA_ARGS__)
14828
#define vmsltu_vx_u32mf2_b64(...) __riscv_vmsltu_vx_u32mf2_b64(__VA_ARGS__)
14829
#define vmsltu_vv_u32m1_b32(...) __riscv_vmsltu_vv_u32m1_b32(__VA_ARGS__)
14830
#define vmsltu_vx_u32m1_b32(...) __riscv_vmsltu_vx_u32m1_b32(__VA_ARGS__)
14831
#define vmsltu_vv_u32m2_b16(...) __riscv_vmsltu_vv_u32m2_b16(__VA_ARGS__)
14832
#define vmsltu_vx_u32m2_b16(...) __riscv_vmsltu_vx_u32m2_b16(__VA_ARGS__)
14833
#define vmsltu_vv_u32m4_b8(...) __riscv_vmsltu_vv_u32m4_b8(__VA_ARGS__)
14834
#define vmsltu_vx_u32m4_b8(...) __riscv_vmsltu_vx_u32m4_b8(__VA_ARGS__)
14835
#define vmsltu_vv_u32m8_b4(...) __riscv_vmsltu_vv_u32m8_b4(__VA_ARGS__)
14836
#define vmsltu_vx_u32m8_b4(...) __riscv_vmsltu_vx_u32m8_b4(__VA_ARGS__)
14837
#define vmsltu_vv_u64m1_b64(...) __riscv_vmsltu_vv_u64m1_b64(__VA_ARGS__)
14838
#define vmsltu_vx_u64m1_b64(...) __riscv_vmsltu_vx_u64m1_b64(__VA_ARGS__)
14839
#define vmsltu_vv_u64m2_b32(...) __riscv_vmsltu_vv_u64m2_b32(__VA_ARGS__)
14840
#define vmsltu_vx_u64m2_b32(...) __riscv_vmsltu_vx_u64m2_b32(__VA_ARGS__)
14841
#define vmsltu_vv_u64m4_b16(...) __riscv_vmsltu_vv_u64m4_b16(__VA_ARGS__)
14842
#define vmsltu_vx_u64m4_b16(...) __riscv_vmsltu_vx_u64m4_b16(__VA_ARGS__)
14843
#define vmsltu_vv_u64m8_b8(...) __riscv_vmsltu_vv_u64m8_b8(__VA_ARGS__)
14844
#define vmsltu_vx_u64m8_b8(...) __riscv_vmsltu_vx_u64m8_b8(__VA_ARGS__)
14845
#define vmsleu_vv_u8mf8_b64(...) __riscv_vmsleu_vv_u8mf8_b64(__VA_ARGS__)
14846
#define vmsleu_vx_u8mf8_b64(...) __riscv_vmsleu_vx_u8mf8_b64(__VA_ARGS__)
14847
#define vmsleu_vv_u8mf4_b32(...) __riscv_vmsleu_vv_u8mf4_b32(__VA_ARGS__)
14848
#define vmsleu_vx_u8mf4_b32(...) __riscv_vmsleu_vx_u8mf4_b32(__VA_ARGS__)
14849
#define vmsleu_vv_u8mf2_b16(...) __riscv_vmsleu_vv_u8mf2_b16(__VA_ARGS__)
14850
#define vmsleu_vx_u8mf2_b16(...) __riscv_vmsleu_vx_u8mf2_b16(__VA_ARGS__)
14851
#define vmsleu_vv_u8m1_b8(...) __riscv_vmsleu_vv_u8m1_b8(__VA_ARGS__)
14852
#define vmsleu_vx_u8m1_b8(...) __riscv_vmsleu_vx_u8m1_b8(__VA_ARGS__)
14853
#define vmsleu_vv_u8m2_b4(...) __riscv_vmsleu_vv_u8m2_b4(__VA_ARGS__)
14854
#define vmsleu_vx_u8m2_b4(...) __riscv_vmsleu_vx_u8m2_b4(__VA_ARGS__)
14855
#define vmsleu_vv_u8m4_b2(...) __riscv_vmsleu_vv_u8m4_b2(__VA_ARGS__)
14856
#define vmsleu_vx_u8m4_b2(...) __riscv_vmsleu_vx_u8m4_b2(__VA_ARGS__)
14857
#define vmsleu_vv_u8m8_b1(...) __riscv_vmsleu_vv_u8m8_b1(__VA_ARGS__)
14858
#define vmsleu_vx_u8m8_b1(...) __riscv_vmsleu_vx_u8m8_b1(__VA_ARGS__)
14859
#define vmsleu_vv_u16mf4_b64(...) __riscv_vmsleu_vv_u16mf4_b64(__VA_ARGS__)
14860
#define vmsleu_vx_u16mf4_b64(...) __riscv_vmsleu_vx_u16mf4_b64(__VA_ARGS__)
14861
#define vmsleu_vv_u16mf2_b32(...) __riscv_vmsleu_vv_u16mf2_b32(__VA_ARGS__)
14862
#define vmsleu_vx_u16mf2_b32(...) __riscv_vmsleu_vx_u16mf2_b32(__VA_ARGS__)
14863
#define vmsleu_vv_u16m1_b16(...) __riscv_vmsleu_vv_u16m1_b16(__VA_ARGS__)
14864
#define vmsleu_vx_u16m1_b16(...) __riscv_vmsleu_vx_u16m1_b16(__VA_ARGS__)
14865
#define vmsleu_vv_u16m2_b8(...) __riscv_vmsleu_vv_u16m2_b8(__VA_ARGS__)
14866
#define vmsleu_vx_u16m2_b8(...) __riscv_vmsleu_vx_u16m2_b8(__VA_ARGS__)
14867
#define vmsleu_vv_u16m4_b4(...) __riscv_vmsleu_vv_u16m4_b4(__VA_ARGS__)
14868
#define vmsleu_vx_u16m4_b4(...) __riscv_vmsleu_vx_u16m4_b4(__VA_ARGS__)
14869
#define vmsleu_vv_u16m8_b2(...) __riscv_vmsleu_vv_u16m8_b2(__VA_ARGS__)
14870
#define vmsleu_vx_u16m8_b2(...) __riscv_vmsleu_vx_u16m8_b2(__VA_ARGS__)
14871
#define vmsleu_vv_u32mf2_b64(...) __riscv_vmsleu_vv_u32mf2_b64(__VA_ARGS__)
14872
#define vmsleu_vx_u32mf2_b64(...) __riscv_vmsleu_vx_u32mf2_b64(__VA_ARGS__)
14873
#define vmsleu_vv_u32m1_b32(...) __riscv_vmsleu_vv_u32m1_b32(__VA_ARGS__)
14874
#define vmsleu_vx_u32m1_b32(...) __riscv_vmsleu_vx_u32m1_b32(__VA_ARGS__)
14875
#define vmsleu_vv_u32m2_b16(...) __riscv_vmsleu_vv_u32m2_b16(__VA_ARGS__)
14876
#define vmsleu_vx_u32m2_b16(...) __riscv_vmsleu_vx_u32m2_b16(__VA_ARGS__)
14877
#define vmsleu_vv_u32m4_b8(...) __riscv_vmsleu_vv_u32m4_b8(__VA_ARGS__)
14878
#define vmsleu_vx_u32m4_b8(...) __riscv_vmsleu_vx_u32m4_b8(__VA_ARGS__)
14879
#define vmsleu_vv_u32m8_b4(...) __riscv_vmsleu_vv_u32m8_b4(__VA_ARGS__)
14880
#define vmsleu_vx_u32m8_b4(...) __riscv_vmsleu_vx_u32m8_b4(__VA_ARGS__)
14881
#define vmsleu_vv_u64m1_b64(...) __riscv_vmsleu_vv_u64m1_b64(__VA_ARGS__)
14882
#define vmsleu_vx_u64m1_b64(...) __riscv_vmsleu_vx_u64m1_b64(__VA_ARGS__)
14883
#define vmsleu_vv_u64m2_b32(...) __riscv_vmsleu_vv_u64m2_b32(__VA_ARGS__)
14884
#define vmsleu_vx_u64m2_b32(...) __riscv_vmsleu_vx_u64m2_b32(__VA_ARGS__)
14885
#define vmsleu_vv_u64m4_b16(...) __riscv_vmsleu_vv_u64m4_b16(__VA_ARGS__)
14886
#define vmsleu_vx_u64m4_b16(...) __riscv_vmsleu_vx_u64m4_b16(__VA_ARGS__)
14887
#define vmsleu_vv_u64m8_b8(...) __riscv_vmsleu_vv_u64m8_b8(__VA_ARGS__)
14888
#define vmsleu_vx_u64m8_b8(...) __riscv_vmsleu_vx_u64m8_b8(__VA_ARGS__)
14889
#define vmsgtu_vv_u8mf8_b64(...) __riscv_vmsgtu_vv_u8mf8_b64(__VA_ARGS__)
14890
#define vmsgtu_vx_u8mf8_b64(...) __riscv_vmsgtu_vx_u8mf8_b64(__VA_ARGS__)
14891
#define vmsgtu_vv_u8mf4_b32(...) __riscv_vmsgtu_vv_u8mf4_b32(__VA_ARGS__)
14892
#define vmsgtu_vx_u8mf4_b32(...) __riscv_vmsgtu_vx_u8mf4_b32(__VA_ARGS__)
14893
#define vmsgtu_vv_u8mf2_b16(...) __riscv_vmsgtu_vv_u8mf2_b16(__VA_ARGS__)
14894
#define vmsgtu_vx_u8mf2_b16(...) __riscv_vmsgtu_vx_u8mf2_b16(__VA_ARGS__)
14895
#define vmsgtu_vv_u8m1_b8(...) __riscv_vmsgtu_vv_u8m1_b8(__VA_ARGS__)
14896
#define vmsgtu_vx_u8m1_b8(...) __riscv_vmsgtu_vx_u8m1_b8(__VA_ARGS__)
14897
#define vmsgtu_vv_u8m2_b4(...) __riscv_vmsgtu_vv_u8m2_b4(__VA_ARGS__)
14898
#define vmsgtu_vx_u8m2_b4(...) __riscv_vmsgtu_vx_u8m2_b4(__VA_ARGS__)
14899
#define vmsgtu_vv_u8m4_b2(...) __riscv_vmsgtu_vv_u8m4_b2(__VA_ARGS__)
14900
#define vmsgtu_vx_u8m4_b2(...) __riscv_vmsgtu_vx_u8m4_b2(__VA_ARGS__)
14901
#define vmsgtu_vv_u8m8_b1(...) __riscv_vmsgtu_vv_u8m8_b1(__VA_ARGS__)
14902
#define vmsgtu_vx_u8m8_b1(...) __riscv_vmsgtu_vx_u8m8_b1(__VA_ARGS__)
14903
#define vmsgtu_vv_u16mf4_b64(...) __riscv_vmsgtu_vv_u16mf4_b64(__VA_ARGS__)
14904
#define vmsgtu_vx_u16mf4_b64(...) __riscv_vmsgtu_vx_u16mf4_b64(__VA_ARGS__)
14905
#define vmsgtu_vv_u16mf2_b32(...) __riscv_vmsgtu_vv_u16mf2_b32(__VA_ARGS__)
14906
#define vmsgtu_vx_u16mf2_b32(...) __riscv_vmsgtu_vx_u16mf2_b32(__VA_ARGS__)
14907
#define vmsgtu_vv_u16m1_b16(...) __riscv_vmsgtu_vv_u16m1_b16(__VA_ARGS__)
14908
#define vmsgtu_vx_u16m1_b16(...) __riscv_vmsgtu_vx_u16m1_b16(__VA_ARGS__)
14909
#define vmsgtu_vv_u16m2_b8(...) __riscv_vmsgtu_vv_u16m2_b8(__VA_ARGS__)
14910
#define vmsgtu_vx_u16m2_b8(...) __riscv_vmsgtu_vx_u16m2_b8(__VA_ARGS__)
14911
#define vmsgtu_vv_u16m4_b4(...) __riscv_vmsgtu_vv_u16m4_b4(__VA_ARGS__)
14912
#define vmsgtu_vx_u16m4_b4(...) __riscv_vmsgtu_vx_u16m4_b4(__VA_ARGS__)
14913
#define vmsgtu_vv_u16m8_b2(...) __riscv_vmsgtu_vv_u16m8_b2(__VA_ARGS__)
14914
#define vmsgtu_vx_u16m8_b2(...) __riscv_vmsgtu_vx_u16m8_b2(__VA_ARGS__)
14915
#define vmsgtu_vv_u32mf2_b64(...) __riscv_vmsgtu_vv_u32mf2_b64(__VA_ARGS__)
14916
#define vmsgtu_vx_u32mf2_b64(...) __riscv_vmsgtu_vx_u32mf2_b64(__VA_ARGS__)
14917
#define vmsgtu_vv_u32m1_b32(...) __riscv_vmsgtu_vv_u32m1_b32(__VA_ARGS__)
14918
#define vmsgtu_vx_u32m1_b32(...) __riscv_vmsgtu_vx_u32m1_b32(__VA_ARGS__)
14919
#define vmsgtu_vv_u32m2_b16(...) __riscv_vmsgtu_vv_u32m2_b16(__VA_ARGS__)
14920
#define vmsgtu_vx_u32m2_b16(...) __riscv_vmsgtu_vx_u32m2_b16(__VA_ARGS__)
14921
#define vmsgtu_vv_u32m4_b8(...) __riscv_vmsgtu_vv_u32m4_b8(__VA_ARGS__)
14922
#define vmsgtu_vx_u32m4_b8(...) __riscv_vmsgtu_vx_u32m4_b8(__VA_ARGS__)
14923
#define vmsgtu_vv_u32m8_b4(...) __riscv_vmsgtu_vv_u32m8_b4(__VA_ARGS__)
14924
#define vmsgtu_vx_u32m8_b4(...) __riscv_vmsgtu_vx_u32m8_b4(__VA_ARGS__)
14925
#define vmsgtu_vv_u64m1_b64(...) __riscv_vmsgtu_vv_u64m1_b64(__VA_ARGS__)
14926
#define vmsgtu_vx_u64m1_b64(...) __riscv_vmsgtu_vx_u64m1_b64(__VA_ARGS__)
14927
#define vmsgtu_vv_u64m2_b32(...) __riscv_vmsgtu_vv_u64m2_b32(__VA_ARGS__)
14928
#define vmsgtu_vx_u64m2_b32(...) __riscv_vmsgtu_vx_u64m2_b32(__VA_ARGS__)
14929
#define vmsgtu_vv_u64m4_b16(...) __riscv_vmsgtu_vv_u64m4_b16(__VA_ARGS__)
14930
#define vmsgtu_vx_u64m4_b16(...) __riscv_vmsgtu_vx_u64m4_b16(__VA_ARGS__)
14931
#define vmsgtu_vv_u64m8_b8(...) __riscv_vmsgtu_vv_u64m8_b8(__VA_ARGS__)
14932
#define vmsgtu_vx_u64m8_b8(...) __riscv_vmsgtu_vx_u64m8_b8(__VA_ARGS__)
14933
#define vmsgeu_vv_u8mf8_b64(...) __riscv_vmsgeu_vv_u8mf8_b64(__VA_ARGS__)
14934
#define vmsgeu_vx_u8mf8_b64(...) __riscv_vmsgeu_vx_u8mf8_b64(__VA_ARGS__)
14935
#define vmsgeu_vv_u8mf4_b32(...) __riscv_vmsgeu_vv_u8mf4_b32(__VA_ARGS__)
14936
#define vmsgeu_vx_u8mf4_b32(...) __riscv_vmsgeu_vx_u8mf4_b32(__VA_ARGS__)
14937
#define vmsgeu_vv_u8mf2_b16(...) __riscv_vmsgeu_vv_u8mf2_b16(__VA_ARGS__)
14938
#define vmsgeu_vx_u8mf2_b16(...) __riscv_vmsgeu_vx_u8mf2_b16(__VA_ARGS__)
14939
#define vmsgeu_vv_u8m1_b8(...) __riscv_vmsgeu_vv_u8m1_b8(__VA_ARGS__)
14940
#define vmsgeu_vx_u8m1_b8(...) __riscv_vmsgeu_vx_u8m1_b8(__VA_ARGS__)
14941
#define vmsgeu_vv_u8m2_b4(...) __riscv_vmsgeu_vv_u8m2_b4(__VA_ARGS__)
14942
#define vmsgeu_vx_u8m2_b4(...) __riscv_vmsgeu_vx_u8m2_b4(__VA_ARGS__)
14943
#define vmsgeu_vv_u8m4_b2(...) __riscv_vmsgeu_vv_u8m4_b2(__VA_ARGS__)
14944
#define vmsgeu_vx_u8m4_b2(...) __riscv_vmsgeu_vx_u8m4_b2(__VA_ARGS__)
14945
#define vmsgeu_vv_u8m8_b1(...) __riscv_vmsgeu_vv_u8m8_b1(__VA_ARGS__)
14946
#define vmsgeu_vx_u8m8_b1(...) __riscv_vmsgeu_vx_u8m8_b1(__VA_ARGS__)
14947
#define vmsgeu_vv_u16mf4_b64(...) __riscv_vmsgeu_vv_u16mf4_b64(__VA_ARGS__)
14948
#define vmsgeu_vx_u16mf4_b64(...) __riscv_vmsgeu_vx_u16mf4_b64(__VA_ARGS__)
14949
#define vmsgeu_vv_u16mf2_b32(...) __riscv_vmsgeu_vv_u16mf2_b32(__VA_ARGS__)
14950
#define vmsgeu_vx_u16mf2_b32(...) __riscv_vmsgeu_vx_u16mf2_b32(__VA_ARGS__)
14951
#define vmsgeu_vv_u16m1_b16(...) __riscv_vmsgeu_vv_u16m1_b16(__VA_ARGS__)
14952
#define vmsgeu_vx_u16m1_b16(...) __riscv_vmsgeu_vx_u16m1_b16(__VA_ARGS__)
14953
#define vmsgeu_vv_u16m2_b8(...) __riscv_vmsgeu_vv_u16m2_b8(__VA_ARGS__)
14954
#define vmsgeu_vx_u16m2_b8(...) __riscv_vmsgeu_vx_u16m2_b8(__VA_ARGS__)
14955
#define vmsgeu_vv_u16m4_b4(...) __riscv_vmsgeu_vv_u16m4_b4(__VA_ARGS__)
14956
#define vmsgeu_vx_u16m4_b4(...) __riscv_vmsgeu_vx_u16m4_b4(__VA_ARGS__)
14957
#define vmsgeu_vv_u16m8_b2(...) __riscv_vmsgeu_vv_u16m8_b2(__VA_ARGS__)
14958
#define vmsgeu_vx_u16m8_b2(...) __riscv_vmsgeu_vx_u16m8_b2(__VA_ARGS__)
14959
#define vmsgeu_vv_u32mf2_b64(...) __riscv_vmsgeu_vv_u32mf2_b64(__VA_ARGS__)
14960
#define vmsgeu_vx_u32mf2_b64(...) __riscv_vmsgeu_vx_u32mf2_b64(__VA_ARGS__)
14961
#define vmsgeu_vv_u32m1_b32(...) __riscv_vmsgeu_vv_u32m1_b32(__VA_ARGS__)
14962
#define vmsgeu_vx_u32m1_b32(...) __riscv_vmsgeu_vx_u32m1_b32(__VA_ARGS__)
14963
#define vmsgeu_vv_u32m2_b16(...) __riscv_vmsgeu_vv_u32m2_b16(__VA_ARGS__)
14964
#define vmsgeu_vx_u32m2_b16(...) __riscv_vmsgeu_vx_u32m2_b16(__VA_ARGS__)
14965
#define vmsgeu_vv_u32m4_b8(...) __riscv_vmsgeu_vv_u32m4_b8(__VA_ARGS__)
14966
#define vmsgeu_vx_u32m4_b8(...) __riscv_vmsgeu_vx_u32m4_b8(__VA_ARGS__)
14967
#define vmsgeu_vv_u32m8_b4(...) __riscv_vmsgeu_vv_u32m8_b4(__VA_ARGS__)
14968
#define vmsgeu_vx_u32m8_b4(...) __riscv_vmsgeu_vx_u32m8_b4(__VA_ARGS__)
14969
#define vmsgeu_vv_u64m1_b64(...) __riscv_vmsgeu_vv_u64m1_b64(__VA_ARGS__)
14970
#define vmsgeu_vx_u64m1_b64(...) __riscv_vmsgeu_vx_u64m1_b64(__VA_ARGS__)
14971
#define vmsgeu_vv_u64m2_b32(...) __riscv_vmsgeu_vv_u64m2_b32(__VA_ARGS__)
14972
#define vmsgeu_vx_u64m2_b32(...) __riscv_vmsgeu_vx_u64m2_b32(__VA_ARGS__)
14973
#define vmsgeu_vv_u64m4_b16(...) __riscv_vmsgeu_vv_u64m4_b16(__VA_ARGS__)
14974
#define vmsgeu_vx_u64m4_b16(...) __riscv_vmsgeu_vx_u64m4_b16(__VA_ARGS__)
14975
#define vmsgeu_vv_u64m8_b8(...) __riscv_vmsgeu_vv_u64m8_b8(__VA_ARGS__)
14976
#define vmsgeu_vx_u64m8_b8(...) __riscv_vmsgeu_vx_u64m8_b8(__VA_ARGS__)
14977
// masked functions
14978
#define vmseq_vv_i8mf8_b64_m(...) __riscv_vmseq_vv_i8mf8_b64_mu(__VA_ARGS__)
14979
#define vmseq_vx_i8mf8_b64_m(...) __riscv_vmseq_vx_i8mf8_b64_mu(__VA_ARGS__)
14980
#define vmseq_vv_i8mf4_b32_m(...) __riscv_vmseq_vv_i8mf4_b32_mu(__VA_ARGS__)
14981
#define vmseq_vx_i8mf4_b32_m(...) __riscv_vmseq_vx_i8mf4_b32_mu(__VA_ARGS__)
14982
#define vmseq_vv_i8mf2_b16_m(...) __riscv_vmseq_vv_i8mf2_b16_mu(__VA_ARGS__)
14983
#define vmseq_vx_i8mf2_b16_m(...) __riscv_vmseq_vx_i8mf2_b16_mu(__VA_ARGS__)
14984
#define vmseq_vv_i8m1_b8_m(...) __riscv_vmseq_vv_i8m1_b8_mu(__VA_ARGS__)
14985
#define vmseq_vx_i8m1_b8_m(...) __riscv_vmseq_vx_i8m1_b8_mu(__VA_ARGS__)
14986
#define vmseq_vv_i8m2_b4_m(...) __riscv_vmseq_vv_i8m2_b4_mu(__VA_ARGS__)
14987
#define vmseq_vx_i8m2_b4_m(...) __riscv_vmseq_vx_i8m2_b4_mu(__VA_ARGS__)
14988
#define vmseq_vv_i8m4_b2_m(...) __riscv_vmseq_vv_i8m4_b2_mu(__VA_ARGS__)
14989
#define vmseq_vx_i8m4_b2_m(...) __riscv_vmseq_vx_i8m4_b2_mu(__VA_ARGS__)
14990
#define vmseq_vv_i8m8_b1_m(...) __riscv_vmseq_vv_i8m8_b1_mu(__VA_ARGS__)
14991
#define vmseq_vx_i8m8_b1_m(...) __riscv_vmseq_vx_i8m8_b1_mu(__VA_ARGS__)
14992
#define vmseq_vv_i16mf4_b64_m(...) __riscv_vmseq_vv_i16mf4_b64_mu(__VA_ARGS__)
14993
#define vmseq_vx_i16mf4_b64_m(...) __riscv_vmseq_vx_i16mf4_b64_mu(__VA_ARGS__)
14994
#define vmseq_vv_i16mf2_b32_m(...) __riscv_vmseq_vv_i16mf2_b32_mu(__VA_ARGS__)
14995
#define vmseq_vx_i16mf2_b32_m(...) __riscv_vmseq_vx_i16mf2_b32_mu(__VA_ARGS__)
14996
#define vmseq_vv_i16m1_b16_m(...) __riscv_vmseq_vv_i16m1_b16_mu(__VA_ARGS__)
14997
#define vmseq_vx_i16m1_b16_m(...) __riscv_vmseq_vx_i16m1_b16_mu(__VA_ARGS__)
14998
#define vmseq_vv_i16m2_b8_m(...) __riscv_vmseq_vv_i16m2_b8_mu(__VA_ARGS__)
14999
#define vmseq_vx_i16m2_b8_m(...) __riscv_vmseq_vx_i16m2_b8_mu(__VA_ARGS__)
15000
#define vmseq_vv_i16m4_b4_m(...) __riscv_vmseq_vv_i16m4_b4_mu(__VA_ARGS__)
15001
#define vmseq_vx_i16m4_b4_m(...) __riscv_vmseq_vx_i16m4_b4_mu(__VA_ARGS__)
15002
#define vmseq_vv_i16m8_b2_m(...) __riscv_vmseq_vv_i16m8_b2_mu(__VA_ARGS__)
15003
#define vmseq_vx_i16m8_b2_m(...) __riscv_vmseq_vx_i16m8_b2_mu(__VA_ARGS__)
15004
#define vmseq_vv_i32mf2_b64_m(...) __riscv_vmseq_vv_i32mf2_b64_mu(__VA_ARGS__)
15005
#define vmseq_vx_i32mf2_b64_m(...) __riscv_vmseq_vx_i32mf2_b64_mu(__VA_ARGS__)
15006
#define vmseq_vv_i32m1_b32_m(...) __riscv_vmseq_vv_i32m1_b32_mu(__VA_ARGS__)
15007
#define vmseq_vx_i32m1_b32_m(...) __riscv_vmseq_vx_i32m1_b32_mu(__VA_ARGS__)
15008
#define vmseq_vv_i32m2_b16_m(...) __riscv_vmseq_vv_i32m2_b16_mu(__VA_ARGS__)
15009
#define vmseq_vx_i32m2_b16_m(...) __riscv_vmseq_vx_i32m2_b16_mu(__VA_ARGS__)
15010
#define vmseq_vv_i32m4_b8_m(...) __riscv_vmseq_vv_i32m4_b8_mu(__VA_ARGS__)
15011
#define vmseq_vx_i32m4_b8_m(...) __riscv_vmseq_vx_i32m4_b8_mu(__VA_ARGS__)
15012
#define vmseq_vv_i32m8_b4_m(...) __riscv_vmseq_vv_i32m8_b4_mu(__VA_ARGS__)
15013
#define vmseq_vx_i32m8_b4_m(...) __riscv_vmseq_vx_i32m8_b4_mu(__VA_ARGS__)
15014
#define vmseq_vv_i64m1_b64_m(...) __riscv_vmseq_vv_i64m1_b64_mu(__VA_ARGS__)
15015
#define vmseq_vx_i64m1_b64_m(...) __riscv_vmseq_vx_i64m1_b64_mu(__VA_ARGS__)
15016
#define vmseq_vv_i64m2_b32_m(...) __riscv_vmseq_vv_i64m2_b32_mu(__VA_ARGS__)
15017
#define vmseq_vx_i64m2_b32_m(...) __riscv_vmseq_vx_i64m2_b32_mu(__VA_ARGS__)
15018
#define vmseq_vv_i64m4_b16_m(...) __riscv_vmseq_vv_i64m4_b16_mu(__VA_ARGS__)
15019
#define vmseq_vx_i64m4_b16_m(...) __riscv_vmseq_vx_i64m4_b16_mu(__VA_ARGS__)
15020
#define vmseq_vv_i64m8_b8_m(...) __riscv_vmseq_vv_i64m8_b8_mu(__VA_ARGS__)
15021
#define vmseq_vx_i64m8_b8_m(...) __riscv_vmseq_vx_i64m8_b8_mu(__VA_ARGS__)
15022
#define vmsne_vv_i8mf8_b64_m(...) __riscv_vmsne_vv_i8mf8_b64_mu(__VA_ARGS__)
15023
#define vmsne_vx_i8mf8_b64_m(...) __riscv_vmsne_vx_i8mf8_b64_mu(__VA_ARGS__)
15024
#define vmsne_vv_i8mf4_b32_m(...) __riscv_vmsne_vv_i8mf4_b32_mu(__VA_ARGS__)
15025
#define vmsne_vx_i8mf4_b32_m(...) __riscv_vmsne_vx_i8mf4_b32_mu(__VA_ARGS__)
15026
#define vmsne_vv_i8mf2_b16_m(...) __riscv_vmsne_vv_i8mf2_b16_mu(__VA_ARGS__)
15027
#define vmsne_vx_i8mf2_b16_m(...) __riscv_vmsne_vx_i8mf2_b16_mu(__VA_ARGS__)
15028
#define vmsne_vv_i8m1_b8_m(...) __riscv_vmsne_vv_i8m1_b8_mu(__VA_ARGS__)
15029
#define vmsne_vx_i8m1_b8_m(...) __riscv_vmsne_vx_i8m1_b8_mu(__VA_ARGS__)
15030
#define vmsne_vv_i8m2_b4_m(...) __riscv_vmsne_vv_i8m2_b4_mu(__VA_ARGS__)
15031
#define vmsne_vx_i8m2_b4_m(...) __riscv_vmsne_vx_i8m2_b4_mu(__VA_ARGS__)
15032
#define vmsne_vv_i8m4_b2_m(...) __riscv_vmsne_vv_i8m4_b2_mu(__VA_ARGS__)
15033
#define vmsne_vx_i8m4_b2_m(...) __riscv_vmsne_vx_i8m4_b2_mu(__VA_ARGS__)
15034
#define vmsne_vv_i8m8_b1_m(...) __riscv_vmsne_vv_i8m8_b1_mu(__VA_ARGS__)
15035
#define vmsne_vx_i8m8_b1_m(...) __riscv_vmsne_vx_i8m8_b1_mu(__VA_ARGS__)
15036
#define vmsne_vv_i16mf4_b64_m(...) __riscv_vmsne_vv_i16mf4_b64_mu(__VA_ARGS__)
15037
#define vmsne_vx_i16mf4_b64_m(...) __riscv_vmsne_vx_i16mf4_b64_mu(__VA_ARGS__)
15038
#define vmsne_vv_i16mf2_b32_m(...) __riscv_vmsne_vv_i16mf2_b32_mu(__VA_ARGS__)
15039
#define vmsne_vx_i16mf2_b32_m(...) __riscv_vmsne_vx_i16mf2_b32_mu(__VA_ARGS__)
15040
#define vmsne_vv_i16m1_b16_m(...) __riscv_vmsne_vv_i16m1_b16_mu(__VA_ARGS__)
15041
#define vmsne_vx_i16m1_b16_m(...) __riscv_vmsne_vx_i16m1_b16_mu(__VA_ARGS__)
15042
#define vmsne_vv_i16m2_b8_m(...) __riscv_vmsne_vv_i16m2_b8_mu(__VA_ARGS__)
15043
#define vmsne_vx_i16m2_b8_m(...) __riscv_vmsne_vx_i16m2_b8_mu(__VA_ARGS__)
15044
#define vmsne_vv_i16m4_b4_m(...) __riscv_vmsne_vv_i16m4_b4_mu(__VA_ARGS__)
15045
#define vmsne_vx_i16m4_b4_m(...) __riscv_vmsne_vx_i16m4_b4_mu(__VA_ARGS__)
15046
#define vmsne_vv_i16m8_b2_m(...) __riscv_vmsne_vv_i16m8_b2_mu(__VA_ARGS__)
15047
#define vmsne_vx_i16m8_b2_m(...) __riscv_vmsne_vx_i16m8_b2_mu(__VA_ARGS__)
15048
#define vmsne_vv_i32mf2_b64_m(...) __riscv_vmsne_vv_i32mf2_b64_mu(__VA_ARGS__)
15049
#define vmsne_vx_i32mf2_b64_m(...) __riscv_vmsne_vx_i32mf2_b64_mu(__VA_ARGS__)
15050
#define vmsne_vv_i32m1_b32_m(...) __riscv_vmsne_vv_i32m1_b32_mu(__VA_ARGS__)
15051
#define vmsne_vx_i32m1_b32_m(...) __riscv_vmsne_vx_i32m1_b32_mu(__VA_ARGS__)
15052
#define vmsne_vv_i32m2_b16_m(...) __riscv_vmsne_vv_i32m2_b16_mu(__VA_ARGS__)
15053
#define vmsne_vx_i32m2_b16_m(...) __riscv_vmsne_vx_i32m2_b16_mu(__VA_ARGS__)
15054
#define vmsne_vv_i32m4_b8_m(...) __riscv_vmsne_vv_i32m4_b8_mu(__VA_ARGS__)
15055
#define vmsne_vx_i32m4_b8_m(...) __riscv_vmsne_vx_i32m4_b8_mu(__VA_ARGS__)
15056
#define vmsne_vv_i32m8_b4_m(...) __riscv_vmsne_vv_i32m8_b4_mu(__VA_ARGS__)
15057
#define vmsne_vx_i32m8_b4_m(...) __riscv_vmsne_vx_i32m8_b4_mu(__VA_ARGS__)
15058
#define vmsne_vv_i64m1_b64_m(...) __riscv_vmsne_vv_i64m1_b64_mu(__VA_ARGS__)
15059
#define vmsne_vx_i64m1_b64_m(...) __riscv_vmsne_vx_i64m1_b64_mu(__VA_ARGS__)
15060
#define vmsne_vv_i64m2_b32_m(...) __riscv_vmsne_vv_i64m2_b32_mu(__VA_ARGS__)
15061
#define vmsne_vx_i64m2_b32_m(...) __riscv_vmsne_vx_i64m2_b32_mu(__VA_ARGS__)
15062
#define vmsne_vv_i64m4_b16_m(...) __riscv_vmsne_vv_i64m4_b16_mu(__VA_ARGS__)
15063
#define vmsne_vx_i64m4_b16_m(...) __riscv_vmsne_vx_i64m4_b16_mu(__VA_ARGS__)
15064
#define vmsne_vv_i64m8_b8_m(...) __riscv_vmsne_vv_i64m8_b8_mu(__VA_ARGS__)
15065
#define vmsne_vx_i64m8_b8_m(...) __riscv_vmsne_vx_i64m8_b8_mu(__VA_ARGS__)
15066
#define vmslt_vv_i8mf8_b64_m(...) __riscv_vmslt_vv_i8mf8_b64_mu(__VA_ARGS__)
15067
#define vmslt_vx_i8mf8_b64_m(...) __riscv_vmslt_vx_i8mf8_b64_mu(__VA_ARGS__)
15068
#define vmslt_vv_i8mf4_b32_m(...) __riscv_vmslt_vv_i8mf4_b32_mu(__VA_ARGS__)
15069
#define vmslt_vx_i8mf4_b32_m(...) __riscv_vmslt_vx_i8mf4_b32_mu(__VA_ARGS__)
15070
#define vmslt_vv_i8mf2_b16_m(...) __riscv_vmslt_vv_i8mf2_b16_mu(__VA_ARGS__)
15071
#define vmslt_vx_i8mf2_b16_m(...) __riscv_vmslt_vx_i8mf2_b16_mu(__VA_ARGS__)
15072
#define vmslt_vv_i8m1_b8_m(...) __riscv_vmslt_vv_i8m1_b8_mu(__VA_ARGS__)
15073
#define vmslt_vx_i8m1_b8_m(...) __riscv_vmslt_vx_i8m1_b8_mu(__VA_ARGS__)
15074
#define vmslt_vv_i8m2_b4_m(...) __riscv_vmslt_vv_i8m2_b4_mu(__VA_ARGS__)
15075
#define vmslt_vx_i8m2_b4_m(...) __riscv_vmslt_vx_i8m2_b4_mu(__VA_ARGS__)
15076
#define vmslt_vv_i8m4_b2_m(...) __riscv_vmslt_vv_i8m4_b2_mu(__VA_ARGS__)
15077
#define vmslt_vx_i8m4_b2_m(...) __riscv_vmslt_vx_i8m4_b2_mu(__VA_ARGS__)
15078
#define vmslt_vv_i8m8_b1_m(...) __riscv_vmslt_vv_i8m8_b1_mu(__VA_ARGS__)
15079
#define vmslt_vx_i8m8_b1_m(...) __riscv_vmslt_vx_i8m8_b1_mu(__VA_ARGS__)
15080
#define vmslt_vv_i16mf4_b64_m(...) __riscv_vmslt_vv_i16mf4_b64_mu(__VA_ARGS__)
15081
#define vmslt_vx_i16mf4_b64_m(...) __riscv_vmslt_vx_i16mf4_b64_mu(__VA_ARGS__)
15082
#define vmslt_vv_i16mf2_b32_m(...) __riscv_vmslt_vv_i16mf2_b32_mu(__VA_ARGS__)
15083
#define vmslt_vx_i16mf2_b32_m(...) __riscv_vmslt_vx_i16mf2_b32_mu(__VA_ARGS__)
15084
#define vmslt_vv_i16m1_b16_m(...) __riscv_vmslt_vv_i16m1_b16_mu(__VA_ARGS__)
15085
#define vmslt_vx_i16m1_b16_m(...) __riscv_vmslt_vx_i16m1_b16_mu(__VA_ARGS__)
15086
#define vmslt_vv_i16m2_b8_m(...) __riscv_vmslt_vv_i16m2_b8_mu(__VA_ARGS__)
15087
#define vmslt_vx_i16m2_b8_m(...) __riscv_vmslt_vx_i16m2_b8_mu(__VA_ARGS__)
15088
#define vmslt_vv_i16m4_b4_m(...) __riscv_vmslt_vv_i16m4_b4_mu(__VA_ARGS__)
15089
#define vmslt_vx_i16m4_b4_m(...) __riscv_vmslt_vx_i16m4_b4_mu(__VA_ARGS__)
15090
#define vmslt_vv_i16m8_b2_m(...) __riscv_vmslt_vv_i16m8_b2_mu(__VA_ARGS__)
15091
#define vmslt_vx_i16m8_b2_m(...) __riscv_vmslt_vx_i16m8_b2_mu(__VA_ARGS__)
15092
#define vmslt_vv_i32mf2_b64_m(...) __riscv_vmslt_vv_i32mf2_b64_mu(__VA_ARGS__)
15093
#define vmslt_vx_i32mf2_b64_m(...) __riscv_vmslt_vx_i32mf2_b64_mu(__VA_ARGS__)
15094
#define vmslt_vv_i32m1_b32_m(...) __riscv_vmslt_vv_i32m1_b32_mu(__VA_ARGS__)
15095
#define vmslt_vx_i32m1_b32_m(...) __riscv_vmslt_vx_i32m1_b32_mu(__VA_ARGS__)
15096
#define vmslt_vv_i32m2_b16_m(...) __riscv_vmslt_vv_i32m2_b16_mu(__VA_ARGS__)
15097
#define vmslt_vx_i32m2_b16_m(...) __riscv_vmslt_vx_i32m2_b16_mu(__VA_ARGS__)
15098
#define vmslt_vv_i32m4_b8_m(...) __riscv_vmslt_vv_i32m4_b8_mu(__VA_ARGS__)
15099
#define vmslt_vx_i32m4_b8_m(...) __riscv_vmslt_vx_i32m4_b8_mu(__VA_ARGS__)
15100
#define vmslt_vv_i32m8_b4_m(...) __riscv_vmslt_vv_i32m8_b4_mu(__VA_ARGS__)
15101
#define vmslt_vx_i32m8_b4_m(...) __riscv_vmslt_vx_i32m8_b4_mu(__VA_ARGS__)
15102
#define vmslt_vv_i64m1_b64_m(...) __riscv_vmslt_vv_i64m1_b64_mu(__VA_ARGS__)
15103
#define vmslt_vx_i64m1_b64_m(...) __riscv_vmslt_vx_i64m1_b64_mu(__VA_ARGS__)
15104
#define vmslt_vv_i64m2_b32_m(...) __riscv_vmslt_vv_i64m2_b32_mu(__VA_ARGS__)
15105
#define vmslt_vx_i64m2_b32_m(...) __riscv_vmslt_vx_i64m2_b32_mu(__VA_ARGS__)
15106
#define vmslt_vv_i64m4_b16_m(...) __riscv_vmslt_vv_i64m4_b16_mu(__VA_ARGS__)
15107
#define vmslt_vx_i64m4_b16_m(...) __riscv_vmslt_vx_i64m4_b16_mu(__VA_ARGS__)
15108
#define vmslt_vv_i64m8_b8_m(...) __riscv_vmslt_vv_i64m8_b8_mu(__VA_ARGS__)
15109
#define vmslt_vx_i64m8_b8_m(...) __riscv_vmslt_vx_i64m8_b8_mu(__VA_ARGS__)
15110
#define vmsle_vv_i8mf8_b64_m(...) __riscv_vmsle_vv_i8mf8_b64_mu(__VA_ARGS__)
15111
#define vmsle_vx_i8mf8_b64_m(...) __riscv_vmsle_vx_i8mf8_b64_mu(__VA_ARGS__)
15112
#define vmsle_vv_i8mf4_b32_m(...) __riscv_vmsle_vv_i8mf4_b32_mu(__VA_ARGS__)
15113
#define vmsle_vx_i8mf4_b32_m(...) __riscv_vmsle_vx_i8mf4_b32_mu(__VA_ARGS__)
15114
#define vmsle_vv_i8mf2_b16_m(...) __riscv_vmsle_vv_i8mf2_b16_mu(__VA_ARGS__)
15115
#define vmsle_vx_i8mf2_b16_m(...) __riscv_vmsle_vx_i8mf2_b16_mu(__VA_ARGS__)
15116
#define vmsle_vv_i8m1_b8_m(...) __riscv_vmsle_vv_i8m1_b8_mu(__VA_ARGS__)
15117
#define vmsle_vx_i8m1_b8_m(...) __riscv_vmsle_vx_i8m1_b8_mu(__VA_ARGS__)
15118
#define vmsle_vv_i8m2_b4_m(...) __riscv_vmsle_vv_i8m2_b4_mu(__VA_ARGS__)
15119
#define vmsle_vx_i8m2_b4_m(...) __riscv_vmsle_vx_i8m2_b4_mu(__VA_ARGS__)
15120
#define vmsle_vv_i8m4_b2_m(...) __riscv_vmsle_vv_i8m4_b2_mu(__VA_ARGS__)
15121
#define vmsle_vx_i8m4_b2_m(...) __riscv_vmsle_vx_i8m4_b2_mu(__VA_ARGS__)
15122
#define vmsle_vv_i8m8_b1_m(...) __riscv_vmsle_vv_i8m8_b1_mu(__VA_ARGS__)
15123
#define vmsle_vx_i8m8_b1_m(...) __riscv_vmsle_vx_i8m8_b1_mu(__VA_ARGS__)
15124
#define vmsle_vv_i16mf4_b64_m(...) __riscv_vmsle_vv_i16mf4_b64_mu(__VA_ARGS__)
15125
#define vmsle_vx_i16mf4_b64_m(...) __riscv_vmsle_vx_i16mf4_b64_mu(__VA_ARGS__)
15126
#define vmsle_vv_i16mf2_b32_m(...) __riscv_vmsle_vv_i16mf2_b32_mu(__VA_ARGS__)
15127
#define vmsle_vx_i16mf2_b32_m(...) __riscv_vmsle_vx_i16mf2_b32_mu(__VA_ARGS__)
15128
#define vmsle_vv_i16m1_b16_m(...) __riscv_vmsle_vv_i16m1_b16_mu(__VA_ARGS__)
15129
#define vmsle_vx_i16m1_b16_m(...) __riscv_vmsle_vx_i16m1_b16_mu(__VA_ARGS__)
15130
#define vmsle_vv_i16m2_b8_m(...) __riscv_vmsle_vv_i16m2_b8_mu(__VA_ARGS__)
15131
#define vmsle_vx_i16m2_b8_m(...) __riscv_vmsle_vx_i16m2_b8_mu(__VA_ARGS__)
15132
#define vmsle_vv_i16m4_b4_m(...) __riscv_vmsle_vv_i16m4_b4_mu(__VA_ARGS__)
15133
#define vmsle_vx_i16m4_b4_m(...) __riscv_vmsle_vx_i16m4_b4_mu(__VA_ARGS__)
15134
#define vmsle_vv_i16m8_b2_m(...) __riscv_vmsle_vv_i16m8_b2_mu(__VA_ARGS__)
15135
#define vmsle_vx_i16m8_b2_m(...) __riscv_vmsle_vx_i16m8_b2_mu(__VA_ARGS__)
15136
#define vmsle_vv_i32mf2_b64_m(...) __riscv_vmsle_vv_i32mf2_b64_mu(__VA_ARGS__)
15137
#define vmsle_vx_i32mf2_b64_m(...) __riscv_vmsle_vx_i32mf2_b64_mu(__VA_ARGS__)
15138
#define vmsle_vv_i32m1_b32_m(...) __riscv_vmsle_vv_i32m1_b32_mu(__VA_ARGS__)
15139
#define vmsle_vx_i32m1_b32_m(...) __riscv_vmsle_vx_i32m1_b32_mu(__VA_ARGS__)
15140
#define vmsle_vv_i32m2_b16_m(...) __riscv_vmsle_vv_i32m2_b16_mu(__VA_ARGS__)
15141
#define vmsle_vx_i32m2_b16_m(...) __riscv_vmsle_vx_i32m2_b16_mu(__VA_ARGS__)
15142
#define vmsle_vv_i32m4_b8_m(...) __riscv_vmsle_vv_i32m4_b8_mu(__VA_ARGS__)
15143
#define vmsle_vx_i32m4_b8_m(...) __riscv_vmsle_vx_i32m4_b8_mu(__VA_ARGS__)
15144
#define vmsle_vv_i32m8_b4_m(...) __riscv_vmsle_vv_i32m8_b4_mu(__VA_ARGS__)
15145
#define vmsle_vx_i32m8_b4_m(...) __riscv_vmsle_vx_i32m8_b4_mu(__VA_ARGS__)
15146
#define vmsle_vv_i64m1_b64_m(...) __riscv_vmsle_vv_i64m1_b64_mu(__VA_ARGS__)
15147
#define vmsle_vx_i64m1_b64_m(...) __riscv_vmsle_vx_i64m1_b64_mu(__VA_ARGS__)
15148
#define vmsle_vv_i64m2_b32_m(...) __riscv_vmsle_vv_i64m2_b32_mu(__VA_ARGS__)
15149
#define vmsle_vx_i64m2_b32_m(...) __riscv_vmsle_vx_i64m2_b32_mu(__VA_ARGS__)
15150
#define vmsle_vv_i64m4_b16_m(...) __riscv_vmsle_vv_i64m4_b16_mu(__VA_ARGS__)
15151
#define vmsle_vx_i64m4_b16_m(...) __riscv_vmsle_vx_i64m4_b16_mu(__VA_ARGS__)
15152
#define vmsle_vv_i64m8_b8_m(...) __riscv_vmsle_vv_i64m8_b8_mu(__VA_ARGS__)
15153
#define vmsle_vx_i64m8_b8_m(...) __riscv_vmsle_vx_i64m8_b8_mu(__VA_ARGS__)
15154
#define vmsgt_vv_i8mf8_b64_m(...) __riscv_vmsgt_vv_i8mf8_b64_mu(__VA_ARGS__)
15155
#define vmsgt_vx_i8mf8_b64_m(...) __riscv_vmsgt_vx_i8mf8_b64_mu(__VA_ARGS__)
15156
#define vmsgt_vv_i8mf4_b32_m(...) __riscv_vmsgt_vv_i8mf4_b32_mu(__VA_ARGS__)
15157
#define vmsgt_vx_i8mf4_b32_m(...) __riscv_vmsgt_vx_i8mf4_b32_mu(__VA_ARGS__)
15158
#define vmsgt_vv_i8mf2_b16_m(...) __riscv_vmsgt_vv_i8mf2_b16_mu(__VA_ARGS__)
15159
#define vmsgt_vx_i8mf2_b16_m(...) __riscv_vmsgt_vx_i8mf2_b16_mu(__VA_ARGS__)
15160
#define vmsgt_vv_i8m1_b8_m(...) __riscv_vmsgt_vv_i8m1_b8_mu(__VA_ARGS__)
15161
#define vmsgt_vx_i8m1_b8_m(...) __riscv_vmsgt_vx_i8m1_b8_mu(__VA_ARGS__)
15162
#define vmsgt_vv_i8m2_b4_m(...) __riscv_vmsgt_vv_i8m2_b4_mu(__VA_ARGS__)
15163
#define vmsgt_vx_i8m2_b4_m(...) __riscv_vmsgt_vx_i8m2_b4_mu(__VA_ARGS__)
15164
#define vmsgt_vv_i8m4_b2_m(...) __riscv_vmsgt_vv_i8m4_b2_mu(__VA_ARGS__)
15165
#define vmsgt_vx_i8m4_b2_m(...) __riscv_vmsgt_vx_i8m4_b2_mu(__VA_ARGS__)
15166
#define vmsgt_vv_i8m8_b1_m(...) __riscv_vmsgt_vv_i8m8_b1_mu(__VA_ARGS__)
15167
#define vmsgt_vx_i8m8_b1_m(...) __riscv_vmsgt_vx_i8m8_b1_mu(__VA_ARGS__)
15168
#define vmsgt_vv_i16mf4_b64_m(...) __riscv_vmsgt_vv_i16mf4_b64_mu(__VA_ARGS__)
15169
#define vmsgt_vx_i16mf4_b64_m(...) __riscv_vmsgt_vx_i16mf4_b64_mu(__VA_ARGS__)
15170
#define vmsgt_vv_i16mf2_b32_m(...) __riscv_vmsgt_vv_i16mf2_b32_mu(__VA_ARGS__)
15171
#define vmsgt_vx_i16mf2_b32_m(...) __riscv_vmsgt_vx_i16mf2_b32_mu(__VA_ARGS__)
15172
#define vmsgt_vv_i16m1_b16_m(...) __riscv_vmsgt_vv_i16m1_b16_mu(__VA_ARGS__)
15173
#define vmsgt_vx_i16m1_b16_m(...) __riscv_vmsgt_vx_i16m1_b16_mu(__VA_ARGS__)
15174
#define vmsgt_vv_i16m2_b8_m(...) __riscv_vmsgt_vv_i16m2_b8_mu(__VA_ARGS__)
15175
#define vmsgt_vx_i16m2_b8_m(...) __riscv_vmsgt_vx_i16m2_b8_mu(__VA_ARGS__)
15176
#define vmsgt_vv_i16m4_b4_m(...) __riscv_vmsgt_vv_i16m4_b4_mu(__VA_ARGS__)
15177
#define vmsgt_vx_i16m4_b4_m(...) __riscv_vmsgt_vx_i16m4_b4_mu(__VA_ARGS__)
15178
#define vmsgt_vv_i16m8_b2_m(...) __riscv_vmsgt_vv_i16m8_b2_mu(__VA_ARGS__)
15179
#define vmsgt_vx_i16m8_b2_m(...) __riscv_vmsgt_vx_i16m8_b2_mu(__VA_ARGS__)
15180
#define vmsgt_vv_i32mf2_b64_m(...) __riscv_vmsgt_vv_i32mf2_b64_mu(__VA_ARGS__)
15181
#define vmsgt_vx_i32mf2_b64_m(...) __riscv_vmsgt_vx_i32mf2_b64_mu(__VA_ARGS__)
15182
#define vmsgt_vv_i32m1_b32_m(...) __riscv_vmsgt_vv_i32m1_b32_mu(__VA_ARGS__)
15183
#define vmsgt_vx_i32m1_b32_m(...) __riscv_vmsgt_vx_i32m1_b32_mu(__VA_ARGS__)
15184
#define vmsgt_vv_i32m2_b16_m(...) __riscv_vmsgt_vv_i32m2_b16_mu(__VA_ARGS__)
15185
#define vmsgt_vx_i32m2_b16_m(...) __riscv_vmsgt_vx_i32m2_b16_mu(__VA_ARGS__)
15186
#define vmsgt_vv_i32m4_b8_m(...) __riscv_vmsgt_vv_i32m4_b8_mu(__VA_ARGS__)
15187
#define vmsgt_vx_i32m4_b8_m(...) __riscv_vmsgt_vx_i32m4_b8_mu(__VA_ARGS__)
15188
#define vmsgt_vv_i32m8_b4_m(...) __riscv_vmsgt_vv_i32m8_b4_mu(__VA_ARGS__)
15189
#define vmsgt_vx_i32m8_b4_m(...) __riscv_vmsgt_vx_i32m8_b4_mu(__VA_ARGS__)
15190
#define vmsgt_vv_i64m1_b64_m(...) __riscv_vmsgt_vv_i64m1_b64_mu(__VA_ARGS__)
15191
#define vmsgt_vx_i64m1_b64_m(...) __riscv_vmsgt_vx_i64m1_b64_mu(__VA_ARGS__)
15192
#define vmsgt_vv_i64m2_b32_m(...) __riscv_vmsgt_vv_i64m2_b32_mu(__VA_ARGS__)
15193
#define vmsgt_vx_i64m2_b32_m(...) __riscv_vmsgt_vx_i64m2_b32_mu(__VA_ARGS__)
15194
#define vmsgt_vv_i64m4_b16_m(...) __riscv_vmsgt_vv_i64m4_b16_mu(__VA_ARGS__)
15195
#define vmsgt_vx_i64m4_b16_m(...) __riscv_vmsgt_vx_i64m4_b16_mu(__VA_ARGS__)
15196
#define vmsgt_vv_i64m8_b8_m(...) __riscv_vmsgt_vv_i64m8_b8_mu(__VA_ARGS__)
15197
#define vmsgt_vx_i64m8_b8_m(...) __riscv_vmsgt_vx_i64m8_b8_mu(__VA_ARGS__)
15198
#define vmsge_vv_i8mf8_b64_m(...) __riscv_vmsge_vv_i8mf8_b64_mu(__VA_ARGS__)
15199
#define vmsge_vx_i8mf8_b64_m(...) __riscv_vmsge_vx_i8mf8_b64_mu(__VA_ARGS__)
15200
#define vmsge_vv_i8mf4_b32_m(...) __riscv_vmsge_vv_i8mf4_b32_mu(__VA_ARGS__)
15201
#define vmsge_vx_i8mf4_b32_m(...) __riscv_vmsge_vx_i8mf4_b32_mu(__VA_ARGS__)
15202
#define vmsge_vv_i8mf2_b16_m(...) __riscv_vmsge_vv_i8mf2_b16_mu(__VA_ARGS__)
15203
#define vmsge_vx_i8mf2_b16_m(...) __riscv_vmsge_vx_i8mf2_b16_mu(__VA_ARGS__)
15204
#define vmsge_vv_i8m1_b8_m(...) __riscv_vmsge_vv_i8m1_b8_mu(__VA_ARGS__)
15205
#define vmsge_vx_i8m1_b8_m(...) __riscv_vmsge_vx_i8m1_b8_mu(__VA_ARGS__)
15206
#define vmsge_vv_i8m2_b4_m(...) __riscv_vmsge_vv_i8m2_b4_mu(__VA_ARGS__)
15207
#define vmsge_vx_i8m2_b4_m(...) __riscv_vmsge_vx_i8m2_b4_mu(__VA_ARGS__)
15208
#define vmsge_vv_i8m4_b2_m(...) __riscv_vmsge_vv_i8m4_b2_mu(__VA_ARGS__)
15209
#define vmsge_vx_i8m4_b2_m(...) __riscv_vmsge_vx_i8m4_b2_mu(__VA_ARGS__)
15210
#define vmsge_vv_i8m8_b1_m(...) __riscv_vmsge_vv_i8m8_b1_mu(__VA_ARGS__)
15211
#define vmsge_vx_i8m8_b1_m(...) __riscv_vmsge_vx_i8m8_b1_mu(__VA_ARGS__)
15212
#define vmsge_vv_i16mf4_b64_m(...) __riscv_vmsge_vv_i16mf4_b64_mu(__VA_ARGS__)
15213
#define vmsge_vx_i16mf4_b64_m(...) __riscv_vmsge_vx_i16mf4_b64_mu(__VA_ARGS__)
15214
#define vmsge_vv_i16mf2_b32_m(...) __riscv_vmsge_vv_i16mf2_b32_mu(__VA_ARGS__)
15215
#define vmsge_vx_i16mf2_b32_m(...) __riscv_vmsge_vx_i16mf2_b32_mu(__VA_ARGS__)
15216
#define vmsge_vv_i16m1_b16_m(...) __riscv_vmsge_vv_i16m1_b16_mu(__VA_ARGS__)
15217
#define vmsge_vx_i16m1_b16_m(...) __riscv_vmsge_vx_i16m1_b16_mu(__VA_ARGS__)
15218
#define vmsge_vv_i16m2_b8_m(...) __riscv_vmsge_vv_i16m2_b8_mu(__VA_ARGS__)
15219
#define vmsge_vx_i16m2_b8_m(...) __riscv_vmsge_vx_i16m2_b8_mu(__VA_ARGS__)
15220
#define vmsge_vv_i16m4_b4_m(...) __riscv_vmsge_vv_i16m4_b4_mu(__VA_ARGS__)
15221
#define vmsge_vx_i16m4_b4_m(...) __riscv_vmsge_vx_i16m4_b4_mu(__VA_ARGS__)
15222
#define vmsge_vv_i16m8_b2_m(...) __riscv_vmsge_vv_i16m8_b2_mu(__VA_ARGS__)
15223
#define vmsge_vx_i16m8_b2_m(...) __riscv_vmsge_vx_i16m8_b2_mu(__VA_ARGS__)
15224
#define vmsge_vv_i32mf2_b64_m(...) __riscv_vmsge_vv_i32mf2_b64_mu(__VA_ARGS__)
15225
#define vmsge_vx_i32mf2_b64_m(...) __riscv_vmsge_vx_i32mf2_b64_mu(__VA_ARGS__)
15226
#define vmsge_vv_i32m1_b32_m(...) __riscv_vmsge_vv_i32m1_b32_mu(__VA_ARGS__)
15227
#define vmsge_vx_i32m1_b32_m(...) __riscv_vmsge_vx_i32m1_b32_mu(__VA_ARGS__)
15228
#define vmsge_vv_i32m2_b16_m(...) __riscv_vmsge_vv_i32m2_b16_mu(__VA_ARGS__)
15229
#define vmsge_vx_i32m2_b16_m(...) __riscv_vmsge_vx_i32m2_b16_mu(__VA_ARGS__)
15230
#define vmsge_vv_i32m4_b8_m(...) __riscv_vmsge_vv_i32m4_b8_mu(__VA_ARGS__)
15231
#define vmsge_vx_i32m4_b8_m(...) __riscv_vmsge_vx_i32m4_b8_mu(__VA_ARGS__)
15232
#define vmsge_vv_i32m8_b4_m(...) __riscv_vmsge_vv_i32m8_b4_mu(__VA_ARGS__)
15233
#define vmsge_vx_i32m8_b4_m(...) __riscv_vmsge_vx_i32m8_b4_mu(__VA_ARGS__)
15234
#define vmsge_vv_i64m1_b64_m(...) __riscv_vmsge_vv_i64m1_b64_mu(__VA_ARGS__)
15235
#define vmsge_vx_i64m1_b64_m(...) __riscv_vmsge_vx_i64m1_b64_mu(__VA_ARGS__)
15236
#define vmsge_vv_i64m2_b32_m(...) __riscv_vmsge_vv_i64m2_b32_mu(__VA_ARGS__)
15237
#define vmsge_vx_i64m2_b32_m(...) __riscv_vmsge_vx_i64m2_b32_mu(__VA_ARGS__)
15238
#define vmsge_vv_i64m4_b16_m(...) __riscv_vmsge_vv_i64m4_b16_mu(__VA_ARGS__)
15239
#define vmsge_vx_i64m4_b16_m(...) __riscv_vmsge_vx_i64m4_b16_mu(__VA_ARGS__)
15240
#define vmsge_vv_i64m8_b8_m(...) __riscv_vmsge_vv_i64m8_b8_mu(__VA_ARGS__)
15241
#define vmsge_vx_i64m8_b8_m(...) __riscv_vmsge_vx_i64m8_b8_mu(__VA_ARGS__)
15242
#define vmseq_vv_u8mf8_b64_m(...) __riscv_vmseq_vv_u8mf8_b64_mu(__VA_ARGS__)
15243
#define vmseq_vx_u8mf8_b64_m(...) __riscv_vmseq_vx_u8mf8_b64_mu(__VA_ARGS__)
15244
#define vmseq_vv_u8mf4_b32_m(...) __riscv_vmseq_vv_u8mf4_b32_mu(__VA_ARGS__)
15245
#define vmseq_vx_u8mf4_b32_m(...) __riscv_vmseq_vx_u8mf4_b32_mu(__VA_ARGS__)
15246
#define vmseq_vv_u8mf2_b16_m(...) __riscv_vmseq_vv_u8mf2_b16_mu(__VA_ARGS__)
15247
#define vmseq_vx_u8mf2_b16_m(...) __riscv_vmseq_vx_u8mf2_b16_mu(__VA_ARGS__)
15248
#define vmseq_vv_u8m1_b8_m(...) __riscv_vmseq_vv_u8m1_b8_mu(__VA_ARGS__)
15249
#define vmseq_vx_u8m1_b8_m(...) __riscv_vmseq_vx_u8m1_b8_mu(__VA_ARGS__)
15250
#define vmseq_vv_u8m2_b4_m(...) __riscv_vmseq_vv_u8m2_b4_mu(__VA_ARGS__)
15251
#define vmseq_vx_u8m2_b4_m(...) __riscv_vmseq_vx_u8m2_b4_mu(__VA_ARGS__)
15252
#define vmseq_vv_u8m4_b2_m(...) __riscv_vmseq_vv_u8m4_b2_mu(__VA_ARGS__)
15253
#define vmseq_vx_u8m4_b2_m(...) __riscv_vmseq_vx_u8m4_b2_mu(__VA_ARGS__)
15254
#define vmseq_vv_u8m8_b1_m(...) __riscv_vmseq_vv_u8m8_b1_mu(__VA_ARGS__)
15255
#define vmseq_vx_u8m8_b1_m(...) __riscv_vmseq_vx_u8m8_b1_mu(__VA_ARGS__)
15256
#define vmseq_vv_u16mf4_b64_m(...) __riscv_vmseq_vv_u16mf4_b64_mu(__VA_ARGS__)
15257
#define vmseq_vx_u16mf4_b64_m(...) __riscv_vmseq_vx_u16mf4_b64_mu(__VA_ARGS__)
15258
#define vmseq_vv_u16mf2_b32_m(...) __riscv_vmseq_vv_u16mf2_b32_mu(__VA_ARGS__)
15259
#define vmseq_vx_u16mf2_b32_m(...) __riscv_vmseq_vx_u16mf2_b32_mu(__VA_ARGS__)
15260
#define vmseq_vv_u16m1_b16_m(...) __riscv_vmseq_vv_u16m1_b16_mu(__VA_ARGS__)
15261
#define vmseq_vx_u16m1_b16_m(...) __riscv_vmseq_vx_u16m1_b16_mu(__VA_ARGS__)
15262
#define vmseq_vv_u16m2_b8_m(...) __riscv_vmseq_vv_u16m2_b8_mu(__VA_ARGS__)
15263
#define vmseq_vx_u16m2_b8_m(...) __riscv_vmseq_vx_u16m2_b8_mu(__VA_ARGS__)
15264
#define vmseq_vv_u16m4_b4_m(...) __riscv_vmseq_vv_u16m4_b4_mu(__VA_ARGS__)
15265
#define vmseq_vx_u16m4_b4_m(...) __riscv_vmseq_vx_u16m4_b4_mu(__VA_ARGS__)
15266
#define vmseq_vv_u16m8_b2_m(...) __riscv_vmseq_vv_u16m8_b2_mu(__VA_ARGS__)
15267
#define vmseq_vx_u16m8_b2_m(...) __riscv_vmseq_vx_u16m8_b2_mu(__VA_ARGS__)
15268
#define vmseq_vv_u32mf2_b64_m(...) __riscv_vmseq_vv_u32mf2_b64_mu(__VA_ARGS__)
15269
#define vmseq_vx_u32mf2_b64_m(...) __riscv_vmseq_vx_u32mf2_b64_mu(__VA_ARGS__)
15270
#define vmseq_vv_u32m1_b32_m(...) __riscv_vmseq_vv_u32m1_b32_mu(__VA_ARGS__)
15271
#define vmseq_vx_u32m1_b32_m(...) __riscv_vmseq_vx_u32m1_b32_mu(__VA_ARGS__)
15272
#define vmseq_vv_u32m2_b16_m(...) __riscv_vmseq_vv_u32m2_b16_mu(__VA_ARGS__)
15273
#define vmseq_vx_u32m2_b16_m(...) __riscv_vmseq_vx_u32m2_b16_mu(__VA_ARGS__)
15274
#define vmseq_vv_u32m4_b8_m(...) __riscv_vmseq_vv_u32m4_b8_mu(__VA_ARGS__)
15275
#define vmseq_vx_u32m4_b8_m(...) __riscv_vmseq_vx_u32m4_b8_mu(__VA_ARGS__)
15276
#define vmseq_vv_u32m8_b4_m(...) __riscv_vmseq_vv_u32m8_b4_mu(__VA_ARGS__)
15277
#define vmseq_vx_u32m8_b4_m(...) __riscv_vmseq_vx_u32m8_b4_mu(__VA_ARGS__)
15278
#define vmseq_vv_u64m1_b64_m(...) __riscv_vmseq_vv_u64m1_b64_mu(__VA_ARGS__)
15279
#define vmseq_vx_u64m1_b64_m(...) __riscv_vmseq_vx_u64m1_b64_mu(__VA_ARGS__)
15280
#define vmseq_vv_u64m2_b32_m(...) __riscv_vmseq_vv_u64m2_b32_mu(__VA_ARGS__)
15281
#define vmseq_vx_u64m2_b32_m(...) __riscv_vmseq_vx_u64m2_b32_mu(__VA_ARGS__)
15282
#define vmseq_vv_u64m4_b16_m(...) __riscv_vmseq_vv_u64m4_b16_mu(__VA_ARGS__)
15283
#define vmseq_vx_u64m4_b16_m(...) __riscv_vmseq_vx_u64m4_b16_mu(__VA_ARGS__)
15284
#define vmseq_vv_u64m8_b8_m(...) __riscv_vmseq_vv_u64m8_b8_mu(__VA_ARGS__)
15285
#define vmseq_vx_u64m8_b8_m(...) __riscv_vmseq_vx_u64m8_b8_mu(__VA_ARGS__)
15286
#define vmsne_vv_u8mf8_b64_m(...) __riscv_vmsne_vv_u8mf8_b64_mu(__VA_ARGS__)
15287
#define vmsne_vx_u8mf8_b64_m(...) __riscv_vmsne_vx_u8mf8_b64_mu(__VA_ARGS__)
15288
#define vmsne_vv_u8mf4_b32_m(...) __riscv_vmsne_vv_u8mf4_b32_mu(__VA_ARGS__)
15289
#define vmsne_vx_u8mf4_b32_m(...) __riscv_vmsne_vx_u8mf4_b32_mu(__VA_ARGS__)
15290
#define vmsne_vv_u8mf2_b16_m(...) __riscv_vmsne_vv_u8mf2_b16_mu(__VA_ARGS__)
15291
#define vmsne_vx_u8mf2_b16_m(...) __riscv_vmsne_vx_u8mf2_b16_mu(__VA_ARGS__)
15292
#define vmsne_vv_u8m1_b8_m(...) __riscv_vmsne_vv_u8m1_b8_mu(__VA_ARGS__)
15293
#define vmsne_vx_u8m1_b8_m(...) __riscv_vmsne_vx_u8m1_b8_mu(__VA_ARGS__)
15294
#define vmsne_vv_u8m2_b4_m(...) __riscv_vmsne_vv_u8m2_b4_mu(__VA_ARGS__)
15295
#define vmsne_vx_u8m2_b4_m(...) __riscv_vmsne_vx_u8m2_b4_mu(__VA_ARGS__)
15296
#define vmsne_vv_u8m4_b2_m(...) __riscv_vmsne_vv_u8m4_b2_mu(__VA_ARGS__)
15297
#define vmsne_vx_u8m4_b2_m(...) __riscv_vmsne_vx_u8m4_b2_mu(__VA_ARGS__)
15298
#define vmsne_vv_u8m8_b1_m(...) __riscv_vmsne_vv_u8m8_b1_mu(__VA_ARGS__)
15299
#define vmsne_vx_u8m8_b1_m(...) __riscv_vmsne_vx_u8m8_b1_mu(__VA_ARGS__)
15300
#define vmsne_vv_u16mf4_b64_m(...) __riscv_vmsne_vv_u16mf4_b64_mu(__VA_ARGS__)
15301
#define vmsne_vx_u16mf4_b64_m(...) __riscv_vmsne_vx_u16mf4_b64_mu(__VA_ARGS__)
15302
#define vmsne_vv_u16mf2_b32_m(...) __riscv_vmsne_vv_u16mf2_b32_mu(__VA_ARGS__)
15303
#define vmsne_vx_u16mf2_b32_m(...) __riscv_vmsne_vx_u16mf2_b32_mu(__VA_ARGS__)
15304
#define vmsne_vv_u16m1_b16_m(...) __riscv_vmsne_vv_u16m1_b16_mu(__VA_ARGS__)
15305
#define vmsne_vx_u16m1_b16_m(...) __riscv_vmsne_vx_u16m1_b16_mu(__VA_ARGS__)
15306
#define vmsne_vv_u16m2_b8_m(...) __riscv_vmsne_vv_u16m2_b8_mu(__VA_ARGS__)
15307
#define vmsne_vx_u16m2_b8_m(...) __riscv_vmsne_vx_u16m2_b8_mu(__VA_ARGS__)
15308
#define vmsne_vv_u16m4_b4_m(...) __riscv_vmsne_vv_u16m4_b4_mu(__VA_ARGS__)
15309
#define vmsne_vx_u16m4_b4_m(...) __riscv_vmsne_vx_u16m4_b4_mu(__VA_ARGS__)
15310
#define vmsne_vv_u16m8_b2_m(...) __riscv_vmsne_vv_u16m8_b2_mu(__VA_ARGS__)
15311
#define vmsne_vx_u16m8_b2_m(...) __riscv_vmsne_vx_u16m8_b2_mu(__VA_ARGS__)
15312
#define vmsne_vv_u32mf2_b64_m(...) __riscv_vmsne_vv_u32mf2_b64_mu(__VA_ARGS__)
15313
#define vmsne_vx_u32mf2_b64_m(...) __riscv_vmsne_vx_u32mf2_b64_mu(__VA_ARGS__)
15314
#define vmsne_vv_u32m1_b32_m(...) __riscv_vmsne_vv_u32m1_b32_mu(__VA_ARGS__)
15315
#define vmsne_vx_u32m1_b32_m(...) __riscv_vmsne_vx_u32m1_b32_mu(__VA_ARGS__)
15316
#define vmsne_vv_u32m2_b16_m(...) __riscv_vmsne_vv_u32m2_b16_mu(__VA_ARGS__)
15317
#define vmsne_vx_u32m2_b16_m(...) __riscv_vmsne_vx_u32m2_b16_mu(__VA_ARGS__)
15318
#define vmsne_vv_u32m4_b8_m(...) __riscv_vmsne_vv_u32m4_b8_mu(__VA_ARGS__)
15319
#define vmsne_vx_u32m4_b8_m(...) __riscv_vmsne_vx_u32m4_b8_mu(__VA_ARGS__)
15320
#define vmsne_vv_u32m8_b4_m(...) __riscv_vmsne_vv_u32m8_b4_mu(__VA_ARGS__)
15321
#define vmsne_vx_u32m8_b4_m(...) __riscv_vmsne_vx_u32m8_b4_mu(__VA_ARGS__)
15322
#define vmsne_vv_u64m1_b64_m(...) __riscv_vmsne_vv_u64m1_b64_mu(__VA_ARGS__)
15323
#define vmsne_vx_u64m1_b64_m(...) __riscv_vmsne_vx_u64m1_b64_mu(__VA_ARGS__)
15324
#define vmsne_vv_u64m2_b32_m(...) __riscv_vmsne_vv_u64m2_b32_mu(__VA_ARGS__)
15325
#define vmsne_vx_u64m2_b32_m(...) __riscv_vmsne_vx_u64m2_b32_mu(__VA_ARGS__)
15326
#define vmsne_vv_u64m4_b16_m(...) __riscv_vmsne_vv_u64m4_b16_mu(__VA_ARGS__)
15327
#define vmsne_vx_u64m4_b16_m(...) __riscv_vmsne_vx_u64m4_b16_mu(__VA_ARGS__)
15328
#define vmsne_vv_u64m8_b8_m(...) __riscv_vmsne_vv_u64m8_b8_mu(__VA_ARGS__)
15329
#define vmsne_vx_u64m8_b8_m(...) __riscv_vmsne_vx_u64m8_b8_mu(__VA_ARGS__)
15330
#define vmsltu_vv_u8mf8_b64_m(...) __riscv_vmsltu_vv_u8mf8_b64_mu(__VA_ARGS__)
15331
#define vmsltu_vx_u8mf8_b64_m(...) __riscv_vmsltu_vx_u8mf8_b64_mu(__VA_ARGS__)
15332
#define vmsltu_vv_u8mf4_b32_m(...) __riscv_vmsltu_vv_u8mf4_b32_mu(__VA_ARGS__)
15333
#define vmsltu_vx_u8mf4_b32_m(...) __riscv_vmsltu_vx_u8mf4_b32_mu(__VA_ARGS__)
15334
#define vmsltu_vv_u8mf2_b16_m(...) __riscv_vmsltu_vv_u8mf2_b16_mu(__VA_ARGS__)
15335
#define vmsltu_vx_u8mf2_b16_m(...) __riscv_vmsltu_vx_u8mf2_b16_mu(__VA_ARGS__)
15336
#define vmsltu_vv_u8m1_b8_m(...) __riscv_vmsltu_vv_u8m1_b8_mu(__VA_ARGS__)
15337
#define vmsltu_vx_u8m1_b8_m(...) __riscv_vmsltu_vx_u8m1_b8_mu(__VA_ARGS__)
15338
#define vmsltu_vv_u8m2_b4_m(...) __riscv_vmsltu_vv_u8m2_b4_mu(__VA_ARGS__)
15339
#define vmsltu_vx_u8m2_b4_m(...) __riscv_vmsltu_vx_u8m2_b4_mu(__VA_ARGS__)
15340
#define vmsltu_vv_u8m4_b2_m(...) __riscv_vmsltu_vv_u8m4_b2_mu(__VA_ARGS__)
15341
#define vmsltu_vx_u8m4_b2_m(...) __riscv_vmsltu_vx_u8m4_b2_mu(__VA_ARGS__)
15342
#define vmsltu_vv_u8m8_b1_m(...) __riscv_vmsltu_vv_u8m8_b1_mu(__VA_ARGS__)
15343
#define vmsltu_vx_u8m8_b1_m(...) __riscv_vmsltu_vx_u8m8_b1_mu(__VA_ARGS__)
15344
#define vmsltu_vv_u16mf4_b64_m(...) __riscv_vmsltu_vv_u16mf4_b64_mu(__VA_ARGS__)
15345
#define vmsltu_vx_u16mf4_b64_m(...) __riscv_vmsltu_vx_u16mf4_b64_mu(__VA_ARGS__)
15346
#define vmsltu_vv_u16mf2_b32_m(...) __riscv_vmsltu_vv_u16mf2_b32_mu(__VA_ARGS__)
15347
#define vmsltu_vx_u16mf2_b32_m(...) __riscv_vmsltu_vx_u16mf2_b32_mu(__VA_ARGS__)
15348
#define vmsltu_vv_u16m1_b16_m(...) __riscv_vmsltu_vv_u16m1_b16_mu(__VA_ARGS__)
15349
#define vmsltu_vx_u16m1_b16_m(...) __riscv_vmsltu_vx_u16m1_b16_mu(__VA_ARGS__)
15350
#define vmsltu_vv_u16m2_b8_m(...) __riscv_vmsltu_vv_u16m2_b8_mu(__VA_ARGS__)
15351
#define vmsltu_vx_u16m2_b8_m(...) __riscv_vmsltu_vx_u16m2_b8_mu(__VA_ARGS__)
15352
#define vmsltu_vv_u16m4_b4_m(...) __riscv_vmsltu_vv_u16m4_b4_mu(__VA_ARGS__)
15353
#define vmsltu_vx_u16m4_b4_m(...) __riscv_vmsltu_vx_u16m4_b4_mu(__VA_ARGS__)
15354
#define vmsltu_vv_u16m8_b2_m(...) __riscv_vmsltu_vv_u16m8_b2_mu(__VA_ARGS__)
15355
#define vmsltu_vx_u16m8_b2_m(...) __riscv_vmsltu_vx_u16m8_b2_mu(__VA_ARGS__)
15356
#define vmsltu_vv_u32mf2_b64_m(...) __riscv_vmsltu_vv_u32mf2_b64_mu(__VA_ARGS__)
15357
#define vmsltu_vx_u32mf2_b64_m(...) __riscv_vmsltu_vx_u32mf2_b64_mu(__VA_ARGS__)
15358
#define vmsltu_vv_u32m1_b32_m(...) __riscv_vmsltu_vv_u32m1_b32_mu(__VA_ARGS__)
15359
#define vmsltu_vx_u32m1_b32_m(...) __riscv_vmsltu_vx_u32m1_b32_mu(__VA_ARGS__)
15360
#define vmsltu_vv_u32m2_b16_m(...) __riscv_vmsltu_vv_u32m2_b16_mu(__VA_ARGS__)
15361
#define vmsltu_vx_u32m2_b16_m(...) __riscv_vmsltu_vx_u32m2_b16_mu(__VA_ARGS__)
15362
#define vmsltu_vv_u32m4_b8_m(...) __riscv_vmsltu_vv_u32m4_b8_mu(__VA_ARGS__)
15363
#define vmsltu_vx_u32m4_b8_m(...) __riscv_vmsltu_vx_u32m4_b8_mu(__VA_ARGS__)
15364
#define vmsltu_vv_u32m8_b4_m(...) __riscv_vmsltu_vv_u32m8_b4_mu(__VA_ARGS__)
15365
#define vmsltu_vx_u32m8_b4_m(...) __riscv_vmsltu_vx_u32m8_b4_mu(__VA_ARGS__)
15366
#define vmsltu_vv_u64m1_b64_m(...) __riscv_vmsltu_vv_u64m1_b64_mu(__VA_ARGS__)
15367
#define vmsltu_vx_u64m1_b64_m(...) __riscv_vmsltu_vx_u64m1_b64_mu(__VA_ARGS__)
15368
#define vmsltu_vv_u64m2_b32_m(...) __riscv_vmsltu_vv_u64m2_b32_mu(__VA_ARGS__)
15369
#define vmsltu_vx_u64m2_b32_m(...) __riscv_vmsltu_vx_u64m2_b32_mu(__VA_ARGS__)
15370
#define vmsltu_vv_u64m4_b16_m(...) __riscv_vmsltu_vv_u64m4_b16_mu(__VA_ARGS__)
15371
#define vmsltu_vx_u64m4_b16_m(...) __riscv_vmsltu_vx_u64m4_b16_mu(__VA_ARGS__)
15372
#define vmsltu_vv_u64m8_b8_m(...) __riscv_vmsltu_vv_u64m8_b8_mu(__VA_ARGS__)
15373
#define vmsltu_vx_u64m8_b8_m(...) __riscv_vmsltu_vx_u64m8_b8_mu(__VA_ARGS__)
15374
#define vmsleu_vv_u8mf8_b64_m(...) __riscv_vmsleu_vv_u8mf8_b64_mu(__VA_ARGS__)
15375
#define vmsleu_vx_u8mf8_b64_m(...) __riscv_vmsleu_vx_u8mf8_b64_mu(__VA_ARGS__)
15376
#define vmsleu_vv_u8mf4_b32_m(...) __riscv_vmsleu_vv_u8mf4_b32_mu(__VA_ARGS__)
15377
#define vmsleu_vx_u8mf4_b32_m(...) __riscv_vmsleu_vx_u8mf4_b32_mu(__VA_ARGS__)
15378
#define vmsleu_vv_u8mf2_b16_m(...) __riscv_vmsleu_vv_u8mf2_b16_mu(__VA_ARGS__)
15379
#define vmsleu_vx_u8mf2_b16_m(...) __riscv_vmsleu_vx_u8mf2_b16_mu(__VA_ARGS__)
15380
#define vmsleu_vv_u8m1_b8_m(...) __riscv_vmsleu_vv_u8m1_b8_mu(__VA_ARGS__)
15381
#define vmsleu_vx_u8m1_b8_m(...) __riscv_vmsleu_vx_u8m1_b8_mu(__VA_ARGS__)
15382
#define vmsleu_vv_u8m2_b4_m(...) __riscv_vmsleu_vv_u8m2_b4_mu(__VA_ARGS__)
15383
#define vmsleu_vx_u8m2_b4_m(...) __riscv_vmsleu_vx_u8m2_b4_mu(__VA_ARGS__)
15384
#define vmsleu_vv_u8m4_b2_m(...) __riscv_vmsleu_vv_u8m4_b2_mu(__VA_ARGS__)
15385
#define vmsleu_vx_u8m4_b2_m(...) __riscv_vmsleu_vx_u8m4_b2_mu(__VA_ARGS__)
15386
#define vmsleu_vv_u8m8_b1_m(...) __riscv_vmsleu_vv_u8m8_b1_mu(__VA_ARGS__)
15387
#define vmsleu_vx_u8m8_b1_m(...) __riscv_vmsleu_vx_u8m8_b1_mu(__VA_ARGS__)
15388
#define vmsleu_vv_u16mf4_b64_m(...) __riscv_vmsleu_vv_u16mf4_b64_mu(__VA_ARGS__)
15389
#define vmsleu_vx_u16mf4_b64_m(...) __riscv_vmsleu_vx_u16mf4_b64_mu(__VA_ARGS__)
15390
#define vmsleu_vv_u16mf2_b32_m(...) __riscv_vmsleu_vv_u16mf2_b32_mu(__VA_ARGS__)
15391
#define vmsleu_vx_u16mf2_b32_m(...) __riscv_vmsleu_vx_u16mf2_b32_mu(__VA_ARGS__)
15392
#define vmsleu_vv_u16m1_b16_m(...) __riscv_vmsleu_vv_u16m1_b16_mu(__VA_ARGS__)
15393
#define vmsleu_vx_u16m1_b16_m(...) __riscv_vmsleu_vx_u16m1_b16_mu(__VA_ARGS__)
15394
#define vmsleu_vv_u16m2_b8_m(...) __riscv_vmsleu_vv_u16m2_b8_mu(__VA_ARGS__)
15395
#define vmsleu_vx_u16m2_b8_m(...) __riscv_vmsleu_vx_u16m2_b8_mu(__VA_ARGS__)
15396
#define vmsleu_vv_u16m4_b4_m(...) __riscv_vmsleu_vv_u16m4_b4_mu(__VA_ARGS__)
15397
#define vmsleu_vx_u16m4_b4_m(...) __riscv_vmsleu_vx_u16m4_b4_mu(__VA_ARGS__)
15398
#define vmsleu_vv_u16m8_b2_m(...) __riscv_vmsleu_vv_u16m8_b2_mu(__VA_ARGS__)
15399
#define vmsleu_vx_u16m8_b2_m(...) __riscv_vmsleu_vx_u16m8_b2_mu(__VA_ARGS__)
15400
#define vmsleu_vv_u32mf2_b64_m(...) __riscv_vmsleu_vv_u32mf2_b64_mu(__VA_ARGS__)
15401
#define vmsleu_vx_u32mf2_b64_m(...) __riscv_vmsleu_vx_u32mf2_b64_mu(__VA_ARGS__)
15402
#define vmsleu_vv_u32m1_b32_m(...) __riscv_vmsleu_vv_u32m1_b32_mu(__VA_ARGS__)
15403
#define vmsleu_vx_u32m1_b32_m(...) __riscv_vmsleu_vx_u32m1_b32_mu(__VA_ARGS__)
15404
#define vmsleu_vv_u32m2_b16_m(...) __riscv_vmsleu_vv_u32m2_b16_mu(__VA_ARGS__)
15405
#define vmsleu_vx_u32m2_b16_m(...) __riscv_vmsleu_vx_u32m2_b16_mu(__VA_ARGS__)
15406
#define vmsleu_vv_u32m4_b8_m(...) __riscv_vmsleu_vv_u32m4_b8_mu(__VA_ARGS__)
15407
#define vmsleu_vx_u32m4_b8_m(...) __riscv_vmsleu_vx_u32m4_b8_mu(__VA_ARGS__)
15408
#define vmsleu_vv_u32m8_b4_m(...) __riscv_vmsleu_vv_u32m8_b4_mu(__VA_ARGS__)
15409
#define vmsleu_vx_u32m8_b4_m(...) __riscv_vmsleu_vx_u32m8_b4_mu(__VA_ARGS__)
15410
#define vmsleu_vv_u64m1_b64_m(...) __riscv_vmsleu_vv_u64m1_b64_mu(__VA_ARGS__)
15411
#define vmsleu_vx_u64m1_b64_m(...) __riscv_vmsleu_vx_u64m1_b64_mu(__VA_ARGS__)
15412
#define vmsleu_vv_u64m2_b32_m(...) __riscv_vmsleu_vv_u64m2_b32_mu(__VA_ARGS__)
15413
#define vmsleu_vx_u64m2_b32_m(...) __riscv_vmsleu_vx_u64m2_b32_mu(__VA_ARGS__)
15414
#define vmsleu_vv_u64m4_b16_m(...) __riscv_vmsleu_vv_u64m4_b16_mu(__VA_ARGS__)
15415
#define vmsleu_vx_u64m4_b16_m(...) __riscv_vmsleu_vx_u64m4_b16_mu(__VA_ARGS__)
15416
#define vmsleu_vv_u64m8_b8_m(...) __riscv_vmsleu_vv_u64m8_b8_mu(__VA_ARGS__)
15417
#define vmsleu_vx_u64m8_b8_m(...) __riscv_vmsleu_vx_u64m8_b8_mu(__VA_ARGS__)
15418
#define vmsgtu_vv_u8mf8_b64_m(...) __riscv_vmsgtu_vv_u8mf8_b64_mu(__VA_ARGS__)
15419
#define vmsgtu_vx_u8mf8_b64_m(...) __riscv_vmsgtu_vx_u8mf8_b64_mu(__VA_ARGS__)
15420
#define vmsgtu_vv_u8mf4_b32_m(...) __riscv_vmsgtu_vv_u8mf4_b32_mu(__VA_ARGS__)
15421
#define vmsgtu_vx_u8mf4_b32_m(...) __riscv_vmsgtu_vx_u8mf4_b32_mu(__VA_ARGS__)
15422
#define vmsgtu_vv_u8mf2_b16_m(...) __riscv_vmsgtu_vv_u8mf2_b16_mu(__VA_ARGS__)
15423
#define vmsgtu_vx_u8mf2_b16_m(...) __riscv_vmsgtu_vx_u8mf2_b16_mu(__VA_ARGS__)
15424
#define vmsgtu_vv_u8m1_b8_m(...) __riscv_vmsgtu_vv_u8m1_b8_mu(__VA_ARGS__)
15425
#define vmsgtu_vx_u8m1_b8_m(...) __riscv_vmsgtu_vx_u8m1_b8_mu(__VA_ARGS__)
15426
#define vmsgtu_vv_u8m2_b4_m(...) __riscv_vmsgtu_vv_u8m2_b4_mu(__VA_ARGS__)
15427
#define vmsgtu_vx_u8m2_b4_m(...) __riscv_vmsgtu_vx_u8m2_b4_mu(__VA_ARGS__)
15428
#define vmsgtu_vv_u8m4_b2_m(...) __riscv_vmsgtu_vv_u8m4_b2_mu(__VA_ARGS__)
15429
#define vmsgtu_vx_u8m4_b2_m(...) __riscv_vmsgtu_vx_u8m4_b2_mu(__VA_ARGS__)
15430
#define vmsgtu_vv_u8m8_b1_m(...) __riscv_vmsgtu_vv_u8m8_b1_mu(__VA_ARGS__)
15431
#define vmsgtu_vx_u8m8_b1_m(...) __riscv_vmsgtu_vx_u8m8_b1_mu(__VA_ARGS__)
15432
#define vmsgtu_vv_u16mf4_b64_m(...) __riscv_vmsgtu_vv_u16mf4_b64_mu(__VA_ARGS__)
15433
#define vmsgtu_vx_u16mf4_b64_m(...) __riscv_vmsgtu_vx_u16mf4_b64_mu(__VA_ARGS__)
15434
#define vmsgtu_vv_u16mf2_b32_m(...) __riscv_vmsgtu_vv_u16mf2_b32_mu(__VA_ARGS__)
15435
#define vmsgtu_vx_u16mf2_b32_m(...) __riscv_vmsgtu_vx_u16mf2_b32_mu(__VA_ARGS__)
15436
#define vmsgtu_vv_u16m1_b16_m(...) __riscv_vmsgtu_vv_u16m1_b16_mu(__VA_ARGS__)
15437
#define vmsgtu_vx_u16m1_b16_m(...) __riscv_vmsgtu_vx_u16m1_b16_mu(__VA_ARGS__)
15438
#define vmsgtu_vv_u16m2_b8_m(...) __riscv_vmsgtu_vv_u16m2_b8_mu(__VA_ARGS__)
15439
#define vmsgtu_vx_u16m2_b8_m(...) __riscv_vmsgtu_vx_u16m2_b8_mu(__VA_ARGS__)
15440
#define vmsgtu_vv_u16m4_b4_m(...) __riscv_vmsgtu_vv_u16m4_b4_mu(__VA_ARGS__)
15441
#define vmsgtu_vx_u16m4_b4_m(...) __riscv_vmsgtu_vx_u16m4_b4_mu(__VA_ARGS__)
15442
#define vmsgtu_vv_u16m8_b2_m(...) __riscv_vmsgtu_vv_u16m8_b2_mu(__VA_ARGS__)
15443
#define vmsgtu_vx_u16m8_b2_m(...) __riscv_vmsgtu_vx_u16m8_b2_mu(__VA_ARGS__)
15444
#define vmsgtu_vv_u32mf2_b64_m(...) __riscv_vmsgtu_vv_u32mf2_b64_mu(__VA_ARGS__)
15445
#define vmsgtu_vx_u32mf2_b64_m(...) __riscv_vmsgtu_vx_u32mf2_b64_mu(__VA_ARGS__)
15446
#define vmsgtu_vv_u32m1_b32_m(...) __riscv_vmsgtu_vv_u32m1_b32_mu(__VA_ARGS__)
15447
#define vmsgtu_vx_u32m1_b32_m(...) __riscv_vmsgtu_vx_u32m1_b32_mu(__VA_ARGS__)
15448
#define vmsgtu_vv_u32m2_b16_m(...) __riscv_vmsgtu_vv_u32m2_b16_mu(__VA_ARGS__)
15449
#define vmsgtu_vx_u32m2_b16_m(...) __riscv_vmsgtu_vx_u32m2_b16_mu(__VA_ARGS__)
15450
#define vmsgtu_vv_u32m4_b8_m(...) __riscv_vmsgtu_vv_u32m4_b8_mu(__VA_ARGS__)
15451
#define vmsgtu_vx_u32m4_b8_m(...) __riscv_vmsgtu_vx_u32m4_b8_mu(__VA_ARGS__)
15452
#define vmsgtu_vv_u32m8_b4_m(...) __riscv_vmsgtu_vv_u32m8_b4_mu(__VA_ARGS__)
15453
#define vmsgtu_vx_u32m8_b4_m(...) __riscv_vmsgtu_vx_u32m8_b4_mu(__VA_ARGS__)
15454
#define vmsgtu_vv_u64m1_b64_m(...) __riscv_vmsgtu_vv_u64m1_b64_mu(__VA_ARGS__)
15455
#define vmsgtu_vx_u64m1_b64_m(...) __riscv_vmsgtu_vx_u64m1_b64_mu(__VA_ARGS__)
15456
#define vmsgtu_vv_u64m2_b32_m(...) __riscv_vmsgtu_vv_u64m2_b32_mu(__VA_ARGS__)
15457
#define vmsgtu_vx_u64m2_b32_m(...) __riscv_vmsgtu_vx_u64m2_b32_mu(__VA_ARGS__)
15458
#define vmsgtu_vv_u64m4_b16_m(...) __riscv_vmsgtu_vv_u64m4_b16_mu(__VA_ARGS__)
15459
#define vmsgtu_vx_u64m4_b16_m(...) __riscv_vmsgtu_vx_u64m4_b16_mu(__VA_ARGS__)
15460
#define vmsgtu_vv_u64m8_b8_m(...) __riscv_vmsgtu_vv_u64m8_b8_mu(__VA_ARGS__)
15461
#define vmsgtu_vx_u64m8_b8_m(...) __riscv_vmsgtu_vx_u64m8_b8_mu(__VA_ARGS__)
15462
#define vmsgeu_vv_u8mf8_b64_m(...) __riscv_vmsgeu_vv_u8mf8_b64_mu(__VA_ARGS__)
15463
#define vmsgeu_vx_u8mf8_b64_m(...) __riscv_vmsgeu_vx_u8mf8_b64_mu(__VA_ARGS__)
15464
#define vmsgeu_vv_u8mf4_b32_m(...) __riscv_vmsgeu_vv_u8mf4_b32_mu(__VA_ARGS__)
15465
#define vmsgeu_vx_u8mf4_b32_m(...) __riscv_vmsgeu_vx_u8mf4_b32_mu(__VA_ARGS__)
15466
#define vmsgeu_vv_u8mf2_b16_m(...) __riscv_vmsgeu_vv_u8mf2_b16_mu(__VA_ARGS__)
15467
#define vmsgeu_vx_u8mf2_b16_m(...) __riscv_vmsgeu_vx_u8mf2_b16_mu(__VA_ARGS__)
15468
#define vmsgeu_vv_u8m1_b8_m(...) __riscv_vmsgeu_vv_u8m1_b8_mu(__VA_ARGS__)
15469
#define vmsgeu_vx_u8m1_b8_m(...) __riscv_vmsgeu_vx_u8m1_b8_mu(__VA_ARGS__)
15470
#define vmsgeu_vv_u8m2_b4_m(...) __riscv_vmsgeu_vv_u8m2_b4_mu(__VA_ARGS__)
15471
#define vmsgeu_vx_u8m2_b4_m(...) __riscv_vmsgeu_vx_u8m2_b4_mu(__VA_ARGS__)
15472
#define vmsgeu_vv_u8m4_b2_m(...) __riscv_vmsgeu_vv_u8m4_b2_mu(__VA_ARGS__)
15473
#define vmsgeu_vx_u8m4_b2_m(...) __riscv_vmsgeu_vx_u8m4_b2_mu(__VA_ARGS__)
15474
#define vmsgeu_vv_u8m8_b1_m(...) __riscv_vmsgeu_vv_u8m8_b1_mu(__VA_ARGS__)
15475
#define vmsgeu_vx_u8m8_b1_m(...) __riscv_vmsgeu_vx_u8m8_b1_mu(__VA_ARGS__)
15476
#define vmsgeu_vv_u16mf4_b64_m(...) __riscv_vmsgeu_vv_u16mf4_b64_mu(__VA_ARGS__)
15477
#define vmsgeu_vx_u16mf4_b64_m(...) __riscv_vmsgeu_vx_u16mf4_b64_mu(__VA_ARGS__)
15478
#define vmsgeu_vv_u16mf2_b32_m(...) __riscv_vmsgeu_vv_u16mf2_b32_mu(__VA_ARGS__)
15479
#define vmsgeu_vx_u16mf2_b32_m(...) __riscv_vmsgeu_vx_u16mf2_b32_mu(__VA_ARGS__)
15480
#define vmsgeu_vv_u16m1_b16_m(...) __riscv_vmsgeu_vv_u16m1_b16_mu(__VA_ARGS__)
15481
#define vmsgeu_vx_u16m1_b16_m(...) __riscv_vmsgeu_vx_u16m1_b16_mu(__VA_ARGS__)
15482
#define vmsgeu_vv_u16m2_b8_m(...) __riscv_vmsgeu_vv_u16m2_b8_mu(__VA_ARGS__)
15483
#define vmsgeu_vx_u16m2_b8_m(...) __riscv_vmsgeu_vx_u16m2_b8_mu(__VA_ARGS__)
15484
#define vmsgeu_vv_u16m4_b4_m(...) __riscv_vmsgeu_vv_u16m4_b4_mu(__VA_ARGS__)
15485
#define vmsgeu_vx_u16m4_b4_m(...) __riscv_vmsgeu_vx_u16m4_b4_mu(__VA_ARGS__)
15486
#define vmsgeu_vv_u16m8_b2_m(...) __riscv_vmsgeu_vv_u16m8_b2_mu(__VA_ARGS__)
15487
#define vmsgeu_vx_u16m8_b2_m(...) __riscv_vmsgeu_vx_u16m8_b2_mu(__VA_ARGS__)
15488
#define vmsgeu_vv_u32mf2_b64_m(...) __riscv_vmsgeu_vv_u32mf2_b64_mu(__VA_ARGS__)
15489
#define vmsgeu_vx_u32mf2_b64_m(...) __riscv_vmsgeu_vx_u32mf2_b64_mu(__VA_ARGS__)
15490
#define vmsgeu_vv_u32m1_b32_m(...) __riscv_vmsgeu_vv_u32m1_b32_mu(__VA_ARGS__)
15491
#define vmsgeu_vx_u32m1_b32_m(...) __riscv_vmsgeu_vx_u32m1_b32_mu(__VA_ARGS__)
15492
#define vmsgeu_vv_u32m2_b16_m(...) __riscv_vmsgeu_vv_u32m2_b16_mu(__VA_ARGS__)
15493
#define vmsgeu_vx_u32m2_b16_m(...) __riscv_vmsgeu_vx_u32m2_b16_mu(__VA_ARGS__)
15494
#define vmsgeu_vv_u32m4_b8_m(...) __riscv_vmsgeu_vv_u32m4_b8_mu(__VA_ARGS__)
15495
#define vmsgeu_vx_u32m4_b8_m(...) __riscv_vmsgeu_vx_u32m4_b8_mu(__VA_ARGS__)
15496
#define vmsgeu_vv_u32m8_b4_m(...) __riscv_vmsgeu_vv_u32m8_b4_mu(__VA_ARGS__)
15497
#define vmsgeu_vx_u32m8_b4_m(...) __riscv_vmsgeu_vx_u32m8_b4_mu(__VA_ARGS__)
15498
#define vmsgeu_vv_u64m1_b64_m(...) __riscv_vmsgeu_vv_u64m1_b64_mu(__VA_ARGS__)
15499
#define vmsgeu_vx_u64m1_b64_m(...) __riscv_vmsgeu_vx_u64m1_b64_mu(__VA_ARGS__)
15500
#define vmsgeu_vv_u64m2_b32_m(...) __riscv_vmsgeu_vv_u64m2_b32_mu(__VA_ARGS__)
15501
#define vmsgeu_vx_u64m2_b32_m(...) __riscv_vmsgeu_vx_u64m2_b32_mu(__VA_ARGS__)
15502
#define vmsgeu_vv_u64m4_b16_m(...) __riscv_vmsgeu_vv_u64m4_b16_mu(__VA_ARGS__)
15503
#define vmsgeu_vx_u64m4_b16_m(...) __riscv_vmsgeu_vx_u64m4_b16_mu(__VA_ARGS__)
15504
#define vmsgeu_vv_u64m8_b8_m(...) __riscv_vmsgeu_vv_u64m8_b8_mu(__VA_ARGS__)
15505
#define vmsgeu_vx_u64m8_b8_m(...) __riscv_vmsgeu_vx_u64m8_b8_mu(__VA_ARGS__)
15506
#define vmin_vv_i8mf8(...) __riscv_vmin_vv_i8mf8(__VA_ARGS__)
15507
#define vmin_vx_i8mf8(...) __riscv_vmin_vx_i8mf8(__VA_ARGS__)
15508
#define vmin_vv_i8mf4(...) __riscv_vmin_vv_i8mf4(__VA_ARGS__)
15509
#define vmin_vx_i8mf4(...) __riscv_vmin_vx_i8mf4(__VA_ARGS__)
15510
#define vmin_vv_i8mf2(...) __riscv_vmin_vv_i8mf2(__VA_ARGS__)
15511
#define vmin_vx_i8mf2(...) __riscv_vmin_vx_i8mf2(__VA_ARGS__)
15512
#define vmin_vv_i8m1(...) __riscv_vmin_vv_i8m1(__VA_ARGS__)
15513
#define vmin_vx_i8m1(...) __riscv_vmin_vx_i8m1(__VA_ARGS__)
15514
#define vmin_vv_i8m2(...) __riscv_vmin_vv_i8m2(__VA_ARGS__)
15515
#define vmin_vx_i8m2(...) __riscv_vmin_vx_i8m2(__VA_ARGS__)
15516
#define vmin_vv_i8m4(...) __riscv_vmin_vv_i8m4(__VA_ARGS__)
15517
#define vmin_vx_i8m4(...) __riscv_vmin_vx_i8m4(__VA_ARGS__)
15518
#define vmin_vv_i8m8(...) __riscv_vmin_vv_i8m8(__VA_ARGS__)
15519
#define vmin_vx_i8m8(...) __riscv_vmin_vx_i8m8(__VA_ARGS__)
15520
#define vmin_vv_i16mf4(...) __riscv_vmin_vv_i16mf4(__VA_ARGS__)
15521
#define vmin_vx_i16mf4(...) __riscv_vmin_vx_i16mf4(__VA_ARGS__)
15522
#define vmin_vv_i16mf2(...) __riscv_vmin_vv_i16mf2(__VA_ARGS__)
15523
#define vmin_vx_i16mf2(...) __riscv_vmin_vx_i16mf2(__VA_ARGS__)
15524
#define vmin_vv_i16m1(...) __riscv_vmin_vv_i16m1(__VA_ARGS__)
15525
#define vmin_vx_i16m1(...) __riscv_vmin_vx_i16m1(__VA_ARGS__)
15526
#define vmin_vv_i16m2(...) __riscv_vmin_vv_i16m2(__VA_ARGS__)
15527
#define vmin_vx_i16m2(...) __riscv_vmin_vx_i16m2(__VA_ARGS__)
15528
#define vmin_vv_i16m4(...) __riscv_vmin_vv_i16m4(__VA_ARGS__)
15529
#define vmin_vx_i16m4(...) __riscv_vmin_vx_i16m4(__VA_ARGS__)
15530
#define vmin_vv_i16m8(...) __riscv_vmin_vv_i16m8(__VA_ARGS__)
15531
#define vmin_vx_i16m8(...) __riscv_vmin_vx_i16m8(__VA_ARGS__)
15532
#define vmin_vv_i32mf2(...) __riscv_vmin_vv_i32mf2(__VA_ARGS__)
15533
#define vmin_vx_i32mf2(...) __riscv_vmin_vx_i32mf2(__VA_ARGS__)
15534
#define vmin_vv_i32m1(...) __riscv_vmin_vv_i32m1(__VA_ARGS__)
15535
#define vmin_vx_i32m1(...) __riscv_vmin_vx_i32m1(__VA_ARGS__)
15536
#define vmin_vv_i32m2(...) __riscv_vmin_vv_i32m2(__VA_ARGS__)
15537
#define vmin_vx_i32m2(...) __riscv_vmin_vx_i32m2(__VA_ARGS__)
15538
#define vmin_vv_i32m4(...) __riscv_vmin_vv_i32m4(__VA_ARGS__)
15539
#define vmin_vx_i32m4(...) __riscv_vmin_vx_i32m4(__VA_ARGS__)
15540
#define vmin_vv_i32m8(...) __riscv_vmin_vv_i32m8(__VA_ARGS__)
15541
#define vmin_vx_i32m8(...) __riscv_vmin_vx_i32m8(__VA_ARGS__)
15542
#define vmin_vv_i64m1(...) __riscv_vmin_vv_i64m1(__VA_ARGS__)
15543
#define vmin_vx_i64m1(...) __riscv_vmin_vx_i64m1(__VA_ARGS__)
15544
#define vmin_vv_i64m2(...) __riscv_vmin_vv_i64m2(__VA_ARGS__)
15545
#define vmin_vx_i64m2(...) __riscv_vmin_vx_i64m2(__VA_ARGS__)
15546
#define vmin_vv_i64m4(...) __riscv_vmin_vv_i64m4(__VA_ARGS__)
15547
#define vmin_vx_i64m4(...) __riscv_vmin_vx_i64m4(__VA_ARGS__)
15548
#define vmin_vv_i64m8(...) __riscv_vmin_vv_i64m8(__VA_ARGS__)
15549
#define vmin_vx_i64m8(...) __riscv_vmin_vx_i64m8(__VA_ARGS__)
15550
#define vmax_vv_i8mf8(...) __riscv_vmax_vv_i8mf8(__VA_ARGS__)
15551
#define vmax_vx_i8mf8(...) __riscv_vmax_vx_i8mf8(__VA_ARGS__)
15552
#define vmax_vv_i8mf4(...) __riscv_vmax_vv_i8mf4(__VA_ARGS__)
15553
#define vmax_vx_i8mf4(...) __riscv_vmax_vx_i8mf4(__VA_ARGS__)
15554
#define vmax_vv_i8mf2(...) __riscv_vmax_vv_i8mf2(__VA_ARGS__)
15555
#define vmax_vx_i8mf2(...) __riscv_vmax_vx_i8mf2(__VA_ARGS__)
15556
#define vmax_vv_i8m1(...) __riscv_vmax_vv_i8m1(__VA_ARGS__)
15557
#define vmax_vx_i8m1(...) __riscv_vmax_vx_i8m1(__VA_ARGS__)
15558
#define vmax_vv_i8m2(...) __riscv_vmax_vv_i8m2(__VA_ARGS__)
15559
#define vmax_vx_i8m2(...) __riscv_vmax_vx_i8m2(__VA_ARGS__)
15560
#define vmax_vv_i8m4(...) __riscv_vmax_vv_i8m4(__VA_ARGS__)
15561
#define vmax_vx_i8m4(...) __riscv_vmax_vx_i8m4(__VA_ARGS__)
15562
#define vmax_vv_i8m8(...) __riscv_vmax_vv_i8m8(__VA_ARGS__)
15563
#define vmax_vx_i8m8(...) __riscv_vmax_vx_i8m8(__VA_ARGS__)
15564
#define vmax_vv_i16mf4(...) __riscv_vmax_vv_i16mf4(__VA_ARGS__)
15565
#define vmax_vx_i16mf4(...) __riscv_vmax_vx_i16mf4(__VA_ARGS__)
15566
#define vmax_vv_i16mf2(...) __riscv_vmax_vv_i16mf2(__VA_ARGS__)
15567
#define vmax_vx_i16mf2(...) __riscv_vmax_vx_i16mf2(__VA_ARGS__)
15568
#define vmax_vv_i16m1(...) __riscv_vmax_vv_i16m1(__VA_ARGS__)
15569
#define vmax_vx_i16m1(...) __riscv_vmax_vx_i16m1(__VA_ARGS__)
15570
#define vmax_vv_i16m2(...) __riscv_vmax_vv_i16m2(__VA_ARGS__)
15571
#define vmax_vx_i16m2(...) __riscv_vmax_vx_i16m2(__VA_ARGS__)
15572
#define vmax_vv_i16m4(...) __riscv_vmax_vv_i16m4(__VA_ARGS__)
15573
#define vmax_vx_i16m4(...) __riscv_vmax_vx_i16m4(__VA_ARGS__)
15574
#define vmax_vv_i16m8(...) __riscv_vmax_vv_i16m8(__VA_ARGS__)
15575
#define vmax_vx_i16m8(...) __riscv_vmax_vx_i16m8(__VA_ARGS__)
15576
#define vmax_vv_i32mf2(...) __riscv_vmax_vv_i32mf2(__VA_ARGS__)
15577
#define vmax_vx_i32mf2(...) __riscv_vmax_vx_i32mf2(__VA_ARGS__)
15578
#define vmax_vv_i32m1(...) __riscv_vmax_vv_i32m1(__VA_ARGS__)
15579
#define vmax_vx_i32m1(...) __riscv_vmax_vx_i32m1(__VA_ARGS__)
15580
#define vmax_vv_i32m2(...) __riscv_vmax_vv_i32m2(__VA_ARGS__)
15581
#define vmax_vx_i32m2(...) __riscv_vmax_vx_i32m2(__VA_ARGS__)
15582
#define vmax_vv_i32m4(...) __riscv_vmax_vv_i32m4(__VA_ARGS__)
15583
#define vmax_vx_i32m4(...) __riscv_vmax_vx_i32m4(__VA_ARGS__)
15584
#define vmax_vv_i32m8(...) __riscv_vmax_vv_i32m8(__VA_ARGS__)
15585
#define vmax_vx_i32m8(...) __riscv_vmax_vx_i32m8(__VA_ARGS__)
15586
#define vmax_vv_i64m1(...) __riscv_vmax_vv_i64m1(__VA_ARGS__)
15587
#define vmax_vx_i64m1(...) __riscv_vmax_vx_i64m1(__VA_ARGS__)
15588
#define vmax_vv_i64m2(...) __riscv_vmax_vv_i64m2(__VA_ARGS__)
15589
#define vmax_vx_i64m2(...) __riscv_vmax_vx_i64m2(__VA_ARGS__)
15590
#define vmax_vv_i64m4(...) __riscv_vmax_vv_i64m4(__VA_ARGS__)
15591
#define vmax_vx_i64m4(...) __riscv_vmax_vx_i64m4(__VA_ARGS__)
15592
#define vmax_vv_i64m8(...) __riscv_vmax_vv_i64m8(__VA_ARGS__)
15593
#define vmax_vx_i64m8(...) __riscv_vmax_vx_i64m8(__VA_ARGS__)
15594
#define vminu_vv_u8mf8(...) __riscv_vminu_vv_u8mf8(__VA_ARGS__)
15595
#define vminu_vx_u8mf8(...) __riscv_vminu_vx_u8mf8(__VA_ARGS__)
15596
#define vminu_vv_u8mf4(...) __riscv_vminu_vv_u8mf4(__VA_ARGS__)
15597
#define vminu_vx_u8mf4(...) __riscv_vminu_vx_u8mf4(__VA_ARGS__)
15598
#define vminu_vv_u8mf2(...) __riscv_vminu_vv_u8mf2(__VA_ARGS__)
15599
#define vminu_vx_u8mf2(...) __riscv_vminu_vx_u8mf2(__VA_ARGS__)
15600
#define vminu_vv_u8m1(...) __riscv_vminu_vv_u8m1(__VA_ARGS__)
15601
#define vminu_vx_u8m1(...) __riscv_vminu_vx_u8m1(__VA_ARGS__)
15602
#define vminu_vv_u8m2(...) __riscv_vminu_vv_u8m2(__VA_ARGS__)
15603
#define vminu_vx_u8m2(...) __riscv_vminu_vx_u8m2(__VA_ARGS__)
15604
#define vminu_vv_u8m4(...) __riscv_vminu_vv_u8m4(__VA_ARGS__)
15605
#define vminu_vx_u8m4(...) __riscv_vminu_vx_u8m4(__VA_ARGS__)
15606
#define vminu_vv_u8m8(...) __riscv_vminu_vv_u8m8(__VA_ARGS__)
15607
#define vminu_vx_u8m8(...) __riscv_vminu_vx_u8m8(__VA_ARGS__)
15608
#define vminu_vv_u16mf4(...) __riscv_vminu_vv_u16mf4(__VA_ARGS__)
15609
#define vminu_vx_u16mf4(...) __riscv_vminu_vx_u16mf4(__VA_ARGS__)
15610
#define vminu_vv_u16mf2(...) __riscv_vminu_vv_u16mf2(__VA_ARGS__)
15611
#define vminu_vx_u16mf2(...) __riscv_vminu_vx_u16mf2(__VA_ARGS__)
15612
#define vminu_vv_u16m1(...) __riscv_vminu_vv_u16m1(__VA_ARGS__)
15613
#define vminu_vx_u16m1(...) __riscv_vminu_vx_u16m1(__VA_ARGS__)
15614
#define vminu_vv_u16m2(...) __riscv_vminu_vv_u16m2(__VA_ARGS__)
15615
#define vminu_vx_u16m2(...) __riscv_vminu_vx_u16m2(__VA_ARGS__)
15616
#define vminu_vv_u16m4(...) __riscv_vminu_vv_u16m4(__VA_ARGS__)
15617
#define vminu_vx_u16m4(...) __riscv_vminu_vx_u16m4(__VA_ARGS__)
15618
#define vminu_vv_u16m8(...) __riscv_vminu_vv_u16m8(__VA_ARGS__)
15619
#define vminu_vx_u16m8(...) __riscv_vminu_vx_u16m8(__VA_ARGS__)
15620
#define vminu_vv_u32mf2(...) __riscv_vminu_vv_u32mf2(__VA_ARGS__)
15621
#define vminu_vx_u32mf2(...) __riscv_vminu_vx_u32mf2(__VA_ARGS__)
15622
#define vminu_vv_u32m1(...) __riscv_vminu_vv_u32m1(__VA_ARGS__)
15623
#define vminu_vx_u32m1(...) __riscv_vminu_vx_u32m1(__VA_ARGS__)
15624
#define vminu_vv_u32m2(...) __riscv_vminu_vv_u32m2(__VA_ARGS__)
15625
#define vminu_vx_u32m2(...) __riscv_vminu_vx_u32m2(__VA_ARGS__)
15626
#define vminu_vv_u32m4(...) __riscv_vminu_vv_u32m4(__VA_ARGS__)
15627
#define vminu_vx_u32m4(...) __riscv_vminu_vx_u32m4(__VA_ARGS__)
15628
#define vminu_vv_u32m8(...) __riscv_vminu_vv_u32m8(__VA_ARGS__)
15629
#define vminu_vx_u32m8(...) __riscv_vminu_vx_u32m8(__VA_ARGS__)
15630
#define vminu_vv_u64m1(...) __riscv_vminu_vv_u64m1(__VA_ARGS__)
15631
#define vminu_vx_u64m1(...) __riscv_vminu_vx_u64m1(__VA_ARGS__)
15632
#define vminu_vv_u64m2(...) __riscv_vminu_vv_u64m2(__VA_ARGS__)
15633
#define vminu_vx_u64m2(...) __riscv_vminu_vx_u64m2(__VA_ARGS__)
15634
#define vminu_vv_u64m4(...) __riscv_vminu_vv_u64m4(__VA_ARGS__)
15635
#define vminu_vx_u64m4(...) __riscv_vminu_vx_u64m4(__VA_ARGS__)
15636
#define vminu_vv_u64m8(...) __riscv_vminu_vv_u64m8(__VA_ARGS__)
15637
#define vminu_vx_u64m8(...) __riscv_vminu_vx_u64m8(__VA_ARGS__)
15638
#define vmaxu_vv_u8mf8(...) __riscv_vmaxu_vv_u8mf8(__VA_ARGS__)
15639
#define vmaxu_vx_u8mf8(...) __riscv_vmaxu_vx_u8mf8(__VA_ARGS__)
15640
#define vmaxu_vv_u8mf4(...) __riscv_vmaxu_vv_u8mf4(__VA_ARGS__)
15641
#define vmaxu_vx_u8mf4(...) __riscv_vmaxu_vx_u8mf4(__VA_ARGS__)
15642
#define vmaxu_vv_u8mf2(...) __riscv_vmaxu_vv_u8mf2(__VA_ARGS__)
15643
#define vmaxu_vx_u8mf2(...) __riscv_vmaxu_vx_u8mf2(__VA_ARGS__)
15644
#define vmaxu_vv_u8m1(...) __riscv_vmaxu_vv_u8m1(__VA_ARGS__)
15645
#define vmaxu_vx_u8m1(...) __riscv_vmaxu_vx_u8m1(__VA_ARGS__)
15646
#define vmaxu_vv_u8m2(...) __riscv_vmaxu_vv_u8m2(__VA_ARGS__)
15647
#define vmaxu_vx_u8m2(...) __riscv_vmaxu_vx_u8m2(__VA_ARGS__)
15648
#define vmaxu_vv_u8m4(...) __riscv_vmaxu_vv_u8m4(__VA_ARGS__)
15649
#define vmaxu_vx_u8m4(...) __riscv_vmaxu_vx_u8m4(__VA_ARGS__)
15650
#define vmaxu_vv_u8m8(...) __riscv_vmaxu_vv_u8m8(__VA_ARGS__)
15651
#define vmaxu_vx_u8m8(...) __riscv_vmaxu_vx_u8m8(__VA_ARGS__)
15652
#define vmaxu_vv_u16mf4(...) __riscv_vmaxu_vv_u16mf4(__VA_ARGS__)
15653
#define vmaxu_vx_u16mf4(...) __riscv_vmaxu_vx_u16mf4(__VA_ARGS__)
15654
#define vmaxu_vv_u16mf2(...) __riscv_vmaxu_vv_u16mf2(__VA_ARGS__)
15655
#define vmaxu_vx_u16mf2(...) __riscv_vmaxu_vx_u16mf2(__VA_ARGS__)
15656
#define vmaxu_vv_u16m1(...) __riscv_vmaxu_vv_u16m1(__VA_ARGS__)
15657
#define vmaxu_vx_u16m1(...) __riscv_vmaxu_vx_u16m1(__VA_ARGS__)
15658
#define vmaxu_vv_u16m2(...) __riscv_vmaxu_vv_u16m2(__VA_ARGS__)
15659
#define vmaxu_vx_u16m2(...) __riscv_vmaxu_vx_u16m2(__VA_ARGS__)
15660
#define vmaxu_vv_u16m4(...) __riscv_vmaxu_vv_u16m4(__VA_ARGS__)
15661
#define vmaxu_vx_u16m4(...) __riscv_vmaxu_vx_u16m4(__VA_ARGS__)
15662
#define vmaxu_vv_u16m8(...) __riscv_vmaxu_vv_u16m8(__VA_ARGS__)
15663
#define vmaxu_vx_u16m8(...) __riscv_vmaxu_vx_u16m8(__VA_ARGS__)
15664
#define vmaxu_vv_u32mf2(...) __riscv_vmaxu_vv_u32mf2(__VA_ARGS__)
15665
#define vmaxu_vx_u32mf2(...) __riscv_vmaxu_vx_u32mf2(__VA_ARGS__)
15666
#define vmaxu_vv_u32m1(...) __riscv_vmaxu_vv_u32m1(__VA_ARGS__)
15667
#define vmaxu_vx_u32m1(...) __riscv_vmaxu_vx_u32m1(__VA_ARGS__)
15668
#define vmaxu_vv_u32m2(...) __riscv_vmaxu_vv_u32m2(__VA_ARGS__)
15669
#define vmaxu_vx_u32m2(...) __riscv_vmaxu_vx_u32m2(__VA_ARGS__)
15670
#define vmaxu_vv_u32m4(...) __riscv_vmaxu_vv_u32m4(__VA_ARGS__)
15671
#define vmaxu_vx_u32m4(...) __riscv_vmaxu_vx_u32m4(__VA_ARGS__)
15672
#define vmaxu_vv_u32m8(...) __riscv_vmaxu_vv_u32m8(__VA_ARGS__)
15673
#define vmaxu_vx_u32m8(...) __riscv_vmaxu_vx_u32m8(__VA_ARGS__)
15674
#define vmaxu_vv_u64m1(...) __riscv_vmaxu_vv_u64m1(__VA_ARGS__)
15675
#define vmaxu_vx_u64m1(...) __riscv_vmaxu_vx_u64m1(__VA_ARGS__)
15676
#define vmaxu_vv_u64m2(...) __riscv_vmaxu_vv_u64m2(__VA_ARGS__)
15677
#define vmaxu_vx_u64m2(...) __riscv_vmaxu_vx_u64m2(__VA_ARGS__)
15678
#define vmaxu_vv_u64m4(...) __riscv_vmaxu_vv_u64m4(__VA_ARGS__)
15679
#define vmaxu_vx_u64m4(...) __riscv_vmaxu_vx_u64m4(__VA_ARGS__)
15680
#define vmaxu_vv_u64m8(...) __riscv_vmaxu_vv_u64m8(__VA_ARGS__)
15681
#define vmaxu_vx_u64m8(...) __riscv_vmaxu_vx_u64m8(__VA_ARGS__)
15682
// masked functions
15683
#define vmin_vv_i8mf8_m(...) __riscv_vmin_vv_i8mf8_tumu(__VA_ARGS__)
15684
#define vmin_vx_i8mf8_m(...) __riscv_vmin_vx_i8mf8_tumu(__VA_ARGS__)
15685
#define vmin_vv_i8mf4_m(...) __riscv_vmin_vv_i8mf4_tumu(__VA_ARGS__)
15686
#define vmin_vx_i8mf4_m(...) __riscv_vmin_vx_i8mf4_tumu(__VA_ARGS__)
15687
#define vmin_vv_i8mf2_m(...) __riscv_vmin_vv_i8mf2_tumu(__VA_ARGS__)
15688
#define vmin_vx_i8mf2_m(...) __riscv_vmin_vx_i8mf2_tumu(__VA_ARGS__)
15689
#define vmin_vv_i8m1_m(...) __riscv_vmin_vv_i8m1_tumu(__VA_ARGS__)
15690
#define vmin_vx_i8m1_m(...) __riscv_vmin_vx_i8m1_tumu(__VA_ARGS__)
15691
#define vmin_vv_i8m2_m(...) __riscv_vmin_vv_i8m2_tumu(__VA_ARGS__)
15692
#define vmin_vx_i8m2_m(...) __riscv_vmin_vx_i8m2_tumu(__VA_ARGS__)
15693
#define vmin_vv_i8m4_m(...) __riscv_vmin_vv_i8m4_tumu(__VA_ARGS__)
15694
#define vmin_vx_i8m4_m(...) __riscv_vmin_vx_i8m4_tumu(__VA_ARGS__)
15695
#define vmin_vv_i8m8_m(...) __riscv_vmin_vv_i8m8_tumu(__VA_ARGS__)
15696
#define vmin_vx_i8m8_m(...) __riscv_vmin_vx_i8m8_tumu(__VA_ARGS__)
15697
#define vmin_vv_i16mf4_m(...) __riscv_vmin_vv_i16mf4_tumu(__VA_ARGS__)
15698
#define vmin_vx_i16mf4_m(...) __riscv_vmin_vx_i16mf4_tumu(__VA_ARGS__)
15699
#define vmin_vv_i16mf2_m(...) __riscv_vmin_vv_i16mf2_tumu(__VA_ARGS__)
15700
#define vmin_vx_i16mf2_m(...) __riscv_vmin_vx_i16mf2_tumu(__VA_ARGS__)
15701
#define vmin_vv_i16m1_m(...) __riscv_vmin_vv_i16m1_tumu(__VA_ARGS__)
15702
#define vmin_vx_i16m1_m(...) __riscv_vmin_vx_i16m1_tumu(__VA_ARGS__)
15703
#define vmin_vv_i16m2_m(...) __riscv_vmin_vv_i16m2_tumu(__VA_ARGS__)
15704
#define vmin_vx_i16m2_m(...) __riscv_vmin_vx_i16m2_tumu(__VA_ARGS__)
15705
#define vmin_vv_i16m4_m(...) __riscv_vmin_vv_i16m4_tumu(__VA_ARGS__)
15706
#define vmin_vx_i16m4_m(...) __riscv_vmin_vx_i16m4_tumu(__VA_ARGS__)
15707
#define vmin_vv_i16m8_m(...) __riscv_vmin_vv_i16m8_tumu(__VA_ARGS__)
15708
#define vmin_vx_i16m8_m(...) __riscv_vmin_vx_i16m8_tumu(__VA_ARGS__)
15709
#define vmin_vv_i32mf2_m(...) __riscv_vmin_vv_i32mf2_tumu(__VA_ARGS__)
15710
#define vmin_vx_i32mf2_m(...) __riscv_vmin_vx_i32mf2_tumu(__VA_ARGS__)
15711
#define vmin_vv_i32m1_m(...) __riscv_vmin_vv_i32m1_tumu(__VA_ARGS__)
15712
#define vmin_vx_i32m1_m(...) __riscv_vmin_vx_i32m1_tumu(__VA_ARGS__)
15713
#define vmin_vv_i32m2_m(...) __riscv_vmin_vv_i32m2_tumu(__VA_ARGS__)
15714
#define vmin_vx_i32m2_m(...) __riscv_vmin_vx_i32m2_tumu(__VA_ARGS__)
15715
#define vmin_vv_i32m4_m(...) __riscv_vmin_vv_i32m4_tumu(__VA_ARGS__)
15716
#define vmin_vx_i32m4_m(...) __riscv_vmin_vx_i32m4_tumu(__VA_ARGS__)
15717
#define vmin_vv_i32m8_m(...) __riscv_vmin_vv_i32m8_tumu(__VA_ARGS__)
15718
#define vmin_vx_i32m8_m(...) __riscv_vmin_vx_i32m8_tumu(__VA_ARGS__)
15719
#define vmin_vv_i64m1_m(...) __riscv_vmin_vv_i64m1_tumu(__VA_ARGS__)
15720
#define vmin_vx_i64m1_m(...) __riscv_vmin_vx_i64m1_tumu(__VA_ARGS__)
15721
#define vmin_vv_i64m2_m(...) __riscv_vmin_vv_i64m2_tumu(__VA_ARGS__)
15722
#define vmin_vx_i64m2_m(...) __riscv_vmin_vx_i64m2_tumu(__VA_ARGS__)
15723
#define vmin_vv_i64m4_m(...) __riscv_vmin_vv_i64m4_tumu(__VA_ARGS__)
15724
#define vmin_vx_i64m4_m(...) __riscv_vmin_vx_i64m4_tumu(__VA_ARGS__)
15725
#define vmin_vv_i64m8_m(...) __riscv_vmin_vv_i64m8_tumu(__VA_ARGS__)
15726
#define vmin_vx_i64m8_m(...) __riscv_vmin_vx_i64m8_tumu(__VA_ARGS__)
15727
#define vmax_vv_i8mf8_m(...) __riscv_vmax_vv_i8mf8_tumu(__VA_ARGS__)
15728
#define vmax_vx_i8mf8_m(...) __riscv_vmax_vx_i8mf8_tumu(__VA_ARGS__)
15729
#define vmax_vv_i8mf4_m(...) __riscv_vmax_vv_i8mf4_tumu(__VA_ARGS__)
15730
#define vmax_vx_i8mf4_m(...) __riscv_vmax_vx_i8mf4_tumu(__VA_ARGS__)
15731
#define vmax_vv_i8mf2_m(...) __riscv_vmax_vv_i8mf2_tumu(__VA_ARGS__)
15732
#define vmax_vx_i8mf2_m(...) __riscv_vmax_vx_i8mf2_tumu(__VA_ARGS__)
15733
#define vmax_vv_i8m1_m(...) __riscv_vmax_vv_i8m1_tumu(__VA_ARGS__)
15734
#define vmax_vx_i8m1_m(...) __riscv_vmax_vx_i8m1_tumu(__VA_ARGS__)
15735
#define vmax_vv_i8m2_m(...) __riscv_vmax_vv_i8m2_tumu(__VA_ARGS__)
15736
#define vmax_vx_i8m2_m(...) __riscv_vmax_vx_i8m2_tumu(__VA_ARGS__)
15737
#define vmax_vv_i8m4_m(...) __riscv_vmax_vv_i8m4_tumu(__VA_ARGS__)
15738
#define vmax_vx_i8m4_m(...) __riscv_vmax_vx_i8m4_tumu(__VA_ARGS__)
15739
#define vmax_vv_i8m8_m(...) __riscv_vmax_vv_i8m8_tumu(__VA_ARGS__)
15740
#define vmax_vx_i8m8_m(...) __riscv_vmax_vx_i8m8_tumu(__VA_ARGS__)
15741
#define vmax_vv_i16mf4_m(...) __riscv_vmax_vv_i16mf4_tumu(__VA_ARGS__)
15742
#define vmax_vx_i16mf4_m(...) __riscv_vmax_vx_i16mf4_tumu(__VA_ARGS__)
15743
#define vmax_vv_i16mf2_m(...) __riscv_vmax_vv_i16mf2_tumu(__VA_ARGS__)
15744
#define vmax_vx_i16mf2_m(...) __riscv_vmax_vx_i16mf2_tumu(__VA_ARGS__)
15745
#define vmax_vv_i16m1_m(...) __riscv_vmax_vv_i16m1_tumu(__VA_ARGS__)
15746
#define vmax_vx_i16m1_m(...) __riscv_vmax_vx_i16m1_tumu(__VA_ARGS__)
15747
#define vmax_vv_i16m2_m(...) __riscv_vmax_vv_i16m2_tumu(__VA_ARGS__)
15748
#define vmax_vx_i16m2_m(...) __riscv_vmax_vx_i16m2_tumu(__VA_ARGS__)
15749
#define vmax_vv_i16m4_m(...) __riscv_vmax_vv_i16m4_tumu(__VA_ARGS__)
15750
#define vmax_vx_i16m4_m(...) __riscv_vmax_vx_i16m4_tumu(__VA_ARGS__)
15751
#define vmax_vv_i16m8_m(...) __riscv_vmax_vv_i16m8_tumu(__VA_ARGS__)
15752
#define vmax_vx_i16m8_m(...) __riscv_vmax_vx_i16m8_tumu(__VA_ARGS__)
15753
#define vmax_vv_i32mf2_m(...) __riscv_vmax_vv_i32mf2_tumu(__VA_ARGS__)
15754
#define vmax_vx_i32mf2_m(...) __riscv_vmax_vx_i32mf2_tumu(__VA_ARGS__)
15755
#define vmax_vv_i32m1_m(...) __riscv_vmax_vv_i32m1_tumu(__VA_ARGS__)
15756
#define vmax_vx_i32m1_m(...) __riscv_vmax_vx_i32m1_tumu(__VA_ARGS__)
15757
#define vmax_vv_i32m2_m(...) __riscv_vmax_vv_i32m2_tumu(__VA_ARGS__)
15758
#define vmax_vx_i32m2_m(...) __riscv_vmax_vx_i32m2_tumu(__VA_ARGS__)
15759
#define vmax_vv_i32m4_m(...) __riscv_vmax_vv_i32m4_tumu(__VA_ARGS__)
15760
#define vmax_vx_i32m4_m(...) __riscv_vmax_vx_i32m4_tumu(__VA_ARGS__)
15761
#define vmax_vv_i32m8_m(...) __riscv_vmax_vv_i32m8_tumu(__VA_ARGS__)
15762
#define vmax_vx_i32m8_m(...) __riscv_vmax_vx_i32m8_tumu(__VA_ARGS__)
15763
#define vmax_vv_i64m1_m(...) __riscv_vmax_vv_i64m1_tumu(__VA_ARGS__)
15764
#define vmax_vx_i64m1_m(...) __riscv_vmax_vx_i64m1_tumu(__VA_ARGS__)
15765
#define vmax_vv_i64m2_m(...) __riscv_vmax_vv_i64m2_tumu(__VA_ARGS__)
15766
#define vmax_vx_i64m2_m(...) __riscv_vmax_vx_i64m2_tumu(__VA_ARGS__)
15767
#define vmax_vv_i64m4_m(...) __riscv_vmax_vv_i64m4_tumu(__VA_ARGS__)
15768
#define vmax_vx_i64m4_m(...) __riscv_vmax_vx_i64m4_tumu(__VA_ARGS__)
15769
#define vmax_vv_i64m8_m(...) __riscv_vmax_vv_i64m8_tumu(__VA_ARGS__)
15770
#define vmax_vx_i64m8_m(...) __riscv_vmax_vx_i64m8_tumu(__VA_ARGS__)
15771
#define vminu_vv_u8mf8_m(...) __riscv_vminu_vv_u8mf8_tumu(__VA_ARGS__)
15772
#define vminu_vx_u8mf8_m(...) __riscv_vminu_vx_u8mf8_tumu(__VA_ARGS__)
15773
#define vminu_vv_u8mf4_m(...) __riscv_vminu_vv_u8mf4_tumu(__VA_ARGS__)
15774
#define vminu_vx_u8mf4_m(...) __riscv_vminu_vx_u8mf4_tumu(__VA_ARGS__)
15775
#define vminu_vv_u8mf2_m(...) __riscv_vminu_vv_u8mf2_tumu(__VA_ARGS__)
15776
#define vminu_vx_u8mf2_m(...) __riscv_vminu_vx_u8mf2_tumu(__VA_ARGS__)
15777
#define vminu_vv_u8m1_m(...) __riscv_vminu_vv_u8m1_tumu(__VA_ARGS__)
15778
#define vminu_vx_u8m1_m(...) __riscv_vminu_vx_u8m1_tumu(__VA_ARGS__)
15779
#define vminu_vv_u8m2_m(...) __riscv_vminu_vv_u8m2_tumu(__VA_ARGS__)
15780
#define vminu_vx_u8m2_m(...) __riscv_vminu_vx_u8m2_tumu(__VA_ARGS__)
15781
#define vminu_vv_u8m4_m(...) __riscv_vminu_vv_u8m4_tumu(__VA_ARGS__)
15782
#define vminu_vx_u8m4_m(...) __riscv_vminu_vx_u8m4_tumu(__VA_ARGS__)
15783
#define vminu_vv_u8m8_m(...) __riscv_vminu_vv_u8m8_tumu(__VA_ARGS__)
15784
#define vminu_vx_u8m8_m(...) __riscv_vminu_vx_u8m8_tumu(__VA_ARGS__)
15785
#define vminu_vv_u16mf4_m(...) __riscv_vminu_vv_u16mf4_tumu(__VA_ARGS__)
15786
#define vminu_vx_u16mf4_m(...) __riscv_vminu_vx_u16mf4_tumu(__VA_ARGS__)
15787
#define vminu_vv_u16mf2_m(...) __riscv_vminu_vv_u16mf2_tumu(__VA_ARGS__)
15788
#define vminu_vx_u16mf2_m(...) __riscv_vminu_vx_u16mf2_tumu(__VA_ARGS__)
15789
#define vminu_vv_u16m1_m(...) __riscv_vminu_vv_u16m1_tumu(__VA_ARGS__)
15790
#define vminu_vx_u16m1_m(...) __riscv_vminu_vx_u16m1_tumu(__VA_ARGS__)
15791
#define vminu_vv_u16m2_m(...) __riscv_vminu_vv_u16m2_tumu(__VA_ARGS__)
15792
#define vminu_vx_u16m2_m(...) __riscv_vminu_vx_u16m2_tumu(__VA_ARGS__)
15793
#define vminu_vv_u16m4_m(...) __riscv_vminu_vv_u16m4_tumu(__VA_ARGS__)
15794
#define vminu_vx_u16m4_m(...) __riscv_vminu_vx_u16m4_tumu(__VA_ARGS__)
15795
#define vminu_vv_u16m8_m(...) __riscv_vminu_vv_u16m8_tumu(__VA_ARGS__)
15796
#define vminu_vx_u16m8_m(...) __riscv_vminu_vx_u16m8_tumu(__VA_ARGS__)
15797
#define vminu_vv_u32mf2_m(...) __riscv_vminu_vv_u32mf2_tumu(__VA_ARGS__)
15798
#define vminu_vx_u32mf2_m(...) __riscv_vminu_vx_u32mf2_tumu(__VA_ARGS__)
15799
#define vminu_vv_u32m1_m(...) __riscv_vminu_vv_u32m1_tumu(__VA_ARGS__)
15800
#define vminu_vx_u32m1_m(...) __riscv_vminu_vx_u32m1_tumu(__VA_ARGS__)
15801
#define vminu_vv_u32m2_m(...) __riscv_vminu_vv_u32m2_tumu(__VA_ARGS__)
15802
#define vminu_vx_u32m2_m(...) __riscv_vminu_vx_u32m2_tumu(__VA_ARGS__)
15803
#define vminu_vv_u32m4_m(...) __riscv_vminu_vv_u32m4_tumu(__VA_ARGS__)
15804
#define vminu_vx_u32m4_m(...) __riscv_vminu_vx_u32m4_tumu(__VA_ARGS__)
15805
#define vminu_vv_u32m8_m(...) __riscv_vminu_vv_u32m8_tumu(__VA_ARGS__)
15806
#define vminu_vx_u32m8_m(...) __riscv_vminu_vx_u32m8_tumu(__VA_ARGS__)
15807
#define vminu_vv_u64m1_m(...) __riscv_vminu_vv_u64m1_tumu(__VA_ARGS__)
15808
#define vminu_vx_u64m1_m(...) __riscv_vminu_vx_u64m1_tumu(__VA_ARGS__)
15809
#define vminu_vv_u64m2_m(...) __riscv_vminu_vv_u64m2_tumu(__VA_ARGS__)
15810
#define vminu_vx_u64m2_m(...) __riscv_vminu_vx_u64m2_tumu(__VA_ARGS__)
15811
#define vminu_vv_u64m4_m(...) __riscv_vminu_vv_u64m4_tumu(__VA_ARGS__)
15812
#define vminu_vx_u64m4_m(...) __riscv_vminu_vx_u64m4_tumu(__VA_ARGS__)
15813
#define vminu_vv_u64m8_m(...) __riscv_vminu_vv_u64m8_tumu(__VA_ARGS__)
15814
#define vminu_vx_u64m8_m(...) __riscv_vminu_vx_u64m8_tumu(__VA_ARGS__)
15815
#define vmaxu_vv_u8mf8_m(...) __riscv_vmaxu_vv_u8mf8_tumu(__VA_ARGS__)
15816
#define vmaxu_vx_u8mf8_m(...) __riscv_vmaxu_vx_u8mf8_tumu(__VA_ARGS__)
15817
#define vmaxu_vv_u8mf4_m(...) __riscv_vmaxu_vv_u8mf4_tumu(__VA_ARGS__)
15818
#define vmaxu_vx_u8mf4_m(...) __riscv_vmaxu_vx_u8mf4_tumu(__VA_ARGS__)
15819
#define vmaxu_vv_u8mf2_m(...) __riscv_vmaxu_vv_u8mf2_tumu(__VA_ARGS__)
15820
#define vmaxu_vx_u8mf2_m(...) __riscv_vmaxu_vx_u8mf2_tumu(__VA_ARGS__)
15821
#define vmaxu_vv_u8m1_m(...) __riscv_vmaxu_vv_u8m1_tumu(__VA_ARGS__)
15822
#define vmaxu_vx_u8m1_m(...) __riscv_vmaxu_vx_u8m1_tumu(__VA_ARGS__)
15823
#define vmaxu_vv_u8m2_m(...) __riscv_vmaxu_vv_u8m2_tumu(__VA_ARGS__)
15824
#define vmaxu_vx_u8m2_m(...) __riscv_vmaxu_vx_u8m2_tumu(__VA_ARGS__)
15825
#define vmaxu_vv_u8m4_m(...) __riscv_vmaxu_vv_u8m4_tumu(__VA_ARGS__)
15826
#define vmaxu_vx_u8m4_m(...) __riscv_vmaxu_vx_u8m4_tumu(__VA_ARGS__)
15827
#define vmaxu_vv_u8m8_m(...) __riscv_vmaxu_vv_u8m8_tumu(__VA_ARGS__)
15828
#define vmaxu_vx_u8m8_m(...) __riscv_vmaxu_vx_u8m8_tumu(__VA_ARGS__)
15829
#define vmaxu_vv_u16mf4_m(...) __riscv_vmaxu_vv_u16mf4_tumu(__VA_ARGS__)
15830
#define vmaxu_vx_u16mf4_m(...) __riscv_vmaxu_vx_u16mf4_tumu(__VA_ARGS__)
15831
#define vmaxu_vv_u16mf2_m(...) __riscv_vmaxu_vv_u16mf2_tumu(__VA_ARGS__)
15832
#define vmaxu_vx_u16mf2_m(...) __riscv_vmaxu_vx_u16mf2_tumu(__VA_ARGS__)
15833
#define vmaxu_vv_u16m1_m(...) __riscv_vmaxu_vv_u16m1_tumu(__VA_ARGS__)
15834
#define vmaxu_vx_u16m1_m(...) __riscv_vmaxu_vx_u16m1_tumu(__VA_ARGS__)
15835
#define vmaxu_vv_u16m2_m(...) __riscv_vmaxu_vv_u16m2_tumu(__VA_ARGS__)
15836
#define vmaxu_vx_u16m2_m(...) __riscv_vmaxu_vx_u16m2_tumu(__VA_ARGS__)
15837
#define vmaxu_vv_u16m4_m(...) __riscv_vmaxu_vv_u16m4_tumu(__VA_ARGS__)
15838
#define vmaxu_vx_u16m4_m(...) __riscv_vmaxu_vx_u16m4_tumu(__VA_ARGS__)
15839
#define vmaxu_vv_u16m8_m(...) __riscv_vmaxu_vv_u16m8_tumu(__VA_ARGS__)
15840
#define vmaxu_vx_u16m8_m(...) __riscv_vmaxu_vx_u16m8_tumu(__VA_ARGS__)
15841
#define vmaxu_vv_u32mf2_m(...) __riscv_vmaxu_vv_u32mf2_tumu(__VA_ARGS__)
15842
#define vmaxu_vx_u32mf2_m(...) __riscv_vmaxu_vx_u32mf2_tumu(__VA_ARGS__)
15843
#define vmaxu_vv_u32m1_m(...) __riscv_vmaxu_vv_u32m1_tumu(__VA_ARGS__)
15844
#define vmaxu_vx_u32m1_m(...) __riscv_vmaxu_vx_u32m1_tumu(__VA_ARGS__)
15845
#define vmaxu_vv_u32m2_m(...) __riscv_vmaxu_vv_u32m2_tumu(__VA_ARGS__)
15846
#define vmaxu_vx_u32m2_m(...) __riscv_vmaxu_vx_u32m2_tumu(__VA_ARGS__)
15847
#define vmaxu_vv_u32m4_m(...) __riscv_vmaxu_vv_u32m4_tumu(__VA_ARGS__)
15848
#define vmaxu_vx_u32m4_m(...) __riscv_vmaxu_vx_u32m4_tumu(__VA_ARGS__)
15849
#define vmaxu_vv_u32m8_m(...) __riscv_vmaxu_vv_u32m8_tumu(__VA_ARGS__)
15850
#define vmaxu_vx_u32m8_m(...) __riscv_vmaxu_vx_u32m8_tumu(__VA_ARGS__)
15851
#define vmaxu_vv_u64m1_m(...) __riscv_vmaxu_vv_u64m1_tumu(__VA_ARGS__)
15852
#define vmaxu_vx_u64m1_m(...) __riscv_vmaxu_vx_u64m1_tumu(__VA_ARGS__)
15853
#define vmaxu_vv_u64m2_m(...) __riscv_vmaxu_vv_u64m2_tumu(__VA_ARGS__)
15854
#define vmaxu_vx_u64m2_m(...) __riscv_vmaxu_vx_u64m2_tumu(__VA_ARGS__)
15855
#define vmaxu_vv_u64m4_m(...) __riscv_vmaxu_vv_u64m4_tumu(__VA_ARGS__)
15856
#define vmaxu_vx_u64m4_m(...) __riscv_vmaxu_vx_u64m4_tumu(__VA_ARGS__)
15857
#define vmaxu_vv_u64m8_m(...) __riscv_vmaxu_vv_u64m8_tumu(__VA_ARGS__)
15858
#define vmaxu_vx_u64m8_m(...) __riscv_vmaxu_vx_u64m8_tumu(__VA_ARGS__)
15859
#define vmul_vv_i8mf8(...) __riscv_vmul_vv_i8mf8(__VA_ARGS__)
15860
#define vmul_vx_i8mf8(...) __riscv_vmul_vx_i8mf8(__VA_ARGS__)
15861
#define vmul_vv_i8mf4(...) __riscv_vmul_vv_i8mf4(__VA_ARGS__)
15862
#define vmul_vx_i8mf4(...) __riscv_vmul_vx_i8mf4(__VA_ARGS__)
15863
#define vmul_vv_i8mf2(...) __riscv_vmul_vv_i8mf2(__VA_ARGS__)
15864
#define vmul_vx_i8mf2(...) __riscv_vmul_vx_i8mf2(__VA_ARGS__)
15865
#define vmul_vv_i8m1(...) __riscv_vmul_vv_i8m1(__VA_ARGS__)
15866
#define vmul_vx_i8m1(...) __riscv_vmul_vx_i8m1(__VA_ARGS__)
15867
#define vmul_vv_i8m2(...) __riscv_vmul_vv_i8m2(__VA_ARGS__)
15868
#define vmul_vx_i8m2(...) __riscv_vmul_vx_i8m2(__VA_ARGS__)
15869
#define vmul_vv_i8m4(...) __riscv_vmul_vv_i8m4(__VA_ARGS__)
15870
#define vmul_vx_i8m4(...) __riscv_vmul_vx_i8m4(__VA_ARGS__)
15871
#define vmul_vv_i8m8(...) __riscv_vmul_vv_i8m8(__VA_ARGS__)
15872
#define vmul_vx_i8m8(...) __riscv_vmul_vx_i8m8(__VA_ARGS__)
15873
#define vmul_vv_i16mf4(...) __riscv_vmul_vv_i16mf4(__VA_ARGS__)
15874
#define vmul_vx_i16mf4(...) __riscv_vmul_vx_i16mf4(__VA_ARGS__)
15875
#define vmul_vv_i16mf2(...) __riscv_vmul_vv_i16mf2(__VA_ARGS__)
15876
#define vmul_vx_i16mf2(...) __riscv_vmul_vx_i16mf2(__VA_ARGS__)
15877
#define vmul_vv_i16m1(...) __riscv_vmul_vv_i16m1(__VA_ARGS__)
15878
#define vmul_vx_i16m1(...) __riscv_vmul_vx_i16m1(__VA_ARGS__)
15879
#define vmul_vv_i16m2(...) __riscv_vmul_vv_i16m2(__VA_ARGS__)
15880
#define vmul_vx_i16m2(...) __riscv_vmul_vx_i16m2(__VA_ARGS__)
15881
#define vmul_vv_i16m4(...) __riscv_vmul_vv_i16m4(__VA_ARGS__)
15882
#define vmul_vx_i16m4(...) __riscv_vmul_vx_i16m4(__VA_ARGS__)
15883
#define vmul_vv_i16m8(...) __riscv_vmul_vv_i16m8(__VA_ARGS__)
15884
#define vmul_vx_i16m8(...) __riscv_vmul_vx_i16m8(__VA_ARGS__)
15885
#define vmul_vv_i32mf2(...) __riscv_vmul_vv_i32mf2(__VA_ARGS__)
15886
#define vmul_vx_i32mf2(...) __riscv_vmul_vx_i32mf2(__VA_ARGS__)
15887
#define vmul_vv_i32m1(...) __riscv_vmul_vv_i32m1(__VA_ARGS__)
15888
#define vmul_vx_i32m1(...) __riscv_vmul_vx_i32m1(__VA_ARGS__)
15889
#define vmul_vv_i32m2(...) __riscv_vmul_vv_i32m2(__VA_ARGS__)
15890
#define vmul_vx_i32m2(...) __riscv_vmul_vx_i32m2(__VA_ARGS__)
15891
#define vmul_vv_i32m4(...) __riscv_vmul_vv_i32m4(__VA_ARGS__)
15892
#define vmul_vx_i32m4(...) __riscv_vmul_vx_i32m4(__VA_ARGS__)
15893
#define vmul_vv_i32m8(...) __riscv_vmul_vv_i32m8(__VA_ARGS__)
15894
#define vmul_vx_i32m8(...) __riscv_vmul_vx_i32m8(__VA_ARGS__)
15895
#define vmul_vv_i64m1(...) __riscv_vmul_vv_i64m1(__VA_ARGS__)
15896
#define vmul_vx_i64m1(...) __riscv_vmul_vx_i64m1(__VA_ARGS__)
15897
#define vmul_vv_i64m2(...) __riscv_vmul_vv_i64m2(__VA_ARGS__)
15898
#define vmul_vx_i64m2(...) __riscv_vmul_vx_i64m2(__VA_ARGS__)
15899
#define vmul_vv_i64m4(...) __riscv_vmul_vv_i64m4(__VA_ARGS__)
15900
#define vmul_vx_i64m4(...) __riscv_vmul_vx_i64m4(__VA_ARGS__)
15901
#define vmul_vv_i64m8(...) __riscv_vmul_vv_i64m8(__VA_ARGS__)
15902
#define vmul_vx_i64m8(...) __riscv_vmul_vx_i64m8(__VA_ARGS__)
15903
#define vmulh_vv_i8mf8(...) __riscv_vmulh_vv_i8mf8(__VA_ARGS__)
15904
#define vmulh_vx_i8mf8(...) __riscv_vmulh_vx_i8mf8(__VA_ARGS__)
15905
#define vmulh_vv_i8mf4(...) __riscv_vmulh_vv_i8mf4(__VA_ARGS__)
15906
#define vmulh_vx_i8mf4(...) __riscv_vmulh_vx_i8mf4(__VA_ARGS__)
15907
#define vmulh_vv_i8mf2(...) __riscv_vmulh_vv_i8mf2(__VA_ARGS__)
15908
#define vmulh_vx_i8mf2(...) __riscv_vmulh_vx_i8mf2(__VA_ARGS__)
15909
#define vmulh_vv_i8m1(...) __riscv_vmulh_vv_i8m1(__VA_ARGS__)
15910
#define vmulh_vx_i8m1(...) __riscv_vmulh_vx_i8m1(__VA_ARGS__)
15911
#define vmulh_vv_i8m2(...) __riscv_vmulh_vv_i8m2(__VA_ARGS__)
15912
#define vmulh_vx_i8m2(...) __riscv_vmulh_vx_i8m2(__VA_ARGS__)
15913
#define vmulh_vv_i8m4(...) __riscv_vmulh_vv_i8m4(__VA_ARGS__)
15914
#define vmulh_vx_i8m4(...) __riscv_vmulh_vx_i8m4(__VA_ARGS__)
15915
#define vmulh_vv_i8m8(...) __riscv_vmulh_vv_i8m8(__VA_ARGS__)
15916
#define vmulh_vx_i8m8(...) __riscv_vmulh_vx_i8m8(__VA_ARGS__)
15917
#define vmulh_vv_i16mf4(...) __riscv_vmulh_vv_i16mf4(__VA_ARGS__)
15918
#define vmulh_vx_i16mf4(...) __riscv_vmulh_vx_i16mf4(__VA_ARGS__)
15919
#define vmulh_vv_i16mf2(...) __riscv_vmulh_vv_i16mf2(__VA_ARGS__)
15920
#define vmulh_vx_i16mf2(...) __riscv_vmulh_vx_i16mf2(__VA_ARGS__)
15921
#define vmulh_vv_i16m1(...) __riscv_vmulh_vv_i16m1(__VA_ARGS__)
15922
#define vmulh_vx_i16m1(...) __riscv_vmulh_vx_i16m1(__VA_ARGS__)
15923
#define vmulh_vv_i16m2(...) __riscv_vmulh_vv_i16m2(__VA_ARGS__)
15924
#define vmulh_vx_i16m2(...) __riscv_vmulh_vx_i16m2(__VA_ARGS__)
15925
#define vmulh_vv_i16m4(...) __riscv_vmulh_vv_i16m4(__VA_ARGS__)
15926
#define vmulh_vx_i16m4(...) __riscv_vmulh_vx_i16m4(__VA_ARGS__)
15927
#define vmulh_vv_i16m8(...) __riscv_vmulh_vv_i16m8(__VA_ARGS__)
15928
#define vmulh_vx_i16m8(...) __riscv_vmulh_vx_i16m8(__VA_ARGS__)
15929
#define vmulh_vv_i32mf2(...) __riscv_vmulh_vv_i32mf2(__VA_ARGS__)
15930
#define vmulh_vx_i32mf2(...) __riscv_vmulh_vx_i32mf2(__VA_ARGS__)
15931
#define vmulh_vv_i32m1(...) __riscv_vmulh_vv_i32m1(__VA_ARGS__)
15932
#define vmulh_vx_i32m1(...) __riscv_vmulh_vx_i32m1(__VA_ARGS__)
15933
#define vmulh_vv_i32m2(...) __riscv_vmulh_vv_i32m2(__VA_ARGS__)
15934
#define vmulh_vx_i32m2(...) __riscv_vmulh_vx_i32m2(__VA_ARGS__)
15935
#define vmulh_vv_i32m4(...) __riscv_vmulh_vv_i32m4(__VA_ARGS__)
15936
#define vmulh_vx_i32m4(...) __riscv_vmulh_vx_i32m4(__VA_ARGS__)
15937
#define vmulh_vv_i32m8(...) __riscv_vmulh_vv_i32m8(__VA_ARGS__)
15938
#define vmulh_vx_i32m8(...) __riscv_vmulh_vx_i32m8(__VA_ARGS__)
15939
#define vmulh_vv_i64m1(...) __riscv_vmulh_vv_i64m1(__VA_ARGS__)
15940
#define vmulh_vx_i64m1(...) __riscv_vmulh_vx_i64m1(__VA_ARGS__)
15941
#define vmulh_vv_i64m2(...) __riscv_vmulh_vv_i64m2(__VA_ARGS__)
15942
#define vmulh_vx_i64m2(...) __riscv_vmulh_vx_i64m2(__VA_ARGS__)
15943
#define vmulh_vv_i64m4(...) __riscv_vmulh_vv_i64m4(__VA_ARGS__)
15944
#define vmulh_vx_i64m4(...) __riscv_vmulh_vx_i64m4(__VA_ARGS__)
15945
#define vmulh_vv_i64m8(...) __riscv_vmulh_vv_i64m8(__VA_ARGS__)
15946
#define vmulh_vx_i64m8(...) __riscv_vmulh_vx_i64m8(__VA_ARGS__)
15947
#define vmulhsu_vv_i8mf8(...) __riscv_vmulhsu_vv_i8mf8(__VA_ARGS__)
15948
#define vmulhsu_vx_i8mf8(...) __riscv_vmulhsu_vx_i8mf8(__VA_ARGS__)
15949
#define vmulhsu_vv_i8mf4(...) __riscv_vmulhsu_vv_i8mf4(__VA_ARGS__)
15950
#define vmulhsu_vx_i8mf4(...) __riscv_vmulhsu_vx_i8mf4(__VA_ARGS__)
15951
#define vmulhsu_vv_i8mf2(...) __riscv_vmulhsu_vv_i8mf2(__VA_ARGS__)
15952
#define vmulhsu_vx_i8mf2(...) __riscv_vmulhsu_vx_i8mf2(__VA_ARGS__)
15953
#define vmulhsu_vv_i8m1(...) __riscv_vmulhsu_vv_i8m1(__VA_ARGS__)
15954
#define vmulhsu_vx_i8m1(...) __riscv_vmulhsu_vx_i8m1(__VA_ARGS__)
15955
#define vmulhsu_vv_i8m2(...) __riscv_vmulhsu_vv_i8m2(__VA_ARGS__)
15956
#define vmulhsu_vx_i8m2(...) __riscv_vmulhsu_vx_i8m2(__VA_ARGS__)
15957
#define vmulhsu_vv_i8m4(...) __riscv_vmulhsu_vv_i8m4(__VA_ARGS__)
15958
#define vmulhsu_vx_i8m4(...) __riscv_vmulhsu_vx_i8m4(__VA_ARGS__)
15959
#define vmulhsu_vv_i8m8(...) __riscv_vmulhsu_vv_i8m8(__VA_ARGS__)
15960
#define vmulhsu_vx_i8m8(...) __riscv_vmulhsu_vx_i8m8(__VA_ARGS__)
15961
#define vmulhsu_vv_i16mf4(...) __riscv_vmulhsu_vv_i16mf4(__VA_ARGS__)
15962
#define vmulhsu_vx_i16mf4(...) __riscv_vmulhsu_vx_i16mf4(__VA_ARGS__)
15963
#define vmulhsu_vv_i16mf2(...) __riscv_vmulhsu_vv_i16mf2(__VA_ARGS__)
15964
#define vmulhsu_vx_i16mf2(...) __riscv_vmulhsu_vx_i16mf2(__VA_ARGS__)
15965
#define vmulhsu_vv_i16m1(...) __riscv_vmulhsu_vv_i16m1(__VA_ARGS__)
15966
#define vmulhsu_vx_i16m1(...) __riscv_vmulhsu_vx_i16m1(__VA_ARGS__)
15967
#define vmulhsu_vv_i16m2(...) __riscv_vmulhsu_vv_i16m2(__VA_ARGS__)
15968
#define vmulhsu_vx_i16m2(...) __riscv_vmulhsu_vx_i16m2(__VA_ARGS__)
15969
#define vmulhsu_vv_i16m4(...) __riscv_vmulhsu_vv_i16m4(__VA_ARGS__)
15970
#define vmulhsu_vx_i16m4(...) __riscv_vmulhsu_vx_i16m4(__VA_ARGS__)
15971
#define vmulhsu_vv_i16m8(...) __riscv_vmulhsu_vv_i16m8(__VA_ARGS__)
15972
#define vmulhsu_vx_i16m8(...) __riscv_vmulhsu_vx_i16m8(__VA_ARGS__)
15973
#define vmulhsu_vv_i32mf2(...) __riscv_vmulhsu_vv_i32mf2(__VA_ARGS__)
15974
#define vmulhsu_vx_i32mf2(...) __riscv_vmulhsu_vx_i32mf2(__VA_ARGS__)
15975
#define vmulhsu_vv_i32m1(...) __riscv_vmulhsu_vv_i32m1(__VA_ARGS__)
15976
#define vmulhsu_vx_i32m1(...) __riscv_vmulhsu_vx_i32m1(__VA_ARGS__)
15977
#define vmulhsu_vv_i32m2(...) __riscv_vmulhsu_vv_i32m2(__VA_ARGS__)
15978
#define vmulhsu_vx_i32m2(...) __riscv_vmulhsu_vx_i32m2(__VA_ARGS__)
15979
#define vmulhsu_vv_i32m4(...) __riscv_vmulhsu_vv_i32m4(__VA_ARGS__)
15980
#define vmulhsu_vx_i32m4(...) __riscv_vmulhsu_vx_i32m4(__VA_ARGS__)
15981
#define vmulhsu_vv_i32m8(...) __riscv_vmulhsu_vv_i32m8(__VA_ARGS__)
15982
#define vmulhsu_vx_i32m8(...) __riscv_vmulhsu_vx_i32m8(__VA_ARGS__)
15983
#define vmulhsu_vv_i64m1(...) __riscv_vmulhsu_vv_i64m1(__VA_ARGS__)
15984
#define vmulhsu_vx_i64m1(...) __riscv_vmulhsu_vx_i64m1(__VA_ARGS__)
15985
#define vmulhsu_vv_i64m2(...) __riscv_vmulhsu_vv_i64m2(__VA_ARGS__)
15986
#define vmulhsu_vx_i64m2(...) __riscv_vmulhsu_vx_i64m2(__VA_ARGS__)
15987
#define vmulhsu_vv_i64m4(...) __riscv_vmulhsu_vv_i64m4(__VA_ARGS__)
15988
#define vmulhsu_vx_i64m4(...) __riscv_vmulhsu_vx_i64m4(__VA_ARGS__)
15989
#define vmulhsu_vv_i64m8(...) __riscv_vmulhsu_vv_i64m8(__VA_ARGS__)
15990
#define vmulhsu_vx_i64m8(...) __riscv_vmulhsu_vx_i64m8(__VA_ARGS__)
15991
#define vmul_vv_u8mf8(...) __riscv_vmul_vv_u8mf8(__VA_ARGS__)
15992
#define vmul_vx_u8mf8(...) __riscv_vmul_vx_u8mf8(__VA_ARGS__)
15993
#define vmul_vv_u8mf4(...) __riscv_vmul_vv_u8mf4(__VA_ARGS__)
15994
#define vmul_vx_u8mf4(...) __riscv_vmul_vx_u8mf4(__VA_ARGS__)
15995
#define vmul_vv_u8mf2(...) __riscv_vmul_vv_u8mf2(__VA_ARGS__)
15996
#define vmul_vx_u8mf2(...) __riscv_vmul_vx_u8mf2(__VA_ARGS__)
15997
#define vmul_vv_u8m1(...) __riscv_vmul_vv_u8m1(__VA_ARGS__)
15998
#define vmul_vx_u8m1(...) __riscv_vmul_vx_u8m1(__VA_ARGS__)
15999
#define vmul_vv_u8m2(...) __riscv_vmul_vv_u8m2(__VA_ARGS__)
16000
#define vmul_vx_u8m2(...) __riscv_vmul_vx_u8m2(__VA_ARGS__)
16001
#define vmul_vv_u8m4(...) __riscv_vmul_vv_u8m4(__VA_ARGS__)
16002
#define vmul_vx_u8m4(...) __riscv_vmul_vx_u8m4(__VA_ARGS__)
16003
#define vmul_vv_u8m8(...) __riscv_vmul_vv_u8m8(__VA_ARGS__)
16004
#define vmul_vx_u8m8(...) __riscv_vmul_vx_u8m8(__VA_ARGS__)
16005
#define vmul_vv_u16mf4(...) __riscv_vmul_vv_u16mf4(__VA_ARGS__)
16006
#define vmul_vx_u16mf4(...) __riscv_vmul_vx_u16mf4(__VA_ARGS__)
16007
#define vmul_vv_u16mf2(...) __riscv_vmul_vv_u16mf2(__VA_ARGS__)
16008
#define vmul_vx_u16mf2(...) __riscv_vmul_vx_u16mf2(__VA_ARGS__)
16009
#define vmul_vv_u16m1(...) __riscv_vmul_vv_u16m1(__VA_ARGS__)
16010
#define vmul_vx_u16m1(...) __riscv_vmul_vx_u16m1(__VA_ARGS__)
16011
#define vmul_vv_u16m2(...) __riscv_vmul_vv_u16m2(__VA_ARGS__)
16012
#define vmul_vx_u16m2(...) __riscv_vmul_vx_u16m2(__VA_ARGS__)
16013
#define vmul_vv_u16m4(...) __riscv_vmul_vv_u16m4(__VA_ARGS__)
16014
#define vmul_vx_u16m4(...) __riscv_vmul_vx_u16m4(__VA_ARGS__)
16015
#define vmul_vv_u16m8(...) __riscv_vmul_vv_u16m8(__VA_ARGS__)
16016
#define vmul_vx_u16m8(...) __riscv_vmul_vx_u16m8(__VA_ARGS__)
16017
#define vmul_vv_u32mf2(...) __riscv_vmul_vv_u32mf2(__VA_ARGS__)
16018
#define vmul_vx_u32mf2(...) __riscv_vmul_vx_u32mf2(__VA_ARGS__)
16019
#define vmul_vv_u32m1(...) __riscv_vmul_vv_u32m1(__VA_ARGS__)
16020
#define vmul_vx_u32m1(...) __riscv_vmul_vx_u32m1(__VA_ARGS__)
16021
#define vmul_vv_u32m2(...) __riscv_vmul_vv_u32m2(__VA_ARGS__)
16022
#define vmul_vx_u32m2(...) __riscv_vmul_vx_u32m2(__VA_ARGS__)
16023
#define vmul_vv_u32m4(...) __riscv_vmul_vv_u32m4(__VA_ARGS__)
16024
#define vmul_vx_u32m4(...) __riscv_vmul_vx_u32m4(__VA_ARGS__)
16025
#define vmul_vv_u32m8(...) __riscv_vmul_vv_u32m8(__VA_ARGS__)
16026
#define vmul_vx_u32m8(...) __riscv_vmul_vx_u32m8(__VA_ARGS__)
16027
#define vmul_vv_u64m1(...) __riscv_vmul_vv_u64m1(__VA_ARGS__)
16028
#define vmul_vx_u64m1(...) __riscv_vmul_vx_u64m1(__VA_ARGS__)
16029
#define vmul_vv_u64m2(...) __riscv_vmul_vv_u64m2(__VA_ARGS__)
16030
#define vmul_vx_u64m2(...) __riscv_vmul_vx_u64m2(__VA_ARGS__)
16031
#define vmul_vv_u64m4(...) __riscv_vmul_vv_u64m4(__VA_ARGS__)
16032
#define vmul_vx_u64m4(...) __riscv_vmul_vx_u64m4(__VA_ARGS__)
16033
#define vmul_vv_u64m8(...) __riscv_vmul_vv_u64m8(__VA_ARGS__)
16034
#define vmul_vx_u64m8(...) __riscv_vmul_vx_u64m8(__VA_ARGS__)
16035
#define vmulhu_vv_u8mf8(...) __riscv_vmulhu_vv_u8mf8(__VA_ARGS__)
16036
#define vmulhu_vx_u8mf8(...) __riscv_vmulhu_vx_u8mf8(__VA_ARGS__)
16037
#define vmulhu_vv_u8mf4(...) __riscv_vmulhu_vv_u8mf4(__VA_ARGS__)
16038
#define vmulhu_vx_u8mf4(...) __riscv_vmulhu_vx_u8mf4(__VA_ARGS__)
16039
#define vmulhu_vv_u8mf2(...) __riscv_vmulhu_vv_u8mf2(__VA_ARGS__)
16040
#define vmulhu_vx_u8mf2(...) __riscv_vmulhu_vx_u8mf2(__VA_ARGS__)
16041
#define vmulhu_vv_u8m1(...) __riscv_vmulhu_vv_u8m1(__VA_ARGS__)
16042
#define vmulhu_vx_u8m1(...) __riscv_vmulhu_vx_u8m1(__VA_ARGS__)
16043
#define vmulhu_vv_u8m2(...) __riscv_vmulhu_vv_u8m2(__VA_ARGS__)
16044
#define vmulhu_vx_u8m2(...) __riscv_vmulhu_vx_u8m2(__VA_ARGS__)
16045
#define vmulhu_vv_u8m4(...) __riscv_vmulhu_vv_u8m4(__VA_ARGS__)
16046
#define vmulhu_vx_u8m4(...) __riscv_vmulhu_vx_u8m4(__VA_ARGS__)
16047
#define vmulhu_vv_u8m8(...) __riscv_vmulhu_vv_u8m8(__VA_ARGS__)
16048
#define vmulhu_vx_u8m8(...) __riscv_vmulhu_vx_u8m8(__VA_ARGS__)
16049
#define vmulhu_vv_u16mf4(...) __riscv_vmulhu_vv_u16mf4(__VA_ARGS__)
16050
#define vmulhu_vx_u16mf4(...) __riscv_vmulhu_vx_u16mf4(__VA_ARGS__)
16051
#define vmulhu_vv_u16mf2(...) __riscv_vmulhu_vv_u16mf2(__VA_ARGS__)
16052
#define vmulhu_vx_u16mf2(...) __riscv_vmulhu_vx_u16mf2(__VA_ARGS__)
16053
#define vmulhu_vv_u16m1(...) __riscv_vmulhu_vv_u16m1(__VA_ARGS__)
16054
#define vmulhu_vx_u16m1(...) __riscv_vmulhu_vx_u16m1(__VA_ARGS__)
16055
#define vmulhu_vv_u16m2(...) __riscv_vmulhu_vv_u16m2(__VA_ARGS__)
16056
#define vmulhu_vx_u16m2(...) __riscv_vmulhu_vx_u16m2(__VA_ARGS__)
16057
#define vmulhu_vv_u16m4(...) __riscv_vmulhu_vv_u16m4(__VA_ARGS__)
16058
#define vmulhu_vx_u16m4(...) __riscv_vmulhu_vx_u16m4(__VA_ARGS__)
16059
#define vmulhu_vv_u16m8(...) __riscv_vmulhu_vv_u16m8(__VA_ARGS__)
16060
#define vmulhu_vx_u16m8(...) __riscv_vmulhu_vx_u16m8(__VA_ARGS__)
16061
#define vmulhu_vv_u32mf2(...) __riscv_vmulhu_vv_u32mf2(__VA_ARGS__)
16062
#define vmulhu_vx_u32mf2(...) __riscv_vmulhu_vx_u32mf2(__VA_ARGS__)
16063
#define vmulhu_vv_u32m1(...) __riscv_vmulhu_vv_u32m1(__VA_ARGS__)
16064
#define vmulhu_vx_u32m1(...) __riscv_vmulhu_vx_u32m1(__VA_ARGS__)
16065
#define vmulhu_vv_u32m2(...) __riscv_vmulhu_vv_u32m2(__VA_ARGS__)
16066
#define vmulhu_vx_u32m2(...) __riscv_vmulhu_vx_u32m2(__VA_ARGS__)
16067
#define vmulhu_vv_u32m4(...) __riscv_vmulhu_vv_u32m4(__VA_ARGS__)
16068
#define vmulhu_vx_u32m4(...) __riscv_vmulhu_vx_u32m4(__VA_ARGS__)
16069
#define vmulhu_vv_u32m8(...) __riscv_vmulhu_vv_u32m8(__VA_ARGS__)
16070
#define vmulhu_vx_u32m8(...) __riscv_vmulhu_vx_u32m8(__VA_ARGS__)
16071
#define vmulhu_vv_u64m1(...) __riscv_vmulhu_vv_u64m1(__VA_ARGS__)
16072
#define vmulhu_vx_u64m1(...) __riscv_vmulhu_vx_u64m1(__VA_ARGS__)
16073
#define vmulhu_vv_u64m2(...) __riscv_vmulhu_vv_u64m2(__VA_ARGS__)
16074
#define vmulhu_vx_u64m2(...) __riscv_vmulhu_vx_u64m2(__VA_ARGS__)
16075
#define vmulhu_vv_u64m4(...) __riscv_vmulhu_vv_u64m4(__VA_ARGS__)
16076
#define vmulhu_vx_u64m4(...) __riscv_vmulhu_vx_u64m4(__VA_ARGS__)
16077
#define vmulhu_vv_u64m8(...) __riscv_vmulhu_vv_u64m8(__VA_ARGS__)
16078
#define vmulhu_vx_u64m8(...) __riscv_vmulhu_vx_u64m8(__VA_ARGS__)
16079
// masked functions
16080
#define vmul_vv_i8mf8_m(...) __riscv_vmul_vv_i8mf8_tumu(__VA_ARGS__)
16081
#define vmul_vx_i8mf8_m(...) __riscv_vmul_vx_i8mf8_tumu(__VA_ARGS__)
16082
#define vmul_vv_i8mf4_m(...) __riscv_vmul_vv_i8mf4_tumu(__VA_ARGS__)
16083
#define vmul_vx_i8mf4_m(...) __riscv_vmul_vx_i8mf4_tumu(__VA_ARGS__)
16084
#define vmul_vv_i8mf2_m(...) __riscv_vmul_vv_i8mf2_tumu(__VA_ARGS__)
16085
#define vmul_vx_i8mf2_m(...) __riscv_vmul_vx_i8mf2_tumu(__VA_ARGS__)
16086
#define vmul_vv_i8m1_m(...) __riscv_vmul_vv_i8m1_tumu(__VA_ARGS__)
16087
#define vmul_vx_i8m1_m(...) __riscv_vmul_vx_i8m1_tumu(__VA_ARGS__)
16088
#define vmul_vv_i8m2_m(...) __riscv_vmul_vv_i8m2_tumu(__VA_ARGS__)
16089
#define vmul_vx_i8m2_m(...) __riscv_vmul_vx_i8m2_tumu(__VA_ARGS__)
16090
#define vmul_vv_i8m4_m(...) __riscv_vmul_vv_i8m4_tumu(__VA_ARGS__)
16091
#define vmul_vx_i8m4_m(...) __riscv_vmul_vx_i8m4_tumu(__VA_ARGS__)
16092
#define vmul_vv_i8m8_m(...) __riscv_vmul_vv_i8m8_tumu(__VA_ARGS__)
16093
#define vmul_vx_i8m8_m(...) __riscv_vmul_vx_i8m8_tumu(__VA_ARGS__)
16094
#define vmul_vv_i16mf4_m(...) __riscv_vmul_vv_i16mf4_tumu(__VA_ARGS__)
16095
#define vmul_vx_i16mf4_m(...) __riscv_vmul_vx_i16mf4_tumu(__VA_ARGS__)
16096
#define vmul_vv_i16mf2_m(...) __riscv_vmul_vv_i16mf2_tumu(__VA_ARGS__)
16097
#define vmul_vx_i16mf2_m(...) __riscv_vmul_vx_i16mf2_tumu(__VA_ARGS__)
16098
#define vmul_vv_i16m1_m(...) __riscv_vmul_vv_i16m1_tumu(__VA_ARGS__)
16099
#define vmul_vx_i16m1_m(...) __riscv_vmul_vx_i16m1_tumu(__VA_ARGS__)
16100
#define vmul_vv_i16m2_m(...) __riscv_vmul_vv_i16m2_tumu(__VA_ARGS__)
16101
#define vmul_vx_i16m2_m(...) __riscv_vmul_vx_i16m2_tumu(__VA_ARGS__)
16102
#define vmul_vv_i16m4_m(...) __riscv_vmul_vv_i16m4_tumu(__VA_ARGS__)
16103
#define vmul_vx_i16m4_m(...) __riscv_vmul_vx_i16m4_tumu(__VA_ARGS__)
16104
#define vmul_vv_i16m8_m(...) __riscv_vmul_vv_i16m8_tumu(__VA_ARGS__)
16105
#define vmul_vx_i16m8_m(...) __riscv_vmul_vx_i16m8_tumu(__VA_ARGS__)
16106
#define vmul_vv_i32mf2_m(...) __riscv_vmul_vv_i32mf2_tumu(__VA_ARGS__)
16107
#define vmul_vx_i32mf2_m(...) __riscv_vmul_vx_i32mf2_tumu(__VA_ARGS__)
16108
#define vmul_vv_i32m1_m(...) __riscv_vmul_vv_i32m1_tumu(__VA_ARGS__)
16109
#define vmul_vx_i32m1_m(...) __riscv_vmul_vx_i32m1_tumu(__VA_ARGS__)
16110
#define vmul_vv_i32m2_m(...) __riscv_vmul_vv_i32m2_tumu(__VA_ARGS__)
16111
#define vmul_vx_i32m2_m(...) __riscv_vmul_vx_i32m2_tumu(__VA_ARGS__)
16112
#define vmul_vv_i32m4_m(...) __riscv_vmul_vv_i32m4_tumu(__VA_ARGS__)
16113
#define vmul_vx_i32m4_m(...) __riscv_vmul_vx_i32m4_tumu(__VA_ARGS__)
16114
#define vmul_vv_i32m8_m(...) __riscv_vmul_vv_i32m8_tumu(__VA_ARGS__)
16115
#define vmul_vx_i32m8_m(...) __riscv_vmul_vx_i32m8_tumu(__VA_ARGS__)
16116
#define vmul_vv_i64m1_m(...) __riscv_vmul_vv_i64m1_tumu(__VA_ARGS__)
16117
#define vmul_vx_i64m1_m(...) __riscv_vmul_vx_i64m1_tumu(__VA_ARGS__)
16118
#define vmul_vv_i64m2_m(...) __riscv_vmul_vv_i64m2_tumu(__VA_ARGS__)
16119
#define vmul_vx_i64m2_m(...) __riscv_vmul_vx_i64m2_tumu(__VA_ARGS__)
16120
#define vmul_vv_i64m4_m(...) __riscv_vmul_vv_i64m4_tumu(__VA_ARGS__)
16121
#define vmul_vx_i64m4_m(...) __riscv_vmul_vx_i64m4_tumu(__VA_ARGS__)
16122
#define vmul_vv_i64m8_m(...) __riscv_vmul_vv_i64m8_tumu(__VA_ARGS__)
16123
#define vmul_vx_i64m8_m(...) __riscv_vmul_vx_i64m8_tumu(__VA_ARGS__)
16124
#define vmulh_vv_i8mf8_m(...) __riscv_vmulh_vv_i8mf8_tumu(__VA_ARGS__)
16125
#define vmulh_vx_i8mf8_m(...) __riscv_vmulh_vx_i8mf8_tumu(__VA_ARGS__)
16126
#define vmulh_vv_i8mf4_m(...) __riscv_vmulh_vv_i8mf4_tumu(__VA_ARGS__)
16127
#define vmulh_vx_i8mf4_m(...) __riscv_vmulh_vx_i8mf4_tumu(__VA_ARGS__)
16128
#define vmulh_vv_i8mf2_m(...) __riscv_vmulh_vv_i8mf2_tumu(__VA_ARGS__)
16129
#define vmulh_vx_i8mf2_m(...) __riscv_vmulh_vx_i8mf2_tumu(__VA_ARGS__)
16130
#define vmulh_vv_i8m1_m(...) __riscv_vmulh_vv_i8m1_tumu(__VA_ARGS__)
16131
#define vmulh_vx_i8m1_m(...) __riscv_vmulh_vx_i8m1_tumu(__VA_ARGS__)
16132
#define vmulh_vv_i8m2_m(...) __riscv_vmulh_vv_i8m2_tumu(__VA_ARGS__)
16133
#define vmulh_vx_i8m2_m(...) __riscv_vmulh_vx_i8m2_tumu(__VA_ARGS__)
16134
#define vmulh_vv_i8m4_m(...) __riscv_vmulh_vv_i8m4_tumu(__VA_ARGS__)
16135
#define vmulh_vx_i8m4_m(...) __riscv_vmulh_vx_i8m4_tumu(__VA_ARGS__)
16136
#define vmulh_vv_i8m8_m(...) __riscv_vmulh_vv_i8m8_tumu(__VA_ARGS__)
16137
#define vmulh_vx_i8m8_m(...) __riscv_vmulh_vx_i8m8_tumu(__VA_ARGS__)
16138
#define vmulh_vv_i16mf4_m(...) __riscv_vmulh_vv_i16mf4_tumu(__VA_ARGS__)
16139
#define vmulh_vx_i16mf4_m(...) __riscv_vmulh_vx_i16mf4_tumu(__VA_ARGS__)
16140
#define vmulh_vv_i16mf2_m(...) __riscv_vmulh_vv_i16mf2_tumu(__VA_ARGS__)
16141
#define vmulh_vx_i16mf2_m(...) __riscv_vmulh_vx_i16mf2_tumu(__VA_ARGS__)
16142
#define vmulh_vv_i16m1_m(...) __riscv_vmulh_vv_i16m1_tumu(__VA_ARGS__)
16143
#define vmulh_vx_i16m1_m(...) __riscv_vmulh_vx_i16m1_tumu(__VA_ARGS__)
16144
#define vmulh_vv_i16m2_m(...) __riscv_vmulh_vv_i16m2_tumu(__VA_ARGS__)
16145
#define vmulh_vx_i16m2_m(...) __riscv_vmulh_vx_i16m2_tumu(__VA_ARGS__)
16146
#define vmulh_vv_i16m4_m(...) __riscv_vmulh_vv_i16m4_tumu(__VA_ARGS__)
16147
#define vmulh_vx_i16m4_m(...) __riscv_vmulh_vx_i16m4_tumu(__VA_ARGS__)
16148
#define vmulh_vv_i16m8_m(...) __riscv_vmulh_vv_i16m8_tumu(__VA_ARGS__)
16149
#define vmulh_vx_i16m8_m(...) __riscv_vmulh_vx_i16m8_tumu(__VA_ARGS__)
16150
#define vmulh_vv_i32mf2_m(...) __riscv_vmulh_vv_i32mf2_tumu(__VA_ARGS__)
16151
#define vmulh_vx_i32mf2_m(...) __riscv_vmulh_vx_i32mf2_tumu(__VA_ARGS__)
16152
#define vmulh_vv_i32m1_m(...) __riscv_vmulh_vv_i32m1_tumu(__VA_ARGS__)
16153
#define vmulh_vx_i32m1_m(...) __riscv_vmulh_vx_i32m1_tumu(__VA_ARGS__)
16154
#define vmulh_vv_i32m2_m(...) __riscv_vmulh_vv_i32m2_tumu(__VA_ARGS__)
16155
#define vmulh_vx_i32m2_m(...) __riscv_vmulh_vx_i32m2_tumu(__VA_ARGS__)
16156
#define vmulh_vv_i32m4_m(...) __riscv_vmulh_vv_i32m4_tumu(__VA_ARGS__)
16157
#define vmulh_vx_i32m4_m(...) __riscv_vmulh_vx_i32m4_tumu(__VA_ARGS__)
16158
#define vmulh_vv_i32m8_m(...) __riscv_vmulh_vv_i32m8_tumu(__VA_ARGS__)
16159
#define vmulh_vx_i32m8_m(...) __riscv_vmulh_vx_i32m8_tumu(__VA_ARGS__)
16160
#define vmulh_vv_i64m1_m(...) __riscv_vmulh_vv_i64m1_tumu(__VA_ARGS__)
16161
#define vmulh_vx_i64m1_m(...) __riscv_vmulh_vx_i64m1_tumu(__VA_ARGS__)
16162
#define vmulh_vv_i64m2_m(...) __riscv_vmulh_vv_i64m2_tumu(__VA_ARGS__)
16163
#define vmulh_vx_i64m2_m(...) __riscv_vmulh_vx_i64m2_tumu(__VA_ARGS__)
16164
#define vmulh_vv_i64m4_m(...) __riscv_vmulh_vv_i64m4_tumu(__VA_ARGS__)
16165
#define vmulh_vx_i64m4_m(...) __riscv_vmulh_vx_i64m4_tumu(__VA_ARGS__)
16166
#define vmulh_vv_i64m8_m(...) __riscv_vmulh_vv_i64m8_tumu(__VA_ARGS__)
16167
#define vmulh_vx_i64m8_m(...) __riscv_vmulh_vx_i64m8_tumu(__VA_ARGS__)
16168
#define vmulhsu_vv_i8mf8_m(...) __riscv_vmulhsu_vv_i8mf8_tumu(__VA_ARGS__)
16169
#define vmulhsu_vx_i8mf8_m(...) __riscv_vmulhsu_vx_i8mf8_tumu(__VA_ARGS__)
16170
#define vmulhsu_vv_i8mf4_m(...) __riscv_vmulhsu_vv_i8mf4_tumu(__VA_ARGS__)
16171
#define vmulhsu_vx_i8mf4_m(...) __riscv_vmulhsu_vx_i8mf4_tumu(__VA_ARGS__)
16172
#define vmulhsu_vv_i8mf2_m(...) __riscv_vmulhsu_vv_i8mf2_tumu(__VA_ARGS__)
16173
#define vmulhsu_vx_i8mf2_m(...) __riscv_vmulhsu_vx_i8mf2_tumu(__VA_ARGS__)
16174
#define vmulhsu_vv_i8m1_m(...) __riscv_vmulhsu_vv_i8m1_tumu(__VA_ARGS__)
16175
#define vmulhsu_vx_i8m1_m(...) __riscv_vmulhsu_vx_i8m1_tumu(__VA_ARGS__)
16176
#define vmulhsu_vv_i8m2_m(...) __riscv_vmulhsu_vv_i8m2_tumu(__VA_ARGS__)
16177
#define vmulhsu_vx_i8m2_m(...) __riscv_vmulhsu_vx_i8m2_tumu(__VA_ARGS__)
16178
#define vmulhsu_vv_i8m4_m(...) __riscv_vmulhsu_vv_i8m4_tumu(__VA_ARGS__)
16179
#define vmulhsu_vx_i8m4_m(...) __riscv_vmulhsu_vx_i8m4_tumu(__VA_ARGS__)
16180
#define vmulhsu_vv_i8m8_m(...) __riscv_vmulhsu_vv_i8m8_tumu(__VA_ARGS__)
16181
#define vmulhsu_vx_i8m8_m(...) __riscv_vmulhsu_vx_i8m8_tumu(__VA_ARGS__)
16182
#define vmulhsu_vv_i16mf4_m(...) __riscv_vmulhsu_vv_i16mf4_tumu(__VA_ARGS__)
16183
#define vmulhsu_vx_i16mf4_m(...) __riscv_vmulhsu_vx_i16mf4_tumu(__VA_ARGS__)
16184
#define vmulhsu_vv_i16mf2_m(...) __riscv_vmulhsu_vv_i16mf2_tumu(__VA_ARGS__)
16185
#define vmulhsu_vx_i16mf2_m(...) __riscv_vmulhsu_vx_i16mf2_tumu(__VA_ARGS__)
16186
#define vmulhsu_vv_i16m1_m(...) __riscv_vmulhsu_vv_i16m1_tumu(__VA_ARGS__)
16187
#define vmulhsu_vx_i16m1_m(...) __riscv_vmulhsu_vx_i16m1_tumu(__VA_ARGS__)
16188
#define vmulhsu_vv_i16m2_m(...) __riscv_vmulhsu_vv_i16m2_tumu(__VA_ARGS__)
16189
#define vmulhsu_vx_i16m2_m(...) __riscv_vmulhsu_vx_i16m2_tumu(__VA_ARGS__)
16190
#define vmulhsu_vv_i16m4_m(...) __riscv_vmulhsu_vv_i16m4_tumu(__VA_ARGS__)
16191
#define vmulhsu_vx_i16m4_m(...) __riscv_vmulhsu_vx_i16m4_tumu(__VA_ARGS__)
16192
#define vmulhsu_vv_i16m8_m(...) __riscv_vmulhsu_vv_i16m8_tumu(__VA_ARGS__)
16193
#define vmulhsu_vx_i16m8_m(...) __riscv_vmulhsu_vx_i16m8_tumu(__VA_ARGS__)
16194
#define vmulhsu_vv_i32mf2_m(...) __riscv_vmulhsu_vv_i32mf2_tumu(__VA_ARGS__)
16195
#define vmulhsu_vx_i32mf2_m(...) __riscv_vmulhsu_vx_i32mf2_tumu(__VA_ARGS__)
16196
#define vmulhsu_vv_i32m1_m(...) __riscv_vmulhsu_vv_i32m1_tumu(__VA_ARGS__)
16197
#define vmulhsu_vx_i32m1_m(...) __riscv_vmulhsu_vx_i32m1_tumu(__VA_ARGS__)
16198
#define vmulhsu_vv_i32m2_m(...) __riscv_vmulhsu_vv_i32m2_tumu(__VA_ARGS__)
16199
#define vmulhsu_vx_i32m2_m(...) __riscv_vmulhsu_vx_i32m2_tumu(__VA_ARGS__)
16200
#define vmulhsu_vv_i32m4_m(...) __riscv_vmulhsu_vv_i32m4_tumu(__VA_ARGS__)
16201
#define vmulhsu_vx_i32m4_m(...) __riscv_vmulhsu_vx_i32m4_tumu(__VA_ARGS__)
16202
#define vmulhsu_vv_i32m8_m(...) __riscv_vmulhsu_vv_i32m8_tumu(__VA_ARGS__)
16203
#define vmulhsu_vx_i32m8_m(...) __riscv_vmulhsu_vx_i32m8_tumu(__VA_ARGS__)
16204
#define vmulhsu_vv_i64m1_m(...) __riscv_vmulhsu_vv_i64m1_tumu(__VA_ARGS__)
16205
#define vmulhsu_vx_i64m1_m(...) __riscv_vmulhsu_vx_i64m1_tumu(__VA_ARGS__)
16206
#define vmulhsu_vv_i64m2_m(...) __riscv_vmulhsu_vv_i64m2_tumu(__VA_ARGS__)
16207
#define vmulhsu_vx_i64m2_m(...) __riscv_vmulhsu_vx_i64m2_tumu(__VA_ARGS__)
16208
#define vmulhsu_vv_i64m4_m(...) __riscv_vmulhsu_vv_i64m4_tumu(__VA_ARGS__)
16209
#define vmulhsu_vx_i64m4_m(...) __riscv_vmulhsu_vx_i64m4_tumu(__VA_ARGS__)
16210
#define vmulhsu_vv_i64m8_m(...) __riscv_vmulhsu_vv_i64m8_tumu(__VA_ARGS__)
16211
#define vmulhsu_vx_i64m8_m(...) __riscv_vmulhsu_vx_i64m8_tumu(__VA_ARGS__)
16212
#define vmul_vv_u8mf8_m(...) __riscv_vmul_vv_u8mf8_tumu(__VA_ARGS__)
16213
#define vmul_vx_u8mf8_m(...) __riscv_vmul_vx_u8mf8_tumu(__VA_ARGS__)
16214
#define vmul_vv_u8mf4_m(...) __riscv_vmul_vv_u8mf4_tumu(__VA_ARGS__)
16215
#define vmul_vx_u8mf4_m(...) __riscv_vmul_vx_u8mf4_tumu(__VA_ARGS__)
16216
#define vmul_vv_u8mf2_m(...) __riscv_vmul_vv_u8mf2_tumu(__VA_ARGS__)
16217
#define vmul_vx_u8mf2_m(...) __riscv_vmul_vx_u8mf2_tumu(__VA_ARGS__)
16218
#define vmul_vv_u8m1_m(...) __riscv_vmul_vv_u8m1_tumu(__VA_ARGS__)
16219
#define vmul_vx_u8m1_m(...) __riscv_vmul_vx_u8m1_tumu(__VA_ARGS__)
16220
#define vmul_vv_u8m2_m(...) __riscv_vmul_vv_u8m2_tumu(__VA_ARGS__)
16221
#define vmul_vx_u8m2_m(...) __riscv_vmul_vx_u8m2_tumu(__VA_ARGS__)
16222
#define vmul_vv_u8m4_m(...) __riscv_vmul_vv_u8m4_tumu(__VA_ARGS__)
16223
#define vmul_vx_u8m4_m(...) __riscv_vmul_vx_u8m4_tumu(__VA_ARGS__)
16224
#define vmul_vv_u8m8_m(...) __riscv_vmul_vv_u8m8_tumu(__VA_ARGS__)
16225
#define vmul_vx_u8m8_m(...) __riscv_vmul_vx_u8m8_tumu(__VA_ARGS__)
16226
#define vmul_vv_u16mf4_m(...) __riscv_vmul_vv_u16mf4_tumu(__VA_ARGS__)
16227
#define vmul_vx_u16mf4_m(...) __riscv_vmul_vx_u16mf4_tumu(__VA_ARGS__)
16228
#define vmul_vv_u16mf2_m(...) __riscv_vmul_vv_u16mf2_tumu(__VA_ARGS__)
16229
#define vmul_vx_u16mf2_m(...) __riscv_vmul_vx_u16mf2_tumu(__VA_ARGS__)
16230
#define vmul_vv_u16m1_m(...) __riscv_vmul_vv_u16m1_tumu(__VA_ARGS__)
16231
#define vmul_vx_u16m1_m(...) __riscv_vmul_vx_u16m1_tumu(__VA_ARGS__)
16232
#define vmul_vv_u16m2_m(...) __riscv_vmul_vv_u16m2_tumu(__VA_ARGS__)
16233
#define vmul_vx_u16m2_m(...) __riscv_vmul_vx_u16m2_tumu(__VA_ARGS__)
16234
#define vmul_vv_u16m4_m(...) __riscv_vmul_vv_u16m4_tumu(__VA_ARGS__)
16235
#define vmul_vx_u16m4_m(...) __riscv_vmul_vx_u16m4_tumu(__VA_ARGS__)
16236
#define vmul_vv_u16m8_m(...) __riscv_vmul_vv_u16m8_tumu(__VA_ARGS__)
16237
#define vmul_vx_u16m8_m(...) __riscv_vmul_vx_u16m8_tumu(__VA_ARGS__)
16238
#define vmul_vv_u32mf2_m(...) __riscv_vmul_vv_u32mf2_tumu(__VA_ARGS__)
16239
#define vmul_vx_u32mf2_m(...) __riscv_vmul_vx_u32mf2_tumu(__VA_ARGS__)
16240
#define vmul_vv_u32m1_m(...) __riscv_vmul_vv_u32m1_tumu(__VA_ARGS__)
16241
#define vmul_vx_u32m1_m(...) __riscv_vmul_vx_u32m1_tumu(__VA_ARGS__)
16242
#define vmul_vv_u32m2_m(...) __riscv_vmul_vv_u32m2_tumu(__VA_ARGS__)
16243
#define vmul_vx_u32m2_m(...) __riscv_vmul_vx_u32m2_tumu(__VA_ARGS__)
16244
#define vmul_vv_u32m4_m(...) __riscv_vmul_vv_u32m4_tumu(__VA_ARGS__)
16245
#define vmul_vx_u32m4_m(...) __riscv_vmul_vx_u32m4_tumu(__VA_ARGS__)
16246
#define vmul_vv_u32m8_m(...) __riscv_vmul_vv_u32m8_tumu(__VA_ARGS__)
16247
#define vmul_vx_u32m8_m(...) __riscv_vmul_vx_u32m8_tumu(__VA_ARGS__)
16248
#define vmul_vv_u64m1_m(...) __riscv_vmul_vv_u64m1_tumu(__VA_ARGS__)
16249
#define vmul_vx_u64m1_m(...) __riscv_vmul_vx_u64m1_tumu(__VA_ARGS__)
16250
#define vmul_vv_u64m2_m(...) __riscv_vmul_vv_u64m2_tumu(__VA_ARGS__)
16251
#define vmul_vx_u64m2_m(...) __riscv_vmul_vx_u64m2_tumu(__VA_ARGS__)
16252
#define vmul_vv_u64m4_m(...) __riscv_vmul_vv_u64m4_tumu(__VA_ARGS__)
16253
#define vmul_vx_u64m4_m(...) __riscv_vmul_vx_u64m4_tumu(__VA_ARGS__)
16254
#define vmul_vv_u64m8_m(...) __riscv_vmul_vv_u64m8_tumu(__VA_ARGS__)
16255
#define vmul_vx_u64m8_m(...) __riscv_vmul_vx_u64m8_tumu(__VA_ARGS__)
16256
#define vmulhu_vv_u8mf8_m(...) __riscv_vmulhu_vv_u8mf8_tumu(__VA_ARGS__)
16257
#define vmulhu_vx_u8mf8_m(...) __riscv_vmulhu_vx_u8mf8_tumu(__VA_ARGS__)
16258
#define vmulhu_vv_u8mf4_m(...) __riscv_vmulhu_vv_u8mf4_tumu(__VA_ARGS__)
16259
#define vmulhu_vx_u8mf4_m(...) __riscv_vmulhu_vx_u8mf4_tumu(__VA_ARGS__)
16260
#define vmulhu_vv_u8mf2_m(...) __riscv_vmulhu_vv_u8mf2_tumu(__VA_ARGS__)
16261
#define vmulhu_vx_u8mf2_m(...) __riscv_vmulhu_vx_u8mf2_tumu(__VA_ARGS__)
16262
#define vmulhu_vv_u8m1_m(...) __riscv_vmulhu_vv_u8m1_tumu(__VA_ARGS__)
16263
#define vmulhu_vx_u8m1_m(...) __riscv_vmulhu_vx_u8m1_tumu(__VA_ARGS__)
16264
#define vmulhu_vv_u8m2_m(...) __riscv_vmulhu_vv_u8m2_tumu(__VA_ARGS__)
16265
#define vmulhu_vx_u8m2_m(...) __riscv_vmulhu_vx_u8m2_tumu(__VA_ARGS__)
16266
#define vmulhu_vv_u8m4_m(...) __riscv_vmulhu_vv_u8m4_tumu(__VA_ARGS__)
16267
#define vmulhu_vx_u8m4_m(...) __riscv_vmulhu_vx_u8m4_tumu(__VA_ARGS__)
16268
#define vmulhu_vv_u8m8_m(...) __riscv_vmulhu_vv_u8m8_tumu(__VA_ARGS__)
16269
#define vmulhu_vx_u8m8_m(...) __riscv_vmulhu_vx_u8m8_tumu(__VA_ARGS__)
16270
#define vmulhu_vv_u16mf4_m(...) __riscv_vmulhu_vv_u16mf4_tumu(__VA_ARGS__)
16271
#define vmulhu_vx_u16mf4_m(...) __riscv_vmulhu_vx_u16mf4_tumu(__VA_ARGS__)
16272
#define vmulhu_vv_u16mf2_m(...) __riscv_vmulhu_vv_u16mf2_tumu(__VA_ARGS__)
16273
#define vmulhu_vx_u16mf2_m(...) __riscv_vmulhu_vx_u16mf2_tumu(__VA_ARGS__)
16274
#define vmulhu_vv_u16m1_m(...) __riscv_vmulhu_vv_u16m1_tumu(__VA_ARGS__)
16275
#define vmulhu_vx_u16m1_m(...) __riscv_vmulhu_vx_u16m1_tumu(__VA_ARGS__)
16276
#define vmulhu_vv_u16m2_m(...) __riscv_vmulhu_vv_u16m2_tumu(__VA_ARGS__)
16277
#define vmulhu_vx_u16m2_m(...) __riscv_vmulhu_vx_u16m2_tumu(__VA_ARGS__)
16278
#define vmulhu_vv_u16m4_m(...) __riscv_vmulhu_vv_u16m4_tumu(__VA_ARGS__)
16279
#define vmulhu_vx_u16m4_m(...) __riscv_vmulhu_vx_u16m4_tumu(__VA_ARGS__)
16280
#define vmulhu_vv_u16m8_m(...) __riscv_vmulhu_vv_u16m8_tumu(__VA_ARGS__)
16281
#define vmulhu_vx_u16m8_m(...) __riscv_vmulhu_vx_u16m8_tumu(__VA_ARGS__)
16282
#define vmulhu_vv_u32mf2_m(...) __riscv_vmulhu_vv_u32mf2_tumu(__VA_ARGS__)
16283
#define vmulhu_vx_u32mf2_m(...) __riscv_vmulhu_vx_u32mf2_tumu(__VA_ARGS__)
16284
#define vmulhu_vv_u32m1_m(...) __riscv_vmulhu_vv_u32m1_tumu(__VA_ARGS__)
16285
#define vmulhu_vx_u32m1_m(...) __riscv_vmulhu_vx_u32m1_tumu(__VA_ARGS__)
16286
#define vmulhu_vv_u32m2_m(...) __riscv_vmulhu_vv_u32m2_tumu(__VA_ARGS__)
16287
#define vmulhu_vx_u32m2_m(...) __riscv_vmulhu_vx_u32m2_tumu(__VA_ARGS__)
16288
#define vmulhu_vv_u32m4_m(...) __riscv_vmulhu_vv_u32m4_tumu(__VA_ARGS__)
16289
#define vmulhu_vx_u32m4_m(...) __riscv_vmulhu_vx_u32m4_tumu(__VA_ARGS__)
16290
#define vmulhu_vv_u32m8_m(...) __riscv_vmulhu_vv_u32m8_tumu(__VA_ARGS__)
16291
#define vmulhu_vx_u32m8_m(...) __riscv_vmulhu_vx_u32m8_tumu(__VA_ARGS__)
16292
#define vmulhu_vv_u64m1_m(...) __riscv_vmulhu_vv_u64m1_tumu(__VA_ARGS__)
16293
#define vmulhu_vx_u64m1_m(...) __riscv_vmulhu_vx_u64m1_tumu(__VA_ARGS__)
16294
#define vmulhu_vv_u64m2_m(...) __riscv_vmulhu_vv_u64m2_tumu(__VA_ARGS__)
16295
#define vmulhu_vx_u64m2_m(...) __riscv_vmulhu_vx_u64m2_tumu(__VA_ARGS__)
16296
#define vmulhu_vv_u64m4_m(...) __riscv_vmulhu_vv_u64m4_tumu(__VA_ARGS__)
16297
#define vmulhu_vx_u64m4_m(...) __riscv_vmulhu_vx_u64m4_tumu(__VA_ARGS__)
16298
#define vmulhu_vv_u64m8_m(...) __riscv_vmulhu_vv_u64m8_tumu(__VA_ARGS__)
16299
#define vmulhu_vx_u64m8_m(...) __riscv_vmulhu_vx_u64m8_tumu(__VA_ARGS__)
16300
#define vdiv_vv_i8mf8(...) __riscv_vdiv_vv_i8mf8(__VA_ARGS__)
16301
#define vdiv_vx_i8mf8(...) __riscv_vdiv_vx_i8mf8(__VA_ARGS__)
16302
#define vdiv_vv_i8mf4(...) __riscv_vdiv_vv_i8mf4(__VA_ARGS__)
16303
#define vdiv_vx_i8mf4(...) __riscv_vdiv_vx_i8mf4(__VA_ARGS__)
16304
#define vdiv_vv_i8mf2(...) __riscv_vdiv_vv_i8mf2(__VA_ARGS__)
16305
#define vdiv_vx_i8mf2(...) __riscv_vdiv_vx_i8mf2(__VA_ARGS__)
16306
#define vdiv_vv_i8m1(...) __riscv_vdiv_vv_i8m1(__VA_ARGS__)
16307
#define vdiv_vx_i8m1(...) __riscv_vdiv_vx_i8m1(__VA_ARGS__)
16308
#define vdiv_vv_i8m2(...) __riscv_vdiv_vv_i8m2(__VA_ARGS__)
16309
#define vdiv_vx_i8m2(...) __riscv_vdiv_vx_i8m2(__VA_ARGS__)
16310
#define vdiv_vv_i8m4(...) __riscv_vdiv_vv_i8m4(__VA_ARGS__)
16311
#define vdiv_vx_i8m4(...) __riscv_vdiv_vx_i8m4(__VA_ARGS__)
16312
#define vdiv_vv_i8m8(...) __riscv_vdiv_vv_i8m8(__VA_ARGS__)
16313
#define vdiv_vx_i8m8(...) __riscv_vdiv_vx_i8m8(__VA_ARGS__)
16314
#define vdiv_vv_i16mf4(...) __riscv_vdiv_vv_i16mf4(__VA_ARGS__)
16315
#define vdiv_vx_i16mf4(...) __riscv_vdiv_vx_i16mf4(__VA_ARGS__)
16316
#define vdiv_vv_i16mf2(...) __riscv_vdiv_vv_i16mf2(__VA_ARGS__)
16317
#define vdiv_vx_i16mf2(...) __riscv_vdiv_vx_i16mf2(__VA_ARGS__)
16318
#define vdiv_vv_i16m1(...) __riscv_vdiv_vv_i16m1(__VA_ARGS__)
16319
#define vdiv_vx_i16m1(...) __riscv_vdiv_vx_i16m1(__VA_ARGS__)
16320
#define vdiv_vv_i16m2(...) __riscv_vdiv_vv_i16m2(__VA_ARGS__)
16321
#define vdiv_vx_i16m2(...) __riscv_vdiv_vx_i16m2(__VA_ARGS__)
16322
#define vdiv_vv_i16m4(...) __riscv_vdiv_vv_i16m4(__VA_ARGS__)
16323
#define vdiv_vx_i16m4(...) __riscv_vdiv_vx_i16m4(__VA_ARGS__)
16324
#define vdiv_vv_i16m8(...) __riscv_vdiv_vv_i16m8(__VA_ARGS__)
16325
#define vdiv_vx_i16m8(...) __riscv_vdiv_vx_i16m8(__VA_ARGS__)
16326
#define vdiv_vv_i32mf2(...) __riscv_vdiv_vv_i32mf2(__VA_ARGS__)
16327
#define vdiv_vx_i32mf2(...) __riscv_vdiv_vx_i32mf2(__VA_ARGS__)
16328
#define vdiv_vv_i32m1(...) __riscv_vdiv_vv_i32m1(__VA_ARGS__)
16329
#define vdiv_vx_i32m1(...) __riscv_vdiv_vx_i32m1(__VA_ARGS__)
16330
#define vdiv_vv_i32m2(...) __riscv_vdiv_vv_i32m2(__VA_ARGS__)
16331
#define vdiv_vx_i32m2(...) __riscv_vdiv_vx_i32m2(__VA_ARGS__)
16332
#define vdiv_vv_i32m4(...) __riscv_vdiv_vv_i32m4(__VA_ARGS__)
16333
#define vdiv_vx_i32m4(...) __riscv_vdiv_vx_i32m4(__VA_ARGS__)
16334
#define vdiv_vv_i32m8(...) __riscv_vdiv_vv_i32m8(__VA_ARGS__)
16335
#define vdiv_vx_i32m8(...) __riscv_vdiv_vx_i32m8(__VA_ARGS__)
16336
#define vdiv_vv_i64m1(...) __riscv_vdiv_vv_i64m1(__VA_ARGS__)
16337
#define vdiv_vx_i64m1(...) __riscv_vdiv_vx_i64m1(__VA_ARGS__)
16338
#define vdiv_vv_i64m2(...) __riscv_vdiv_vv_i64m2(__VA_ARGS__)
16339
#define vdiv_vx_i64m2(...) __riscv_vdiv_vx_i64m2(__VA_ARGS__)
16340
#define vdiv_vv_i64m4(...) __riscv_vdiv_vv_i64m4(__VA_ARGS__)
16341
#define vdiv_vx_i64m4(...) __riscv_vdiv_vx_i64m4(__VA_ARGS__)
16342
#define vdiv_vv_i64m8(...) __riscv_vdiv_vv_i64m8(__VA_ARGS__)
16343
#define vdiv_vx_i64m8(...) __riscv_vdiv_vx_i64m8(__VA_ARGS__)
16344
#define vrem_vv_i8mf8(...) __riscv_vrem_vv_i8mf8(__VA_ARGS__)
16345
#define vrem_vx_i8mf8(...) __riscv_vrem_vx_i8mf8(__VA_ARGS__)
16346
#define vrem_vv_i8mf4(...) __riscv_vrem_vv_i8mf4(__VA_ARGS__)
16347
#define vrem_vx_i8mf4(...) __riscv_vrem_vx_i8mf4(__VA_ARGS__)
16348
#define vrem_vv_i8mf2(...) __riscv_vrem_vv_i8mf2(__VA_ARGS__)
16349
#define vrem_vx_i8mf2(...) __riscv_vrem_vx_i8mf2(__VA_ARGS__)
16350
#define vrem_vv_i8m1(...) __riscv_vrem_vv_i8m1(__VA_ARGS__)
16351
#define vrem_vx_i8m1(...) __riscv_vrem_vx_i8m1(__VA_ARGS__)
16352
#define vrem_vv_i8m2(...) __riscv_vrem_vv_i8m2(__VA_ARGS__)
16353
#define vrem_vx_i8m2(...) __riscv_vrem_vx_i8m2(__VA_ARGS__)
16354
#define vrem_vv_i8m4(...) __riscv_vrem_vv_i8m4(__VA_ARGS__)
16355
#define vrem_vx_i8m4(...) __riscv_vrem_vx_i8m4(__VA_ARGS__)
16356
#define vrem_vv_i8m8(...) __riscv_vrem_vv_i8m8(__VA_ARGS__)
16357
#define vrem_vx_i8m8(...) __riscv_vrem_vx_i8m8(__VA_ARGS__)
16358
#define vrem_vv_i16mf4(...) __riscv_vrem_vv_i16mf4(__VA_ARGS__)
16359
#define vrem_vx_i16mf4(...) __riscv_vrem_vx_i16mf4(__VA_ARGS__)
16360
#define vrem_vv_i16mf2(...) __riscv_vrem_vv_i16mf2(__VA_ARGS__)
16361
#define vrem_vx_i16mf2(...) __riscv_vrem_vx_i16mf2(__VA_ARGS__)
16362
#define vrem_vv_i16m1(...) __riscv_vrem_vv_i16m1(__VA_ARGS__)
16363
#define vrem_vx_i16m1(...) __riscv_vrem_vx_i16m1(__VA_ARGS__)
16364
#define vrem_vv_i16m2(...) __riscv_vrem_vv_i16m2(__VA_ARGS__)
16365
#define vrem_vx_i16m2(...) __riscv_vrem_vx_i16m2(__VA_ARGS__)
16366
#define vrem_vv_i16m4(...) __riscv_vrem_vv_i16m4(__VA_ARGS__)
16367
#define vrem_vx_i16m4(...) __riscv_vrem_vx_i16m4(__VA_ARGS__)
16368
#define vrem_vv_i16m8(...) __riscv_vrem_vv_i16m8(__VA_ARGS__)
16369
#define vrem_vx_i16m8(...) __riscv_vrem_vx_i16m8(__VA_ARGS__)
16370
#define vrem_vv_i32mf2(...) __riscv_vrem_vv_i32mf2(__VA_ARGS__)
16371
#define vrem_vx_i32mf2(...) __riscv_vrem_vx_i32mf2(__VA_ARGS__)
16372
#define vrem_vv_i32m1(...) __riscv_vrem_vv_i32m1(__VA_ARGS__)
16373
#define vrem_vx_i32m1(...) __riscv_vrem_vx_i32m1(__VA_ARGS__)
16374
#define vrem_vv_i32m2(...) __riscv_vrem_vv_i32m2(__VA_ARGS__)
16375
#define vrem_vx_i32m2(...) __riscv_vrem_vx_i32m2(__VA_ARGS__)
16376
#define vrem_vv_i32m4(...) __riscv_vrem_vv_i32m4(__VA_ARGS__)
16377
#define vrem_vx_i32m4(...) __riscv_vrem_vx_i32m4(__VA_ARGS__)
16378
#define vrem_vv_i32m8(...) __riscv_vrem_vv_i32m8(__VA_ARGS__)
16379
#define vrem_vx_i32m8(...) __riscv_vrem_vx_i32m8(__VA_ARGS__)
16380
#define vrem_vv_i64m1(...) __riscv_vrem_vv_i64m1(__VA_ARGS__)
16381
#define vrem_vx_i64m1(...) __riscv_vrem_vx_i64m1(__VA_ARGS__)
16382
#define vrem_vv_i64m2(...) __riscv_vrem_vv_i64m2(__VA_ARGS__)
16383
#define vrem_vx_i64m2(...) __riscv_vrem_vx_i64m2(__VA_ARGS__)
16384
#define vrem_vv_i64m4(...) __riscv_vrem_vv_i64m4(__VA_ARGS__)
16385
#define vrem_vx_i64m4(...) __riscv_vrem_vx_i64m4(__VA_ARGS__)
16386
#define vrem_vv_i64m8(...) __riscv_vrem_vv_i64m8(__VA_ARGS__)
16387
#define vrem_vx_i64m8(...) __riscv_vrem_vx_i64m8(__VA_ARGS__)
16388
#define vdivu_vv_u8mf8(...) __riscv_vdivu_vv_u8mf8(__VA_ARGS__)
16389
#define vdivu_vx_u8mf8(...) __riscv_vdivu_vx_u8mf8(__VA_ARGS__)
16390
#define vdivu_vv_u8mf4(...) __riscv_vdivu_vv_u8mf4(__VA_ARGS__)
16391
#define vdivu_vx_u8mf4(...) __riscv_vdivu_vx_u8mf4(__VA_ARGS__)
16392
#define vdivu_vv_u8mf2(...) __riscv_vdivu_vv_u8mf2(__VA_ARGS__)
16393
#define vdivu_vx_u8mf2(...) __riscv_vdivu_vx_u8mf2(__VA_ARGS__)
16394
#define vdivu_vv_u8m1(...) __riscv_vdivu_vv_u8m1(__VA_ARGS__)
16395
#define vdivu_vx_u8m1(...) __riscv_vdivu_vx_u8m1(__VA_ARGS__)
16396
#define vdivu_vv_u8m2(...) __riscv_vdivu_vv_u8m2(__VA_ARGS__)
16397
#define vdivu_vx_u8m2(...) __riscv_vdivu_vx_u8m2(__VA_ARGS__)
16398
#define vdivu_vv_u8m4(...) __riscv_vdivu_vv_u8m4(__VA_ARGS__)
16399
#define vdivu_vx_u8m4(...) __riscv_vdivu_vx_u8m4(__VA_ARGS__)
16400
#define vdivu_vv_u8m8(...) __riscv_vdivu_vv_u8m8(__VA_ARGS__)
16401
#define vdivu_vx_u8m8(...) __riscv_vdivu_vx_u8m8(__VA_ARGS__)
16402
#define vdivu_vv_u16mf4(...) __riscv_vdivu_vv_u16mf4(__VA_ARGS__)
16403
#define vdivu_vx_u16mf4(...) __riscv_vdivu_vx_u16mf4(__VA_ARGS__)
16404
#define vdivu_vv_u16mf2(...) __riscv_vdivu_vv_u16mf2(__VA_ARGS__)
16405
#define vdivu_vx_u16mf2(...) __riscv_vdivu_vx_u16mf2(__VA_ARGS__)
16406
#define vdivu_vv_u16m1(...) __riscv_vdivu_vv_u16m1(__VA_ARGS__)
16407
#define vdivu_vx_u16m1(...) __riscv_vdivu_vx_u16m1(__VA_ARGS__)
16408
#define vdivu_vv_u16m2(...) __riscv_vdivu_vv_u16m2(__VA_ARGS__)
16409
#define vdivu_vx_u16m2(...) __riscv_vdivu_vx_u16m2(__VA_ARGS__)
16410
#define vdivu_vv_u16m4(...) __riscv_vdivu_vv_u16m4(__VA_ARGS__)
16411
#define vdivu_vx_u16m4(...) __riscv_vdivu_vx_u16m4(__VA_ARGS__)
16412
#define vdivu_vv_u16m8(...) __riscv_vdivu_vv_u16m8(__VA_ARGS__)
16413
#define vdivu_vx_u16m8(...) __riscv_vdivu_vx_u16m8(__VA_ARGS__)
16414
#define vdivu_vv_u32mf2(...) __riscv_vdivu_vv_u32mf2(__VA_ARGS__)
16415
#define vdivu_vx_u32mf2(...) __riscv_vdivu_vx_u32mf2(__VA_ARGS__)
16416
#define vdivu_vv_u32m1(...) __riscv_vdivu_vv_u32m1(__VA_ARGS__)
16417
#define vdivu_vx_u32m1(...) __riscv_vdivu_vx_u32m1(__VA_ARGS__)
16418
#define vdivu_vv_u32m2(...) __riscv_vdivu_vv_u32m2(__VA_ARGS__)
16419
#define vdivu_vx_u32m2(...) __riscv_vdivu_vx_u32m2(__VA_ARGS__)
16420
#define vdivu_vv_u32m4(...) __riscv_vdivu_vv_u32m4(__VA_ARGS__)
16421
#define vdivu_vx_u32m4(...) __riscv_vdivu_vx_u32m4(__VA_ARGS__)
16422
#define vdivu_vv_u32m8(...) __riscv_vdivu_vv_u32m8(__VA_ARGS__)
16423
#define vdivu_vx_u32m8(...) __riscv_vdivu_vx_u32m8(__VA_ARGS__)
16424
#define vdivu_vv_u64m1(...) __riscv_vdivu_vv_u64m1(__VA_ARGS__)
16425
#define vdivu_vx_u64m1(...) __riscv_vdivu_vx_u64m1(__VA_ARGS__)
16426
#define vdivu_vv_u64m2(...) __riscv_vdivu_vv_u64m2(__VA_ARGS__)
16427
#define vdivu_vx_u64m2(...) __riscv_vdivu_vx_u64m2(__VA_ARGS__)
16428
#define vdivu_vv_u64m4(...) __riscv_vdivu_vv_u64m4(__VA_ARGS__)
16429
#define vdivu_vx_u64m4(...) __riscv_vdivu_vx_u64m4(__VA_ARGS__)
16430
#define vdivu_vv_u64m8(...) __riscv_vdivu_vv_u64m8(__VA_ARGS__)
16431
#define vdivu_vx_u64m8(...) __riscv_vdivu_vx_u64m8(__VA_ARGS__)
16432
#define vremu_vv_u8mf8(...) __riscv_vremu_vv_u8mf8(__VA_ARGS__)
16433
#define vremu_vx_u8mf8(...) __riscv_vremu_vx_u8mf8(__VA_ARGS__)
16434
#define vremu_vv_u8mf4(...) __riscv_vremu_vv_u8mf4(__VA_ARGS__)
16435
#define vremu_vx_u8mf4(...) __riscv_vremu_vx_u8mf4(__VA_ARGS__)
16436
#define vremu_vv_u8mf2(...) __riscv_vremu_vv_u8mf2(__VA_ARGS__)
16437
#define vremu_vx_u8mf2(...) __riscv_vremu_vx_u8mf2(__VA_ARGS__)
16438
#define vremu_vv_u8m1(...) __riscv_vremu_vv_u8m1(__VA_ARGS__)
16439
#define vremu_vx_u8m1(...) __riscv_vremu_vx_u8m1(__VA_ARGS__)
16440
#define vremu_vv_u8m2(...) __riscv_vremu_vv_u8m2(__VA_ARGS__)
16441
#define vremu_vx_u8m2(...) __riscv_vremu_vx_u8m2(__VA_ARGS__)
16442
#define vremu_vv_u8m4(...) __riscv_vremu_vv_u8m4(__VA_ARGS__)
16443
#define vremu_vx_u8m4(...) __riscv_vremu_vx_u8m4(__VA_ARGS__)
16444
#define vremu_vv_u8m8(...) __riscv_vremu_vv_u8m8(__VA_ARGS__)
16445
#define vremu_vx_u8m8(...) __riscv_vremu_vx_u8m8(__VA_ARGS__)
16446
#define vremu_vv_u16mf4(...) __riscv_vremu_vv_u16mf4(__VA_ARGS__)
16447
#define vremu_vx_u16mf4(...) __riscv_vremu_vx_u16mf4(__VA_ARGS__)
16448
#define vremu_vv_u16mf2(...) __riscv_vremu_vv_u16mf2(__VA_ARGS__)
16449
#define vremu_vx_u16mf2(...) __riscv_vremu_vx_u16mf2(__VA_ARGS__)
16450
#define vremu_vv_u16m1(...) __riscv_vremu_vv_u16m1(__VA_ARGS__)
16451
#define vremu_vx_u16m1(...) __riscv_vremu_vx_u16m1(__VA_ARGS__)
16452
#define vremu_vv_u16m2(...) __riscv_vremu_vv_u16m2(__VA_ARGS__)
16453
#define vremu_vx_u16m2(...) __riscv_vremu_vx_u16m2(__VA_ARGS__)
16454
#define vremu_vv_u16m4(...) __riscv_vremu_vv_u16m4(__VA_ARGS__)
16455
#define vremu_vx_u16m4(...) __riscv_vremu_vx_u16m4(__VA_ARGS__)
16456
#define vremu_vv_u16m8(...) __riscv_vremu_vv_u16m8(__VA_ARGS__)
16457
#define vremu_vx_u16m8(...) __riscv_vremu_vx_u16m8(__VA_ARGS__)
16458
#define vremu_vv_u32mf2(...) __riscv_vremu_vv_u32mf2(__VA_ARGS__)
16459
#define vremu_vx_u32mf2(...) __riscv_vremu_vx_u32mf2(__VA_ARGS__)
16460
#define vremu_vv_u32m1(...) __riscv_vremu_vv_u32m1(__VA_ARGS__)
16461
#define vremu_vx_u32m1(...) __riscv_vremu_vx_u32m1(__VA_ARGS__)
16462
#define vremu_vv_u32m2(...) __riscv_vremu_vv_u32m2(__VA_ARGS__)
16463
#define vremu_vx_u32m2(...) __riscv_vremu_vx_u32m2(__VA_ARGS__)
16464
#define vremu_vv_u32m4(...) __riscv_vremu_vv_u32m4(__VA_ARGS__)
16465
#define vremu_vx_u32m4(...) __riscv_vremu_vx_u32m4(__VA_ARGS__)
16466
#define vremu_vv_u32m8(...) __riscv_vremu_vv_u32m8(__VA_ARGS__)
16467
#define vremu_vx_u32m8(...) __riscv_vremu_vx_u32m8(__VA_ARGS__)
16468
#define vremu_vv_u64m1(...) __riscv_vremu_vv_u64m1(__VA_ARGS__)
16469
#define vremu_vx_u64m1(...) __riscv_vremu_vx_u64m1(__VA_ARGS__)
16470
#define vremu_vv_u64m2(...) __riscv_vremu_vv_u64m2(__VA_ARGS__)
16471
#define vremu_vx_u64m2(...) __riscv_vremu_vx_u64m2(__VA_ARGS__)
16472
#define vremu_vv_u64m4(...) __riscv_vremu_vv_u64m4(__VA_ARGS__)
16473
#define vremu_vx_u64m4(...) __riscv_vremu_vx_u64m4(__VA_ARGS__)
16474
#define vremu_vv_u64m8(...) __riscv_vremu_vv_u64m8(__VA_ARGS__)
16475
#define vremu_vx_u64m8(...) __riscv_vremu_vx_u64m8(__VA_ARGS__)
16476
// masked functions
16477
#define vdiv_vv_i8mf8_m(...) __riscv_vdiv_vv_i8mf8_tumu(__VA_ARGS__)
16478
#define vdiv_vx_i8mf8_m(...) __riscv_vdiv_vx_i8mf8_tumu(__VA_ARGS__)
16479
#define vdiv_vv_i8mf4_m(...) __riscv_vdiv_vv_i8mf4_tumu(__VA_ARGS__)
16480
#define vdiv_vx_i8mf4_m(...) __riscv_vdiv_vx_i8mf4_tumu(__VA_ARGS__)
16481
#define vdiv_vv_i8mf2_m(...) __riscv_vdiv_vv_i8mf2_tumu(__VA_ARGS__)
16482
#define vdiv_vx_i8mf2_m(...) __riscv_vdiv_vx_i8mf2_tumu(__VA_ARGS__)
16483
#define vdiv_vv_i8m1_m(...) __riscv_vdiv_vv_i8m1_tumu(__VA_ARGS__)
16484
#define vdiv_vx_i8m1_m(...) __riscv_vdiv_vx_i8m1_tumu(__VA_ARGS__)
16485
#define vdiv_vv_i8m2_m(...) __riscv_vdiv_vv_i8m2_tumu(__VA_ARGS__)
16486
#define vdiv_vx_i8m2_m(...) __riscv_vdiv_vx_i8m2_tumu(__VA_ARGS__)
16487
#define vdiv_vv_i8m4_m(...) __riscv_vdiv_vv_i8m4_tumu(__VA_ARGS__)
16488
#define vdiv_vx_i8m4_m(...) __riscv_vdiv_vx_i8m4_tumu(__VA_ARGS__)
16489
#define vdiv_vv_i8m8_m(...) __riscv_vdiv_vv_i8m8_tumu(__VA_ARGS__)
16490
#define vdiv_vx_i8m8_m(...) __riscv_vdiv_vx_i8m8_tumu(__VA_ARGS__)
16491
#define vdiv_vv_i16mf4_m(...) __riscv_vdiv_vv_i16mf4_tumu(__VA_ARGS__)
16492
#define vdiv_vx_i16mf4_m(...) __riscv_vdiv_vx_i16mf4_tumu(__VA_ARGS__)
16493
#define vdiv_vv_i16mf2_m(...) __riscv_vdiv_vv_i16mf2_tumu(__VA_ARGS__)
16494
#define vdiv_vx_i16mf2_m(...) __riscv_vdiv_vx_i16mf2_tumu(__VA_ARGS__)
16495
#define vdiv_vv_i16m1_m(...) __riscv_vdiv_vv_i16m1_tumu(__VA_ARGS__)
16496
#define vdiv_vx_i16m1_m(...) __riscv_vdiv_vx_i16m1_tumu(__VA_ARGS__)
16497
#define vdiv_vv_i16m2_m(...) __riscv_vdiv_vv_i16m2_tumu(__VA_ARGS__)
16498
#define vdiv_vx_i16m2_m(...) __riscv_vdiv_vx_i16m2_tumu(__VA_ARGS__)
16499
#define vdiv_vv_i16m4_m(...) __riscv_vdiv_vv_i16m4_tumu(__VA_ARGS__)
16500
#define vdiv_vx_i16m4_m(...) __riscv_vdiv_vx_i16m4_tumu(__VA_ARGS__)
16501
#define vdiv_vv_i16m8_m(...) __riscv_vdiv_vv_i16m8_tumu(__VA_ARGS__)
16502
#define vdiv_vx_i16m8_m(...) __riscv_vdiv_vx_i16m8_tumu(__VA_ARGS__)
16503
#define vdiv_vv_i32mf2_m(...) __riscv_vdiv_vv_i32mf2_tumu(__VA_ARGS__)
16504
#define vdiv_vx_i32mf2_m(...) __riscv_vdiv_vx_i32mf2_tumu(__VA_ARGS__)
16505
#define vdiv_vv_i32m1_m(...) __riscv_vdiv_vv_i32m1_tumu(__VA_ARGS__)
16506
#define vdiv_vx_i32m1_m(...) __riscv_vdiv_vx_i32m1_tumu(__VA_ARGS__)
16507
#define vdiv_vv_i32m2_m(...) __riscv_vdiv_vv_i32m2_tumu(__VA_ARGS__)
16508
#define vdiv_vx_i32m2_m(...) __riscv_vdiv_vx_i32m2_tumu(__VA_ARGS__)
16509
#define vdiv_vv_i32m4_m(...) __riscv_vdiv_vv_i32m4_tumu(__VA_ARGS__)
16510
#define vdiv_vx_i32m4_m(...) __riscv_vdiv_vx_i32m4_tumu(__VA_ARGS__)
16511
#define vdiv_vv_i32m8_m(...) __riscv_vdiv_vv_i32m8_tumu(__VA_ARGS__)
16512
#define vdiv_vx_i32m8_m(...) __riscv_vdiv_vx_i32m8_tumu(__VA_ARGS__)
16513
#define vdiv_vv_i64m1_m(...) __riscv_vdiv_vv_i64m1_tumu(__VA_ARGS__)
16514
#define vdiv_vx_i64m1_m(...) __riscv_vdiv_vx_i64m1_tumu(__VA_ARGS__)
16515
#define vdiv_vv_i64m2_m(...) __riscv_vdiv_vv_i64m2_tumu(__VA_ARGS__)
16516
#define vdiv_vx_i64m2_m(...) __riscv_vdiv_vx_i64m2_tumu(__VA_ARGS__)
16517
#define vdiv_vv_i64m4_m(...) __riscv_vdiv_vv_i64m4_tumu(__VA_ARGS__)
16518
#define vdiv_vx_i64m4_m(...) __riscv_vdiv_vx_i64m4_tumu(__VA_ARGS__)
16519
#define vdiv_vv_i64m8_m(...) __riscv_vdiv_vv_i64m8_tumu(__VA_ARGS__)
16520
#define vdiv_vx_i64m8_m(...) __riscv_vdiv_vx_i64m8_tumu(__VA_ARGS__)
16521
#define vrem_vv_i8mf8_m(...) __riscv_vrem_vv_i8mf8_tumu(__VA_ARGS__)
16522
#define vrem_vx_i8mf8_m(...) __riscv_vrem_vx_i8mf8_tumu(__VA_ARGS__)
16523
#define vrem_vv_i8mf4_m(...) __riscv_vrem_vv_i8mf4_tumu(__VA_ARGS__)
16524
#define vrem_vx_i8mf4_m(...) __riscv_vrem_vx_i8mf4_tumu(__VA_ARGS__)
16525
#define vrem_vv_i8mf2_m(...) __riscv_vrem_vv_i8mf2_tumu(__VA_ARGS__)
16526
#define vrem_vx_i8mf2_m(...) __riscv_vrem_vx_i8mf2_tumu(__VA_ARGS__)
16527
#define vrem_vv_i8m1_m(...) __riscv_vrem_vv_i8m1_tumu(__VA_ARGS__)
16528
#define vrem_vx_i8m1_m(...) __riscv_vrem_vx_i8m1_tumu(__VA_ARGS__)
16529
#define vrem_vv_i8m2_m(...) __riscv_vrem_vv_i8m2_tumu(__VA_ARGS__)
16530
#define vrem_vx_i8m2_m(...) __riscv_vrem_vx_i8m2_tumu(__VA_ARGS__)
16531
#define vrem_vv_i8m4_m(...) __riscv_vrem_vv_i8m4_tumu(__VA_ARGS__)
16532
#define vrem_vx_i8m4_m(...) __riscv_vrem_vx_i8m4_tumu(__VA_ARGS__)
16533
#define vrem_vv_i8m8_m(...) __riscv_vrem_vv_i8m8_tumu(__VA_ARGS__)
16534
#define vrem_vx_i8m8_m(...) __riscv_vrem_vx_i8m8_tumu(__VA_ARGS__)
16535
#define vrem_vv_i16mf4_m(...) __riscv_vrem_vv_i16mf4_tumu(__VA_ARGS__)
16536
#define vrem_vx_i16mf4_m(...) __riscv_vrem_vx_i16mf4_tumu(__VA_ARGS__)
16537
#define vrem_vv_i16mf2_m(...) __riscv_vrem_vv_i16mf2_tumu(__VA_ARGS__)
16538
#define vrem_vx_i16mf2_m(...) __riscv_vrem_vx_i16mf2_tumu(__VA_ARGS__)
16539
#define vrem_vv_i16m1_m(...) __riscv_vrem_vv_i16m1_tumu(__VA_ARGS__)
16540
#define vrem_vx_i16m1_m(...) __riscv_vrem_vx_i16m1_tumu(__VA_ARGS__)
16541
#define vrem_vv_i16m2_m(...) __riscv_vrem_vv_i16m2_tumu(__VA_ARGS__)
16542
#define vrem_vx_i16m2_m(...) __riscv_vrem_vx_i16m2_tumu(__VA_ARGS__)
16543
#define vrem_vv_i16m4_m(...) __riscv_vrem_vv_i16m4_tumu(__VA_ARGS__)
16544
#define vrem_vx_i16m4_m(...) __riscv_vrem_vx_i16m4_tumu(__VA_ARGS__)
16545
#define vrem_vv_i16m8_m(...) __riscv_vrem_vv_i16m8_tumu(__VA_ARGS__)
16546
#define vrem_vx_i16m8_m(...) __riscv_vrem_vx_i16m8_tumu(__VA_ARGS__)
16547
#define vrem_vv_i32mf2_m(...) __riscv_vrem_vv_i32mf2_tumu(__VA_ARGS__)
16548
#define vrem_vx_i32mf2_m(...) __riscv_vrem_vx_i32mf2_tumu(__VA_ARGS__)
16549
#define vrem_vv_i32m1_m(...) __riscv_vrem_vv_i32m1_tumu(__VA_ARGS__)
16550
#define vrem_vx_i32m1_m(...) __riscv_vrem_vx_i32m1_tumu(__VA_ARGS__)
16551
#define vrem_vv_i32m2_m(...) __riscv_vrem_vv_i32m2_tumu(__VA_ARGS__)
16552
#define vrem_vx_i32m2_m(...) __riscv_vrem_vx_i32m2_tumu(__VA_ARGS__)
16553
#define vrem_vv_i32m4_m(...) __riscv_vrem_vv_i32m4_tumu(__VA_ARGS__)
16554
#define vrem_vx_i32m4_m(...) __riscv_vrem_vx_i32m4_tumu(__VA_ARGS__)
16555
#define vrem_vv_i32m8_m(...) __riscv_vrem_vv_i32m8_tumu(__VA_ARGS__)
16556
#define vrem_vx_i32m8_m(...) __riscv_vrem_vx_i32m8_tumu(__VA_ARGS__)
16557
#define vrem_vv_i64m1_m(...) __riscv_vrem_vv_i64m1_tumu(__VA_ARGS__)
16558
#define vrem_vx_i64m1_m(...) __riscv_vrem_vx_i64m1_tumu(__VA_ARGS__)
16559
#define vrem_vv_i64m2_m(...) __riscv_vrem_vv_i64m2_tumu(__VA_ARGS__)
16560
#define vrem_vx_i64m2_m(...) __riscv_vrem_vx_i64m2_tumu(__VA_ARGS__)
16561
#define vrem_vv_i64m4_m(...) __riscv_vrem_vv_i64m4_tumu(__VA_ARGS__)
16562
#define vrem_vx_i64m4_m(...) __riscv_vrem_vx_i64m4_tumu(__VA_ARGS__)
16563
#define vrem_vv_i64m8_m(...) __riscv_vrem_vv_i64m8_tumu(__VA_ARGS__)
16564
#define vrem_vx_i64m8_m(...) __riscv_vrem_vx_i64m8_tumu(__VA_ARGS__)
16565
#define vdivu_vv_u8mf8_m(...) __riscv_vdivu_vv_u8mf8_tumu(__VA_ARGS__)
16566
#define vdivu_vx_u8mf8_m(...) __riscv_vdivu_vx_u8mf8_tumu(__VA_ARGS__)
16567
#define vdivu_vv_u8mf4_m(...) __riscv_vdivu_vv_u8mf4_tumu(__VA_ARGS__)
16568
#define vdivu_vx_u8mf4_m(...) __riscv_vdivu_vx_u8mf4_tumu(__VA_ARGS__)
16569
#define vdivu_vv_u8mf2_m(...) __riscv_vdivu_vv_u8mf2_tumu(__VA_ARGS__)
16570
#define vdivu_vx_u8mf2_m(...) __riscv_vdivu_vx_u8mf2_tumu(__VA_ARGS__)
16571
#define vdivu_vv_u8m1_m(...) __riscv_vdivu_vv_u8m1_tumu(__VA_ARGS__)
16572
#define vdivu_vx_u8m1_m(...) __riscv_vdivu_vx_u8m1_tumu(__VA_ARGS__)
16573
#define vdivu_vv_u8m2_m(...) __riscv_vdivu_vv_u8m2_tumu(__VA_ARGS__)
16574
#define vdivu_vx_u8m2_m(...) __riscv_vdivu_vx_u8m2_tumu(__VA_ARGS__)
16575
#define vdivu_vv_u8m4_m(...) __riscv_vdivu_vv_u8m4_tumu(__VA_ARGS__)
16576
#define vdivu_vx_u8m4_m(...) __riscv_vdivu_vx_u8m4_tumu(__VA_ARGS__)
16577
#define vdivu_vv_u8m8_m(...) __riscv_vdivu_vv_u8m8_tumu(__VA_ARGS__)
16578
#define vdivu_vx_u8m8_m(...) __riscv_vdivu_vx_u8m8_tumu(__VA_ARGS__)
16579
#define vdivu_vv_u16mf4_m(...) __riscv_vdivu_vv_u16mf4_tumu(__VA_ARGS__)
16580
#define vdivu_vx_u16mf4_m(...) __riscv_vdivu_vx_u16mf4_tumu(__VA_ARGS__)
16581
#define vdivu_vv_u16mf2_m(...) __riscv_vdivu_vv_u16mf2_tumu(__VA_ARGS__)
16582
#define vdivu_vx_u16mf2_m(...) __riscv_vdivu_vx_u16mf2_tumu(__VA_ARGS__)
16583
#define vdivu_vv_u16m1_m(...) __riscv_vdivu_vv_u16m1_tumu(__VA_ARGS__)
16584
#define vdivu_vx_u16m1_m(...) __riscv_vdivu_vx_u16m1_tumu(__VA_ARGS__)
16585
#define vdivu_vv_u16m2_m(...) __riscv_vdivu_vv_u16m2_tumu(__VA_ARGS__)
16586
#define vdivu_vx_u16m2_m(...) __riscv_vdivu_vx_u16m2_tumu(__VA_ARGS__)
16587
#define vdivu_vv_u16m4_m(...) __riscv_vdivu_vv_u16m4_tumu(__VA_ARGS__)
16588
#define vdivu_vx_u16m4_m(...) __riscv_vdivu_vx_u16m4_tumu(__VA_ARGS__)
16589
#define vdivu_vv_u16m8_m(...) __riscv_vdivu_vv_u16m8_tumu(__VA_ARGS__)
16590
#define vdivu_vx_u16m8_m(...) __riscv_vdivu_vx_u16m8_tumu(__VA_ARGS__)
16591
#define vdivu_vv_u32mf2_m(...) __riscv_vdivu_vv_u32mf2_tumu(__VA_ARGS__)
16592
#define vdivu_vx_u32mf2_m(...) __riscv_vdivu_vx_u32mf2_tumu(__VA_ARGS__)
16593
#define vdivu_vv_u32m1_m(...) __riscv_vdivu_vv_u32m1_tumu(__VA_ARGS__)
16594
#define vdivu_vx_u32m1_m(...) __riscv_vdivu_vx_u32m1_tumu(__VA_ARGS__)
16595
#define vdivu_vv_u32m2_m(...) __riscv_vdivu_vv_u32m2_tumu(__VA_ARGS__)
16596
#define vdivu_vx_u32m2_m(...) __riscv_vdivu_vx_u32m2_tumu(__VA_ARGS__)
16597
#define vdivu_vv_u32m4_m(...) __riscv_vdivu_vv_u32m4_tumu(__VA_ARGS__)
16598
#define vdivu_vx_u32m4_m(...) __riscv_vdivu_vx_u32m4_tumu(__VA_ARGS__)
16599
#define vdivu_vv_u32m8_m(...) __riscv_vdivu_vv_u32m8_tumu(__VA_ARGS__)
16600
#define vdivu_vx_u32m8_m(...) __riscv_vdivu_vx_u32m8_tumu(__VA_ARGS__)
16601
#define vdivu_vv_u64m1_m(...) __riscv_vdivu_vv_u64m1_tumu(__VA_ARGS__)
16602
#define vdivu_vx_u64m1_m(...) __riscv_vdivu_vx_u64m1_tumu(__VA_ARGS__)
16603
#define vdivu_vv_u64m2_m(...) __riscv_vdivu_vv_u64m2_tumu(__VA_ARGS__)
16604
#define vdivu_vx_u64m2_m(...) __riscv_vdivu_vx_u64m2_tumu(__VA_ARGS__)
16605
#define vdivu_vv_u64m4_m(...) __riscv_vdivu_vv_u64m4_tumu(__VA_ARGS__)
16606
#define vdivu_vx_u64m4_m(...) __riscv_vdivu_vx_u64m4_tumu(__VA_ARGS__)
16607
#define vdivu_vv_u64m8_m(...) __riscv_vdivu_vv_u64m8_tumu(__VA_ARGS__)
16608
#define vdivu_vx_u64m8_m(...) __riscv_vdivu_vx_u64m8_tumu(__VA_ARGS__)
16609
#define vremu_vv_u8mf8_m(...) __riscv_vremu_vv_u8mf8_tumu(__VA_ARGS__)
16610
#define vremu_vx_u8mf8_m(...) __riscv_vremu_vx_u8mf8_tumu(__VA_ARGS__)
16611
#define vremu_vv_u8mf4_m(...) __riscv_vremu_vv_u8mf4_tumu(__VA_ARGS__)
16612
#define vremu_vx_u8mf4_m(...) __riscv_vremu_vx_u8mf4_tumu(__VA_ARGS__)
16613
#define vremu_vv_u8mf2_m(...) __riscv_vremu_vv_u8mf2_tumu(__VA_ARGS__)
16614
#define vremu_vx_u8mf2_m(...) __riscv_vremu_vx_u8mf2_tumu(__VA_ARGS__)
16615
#define vremu_vv_u8m1_m(...) __riscv_vremu_vv_u8m1_tumu(__VA_ARGS__)
16616
#define vremu_vx_u8m1_m(...) __riscv_vremu_vx_u8m1_tumu(__VA_ARGS__)
16617
#define vremu_vv_u8m2_m(...) __riscv_vremu_vv_u8m2_tumu(__VA_ARGS__)
16618
#define vremu_vx_u8m2_m(...) __riscv_vremu_vx_u8m2_tumu(__VA_ARGS__)
16619
#define vremu_vv_u8m4_m(...) __riscv_vremu_vv_u8m4_tumu(__VA_ARGS__)
16620
#define vremu_vx_u8m4_m(...) __riscv_vremu_vx_u8m4_tumu(__VA_ARGS__)
16621
#define vremu_vv_u8m8_m(...) __riscv_vremu_vv_u8m8_tumu(__VA_ARGS__)
16622
#define vremu_vx_u8m8_m(...) __riscv_vremu_vx_u8m8_tumu(__VA_ARGS__)
16623
#define vremu_vv_u16mf4_m(...) __riscv_vremu_vv_u16mf4_tumu(__VA_ARGS__)
16624
#define vremu_vx_u16mf4_m(...) __riscv_vremu_vx_u16mf4_tumu(__VA_ARGS__)
16625
#define vremu_vv_u16mf2_m(...) __riscv_vremu_vv_u16mf2_tumu(__VA_ARGS__)
16626
#define vremu_vx_u16mf2_m(...) __riscv_vremu_vx_u16mf2_tumu(__VA_ARGS__)
16627
#define vremu_vv_u16m1_m(...) __riscv_vremu_vv_u16m1_tumu(__VA_ARGS__)
16628
#define vremu_vx_u16m1_m(...) __riscv_vremu_vx_u16m1_tumu(__VA_ARGS__)
16629
#define vremu_vv_u16m2_m(...) __riscv_vremu_vv_u16m2_tumu(__VA_ARGS__)
16630
#define vremu_vx_u16m2_m(...) __riscv_vremu_vx_u16m2_tumu(__VA_ARGS__)
16631
#define vremu_vv_u16m4_m(...) __riscv_vremu_vv_u16m4_tumu(__VA_ARGS__)
16632
#define vremu_vx_u16m4_m(...) __riscv_vremu_vx_u16m4_tumu(__VA_ARGS__)
16633
#define vremu_vv_u16m8_m(...) __riscv_vremu_vv_u16m8_tumu(__VA_ARGS__)
16634
#define vremu_vx_u16m8_m(...) __riscv_vremu_vx_u16m8_tumu(__VA_ARGS__)
16635
#define vremu_vv_u32mf2_m(...) __riscv_vremu_vv_u32mf2_tumu(__VA_ARGS__)
16636
#define vremu_vx_u32mf2_m(...) __riscv_vremu_vx_u32mf2_tumu(__VA_ARGS__)
16637
#define vremu_vv_u32m1_m(...) __riscv_vremu_vv_u32m1_tumu(__VA_ARGS__)
16638
#define vremu_vx_u32m1_m(...) __riscv_vremu_vx_u32m1_tumu(__VA_ARGS__)
16639
#define vremu_vv_u32m2_m(...) __riscv_vremu_vv_u32m2_tumu(__VA_ARGS__)
16640
#define vremu_vx_u32m2_m(...) __riscv_vremu_vx_u32m2_tumu(__VA_ARGS__)
16641
#define vremu_vv_u32m4_m(...) __riscv_vremu_vv_u32m4_tumu(__VA_ARGS__)
16642
#define vremu_vx_u32m4_m(...) __riscv_vremu_vx_u32m4_tumu(__VA_ARGS__)
16643
#define vremu_vv_u32m8_m(...) __riscv_vremu_vv_u32m8_tumu(__VA_ARGS__)
16644
#define vremu_vx_u32m8_m(...) __riscv_vremu_vx_u32m8_tumu(__VA_ARGS__)
16645
#define vremu_vv_u64m1_m(...) __riscv_vremu_vv_u64m1_tumu(__VA_ARGS__)
16646
#define vremu_vx_u64m1_m(...) __riscv_vremu_vx_u64m1_tumu(__VA_ARGS__)
16647
#define vremu_vv_u64m2_m(...) __riscv_vremu_vv_u64m2_tumu(__VA_ARGS__)
16648
#define vremu_vx_u64m2_m(...) __riscv_vremu_vx_u64m2_tumu(__VA_ARGS__)
16649
#define vremu_vv_u64m4_m(...) __riscv_vremu_vv_u64m4_tumu(__VA_ARGS__)
16650
#define vremu_vx_u64m4_m(...) __riscv_vremu_vx_u64m4_tumu(__VA_ARGS__)
16651
#define vremu_vv_u64m8_m(...) __riscv_vremu_vv_u64m8_tumu(__VA_ARGS__)
16652
#define vremu_vx_u64m8_m(...) __riscv_vremu_vx_u64m8_tumu(__VA_ARGS__)
16653
#define vwmul_vv_i16mf4(...) __riscv_vwmul_vv_i16mf4(__VA_ARGS__)
16654
#define vwmul_vx_i16mf4(...) __riscv_vwmul_vx_i16mf4(__VA_ARGS__)
16655
#define vwmul_vv_i16mf2(...) __riscv_vwmul_vv_i16mf2(__VA_ARGS__)
16656
#define vwmul_vx_i16mf2(...) __riscv_vwmul_vx_i16mf2(__VA_ARGS__)
16657
#define vwmul_vv_i16m1(...) __riscv_vwmul_vv_i16m1(__VA_ARGS__)
16658
#define vwmul_vx_i16m1(...) __riscv_vwmul_vx_i16m1(__VA_ARGS__)
16659
#define vwmul_vv_i16m2(...) __riscv_vwmul_vv_i16m2(__VA_ARGS__)
16660
#define vwmul_vx_i16m2(...) __riscv_vwmul_vx_i16m2(__VA_ARGS__)
16661
#define vwmul_vv_i16m4(...) __riscv_vwmul_vv_i16m4(__VA_ARGS__)
16662
#define vwmul_vx_i16m4(...) __riscv_vwmul_vx_i16m4(__VA_ARGS__)
16663
#define vwmul_vv_i16m8(...) __riscv_vwmul_vv_i16m8(__VA_ARGS__)
16664
#define vwmul_vx_i16m8(...) __riscv_vwmul_vx_i16m8(__VA_ARGS__)
16665
#define vwmul_vv_i32mf2(...) __riscv_vwmul_vv_i32mf2(__VA_ARGS__)
16666
#define vwmul_vx_i32mf2(...) __riscv_vwmul_vx_i32mf2(__VA_ARGS__)
16667
#define vwmul_vv_i32m1(...) __riscv_vwmul_vv_i32m1(__VA_ARGS__)
16668
#define vwmul_vx_i32m1(...) __riscv_vwmul_vx_i32m1(__VA_ARGS__)
16669
#define vwmul_vv_i32m2(...) __riscv_vwmul_vv_i32m2(__VA_ARGS__)
16670
#define vwmul_vx_i32m2(...) __riscv_vwmul_vx_i32m2(__VA_ARGS__)
16671
#define vwmul_vv_i32m4(...) __riscv_vwmul_vv_i32m4(__VA_ARGS__)
16672
#define vwmul_vx_i32m4(...) __riscv_vwmul_vx_i32m4(__VA_ARGS__)
16673
#define vwmul_vv_i32m8(...) __riscv_vwmul_vv_i32m8(__VA_ARGS__)
16674
#define vwmul_vx_i32m8(...) __riscv_vwmul_vx_i32m8(__VA_ARGS__)
16675
#define vwmul_vv_i64m1(...) __riscv_vwmul_vv_i64m1(__VA_ARGS__)
16676
#define vwmul_vx_i64m1(...) __riscv_vwmul_vx_i64m1(__VA_ARGS__)
16677
#define vwmul_vv_i64m2(...) __riscv_vwmul_vv_i64m2(__VA_ARGS__)
16678
#define vwmul_vx_i64m2(...) __riscv_vwmul_vx_i64m2(__VA_ARGS__)
16679
#define vwmul_vv_i64m4(...) __riscv_vwmul_vv_i64m4(__VA_ARGS__)
16680
#define vwmul_vx_i64m4(...) __riscv_vwmul_vx_i64m4(__VA_ARGS__)
16681
#define vwmul_vv_i64m8(...) __riscv_vwmul_vv_i64m8(__VA_ARGS__)
16682
#define vwmul_vx_i64m8(...) __riscv_vwmul_vx_i64m8(__VA_ARGS__)
16683
#define vwmulsu_vv_i16mf4(...) __riscv_vwmulsu_vv_i16mf4(__VA_ARGS__)
16684
#define vwmulsu_vx_i16mf4(...) __riscv_vwmulsu_vx_i16mf4(__VA_ARGS__)
16685
#define vwmulsu_vv_i16mf2(...) __riscv_vwmulsu_vv_i16mf2(__VA_ARGS__)
16686
#define vwmulsu_vx_i16mf2(...) __riscv_vwmulsu_vx_i16mf2(__VA_ARGS__)
16687
#define vwmulsu_vv_i16m1(...) __riscv_vwmulsu_vv_i16m1(__VA_ARGS__)
16688
#define vwmulsu_vx_i16m1(...) __riscv_vwmulsu_vx_i16m1(__VA_ARGS__)
16689
#define vwmulsu_vv_i16m2(...) __riscv_vwmulsu_vv_i16m2(__VA_ARGS__)
16690
#define vwmulsu_vx_i16m2(...) __riscv_vwmulsu_vx_i16m2(__VA_ARGS__)
16691
#define vwmulsu_vv_i16m4(...) __riscv_vwmulsu_vv_i16m4(__VA_ARGS__)
16692
#define vwmulsu_vx_i16m4(...) __riscv_vwmulsu_vx_i16m4(__VA_ARGS__)
16693
#define vwmulsu_vv_i16m8(...) __riscv_vwmulsu_vv_i16m8(__VA_ARGS__)
16694
#define vwmulsu_vx_i16m8(...) __riscv_vwmulsu_vx_i16m8(__VA_ARGS__)
16695
#define vwmulsu_vv_i32mf2(...) __riscv_vwmulsu_vv_i32mf2(__VA_ARGS__)
16696
#define vwmulsu_vx_i32mf2(...) __riscv_vwmulsu_vx_i32mf2(__VA_ARGS__)
16697
#define vwmulsu_vv_i32m1(...) __riscv_vwmulsu_vv_i32m1(__VA_ARGS__)
16698
#define vwmulsu_vx_i32m1(...) __riscv_vwmulsu_vx_i32m1(__VA_ARGS__)
16699
#define vwmulsu_vv_i32m2(...) __riscv_vwmulsu_vv_i32m2(__VA_ARGS__)
16700
#define vwmulsu_vx_i32m2(...) __riscv_vwmulsu_vx_i32m2(__VA_ARGS__)
16701
#define vwmulsu_vv_i32m4(...) __riscv_vwmulsu_vv_i32m4(__VA_ARGS__)
16702
#define vwmulsu_vx_i32m4(...) __riscv_vwmulsu_vx_i32m4(__VA_ARGS__)
16703
#define vwmulsu_vv_i32m8(...) __riscv_vwmulsu_vv_i32m8(__VA_ARGS__)
16704
#define vwmulsu_vx_i32m8(...) __riscv_vwmulsu_vx_i32m8(__VA_ARGS__)
16705
#define vwmulsu_vv_i64m1(...) __riscv_vwmulsu_vv_i64m1(__VA_ARGS__)
16706
#define vwmulsu_vx_i64m1(...) __riscv_vwmulsu_vx_i64m1(__VA_ARGS__)
16707
#define vwmulsu_vv_i64m2(...) __riscv_vwmulsu_vv_i64m2(__VA_ARGS__)
16708
#define vwmulsu_vx_i64m2(...) __riscv_vwmulsu_vx_i64m2(__VA_ARGS__)
16709
#define vwmulsu_vv_i64m4(...) __riscv_vwmulsu_vv_i64m4(__VA_ARGS__)
16710
#define vwmulsu_vx_i64m4(...) __riscv_vwmulsu_vx_i64m4(__VA_ARGS__)
16711
#define vwmulsu_vv_i64m8(...) __riscv_vwmulsu_vv_i64m8(__VA_ARGS__)
16712
#define vwmulsu_vx_i64m8(...) __riscv_vwmulsu_vx_i64m8(__VA_ARGS__)
16713
#define vwmulu_vv_u16mf4(...) __riscv_vwmulu_vv_u16mf4(__VA_ARGS__)
16714
#define vwmulu_vx_u16mf4(...) __riscv_vwmulu_vx_u16mf4(__VA_ARGS__)
16715
#define vwmulu_vv_u16mf2(...) __riscv_vwmulu_vv_u16mf2(__VA_ARGS__)
16716
#define vwmulu_vx_u16mf2(...) __riscv_vwmulu_vx_u16mf2(__VA_ARGS__)
16717
#define vwmulu_vv_u16m1(...) __riscv_vwmulu_vv_u16m1(__VA_ARGS__)
16718
#define vwmulu_vx_u16m1(...) __riscv_vwmulu_vx_u16m1(__VA_ARGS__)
16719
#define vwmulu_vv_u16m2(...) __riscv_vwmulu_vv_u16m2(__VA_ARGS__)
16720
#define vwmulu_vx_u16m2(...) __riscv_vwmulu_vx_u16m2(__VA_ARGS__)
16721
#define vwmulu_vv_u16m4(...) __riscv_vwmulu_vv_u16m4(__VA_ARGS__)
16722
#define vwmulu_vx_u16m4(...) __riscv_vwmulu_vx_u16m4(__VA_ARGS__)
16723
#define vwmulu_vv_u16m8(...) __riscv_vwmulu_vv_u16m8(__VA_ARGS__)
16724
#define vwmulu_vx_u16m8(...) __riscv_vwmulu_vx_u16m8(__VA_ARGS__)
16725
#define vwmulu_vv_u32mf2(...) __riscv_vwmulu_vv_u32mf2(__VA_ARGS__)
16726
#define vwmulu_vx_u32mf2(...) __riscv_vwmulu_vx_u32mf2(__VA_ARGS__)
16727
#define vwmulu_vv_u32m1(...) __riscv_vwmulu_vv_u32m1(__VA_ARGS__)
16728
#define vwmulu_vx_u32m1(...) __riscv_vwmulu_vx_u32m1(__VA_ARGS__)
16729
#define vwmulu_vv_u32m2(...) __riscv_vwmulu_vv_u32m2(__VA_ARGS__)
16730
#define vwmulu_vx_u32m2(...) __riscv_vwmulu_vx_u32m2(__VA_ARGS__)
16731
#define vwmulu_vv_u32m4(...) __riscv_vwmulu_vv_u32m4(__VA_ARGS__)
16732
#define vwmulu_vx_u32m4(...) __riscv_vwmulu_vx_u32m4(__VA_ARGS__)
16733
#define vwmulu_vv_u32m8(...) __riscv_vwmulu_vv_u32m8(__VA_ARGS__)
16734
#define vwmulu_vx_u32m8(...) __riscv_vwmulu_vx_u32m8(__VA_ARGS__)
16735
#define vwmulu_vv_u64m1(...) __riscv_vwmulu_vv_u64m1(__VA_ARGS__)
16736
#define vwmulu_vx_u64m1(...) __riscv_vwmulu_vx_u64m1(__VA_ARGS__)
16737
#define vwmulu_vv_u64m2(...) __riscv_vwmulu_vv_u64m2(__VA_ARGS__)
16738
#define vwmulu_vx_u64m2(...) __riscv_vwmulu_vx_u64m2(__VA_ARGS__)
16739
#define vwmulu_vv_u64m4(...) __riscv_vwmulu_vv_u64m4(__VA_ARGS__)
16740
#define vwmulu_vx_u64m4(...) __riscv_vwmulu_vx_u64m4(__VA_ARGS__)
16741
#define vwmulu_vv_u64m8(...) __riscv_vwmulu_vv_u64m8(__VA_ARGS__)
16742
#define vwmulu_vx_u64m8(...) __riscv_vwmulu_vx_u64m8(__VA_ARGS__)
16743
// masked functions
16744
#define vwmul_vv_i16mf4_m(...) __riscv_vwmul_vv_i16mf4_tumu(__VA_ARGS__)
16745
#define vwmul_vx_i16mf4_m(...) __riscv_vwmul_vx_i16mf4_tumu(__VA_ARGS__)
16746
#define vwmul_vv_i16mf2_m(...) __riscv_vwmul_vv_i16mf2_tumu(__VA_ARGS__)
16747
#define vwmul_vx_i16mf2_m(...) __riscv_vwmul_vx_i16mf2_tumu(__VA_ARGS__)
16748
#define vwmul_vv_i16m1_m(...) __riscv_vwmul_vv_i16m1_tumu(__VA_ARGS__)
16749
#define vwmul_vx_i16m1_m(...) __riscv_vwmul_vx_i16m1_tumu(__VA_ARGS__)
16750
#define vwmul_vv_i16m2_m(...) __riscv_vwmul_vv_i16m2_tumu(__VA_ARGS__)
16751
#define vwmul_vx_i16m2_m(...) __riscv_vwmul_vx_i16m2_tumu(__VA_ARGS__)
16752
#define vwmul_vv_i16m4_m(...) __riscv_vwmul_vv_i16m4_tumu(__VA_ARGS__)
16753
#define vwmul_vx_i16m4_m(...) __riscv_vwmul_vx_i16m4_tumu(__VA_ARGS__)
16754
#define vwmul_vv_i16m8_m(...) __riscv_vwmul_vv_i16m8_tumu(__VA_ARGS__)
16755
#define vwmul_vx_i16m8_m(...) __riscv_vwmul_vx_i16m8_tumu(__VA_ARGS__)
16756
#define vwmul_vv_i32mf2_m(...) __riscv_vwmul_vv_i32mf2_tumu(__VA_ARGS__)
16757
#define vwmul_vx_i32mf2_m(...) __riscv_vwmul_vx_i32mf2_tumu(__VA_ARGS__)
16758
#define vwmul_vv_i32m1_m(...) __riscv_vwmul_vv_i32m1_tumu(__VA_ARGS__)
16759
#define vwmul_vx_i32m1_m(...) __riscv_vwmul_vx_i32m1_tumu(__VA_ARGS__)
16760
#define vwmul_vv_i32m2_m(...) __riscv_vwmul_vv_i32m2_tumu(__VA_ARGS__)
16761
#define vwmul_vx_i32m2_m(...) __riscv_vwmul_vx_i32m2_tumu(__VA_ARGS__)
16762
#define vwmul_vv_i32m4_m(...) __riscv_vwmul_vv_i32m4_tumu(__VA_ARGS__)
16763
#define vwmul_vx_i32m4_m(...) __riscv_vwmul_vx_i32m4_tumu(__VA_ARGS__)
16764
#define vwmul_vv_i32m8_m(...) __riscv_vwmul_vv_i32m8_tumu(__VA_ARGS__)
16765
#define vwmul_vx_i32m8_m(...) __riscv_vwmul_vx_i32m8_tumu(__VA_ARGS__)
16766
#define vwmul_vv_i64m1_m(...) __riscv_vwmul_vv_i64m1_tumu(__VA_ARGS__)
16767
#define vwmul_vx_i64m1_m(...) __riscv_vwmul_vx_i64m1_tumu(__VA_ARGS__)
16768
#define vwmul_vv_i64m2_m(...) __riscv_vwmul_vv_i64m2_tumu(__VA_ARGS__)
16769
#define vwmul_vx_i64m2_m(...) __riscv_vwmul_vx_i64m2_tumu(__VA_ARGS__)
16770
#define vwmul_vv_i64m4_m(...) __riscv_vwmul_vv_i64m4_tumu(__VA_ARGS__)
16771
#define vwmul_vx_i64m4_m(...) __riscv_vwmul_vx_i64m4_tumu(__VA_ARGS__)
16772
#define vwmul_vv_i64m8_m(...) __riscv_vwmul_vv_i64m8_tumu(__VA_ARGS__)
16773
#define vwmul_vx_i64m8_m(...) __riscv_vwmul_vx_i64m8_tumu(__VA_ARGS__)
16774
#define vwmulsu_vv_i16mf4_m(...) __riscv_vwmulsu_vv_i16mf4_tumu(__VA_ARGS__)
16775
#define vwmulsu_vx_i16mf4_m(...) __riscv_vwmulsu_vx_i16mf4_tumu(__VA_ARGS__)
16776
#define vwmulsu_vv_i16mf2_m(...) __riscv_vwmulsu_vv_i16mf2_tumu(__VA_ARGS__)
16777
#define vwmulsu_vx_i16mf2_m(...) __riscv_vwmulsu_vx_i16mf2_tumu(__VA_ARGS__)
16778
#define vwmulsu_vv_i16m1_m(...) __riscv_vwmulsu_vv_i16m1_tumu(__VA_ARGS__)
16779
#define vwmulsu_vx_i16m1_m(...) __riscv_vwmulsu_vx_i16m1_tumu(__VA_ARGS__)
16780
#define vwmulsu_vv_i16m2_m(...) __riscv_vwmulsu_vv_i16m2_tumu(__VA_ARGS__)
16781
#define vwmulsu_vx_i16m2_m(...) __riscv_vwmulsu_vx_i16m2_tumu(__VA_ARGS__)
16782
#define vwmulsu_vv_i16m4_m(...) __riscv_vwmulsu_vv_i16m4_tumu(__VA_ARGS__)
16783
#define vwmulsu_vx_i16m4_m(...) __riscv_vwmulsu_vx_i16m4_tumu(__VA_ARGS__)
16784
#define vwmulsu_vv_i16m8_m(...) __riscv_vwmulsu_vv_i16m8_tumu(__VA_ARGS__)
16785
#define vwmulsu_vx_i16m8_m(...) __riscv_vwmulsu_vx_i16m8_tumu(__VA_ARGS__)
16786
#define vwmulsu_vv_i32mf2_m(...) __riscv_vwmulsu_vv_i32mf2_tumu(__VA_ARGS__)
16787
#define vwmulsu_vx_i32mf2_m(...) __riscv_vwmulsu_vx_i32mf2_tumu(__VA_ARGS__)
16788
#define vwmulsu_vv_i32m1_m(...) __riscv_vwmulsu_vv_i32m1_tumu(__VA_ARGS__)
16789
#define vwmulsu_vx_i32m1_m(...) __riscv_vwmulsu_vx_i32m1_tumu(__VA_ARGS__)
16790
#define vwmulsu_vv_i32m2_m(...) __riscv_vwmulsu_vv_i32m2_tumu(__VA_ARGS__)
16791
#define vwmulsu_vx_i32m2_m(...) __riscv_vwmulsu_vx_i32m2_tumu(__VA_ARGS__)
16792
#define vwmulsu_vv_i32m4_m(...) __riscv_vwmulsu_vv_i32m4_tumu(__VA_ARGS__)
16793
#define vwmulsu_vx_i32m4_m(...) __riscv_vwmulsu_vx_i32m4_tumu(__VA_ARGS__)
16794
#define vwmulsu_vv_i32m8_m(...) __riscv_vwmulsu_vv_i32m8_tumu(__VA_ARGS__)
16795
#define vwmulsu_vx_i32m8_m(...) __riscv_vwmulsu_vx_i32m8_tumu(__VA_ARGS__)
16796
#define vwmulsu_vv_i64m1_m(...) __riscv_vwmulsu_vv_i64m1_tumu(__VA_ARGS__)
16797
#define vwmulsu_vx_i64m1_m(...) __riscv_vwmulsu_vx_i64m1_tumu(__VA_ARGS__)
16798
#define vwmulsu_vv_i64m2_m(...) __riscv_vwmulsu_vv_i64m2_tumu(__VA_ARGS__)
16799
#define vwmulsu_vx_i64m2_m(...) __riscv_vwmulsu_vx_i64m2_tumu(__VA_ARGS__)
16800
#define vwmulsu_vv_i64m4_m(...) __riscv_vwmulsu_vv_i64m4_tumu(__VA_ARGS__)
16801
#define vwmulsu_vx_i64m4_m(...) __riscv_vwmulsu_vx_i64m4_tumu(__VA_ARGS__)
16802
#define vwmulsu_vv_i64m8_m(...) __riscv_vwmulsu_vv_i64m8_tumu(__VA_ARGS__)
16803
#define vwmulsu_vx_i64m8_m(...) __riscv_vwmulsu_vx_i64m8_tumu(__VA_ARGS__)
16804
#define vwmulu_vv_u16mf4_m(...) __riscv_vwmulu_vv_u16mf4_tumu(__VA_ARGS__)
16805
#define vwmulu_vx_u16mf4_m(...) __riscv_vwmulu_vx_u16mf4_tumu(__VA_ARGS__)
16806
#define vwmulu_vv_u16mf2_m(...) __riscv_vwmulu_vv_u16mf2_tumu(__VA_ARGS__)
16807
#define vwmulu_vx_u16mf2_m(...) __riscv_vwmulu_vx_u16mf2_tumu(__VA_ARGS__)
16808
#define vwmulu_vv_u16m1_m(...) __riscv_vwmulu_vv_u16m1_tumu(__VA_ARGS__)
16809
#define vwmulu_vx_u16m1_m(...) __riscv_vwmulu_vx_u16m1_tumu(__VA_ARGS__)
16810
#define vwmulu_vv_u16m2_m(...) __riscv_vwmulu_vv_u16m2_tumu(__VA_ARGS__)
16811
#define vwmulu_vx_u16m2_m(...) __riscv_vwmulu_vx_u16m2_tumu(__VA_ARGS__)
16812
#define vwmulu_vv_u16m4_m(...) __riscv_vwmulu_vv_u16m4_tumu(__VA_ARGS__)
16813
#define vwmulu_vx_u16m4_m(...) __riscv_vwmulu_vx_u16m4_tumu(__VA_ARGS__)
16814
#define vwmulu_vv_u16m8_m(...) __riscv_vwmulu_vv_u16m8_tumu(__VA_ARGS__)
16815
#define vwmulu_vx_u16m8_m(...) __riscv_vwmulu_vx_u16m8_tumu(__VA_ARGS__)
16816
#define vwmulu_vv_u32mf2_m(...) __riscv_vwmulu_vv_u32mf2_tumu(__VA_ARGS__)
16817
#define vwmulu_vx_u32mf2_m(...) __riscv_vwmulu_vx_u32mf2_tumu(__VA_ARGS__)
16818
#define vwmulu_vv_u32m1_m(...) __riscv_vwmulu_vv_u32m1_tumu(__VA_ARGS__)
16819
#define vwmulu_vx_u32m1_m(...) __riscv_vwmulu_vx_u32m1_tumu(__VA_ARGS__)
16820
#define vwmulu_vv_u32m2_m(...) __riscv_vwmulu_vv_u32m2_tumu(__VA_ARGS__)
16821
#define vwmulu_vx_u32m2_m(...) __riscv_vwmulu_vx_u32m2_tumu(__VA_ARGS__)
16822
#define vwmulu_vv_u32m4_m(...) __riscv_vwmulu_vv_u32m4_tumu(__VA_ARGS__)
16823
#define vwmulu_vx_u32m4_m(...) __riscv_vwmulu_vx_u32m4_tumu(__VA_ARGS__)
16824
#define vwmulu_vv_u32m8_m(...) __riscv_vwmulu_vv_u32m8_tumu(__VA_ARGS__)
16825
#define vwmulu_vx_u32m8_m(...) __riscv_vwmulu_vx_u32m8_tumu(__VA_ARGS__)
16826
#define vwmulu_vv_u64m1_m(...) __riscv_vwmulu_vv_u64m1_tumu(__VA_ARGS__)
16827
#define vwmulu_vx_u64m1_m(...) __riscv_vwmulu_vx_u64m1_tumu(__VA_ARGS__)
16828
#define vwmulu_vv_u64m2_m(...) __riscv_vwmulu_vv_u64m2_tumu(__VA_ARGS__)
16829
#define vwmulu_vx_u64m2_m(...) __riscv_vwmulu_vx_u64m2_tumu(__VA_ARGS__)
16830
#define vwmulu_vv_u64m4_m(...) __riscv_vwmulu_vv_u64m4_tumu(__VA_ARGS__)
16831
#define vwmulu_vx_u64m4_m(...) __riscv_vwmulu_vx_u64m4_tumu(__VA_ARGS__)
16832
#define vwmulu_vv_u64m8_m(...) __riscv_vwmulu_vv_u64m8_tumu(__VA_ARGS__)
16833
#define vwmulu_vx_u64m8_m(...) __riscv_vwmulu_vx_u64m8_tumu(__VA_ARGS__)
16834
#define vmacc_vv_i8mf8(...) __riscv_vmacc_vv_i8mf8_tu(__VA_ARGS__)
16835
#define vmacc_vx_i8mf8(...) __riscv_vmacc_vx_i8mf8_tu(__VA_ARGS__)
16836
#define vmacc_vv_i8mf4(...) __riscv_vmacc_vv_i8mf4_tu(__VA_ARGS__)
16837
#define vmacc_vx_i8mf4(...) __riscv_vmacc_vx_i8mf4_tu(__VA_ARGS__)
16838
#define vmacc_vv_i8mf2(...) __riscv_vmacc_vv_i8mf2_tu(__VA_ARGS__)
16839
#define vmacc_vx_i8mf2(...) __riscv_vmacc_vx_i8mf2_tu(__VA_ARGS__)
16840
#define vmacc_vv_i8m1(...) __riscv_vmacc_vv_i8m1_tu(__VA_ARGS__)
16841
#define vmacc_vx_i8m1(...) __riscv_vmacc_vx_i8m1_tu(__VA_ARGS__)
16842
#define vmacc_vv_i8m2(...) __riscv_vmacc_vv_i8m2_tu(__VA_ARGS__)
16843
#define vmacc_vx_i8m2(...) __riscv_vmacc_vx_i8m2_tu(__VA_ARGS__)
16844
#define vmacc_vv_i8m4(...) __riscv_vmacc_vv_i8m4_tu(__VA_ARGS__)
16845
#define vmacc_vx_i8m4(...) __riscv_vmacc_vx_i8m4_tu(__VA_ARGS__)
16846
#define vmacc_vv_i8m8(...) __riscv_vmacc_vv_i8m8_tu(__VA_ARGS__)
16847
#define vmacc_vx_i8m8(...) __riscv_vmacc_vx_i8m8_tu(__VA_ARGS__)
16848
#define vmacc_vv_i16mf4(...) __riscv_vmacc_vv_i16mf4_tu(__VA_ARGS__)
16849
#define vmacc_vx_i16mf4(...) __riscv_vmacc_vx_i16mf4_tu(__VA_ARGS__)
16850
#define vmacc_vv_i16mf2(...) __riscv_vmacc_vv_i16mf2_tu(__VA_ARGS__)
16851
#define vmacc_vx_i16mf2(...) __riscv_vmacc_vx_i16mf2_tu(__VA_ARGS__)
16852
#define vmacc_vv_i16m1(...) __riscv_vmacc_vv_i16m1_tu(__VA_ARGS__)
16853
#define vmacc_vx_i16m1(...) __riscv_vmacc_vx_i16m1_tu(__VA_ARGS__)
16854
#define vmacc_vv_i16m2(...) __riscv_vmacc_vv_i16m2_tu(__VA_ARGS__)
16855
#define vmacc_vx_i16m2(...) __riscv_vmacc_vx_i16m2_tu(__VA_ARGS__)
16856
#define vmacc_vv_i16m4(...) __riscv_vmacc_vv_i16m4_tu(__VA_ARGS__)
16857
#define vmacc_vx_i16m4(...) __riscv_vmacc_vx_i16m4_tu(__VA_ARGS__)
16858
#define vmacc_vv_i16m8(...) __riscv_vmacc_vv_i16m8_tu(__VA_ARGS__)
16859
#define vmacc_vx_i16m8(...) __riscv_vmacc_vx_i16m8_tu(__VA_ARGS__)
16860
#define vmacc_vv_i32mf2(...) __riscv_vmacc_vv_i32mf2_tu(__VA_ARGS__)
16861
#define vmacc_vx_i32mf2(...) __riscv_vmacc_vx_i32mf2_tu(__VA_ARGS__)
16862
#define vmacc_vv_i32m1(...) __riscv_vmacc_vv_i32m1_tu(__VA_ARGS__)
16863
#define vmacc_vx_i32m1(...) __riscv_vmacc_vx_i32m1_tu(__VA_ARGS__)
16864
#define vmacc_vv_i32m2(...) __riscv_vmacc_vv_i32m2_tu(__VA_ARGS__)
16865
#define vmacc_vx_i32m2(...) __riscv_vmacc_vx_i32m2_tu(__VA_ARGS__)
16866
#define vmacc_vv_i32m4(...) __riscv_vmacc_vv_i32m4_tu(__VA_ARGS__)
16867
#define vmacc_vx_i32m4(...) __riscv_vmacc_vx_i32m4_tu(__VA_ARGS__)
16868
#define vmacc_vv_i32m8(...) __riscv_vmacc_vv_i32m8_tu(__VA_ARGS__)
16869
#define vmacc_vx_i32m8(...) __riscv_vmacc_vx_i32m8_tu(__VA_ARGS__)
16870
#define vmacc_vv_i64m1(...) __riscv_vmacc_vv_i64m1_tu(__VA_ARGS__)
16871
#define vmacc_vx_i64m1(...) __riscv_vmacc_vx_i64m1_tu(__VA_ARGS__)
16872
#define vmacc_vv_i64m2(...) __riscv_vmacc_vv_i64m2_tu(__VA_ARGS__)
16873
#define vmacc_vx_i64m2(...) __riscv_vmacc_vx_i64m2_tu(__VA_ARGS__)
16874
#define vmacc_vv_i64m4(...) __riscv_vmacc_vv_i64m4_tu(__VA_ARGS__)
16875
#define vmacc_vx_i64m4(...) __riscv_vmacc_vx_i64m4_tu(__VA_ARGS__)
16876
#define vmacc_vv_i64m8(...) __riscv_vmacc_vv_i64m8_tu(__VA_ARGS__)
16877
#define vmacc_vx_i64m8(...) __riscv_vmacc_vx_i64m8_tu(__VA_ARGS__)
16878
#define vnmsac_vv_i8mf8(...) __riscv_vnmsac_vv_i8mf8_tu(__VA_ARGS__)
16879
#define vnmsac_vx_i8mf8(...) __riscv_vnmsac_vx_i8mf8_tu(__VA_ARGS__)
16880
#define vnmsac_vv_i8mf4(...) __riscv_vnmsac_vv_i8mf4_tu(__VA_ARGS__)
16881
#define vnmsac_vx_i8mf4(...) __riscv_vnmsac_vx_i8mf4_tu(__VA_ARGS__)
16882
#define vnmsac_vv_i8mf2(...) __riscv_vnmsac_vv_i8mf2_tu(__VA_ARGS__)
16883
#define vnmsac_vx_i8mf2(...) __riscv_vnmsac_vx_i8mf2_tu(__VA_ARGS__)
16884
#define vnmsac_vv_i8m1(...) __riscv_vnmsac_vv_i8m1_tu(__VA_ARGS__)
16885
#define vnmsac_vx_i8m1(...) __riscv_vnmsac_vx_i8m1_tu(__VA_ARGS__)
16886
#define vnmsac_vv_i8m2(...) __riscv_vnmsac_vv_i8m2_tu(__VA_ARGS__)
16887
#define vnmsac_vx_i8m2(...) __riscv_vnmsac_vx_i8m2_tu(__VA_ARGS__)
16888
#define vnmsac_vv_i8m4(...) __riscv_vnmsac_vv_i8m4_tu(__VA_ARGS__)
16889
#define vnmsac_vx_i8m4(...) __riscv_vnmsac_vx_i8m4_tu(__VA_ARGS__)
16890
#define vnmsac_vv_i8m8(...) __riscv_vnmsac_vv_i8m8_tu(__VA_ARGS__)
16891
#define vnmsac_vx_i8m8(...) __riscv_vnmsac_vx_i8m8_tu(__VA_ARGS__)
16892
#define vnmsac_vv_i16mf4(...) __riscv_vnmsac_vv_i16mf4_tu(__VA_ARGS__)
16893
#define vnmsac_vx_i16mf4(...) __riscv_vnmsac_vx_i16mf4_tu(__VA_ARGS__)
16894
#define vnmsac_vv_i16mf2(...) __riscv_vnmsac_vv_i16mf2_tu(__VA_ARGS__)
16895
#define vnmsac_vx_i16mf2(...) __riscv_vnmsac_vx_i16mf2_tu(__VA_ARGS__)
16896
#define vnmsac_vv_i16m1(...) __riscv_vnmsac_vv_i16m1_tu(__VA_ARGS__)
16897
#define vnmsac_vx_i16m1(...) __riscv_vnmsac_vx_i16m1_tu(__VA_ARGS__)
16898
#define vnmsac_vv_i16m2(...) __riscv_vnmsac_vv_i16m2_tu(__VA_ARGS__)
16899
#define vnmsac_vx_i16m2(...) __riscv_vnmsac_vx_i16m2_tu(__VA_ARGS__)
16900
#define vnmsac_vv_i16m4(...) __riscv_vnmsac_vv_i16m4_tu(__VA_ARGS__)
16901
#define vnmsac_vx_i16m4(...) __riscv_vnmsac_vx_i16m4_tu(__VA_ARGS__)
16902
#define vnmsac_vv_i16m8(...) __riscv_vnmsac_vv_i16m8_tu(__VA_ARGS__)
16903
#define vnmsac_vx_i16m8(...) __riscv_vnmsac_vx_i16m8_tu(__VA_ARGS__)
16904
#define vnmsac_vv_i32mf2(...) __riscv_vnmsac_vv_i32mf2_tu(__VA_ARGS__)
16905
#define vnmsac_vx_i32mf2(...) __riscv_vnmsac_vx_i32mf2_tu(__VA_ARGS__)
16906
#define vnmsac_vv_i32m1(...) __riscv_vnmsac_vv_i32m1_tu(__VA_ARGS__)
16907
#define vnmsac_vx_i32m1(...) __riscv_vnmsac_vx_i32m1_tu(__VA_ARGS__)
16908
#define vnmsac_vv_i32m2(...) __riscv_vnmsac_vv_i32m2_tu(__VA_ARGS__)
16909
#define vnmsac_vx_i32m2(...) __riscv_vnmsac_vx_i32m2_tu(__VA_ARGS__)
16910
#define vnmsac_vv_i32m4(...) __riscv_vnmsac_vv_i32m4_tu(__VA_ARGS__)
16911
#define vnmsac_vx_i32m4(...) __riscv_vnmsac_vx_i32m4_tu(__VA_ARGS__)
16912
#define vnmsac_vv_i32m8(...) __riscv_vnmsac_vv_i32m8_tu(__VA_ARGS__)
16913
#define vnmsac_vx_i32m8(...) __riscv_vnmsac_vx_i32m8_tu(__VA_ARGS__)
16914
#define vnmsac_vv_i64m1(...) __riscv_vnmsac_vv_i64m1_tu(__VA_ARGS__)
16915
#define vnmsac_vx_i64m1(...) __riscv_vnmsac_vx_i64m1_tu(__VA_ARGS__)
16916
#define vnmsac_vv_i64m2(...) __riscv_vnmsac_vv_i64m2_tu(__VA_ARGS__)
16917
#define vnmsac_vx_i64m2(...) __riscv_vnmsac_vx_i64m2_tu(__VA_ARGS__)
16918
#define vnmsac_vv_i64m4(...) __riscv_vnmsac_vv_i64m4_tu(__VA_ARGS__)
16919
#define vnmsac_vx_i64m4(...) __riscv_vnmsac_vx_i64m4_tu(__VA_ARGS__)
16920
#define vnmsac_vv_i64m8(...) __riscv_vnmsac_vv_i64m8_tu(__VA_ARGS__)
16921
#define vnmsac_vx_i64m8(...) __riscv_vnmsac_vx_i64m8_tu(__VA_ARGS__)
16922
#define vmadd_vv_i8mf8(...) __riscv_vmadd_vv_i8mf8_tu(__VA_ARGS__)
16923
#define vmadd_vx_i8mf8(...) __riscv_vmadd_vx_i8mf8_tu(__VA_ARGS__)
16924
#define vmadd_vv_i8mf4(...) __riscv_vmadd_vv_i8mf4_tu(__VA_ARGS__)
16925
#define vmadd_vx_i8mf4(...) __riscv_vmadd_vx_i8mf4_tu(__VA_ARGS__)
16926
#define vmadd_vv_i8mf2(...) __riscv_vmadd_vv_i8mf2_tu(__VA_ARGS__)
16927
#define vmadd_vx_i8mf2(...) __riscv_vmadd_vx_i8mf2_tu(__VA_ARGS__)
16928
#define vmadd_vv_i8m1(...) __riscv_vmadd_vv_i8m1_tu(__VA_ARGS__)
16929
#define vmadd_vx_i8m1(...) __riscv_vmadd_vx_i8m1_tu(__VA_ARGS__)
16930
#define vmadd_vv_i8m2(...) __riscv_vmadd_vv_i8m2_tu(__VA_ARGS__)
16931
#define vmadd_vx_i8m2(...) __riscv_vmadd_vx_i8m2_tu(__VA_ARGS__)
16932
#define vmadd_vv_i8m4(...) __riscv_vmadd_vv_i8m4_tu(__VA_ARGS__)
16933
#define vmadd_vx_i8m4(...) __riscv_vmadd_vx_i8m4_tu(__VA_ARGS__)
16934
#define vmadd_vv_i8m8(...) __riscv_vmadd_vv_i8m8_tu(__VA_ARGS__)
16935
#define vmadd_vx_i8m8(...) __riscv_vmadd_vx_i8m8_tu(__VA_ARGS__)
16936
#define vmadd_vv_i16mf4(...) __riscv_vmadd_vv_i16mf4_tu(__VA_ARGS__)
16937
#define vmadd_vx_i16mf4(...) __riscv_vmadd_vx_i16mf4_tu(__VA_ARGS__)
16938
#define vmadd_vv_i16mf2(...) __riscv_vmadd_vv_i16mf2_tu(__VA_ARGS__)
16939
#define vmadd_vx_i16mf2(...) __riscv_vmadd_vx_i16mf2_tu(__VA_ARGS__)
16940
#define vmadd_vv_i16m1(...) __riscv_vmadd_vv_i16m1_tu(__VA_ARGS__)
16941
#define vmadd_vx_i16m1(...) __riscv_vmadd_vx_i16m1_tu(__VA_ARGS__)
16942
#define vmadd_vv_i16m2(...) __riscv_vmadd_vv_i16m2_tu(__VA_ARGS__)
16943
#define vmadd_vx_i16m2(...) __riscv_vmadd_vx_i16m2_tu(__VA_ARGS__)
16944
#define vmadd_vv_i16m4(...) __riscv_vmadd_vv_i16m4_tu(__VA_ARGS__)
16945
#define vmadd_vx_i16m4(...) __riscv_vmadd_vx_i16m4_tu(__VA_ARGS__)
16946
#define vmadd_vv_i16m8(...) __riscv_vmadd_vv_i16m8_tu(__VA_ARGS__)
16947
#define vmadd_vx_i16m8(...) __riscv_vmadd_vx_i16m8_tu(__VA_ARGS__)
16948
#define vmadd_vv_i32mf2(...) __riscv_vmadd_vv_i32mf2_tu(__VA_ARGS__)
16949
#define vmadd_vx_i32mf2(...) __riscv_vmadd_vx_i32mf2_tu(__VA_ARGS__)
16950
#define vmadd_vv_i32m1(...) __riscv_vmadd_vv_i32m1_tu(__VA_ARGS__)
16951
#define vmadd_vx_i32m1(...) __riscv_vmadd_vx_i32m1_tu(__VA_ARGS__)
16952
#define vmadd_vv_i32m2(...) __riscv_vmadd_vv_i32m2_tu(__VA_ARGS__)
16953
#define vmadd_vx_i32m2(...) __riscv_vmadd_vx_i32m2_tu(__VA_ARGS__)
16954
#define vmadd_vv_i32m4(...) __riscv_vmadd_vv_i32m4_tu(__VA_ARGS__)
16955
#define vmadd_vx_i32m4(...) __riscv_vmadd_vx_i32m4_tu(__VA_ARGS__)
16956
#define vmadd_vv_i32m8(...) __riscv_vmadd_vv_i32m8_tu(__VA_ARGS__)
16957
#define vmadd_vx_i32m8(...) __riscv_vmadd_vx_i32m8_tu(__VA_ARGS__)
16958
#define vmadd_vv_i64m1(...) __riscv_vmadd_vv_i64m1_tu(__VA_ARGS__)
16959
#define vmadd_vx_i64m1(...) __riscv_vmadd_vx_i64m1_tu(__VA_ARGS__)
16960
#define vmadd_vv_i64m2(...) __riscv_vmadd_vv_i64m2_tu(__VA_ARGS__)
16961
#define vmadd_vx_i64m2(...) __riscv_vmadd_vx_i64m2_tu(__VA_ARGS__)
16962
#define vmadd_vv_i64m4(...) __riscv_vmadd_vv_i64m4_tu(__VA_ARGS__)
16963
#define vmadd_vx_i64m4(...) __riscv_vmadd_vx_i64m4_tu(__VA_ARGS__)
16964
#define vmadd_vv_i64m8(...) __riscv_vmadd_vv_i64m8_tu(__VA_ARGS__)
16965
#define vmadd_vx_i64m8(...) __riscv_vmadd_vx_i64m8_tu(__VA_ARGS__)
16966
#define vnmsub_vv_i8mf8(...) __riscv_vnmsub_vv_i8mf8_tu(__VA_ARGS__)
16967
#define vnmsub_vx_i8mf8(...) __riscv_vnmsub_vx_i8mf8_tu(__VA_ARGS__)
16968
#define vnmsub_vv_i8mf4(...) __riscv_vnmsub_vv_i8mf4_tu(__VA_ARGS__)
16969
#define vnmsub_vx_i8mf4(...) __riscv_vnmsub_vx_i8mf4_tu(__VA_ARGS__)
16970
#define vnmsub_vv_i8mf2(...) __riscv_vnmsub_vv_i8mf2_tu(__VA_ARGS__)
16971
#define vnmsub_vx_i8mf2(...) __riscv_vnmsub_vx_i8mf2_tu(__VA_ARGS__)
16972
#define vnmsub_vv_i8m1(...) __riscv_vnmsub_vv_i8m1_tu(__VA_ARGS__)
16973
#define vnmsub_vx_i8m1(...) __riscv_vnmsub_vx_i8m1_tu(__VA_ARGS__)
16974
#define vnmsub_vv_i8m2(...) __riscv_vnmsub_vv_i8m2_tu(__VA_ARGS__)
16975
#define vnmsub_vx_i8m2(...) __riscv_vnmsub_vx_i8m2_tu(__VA_ARGS__)
16976
#define vnmsub_vv_i8m4(...) __riscv_vnmsub_vv_i8m4_tu(__VA_ARGS__)
16977
#define vnmsub_vx_i8m4(...) __riscv_vnmsub_vx_i8m4_tu(__VA_ARGS__)
16978
#define vnmsub_vv_i8m8(...) __riscv_vnmsub_vv_i8m8_tu(__VA_ARGS__)
16979
#define vnmsub_vx_i8m8(...) __riscv_vnmsub_vx_i8m8_tu(__VA_ARGS__)
16980
#define vnmsub_vv_i16mf4(...) __riscv_vnmsub_vv_i16mf4_tu(__VA_ARGS__)
16981
#define vnmsub_vx_i16mf4(...) __riscv_vnmsub_vx_i16mf4_tu(__VA_ARGS__)
16982
#define vnmsub_vv_i16mf2(...) __riscv_vnmsub_vv_i16mf2_tu(__VA_ARGS__)
16983
#define vnmsub_vx_i16mf2(...) __riscv_vnmsub_vx_i16mf2_tu(__VA_ARGS__)
16984
#define vnmsub_vv_i16m1(...) __riscv_vnmsub_vv_i16m1_tu(__VA_ARGS__)
16985
#define vnmsub_vx_i16m1(...) __riscv_vnmsub_vx_i16m1_tu(__VA_ARGS__)
16986
#define vnmsub_vv_i16m2(...) __riscv_vnmsub_vv_i16m2_tu(__VA_ARGS__)
16987
#define vnmsub_vx_i16m2(...) __riscv_vnmsub_vx_i16m2_tu(__VA_ARGS__)
16988
#define vnmsub_vv_i16m4(...) __riscv_vnmsub_vv_i16m4_tu(__VA_ARGS__)
16989
#define vnmsub_vx_i16m4(...) __riscv_vnmsub_vx_i16m4_tu(__VA_ARGS__)
16990
#define vnmsub_vv_i16m8(...) __riscv_vnmsub_vv_i16m8_tu(__VA_ARGS__)
16991
#define vnmsub_vx_i16m8(...) __riscv_vnmsub_vx_i16m8_tu(__VA_ARGS__)
16992
#define vnmsub_vv_i32mf2(...) __riscv_vnmsub_vv_i32mf2_tu(__VA_ARGS__)
16993
#define vnmsub_vx_i32mf2(...) __riscv_vnmsub_vx_i32mf2_tu(__VA_ARGS__)
16994
#define vnmsub_vv_i32m1(...) __riscv_vnmsub_vv_i32m1_tu(__VA_ARGS__)
16995
#define vnmsub_vx_i32m1(...) __riscv_vnmsub_vx_i32m1_tu(__VA_ARGS__)
16996
#define vnmsub_vv_i32m2(...) __riscv_vnmsub_vv_i32m2_tu(__VA_ARGS__)
16997
#define vnmsub_vx_i32m2(...) __riscv_vnmsub_vx_i32m2_tu(__VA_ARGS__)
16998
#define vnmsub_vv_i32m4(...) __riscv_vnmsub_vv_i32m4_tu(__VA_ARGS__)
16999
#define vnmsub_vx_i32m4(...) __riscv_vnmsub_vx_i32m4_tu(__VA_ARGS__)
17000
#define vnmsub_vv_i32m8(...) __riscv_vnmsub_vv_i32m8_tu(__VA_ARGS__)
17001
#define vnmsub_vx_i32m8(...) __riscv_vnmsub_vx_i32m8_tu(__VA_ARGS__)
17002
#define vnmsub_vv_i64m1(...) __riscv_vnmsub_vv_i64m1_tu(__VA_ARGS__)
17003
#define vnmsub_vx_i64m1(...) __riscv_vnmsub_vx_i64m1_tu(__VA_ARGS__)
17004
#define vnmsub_vv_i64m2(...) __riscv_vnmsub_vv_i64m2_tu(__VA_ARGS__)
17005
#define vnmsub_vx_i64m2(...) __riscv_vnmsub_vx_i64m2_tu(__VA_ARGS__)
17006
#define vnmsub_vv_i64m4(...) __riscv_vnmsub_vv_i64m4_tu(__VA_ARGS__)
17007
#define vnmsub_vx_i64m4(...) __riscv_vnmsub_vx_i64m4_tu(__VA_ARGS__)
17008
#define vnmsub_vv_i64m8(...) __riscv_vnmsub_vv_i64m8_tu(__VA_ARGS__)
17009
#define vnmsub_vx_i64m8(...) __riscv_vnmsub_vx_i64m8_tu(__VA_ARGS__)
17010
#define vmacc_vv_u8mf8(...) __riscv_vmacc_vv_u8mf8_tu(__VA_ARGS__)
17011
#define vmacc_vx_u8mf8(...) __riscv_vmacc_vx_u8mf8_tu(__VA_ARGS__)
17012
#define vmacc_vv_u8mf4(...) __riscv_vmacc_vv_u8mf4_tu(__VA_ARGS__)
17013
#define vmacc_vx_u8mf4(...) __riscv_vmacc_vx_u8mf4_tu(__VA_ARGS__)
17014
#define vmacc_vv_u8mf2(...) __riscv_vmacc_vv_u8mf2_tu(__VA_ARGS__)
17015
#define vmacc_vx_u8mf2(...) __riscv_vmacc_vx_u8mf2_tu(__VA_ARGS__)
17016
#define vmacc_vv_u8m1(...) __riscv_vmacc_vv_u8m1_tu(__VA_ARGS__)
17017
#define vmacc_vx_u8m1(...) __riscv_vmacc_vx_u8m1_tu(__VA_ARGS__)
17018
#define vmacc_vv_u8m2(...) __riscv_vmacc_vv_u8m2_tu(__VA_ARGS__)
17019
#define vmacc_vx_u8m2(...) __riscv_vmacc_vx_u8m2_tu(__VA_ARGS__)
17020
#define vmacc_vv_u8m4(...) __riscv_vmacc_vv_u8m4_tu(__VA_ARGS__)
17021
#define vmacc_vx_u8m4(...) __riscv_vmacc_vx_u8m4_tu(__VA_ARGS__)
17022
#define vmacc_vv_u8m8(...) __riscv_vmacc_vv_u8m8_tu(__VA_ARGS__)
17023
#define vmacc_vx_u8m8(...) __riscv_vmacc_vx_u8m8_tu(__VA_ARGS__)
17024
#define vmacc_vv_u16mf4(...) __riscv_vmacc_vv_u16mf4_tu(__VA_ARGS__)
17025
#define vmacc_vx_u16mf4(...) __riscv_vmacc_vx_u16mf4_tu(__VA_ARGS__)
17026
#define vmacc_vv_u16mf2(...) __riscv_vmacc_vv_u16mf2_tu(__VA_ARGS__)
17027
#define vmacc_vx_u16mf2(...) __riscv_vmacc_vx_u16mf2_tu(__VA_ARGS__)
17028
#define vmacc_vv_u16m1(...) __riscv_vmacc_vv_u16m1_tu(__VA_ARGS__)
17029
#define vmacc_vx_u16m1(...) __riscv_vmacc_vx_u16m1_tu(__VA_ARGS__)
17030
#define vmacc_vv_u16m2(...) __riscv_vmacc_vv_u16m2_tu(__VA_ARGS__)
17031
#define vmacc_vx_u16m2(...) __riscv_vmacc_vx_u16m2_tu(__VA_ARGS__)
17032
#define vmacc_vv_u16m4(...) __riscv_vmacc_vv_u16m4_tu(__VA_ARGS__)
17033
#define vmacc_vx_u16m4(...) __riscv_vmacc_vx_u16m4_tu(__VA_ARGS__)
17034
#define vmacc_vv_u16m8(...) __riscv_vmacc_vv_u16m8_tu(__VA_ARGS__)
17035
#define vmacc_vx_u16m8(...) __riscv_vmacc_vx_u16m8_tu(__VA_ARGS__)
17036
#define vmacc_vv_u32mf2(...) __riscv_vmacc_vv_u32mf2_tu(__VA_ARGS__)
17037
#define vmacc_vx_u32mf2(...) __riscv_vmacc_vx_u32mf2_tu(__VA_ARGS__)
17038
#define vmacc_vv_u32m1(...) __riscv_vmacc_vv_u32m1_tu(__VA_ARGS__)
17039
#define vmacc_vx_u32m1(...) __riscv_vmacc_vx_u32m1_tu(__VA_ARGS__)
17040
#define vmacc_vv_u32m2(...) __riscv_vmacc_vv_u32m2_tu(__VA_ARGS__)
17041
#define vmacc_vx_u32m2(...) __riscv_vmacc_vx_u32m2_tu(__VA_ARGS__)
17042
#define vmacc_vv_u32m4(...) __riscv_vmacc_vv_u32m4_tu(__VA_ARGS__)
17043
#define vmacc_vx_u32m4(...) __riscv_vmacc_vx_u32m4_tu(__VA_ARGS__)
17044
#define vmacc_vv_u32m8(...) __riscv_vmacc_vv_u32m8_tu(__VA_ARGS__)
17045
#define vmacc_vx_u32m8(...) __riscv_vmacc_vx_u32m8_tu(__VA_ARGS__)
17046
#define vmacc_vv_u64m1(...) __riscv_vmacc_vv_u64m1_tu(__VA_ARGS__)
17047
#define vmacc_vx_u64m1(...) __riscv_vmacc_vx_u64m1_tu(__VA_ARGS__)
17048
#define vmacc_vv_u64m2(...) __riscv_vmacc_vv_u64m2_tu(__VA_ARGS__)
17049
#define vmacc_vx_u64m2(...) __riscv_vmacc_vx_u64m2_tu(__VA_ARGS__)
17050
#define vmacc_vv_u64m4(...) __riscv_vmacc_vv_u64m4_tu(__VA_ARGS__)
17051
#define vmacc_vx_u64m4(...) __riscv_vmacc_vx_u64m4_tu(__VA_ARGS__)
17052
#define vmacc_vv_u64m8(...) __riscv_vmacc_vv_u64m8_tu(__VA_ARGS__)
17053
#define vmacc_vx_u64m8(...) __riscv_vmacc_vx_u64m8_tu(__VA_ARGS__)
17054
#define vnmsac_vv_u8mf8(...) __riscv_vnmsac_vv_u8mf8_tu(__VA_ARGS__)
17055
#define vnmsac_vx_u8mf8(...) __riscv_vnmsac_vx_u8mf8_tu(__VA_ARGS__)
17056
#define vnmsac_vv_u8mf4(...) __riscv_vnmsac_vv_u8mf4_tu(__VA_ARGS__)
17057
#define vnmsac_vx_u8mf4(...) __riscv_vnmsac_vx_u8mf4_tu(__VA_ARGS__)
17058
#define vnmsac_vv_u8mf2(...) __riscv_vnmsac_vv_u8mf2_tu(__VA_ARGS__)
17059
#define vnmsac_vx_u8mf2(...) __riscv_vnmsac_vx_u8mf2_tu(__VA_ARGS__)
17060
#define vnmsac_vv_u8m1(...) __riscv_vnmsac_vv_u8m1_tu(__VA_ARGS__)
17061
#define vnmsac_vx_u8m1(...) __riscv_vnmsac_vx_u8m1_tu(__VA_ARGS__)
17062
#define vnmsac_vv_u8m2(...) __riscv_vnmsac_vv_u8m2_tu(__VA_ARGS__)
17063
#define vnmsac_vx_u8m2(...) __riscv_vnmsac_vx_u8m2_tu(__VA_ARGS__)
17064
#define vnmsac_vv_u8m4(...) __riscv_vnmsac_vv_u8m4_tu(__VA_ARGS__)
17065
#define vnmsac_vx_u8m4(...) __riscv_vnmsac_vx_u8m4_tu(__VA_ARGS__)
17066
#define vnmsac_vv_u8m8(...) __riscv_vnmsac_vv_u8m8_tu(__VA_ARGS__)
17067
#define vnmsac_vx_u8m8(...) __riscv_vnmsac_vx_u8m8_tu(__VA_ARGS__)
17068
#define vnmsac_vv_u16mf4(...) __riscv_vnmsac_vv_u16mf4_tu(__VA_ARGS__)
17069
#define vnmsac_vx_u16mf4(...) __riscv_vnmsac_vx_u16mf4_tu(__VA_ARGS__)
17070
#define vnmsac_vv_u16mf2(...) __riscv_vnmsac_vv_u16mf2_tu(__VA_ARGS__)
17071
#define vnmsac_vx_u16mf2(...) __riscv_vnmsac_vx_u16mf2_tu(__VA_ARGS__)
17072
#define vnmsac_vv_u16m1(...) __riscv_vnmsac_vv_u16m1_tu(__VA_ARGS__)
17073
#define vnmsac_vx_u16m1(...) __riscv_vnmsac_vx_u16m1_tu(__VA_ARGS__)
17074
#define vnmsac_vv_u16m2(...) __riscv_vnmsac_vv_u16m2_tu(__VA_ARGS__)
17075
#define vnmsac_vx_u16m2(...) __riscv_vnmsac_vx_u16m2_tu(__VA_ARGS__)
17076
#define vnmsac_vv_u16m4(...) __riscv_vnmsac_vv_u16m4_tu(__VA_ARGS__)
17077
#define vnmsac_vx_u16m4(...) __riscv_vnmsac_vx_u16m4_tu(__VA_ARGS__)
17078
#define vnmsac_vv_u16m8(...) __riscv_vnmsac_vv_u16m8_tu(__VA_ARGS__)
17079
#define vnmsac_vx_u16m8(...) __riscv_vnmsac_vx_u16m8_tu(__VA_ARGS__)
17080
#define vnmsac_vv_u32mf2(...) __riscv_vnmsac_vv_u32mf2_tu(__VA_ARGS__)
17081
#define vnmsac_vx_u32mf2(...) __riscv_vnmsac_vx_u32mf2_tu(__VA_ARGS__)
17082
#define vnmsac_vv_u32m1(...) __riscv_vnmsac_vv_u32m1_tu(__VA_ARGS__)
17083
#define vnmsac_vx_u32m1(...) __riscv_vnmsac_vx_u32m1_tu(__VA_ARGS__)
17084
#define vnmsac_vv_u32m2(...) __riscv_vnmsac_vv_u32m2_tu(__VA_ARGS__)
17085
#define vnmsac_vx_u32m2(...) __riscv_vnmsac_vx_u32m2_tu(__VA_ARGS__)
17086
#define vnmsac_vv_u32m4(...) __riscv_vnmsac_vv_u32m4_tu(__VA_ARGS__)
17087
#define vnmsac_vx_u32m4(...) __riscv_vnmsac_vx_u32m4_tu(__VA_ARGS__)
17088
#define vnmsac_vv_u32m8(...) __riscv_vnmsac_vv_u32m8_tu(__VA_ARGS__)
17089
#define vnmsac_vx_u32m8(...) __riscv_vnmsac_vx_u32m8_tu(__VA_ARGS__)
17090
#define vnmsac_vv_u64m1(...) __riscv_vnmsac_vv_u64m1_tu(__VA_ARGS__)
17091
#define vnmsac_vx_u64m1(...) __riscv_vnmsac_vx_u64m1_tu(__VA_ARGS__)
17092
#define vnmsac_vv_u64m2(...) __riscv_vnmsac_vv_u64m2_tu(__VA_ARGS__)
17093
#define vnmsac_vx_u64m2(...) __riscv_vnmsac_vx_u64m2_tu(__VA_ARGS__)
17094
#define vnmsac_vv_u64m4(...) __riscv_vnmsac_vv_u64m4_tu(__VA_ARGS__)
17095
#define vnmsac_vx_u64m4(...) __riscv_vnmsac_vx_u64m4_tu(__VA_ARGS__)
17096
#define vnmsac_vv_u64m8(...) __riscv_vnmsac_vv_u64m8_tu(__VA_ARGS__)
17097
#define vnmsac_vx_u64m8(...) __riscv_vnmsac_vx_u64m8_tu(__VA_ARGS__)
17098
#define vmadd_vv_u8mf8(...) __riscv_vmadd_vv_u8mf8_tu(__VA_ARGS__)
17099
#define vmadd_vx_u8mf8(...) __riscv_vmadd_vx_u8mf8_tu(__VA_ARGS__)
17100
#define vmadd_vv_u8mf4(...) __riscv_vmadd_vv_u8mf4_tu(__VA_ARGS__)
17101
#define vmadd_vx_u8mf4(...) __riscv_vmadd_vx_u8mf4_tu(__VA_ARGS__)
17102
#define vmadd_vv_u8mf2(...) __riscv_vmadd_vv_u8mf2_tu(__VA_ARGS__)
17103
#define vmadd_vx_u8mf2(...) __riscv_vmadd_vx_u8mf2_tu(__VA_ARGS__)
17104
#define vmadd_vv_u8m1(...) __riscv_vmadd_vv_u8m1_tu(__VA_ARGS__)
17105
#define vmadd_vx_u8m1(...) __riscv_vmadd_vx_u8m1_tu(__VA_ARGS__)
17106
#define vmadd_vv_u8m2(...) __riscv_vmadd_vv_u8m2_tu(__VA_ARGS__)
17107
#define vmadd_vx_u8m2(...) __riscv_vmadd_vx_u8m2_tu(__VA_ARGS__)
17108
#define vmadd_vv_u8m4(...) __riscv_vmadd_vv_u8m4_tu(__VA_ARGS__)
17109
#define vmadd_vx_u8m4(...) __riscv_vmadd_vx_u8m4_tu(__VA_ARGS__)
17110
#define vmadd_vv_u8m8(...) __riscv_vmadd_vv_u8m8_tu(__VA_ARGS__)
17111
#define vmadd_vx_u8m8(...) __riscv_vmadd_vx_u8m8_tu(__VA_ARGS__)
17112
#define vmadd_vv_u16mf4(...) __riscv_vmadd_vv_u16mf4_tu(__VA_ARGS__)
17113
#define vmadd_vx_u16mf4(...) __riscv_vmadd_vx_u16mf4_tu(__VA_ARGS__)
17114
#define vmadd_vv_u16mf2(...) __riscv_vmadd_vv_u16mf2_tu(__VA_ARGS__)
17115
#define vmadd_vx_u16mf2(...) __riscv_vmadd_vx_u16mf2_tu(__VA_ARGS__)
17116
#define vmadd_vv_u16m1(...) __riscv_vmadd_vv_u16m1_tu(__VA_ARGS__)
17117
#define vmadd_vx_u16m1(...) __riscv_vmadd_vx_u16m1_tu(__VA_ARGS__)
17118
#define vmadd_vv_u16m2(...) __riscv_vmadd_vv_u16m2_tu(__VA_ARGS__)
17119
#define vmadd_vx_u16m2(...) __riscv_vmadd_vx_u16m2_tu(__VA_ARGS__)
17120
#define vmadd_vv_u16m4(...) __riscv_vmadd_vv_u16m4_tu(__VA_ARGS__)
17121
#define vmadd_vx_u16m4(...) __riscv_vmadd_vx_u16m4_tu(__VA_ARGS__)
17122
#define vmadd_vv_u16m8(...) __riscv_vmadd_vv_u16m8_tu(__VA_ARGS__)
17123
#define vmadd_vx_u16m8(...) __riscv_vmadd_vx_u16m8_tu(__VA_ARGS__)
17124
#define vmadd_vv_u32mf2(...) __riscv_vmadd_vv_u32mf2_tu(__VA_ARGS__)
17125
#define vmadd_vx_u32mf2(...) __riscv_vmadd_vx_u32mf2_tu(__VA_ARGS__)
17126
#define vmadd_vv_u32m1(...) __riscv_vmadd_vv_u32m1_tu(__VA_ARGS__)
17127
#define vmadd_vx_u32m1(...) __riscv_vmadd_vx_u32m1_tu(__VA_ARGS__)
17128
#define vmadd_vv_u32m2(...) __riscv_vmadd_vv_u32m2_tu(__VA_ARGS__)
17129
#define vmadd_vx_u32m2(...) __riscv_vmadd_vx_u32m2_tu(__VA_ARGS__)
17130
#define vmadd_vv_u32m4(...) __riscv_vmadd_vv_u32m4_tu(__VA_ARGS__)
17131
#define vmadd_vx_u32m4(...) __riscv_vmadd_vx_u32m4_tu(__VA_ARGS__)
17132
#define vmadd_vv_u32m8(...) __riscv_vmadd_vv_u32m8_tu(__VA_ARGS__)
17133
#define vmadd_vx_u32m8(...) __riscv_vmadd_vx_u32m8_tu(__VA_ARGS__)
17134
#define vmadd_vv_u64m1(...) __riscv_vmadd_vv_u64m1_tu(__VA_ARGS__)
17135
#define vmadd_vx_u64m1(...) __riscv_vmadd_vx_u64m1_tu(__VA_ARGS__)
17136
#define vmadd_vv_u64m2(...) __riscv_vmadd_vv_u64m2_tu(__VA_ARGS__)
17137
#define vmadd_vx_u64m2(...) __riscv_vmadd_vx_u64m2_tu(__VA_ARGS__)
17138
#define vmadd_vv_u64m4(...) __riscv_vmadd_vv_u64m4_tu(__VA_ARGS__)
17139
#define vmadd_vx_u64m4(...) __riscv_vmadd_vx_u64m4_tu(__VA_ARGS__)
17140
#define vmadd_vv_u64m8(...) __riscv_vmadd_vv_u64m8_tu(__VA_ARGS__)
17141
#define vmadd_vx_u64m8(...) __riscv_vmadd_vx_u64m8_tu(__VA_ARGS__)
17142
#define vnmsub_vv_u8mf8(...) __riscv_vnmsub_vv_u8mf8_tu(__VA_ARGS__)
17143
#define vnmsub_vx_u8mf8(...) __riscv_vnmsub_vx_u8mf8_tu(__VA_ARGS__)
17144
#define vnmsub_vv_u8mf4(...) __riscv_vnmsub_vv_u8mf4_tu(__VA_ARGS__)
17145
#define vnmsub_vx_u8mf4(...) __riscv_vnmsub_vx_u8mf4_tu(__VA_ARGS__)
17146
#define vnmsub_vv_u8mf2(...) __riscv_vnmsub_vv_u8mf2_tu(__VA_ARGS__)
17147
#define vnmsub_vx_u8mf2(...) __riscv_vnmsub_vx_u8mf2_tu(__VA_ARGS__)
17148
#define vnmsub_vv_u8m1(...) __riscv_vnmsub_vv_u8m1_tu(__VA_ARGS__)
17149
#define vnmsub_vx_u8m1(...) __riscv_vnmsub_vx_u8m1_tu(__VA_ARGS__)
17150
#define vnmsub_vv_u8m2(...) __riscv_vnmsub_vv_u8m2_tu(__VA_ARGS__)
17151
#define vnmsub_vx_u8m2(...) __riscv_vnmsub_vx_u8m2_tu(__VA_ARGS__)
17152
#define vnmsub_vv_u8m4(...) __riscv_vnmsub_vv_u8m4_tu(__VA_ARGS__)
17153
#define vnmsub_vx_u8m4(...) __riscv_vnmsub_vx_u8m4_tu(__VA_ARGS__)
17154
#define vnmsub_vv_u8m8(...) __riscv_vnmsub_vv_u8m8_tu(__VA_ARGS__)
17155
#define vnmsub_vx_u8m8(...) __riscv_vnmsub_vx_u8m8_tu(__VA_ARGS__)
17156
#define vnmsub_vv_u16mf4(...) __riscv_vnmsub_vv_u16mf4_tu(__VA_ARGS__)
17157
#define vnmsub_vx_u16mf4(...) __riscv_vnmsub_vx_u16mf4_tu(__VA_ARGS__)
17158
#define vnmsub_vv_u16mf2(...) __riscv_vnmsub_vv_u16mf2_tu(__VA_ARGS__)
17159
#define vnmsub_vx_u16mf2(...) __riscv_vnmsub_vx_u16mf2_tu(__VA_ARGS__)
17160
#define vnmsub_vv_u16m1(...) __riscv_vnmsub_vv_u16m1_tu(__VA_ARGS__)
17161
#define vnmsub_vx_u16m1(...) __riscv_vnmsub_vx_u16m1_tu(__VA_ARGS__)
17162
#define vnmsub_vv_u16m2(...) __riscv_vnmsub_vv_u16m2_tu(__VA_ARGS__)
17163
#define vnmsub_vx_u16m2(...) __riscv_vnmsub_vx_u16m2_tu(__VA_ARGS__)
17164
#define vnmsub_vv_u16m4(...) __riscv_vnmsub_vv_u16m4_tu(__VA_ARGS__)
17165
#define vnmsub_vx_u16m4(...) __riscv_vnmsub_vx_u16m4_tu(__VA_ARGS__)
17166
#define vnmsub_vv_u16m8(...) __riscv_vnmsub_vv_u16m8_tu(__VA_ARGS__)
17167
#define vnmsub_vx_u16m8(...) __riscv_vnmsub_vx_u16m8_tu(__VA_ARGS__)
17168
#define vnmsub_vv_u32mf2(...) __riscv_vnmsub_vv_u32mf2_tu(__VA_ARGS__)
17169
#define vnmsub_vx_u32mf2(...) __riscv_vnmsub_vx_u32mf2_tu(__VA_ARGS__)
17170
#define vnmsub_vv_u32m1(...) __riscv_vnmsub_vv_u32m1_tu(__VA_ARGS__)
17171
#define vnmsub_vx_u32m1(...) __riscv_vnmsub_vx_u32m1_tu(__VA_ARGS__)
17172
#define vnmsub_vv_u32m2(...) __riscv_vnmsub_vv_u32m2_tu(__VA_ARGS__)
17173
#define vnmsub_vx_u32m2(...) __riscv_vnmsub_vx_u32m2_tu(__VA_ARGS__)
17174
#define vnmsub_vv_u32m4(...) __riscv_vnmsub_vv_u32m4_tu(__VA_ARGS__)
17175
#define vnmsub_vx_u32m4(...) __riscv_vnmsub_vx_u32m4_tu(__VA_ARGS__)
17176
#define vnmsub_vv_u32m8(...) __riscv_vnmsub_vv_u32m8_tu(__VA_ARGS__)
17177
#define vnmsub_vx_u32m8(...) __riscv_vnmsub_vx_u32m8_tu(__VA_ARGS__)
17178
#define vnmsub_vv_u64m1(...) __riscv_vnmsub_vv_u64m1_tu(__VA_ARGS__)
17179
#define vnmsub_vx_u64m1(...) __riscv_vnmsub_vx_u64m1_tu(__VA_ARGS__)
17180
#define vnmsub_vv_u64m2(...) __riscv_vnmsub_vv_u64m2_tu(__VA_ARGS__)
17181
#define vnmsub_vx_u64m2(...) __riscv_vnmsub_vx_u64m2_tu(__VA_ARGS__)
17182
#define vnmsub_vv_u64m4(...) __riscv_vnmsub_vv_u64m4_tu(__VA_ARGS__)
17183
#define vnmsub_vx_u64m4(...) __riscv_vnmsub_vx_u64m4_tu(__VA_ARGS__)
17184
#define vnmsub_vv_u64m8(...) __riscv_vnmsub_vv_u64m8_tu(__VA_ARGS__)
17185
#define vnmsub_vx_u64m8(...) __riscv_vnmsub_vx_u64m8_tu(__VA_ARGS__)
17186
// masked functions
17187
#define vmacc_vv_i8mf8_m(...) __riscv_vmacc_vv_i8mf8_tumu(__VA_ARGS__)
17188
#define vmacc_vx_i8mf8_m(...) __riscv_vmacc_vx_i8mf8_tumu(__VA_ARGS__)
17189
#define vmacc_vv_i8mf4_m(...) __riscv_vmacc_vv_i8mf4_tumu(__VA_ARGS__)
17190
#define vmacc_vx_i8mf4_m(...) __riscv_vmacc_vx_i8mf4_tumu(__VA_ARGS__)
17191
#define vmacc_vv_i8mf2_m(...) __riscv_vmacc_vv_i8mf2_tumu(__VA_ARGS__)
17192
#define vmacc_vx_i8mf2_m(...) __riscv_vmacc_vx_i8mf2_tumu(__VA_ARGS__)
17193
#define vmacc_vv_i8m1_m(...) __riscv_vmacc_vv_i8m1_tumu(__VA_ARGS__)
17194
#define vmacc_vx_i8m1_m(...) __riscv_vmacc_vx_i8m1_tumu(__VA_ARGS__)
17195
#define vmacc_vv_i8m2_m(...) __riscv_vmacc_vv_i8m2_tumu(__VA_ARGS__)
17196
#define vmacc_vx_i8m2_m(...) __riscv_vmacc_vx_i8m2_tumu(__VA_ARGS__)
17197
#define vmacc_vv_i8m4_m(...) __riscv_vmacc_vv_i8m4_tumu(__VA_ARGS__)
17198
#define vmacc_vx_i8m4_m(...) __riscv_vmacc_vx_i8m4_tumu(__VA_ARGS__)
17199
#define vmacc_vv_i8m8_m(...) __riscv_vmacc_vv_i8m8_tumu(__VA_ARGS__)
17200
#define vmacc_vx_i8m8_m(...) __riscv_vmacc_vx_i8m8_tumu(__VA_ARGS__)
17201
#define vmacc_vv_i16mf4_m(...) __riscv_vmacc_vv_i16mf4_tumu(__VA_ARGS__)
17202
#define vmacc_vx_i16mf4_m(...) __riscv_vmacc_vx_i16mf4_tumu(__VA_ARGS__)
17203
#define vmacc_vv_i16mf2_m(...) __riscv_vmacc_vv_i16mf2_tumu(__VA_ARGS__)
17204
#define vmacc_vx_i16mf2_m(...) __riscv_vmacc_vx_i16mf2_tumu(__VA_ARGS__)
17205
#define vmacc_vv_i16m1_m(...) __riscv_vmacc_vv_i16m1_tumu(__VA_ARGS__)
17206
#define vmacc_vx_i16m1_m(...) __riscv_vmacc_vx_i16m1_tumu(__VA_ARGS__)
17207
#define vmacc_vv_i16m2_m(...) __riscv_vmacc_vv_i16m2_tumu(__VA_ARGS__)
17208
#define vmacc_vx_i16m2_m(...) __riscv_vmacc_vx_i16m2_tumu(__VA_ARGS__)
17209
#define vmacc_vv_i16m4_m(...) __riscv_vmacc_vv_i16m4_tumu(__VA_ARGS__)
17210
#define vmacc_vx_i16m4_m(...) __riscv_vmacc_vx_i16m4_tumu(__VA_ARGS__)
17211
#define vmacc_vv_i16m8_m(...) __riscv_vmacc_vv_i16m8_tumu(__VA_ARGS__)
17212
#define vmacc_vx_i16m8_m(...) __riscv_vmacc_vx_i16m8_tumu(__VA_ARGS__)
17213
#define vmacc_vv_i32mf2_m(...) __riscv_vmacc_vv_i32mf2_tumu(__VA_ARGS__)
17214
#define vmacc_vx_i32mf2_m(...) __riscv_vmacc_vx_i32mf2_tumu(__VA_ARGS__)
17215
#define vmacc_vv_i32m1_m(...) __riscv_vmacc_vv_i32m1_tumu(__VA_ARGS__)
17216
#define vmacc_vx_i32m1_m(...) __riscv_vmacc_vx_i32m1_tumu(__VA_ARGS__)
17217
#define vmacc_vv_i32m2_m(...) __riscv_vmacc_vv_i32m2_tumu(__VA_ARGS__)
17218
#define vmacc_vx_i32m2_m(...) __riscv_vmacc_vx_i32m2_tumu(__VA_ARGS__)
17219
#define vmacc_vv_i32m4_m(...) __riscv_vmacc_vv_i32m4_tumu(__VA_ARGS__)
17220
#define vmacc_vx_i32m4_m(...) __riscv_vmacc_vx_i32m4_tumu(__VA_ARGS__)
17221
#define vmacc_vv_i32m8_m(...) __riscv_vmacc_vv_i32m8_tumu(__VA_ARGS__)
17222
#define vmacc_vx_i32m8_m(...) __riscv_vmacc_vx_i32m8_tumu(__VA_ARGS__)
17223
#define vmacc_vv_i64m1_m(...) __riscv_vmacc_vv_i64m1_tumu(__VA_ARGS__)
17224
#define vmacc_vx_i64m1_m(...) __riscv_vmacc_vx_i64m1_tumu(__VA_ARGS__)
17225
#define vmacc_vv_i64m2_m(...) __riscv_vmacc_vv_i64m2_tumu(__VA_ARGS__)
17226
#define vmacc_vx_i64m2_m(...) __riscv_vmacc_vx_i64m2_tumu(__VA_ARGS__)
17227
#define vmacc_vv_i64m4_m(...) __riscv_vmacc_vv_i64m4_tumu(__VA_ARGS__)
17228
#define vmacc_vx_i64m4_m(...) __riscv_vmacc_vx_i64m4_tumu(__VA_ARGS__)
17229
#define vmacc_vv_i64m8_m(...) __riscv_vmacc_vv_i64m8_tumu(__VA_ARGS__)
17230
#define vmacc_vx_i64m8_m(...) __riscv_vmacc_vx_i64m8_tumu(__VA_ARGS__)
17231
#define vnmsac_vv_i8mf8_m(...) __riscv_vnmsac_vv_i8mf8_tumu(__VA_ARGS__)
17232
#define vnmsac_vx_i8mf8_m(...) __riscv_vnmsac_vx_i8mf8_tumu(__VA_ARGS__)
17233
#define vnmsac_vv_i8mf4_m(...) __riscv_vnmsac_vv_i8mf4_tumu(__VA_ARGS__)
17234
#define vnmsac_vx_i8mf4_m(...) __riscv_vnmsac_vx_i8mf4_tumu(__VA_ARGS__)
17235
#define vnmsac_vv_i8mf2_m(...) __riscv_vnmsac_vv_i8mf2_tumu(__VA_ARGS__)
17236
#define vnmsac_vx_i8mf2_m(...) __riscv_vnmsac_vx_i8mf2_tumu(__VA_ARGS__)
17237
#define vnmsac_vv_i8m1_m(...) __riscv_vnmsac_vv_i8m1_tumu(__VA_ARGS__)
17238
#define vnmsac_vx_i8m1_m(...) __riscv_vnmsac_vx_i8m1_tumu(__VA_ARGS__)
17239
#define vnmsac_vv_i8m2_m(...) __riscv_vnmsac_vv_i8m2_tumu(__VA_ARGS__)
17240
#define vnmsac_vx_i8m2_m(...) __riscv_vnmsac_vx_i8m2_tumu(__VA_ARGS__)
17241
#define vnmsac_vv_i8m4_m(...) __riscv_vnmsac_vv_i8m4_tumu(__VA_ARGS__)
17242
#define vnmsac_vx_i8m4_m(...) __riscv_vnmsac_vx_i8m4_tumu(__VA_ARGS__)
17243
#define vnmsac_vv_i8m8_m(...) __riscv_vnmsac_vv_i8m8_tumu(__VA_ARGS__)
17244
#define vnmsac_vx_i8m8_m(...) __riscv_vnmsac_vx_i8m8_tumu(__VA_ARGS__)
17245
#define vnmsac_vv_i16mf4_m(...) __riscv_vnmsac_vv_i16mf4_tumu(__VA_ARGS__)
17246
#define vnmsac_vx_i16mf4_m(...) __riscv_vnmsac_vx_i16mf4_tumu(__VA_ARGS__)
17247
#define vnmsac_vv_i16mf2_m(...) __riscv_vnmsac_vv_i16mf2_tumu(__VA_ARGS__)
17248
#define vnmsac_vx_i16mf2_m(...) __riscv_vnmsac_vx_i16mf2_tumu(__VA_ARGS__)
17249
#define vnmsac_vv_i16m1_m(...) __riscv_vnmsac_vv_i16m1_tumu(__VA_ARGS__)
17250
#define vnmsac_vx_i16m1_m(...) __riscv_vnmsac_vx_i16m1_tumu(__VA_ARGS__)
17251
#define vnmsac_vv_i16m2_m(...) __riscv_vnmsac_vv_i16m2_tumu(__VA_ARGS__)
17252
#define vnmsac_vx_i16m2_m(...) __riscv_vnmsac_vx_i16m2_tumu(__VA_ARGS__)
17253
#define vnmsac_vv_i16m4_m(...) __riscv_vnmsac_vv_i16m4_tumu(__VA_ARGS__)
17254
#define vnmsac_vx_i16m4_m(...) __riscv_vnmsac_vx_i16m4_tumu(__VA_ARGS__)
17255
#define vnmsac_vv_i16m8_m(...) __riscv_vnmsac_vv_i16m8_tumu(__VA_ARGS__)
17256
#define vnmsac_vx_i16m8_m(...) __riscv_vnmsac_vx_i16m8_tumu(__VA_ARGS__)
17257
#define vnmsac_vv_i32mf2_m(...) __riscv_vnmsac_vv_i32mf2_tumu(__VA_ARGS__)
17258
#define vnmsac_vx_i32mf2_m(...) __riscv_vnmsac_vx_i32mf2_tumu(__VA_ARGS__)
17259
#define vnmsac_vv_i32m1_m(...) __riscv_vnmsac_vv_i32m1_tumu(__VA_ARGS__)
17260
#define vnmsac_vx_i32m1_m(...) __riscv_vnmsac_vx_i32m1_tumu(__VA_ARGS__)
17261
#define vnmsac_vv_i32m2_m(...) __riscv_vnmsac_vv_i32m2_tumu(__VA_ARGS__)
17262
#define vnmsac_vx_i32m2_m(...) __riscv_vnmsac_vx_i32m2_tumu(__VA_ARGS__)
17263
#define vnmsac_vv_i32m4_m(...) __riscv_vnmsac_vv_i32m4_tumu(__VA_ARGS__)
17264
#define vnmsac_vx_i32m4_m(...) __riscv_vnmsac_vx_i32m4_tumu(__VA_ARGS__)
17265
#define vnmsac_vv_i32m8_m(...) __riscv_vnmsac_vv_i32m8_tumu(__VA_ARGS__)
17266
#define vnmsac_vx_i32m8_m(...) __riscv_vnmsac_vx_i32m8_tumu(__VA_ARGS__)
17267
#define vnmsac_vv_i64m1_m(...) __riscv_vnmsac_vv_i64m1_tumu(__VA_ARGS__)
17268
#define vnmsac_vx_i64m1_m(...) __riscv_vnmsac_vx_i64m1_tumu(__VA_ARGS__)
17269
#define vnmsac_vv_i64m2_m(...) __riscv_vnmsac_vv_i64m2_tumu(__VA_ARGS__)
17270
#define vnmsac_vx_i64m2_m(...) __riscv_vnmsac_vx_i64m2_tumu(__VA_ARGS__)
17271
#define vnmsac_vv_i64m4_m(...) __riscv_vnmsac_vv_i64m4_tumu(__VA_ARGS__)
17272
#define vnmsac_vx_i64m4_m(...) __riscv_vnmsac_vx_i64m4_tumu(__VA_ARGS__)
17273
#define vnmsac_vv_i64m8_m(...) __riscv_vnmsac_vv_i64m8_tumu(__VA_ARGS__)
17274
#define vnmsac_vx_i64m8_m(...) __riscv_vnmsac_vx_i64m8_tumu(__VA_ARGS__)
17275
#define vmadd_vv_i8mf8_m(...) __riscv_vmadd_vv_i8mf8_tumu(__VA_ARGS__)
17276
#define vmadd_vx_i8mf8_m(...) __riscv_vmadd_vx_i8mf8_tumu(__VA_ARGS__)
17277
#define vmadd_vv_i8mf4_m(...) __riscv_vmadd_vv_i8mf4_tumu(__VA_ARGS__)
17278
#define vmadd_vx_i8mf4_m(...) __riscv_vmadd_vx_i8mf4_tumu(__VA_ARGS__)
17279
#define vmadd_vv_i8mf2_m(...) __riscv_vmadd_vv_i8mf2_tumu(__VA_ARGS__)
17280
#define vmadd_vx_i8mf2_m(...) __riscv_vmadd_vx_i8mf2_tumu(__VA_ARGS__)
17281
#define vmadd_vv_i8m1_m(...) __riscv_vmadd_vv_i8m1_tumu(__VA_ARGS__)
17282
#define vmadd_vx_i8m1_m(...) __riscv_vmadd_vx_i8m1_tumu(__VA_ARGS__)
17283
#define vmadd_vv_i8m2_m(...) __riscv_vmadd_vv_i8m2_tumu(__VA_ARGS__)
17284
#define vmadd_vx_i8m2_m(...) __riscv_vmadd_vx_i8m2_tumu(__VA_ARGS__)
17285
#define vmadd_vv_i8m4_m(...) __riscv_vmadd_vv_i8m4_tumu(__VA_ARGS__)
17286
#define vmadd_vx_i8m4_m(...) __riscv_vmadd_vx_i8m4_tumu(__VA_ARGS__)
17287
#define vmadd_vv_i8m8_m(...) __riscv_vmadd_vv_i8m8_tumu(__VA_ARGS__)
17288
#define vmadd_vx_i8m8_m(...) __riscv_vmadd_vx_i8m8_tumu(__VA_ARGS__)
17289
#define vmadd_vv_i16mf4_m(...) __riscv_vmadd_vv_i16mf4_tumu(__VA_ARGS__)
17290
#define vmadd_vx_i16mf4_m(...) __riscv_vmadd_vx_i16mf4_tumu(__VA_ARGS__)
17291
#define vmadd_vv_i16mf2_m(...) __riscv_vmadd_vv_i16mf2_tumu(__VA_ARGS__)
17292
#define vmadd_vx_i16mf2_m(...) __riscv_vmadd_vx_i16mf2_tumu(__VA_ARGS__)
17293
#define vmadd_vv_i16m1_m(...) __riscv_vmadd_vv_i16m1_tumu(__VA_ARGS__)
17294
#define vmadd_vx_i16m1_m(...) __riscv_vmadd_vx_i16m1_tumu(__VA_ARGS__)
17295
#define vmadd_vv_i16m2_m(...) __riscv_vmadd_vv_i16m2_tumu(__VA_ARGS__)
17296
#define vmadd_vx_i16m2_m(...) __riscv_vmadd_vx_i16m2_tumu(__VA_ARGS__)
17297
#define vmadd_vv_i16m4_m(...) __riscv_vmadd_vv_i16m4_tumu(__VA_ARGS__)
17298
#define vmadd_vx_i16m4_m(...) __riscv_vmadd_vx_i16m4_tumu(__VA_ARGS__)
17299
#define vmadd_vv_i16m8_m(...) __riscv_vmadd_vv_i16m8_tumu(__VA_ARGS__)
17300
#define vmadd_vx_i16m8_m(...) __riscv_vmadd_vx_i16m8_tumu(__VA_ARGS__)
17301
#define vmadd_vv_i32mf2_m(...) __riscv_vmadd_vv_i32mf2_tumu(__VA_ARGS__)
17302
#define vmadd_vx_i32mf2_m(...) __riscv_vmadd_vx_i32mf2_tumu(__VA_ARGS__)
17303
#define vmadd_vv_i32m1_m(...) __riscv_vmadd_vv_i32m1_tumu(__VA_ARGS__)
17304
#define vmadd_vx_i32m1_m(...) __riscv_vmadd_vx_i32m1_tumu(__VA_ARGS__)
17305
#define vmadd_vv_i32m2_m(...) __riscv_vmadd_vv_i32m2_tumu(__VA_ARGS__)
17306
#define vmadd_vx_i32m2_m(...) __riscv_vmadd_vx_i32m2_tumu(__VA_ARGS__)
17307
#define vmadd_vv_i32m4_m(...) __riscv_vmadd_vv_i32m4_tumu(__VA_ARGS__)
17308
#define vmadd_vx_i32m4_m(...) __riscv_vmadd_vx_i32m4_tumu(__VA_ARGS__)
17309
#define vmadd_vv_i32m8_m(...) __riscv_vmadd_vv_i32m8_tumu(__VA_ARGS__)
17310
#define vmadd_vx_i32m8_m(...) __riscv_vmadd_vx_i32m8_tumu(__VA_ARGS__)
17311
#define vmadd_vv_i64m1_m(...) __riscv_vmadd_vv_i64m1_tumu(__VA_ARGS__)
17312
#define vmadd_vx_i64m1_m(...) __riscv_vmadd_vx_i64m1_tumu(__VA_ARGS__)
17313
#define vmadd_vv_i64m2_m(...) __riscv_vmadd_vv_i64m2_tumu(__VA_ARGS__)
17314
#define vmadd_vx_i64m2_m(...) __riscv_vmadd_vx_i64m2_tumu(__VA_ARGS__)
17315
#define vmadd_vv_i64m4_m(...) __riscv_vmadd_vv_i64m4_tumu(__VA_ARGS__)
17316
#define vmadd_vx_i64m4_m(...) __riscv_vmadd_vx_i64m4_tumu(__VA_ARGS__)
17317
#define vmadd_vv_i64m8_m(...) __riscv_vmadd_vv_i64m8_tumu(__VA_ARGS__)
17318
#define vmadd_vx_i64m8_m(...) __riscv_vmadd_vx_i64m8_tumu(__VA_ARGS__)
17319
#define vnmsub_vv_i8mf8_m(...) __riscv_vnmsub_vv_i8mf8_tumu(__VA_ARGS__)
17320
#define vnmsub_vx_i8mf8_m(...) __riscv_vnmsub_vx_i8mf8_tumu(__VA_ARGS__)
17321
#define vnmsub_vv_i8mf4_m(...) __riscv_vnmsub_vv_i8mf4_tumu(__VA_ARGS__)
17322
#define vnmsub_vx_i8mf4_m(...) __riscv_vnmsub_vx_i8mf4_tumu(__VA_ARGS__)
17323
#define vnmsub_vv_i8mf2_m(...) __riscv_vnmsub_vv_i8mf2_tumu(__VA_ARGS__)
17324
#define vnmsub_vx_i8mf2_m(...) __riscv_vnmsub_vx_i8mf2_tumu(__VA_ARGS__)
17325
#define vnmsub_vv_i8m1_m(...) __riscv_vnmsub_vv_i8m1_tumu(__VA_ARGS__)
17326
#define vnmsub_vx_i8m1_m(...) __riscv_vnmsub_vx_i8m1_tumu(__VA_ARGS__)
17327
#define vnmsub_vv_i8m2_m(...) __riscv_vnmsub_vv_i8m2_tumu(__VA_ARGS__)
17328
#define vnmsub_vx_i8m2_m(...) __riscv_vnmsub_vx_i8m2_tumu(__VA_ARGS__)
17329
#define vnmsub_vv_i8m4_m(...) __riscv_vnmsub_vv_i8m4_tumu(__VA_ARGS__)
17330
#define vnmsub_vx_i8m4_m(...) __riscv_vnmsub_vx_i8m4_tumu(__VA_ARGS__)
17331
#define vnmsub_vv_i8m8_m(...) __riscv_vnmsub_vv_i8m8_tumu(__VA_ARGS__)
17332
#define vnmsub_vx_i8m8_m(...) __riscv_vnmsub_vx_i8m8_tumu(__VA_ARGS__)
17333
#define vnmsub_vv_i16mf4_m(...) __riscv_vnmsub_vv_i16mf4_tumu(__VA_ARGS__)
17334
#define vnmsub_vx_i16mf4_m(...) __riscv_vnmsub_vx_i16mf4_tumu(__VA_ARGS__)
17335
#define vnmsub_vv_i16mf2_m(...) __riscv_vnmsub_vv_i16mf2_tumu(__VA_ARGS__)
17336
#define vnmsub_vx_i16mf2_m(...) __riscv_vnmsub_vx_i16mf2_tumu(__VA_ARGS__)
17337
#define vnmsub_vv_i16m1_m(...) __riscv_vnmsub_vv_i16m1_tumu(__VA_ARGS__)
17338
#define vnmsub_vx_i16m1_m(...) __riscv_vnmsub_vx_i16m1_tumu(__VA_ARGS__)
17339
#define vnmsub_vv_i16m2_m(...) __riscv_vnmsub_vv_i16m2_tumu(__VA_ARGS__)
17340
#define vnmsub_vx_i16m2_m(...) __riscv_vnmsub_vx_i16m2_tumu(__VA_ARGS__)
17341
#define vnmsub_vv_i16m4_m(...) __riscv_vnmsub_vv_i16m4_tumu(__VA_ARGS__)
17342
#define vnmsub_vx_i16m4_m(...) __riscv_vnmsub_vx_i16m4_tumu(__VA_ARGS__)
17343
#define vnmsub_vv_i16m8_m(...) __riscv_vnmsub_vv_i16m8_tumu(__VA_ARGS__)
17344
#define vnmsub_vx_i16m8_m(...) __riscv_vnmsub_vx_i16m8_tumu(__VA_ARGS__)
17345
#define vnmsub_vv_i32mf2_m(...) __riscv_vnmsub_vv_i32mf2_tumu(__VA_ARGS__)
17346
#define vnmsub_vx_i32mf2_m(...) __riscv_vnmsub_vx_i32mf2_tumu(__VA_ARGS__)
17347
#define vnmsub_vv_i32m1_m(...) __riscv_vnmsub_vv_i32m1_tumu(__VA_ARGS__)
17348
#define vnmsub_vx_i32m1_m(...) __riscv_vnmsub_vx_i32m1_tumu(__VA_ARGS__)
17349
#define vnmsub_vv_i32m2_m(...) __riscv_vnmsub_vv_i32m2_tumu(__VA_ARGS__)
17350
#define vnmsub_vx_i32m2_m(...) __riscv_vnmsub_vx_i32m2_tumu(__VA_ARGS__)
17351
#define vnmsub_vv_i32m4_m(...) __riscv_vnmsub_vv_i32m4_tumu(__VA_ARGS__)
17352
#define vnmsub_vx_i32m4_m(...) __riscv_vnmsub_vx_i32m4_tumu(__VA_ARGS__)
17353
#define vnmsub_vv_i32m8_m(...) __riscv_vnmsub_vv_i32m8_tumu(__VA_ARGS__)
17354
#define vnmsub_vx_i32m8_m(...) __riscv_vnmsub_vx_i32m8_tumu(__VA_ARGS__)
17355
#define vnmsub_vv_i64m1_m(...) __riscv_vnmsub_vv_i64m1_tumu(__VA_ARGS__)
17356
#define vnmsub_vx_i64m1_m(...) __riscv_vnmsub_vx_i64m1_tumu(__VA_ARGS__)
17357
#define vnmsub_vv_i64m2_m(...) __riscv_vnmsub_vv_i64m2_tumu(__VA_ARGS__)
17358
#define vnmsub_vx_i64m2_m(...) __riscv_vnmsub_vx_i64m2_tumu(__VA_ARGS__)
17359
#define vnmsub_vv_i64m4_m(...) __riscv_vnmsub_vv_i64m4_tumu(__VA_ARGS__)
17360
#define vnmsub_vx_i64m4_m(...) __riscv_vnmsub_vx_i64m4_tumu(__VA_ARGS__)
17361
#define vnmsub_vv_i64m8_m(...) __riscv_vnmsub_vv_i64m8_tumu(__VA_ARGS__)
17362
#define vnmsub_vx_i64m8_m(...) __riscv_vnmsub_vx_i64m8_tumu(__VA_ARGS__)
17363
#define vmacc_vv_u8mf8_m(...) __riscv_vmacc_vv_u8mf8_tumu(__VA_ARGS__)
17364
#define vmacc_vx_u8mf8_m(...) __riscv_vmacc_vx_u8mf8_tumu(__VA_ARGS__)
17365
#define vmacc_vv_u8mf4_m(...) __riscv_vmacc_vv_u8mf4_tumu(__VA_ARGS__)
17366
#define vmacc_vx_u8mf4_m(...) __riscv_vmacc_vx_u8mf4_tumu(__VA_ARGS__)
17367
#define vmacc_vv_u8mf2_m(...) __riscv_vmacc_vv_u8mf2_tumu(__VA_ARGS__)
17368
#define vmacc_vx_u8mf2_m(...) __riscv_vmacc_vx_u8mf2_tumu(__VA_ARGS__)
17369
#define vmacc_vv_u8m1_m(...) __riscv_vmacc_vv_u8m1_tumu(__VA_ARGS__)
17370
#define vmacc_vx_u8m1_m(...) __riscv_vmacc_vx_u8m1_tumu(__VA_ARGS__)
17371
#define vmacc_vv_u8m2_m(...) __riscv_vmacc_vv_u8m2_tumu(__VA_ARGS__)
17372
#define vmacc_vx_u8m2_m(...) __riscv_vmacc_vx_u8m2_tumu(__VA_ARGS__)
17373
#define vmacc_vv_u8m4_m(...) __riscv_vmacc_vv_u8m4_tumu(__VA_ARGS__)
17374
#define vmacc_vx_u8m4_m(...) __riscv_vmacc_vx_u8m4_tumu(__VA_ARGS__)
17375
#define vmacc_vv_u8m8_m(...) __riscv_vmacc_vv_u8m8_tumu(__VA_ARGS__)
17376
#define vmacc_vx_u8m8_m(...) __riscv_vmacc_vx_u8m8_tumu(__VA_ARGS__)
17377
#define vmacc_vv_u16mf4_m(...) __riscv_vmacc_vv_u16mf4_tumu(__VA_ARGS__)
17378
#define vmacc_vx_u16mf4_m(...) __riscv_vmacc_vx_u16mf4_tumu(__VA_ARGS__)
17379
#define vmacc_vv_u16mf2_m(...) __riscv_vmacc_vv_u16mf2_tumu(__VA_ARGS__)
17380
#define vmacc_vx_u16mf2_m(...) __riscv_vmacc_vx_u16mf2_tumu(__VA_ARGS__)
17381
#define vmacc_vv_u16m1_m(...) __riscv_vmacc_vv_u16m1_tumu(__VA_ARGS__)
17382
#define vmacc_vx_u16m1_m(...) __riscv_vmacc_vx_u16m1_tumu(__VA_ARGS__)
17383
#define vmacc_vv_u16m2_m(...) __riscv_vmacc_vv_u16m2_tumu(__VA_ARGS__)
17384
#define vmacc_vx_u16m2_m(...) __riscv_vmacc_vx_u16m2_tumu(__VA_ARGS__)
17385
#define vmacc_vv_u16m4_m(...) __riscv_vmacc_vv_u16m4_tumu(__VA_ARGS__)
17386
#define vmacc_vx_u16m4_m(...) __riscv_vmacc_vx_u16m4_tumu(__VA_ARGS__)
17387
#define vmacc_vv_u16m8_m(...) __riscv_vmacc_vv_u16m8_tumu(__VA_ARGS__)
17388
#define vmacc_vx_u16m8_m(...) __riscv_vmacc_vx_u16m8_tumu(__VA_ARGS__)
17389
#define vmacc_vv_u32mf2_m(...) __riscv_vmacc_vv_u32mf2_tumu(__VA_ARGS__)
17390
#define vmacc_vx_u32mf2_m(...) __riscv_vmacc_vx_u32mf2_tumu(__VA_ARGS__)
17391
#define vmacc_vv_u32m1_m(...) __riscv_vmacc_vv_u32m1_tumu(__VA_ARGS__)
17392
#define vmacc_vx_u32m1_m(...) __riscv_vmacc_vx_u32m1_tumu(__VA_ARGS__)
17393
#define vmacc_vv_u32m2_m(...) __riscv_vmacc_vv_u32m2_tumu(__VA_ARGS__)
17394
#define vmacc_vx_u32m2_m(...) __riscv_vmacc_vx_u32m2_tumu(__VA_ARGS__)
17395
#define vmacc_vv_u32m4_m(...) __riscv_vmacc_vv_u32m4_tumu(__VA_ARGS__)
17396
#define vmacc_vx_u32m4_m(...) __riscv_vmacc_vx_u32m4_tumu(__VA_ARGS__)
17397
#define vmacc_vv_u32m8_m(...) __riscv_vmacc_vv_u32m8_tumu(__VA_ARGS__)
17398
#define vmacc_vx_u32m8_m(...) __riscv_vmacc_vx_u32m8_tumu(__VA_ARGS__)
17399
#define vmacc_vv_u64m1_m(...) __riscv_vmacc_vv_u64m1_tumu(__VA_ARGS__)
17400
#define vmacc_vx_u64m1_m(...) __riscv_vmacc_vx_u64m1_tumu(__VA_ARGS__)
17401
#define vmacc_vv_u64m2_m(...) __riscv_vmacc_vv_u64m2_tumu(__VA_ARGS__)
17402
#define vmacc_vx_u64m2_m(...) __riscv_vmacc_vx_u64m2_tumu(__VA_ARGS__)
17403
#define vmacc_vv_u64m4_m(...) __riscv_vmacc_vv_u64m4_tumu(__VA_ARGS__)
17404
#define vmacc_vx_u64m4_m(...) __riscv_vmacc_vx_u64m4_tumu(__VA_ARGS__)
17405
#define vmacc_vv_u64m8_m(...) __riscv_vmacc_vv_u64m8_tumu(__VA_ARGS__)
17406
#define vmacc_vx_u64m8_m(...) __riscv_vmacc_vx_u64m8_tumu(__VA_ARGS__)
17407
#define vnmsac_vv_u8mf8_m(...) __riscv_vnmsac_vv_u8mf8_tumu(__VA_ARGS__)
17408
#define vnmsac_vx_u8mf8_m(...) __riscv_vnmsac_vx_u8mf8_tumu(__VA_ARGS__)
17409
#define vnmsac_vv_u8mf4_m(...) __riscv_vnmsac_vv_u8mf4_tumu(__VA_ARGS__)
17410
#define vnmsac_vx_u8mf4_m(...) __riscv_vnmsac_vx_u8mf4_tumu(__VA_ARGS__)
17411
#define vnmsac_vv_u8mf2_m(...) __riscv_vnmsac_vv_u8mf2_tumu(__VA_ARGS__)
17412
#define vnmsac_vx_u8mf2_m(...) __riscv_vnmsac_vx_u8mf2_tumu(__VA_ARGS__)
17413
#define vnmsac_vv_u8m1_m(...) __riscv_vnmsac_vv_u8m1_tumu(__VA_ARGS__)
17414
#define vnmsac_vx_u8m1_m(...) __riscv_vnmsac_vx_u8m1_tumu(__VA_ARGS__)
17415
#define vnmsac_vv_u8m2_m(...) __riscv_vnmsac_vv_u8m2_tumu(__VA_ARGS__)
17416
#define vnmsac_vx_u8m2_m(...) __riscv_vnmsac_vx_u8m2_tumu(__VA_ARGS__)
17417
#define vnmsac_vv_u8m4_m(...) __riscv_vnmsac_vv_u8m4_tumu(__VA_ARGS__)
17418
#define vnmsac_vx_u8m4_m(...) __riscv_vnmsac_vx_u8m4_tumu(__VA_ARGS__)
17419
#define vnmsac_vv_u8m8_m(...) __riscv_vnmsac_vv_u8m8_tumu(__VA_ARGS__)
17420
#define vnmsac_vx_u8m8_m(...) __riscv_vnmsac_vx_u8m8_tumu(__VA_ARGS__)
17421
#define vnmsac_vv_u16mf4_m(...) __riscv_vnmsac_vv_u16mf4_tumu(__VA_ARGS__)
17422
#define vnmsac_vx_u16mf4_m(...) __riscv_vnmsac_vx_u16mf4_tumu(__VA_ARGS__)
17423
#define vnmsac_vv_u16mf2_m(...) __riscv_vnmsac_vv_u16mf2_tumu(__VA_ARGS__)
17424
#define vnmsac_vx_u16mf2_m(...) __riscv_vnmsac_vx_u16mf2_tumu(__VA_ARGS__)
17425
#define vnmsac_vv_u16m1_m(...) __riscv_vnmsac_vv_u16m1_tumu(__VA_ARGS__)
17426
#define vnmsac_vx_u16m1_m(...) __riscv_vnmsac_vx_u16m1_tumu(__VA_ARGS__)
17427
#define vnmsac_vv_u16m2_m(...) __riscv_vnmsac_vv_u16m2_tumu(__VA_ARGS__)
17428
#define vnmsac_vx_u16m2_m(...) __riscv_vnmsac_vx_u16m2_tumu(__VA_ARGS__)
17429
#define vnmsac_vv_u16m4_m(...) __riscv_vnmsac_vv_u16m4_tumu(__VA_ARGS__)
17430
#define vnmsac_vx_u16m4_m(...) __riscv_vnmsac_vx_u16m4_tumu(__VA_ARGS__)
17431
#define vnmsac_vv_u16m8_m(...) __riscv_vnmsac_vv_u16m8_tumu(__VA_ARGS__)
17432
#define vnmsac_vx_u16m8_m(...) __riscv_vnmsac_vx_u16m8_tumu(__VA_ARGS__)
17433
#define vnmsac_vv_u32mf2_m(...) __riscv_vnmsac_vv_u32mf2_tumu(__VA_ARGS__)
17434
#define vnmsac_vx_u32mf2_m(...) __riscv_vnmsac_vx_u32mf2_tumu(__VA_ARGS__)
17435
#define vnmsac_vv_u32m1_m(...) __riscv_vnmsac_vv_u32m1_tumu(__VA_ARGS__)
17436
#define vnmsac_vx_u32m1_m(...) __riscv_vnmsac_vx_u32m1_tumu(__VA_ARGS__)
17437
#define vnmsac_vv_u32m2_m(...) __riscv_vnmsac_vv_u32m2_tumu(__VA_ARGS__)
17438
#define vnmsac_vx_u32m2_m(...) __riscv_vnmsac_vx_u32m2_tumu(__VA_ARGS__)
17439
#define vnmsac_vv_u32m4_m(...) __riscv_vnmsac_vv_u32m4_tumu(__VA_ARGS__)
17440
#define vnmsac_vx_u32m4_m(...) __riscv_vnmsac_vx_u32m4_tumu(__VA_ARGS__)
17441
#define vnmsac_vv_u32m8_m(...) __riscv_vnmsac_vv_u32m8_tumu(__VA_ARGS__)
17442
#define vnmsac_vx_u32m8_m(...) __riscv_vnmsac_vx_u32m8_tumu(__VA_ARGS__)
17443
#define vnmsac_vv_u64m1_m(...) __riscv_vnmsac_vv_u64m1_tumu(__VA_ARGS__)
17444
#define vnmsac_vx_u64m1_m(...) __riscv_vnmsac_vx_u64m1_tumu(__VA_ARGS__)
17445
#define vnmsac_vv_u64m2_m(...) __riscv_vnmsac_vv_u64m2_tumu(__VA_ARGS__)
17446
#define vnmsac_vx_u64m2_m(...) __riscv_vnmsac_vx_u64m2_tumu(__VA_ARGS__)
17447
#define vnmsac_vv_u64m4_m(...) __riscv_vnmsac_vv_u64m4_tumu(__VA_ARGS__)
17448
#define vnmsac_vx_u64m4_m(...) __riscv_vnmsac_vx_u64m4_tumu(__VA_ARGS__)
17449
#define vnmsac_vv_u64m8_m(...) __riscv_vnmsac_vv_u64m8_tumu(__VA_ARGS__)
17450
#define vnmsac_vx_u64m8_m(...) __riscv_vnmsac_vx_u64m8_tumu(__VA_ARGS__)
17451
#define vmadd_vv_u8mf8_m(...) __riscv_vmadd_vv_u8mf8_tumu(__VA_ARGS__)
17452
#define vmadd_vx_u8mf8_m(...) __riscv_vmadd_vx_u8mf8_tumu(__VA_ARGS__)
17453
#define vmadd_vv_u8mf4_m(...) __riscv_vmadd_vv_u8mf4_tumu(__VA_ARGS__)
17454
#define vmadd_vx_u8mf4_m(...) __riscv_vmadd_vx_u8mf4_tumu(__VA_ARGS__)
17455
#define vmadd_vv_u8mf2_m(...) __riscv_vmadd_vv_u8mf2_tumu(__VA_ARGS__)
17456
#define vmadd_vx_u8mf2_m(...) __riscv_vmadd_vx_u8mf2_tumu(__VA_ARGS__)
17457
#define vmadd_vv_u8m1_m(...) __riscv_vmadd_vv_u8m1_tumu(__VA_ARGS__)
17458
#define vmadd_vx_u8m1_m(...) __riscv_vmadd_vx_u8m1_tumu(__VA_ARGS__)
17459
#define vmadd_vv_u8m2_m(...) __riscv_vmadd_vv_u8m2_tumu(__VA_ARGS__)
17460
#define vmadd_vx_u8m2_m(...) __riscv_vmadd_vx_u8m2_tumu(__VA_ARGS__)
17461
#define vmadd_vv_u8m4_m(...) __riscv_vmadd_vv_u8m4_tumu(__VA_ARGS__)
17462
#define vmadd_vx_u8m4_m(...) __riscv_vmadd_vx_u8m4_tumu(__VA_ARGS__)
17463
#define vmadd_vv_u8m8_m(...) __riscv_vmadd_vv_u8m8_tumu(__VA_ARGS__)
17464
#define vmadd_vx_u8m8_m(...) __riscv_vmadd_vx_u8m8_tumu(__VA_ARGS__)
17465
#define vmadd_vv_u16mf4_m(...) __riscv_vmadd_vv_u16mf4_tumu(__VA_ARGS__)
17466
#define vmadd_vx_u16mf4_m(...) __riscv_vmadd_vx_u16mf4_tumu(__VA_ARGS__)
17467
#define vmadd_vv_u16mf2_m(...) __riscv_vmadd_vv_u16mf2_tumu(__VA_ARGS__)
17468
#define vmadd_vx_u16mf2_m(...) __riscv_vmadd_vx_u16mf2_tumu(__VA_ARGS__)
17469
#define vmadd_vv_u16m1_m(...) __riscv_vmadd_vv_u16m1_tumu(__VA_ARGS__)
17470
#define vmadd_vx_u16m1_m(...) __riscv_vmadd_vx_u16m1_tumu(__VA_ARGS__)
17471
#define vmadd_vv_u16m2_m(...) __riscv_vmadd_vv_u16m2_tumu(__VA_ARGS__)
17472
#define vmadd_vx_u16m2_m(...) __riscv_vmadd_vx_u16m2_tumu(__VA_ARGS__)
17473
#define vmadd_vv_u16m4_m(...) __riscv_vmadd_vv_u16m4_tumu(__VA_ARGS__)
17474
#define vmadd_vx_u16m4_m(...) __riscv_vmadd_vx_u16m4_tumu(__VA_ARGS__)
17475
#define vmadd_vv_u16m8_m(...) __riscv_vmadd_vv_u16m8_tumu(__VA_ARGS__)
17476
#define vmadd_vx_u16m8_m(...) __riscv_vmadd_vx_u16m8_tumu(__VA_ARGS__)
17477
#define vmadd_vv_u32mf2_m(...) __riscv_vmadd_vv_u32mf2_tumu(__VA_ARGS__)
17478
#define vmadd_vx_u32mf2_m(...) __riscv_vmadd_vx_u32mf2_tumu(__VA_ARGS__)
17479
#define vmadd_vv_u32m1_m(...) __riscv_vmadd_vv_u32m1_tumu(__VA_ARGS__)
17480
#define vmadd_vx_u32m1_m(...) __riscv_vmadd_vx_u32m1_tumu(__VA_ARGS__)
17481
#define vmadd_vv_u32m2_m(...) __riscv_vmadd_vv_u32m2_tumu(__VA_ARGS__)
17482
#define vmadd_vx_u32m2_m(...) __riscv_vmadd_vx_u32m2_tumu(__VA_ARGS__)
17483
#define vmadd_vv_u32m4_m(...) __riscv_vmadd_vv_u32m4_tumu(__VA_ARGS__)
17484
#define vmadd_vx_u32m4_m(...) __riscv_vmadd_vx_u32m4_tumu(__VA_ARGS__)
17485
#define vmadd_vv_u32m8_m(...) __riscv_vmadd_vv_u32m8_tumu(__VA_ARGS__)
17486
#define vmadd_vx_u32m8_m(...) __riscv_vmadd_vx_u32m8_tumu(__VA_ARGS__)
17487
#define vmadd_vv_u64m1_m(...) __riscv_vmadd_vv_u64m1_tumu(__VA_ARGS__)
17488
#define vmadd_vx_u64m1_m(...) __riscv_vmadd_vx_u64m1_tumu(__VA_ARGS__)
17489
#define vmadd_vv_u64m2_m(...) __riscv_vmadd_vv_u64m2_tumu(__VA_ARGS__)
17490
#define vmadd_vx_u64m2_m(...) __riscv_vmadd_vx_u64m2_tumu(__VA_ARGS__)
17491
#define vmadd_vv_u64m4_m(...) __riscv_vmadd_vv_u64m4_tumu(__VA_ARGS__)
17492
#define vmadd_vx_u64m4_m(...) __riscv_vmadd_vx_u64m4_tumu(__VA_ARGS__)
17493
#define vmadd_vv_u64m8_m(...) __riscv_vmadd_vv_u64m8_tumu(__VA_ARGS__)
17494
#define vmadd_vx_u64m8_m(...) __riscv_vmadd_vx_u64m8_tumu(__VA_ARGS__)
17495
#define vnmsub_vv_u8mf8_m(...) __riscv_vnmsub_vv_u8mf8_tumu(__VA_ARGS__)
17496
#define vnmsub_vx_u8mf8_m(...) __riscv_vnmsub_vx_u8mf8_tumu(__VA_ARGS__)
17497
#define vnmsub_vv_u8mf4_m(...) __riscv_vnmsub_vv_u8mf4_tumu(__VA_ARGS__)
17498
#define vnmsub_vx_u8mf4_m(...) __riscv_vnmsub_vx_u8mf4_tumu(__VA_ARGS__)
17499
#define vnmsub_vv_u8mf2_m(...) __riscv_vnmsub_vv_u8mf2_tumu(__VA_ARGS__)
17500
#define vnmsub_vx_u8mf2_m(...) __riscv_vnmsub_vx_u8mf2_tumu(__VA_ARGS__)
17501
#define vnmsub_vv_u8m1_m(...) __riscv_vnmsub_vv_u8m1_tumu(__VA_ARGS__)
17502
#define vnmsub_vx_u8m1_m(...) __riscv_vnmsub_vx_u8m1_tumu(__VA_ARGS__)
17503
#define vnmsub_vv_u8m2_m(...) __riscv_vnmsub_vv_u8m2_tumu(__VA_ARGS__)
17504
#define vnmsub_vx_u8m2_m(...) __riscv_vnmsub_vx_u8m2_tumu(__VA_ARGS__)
17505
#define vnmsub_vv_u8m4_m(...) __riscv_vnmsub_vv_u8m4_tumu(__VA_ARGS__)
17506
#define vnmsub_vx_u8m4_m(...) __riscv_vnmsub_vx_u8m4_tumu(__VA_ARGS__)
17507
#define vnmsub_vv_u8m8_m(...) __riscv_vnmsub_vv_u8m8_tumu(__VA_ARGS__)
17508
#define vnmsub_vx_u8m8_m(...) __riscv_vnmsub_vx_u8m8_tumu(__VA_ARGS__)
17509
#define vnmsub_vv_u16mf4_m(...) __riscv_vnmsub_vv_u16mf4_tumu(__VA_ARGS__)
17510
#define vnmsub_vx_u16mf4_m(...) __riscv_vnmsub_vx_u16mf4_tumu(__VA_ARGS__)
17511
#define vnmsub_vv_u16mf2_m(...) __riscv_vnmsub_vv_u16mf2_tumu(__VA_ARGS__)
17512
#define vnmsub_vx_u16mf2_m(...) __riscv_vnmsub_vx_u16mf2_tumu(__VA_ARGS__)
17513
#define vnmsub_vv_u16m1_m(...) __riscv_vnmsub_vv_u16m1_tumu(__VA_ARGS__)
17514
#define vnmsub_vx_u16m1_m(...) __riscv_vnmsub_vx_u16m1_tumu(__VA_ARGS__)
17515
#define vnmsub_vv_u16m2_m(...) __riscv_vnmsub_vv_u16m2_tumu(__VA_ARGS__)
17516
#define vnmsub_vx_u16m2_m(...) __riscv_vnmsub_vx_u16m2_tumu(__VA_ARGS__)
17517
#define vnmsub_vv_u16m4_m(...) __riscv_vnmsub_vv_u16m4_tumu(__VA_ARGS__)
17518
#define vnmsub_vx_u16m4_m(...) __riscv_vnmsub_vx_u16m4_tumu(__VA_ARGS__)
17519
#define vnmsub_vv_u16m8_m(...) __riscv_vnmsub_vv_u16m8_tumu(__VA_ARGS__)
17520
#define vnmsub_vx_u16m8_m(...) __riscv_vnmsub_vx_u16m8_tumu(__VA_ARGS__)
17521
#define vnmsub_vv_u32mf2_m(...) __riscv_vnmsub_vv_u32mf2_tumu(__VA_ARGS__)
17522
#define vnmsub_vx_u32mf2_m(...) __riscv_vnmsub_vx_u32mf2_tumu(__VA_ARGS__)
17523
#define vnmsub_vv_u32m1_m(...) __riscv_vnmsub_vv_u32m1_tumu(__VA_ARGS__)
17524
#define vnmsub_vx_u32m1_m(...) __riscv_vnmsub_vx_u32m1_tumu(__VA_ARGS__)
17525
#define vnmsub_vv_u32m2_m(...) __riscv_vnmsub_vv_u32m2_tumu(__VA_ARGS__)
17526
#define vnmsub_vx_u32m2_m(...) __riscv_vnmsub_vx_u32m2_tumu(__VA_ARGS__)
17527
#define vnmsub_vv_u32m4_m(...) __riscv_vnmsub_vv_u32m4_tumu(__VA_ARGS__)
17528
#define vnmsub_vx_u32m4_m(...) __riscv_vnmsub_vx_u32m4_tumu(__VA_ARGS__)
17529
#define vnmsub_vv_u32m8_m(...) __riscv_vnmsub_vv_u32m8_tumu(__VA_ARGS__)
17530
#define vnmsub_vx_u32m8_m(...) __riscv_vnmsub_vx_u32m8_tumu(__VA_ARGS__)
17531
#define vnmsub_vv_u64m1_m(...) __riscv_vnmsub_vv_u64m1_tumu(__VA_ARGS__)
17532
#define vnmsub_vx_u64m1_m(...) __riscv_vnmsub_vx_u64m1_tumu(__VA_ARGS__)
17533
#define vnmsub_vv_u64m2_m(...) __riscv_vnmsub_vv_u64m2_tumu(__VA_ARGS__)
17534
#define vnmsub_vx_u64m2_m(...) __riscv_vnmsub_vx_u64m2_tumu(__VA_ARGS__)
17535
#define vnmsub_vv_u64m4_m(...) __riscv_vnmsub_vv_u64m4_tumu(__VA_ARGS__)
17536
#define vnmsub_vx_u64m4_m(...) __riscv_vnmsub_vx_u64m4_tumu(__VA_ARGS__)
17537
#define vnmsub_vv_u64m8_m(...) __riscv_vnmsub_vv_u64m8_tumu(__VA_ARGS__)
17538
#define vnmsub_vx_u64m8_m(...) __riscv_vnmsub_vx_u64m8_tumu(__VA_ARGS__)
17539
#define vwmacc_vv_i16mf4(...) __riscv_vwmacc_vv_i16mf4_tu(__VA_ARGS__)
17540
#define vwmacc_vx_i16mf4(...) __riscv_vwmacc_vx_i16mf4_tu(__VA_ARGS__)
17541
#define vwmacc_vv_i16mf2(...) __riscv_vwmacc_vv_i16mf2_tu(__VA_ARGS__)
17542
#define vwmacc_vx_i16mf2(...) __riscv_vwmacc_vx_i16mf2_tu(__VA_ARGS__)
17543
#define vwmacc_vv_i16m1(...) __riscv_vwmacc_vv_i16m1_tu(__VA_ARGS__)
17544
#define vwmacc_vx_i16m1(...) __riscv_vwmacc_vx_i16m1_tu(__VA_ARGS__)
17545
#define vwmacc_vv_i16m2(...) __riscv_vwmacc_vv_i16m2_tu(__VA_ARGS__)
17546
#define vwmacc_vx_i16m2(...) __riscv_vwmacc_vx_i16m2_tu(__VA_ARGS__)
17547
#define vwmacc_vv_i16m4(...) __riscv_vwmacc_vv_i16m4_tu(__VA_ARGS__)
17548
#define vwmacc_vx_i16m4(...) __riscv_vwmacc_vx_i16m4_tu(__VA_ARGS__)
17549
#define vwmacc_vv_i16m8(...) __riscv_vwmacc_vv_i16m8_tu(__VA_ARGS__)
17550
#define vwmacc_vx_i16m8(...) __riscv_vwmacc_vx_i16m8_tu(__VA_ARGS__)
17551
#define vwmacc_vv_i32mf2(...) __riscv_vwmacc_vv_i32mf2_tu(__VA_ARGS__)
17552
#define vwmacc_vx_i32mf2(...) __riscv_vwmacc_vx_i32mf2_tu(__VA_ARGS__)
17553
#define vwmacc_vv_i32m1(...) __riscv_vwmacc_vv_i32m1_tu(__VA_ARGS__)
17554
#define vwmacc_vx_i32m1(...) __riscv_vwmacc_vx_i32m1_tu(__VA_ARGS__)
17555
#define vwmacc_vv_i32m2(...) __riscv_vwmacc_vv_i32m2_tu(__VA_ARGS__)
17556
#define vwmacc_vx_i32m2(...) __riscv_vwmacc_vx_i32m2_tu(__VA_ARGS__)
17557
#define vwmacc_vv_i32m4(...) __riscv_vwmacc_vv_i32m4_tu(__VA_ARGS__)
17558
#define vwmacc_vx_i32m4(...) __riscv_vwmacc_vx_i32m4_tu(__VA_ARGS__)
17559
#define vwmacc_vv_i32m8(...) __riscv_vwmacc_vv_i32m8_tu(__VA_ARGS__)
17560
#define vwmacc_vx_i32m8(...) __riscv_vwmacc_vx_i32m8_tu(__VA_ARGS__)
17561
#define vwmacc_vv_i64m1(...) __riscv_vwmacc_vv_i64m1_tu(__VA_ARGS__)
17562
#define vwmacc_vx_i64m1(...) __riscv_vwmacc_vx_i64m1_tu(__VA_ARGS__)
17563
#define vwmacc_vv_i64m2(...) __riscv_vwmacc_vv_i64m2_tu(__VA_ARGS__)
17564
#define vwmacc_vx_i64m2(...) __riscv_vwmacc_vx_i64m2_tu(__VA_ARGS__)
17565
#define vwmacc_vv_i64m4(...) __riscv_vwmacc_vv_i64m4_tu(__VA_ARGS__)
17566
#define vwmacc_vx_i64m4(...) __riscv_vwmacc_vx_i64m4_tu(__VA_ARGS__)
17567
#define vwmacc_vv_i64m8(...) __riscv_vwmacc_vv_i64m8_tu(__VA_ARGS__)
17568
#define vwmacc_vx_i64m8(...) __riscv_vwmacc_vx_i64m8_tu(__VA_ARGS__)
17569
#define vwmaccsu_vv_i16mf4(...) __riscv_vwmaccsu_vv_i16mf4_tu(__VA_ARGS__)
17570
#define vwmaccsu_vx_i16mf4(...) __riscv_vwmaccsu_vx_i16mf4_tu(__VA_ARGS__)
17571
#define vwmaccsu_vv_i16mf2(...) __riscv_vwmaccsu_vv_i16mf2_tu(__VA_ARGS__)
17572
#define vwmaccsu_vx_i16mf2(...) __riscv_vwmaccsu_vx_i16mf2_tu(__VA_ARGS__)
17573
#define vwmaccsu_vv_i16m1(...) __riscv_vwmaccsu_vv_i16m1_tu(__VA_ARGS__)
17574
#define vwmaccsu_vx_i16m1(...) __riscv_vwmaccsu_vx_i16m1_tu(__VA_ARGS__)
17575
#define vwmaccsu_vv_i16m2(...) __riscv_vwmaccsu_vv_i16m2_tu(__VA_ARGS__)
17576
#define vwmaccsu_vx_i16m2(...) __riscv_vwmaccsu_vx_i16m2_tu(__VA_ARGS__)
17577
#define vwmaccsu_vv_i16m4(...) __riscv_vwmaccsu_vv_i16m4_tu(__VA_ARGS__)
17578
#define vwmaccsu_vx_i16m4(...) __riscv_vwmaccsu_vx_i16m4_tu(__VA_ARGS__)
17579
#define vwmaccsu_vv_i16m8(...) __riscv_vwmaccsu_vv_i16m8_tu(__VA_ARGS__)
17580
#define vwmaccsu_vx_i16m8(...) __riscv_vwmaccsu_vx_i16m8_tu(__VA_ARGS__)
17581
#define vwmaccsu_vv_i32mf2(...) __riscv_vwmaccsu_vv_i32mf2_tu(__VA_ARGS__)
17582
#define vwmaccsu_vx_i32mf2(...) __riscv_vwmaccsu_vx_i32mf2_tu(__VA_ARGS__)
17583
#define vwmaccsu_vv_i32m1(...) __riscv_vwmaccsu_vv_i32m1_tu(__VA_ARGS__)
17584
#define vwmaccsu_vx_i32m1(...) __riscv_vwmaccsu_vx_i32m1_tu(__VA_ARGS__)
17585
#define vwmaccsu_vv_i32m2(...) __riscv_vwmaccsu_vv_i32m2_tu(__VA_ARGS__)
17586
#define vwmaccsu_vx_i32m2(...) __riscv_vwmaccsu_vx_i32m2_tu(__VA_ARGS__)
17587
#define vwmaccsu_vv_i32m4(...) __riscv_vwmaccsu_vv_i32m4_tu(__VA_ARGS__)
17588
#define vwmaccsu_vx_i32m4(...) __riscv_vwmaccsu_vx_i32m4_tu(__VA_ARGS__)
17589
#define vwmaccsu_vv_i32m8(...) __riscv_vwmaccsu_vv_i32m8_tu(__VA_ARGS__)
17590
#define vwmaccsu_vx_i32m8(...) __riscv_vwmaccsu_vx_i32m8_tu(__VA_ARGS__)
17591
#define vwmaccsu_vv_i64m1(...) __riscv_vwmaccsu_vv_i64m1_tu(__VA_ARGS__)
17592
#define vwmaccsu_vx_i64m1(...) __riscv_vwmaccsu_vx_i64m1_tu(__VA_ARGS__)
17593
#define vwmaccsu_vv_i64m2(...) __riscv_vwmaccsu_vv_i64m2_tu(__VA_ARGS__)
17594
#define vwmaccsu_vx_i64m2(...) __riscv_vwmaccsu_vx_i64m2_tu(__VA_ARGS__)
17595
#define vwmaccsu_vv_i64m4(...) __riscv_vwmaccsu_vv_i64m4_tu(__VA_ARGS__)
17596
#define vwmaccsu_vx_i64m4(...) __riscv_vwmaccsu_vx_i64m4_tu(__VA_ARGS__)
17597
#define vwmaccsu_vv_i64m8(...) __riscv_vwmaccsu_vv_i64m8_tu(__VA_ARGS__)
17598
#define vwmaccsu_vx_i64m8(...) __riscv_vwmaccsu_vx_i64m8_tu(__VA_ARGS__)
17599
#define vwmaccus_vx_i16mf4(...) __riscv_vwmaccus_vx_i16mf4_tu(__VA_ARGS__)
17600
#define vwmaccus_vx_i16mf2(...) __riscv_vwmaccus_vx_i16mf2_tu(__VA_ARGS__)
17601
#define vwmaccus_vx_i16m1(...) __riscv_vwmaccus_vx_i16m1_tu(__VA_ARGS__)
17602
#define vwmaccus_vx_i16m2(...) __riscv_vwmaccus_vx_i16m2_tu(__VA_ARGS__)
17603
#define vwmaccus_vx_i16m4(...) __riscv_vwmaccus_vx_i16m4_tu(__VA_ARGS__)
17604
#define vwmaccus_vx_i16m8(...) __riscv_vwmaccus_vx_i16m8_tu(__VA_ARGS__)
17605
#define vwmaccus_vx_i32mf2(...) __riscv_vwmaccus_vx_i32mf2_tu(__VA_ARGS__)
17606
#define vwmaccus_vx_i32m1(...) __riscv_vwmaccus_vx_i32m1_tu(__VA_ARGS__)
17607
#define vwmaccus_vx_i32m2(...) __riscv_vwmaccus_vx_i32m2_tu(__VA_ARGS__)
17608
#define vwmaccus_vx_i32m4(...) __riscv_vwmaccus_vx_i32m4_tu(__VA_ARGS__)
17609
#define vwmaccus_vx_i32m8(...) __riscv_vwmaccus_vx_i32m8_tu(__VA_ARGS__)
17610
#define vwmaccus_vx_i64m1(...) __riscv_vwmaccus_vx_i64m1_tu(__VA_ARGS__)
17611
#define vwmaccus_vx_i64m2(...) __riscv_vwmaccus_vx_i64m2_tu(__VA_ARGS__)
17612
#define vwmaccus_vx_i64m4(...) __riscv_vwmaccus_vx_i64m4_tu(__VA_ARGS__)
17613
#define vwmaccus_vx_i64m8(...) __riscv_vwmaccus_vx_i64m8_tu(__VA_ARGS__)
17614
#define vwmaccu_vv_u16mf4(...) __riscv_vwmaccu_vv_u16mf4_tu(__VA_ARGS__)
17615
#define vwmaccu_vx_u16mf4(...) __riscv_vwmaccu_vx_u16mf4_tu(__VA_ARGS__)
17616
#define vwmaccu_vv_u16mf2(...) __riscv_vwmaccu_vv_u16mf2_tu(__VA_ARGS__)
17617
#define vwmaccu_vx_u16mf2(...) __riscv_vwmaccu_vx_u16mf2_tu(__VA_ARGS__)
17618
#define vwmaccu_vv_u16m1(...) __riscv_vwmaccu_vv_u16m1_tu(__VA_ARGS__)
17619
#define vwmaccu_vx_u16m1(...) __riscv_vwmaccu_vx_u16m1_tu(__VA_ARGS__)
17620
#define vwmaccu_vv_u16m2(...) __riscv_vwmaccu_vv_u16m2_tu(__VA_ARGS__)
17621
#define vwmaccu_vx_u16m2(...) __riscv_vwmaccu_vx_u16m2_tu(__VA_ARGS__)
17622
#define vwmaccu_vv_u16m4(...) __riscv_vwmaccu_vv_u16m4_tu(__VA_ARGS__)
17623
#define vwmaccu_vx_u16m4(...) __riscv_vwmaccu_vx_u16m4_tu(__VA_ARGS__)
17624
#define vwmaccu_vv_u16m8(...) __riscv_vwmaccu_vv_u16m8_tu(__VA_ARGS__)
17625
#define vwmaccu_vx_u16m8(...) __riscv_vwmaccu_vx_u16m8_tu(__VA_ARGS__)
17626
#define vwmaccu_vv_u32mf2(...) __riscv_vwmaccu_vv_u32mf2_tu(__VA_ARGS__)
17627
#define vwmaccu_vx_u32mf2(...) __riscv_vwmaccu_vx_u32mf2_tu(__VA_ARGS__)
17628
#define vwmaccu_vv_u32m1(...) __riscv_vwmaccu_vv_u32m1_tu(__VA_ARGS__)
17629
#define vwmaccu_vx_u32m1(...) __riscv_vwmaccu_vx_u32m1_tu(__VA_ARGS__)
17630
#define vwmaccu_vv_u32m2(...) __riscv_vwmaccu_vv_u32m2_tu(__VA_ARGS__)
17631
#define vwmaccu_vx_u32m2(...) __riscv_vwmaccu_vx_u32m2_tu(__VA_ARGS__)
17632
#define vwmaccu_vv_u32m4(...) __riscv_vwmaccu_vv_u32m4_tu(__VA_ARGS__)
17633
#define vwmaccu_vx_u32m4(...) __riscv_vwmaccu_vx_u32m4_tu(__VA_ARGS__)
17634
#define vwmaccu_vv_u32m8(...) __riscv_vwmaccu_vv_u32m8_tu(__VA_ARGS__)
17635
#define vwmaccu_vx_u32m8(...) __riscv_vwmaccu_vx_u32m8_tu(__VA_ARGS__)
17636
#define vwmaccu_vv_u64m1(...) __riscv_vwmaccu_vv_u64m1_tu(__VA_ARGS__)
17637
#define vwmaccu_vx_u64m1(...) __riscv_vwmaccu_vx_u64m1_tu(__VA_ARGS__)
17638
#define vwmaccu_vv_u64m2(...) __riscv_vwmaccu_vv_u64m2_tu(__VA_ARGS__)
17639
#define vwmaccu_vx_u64m2(...) __riscv_vwmaccu_vx_u64m2_tu(__VA_ARGS__)
17640
#define vwmaccu_vv_u64m4(...) __riscv_vwmaccu_vv_u64m4_tu(__VA_ARGS__)
17641
#define vwmaccu_vx_u64m4(...) __riscv_vwmaccu_vx_u64m4_tu(__VA_ARGS__)
17642
#define vwmaccu_vv_u64m8(...) __riscv_vwmaccu_vv_u64m8_tu(__VA_ARGS__)
17643
#define vwmaccu_vx_u64m8(...) __riscv_vwmaccu_vx_u64m8_tu(__VA_ARGS__)
17644
// masked functions
17645
#define vwmacc_vv_i16mf4_m(...) __riscv_vwmacc_vv_i16mf4_tumu(__VA_ARGS__)
17646
#define vwmacc_vx_i16mf4_m(...) __riscv_vwmacc_vx_i16mf4_tumu(__VA_ARGS__)
17647
#define vwmacc_vv_i16mf2_m(...) __riscv_vwmacc_vv_i16mf2_tumu(__VA_ARGS__)
17648
#define vwmacc_vx_i16mf2_m(...) __riscv_vwmacc_vx_i16mf2_tumu(__VA_ARGS__)
17649
#define vwmacc_vv_i16m1_m(...) __riscv_vwmacc_vv_i16m1_tumu(__VA_ARGS__)
17650
#define vwmacc_vx_i16m1_m(...) __riscv_vwmacc_vx_i16m1_tumu(__VA_ARGS__)
17651
#define vwmacc_vv_i16m2_m(...) __riscv_vwmacc_vv_i16m2_tumu(__VA_ARGS__)
17652
#define vwmacc_vx_i16m2_m(...) __riscv_vwmacc_vx_i16m2_tumu(__VA_ARGS__)
17653
#define vwmacc_vv_i16m4_m(...) __riscv_vwmacc_vv_i16m4_tumu(__VA_ARGS__)
17654
#define vwmacc_vx_i16m4_m(...) __riscv_vwmacc_vx_i16m4_tumu(__VA_ARGS__)
17655
#define vwmacc_vv_i16m8_m(...) __riscv_vwmacc_vv_i16m8_tumu(__VA_ARGS__)
17656
#define vwmacc_vx_i16m8_m(...) __riscv_vwmacc_vx_i16m8_tumu(__VA_ARGS__)
17657
#define vwmacc_vv_i32mf2_m(...) __riscv_vwmacc_vv_i32mf2_tumu(__VA_ARGS__)
17658
#define vwmacc_vx_i32mf2_m(...) __riscv_vwmacc_vx_i32mf2_tumu(__VA_ARGS__)
17659
#define vwmacc_vv_i32m1_m(...) __riscv_vwmacc_vv_i32m1_tumu(__VA_ARGS__)
17660
#define vwmacc_vx_i32m1_m(...) __riscv_vwmacc_vx_i32m1_tumu(__VA_ARGS__)
17661
#define vwmacc_vv_i32m2_m(...) __riscv_vwmacc_vv_i32m2_tumu(__VA_ARGS__)
17662
#define vwmacc_vx_i32m2_m(...) __riscv_vwmacc_vx_i32m2_tumu(__VA_ARGS__)
17663
#define vwmacc_vv_i32m4_m(...) __riscv_vwmacc_vv_i32m4_tumu(__VA_ARGS__)
17664
#define vwmacc_vx_i32m4_m(...) __riscv_vwmacc_vx_i32m4_tumu(__VA_ARGS__)
17665
#define vwmacc_vv_i32m8_m(...) __riscv_vwmacc_vv_i32m8_tumu(__VA_ARGS__)
17666
#define vwmacc_vx_i32m8_m(...) __riscv_vwmacc_vx_i32m8_tumu(__VA_ARGS__)
17667
#define vwmacc_vv_i64m1_m(...) __riscv_vwmacc_vv_i64m1_tumu(__VA_ARGS__)
17668
#define vwmacc_vx_i64m1_m(...) __riscv_vwmacc_vx_i64m1_tumu(__VA_ARGS__)
17669
#define vwmacc_vv_i64m2_m(...) __riscv_vwmacc_vv_i64m2_tumu(__VA_ARGS__)
17670
#define vwmacc_vx_i64m2_m(...) __riscv_vwmacc_vx_i64m2_tumu(__VA_ARGS__)
17671
#define vwmacc_vv_i64m4_m(...) __riscv_vwmacc_vv_i64m4_tumu(__VA_ARGS__)
17672
#define vwmacc_vx_i64m4_m(...) __riscv_vwmacc_vx_i64m4_tumu(__VA_ARGS__)
17673
#define vwmacc_vv_i64m8_m(...) __riscv_vwmacc_vv_i64m8_tumu(__VA_ARGS__)
17674
#define vwmacc_vx_i64m8_m(...) __riscv_vwmacc_vx_i64m8_tumu(__VA_ARGS__)
17675
#define vwmaccsu_vv_i16mf4_m(...) __riscv_vwmaccsu_vv_i16mf4_tumu(__VA_ARGS__)
17676
#define vwmaccsu_vx_i16mf4_m(...) __riscv_vwmaccsu_vx_i16mf4_tumu(__VA_ARGS__)
17677
#define vwmaccsu_vv_i16mf2_m(...) __riscv_vwmaccsu_vv_i16mf2_tumu(__VA_ARGS__)
17678
#define vwmaccsu_vx_i16mf2_m(...) __riscv_vwmaccsu_vx_i16mf2_tumu(__VA_ARGS__)
17679
#define vwmaccsu_vv_i16m1_m(...) __riscv_vwmaccsu_vv_i16m1_tumu(__VA_ARGS__)
17680
#define vwmaccsu_vx_i16m1_m(...) __riscv_vwmaccsu_vx_i16m1_tumu(__VA_ARGS__)
17681
#define vwmaccsu_vv_i16m2_m(...) __riscv_vwmaccsu_vv_i16m2_tumu(__VA_ARGS__)
17682
#define vwmaccsu_vx_i16m2_m(...) __riscv_vwmaccsu_vx_i16m2_tumu(__VA_ARGS__)
17683
#define vwmaccsu_vv_i16m4_m(...) __riscv_vwmaccsu_vv_i16m4_tumu(__VA_ARGS__)
17684
#define vwmaccsu_vx_i16m4_m(...) __riscv_vwmaccsu_vx_i16m4_tumu(__VA_ARGS__)
17685
#define vwmaccsu_vv_i16m8_m(...) __riscv_vwmaccsu_vv_i16m8_tumu(__VA_ARGS__)
17686
#define vwmaccsu_vx_i16m8_m(...) __riscv_vwmaccsu_vx_i16m8_tumu(__VA_ARGS__)
17687
#define vwmaccsu_vv_i32mf2_m(...) __riscv_vwmaccsu_vv_i32mf2_tumu(__VA_ARGS__)
17688
#define vwmaccsu_vx_i32mf2_m(...) __riscv_vwmaccsu_vx_i32mf2_tumu(__VA_ARGS__)
17689
#define vwmaccsu_vv_i32m1_m(...) __riscv_vwmaccsu_vv_i32m1_tumu(__VA_ARGS__)
17690
#define vwmaccsu_vx_i32m1_m(...) __riscv_vwmaccsu_vx_i32m1_tumu(__VA_ARGS__)
17691
#define vwmaccsu_vv_i32m2_m(...) __riscv_vwmaccsu_vv_i32m2_tumu(__VA_ARGS__)
17692
#define vwmaccsu_vx_i32m2_m(...) __riscv_vwmaccsu_vx_i32m2_tumu(__VA_ARGS__)
17693
#define vwmaccsu_vv_i32m4_m(...) __riscv_vwmaccsu_vv_i32m4_tumu(__VA_ARGS__)
17694
#define vwmaccsu_vx_i32m4_m(...) __riscv_vwmaccsu_vx_i32m4_tumu(__VA_ARGS__)
17695
#define vwmaccsu_vv_i32m8_m(...) __riscv_vwmaccsu_vv_i32m8_tumu(__VA_ARGS__)
17696
#define vwmaccsu_vx_i32m8_m(...) __riscv_vwmaccsu_vx_i32m8_tumu(__VA_ARGS__)
17697
#define vwmaccsu_vv_i64m1_m(...) __riscv_vwmaccsu_vv_i64m1_tumu(__VA_ARGS__)
17698
#define vwmaccsu_vx_i64m1_m(...) __riscv_vwmaccsu_vx_i64m1_tumu(__VA_ARGS__)
17699
#define vwmaccsu_vv_i64m2_m(...) __riscv_vwmaccsu_vv_i64m2_tumu(__VA_ARGS__)
17700
#define vwmaccsu_vx_i64m2_m(...) __riscv_vwmaccsu_vx_i64m2_tumu(__VA_ARGS__)
17701
#define vwmaccsu_vv_i64m4_m(...) __riscv_vwmaccsu_vv_i64m4_tumu(__VA_ARGS__)
17702
#define vwmaccsu_vx_i64m4_m(...) __riscv_vwmaccsu_vx_i64m4_tumu(__VA_ARGS__)
17703
#define vwmaccsu_vv_i64m8_m(...) __riscv_vwmaccsu_vv_i64m8_tumu(__VA_ARGS__)
17704
#define vwmaccsu_vx_i64m8_m(...) __riscv_vwmaccsu_vx_i64m8_tumu(__VA_ARGS__)
17705
#define vwmaccus_vx_i16mf4_m(...) __riscv_vwmaccus_vx_i16mf4_tumu(__VA_ARGS__)
17706
#define vwmaccus_vx_i16mf2_m(...) __riscv_vwmaccus_vx_i16mf2_tumu(__VA_ARGS__)
17707
#define vwmaccus_vx_i16m1_m(...) __riscv_vwmaccus_vx_i16m1_tumu(__VA_ARGS__)
17708
#define vwmaccus_vx_i16m2_m(...) __riscv_vwmaccus_vx_i16m2_tumu(__VA_ARGS__)
17709
#define vwmaccus_vx_i16m4_m(...) __riscv_vwmaccus_vx_i16m4_tumu(__VA_ARGS__)
17710
#define vwmaccus_vx_i16m8_m(...) __riscv_vwmaccus_vx_i16m8_tumu(__VA_ARGS__)
17711
#define vwmaccus_vx_i32mf2_m(...) __riscv_vwmaccus_vx_i32mf2_tumu(__VA_ARGS__)
17712
#define vwmaccus_vx_i32m1_m(...) __riscv_vwmaccus_vx_i32m1_tumu(__VA_ARGS__)
17713
#define vwmaccus_vx_i32m2_m(...) __riscv_vwmaccus_vx_i32m2_tumu(__VA_ARGS__)
17714
#define vwmaccus_vx_i32m4_m(...) __riscv_vwmaccus_vx_i32m4_tumu(__VA_ARGS__)
17715
#define vwmaccus_vx_i32m8_m(...) __riscv_vwmaccus_vx_i32m8_tumu(__VA_ARGS__)
17716
#define vwmaccus_vx_i64m1_m(...) __riscv_vwmaccus_vx_i64m1_tumu(__VA_ARGS__)
17717
#define vwmaccus_vx_i64m2_m(...) __riscv_vwmaccus_vx_i64m2_tumu(__VA_ARGS__)
17718
#define vwmaccus_vx_i64m4_m(...) __riscv_vwmaccus_vx_i64m4_tumu(__VA_ARGS__)
17719
#define vwmaccus_vx_i64m8_m(...) __riscv_vwmaccus_vx_i64m8_tumu(__VA_ARGS__)
17720
#define vwmaccu_vv_u16mf4_m(...) __riscv_vwmaccu_vv_u16mf4_tumu(__VA_ARGS__)
17721
#define vwmaccu_vx_u16mf4_m(...) __riscv_vwmaccu_vx_u16mf4_tumu(__VA_ARGS__)
17722
#define vwmaccu_vv_u16mf2_m(...) __riscv_vwmaccu_vv_u16mf2_tumu(__VA_ARGS__)
17723
#define vwmaccu_vx_u16mf2_m(...) __riscv_vwmaccu_vx_u16mf2_tumu(__VA_ARGS__)
17724
#define vwmaccu_vv_u16m1_m(...) __riscv_vwmaccu_vv_u16m1_tumu(__VA_ARGS__)
17725
#define vwmaccu_vx_u16m1_m(...) __riscv_vwmaccu_vx_u16m1_tumu(__VA_ARGS__)
17726
#define vwmaccu_vv_u16m2_m(...) __riscv_vwmaccu_vv_u16m2_tumu(__VA_ARGS__)
17727
#define vwmaccu_vx_u16m2_m(...) __riscv_vwmaccu_vx_u16m2_tumu(__VA_ARGS__)
17728
#define vwmaccu_vv_u16m4_m(...) __riscv_vwmaccu_vv_u16m4_tumu(__VA_ARGS__)
17729
#define vwmaccu_vx_u16m4_m(...) __riscv_vwmaccu_vx_u16m4_tumu(__VA_ARGS__)
17730
#define vwmaccu_vv_u16m8_m(...) __riscv_vwmaccu_vv_u16m8_tumu(__VA_ARGS__)
17731
#define vwmaccu_vx_u16m8_m(...) __riscv_vwmaccu_vx_u16m8_tumu(__VA_ARGS__)
17732
#define vwmaccu_vv_u32mf2_m(...) __riscv_vwmaccu_vv_u32mf2_tumu(__VA_ARGS__)
17733
#define vwmaccu_vx_u32mf2_m(...) __riscv_vwmaccu_vx_u32mf2_tumu(__VA_ARGS__)
17734
#define vwmaccu_vv_u32m1_m(...) __riscv_vwmaccu_vv_u32m1_tumu(__VA_ARGS__)
17735
#define vwmaccu_vx_u32m1_m(...) __riscv_vwmaccu_vx_u32m1_tumu(__VA_ARGS__)
17736
#define vwmaccu_vv_u32m2_m(...) __riscv_vwmaccu_vv_u32m2_tumu(__VA_ARGS__)
17737
#define vwmaccu_vx_u32m2_m(...) __riscv_vwmaccu_vx_u32m2_tumu(__VA_ARGS__)
17738
#define vwmaccu_vv_u32m4_m(...) __riscv_vwmaccu_vv_u32m4_tumu(__VA_ARGS__)
17739
#define vwmaccu_vx_u32m4_m(...) __riscv_vwmaccu_vx_u32m4_tumu(__VA_ARGS__)
17740
#define vwmaccu_vv_u32m8_m(...) __riscv_vwmaccu_vv_u32m8_tumu(__VA_ARGS__)
17741
#define vwmaccu_vx_u32m8_m(...) __riscv_vwmaccu_vx_u32m8_tumu(__VA_ARGS__)
17742
#define vwmaccu_vv_u64m1_m(...) __riscv_vwmaccu_vv_u64m1_tumu(__VA_ARGS__)
17743
#define vwmaccu_vx_u64m1_m(...) __riscv_vwmaccu_vx_u64m1_tumu(__VA_ARGS__)
17744
#define vwmaccu_vv_u64m2_m(...) __riscv_vwmaccu_vv_u64m2_tumu(__VA_ARGS__)
17745
#define vwmaccu_vx_u64m2_m(...) __riscv_vwmaccu_vx_u64m2_tumu(__VA_ARGS__)
17746
#define vwmaccu_vv_u64m4_m(...) __riscv_vwmaccu_vv_u64m4_tumu(__VA_ARGS__)
17747
#define vwmaccu_vx_u64m4_m(...) __riscv_vwmaccu_vx_u64m4_tumu(__VA_ARGS__)
17748
#define vwmaccu_vv_u64m8_m(...) __riscv_vwmaccu_vv_u64m8_tumu(__VA_ARGS__)
17749
#define vwmaccu_vx_u64m8_m(...) __riscv_vwmaccu_vx_u64m8_tumu(__VA_ARGS__)
17750
#define vmerge_vvm_i8mf8(mask, op1, op2, vl) __riscv_vmerge_vvm_i8mf8((op1), (op2), (mask), (vl))
17751
#define vmerge_vxm_i8mf8(mask, op1, op2, vl) __riscv_vmerge_vxm_i8mf8((op1), (op2), (mask), (vl))
17752
#define vmerge_vvm_i8mf4(mask, op1, op2, vl) __riscv_vmerge_vvm_i8mf4((op1), (op2), (mask), (vl))
17753
#define vmerge_vxm_i8mf4(mask, op1, op2, vl) __riscv_vmerge_vxm_i8mf4((op1), (op2), (mask), (vl))
17754
#define vmerge_vvm_i8mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_i8mf2((op1), (op2), (mask), (vl))
17755
#define vmerge_vxm_i8mf2(mask, op1, op2, vl) __riscv_vmerge_vxm_i8mf2((op1), (op2), (mask), (vl))
17756
#define vmerge_vvm_i8m1(mask, op1, op2, vl) __riscv_vmerge_vvm_i8m1((op1), (op2), (mask), (vl))
17757
#define vmerge_vxm_i8m1(mask, op1, op2, vl) __riscv_vmerge_vxm_i8m1((op1), (op2), (mask), (vl))
17758
#define vmerge_vvm_i8m2(mask, op1, op2, vl) __riscv_vmerge_vvm_i8m2((op1), (op2), (mask), (vl))
17759
#define vmerge_vxm_i8m2(mask, op1, op2, vl) __riscv_vmerge_vxm_i8m2((op1), (op2), (mask), (vl))
17760
#define vmerge_vvm_i8m4(mask, op1, op2, vl) __riscv_vmerge_vvm_i8m4((op1), (op2), (mask), (vl))
17761
#define vmerge_vxm_i8m4(mask, op1, op2, vl) __riscv_vmerge_vxm_i8m4((op1), (op2), (mask), (vl))
17762
#define vmerge_vvm_i8m8(mask, op1, op2, vl) __riscv_vmerge_vvm_i8m8((op1), (op2), (mask), (vl))
17763
#define vmerge_vxm_i8m8(mask, op1, op2, vl) __riscv_vmerge_vxm_i8m8((op1), (op2), (mask), (vl))
17764
#define vmerge_vvm_i16mf4(mask, op1, op2, vl) __riscv_vmerge_vvm_i16mf4((op1), (op2), (mask), (vl))
17765
#define vmerge_vxm_i16mf4(mask, op1, op2, vl) __riscv_vmerge_vxm_i16mf4((op1), (op2), (mask), (vl))
17766
#define vmerge_vvm_i16mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_i16mf2((op1), (op2), (mask), (vl))
17767
#define vmerge_vxm_i16mf2(mask, op1, op2, vl) __riscv_vmerge_vxm_i16mf2((op1), (op2), (mask), (vl))
17768
#define vmerge_vvm_i16m1(mask, op1, op2, vl) __riscv_vmerge_vvm_i16m1((op1), (op2), (mask), (vl))
17769
#define vmerge_vxm_i16m1(mask, op1, op2, vl) __riscv_vmerge_vxm_i16m1((op1), (op2), (mask), (vl))
17770
#define vmerge_vvm_i16m2(mask, op1, op2, vl) __riscv_vmerge_vvm_i16m2((op1), (op2), (mask), (vl))
17771
#define vmerge_vxm_i16m2(mask, op1, op2, vl) __riscv_vmerge_vxm_i16m2((op1), (op2), (mask), (vl))
17772
#define vmerge_vvm_i16m4(mask, op1, op2, vl) __riscv_vmerge_vvm_i16m4((op1), (op2), (mask), (vl))
17773
#define vmerge_vxm_i16m4(mask, op1, op2, vl) __riscv_vmerge_vxm_i16m4((op1), (op2), (mask), (vl))
17774
#define vmerge_vvm_i16m8(mask, op1, op2, vl) __riscv_vmerge_vvm_i16m8((op1), (op2), (mask), (vl))
17775
#define vmerge_vxm_i16m8(mask, op1, op2, vl) __riscv_vmerge_vxm_i16m8((op1), (op2), (mask), (vl))
17776
#define vmerge_vvm_i32mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_i32mf2((op1), (op2), (mask), (vl))
17777
#define vmerge_vxm_i32mf2(mask, op1, op2, vl) __riscv_vmerge_vxm_i32mf2((op1), (op2), (mask), (vl))
17778
#define vmerge_vvm_i32m1(mask, op1, op2, vl) __riscv_vmerge_vvm_i32m1((op1), (op2), (mask), (vl))
17779
#define vmerge_vxm_i32m1(mask, op1, op2, vl) __riscv_vmerge_vxm_i32m1((op1), (op2), (mask), (vl))
17780
#define vmerge_vvm_i32m2(mask, op1, op2, vl) __riscv_vmerge_vvm_i32m2((op1), (op2), (mask), (vl))
17781
#define vmerge_vxm_i32m2(mask, op1, op2, vl) __riscv_vmerge_vxm_i32m2((op1), (op2), (mask), (vl))
17782
#define vmerge_vvm_i32m4(mask, op1, op2, vl) __riscv_vmerge_vvm_i32m4((op1), (op2), (mask), (vl))
17783
#define vmerge_vxm_i32m4(mask, op1, op2, vl) __riscv_vmerge_vxm_i32m4((op1), (op2), (mask), (vl))
17784
#define vmerge_vvm_i32m8(mask, op1, op2, vl) __riscv_vmerge_vvm_i32m8((op1), (op2), (mask), (vl))
17785
#define vmerge_vxm_i32m8(mask, op1, op2, vl) __riscv_vmerge_vxm_i32m8((op1), (op2), (mask), (vl))
17786
#define vmerge_vvm_i64m1(mask, op1, op2, vl) __riscv_vmerge_vvm_i64m1((op1), (op2), (mask), (vl))
17787
#define vmerge_vxm_i64m1(mask, op1, op2, vl) __riscv_vmerge_vxm_i64m1((op1), (op2), (mask), (vl))
17788
#define vmerge_vvm_i64m2(mask, op1, op2, vl) __riscv_vmerge_vvm_i64m2((op1), (op2), (mask), (vl))
17789
#define vmerge_vxm_i64m2(mask, op1, op2, vl) __riscv_vmerge_vxm_i64m2((op1), (op2), (mask), (vl))
17790
#define vmerge_vvm_i64m4(mask, op1, op2, vl) __riscv_vmerge_vvm_i64m4((op1), (op2), (mask), (vl))
17791
#define vmerge_vxm_i64m4(mask, op1, op2, vl) __riscv_vmerge_vxm_i64m4((op1), (op2), (mask), (vl))
17792
#define vmerge_vvm_i64m8(mask, op1, op2, vl) __riscv_vmerge_vvm_i64m8((op1), (op2), (mask), (vl))
17793
#define vmerge_vxm_i64m8(mask, op1, op2, vl) __riscv_vmerge_vxm_i64m8((op1), (op2), (mask), (vl))
17794
#define vmerge_vvm_u8mf8(mask, op1, op2, vl) __riscv_vmerge_vvm_u8mf8((op1), (op2), (mask), (vl))
17795
#define vmerge_vxm_u8mf8(mask, op1, op2, vl) __riscv_vmerge_vxm_u8mf8((op1), (op2), (mask), (vl))
17796
#define vmerge_vvm_u8mf4(mask, op1, op2, vl) __riscv_vmerge_vvm_u8mf4((op1), (op2), (mask), (vl))
17797
#define vmerge_vxm_u8mf4(mask, op1, op2, vl) __riscv_vmerge_vxm_u8mf4((op1), (op2), (mask), (vl))
17798
#define vmerge_vvm_u8mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_u8mf2((op1), (op2), (mask), (vl))
17799
#define vmerge_vxm_u8mf2(mask, op1, op2, vl) __riscv_vmerge_vxm_u8mf2((op1), (op2), (mask), (vl))
17800
#define vmerge_vvm_u8m1(mask, op1, op2, vl) __riscv_vmerge_vvm_u8m1((op1), (op2), (mask), (vl))
17801
#define vmerge_vxm_u8m1(mask, op1, op2, vl) __riscv_vmerge_vxm_u8m1((op1), (op2), (mask), (vl))
17802
#define vmerge_vvm_u8m2(mask, op1, op2, vl) __riscv_vmerge_vvm_u8m2((op1), (op2), (mask), (vl))
17803
#define vmerge_vxm_u8m2(mask, op1, op2, vl) __riscv_vmerge_vxm_u8m2((op1), (op2), (mask), (vl))
17804
#define vmerge_vvm_u8m4(mask, op1, op2, vl) __riscv_vmerge_vvm_u8m4((op1), (op2), (mask), (vl))
17805
#define vmerge_vxm_u8m4(mask, op1, op2, vl) __riscv_vmerge_vxm_u8m4((op1), (op2), (mask), (vl))
17806
#define vmerge_vvm_u8m8(mask, op1, op2, vl) __riscv_vmerge_vvm_u8m8((op1), (op2), (mask), (vl))
17807
#define vmerge_vxm_u8m8(mask, op1, op2, vl) __riscv_vmerge_vxm_u8m8((op1), (op2), (mask), (vl))
17808
#define vmerge_vvm_u16mf4(mask, op1, op2, vl) __riscv_vmerge_vvm_u16mf4((op1), (op2), (mask), (vl))
17809
#define vmerge_vxm_u16mf4(mask, op1, op2, vl) __riscv_vmerge_vxm_u16mf4((op1), (op2), (mask), (vl))
17810
#define vmerge_vvm_u16mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_u16mf2((op1), (op2), (mask), (vl))
17811
#define vmerge_vxm_u16mf2(mask, op1, op2, vl) __riscv_vmerge_vxm_u16mf2((op1), (op2), (mask), (vl))
17812
#define vmerge_vvm_u16m1(mask, op1, op2, vl) __riscv_vmerge_vvm_u16m1((op1), (op2), (mask), (vl))
17813
#define vmerge_vxm_u16m1(mask, op1, op2, vl) __riscv_vmerge_vxm_u16m1((op1), (op2), (mask), (vl))
17814
#define vmerge_vvm_u16m2(mask, op1, op2, vl) __riscv_vmerge_vvm_u16m2((op1), (op2), (mask), (vl))
17815
#define vmerge_vxm_u16m2(mask, op1, op2, vl) __riscv_vmerge_vxm_u16m2((op1), (op2), (mask), (vl))
17816
#define vmerge_vvm_u16m4(mask, op1, op2, vl) __riscv_vmerge_vvm_u16m4((op1), (op2), (mask), (vl))
17817
#define vmerge_vxm_u16m4(mask, op1, op2, vl) __riscv_vmerge_vxm_u16m4((op1), (op2), (mask), (vl))
17818
#define vmerge_vvm_u16m8(mask, op1, op2, vl) __riscv_vmerge_vvm_u16m8((op1), (op2), (mask), (vl))
17819
#define vmerge_vxm_u16m8(mask, op1, op2, vl) __riscv_vmerge_vxm_u16m8((op1), (op2), (mask), (vl))
17820
#define vmerge_vvm_u32mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_u32mf2((op1), (op2), (mask), (vl))
17821
#define vmerge_vxm_u32mf2(mask, op1, op2, vl) __riscv_vmerge_vxm_u32mf2((op1), (op2), (mask), (vl))
17822
#define vmerge_vvm_u32m1(mask, op1, op2, vl) __riscv_vmerge_vvm_u32m1((op1), (op2), (mask), (vl))
17823
#define vmerge_vxm_u32m1(mask, op1, op2, vl) __riscv_vmerge_vxm_u32m1((op1), (op2), (mask), (vl))
17824
#define vmerge_vvm_u32m2(mask, op1, op2, vl) __riscv_vmerge_vvm_u32m2((op1), (op2), (mask), (vl))
17825
#define vmerge_vxm_u32m2(mask, op1, op2, vl) __riscv_vmerge_vxm_u32m2((op1), (op2), (mask), (vl))
17826
#define vmerge_vvm_u32m4(mask, op1, op2, vl) __riscv_vmerge_vvm_u32m4((op1), (op2), (mask), (vl))
17827
#define vmerge_vxm_u32m4(mask, op1, op2, vl) __riscv_vmerge_vxm_u32m4((op1), (op2), (mask), (vl))
17828
#define vmerge_vvm_u32m8(mask, op1, op2, vl) __riscv_vmerge_vvm_u32m8((op1), (op2), (mask), (vl))
17829
#define vmerge_vxm_u32m8(mask, op1, op2, vl) __riscv_vmerge_vxm_u32m8((op1), (op2), (mask), (vl))
17830
#define vmerge_vvm_u64m1(mask, op1, op2, vl) __riscv_vmerge_vvm_u64m1((op1), (op2), (mask), (vl))
17831
#define vmerge_vxm_u64m1(mask, op1, op2, vl) __riscv_vmerge_vxm_u64m1((op1), (op2), (mask), (vl))
17832
#define vmerge_vvm_u64m2(mask, op1, op2, vl) __riscv_vmerge_vvm_u64m2((op1), (op2), (mask), (vl))
17833
#define vmerge_vxm_u64m2(mask, op1, op2, vl) __riscv_vmerge_vxm_u64m2((op1), (op2), (mask), (vl))
17834
#define vmerge_vvm_u64m4(mask, op1, op2, vl) __riscv_vmerge_vvm_u64m4((op1), (op2), (mask), (vl))
17835
#define vmerge_vxm_u64m4(mask, op1, op2, vl) __riscv_vmerge_vxm_u64m4((op1), (op2), (mask), (vl))
17836
#define vmerge_vvm_u64m8(mask, op1, op2, vl) __riscv_vmerge_vvm_u64m8((op1), (op2), (mask), (vl))
17837
#define vmerge_vxm_u64m8(mask, op1, op2, vl) __riscv_vmerge_vxm_u64m8((op1), (op2), (mask), (vl))
17838
#define vmv_v_v_i8mf8(...) __riscv_vmv_v_v_i8mf8(__VA_ARGS__)
17839
#define vmv_v_x_i8mf8(...) __riscv_vmv_v_x_i8mf8(__VA_ARGS__)
17840
#define vmv_v_v_i8mf4(...) __riscv_vmv_v_v_i8mf4(__VA_ARGS__)
17841
#define vmv_v_x_i8mf4(...) __riscv_vmv_v_x_i8mf4(__VA_ARGS__)
17842
#define vmv_v_v_i8mf2(...) __riscv_vmv_v_v_i8mf2(__VA_ARGS__)
17843
#define vmv_v_x_i8mf2(...) __riscv_vmv_v_x_i8mf2(__VA_ARGS__)
17844
#define vmv_v_v_i8m1(...) __riscv_vmv_v_v_i8m1(__VA_ARGS__)
17845
#define vmv_v_x_i8m1(...) __riscv_vmv_v_x_i8m1(__VA_ARGS__)
17846
#define vmv_v_v_i8m2(...) __riscv_vmv_v_v_i8m2(__VA_ARGS__)
17847
#define vmv_v_x_i8m2(...) __riscv_vmv_v_x_i8m2(__VA_ARGS__)
17848
#define vmv_v_v_i8m4(...) __riscv_vmv_v_v_i8m4(__VA_ARGS__)
17849
#define vmv_v_x_i8m4(...) __riscv_vmv_v_x_i8m4(__VA_ARGS__)
17850
#define vmv_v_v_i8m8(...) __riscv_vmv_v_v_i8m8(__VA_ARGS__)
17851
#define vmv_v_x_i8m8(...) __riscv_vmv_v_x_i8m8(__VA_ARGS__)
17852
#define vmv_v_v_i16mf4(...) __riscv_vmv_v_v_i16mf4(__VA_ARGS__)
17853
#define vmv_v_x_i16mf4(...) __riscv_vmv_v_x_i16mf4(__VA_ARGS__)
17854
#define vmv_v_v_i16mf2(...) __riscv_vmv_v_v_i16mf2(__VA_ARGS__)
17855
#define vmv_v_x_i16mf2(...) __riscv_vmv_v_x_i16mf2(__VA_ARGS__)
17856
#define vmv_v_v_i16m1(...) __riscv_vmv_v_v_i16m1(__VA_ARGS__)
17857
#define vmv_v_x_i16m1(...) __riscv_vmv_v_x_i16m1(__VA_ARGS__)
17858
#define vmv_v_v_i16m2(...) __riscv_vmv_v_v_i16m2(__VA_ARGS__)
17859
#define vmv_v_x_i16m2(...) __riscv_vmv_v_x_i16m2(__VA_ARGS__)
17860
#define vmv_v_v_i16m4(...) __riscv_vmv_v_v_i16m4(__VA_ARGS__)
17861
#define vmv_v_x_i16m4(...) __riscv_vmv_v_x_i16m4(__VA_ARGS__)
17862
#define vmv_v_v_i16m8(...) __riscv_vmv_v_v_i16m8(__VA_ARGS__)
17863
#define vmv_v_x_i16m8(...) __riscv_vmv_v_x_i16m8(__VA_ARGS__)
17864
#define vmv_v_v_i32mf2(...) __riscv_vmv_v_v_i32mf2(__VA_ARGS__)
17865
#define vmv_v_x_i32mf2(...) __riscv_vmv_v_x_i32mf2(__VA_ARGS__)
17866
#define vmv_v_v_i32m1(...) __riscv_vmv_v_v_i32m1(__VA_ARGS__)
17867
#define vmv_v_x_i32m1(...) __riscv_vmv_v_x_i32m1(__VA_ARGS__)
17868
#define vmv_v_v_i32m2(...) __riscv_vmv_v_v_i32m2(__VA_ARGS__)
17869
#define vmv_v_x_i32m2(...) __riscv_vmv_v_x_i32m2(__VA_ARGS__)
17870
#define vmv_v_v_i32m4(...) __riscv_vmv_v_v_i32m4(__VA_ARGS__)
17871
#define vmv_v_x_i32m4(...) __riscv_vmv_v_x_i32m4(__VA_ARGS__)
17872
#define vmv_v_v_i32m8(...) __riscv_vmv_v_v_i32m8(__VA_ARGS__)
17873
#define vmv_v_x_i32m8(...) __riscv_vmv_v_x_i32m8(__VA_ARGS__)
17874
#define vmv_v_v_i64m1(...) __riscv_vmv_v_v_i64m1(__VA_ARGS__)
17875
#define vmv_v_x_i64m1(...) __riscv_vmv_v_x_i64m1(__VA_ARGS__)
17876
#define vmv_v_v_i64m2(...) __riscv_vmv_v_v_i64m2(__VA_ARGS__)
17877
#define vmv_v_x_i64m2(...) __riscv_vmv_v_x_i64m2(__VA_ARGS__)
17878
#define vmv_v_v_i64m4(...) __riscv_vmv_v_v_i64m4(__VA_ARGS__)
17879
#define vmv_v_x_i64m4(...) __riscv_vmv_v_x_i64m4(__VA_ARGS__)
17880
#define vmv_v_v_i64m8(...) __riscv_vmv_v_v_i64m8(__VA_ARGS__)
17881
#define vmv_v_x_i64m8(...) __riscv_vmv_v_x_i64m8(__VA_ARGS__)
17882
#define vmv_v_v_u8mf8(...) __riscv_vmv_v_v_u8mf8(__VA_ARGS__)
17883
#define vmv_v_x_u8mf8(...) __riscv_vmv_v_x_u8mf8(__VA_ARGS__)
17884
#define vmv_v_v_u8mf4(...) __riscv_vmv_v_v_u8mf4(__VA_ARGS__)
17885
#define vmv_v_x_u8mf4(...) __riscv_vmv_v_x_u8mf4(__VA_ARGS__)
17886
#define vmv_v_v_u8mf2(...) __riscv_vmv_v_v_u8mf2(__VA_ARGS__)
17887
#define vmv_v_x_u8mf2(...) __riscv_vmv_v_x_u8mf2(__VA_ARGS__)
17888
#define vmv_v_v_u8m1(...) __riscv_vmv_v_v_u8m1(__VA_ARGS__)
17889
#define vmv_v_x_u8m1(...) __riscv_vmv_v_x_u8m1(__VA_ARGS__)
17890
#define vmv_v_v_u8m2(...) __riscv_vmv_v_v_u8m2(__VA_ARGS__)
17891
#define vmv_v_x_u8m2(...) __riscv_vmv_v_x_u8m2(__VA_ARGS__)
17892
#define vmv_v_v_u8m4(...) __riscv_vmv_v_v_u8m4(__VA_ARGS__)
17893
#define vmv_v_x_u8m4(...) __riscv_vmv_v_x_u8m4(__VA_ARGS__)
17894
#define vmv_v_v_u8m8(...) __riscv_vmv_v_v_u8m8(__VA_ARGS__)
17895
#define vmv_v_x_u8m8(...) __riscv_vmv_v_x_u8m8(__VA_ARGS__)
17896
#define vmv_v_v_u16mf4(...) __riscv_vmv_v_v_u16mf4(__VA_ARGS__)
17897
#define vmv_v_x_u16mf4(...) __riscv_vmv_v_x_u16mf4(__VA_ARGS__)
17898
#define vmv_v_v_u16mf2(...) __riscv_vmv_v_v_u16mf2(__VA_ARGS__)
17899
#define vmv_v_x_u16mf2(...) __riscv_vmv_v_x_u16mf2(__VA_ARGS__)
17900
#define vmv_v_v_u16m1(...) __riscv_vmv_v_v_u16m1(__VA_ARGS__)
17901
#define vmv_v_x_u16m1(...) __riscv_vmv_v_x_u16m1(__VA_ARGS__)
17902
#define vmv_v_v_u16m2(...) __riscv_vmv_v_v_u16m2(__VA_ARGS__)
17903
#define vmv_v_x_u16m2(...) __riscv_vmv_v_x_u16m2(__VA_ARGS__)
17904
#define vmv_v_v_u16m4(...) __riscv_vmv_v_v_u16m4(__VA_ARGS__)
17905
#define vmv_v_x_u16m4(...) __riscv_vmv_v_x_u16m4(__VA_ARGS__)
17906
#define vmv_v_v_u16m8(...) __riscv_vmv_v_v_u16m8(__VA_ARGS__)
17907
#define vmv_v_x_u16m8(...) __riscv_vmv_v_x_u16m8(__VA_ARGS__)
17908
#define vmv_v_v_u32mf2(...) __riscv_vmv_v_v_u32mf2(__VA_ARGS__)
17909
#define vmv_v_x_u32mf2(...) __riscv_vmv_v_x_u32mf2(__VA_ARGS__)
17910
#define vmv_v_v_u32m1(...) __riscv_vmv_v_v_u32m1(__VA_ARGS__)
17911
#define vmv_v_x_u32m1(...) __riscv_vmv_v_x_u32m1(__VA_ARGS__)
17912
#define vmv_v_v_u32m2(...) __riscv_vmv_v_v_u32m2(__VA_ARGS__)
17913
#define vmv_v_x_u32m2(...) __riscv_vmv_v_x_u32m2(__VA_ARGS__)
17914
#define vmv_v_v_u32m4(...) __riscv_vmv_v_v_u32m4(__VA_ARGS__)
17915
#define vmv_v_x_u32m4(...) __riscv_vmv_v_x_u32m4(__VA_ARGS__)
17916
#define vmv_v_v_u32m8(...) __riscv_vmv_v_v_u32m8(__VA_ARGS__)
17917
#define vmv_v_x_u32m8(...) __riscv_vmv_v_x_u32m8(__VA_ARGS__)
17918
#define vmv_v_v_u64m1(...) __riscv_vmv_v_v_u64m1(__VA_ARGS__)
17919
#define vmv_v_x_u64m1(...) __riscv_vmv_v_x_u64m1(__VA_ARGS__)
17920
#define vmv_v_v_u64m2(...) __riscv_vmv_v_v_u64m2(__VA_ARGS__)
17921
#define vmv_v_x_u64m2(...) __riscv_vmv_v_x_u64m2(__VA_ARGS__)
17922
#define vmv_v_v_u64m4(...) __riscv_vmv_v_v_u64m4(__VA_ARGS__)
17923
#define vmv_v_x_u64m4(...) __riscv_vmv_v_x_u64m4(__VA_ARGS__)
17924
#define vmv_v_v_u64m8(...) __riscv_vmv_v_v_u64m8(__VA_ARGS__)
17925
#define vmv_v_x_u64m8(...) __riscv_vmv_v_x_u64m8(__VA_ARGS__)
17926
#define vsadd_vv_i8mf8(...) __riscv_vsadd_vv_i8mf8(__VA_ARGS__)
17927
#define vsadd_vx_i8mf8(...) __riscv_vsadd_vx_i8mf8(__VA_ARGS__)
17928
#define vsadd_vv_i8mf4(...) __riscv_vsadd_vv_i8mf4(__VA_ARGS__)
17929
#define vsadd_vx_i8mf4(...) __riscv_vsadd_vx_i8mf4(__VA_ARGS__)
17930
#define vsadd_vv_i8mf2(...) __riscv_vsadd_vv_i8mf2(__VA_ARGS__)
17931
#define vsadd_vx_i8mf2(...) __riscv_vsadd_vx_i8mf2(__VA_ARGS__)
17932
#define vsadd_vv_i8m1(...) __riscv_vsadd_vv_i8m1(__VA_ARGS__)
17933
#define vsadd_vx_i8m1(...) __riscv_vsadd_vx_i8m1(__VA_ARGS__)
17934
#define vsadd_vv_i8m2(...) __riscv_vsadd_vv_i8m2(__VA_ARGS__)
17935
#define vsadd_vx_i8m2(...) __riscv_vsadd_vx_i8m2(__VA_ARGS__)
17936
#define vsadd_vv_i8m4(...) __riscv_vsadd_vv_i8m4(__VA_ARGS__)
17937
#define vsadd_vx_i8m4(...) __riscv_vsadd_vx_i8m4(__VA_ARGS__)
17938
#define vsadd_vv_i8m8(...) __riscv_vsadd_vv_i8m8(__VA_ARGS__)
17939
#define vsadd_vx_i8m8(...) __riscv_vsadd_vx_i8m8(__VA_ARGS__)
17940
#define vsadd_vv_i16mf4(...) __riscv_vsadd_vv_i16mf4(__VA_ARGS__)
17941
#define vsadd_vx_i16mf4(...) __riscv_vsadd_vx_i16mf4(__VA_ARGS__)
17942
#define vsadd_vv_i16mf2(...) __riscv_vsadd_vv_i16mf2(__VA_ARGS__)
17943
#define vsadd_vx_i16mf2(...) __riscv_vsadd_vx_i16mf2(__VA_ARGS__)
17944
#define vsadd_vv_i16m1(...) __riscv_vsadd_vv_i16m1(__VA_ARGS__)
17945
#define vsadd_vx_i16m1(...) __riscv_vsadd_vx_i16m1(__VA_ARGS__)
17946
#define vsadd_vv_i16m2(...) __riscv_vsadd_vv_i16m2(__VA_ARGS__)
17947
#define vsadd_vx_i16m2(...) __riscv_vsadd_vx_i16m2(__VA_ARGS__)
17948
#define vsadd_vv_i16m4(...) __riscv_vsadd_vv_i16m4(__VA_ARGS__)
17949
#define vsadd_vx_i16m4(...) __riscv_vsadd_vx_i16m4(__VA_ARGS__)
17950
#define vsadd_vv_i16m8(...) __riscv_vsadd_vv_i16m8(__VA_ARGS__)
17951
#define vsadd_vx_i16m8(...) __riscv_vsadd_vx_i16m8(__VA_ARGS__)
17952
#define vsadd_vv_i32mf2(...) __riscv_vsadd_vv_i32mf2(__VA_ARGS__)
17953
#define vsadd_vx_i32mf2(...) __riscv_vsadd_vx_i32mf2(__VA_ARGS__)
17954
#define vsadd_vv_i32m1(...) __riscv_vsadd_vv_i32m1(__VA_ARGS__)
17955
#define vsadd_vx_i32m1(...) __riscv_vsadd_vx_i32m1(__VA_ARGS__)
17956
#define vsadd_vv_i32m2(...) __riscv_vsadd_vv_i32m2(__VA_ARGS__)
17957
#define vsadd_vx_i32m2(...) __riscv_vsadd_vx_i32m2(__VA_ARGS__)
17958
#define vsadd_vv_i32m4(...) __riscv_vsadd_vv_i32m4(__VA_ARGS__)
17959
#define vsadd_vx_i32m4(...) __riscv_vsadd_vx_i32m4(__VA_ARGS__)
17960
#define vsadd_vv_i32m8(...) __riscv_vsadd_vv_i32m8(__VA_ARGS__)
17961
#define vsadd_vx_i32m8(...) __riscv_vsadd_vx_i32m8(__VA_ARGS__)
17962
#define vsadd_vv_i64m1(...) __riscv_vsadd_vv_i64m1(__VA_ARGS__)
17963
#define vsadd_vx_i64m1(...) __riscv_vsadd_vx_i64m1(__VA_ARGS__)
17964
#define vsadd_vv_i64m2(...) __riscv_vsadd_vv_i64m2(__VA_ARGS__)
17965
#define vsadd_vx_i64m2(...) __riscv_vsadd_vx_i64m2(__VA_ARGS__)
17966
#define vsadd_vv_i64m4(...) __riscv_vsadd_vv_i64m4(__VA_ARGS__)
17967
#define vsadd_vx_i64m4(...) __riscv_vsadd_vx_i64m4(__VA_ARGS__)
17968
#define vsadd_vv_i64m8(...) __riscv_vsadd_vv_i64m8(__VA_ARGS__)
17969
#define vsadd_vx_i64m8(...) __riscv_vsadd_vx_i64m8(__VA_ARGS__)
17970
#define vssub_vv_i8mf8(...) __riscv_vssub_vv_i8mf8(__VA_ARGS__)
17971
#define vssub_vx_i8mf8(...) __riscv_vssub_vx_i8mf8(__VA_ARGS__)
17972
#define vssub_vv_i8mf4(...) __riscv_vssub_vv_i8mf4(__VA_ARGS__)
17973
#define vssub_vx_i8mf4(...) __riscv_vssub_vx_i8mf4(__VA_ARGS__)
17974
#define vssub_vv_i8mf2(...) __riscv_vssub_vv_i8mf2(__VA_ARGS__)
17975
#define vssub_vx_i8mf2(...) __riscv_vssub_vx_i8mf2(__VA_ARGS__)
17976
#define vssub_vv_i8m1(...) __riscv_vssub_vv_i8m1(__VA_ARGS__)
17977
#define vssub_vx_i8m1(...) __riscv_vssub_vx_i8m1(__VA_ARGS__)
17978
#define vssub_vv_i8m2(...) __riscv_vssub_vv_i8m2(__VA_ARGS__)
17979
#define vssub_vx_i8m2(...) __riscv_vssub_vx_i8m2(__VA_ARGS__)
17980
#define vssub_vv_i8m4(...) __riscv_vssub_vv_i8m4(__VA_ARGS__)
17981
#define vssub_vx_i8m4(...) __riscv_vssub_vx_i8m4(__VA_ARGS__)
17982
#define vssub_vv_i8m8(...) __riscv_vssub_vv_i8m8(__VA_ARGS__)
17983
#define vssub_vx_i8m8(...) __riscv_vssub_vx_i8m8(__VA_ARGS__)
17984
#define vssub_vv_i16mf4(...) __riscv_vssub_vv_i16mf4(__VA_ARGS__)
17985
#define vssub_vx_i16mf4(...) __riscv_vssub_vx_i16mf4(__VA_ARGS__)
17986
#define vssub_vv_i16mf2(...) __riscv_vssub_vv_i16mf2(__VA_ARGS__)
17987
#define vssub_vx_i16mf2(...) __riscv_vssub_vx_i16mf2(__VA_ARGS__)
17988
#define vssub_vv_i16m1(...) __riscv_vssub_vv_i16m1(__VA_ARGS__)
17989
#define vssub_vx_i16m1(...) __riscv_vssub_vx_i16m1(__VA_ARGS__)
17990
#define vssub_vv_i16m2(...) __riscv_vssub_vv_i16m2(__VA_ARGS__)
17991
#define vssub_vx_i16m2(...) __riscv_vssub_vx_i16m2(__VA_ARGS__)
17992
#define vssub_vv_i16m4(...) __riscv_vssub_vv_i16m4(__VA_ARGS__)
17993
#define vssub_vx_i16m4(...) __riscv_vssub_vx_i16m4(__VA_ARGS__)
17994
#define vssub_vv_i16m8(...) __riscv_vssub_vv_i16m8(__VA_ARGS__)
17995
#define vssub_vx_i16m8(...) __riscv_vssub_vx_i16m8(__VA_ARGS__)
17996
#define vssub_vv_i32mf2(...) __riscv_vssub_vv_i32mf2(__VA_ARGS__)
17997
#define vssub_vx_i32mf2(...) __riscv_vssub_vx_i32mf2(__VA_ARGS__)
17998
#define vssub_vv_i32m1(...) __riscv_vssub_vv_i32m1(__VA_ARGS__)
17999
#define vssub_vx_i32m1(...) __riscv_vssub_vx_i32m1(__VA_ARGS__)
18000
#define vssub_vv_i32m2(...) __riscv_vssub_vv_i32m2(__VA_ARGS__)
18001
#define vssub_vx_i32m2(...) __riscv_vssub_vx_i32m2(__VA_ARGS__)
18002
#define vssub_vv_i32m4(...) __riscv_vssub_vv_i32m4(__VA_ARGS__)
18003
#define vssub_vx_i32m4(...) __riscv_vssub_vx_i32m4(__VA_ARGS__)
18004
#define vssub_vv_i32m8(...) __riscv_vssub_vv_i32m8(__VA_ARGS__)
18005
#define vssub_vx_i32m8(...) __riscv_vssub_vx_i32m8(__VA_ARGS__)
18006
#define vssub_vv_i64m1(...) __riscv_vssub_vv_i64m1(__VA_ARGS__)
18007
#define vssub_vx_i64m1(...) __riscv_vssub_vx_i64m1(__VA_ARGS__)
18008
#define vssub_vv_i64m2(...) __riscv_vssub_vv_i64m2(__VA_ARGS__)
18009
#define vssub_vx_i64m2(...) __riscv_vssub_vx_i64m2(__VA_ARGS__)
18010
#define vssub_vv_i64m4(...) __riscv_vssub_vv_i64m4(__VA_ARGS__)
18011
#define vssub_vx_i64m4(...) __riscv_vssub_vx_i64m4(__VA_ARGS__)
18012
#define vssub_vv_i64m8(...) __riscv_vssub_vv_i64m8(__VA_ARGS__)
18013
#define vssub_vx_i64m8(...) __riscv_vssub_vx_i64m8(__VA_ARGS__)
18014
#define vsaddu_vv_u8mf8(...) __riscv_vsaddu_vv_u8mf8(__VA_ARGS__)
18015
#define vsaddu_vx_u8mf8(...) __riscv_vsaddu_vx_u8mf8(__VA_ARGS__)
18016
#define vsaddu_vv_u8mf4(...) __riscv_vsaddu_vv_u8mf4(__VA_ARGS__)
18017
#define vsaddu_vx_u8mf4(...) __riscv_vsaddu_vx_u8mf4(__VA_ARGS__)
18018
#define vsaddu_vv_u8mf2(...) __riscv_vsaddu_vv_u8mf2(__VA_ARGS__)
18019
#define vsaddu_vx_u8mf2(...) __riscv_vsaddu_vx_u8mf2(__VA_ARGS__)
18020
#define vsaddu_vv_u8m1(...) __riscv_vsaddu_vv_u8m1(__VA_ARGS__)
18021
#define vsaddu_vx_u8m1(...) __riscv_vsaddu_vx_u8m1(__VA_ARGS__)
18022
#define vsaddu_vv_u8m2(...) __riscv_vsaddu_vv_u8m2(__VA_ARGS__)
18023
#define vsaddu_vx_u8m2(...) __riscv_vsaddu_vx_u8m2(__VA_ARGS__)
18024
#define vsaddu_vv_u8m4(...) __riscv_vsaddu_vv_u8m4(__VA_ARGS__)
18025
#define vsaddu_vx_u8m4(...) __riscv_vsaddu_vx_u8m4(__VA_ARGS__)
18026
#define vsaddu_vv_u8m8(...) __riscv_vsaddu_vv_u8m8(__VA_ARGS__)
18027
#define vsaddu_vx_u8m8(...) __riscv_vsaddu_vx_u8m8(__VA_ARGS__)
18028
#define vsaddu_vv_u16mf4(...) __riscv_vsaddu_vv_u16mf4(__VA_ARGS__)
18029
#define vsaddu_vx_u16mf4(...) __riscv_vsaddu_vx_u16mf4(__VA_ARGS__)
18030
#define vsaddu_vv_u16mf2(...) __riscv_vsaddu_vv_u16mf2(__VA_ARGS__)
18031
#define vsaddu_vx_u16mf2(...) __riscv_vsaddu_vx_u16mf2(__VA_ARGS__)
18032
#define vsaddu_vv_u16m1(...) __riscv_vsaddu_vv_u16m1(__VA_ARGS__)
18033
#define vsaddu_vx_u16m1(...) __riscv_vsaddu_vx_u16m1(__VA_ARGS__)
18034
#define vsaddu_vv_u16m2(...) __riscv_vsaddu_vv_u16m2(__VA_ARGS__)
18035
#define vsaddu_vx_u16m2(...) __riscv_vsaddu_vx_u16m2(__VA_ARGS__)
18036
#define vsaddu_vv_u16m4(...) __riscv_vsaddu_vv_u16m4(__VA_ARGS__)
18037
#define vsaddu_vx_u16m4(...) __riscv_vsaddu_vx_u16m4(__VA_ARGS__)
18038
#define vsaddu_vv_u16m8(...) __riscv_vsaddu_vv_u16m8(__VA_ARGS__)
18039
#define vsaddu_vx_u16m8(...) __riscv_vsaddu_vx_u16m8(__VA_ARGS__)
18040
#define vsaddu_vv_u32mf2(...) __riscv_vsaddu_vv_u32mf2(__VA_ARGS__)
18041
#define vsaddu_vx_u32mf2(...) __riscv_vsaddu_vx_u32mf2(__VA_ARGS__)
18042
#define vsaddu_vv_u32m1(...) __riscv_vsaddu_vv_u32m1(__VA_ARGS__)
18043
#define vsaddu_vx_u32m1(...) __riscv_vsaddu_vx_u32m1(__VA_ARGS__)
18044
#define vsaddu_vv_u32m2(...) __riscv_vsaddu_vv_u32m2(__VA_ARGS__)
18045
#define vsaddu_vx_u32m2(...) __riscv_vsaddu_vx_u32m2(__VA_ARGS__)
18046
#define vsaddu_vv_u32m4(...) __riscv_vsaddu_vv_u32m4(__VA_ARGS__)
18047
#define vsaddu_vx_u32m4(...) __riscv_vsaddu_vx_u32m4(__VA_ARGS__)
18048
#define vsaddu_vv_u32m8(...) __riscv_vsaddu_vv_u32m8(__VA_ARGS__)
18049
#define vsaddu_vx_u32m8(...) __riscv_vsaddu_vx_u32m8(__VA_ARGS__)
18050
#define vsaddu_vv_u64m1(...) __riscv_vsaddu_vv_u64m1(__VA_ARGS__)
18051
#define vsaddu_vx_u64m1(...) __riscv_vsaddu_vx_u64m1(__VA_ARGS__)
18052
#define vsaddu_vv_u64m2(...) __riscv_vsaddu_vv_u64m2(__VA_ARGS__)
18053
#define vsaddu_vx_u64m2(...) __riscv_vsaddu_vx_u64m2(__VA_ARGS__)
18054
#define vsaddu_vv_u64m4(...) __riscv_vsaddu_vv_u64m4(__VA_ARGS__)
18055
#define vsaddu_vx_u64m4(...) __riscv_vsaddu_vx_u64m4(__VA_ARGS__)
18056
#define vsaddu_vv_u64m8(...) __riscv_vsaddu_vv_u64m8(__VA_ARGS__)
18057
#define vsaddu_vx_u64m8(...) __riscv_vsaddu_vx_u64m8(__VA_ARGS__)
18058
#define vssubu_vv_u8mf8(...) __riscv_vssubu_vv_u8mf8(__VA_ARGS__)
18059
#define vssubu_vx_u8mf8(...) __riscv_vssubu_vx_u8mf8(__VA_ARGS__)
18060
#define vssubu_vv_u8mf4(...) __riscv_vssubu_vv_u8mf4(__VA_ARGS__)
18061
#define vssubu_vx_u8mf4(...) __riscv_vssubu_vx_u8mf4(__VA_ARGS__)
18062
#define vssubu_vv_u8mf2(...) __riscv_vssubu_vv_u8mf2(__VA_ARGS__)
18063
#define vssubu_vx_u8mf2(...) __riscv_vssubu_vx_u8mf2(__VA_ARGS__)
18064
#define vssubu_vv_u8m1(...) __riscv_vssubu_vv_u8m1(__VA_ARGS__)
18065
#define vssubu_vx_u8m1(...) __riscv_vssubu_vx_u8m1(__VA_ARGS__)
18066
#define vssubu_vv_u8m2(...) __riscv_vssubu_vv_u8m2(__VA_ARGS__)
18067
#define vssubu_vx_u8m2(...) __riscv_vssubu_vx_u8m2(__VA_ARGS__)
18068
#define vssubu_vv_u8m4(...) __riscv_vssubu_vv_u8m4(__VA_ARGS__)
18069
#define vssubu_vx_u8m4(...) __riscv_vssubu_vx_u8m4(__VA_ARGS__)
18070
#define vssubu_vv_u8m8(...) __riscv_vssubu_vv_u8m8(__VA_ARGS__)
18071
#define vssubu_vx_u8m8(...) __riscv_vssubu_vx_u8m8(__VA_ARGS__)
18072
#define vssubu_vv_u16mf4(...) __riscv_vssubu_vv_u16mf4(__VA_ARGS__)
18073
#define vssubu_vx_u16mf4(...) __riscv_vssubu_vx_u16mf4(__VA_ARGS__)
18074
#define vssubu_vv_u16mf2(...) __riscv_vssubu_vv_u16mf2(__VA_ARGS__)
18075
#define vssubu_vx_u16mf2(...) __riscv_vssubu_vx_u16mf2(__VA_ARGS__)
18076
#define vssubu_vv_u16m1(...) __riscv_vssubu_vv_u16m1(__VA_ARGS__)
18077
#define vssubu_vx_u16m1(...) __riscv_vssubu_vx_u16m1(__VA_ARGS__)
18078
#define vssubu_vv_u16m2(...) __riscv_vssubu_vv_u16m2(__VA_ARGS__)
18079
#define vssubu_vx_u16m2(...) __riscv_vssubu_vx_u16m2(__VA_ARGS__)
18080
#define vssubu_vv_u16m4(...) __riscv_vssubu_vv_u16m4(__VA_ARGS__)
18081
#define vssubu_vx_u16m4(...) __riscv_vssubu_vx_u16m4(__VA_ARGS__)
18082
#define vssubu_vv_u16m8(...) __riscv_vssubu_vv_u16m8(__VA_ARGS__)
18083
#define vssubu_vx_u16m8(...) __riscv_vssubu_vx_u16m8(__VA_ARGS__)
18084
#define vssubu_vv_u32mf2(...) __riscv_vssubu_vv_u32mf2(__VA_ARGS__)
18085
#define vssubu_vx_u32mf2(...) __riscv_vssubu_vx_u32mf2(__VA_ARGS__)
18086
#define vssubu_vv_u32m1(...) __riscv_vssubu_vv_u32m1(__VA_ARGS__)
18087
#define vssubu_vx_u32m1(...) __riscv_vssubu_vx_u32m1(__VA_ARGS__)
18088
#define vssubu_vv_u32m2(...) __riscv_vssubu_vv_u32m2(__VA_ARGS__)
18089
#define vssubu_vx_u32m2(...) __riscv_vssubu_vx_u32m2(__VA_ARGS__)
18090
#define vssubu_vv_u32m4(...) __riscv_vssubu_vv_u32m4(__VA_ARGS__)
18091
#define vssubu_vx_u32m4(...) __riscv_vssubu_vx_u32m4(__VA_ARGS__)
18092
#define vssubu_vv_u32m8(...) __riscv_vssubu_vv_u32m8(__VA_ARGS__)
18093
#define vssubu_vx_u32m8(...) __riscv_vssubu_vx_u32m8(__VA_ARGS__)
18094
#define vssubu_vv_u64m1(...) __riscv_vssubu_vv_u64m1(__VA_ARGS__)
18095
#define vssubu_vx_u64m1(...) __riscv_vssubu_vx_u64m1(__VA_ARGS__)
18096
#define vssubu_vv_u64m2(...) __riscv_vssubu_vv_u64m2(__VA_ARGS__)
18097
#define vssubu_vx_u64m2(...) __riscv_vssubu_vx_u64m2(__VA_ARGS__)
18098
#define vssubu_vv_u64m4(...) __riscv_vssubu_vv_u64m4(__VA_ARGS__)
18099
#define vssubu_vx_u64m4(...) __riscv_vssubu_vx_u64m4(__VA_ARGS__)
18100
#define vssubu_vv_u64m8(...) __riscv_vssubu_vv_u64m8(__VA_ARGS__)
18101
#define vssubu_vx_u64m8(...) __riscv_vssubu_vx_u64m8(__VA_ARGS__)
18102
// masked functions
18103
#define vsadd_vv_i8mf8_m(...) __riscv_vsadd_vv_i8mf8_tumu(__VA_ARGS__)
18104
#define vsadd_vx_i8mf8_m(...) __riscv_vsadd_vx_i8mf8_tumu(__VA_ARGS__)
18105
#define vsadd_vv_i8mf4_m(...) __riscv_vsadd_vv_i8mf4_tumu(__VA_ARGS__)
18106
#define vsadd_vx_i8mf4_m(...) __riscv_vsadd_vx_i8mf4_tumu(__VA_ARGS__)
18107
#define vsadd_vv_i8mf2_m(...) __riscv_vsadd_vv_i8mf2_tumu(__VA_ARGS__)
18108
#define vsadd_vx_i8mf2_m(...) __riscv_vsadd_vx_i8mf2_tumu(__VA_ARGS__)
18109
#define vsadd_vv_i8m1_m(...) __riscv_vsadd_vv_i8m1_tumu(__VA_ARGS__)
18110
#define vsadd_vx_i8m1_m(...) __riscv_vsadd_vx_i8m1_tumu(__VA_ARGS__)
18111
#define vsadd_vv_i8m2_m(...) __riscv_vsadd_vv_i8m2_tumu(__VA_ARGS__)
18112
#define vsadd_vx_i8m2_m(...) __riscv_vsadd_vx_i8m2_tumu(__VA_ARGS__)
18113
#define vsadd_vv_i8m4_m(...) __riscv_vsadd_vv_i8m4_tumu(__VA_ARGS__)
18114
#define vsadd_vx_i8m4_m(...) __riscv_vsadd_vx_i8m4_tumu(__VA_ARGS__)
18115
#define vsadd_vv_i8m8_m(...) __riscv_vsadd_vv_i8m8_tumu(__VA_ARGS__)
18116
#define vsadd_vx_i8m8_m(...) __riscv_vsadd_vx_i8m8_tumu(__VA_ARGS__)
18117
#define vsadd_vv_i16mf4_m(...) __riscv_vsadd_vv_i16mf4_tumu(__VA_ARGS__)
18118
#define vsadd_vx_i16mf4_m(...) __riscv_vsadd_vx_i16mf4_tumu(__VA_ARGS__)
18119
#define vsadd_vv_i16mf2_m(...) __riscv_vsadd_vv_i16mf2_tumu(__VA_ARGS__)
18120
#define vsadd_vx_i16mf2_m(...) __riscv_vsadd_vx_i16mf2_tumu(__VA_ARGS__)
18121
#define vsadd_vv_i16m1_m(...) __riscv_vsadd_vv_i16m1_tumu(__VA_ARGS__)
18122
#define vsadd_vx_i16m1_m(...) __riscv_vsadd_vx_i16m1_tumu(__VA_ARGS__)
18123
#define vsadd_vv_i16m2_m(...) __riscv_vsadd_vv_i16m2_tumu(__VA_ARGS__)
18124
#define vsadd_vx_i16m2_m(...) __riscv_vsadd_vx_i16m2_tumu(__VA_ARGS__)
18125
#define vsadd_vv_i16m4_m(...) __riscv_vsadd_vv_i16m4_tumu(__VA_ARGS__)
18126
#define vsadd_vx_i16m4_m(...) __riscv_vsadd_vx_i16m4_tumu(__VA_ARGS__)
18127
#define vsadd_vv_i16m8_m(...) __riscv_vsadd_vv_i16m8_tumu(__VA_ARGS__)
18128
#define vsadd_vx_i16m8_m(...) __riscv_vsadd_vx_i16m8_tumu(__VA_ARGS__)
18129
#define vsadd_vv_i32mf2_m(...) __riscv_vsadd_vv_i32mf2_tumu(__VA_ARGS__)
18130
#define vsadd_vx_i32mf2_m(...) __riscv_vsadd_vx_i32mf2_tumu(__VA_ARGS__)
18131
#define vsadd_vv_i32m1_m(...) __riscv_vsadd_vv_i32m1_tumu(__VA_ARGS__)
18132
#define vsadd_vx_i32m1_m(...) __riscv_vsadd_vx_i32m1_tumu(__VA_ARGS__)
18133
#define vsadd_vv_i32m2_m(...) __riscv_vsadd_vv_i32m2_tumu(__VA_ARGS__)
18134
#define vsadd_vx_i32m2_m(...) __riscv_vsadd_vx_i32m2_tumu(__VA_ARGS__)
18135
#define vsadd_vv_i32m4_m(...) __riscv_vsadd_vv_i32m4_tumu(__VA_ARGS__)
18136
#define vsadd_vx_i32m4_m(...) __riscv_vsadd_vx_i32m4_tumu(__VA_ARGS__)
18137
#define vsadd_vv_i32m8_m(...) __riscv_vsadd_vv_i32m8_tumu(__VA_ARGS__)
18138
#define vsadd_vx_i32m8_m(...) __riscv_vsadd_vx_i32m8_tumu(__VA_ARGS__)
18139
#define vsadd_vv_i64m1_m(...) __riscv_vsadd_vv_i64m1_tumu(__VA_ARGS__)
18140
#define vsadd_vx_i64m1_m(...) __riscv_vsadd_vx_i64m1_tumu(__VA_ARGS__)
18141
#define vsadd_vv_i64m2_m(...) __riscv_vsadd_vv_i64m2_tumu(__VA_ARGS__)
18142
#define vsadd_vx_i64m2_m(...) __riscv_vsadd_vx_i64m2_tumu(__VA_ARGS__)
18143
#define vsadd_vv_i64m4_m(...) __riscv_vsadd_vv_i64m4_tumu(__VA_ARGS__)
18144
#define vsadd_vx_i64m4_m(...) __riscv_vsadd_vx_i64m4_tumu(__VA_ARGS__)
18145
#define vsadd_vv_i64m8_m(...) __riscv_vsadd_vv_i64m8_tumu(__VA_ARGS__)
18146
#define vsadd_vx_i64m8_m(...) __riscv_vsadd_vx_i64m8_tumu(__VA_ARGS__)
18147
#define vssub_vv_i8mf8_m(...) __riscv_vssub_vv_i8mf8_tumu(__VA_ARGS__)
18148
#define vssub_vx_i8mf8_m(...) __riscv_vssub_vx_i8mf8_tumu(__VA_ARGS__)
18149
#define vssub_vv_i8mf4_m(...) __riscv_vssub_vv_i8mf4_tumu(__VA_ARGS__)
18150
#define vssub_vx_i8mf4_m(...) __riscv_vssub_vx_i8mf4_tumu(__VA_ARGS__)
18151
#define vssub_vv_i8mf2_m(...) __riscv_vssub_vv_i8mf2_tumu(__VA_ARGS__)
18152
#define vssub_vx_i8mf2_m(...) __riscv_vssub_vx_i8mf2_tumu(__VA_ARGS__)
18153
#define vssub_vv_i8m1_m(...) __riscv_vssub_vv_i8m1_tumu(__VA_ARGS__)
18154
#define vssub_vx_i8m1_m(...) __riscv_vssub_vx_i8m1_tumu(__VA_ARGS__)
18155
#define vssub_vv_i8m2_m(...) __riscv_vssub_vv_i8m2_tumu(__VA_ARGS__)
18156
#define vssub_vx_i8m2_m(...) __riscv_vssub_vx_i8m2_tumu(__VA_ARGS__)
18157
#define vssub_vv_i8m4_m(...) __riscv_vssub_vv_i8m4_tumu(__VA_ARGS__)
18158
#define vssub_vx_i8m4_m(...) __riscv_vssub_vx_i8m4_tumu(__VA_ARGS__)
18159
#define vssub_vv_i8m8_m(...) __riscv_vssub_vv_i8m8_tumu(__VA_ARGS__)
18160
#define vssub_vx_i8m8_m(...) __riscv_vssub_vx_i8m8_tumu(__VA_ARGS__)
18161
#define vssub_vv_i16mf4_m(...) __riscv_vssub_vv_i16mf4_tumu(__VA_ARGS__)
18162
#define vssub_vx_i16mf4_m(...) __riscv_vssub_vx_i16mf4_tumu(__VA_ARGS__)
18163
#define vssub_vv_i16mf2_m(...) __riscv_vssub_vv_i16mf2_tumu(__VA_ARGS__)
18164
#define vssub_vx_i16mf2_m(...) __riscv_vssub_vx_i16mf2_tumu(__VA_ARGS__)
18165
#define vssub_vv_i16m1_m(...) __riscv_vssub_vv_i16m1_tumu(__VA_ARGS__)
18166
#define vssub_vx_i16m1_m(...) __riscv_vssub_vx_i16m1_tumu(__VA_ARGS__)
18167
#define vssub_vv_i16m2_m(...) __riscv_vssub_vv_i16m2_tumu(__VA_ARGS__)
18168
#define vssub_vx_i16m2_m(...) __riscv_vssub_vx_i16m2_tumu(__VA_ARGS__)
18169
#define vssub_vv_i16m4_m(...) __riscv_vssub_vv_i16m4_tumu(__VA_ARGS__)
18170
#define vssub_vx_i16m4_m(...) __riscv_vssub_vx_i16m4_tumu(__VA_ARGS__)
18171
#define vssub_vv_i16m8_m(...) __riscv_vssub_vv_i16m8_tumu(__VA_ARGS__)
18172
#define vssub_vx_i16m8_m(...) __riscv_vssub_vx_i16m8_tumu(__VA_ARGS__)
18173
#define vssub_vv_i32mf2_m(...) __riscv_vssub_vv_i32mf2_tumu(__VA_ARGS__)
18174
#define vssub_vx_i32mf2_m(...) __riscv_vssub_vx_i32mf2_tumu(__VA_ARGS__)
18175
#define vssub_vv_i32m1_m(...) __riscv_vssub_vv_i32m1_tumu(__VA_ARGS__)
18176
#define vssub_vx_i32m1_m(...) __riscv_vssub_vx_i32m1_tumu(__VA_ARGS__)
18177
#define vssub_vv_i32m2_m(...) __riscv_vssub_vv_i32m2_tumu(__VA_ARGS__)
18178
#define vssub_vx_i32m2_m(...) __riscv_vssub_vx_i32m2_tumu(__VA_ARGS__)
18179
#define vssub_vv_i32m4_m(...) __riscv_vssub_vv_i32m4_tumu(__VA_ARGS__)
18180
#define vssub_vx_i32m4_m(...) __riscv_vssub_vx_i32m4_tumu(__VA_ARGS__)
18181
#define vssub_vv_i32m8_m(...) __riscv_vssub_vv_i32m8_tumu(__VA_ARGS__)
18182
#define vssub_vx_i32m8_m(...) __riscv_vssub_vx_i32m8_tumu(__VA_ARGS__)
18183
#define vssub_vv_i64m1_m(...) __riscv_vssub_vv_i64m1_tumu(__VA_ARGS__)
18184
#define vssub_vx_i64m1_m(...) __riscv_vssub_vx_i64m1_tumu(__VA_ARGS__)
18185
#define vssub_vv_i64m2_m(...) __riscv_vssub_vv_i64m2_tumu(__VA_ARGS__)
18186
#define vssub_vx_i64m2_m(...) __riscv_vssub_vx_i64m2_tumu(__VA_ARGS__)
18187
#define vssub_vv_i64m4_m(...) __riscv_vssub_vv_i64m4_tumu(__VA_ARGS__)
18188
#define vssub_vx_i64m4_m(...) __riscv_vssub_vx_i64m4_tumu(__VA_ARGS__)
18189
#define vssub_vv_i64m8_m(...) __riscv_vssub_vv_i64m8_tumu(__VA_ARGS__)
18190
#define vssub_vx_i64m8_m(...) __riscv_vssub_vx_i64m8_tumu(__VA_ARGS__)
18191
#define vsaddu_vv_u8mf8_m(...) __riscv_vsaddu_vv_u8mf8_tumu(__VA_ARGS__)
18192
#define vsaddu_vx_u8mf8_m(...) __riscv_vsaddu_vx_u8mf8_tumu(__VA_ARGS__)
18193
#define vsaddu_vv_u8mf4_m(...) __riscv_vsaddu_vv_u8mf4_tumu(__VA_ARGS__)
18194
#define vsaddu_vx_u8mf4_m(...) __riscv_vsaddu_vx_u8mf4_tumu(__VA_ARGS__)
18195
#define vsaddu_vv_u8mf2_m(...) __riscv_vsaddu_vv_u8mf2_tumu(__VA_ARGS__)
18196
#define vsaddu_vx_u8mf2_m(...) __riscv_vsaddu_vx_u8mf2_tumu(__VA_ARGS__)
18197
#define vsaddu_vv_u8m1_m(...) __riscv_vsaddu_vv_u8m1_tumu(__VA_ARGS__)
18198
#define vsaddu_vx_u8m1_m(...) __riscv_vsaddu_vx_u8m1_tumu(__VA_ARGS__)
18199
#define vsaddu_vv_u8m2_m(...) __riscv_vsaddu_vv_u8m2_tumu(__VA_ARGS__)
18200
#define vsaddu_vx_u8m2_m(...) __riscv_vsaddu_vx_u8m2_tumu(__VA_ARGS__)
18201
#define vsaddu_vv_u8m4_m(...) __riscv_vsaddu_vv_u8m4_tumu(__VA_ARGS__)
18202
#define vsaddu_vx_u8m4_m(...) __riscv_vsaddu_vx_u8m4_tumu(__VA_ARGS__)
18203
#define vsaddu_vv_u8m8_m(...) __riscv_vsaddu_vv_u8m8_tumu(__VA_ARGS__)
18204
#define vsaddu_vx_u8m8_m(...) __riscv_vsaddu_vx_u8m8_tumu(__VA_ARGS__)
18205
#define vsaddu_vv_u16mf4_m(...) __riscv_vsaddu_vv_u16mf4_tumu(__VA_ARGS__)
18206
#define vsaddu_vx_u16mf4_m(...) __riscv_vsaddu_vx_u16mf4_tumu(__VA_ARGS__)
18207
#define vsaddu_vv_u16mf2_m(...) __riscv_vsaddu_vv_u16mf2_tumu(__VA_ARGS__)
18208
#define vsaddu_vx_u16mf2_m(...) __riscv_vsaddu_vx_u16mf2_tumu(__VA_ARGS__)
18209
#define vsaddu_vv_u16m1_m(...) __riscv_vsaddu_vv_u16m1_tumu(__VA_ARGS__)
18210
#define vsaddu_vx_u16m1_m(...) __riscv_vsaddu_vx_u16m1_tumu(__VA_ARGS__)
18211
#define vsaddu_vv_u16m2_m(...) __riscv_vsaddu_vv_u16m2_tumu(__VA_ARGS__)
18212
#define vsaddu_vx_u16m2_m(...) __riscv_vsaddu_vx_u16m2_tumu(__VA_ARGS__)
18213
#define vsaddu_vv_u16m4_m(...) __riscv_vsaddu_vv_u16m4_tumu(__VA_ARGS__)
18214
#define vsaddu_vx_u16m4_m(...) __riscv_vsaddu_vx_u16m4_tumu(__VA_ARGS__)
18215
#define vsaddu_vv_u16m8_m(...) __riscv_vsaddu_vv_u16m8_tumu(__VA_ARGS__)
18216
#define vsaddu_vx_u16m8_m(...) __riscv_vsaddu_vx_u16m8_tumu(__VA_ARGS__)
18217
#define vsaddu_vv_u32mf2_m(...) __riscv_vsaddu_vv_u32mf2_tumu(__VA_ARGS__)
18218
#define vsaddu_vx_u32mf2_m(...) __riscv_vsaddu_vx_u32mf2_tumu(__VA_ARGS__)
18219
#define vsaddu_vv_u32m1_m(...) __riscv_vsaddu_vv_u32m1_tumu(__VA_ARGS__)
18220
#define vsaddu_vx_u32m1_m(...) __riscv_vsaddu_vx_u32m1_tumu(__VA_ARGS__)
18221
#define vsaddu_vv_u32m2_m(...) __riscv_vsaddu_vv_u32m2_tumu(__VA_ARGS__)
18222
#define vsaddu_vx_u32m2_m(...) __riscv_vsaddu_vx_u32m2_tumu(__VA_ARGS__)
18223
#define vsaddu_vv_u32m4_m(...) __riscv_vsaddu_vv_u32m4_tumu(__VA_ARGS__)
18224
#define vsaddu_vx_u32m4_m(...) __riscv_vsaddu_vx_u32m4_tumu(__VA_ARGS__)
18225
#define vsaddu_vv_u32m8_m(...) __riscv_vsaddu_vv_u32m8_tumu(__VA_ARGS__)
18226
#define vsaddu_vx_u32m8_m(...) __riscv_vsaddu_vx_u32m8_tumu(__VA_ARGS__)
18227
#define vsaddu_vv_u64m1_m(...) __riscv_vsaddu_vv_u64m1_tumu(__VA_ARGS__)
18228
#define vsaddu_vx_u64m1_m(...) __riscv_vsaddu_vx_u64m1_tumu(__VA_ARGS__)
18229
#define vsaddu_vv_u64m2_m(...) __riscv_vsaddu_vv_u64m2_tumu(__VA_ARGS__)
18230
#define vsaddu_vx_u64m2_m(...) __riscv_vsaddu_vx_u64m2_tumu(__VA_ARGS__)
18231
#define vsaddu_vv_u64m4_m(...) __riscv_vsaddu_vv_u64m4_tumu(__VA_ARGS__)
18232
#define vsaddu_vx_u64m4_m(...) __riscv_vsaddu_vx_u64m4_tumu(__VA_ARGS__)
18233
#define vsaddu_vv_u64m8_m(...) __riscv_vsaddu_vv_u64m8_tumu(__VA_ARGS__)
18234
#define vsaddu_vx_u64m8_m(...) __riscv_vsaddu_vx_u64m8_tumu(__VA_ARGS__)
18235
#define vssubu_vv_u8mf8_m(...) __riscv_vssubu_vv_u8mf8_tumu(__VA_ARGS__)
18236
#define vssubu_vx_u8mf8_m(...) __riscv_vssubu_vx_u8mf8_tumu(__VA_ARGS__)
18237
#define vssubu_vv_u8mf4_m(...) __riscv_vssubu_vv_u8mf4_tumu(__VA_ARGS__)
18238
#define vssubu_vx_u8mf4_m(...) __riscv_vssubu_vx_u8mf4_tumu(__VA_ARGS__)
18239
#define vssubu_vv_u8mf2_m(...) __riscv_vssubu_vv_u8mf2_tumu(__VA_ARGS__)
18240
#define vssubu_vx_u8mf2_m(...) __riscv_vssubu_vx_u8mf2_tumu(__VA_ARGS__)
18241
#define vssubu_vv_u8m1_m(...) __riscv_vssubu_vv_u8m1_tumu(__VA_ARGS__)
18242
#define vssubu_vx_u8m1_m(...) __riscv_vssubu_vx_u8m1_tumu(__VA_ARGS__)
18243
#define vssubu_vv_u8m2_m(...) __riscv_vssubu_vv_u8m2_tumu(__VA_ARGS__)
18244
#define vssubu_vx_u8m2_m(...) __riscv_vssubu_vx_u8m2_tumu(__VA_ARGS__)
18245
#define vssubu_vv_u8m4_m(...) __riscv_vssubu_vv_u8m4_tumu(__VA_ARGS__)
18246
#define vssubu_vx_u8m4_m(...) __riscv_vssubu_vx_u8m4_tumu(__VA_ARGS__)
18247
#define vssubu_vv_u8m8_m(...) __riscv_vssubu_vv_u8m8_tumu(__VA_ARGS__)
18248
#define vssubu_vx_u8m8_m(...) __riscv_vssubu_vx_u8m8_tumu(__VA_ARGS__)
18249
#define vssubu_vv_u16mf4_m(...) __riscv_vssubu_vv_u16mf4_tumu(__VA_ARGS__)
18250
#define vssubu_vx_u16mf4_m(...) __riscv_vssubu_vx_u16mf4_tumu(__VA_ARGS__)
18251
#define vssubu_vv_u16mf2_m(...) __riscv_vssubu_vv_u16mf2_tumu(__VA_ARGS__)
18252
#define vssubu_vx_u16mf2_m(...) __riscv_vssubu_vx_u16mf2_tumu(__VA_ARGS__)
18253
#define vssubu_vv_u16m1_m(...) __riscv_vssubu_vv_u16m1_tumu(__VA_ARGS__)
18254
#define vssubu_vx_u16m1_m(...) __riscv_vssubu_vx_u16m1_tumu(__VA_ARGS__)
18255
#define vssubu_vv_u16m2_m(...) __riscv_vssubu_vv_u16m2_tumu(__VA_ARGS__)
18256
#define vssubu_vx_u16m2_m(...) __riscv_vssubu_vx_u16m2_tumu(__VA_ARGS__)
18257
#define vssubu_vv_u16m4_m(...) __riscv_vssubu_vv_u16m4_tumu(__VA_ARGS__)
18258
#define vssubu_vx_u16m4_m(...) __riscv_vssubu_vx_u16m4_tumu(__VA_ARGS__)
18259
#define vssubu_vv_u16m8_m(...) __riscv_vssubu_vv_u16m8_tumu(__VA_ARGS__)
18260
#define vssubu_vx_u16m8_m(...) __riscv_vssubu_vx_u16m8_tumu(__VA_ARGS__)
18261
#define vssubu_vv_u32mf2_m(...) __riscv_vssubu_vv_u32mf2_tumu(__VA_ARGS__)
18262
#define vssubu_vx_u32mf2_m(...) __riscv_vssubu_vx_u32mf2_tumu(__VA_ARGS__)
18263
#define vssubu_vv_u32m1_m(...) __riscv_vssubu_vv_u32m1_tumu(__VA_ARGS__)
18264
#define vssubu_vx_u32m1_m(...) __riscv_vssubu_vx_u32m1_tumu(__VA_ARGS__)
18265
#define vssubu_vv_u32m2_m(...) __riscv_vssubu_vv_u32m2_tumu(__VA_ARGS__)
18266
#define vssubu_vx_u32m2_m(...) __riscv_vssubu_vx_u32m2_tumu(__VA_ARGS__)
18267
#define vssubu_vv_u32m4_m(...) __riscv_vssubu_vv_u32m4_tumu(__VA_ARGS__)
18268
#define vssubu_vx_u32m4_m(...) __riscv_vssubu_vx_u32m4_tumu(__VA_ARGS__)
18269
#define vssubu_vv_u32m8_m(...) __riscv_vssubu_vv_u32m8_tumu(__VA_ARGS__)
18270
#define vssubu_vx_u32m8_m(...) __riscv_vssubu_vx_u32m8_tumu(__VA_ARGS__)
18271
#define vssubu_vv_u64m1_m(...) __riscv_vssubu_vv_u64m1_tumu(__VA_ARGS__)
18272
#define vssubu_vx_u64m1_m(...) __riscv_vssubu_vx_u64m1_tumu(__VA_ARGS__)
18273
#define vssubu_vv_u64m2_m(...) __riscv_vssubu_vv_u64m2_tumu(__VA_ARGS__)
18274
#define vssubu_vx_u64m2_m(...) __riscv_vssubu_vx_u64m2_tumu(__VA_ARGS__)
18275
#define vssubu_vv_u64m4_m(...) __riscv_vssubu_vv_u64m4_tumu(__VA_ARGS__)
18276
#define vssubu_vx_u64m4_m(...) __riscv_vssubu_vx_u64m4_tumu(__VA_ARGS__)
18277
#define vssubu_vv_u64m8_m(...) __riscv_vssubu_vv_u64m8_tumu(__VA_ARGS__)
18278
#define vssubu_vx_u64m8_m(...) __riscv_vssubu_vx_u64m8_tumu(__VA_ARGS__)
18279
#define vaadd_vv_i8mf8(...) __riscv_vaadd_vv_i8mf8(__VA_ARGS__)
18280
#define vaadd_vx_i8mf8(...) __riscv_vaadd_vx_i8mf8(__VA_ARGS__)
18281
#define vaadd_vv_i8mf4(...) __riscv_vaadd_vv_i8mf4(__VA_ARGS__)
18282
#define vaadd_vx_i8mf4(...) __riscv_vaadd_vx_i8mf4(__VA_ARGS__)
18283
#define vaadd_vv_i8mf2(...) __riscv_vaadd_vv_i8mf2(__VA_ARGS__)
18284
#define vaadd_vx_i8mf2(...) __riscv_vaadd_vx_i8mf2(__VA_ARGS__)
18285
#define vaadd_vv_i8m1(...) __riscv_vaadd_vv_i8m1(__VA_ARGS__)
18286
#define vaadd_vx_i8m1(...) __riscv_vaadd_vx_i8m1(__VA_ARGS__)
18287
#define vaadd_vv_i8m2(...) __riscv_vaadd_vv_i8m2(__VA_ARGS__)
18288
#define vaadd_vx_i8m2(...) __riscv_vaadd_vx_i8m2(__VA_ARGS__)
18289
#define vaadd_vv_i8m4(...) __riscv_vaadd_vv_i8m4(__VA_ARGS__)
18290
#define vaadd_vx_i8m4(...) __riscv_vaadd_vx_i8m4(__VA_ARGS__)
18291
#define vaadd_vv_i8m8(...) __riscv_vaadd_vv_i8m8(__VA_ARGS__)
18292
#define vaadd_vx_i8m8(...) __riscv_vaadd_vx_i8m8(__VA_ARGS__)
18293
#define vaadd_vv_i16mf4(...) __riscv_vaadd_vv_i16mf4(__VA_ARGS__)
18294
#define vaadd_vx_i16mf4(...) __riscv_vaadd_vx_i16mf4(__VA_ARGS__)
18295
#define vaadd_vv_i16mf2(...) __riscv_vaadd_vv_i16mf2(__VA_ARGS__)
18296
#define vaadd_vx_i16mf2(...) __riscv_vaadd_vx_i16mf2(__VA_ARGS__)
18297
#define vaadd_vv_i16m1(...) __riscv_vaadd_vv_i16m1(__VA_ARGS__)
18298
#define vaadd_vx_i16m1(...) __riscv_vaadd_vx_i16m1(__VA_ARGS__)
18299
#define vaadd_vv_i16m2(...) __riscv_vaadd_vv_i16m2(__VA_ARGS__)
18300
#define vaadd_vx_i16m2(...) __riscv_vaadd_vx_i16m2(__VA_ARGS__)
18301
#define vaadd_vv_i16m4(...) __riscv_vaadd_vv_i16m4(__VA_ARGS__)
18302
#define vaadd_vx_i16m4(...) __riscv_vaadd_vx_i16m4(__VA_ARGS__)
18303
#define vaadd_vv_i16m8(...) __riscv_vaadd_vv_i16m8(__VA_ARGS__)
18304
#define vaadd_vx_i16m8(...) __riscv_vaadd_vx_i16m8(__VA_ARGS__)
18305
#define vaadd_vv_i32mf2(...) __riscv_vaadd_vv_i32mf2(__VA_ARGS__)
18306
#define vaadd_vx_i32mf2(...) __riscv_vaadd_vx_i32mf2(__VA_ARGS__)
18307
#define vaadd_vv_i32m1(...) __riscv_vaadd_vv_i32m1(__VA_ARGS__)
18308
#define vaadd_vx_i32m1(...) __riscv_vaadd_vx_i32m1(__VA_ARGS__)
18309
#define vaadd_vv_i32m2(...) __riscv_vaadd_vv_i32m2(__VA_ARGS__)
18310
#define vaadd_vx_i32m2(...) __riscv_vaadd_vx_i32m2(__VA_ARGS__)
18311
#define vaadd_vv_i32m4(...) __riscv_vaadd_vv_i32m4(__VA_ARGS__)
18312
#define vaadd_vx_i32m4(...) __riscv_vaadd_vx_i32m4(__VA_ARGS__)
18313
#define vaadd_vv_i32m8(...) __riscv_vaadd_vv_i32m8(__VA_ARGS__)
18314
#define vaadd_vx_i32m8(...) __riscv_vaadd_vx_i32m8(__VA_ARGS__)
18315
#define vaadd_vv_i64m1(...) __riscv_vaadd_vv_i64m1(__VA_ARGS__)
18316
#define vaadd_vx_i64m1(...) __riscv_vaadd_vx_i64m1(__VA_ARGS__)
18317
#define vaadd_vv_i64m2(...) __riscv_vaadd_vv_i64m2(__VA_ARGS__)
18318
#define vaadd_vx_i64m2(...) __riscv_vaadd_vx_i64m2(__VA_ARGS__)
18319
#define vaadd_vv_i64m4(...) __riscv_vaadd_vv_i64m4(__VA_ARGS__)
18320
#define vaadd_vx_i64m4(...) __riscv_vaadd_vx_i64m4(__VA_ARGS__)
18321
#define vaadd_vv_i64m8(...) __riscv_vaadd_vv_i64m8(__VA_ARGS__)
18322
#define vaadd_vx_i64m8(...) __riscv_vaadd_vx_i64m8(__VA_ARGS__)
18323
#define vasub_vv_i8mf8(...) __riscv_vasub_vv_i8mf8(__VA_ARGS__)
18324
#define vasub_vx_i8mf8(...) __riscv_vasub_vx_i8mf8(__VA_ARGS__)
18325
#define vasub_vv_i8mf4(...) __riscv_vasub_vv_i8mf4(__VA_ARGS__)
18326
#define vasub_vx_i8mf4(...) __riscv_vasub_vx_i8mf4(__VA_ARGS__)
18327
#define vasub_vv_i8mf2(...) __riscv_vasub_vv_i8mf2(__VA_ARGS__)
18328
#define vasub_vx_i8mf2(...) __riscv_vasub_vx_i8mf2(__VA_ARGS__)
18329
#define vasub_vv_i8m1(...) __riscv_vasub_vv_i8m1(__VA_ARGS__)
18330
#define vasub_vx_i8m1(...) __riscv_vasub_vx_i8m1(__VA_ARGS__)
18331
#define vasub_vv_i8m2(...) __riscv_vasub_vv_i8m2(__VA_ARGS__)
18332
#define vasub_vx_i8m2(...) __riscv_vasub_vx_i8m2(__VA_ARGS__)
18333
#define vasub_vv_i8m4(...) __riscv_vasub_vv_i8m4(__VA_ARGS__)
18334
#define vasub_vx_i8m4(...) __riscv_vasub_vx_i8m4(__VA_ARGS__)
18335
#define vasub_vv_i8m8(...) __riscv_vasub_vv_i8m8(__VA_ARGS__)
18336
#define vasub_vx_i8m8(...) __riscv_vasub_vx_i8m8(__VA_ARGS__)
18337
#define vasub_vv_i16mf4(...) __riscv_vasub_vv_i16mf4(__VA_ARGS__)
18338
#define vasub_vx_i16mf4(...) __riscv_vasub_vx_i16mf4(__VA_ARGS__)
18339
#define vasub_vv_i16mf2(...) __riscv_vasub_vv_i16mf2(__VA_ARGS__)
18340
#define vasub_vx_i16mf2(...) __riscv_vasub_vx_i16mf2(__VA_ARGS__)
18341
#define vasub_vv_i16m1(...) __riscv_vasub_vv_i16m1(__VA_ARGS__)
18342
#define vasub_vx_i16m1(...) __riscv_vasub_vx_i16m1(__VA_ARGS__)
18343
#define vasub_vv_i16m2(...) __riscv_vasub_vv_i16m2(__VA_ARGS__)
18344
#define vasub_vx_i16m2(...) __riscv_vasub_vx_i16m2(__VA_ARGS__)
18345
#define vasub_vv_i16m4(...) __riscv_vasub_vv_i16m4(__VA_ARGS__)
18346
#define vasub_vx_i16m4(...) __riscv_vasub_vx_i16m4(__VA_ARGS__)
18347
#define vasub_vv_i16m8(...) __riscv_vasub_vv_i16m8(__VA_ARGS__)
18348
#define vasub_vx_i16m8(...) __riscv_vasub_vx_i16m8(__VA_ARGS__)
18349
#define vasub_vv_i32mf2(...) __riscv_vasub_vv_i32mf2(__VA_ARGS__)
18350
#define vasub_vx_i32mf2(...) __riscv_vasub_vx_i32mf2(__VA_ARGS__)
18351
#define vasub_vv_i32m1(...) __riscv_vasub_vv_i32m1(__VA_ARGS__)
18352
#define vasub_vx_i32m1(...) __riscv_vasub_vx_i32m1(__VA_ARGS__)
18353
#define vasub_vv_i32m2(...) __riscv_vasub_vv_i32m2(__VA_ARGS__)
18354
#define vasub_vx_i32m2(...) __riscv_vasub_vx_i32m2(__VA_ARGS__)
18355
#define vasub_vv_i32m4(...) __riscv_vasub_vv_i32m4(__VA_ARGS__)
18356
#define vasub_vx_i32m4(...) __riscv_vasub_vx_i32m4(__VA_ARGS__)
18357
#define vasub_vv_i32m8(...) __riscv_vasub_vv_i32m8(__VA_ARGS__)
18358
#define vasub_vx_i32m8(...) __riscv_vasub_vx_i32m8(__VA_ARGS__)
18359
#define vasub_vv_i64m1(...) __riscv_vasub_vv_i64m1(__VA_ARGS__)
18360
#define vasub_vx_i64m1(...) __riscv_vasub_vx_i64m1(__VA_ARGS__)
18361
#define vasub_vv_i64m2(...) __riscv_vasub_vv_i64m2(__VA_ARGS__)
18362
#define vasub_vx_i64m2(...) __riscv_vasub_vx_i64m2(__VA_ARGS__)
18363
#define vasub_vv_i64m4(...) __riscv_vasub_vv_i64m4(__VA_ARGS__)
18364
#define vasub_vx_i64m4(...) __riscv_vasub_vx_i64m4(__VA_ARGS__)
18365
#define vasub_vv_i64m8(...) __riscv_vasub_vv_i64m8(__VA_ARGS__)
18366
#define vasub_vx_i64m8(...) __riscv_vasub_vx_i64m8(__VA_ARGS__)
18367
#define vaaddu_vv_u8mf8(...) __riscv_vaaddu_vv_u8mf8(__VA_ARGS__)
18368
#define vaaddu_vx_u8mf8(...) __riscv_vaaddu_vx_u8mf8(__VA_ARGS__)
18369
#define vaaddu_vv_u8mf4(...) __riscv_vaaddu_vv_u8mf4(__VA_ARGS__)
18370
#define vaaddu_vx_u8mf4(...) __riscv_vaaddu_vx_u8mf4(__VA_ARGS__)
18371
#define vaaddu_vv_u8mf2(...) __riscv_vaaddu_vv_u8mf2(__VA_ARGS__)
18372
#define vaaddu_vx_u8mf2(...) __riscv_vaaddu_vx_u8mf2(__VA_ARGS__)
18373
#define vaaddu_vv_u8m1(...) __riscv_vaaddu_vv_u8m1(__VA_ARGS__)
18374
#define vaaddu_vx_u8m1(...) __riscv_vaaddu_vx_u8m1(__VA_ARGS__)
18375
#define vaaddu_vv_u8m2(...) __riscv_vaaddu_vv_u8m2(__VA_ARGS__)
18376
#define vaaddu_vx_u8m2(...) __riscv_vaaddu_vx_u8m2(__VA_ARGS__)
18377
#define vaaddu_vv_u8m4(...) __riscv_vaaddu_vv_u8m4(__VA_ARGS__)
18378
#define vaaddu_vx_u8m4(...) __riscv_vaaddu_vx_u8m4(__VA_ARGS__)
18379
#define vaaddu_vv_u8m8(...) __riscv_vaaddu_vv_u8m8(__VA_ARGS__)
18380
#define vaaddu_vx_u8m8(...) __riscv_vaaddu_vx_u8m8(__VA_ARGS__)
18381
#define vaaddu_vv_u16mf4(...) __riscv_vaaddu_vv_u16mf4(__VA_ARGS__)
18382
#define vaaddu_vx_u16mf4(...) __riscv_vaaddu_vx_u16mf4(__VA_ARGS__)
18383
#define vaaddu_vv_u16mf2(...) __riscv_vaaddu_vv_u16mf2(__VA_ARGS__)
18384
#define vaaddu_vx_u16mf2(...) __riscv_vaaddu_vx_u16mf2(__VA_ARGS__)
18385
#define vaaddu_vv_u16m1(...) __riscv_vaaddu_vv_u16m1(__VA_ARGS__)
18386
#define vaaddu_vx_u16m1(...) __riscv_vaaddu_vx_u16m1(__VA_ARGS__)
18387
#define vaaddu_vv_u16m2(...) __riscv_vaaddu_vv_u16m2(__VA_ARGS__)
18388
#define vaaddu_vx_u16m2(...) __riscv_vaaddu_vx_u16m2(__VA_ARGS__)
18389
#define vaaddu_vv_u16m4(...) __riscv_vaaddu_vv_u16m4(__VA_ARGS__)
18390
#define vaaddu_vx_u16m4(...) __riscv_vaaddu_vx_u16m4(__VA_ARGS__)
18391
#define vaaddu_vv_u16m8(...) __riscv_vaaddu_vv_u16m8(__VA_ARGS__)
18392
#define vaaddu_vx_u16m8(...) __riscv_vaaddu_vx_u16m8(__VA_ARGS__)
18393
#define vaaddu_vv_u32mf2(...) __riscv_vaaddu_vv_u32mf2(__VA_ARGS__)
18394
#define vaaddu_vx_u32mf2(...) __riscv_vaaddu_vx_u32mf2(__VA_ARGS__)
18395
#define vaaddu_vv_u32m1(...) __riscv_vaaddu_vv_u32m1(__VA_ARGS__)
18396
#define vaaddu_vx_u32m1(...) __riscv_vaaddu_vx_u32m1(__VA_ARGS__)
18397
#define vaaddu_vv_u32m2(...) __riscv_vaaddu_vv_u32m2(__VA_ARGS__)
18398
#define vaaddu_vx_u32m2(...) __riscv_vaaddu_vx_u32m2(__VA_ARGS__)
18399
#define vaaddu_vv_u32m4(...) __riscv_vaaddu_vv_u32m4(__VA_ARGS__)
18400
#define vaaddu_vx_u32m4(...) __riscv_vaaddu_vx_u32m4(__VA_ARGS__)
18401
#define vaaddu_vv_u32m8(...) __riscv_vaaddu_vv_u32m8(__VA_ARGS__)
18402
#define vaaddu_vx_u32m8(...) __riscv_vaaddu_vx_u32m8(__VA_ARGS__)
18403
#define vaaddu_vv_u64m1(...) __riscv_vaaddu_vv_u64m1(__VA_ARGS__)
18404
#define vaaddu_vx_u64m1(...) __riscv_vaaddu_vx_u64m1(__VA_ARGS__)
18405
#define vaaddu_vv_u64m2(...) __riscv_vaaddu_vv_u64m2(__VA_ARGS__)
18406
#define vaaddu_vx_u64m2(...) __riscv_vaaddu_vx_u64m2(__VA_ARGS__)
18407
#define vaaddu_vv_u64m4(...) __riscv_vaaddu_vv_u64m4(__VA_ARGS__)
18408
#define vaaddu_vx_u64m4(...) __riscv_vaaddu_vx_u64m4(__VA_ARGS__)
18409
#define vaaddu_vv_u64m8(...) __riscv_vaaddu_vv_u64m8(__VA_ARGS__)
18410
#define vaaddu_vx_u64m8(...) __riscv_vaaddu_vx_u64m8(__VA_ARGS__)
18411
#define vasubu_vv_u8mf8(...) __riscv_vasubu_vv_u8mf8(__VA_ARGS__)
18412
#define vasubu_vx_u8mf8(...) __riscv_vasubu_vx_u8mf8(__VA_ARGS__)
18413
#define vasubu_vv_u8mf4(...) __riscv_vasubu_vv_u8mf4(__VA_ARGS__)
18414
#define vasubu_vx_u8mf4(...) __riscv_vasubu_vx_u8mf4(__VA_ARGS__)
18415
#define vasubu_vv_u8mf2(...) __riscv_vasubu_vv_u8mf2(__VA_ARGS__)
18416
#define vasubu_vx_u8mf2(...) __riscv_vasubu_vx_u8mf2(__VA_ARGS__)
18417
#define vasubu_vv_u8m1(...) __riscv_vasubu_vv_u8m1(__VA_ARGS__)
18418
#define vasubu_vx_u8m1(...) __riscv_vasubu_vx_u8m1(__VA_ARGS__)
18419
#define vasubu_vv_u8m2(...) __riscv_vasubu_vv_u8m2(__VA_ARGS__)
18420
#define vasubu_vx_u8m2(...) __riscv_vasubu_vx_u8m2(__VA_ARGS__)
18421
#define vasubu_vv_u8m4(...) __riscv_vasubu_vv_u8m4(__VA_ARGS__)
18422
#define vasubu_vx_u8m4(...) __riscv_vasubu_vx_u8m4(__VA_ARGS__)
18423
#define vasubu_vv_u8m8(...) __riscv_vasubu_vv_u8m8(__VA_ARGS__)
18424
#define vasubu_vx_u8m8(...) __riscv_vasubu_vx_u8m8(__VA_ARGS__)
18425
#define vasubu_vv_u16mf4(...) __riscv_vasubu_vv_u16mf4(__VA_ARGS__)
18426
#define vasubu_vx_u16mf4(...) __riscv_vasubu_vx_u16mf4(__VA_ARGS__)
18427
#define vasubu_vv_u16mf2(...) __riscv_vasubu_vv_u16mf2(__VA_ARGS__)
18428
#define vasubu_vx_u16mf2(...) __riscv_vasubu_vx_u16mf2(__VA_ARGS__)
18429
#define vasubu_vv_u16m1(...) __riscv_vasubu_vv_u16m1(__VA_ARGS__)
18430
#define vasubu_vx_u16m1(...) __riscv_vasubu_vx_u16m1(__VA_ARGS__)
18431
#define vasubu_vv_u16m2(...) __riscv_vasubu_vv_u16m2(__VA_ARGS__)
18432
#define vasubu_vx_u16m2(...) __riscv_vasubu_vx_u16m2(__VA_ARGS__)
18433
#define vasubu_vv_u16m4(...) __riscv_vasubu_vv_u16m4(__VA_ARGS__)
18434
#define vasubu_vx_u16m4(...) __riscv_vasubu_vx_u16m4(__VA_ARGS__)
18435
#define vasubu_vv_u16m8(...) __riscv_vasubu_vv_u16m8(__VA_ARGS__)
18436
#define vasubu_vx_u16m8(...) __riscv_vasubu_vx_u16m8(__VA_ARGS__)
18437
#define vasubu_vv_u32mf2(...) __riscv_vasubu_vv_u32mf2(__VA_ARGS__)
18438
#define vasubu_vx_u32mf2(...) __riscv_vasubu_vx_u32mf2(__VA_ARGS__)
18439
#define vasubu_vv_u32m1(...) __riscv_vasubu_vv_u32m1(__VA_ARGS__)
18440
#define vasubu_vx_u32m1(...) __riscv_vasubu_vx_u32m1(__VA_ARGS__)
18441
#define vasubu_vv_u32m2(...) __riscv_vasubu_vv_u32m2(__VA_ARGS__)
18442
#define vasubu_vx_u32m2(...) __riscv_vasubu_vx_u32m2(__VA_ARGS__)
18443
#define vasubu_vv_u32m4(...) __riscv_vasubu_vv_u32m4(__VA_ARGS__)
18444
#define vasubu_vx_u32m4(...) __riscv_vasubu_vx_u32m4(__VA_ARGS__)
18445
#define vasubu_vv_u32m8(...) __riscv_vasubu_vv_u32m8(__VA_ARGS__)
18446
#define vasubu_vx_u32m8(...) __riscv_vasubu_vx_u32m8(__VA_ARGS__)
18447
#define vasubu_vv_u64m1(...) __riscv_vasubu_vv_u64m1(__VA_ARGS__)
18448
#define vasubu_vx_u64m1(...) __riscv_vasubu_vx_u64m1(__VA_ARGS__)
18449
#define vasubu_vv_u64m2(...) __riscv_vasubu_vv_u64m2(__VA_ARGS__)
18450
#define vasubu_vx_u64m2(...) __riscv_vasubu_vx_u64m2(__VA_ARGS__)
18451
#define vasubu_vv_u64m4(...) __riscv_vasubu_vv_u64m4(__VA_ARGS__)
18452
#define vasubu_vx_u64m4(...) __riscv_vasubu_vx_u64m4(__VA_ARGS__)
18453
#define vasubu_vv_u64m8(...) __riscv_vasubu_vv_u64m8(__VA_ARGS__)
18454
#define vasubu_vx_u64m8(...) __riscv_vasubu_vx_u64m8(__VA_ARGS__)
18455
// masked functions
18456
#define vaadd_vv_i8mf8_m(...) __riscv_vaadd_vv_i8mf8_tumu(__VA_ARGS__)
18457
#define vaadd_vx_i8mf8_m(...) __riscv_vaadd_vx_i8mf8_tumu(__VA_ARGS__)
18458
#define vaadd_vv_i8mf4_m(...) __riscv_vaadd_vv_i8mf4_tumu(__VA_ARGS__)
18459
#define vaadd_vx_i8mf4_m(...) __riscv_vaadd_vx_i8mf4_tumu(__VA_ARGS__)
18460
#define vaadd_vv_i8mf2_m(...) __riscv_vaadd_vv_i8mf2_tumu(__VA_ARGS__)
18461
#define vaadd_vx_i8mf2_m(...) __riscv_vaadd_vx_i8mf2_tumu(__VA_ARGS__)
18462
#define vaadd_vv_i8m1_m(...) __riscv_vaadd_vv_i8m1_tumu(__VA_ARGS__)
18463
#define vaadd_vx_i8m1_m(...) __riscv_vaadd_vx_i8m1_tumu(__VA_ARGS__)
18464
#define vaadd_vv_i8m2_m(...) __riscv_vaadd_vv_i8m2_tumu(__VA_ARGS__)
18465
#define vaadd_vx_i8m2_m(...) __riscv_vaadd_vx_i8m2_tumu(__VA_ARGS__)
18466
#define vaadd_vv_i8m4_m(...) __riscv_vaadd_vv_i8m4_tumu(__VA_ARGS__)
18467
#define vaadd_vx_i8m4_m(...) __riscv_vaadd_vx_i8m4_tumu(__VA_ARGS__)
18468
#define vaadd_vv_i8m8_m(...) __riscv_vaadd_vv_i8m8_tumu(__VA_ARGS__)
18469
#define vaadd_vx_i8m8_m(...) __riscv_vaadd_vx_i8m8_tumu(__VA_ARGS__)
18470
#define vaadd_vv_i16mf4_m(...) __riscv_vaadd_vv_i16mf4_tumu(__VA_ARGS__)
18471
#define vaadd_vx_i16mf4_m(...) __riscv_vaadd_vx_i16mf4_tumu(__VA_ARGS__)
18472
#define vaadd_vv_i16mf2_m(...) __riscv_vaadd_vv_i16mf2_tumu(__VA_ARGS__)
18473
#define vaadd_vx_i16mf2_m(...) __riscv_vaadd_vx_i16mf2_tumu(__VA_ARGS__)
18474
#define vaadd_vv_i16m1_m(...) __riscv_vaadd_vv_i16m1_tumu(__VA_ARGS__)
18475
#define vaadd_vx_i16m1_m(...) __riscv_vaadd_vx_i16m1_tumu(__VA_ARGS__)
18476
#define vaadd_vv_i16m2_m(...) __riscv_vaadd_vv_i16m2_tumu(__VA_ARGS__)
18477
#define vaadd_vx_i16m2_m(...) __riscv_vaadd_vx_i16m2_tumu(__VA_ARGS__)
18478
#define vaadd_vv_i16m4_m(...) __riscv_vaadd_vv_i16m4_tumu(__VA_ARGS__)
18479
#define vaadd_vx_i16m4_m(...) __riscv_vaadd_vx_i16m4_tumu(__VA_ARGS__)
18480
#define vaadd_vv_i16m8_m(...) __riscv_vaadd_vv_i16m8_tumu(__VA_ARGS__)
18481
#define vaadd_vx_i16m8_m(...) __riscv_vaadd_vx_i16m8_tumu(__VA_ARGS__)
18482
#define vaadd_vv_i32mf2_m(...) __riscv_vaadd_vv_i32mf2_tumu(__VA_ARGS__)
18483
#define vaadd_vx_i32mf2_m(...) __riscv_vaadd_vx_i32mf2_tumu(__VA_ARGS__)
18484
#define vaadd_vv_i32m1_m(...) __riscv_vaadd_vv_i32m1_tumu(__VA_ARGS__)
18485
#define vaadd_vx_i32m1_m(...) __riscv_vaadd_vx_i32m1_tumu(__VA_ARGS__)
18486
#define vaadd_vv_i32m2_m(...) __riscv_vaadd_vv_i32m2_tumu(__VA_ARGS__)
18487
#define vaadd_vx_i32m2_m(...) __riscv_vaadd_vx_i32m2_tumu(__VA_ARGS__)
18488
#define vaadd_vv_i32m4_m(...) __riscv_vaadd_vv_i32m4_tumu(__VA_ARGS__)
18489
#define vaadd_vx_i32m4_m(...) __riscv_vaadd_vx_i32m4_tumu(__VA_ARGS__)
18490
#define vaadd_vv_i32m8_m(...) __riscv_vaadd_vv_i32m8_tumu(__VA_ARGS__)
18491
#define vaadd_vx_i32m8_m(...) __riscv_vaadd_vx_i32m8_tumu(__VA_ARGS__)
18492
#define vaadd_vv_i64m1_m(...) __riscv_vaadd_vv_i64m1_tumu(__VA_ARGS__)
18493
#define vaadd_vx_i64m1_m(...) __riscv_vaadd_vx_i64m1_tumu(__VA_ARGS__)
18494
#define vaadd_vv_i64m2_m(...) __riscv_vaadd_vv_i64m2_tumu(__VA_ARGS__)
18495
#define vaadd_vx_i64m2_m(...) __riscv_vaadd_vx_i64m2_tumu(__VA_ARGS__)
18496
#define vaadd_vv_i64m4_m(...) __riscv_vaadd_vv_i64m4_tumu(__VA_ARGS__)
18497
#define vaadd_vx_i64m4_m(...) __riscv_vaadd_vx_i64m4_tumu(__VA_ARGS__)
18498
#define vaadd_vv_i64m8_m(...) __riscv_vaadd_vv_i64m8_tumu(__VA_ARGS__)
18499
#define vaadd_vx_i64m8_m(...) __riscv_vaadd_vx_i64m8_tumu(__VA_ARGS__)
18500
#define vasub_vv_i8mf8_m(...) __riscv_vasub_vv_i8mf8_tumu(__VA_ARGS__)
18501
#define vasub_vx_i8mf8_m(...) __riscv_vasub_vx_i8mf8_tumu(__VA_ARGS__)
18502
#define vasub_vv_i8mf4_m(...) __riscv_vasub_vv_i8mf4_tumu(__VA_ARGS__)
18503
#define vasub_vx_i8mf4_m(...) __riscv_vasub_vx_i8mf4_tumu(__VA_ARGS__)
18504
#define vasub_vv_i8mf2_m(...) __riscv_vasub_vv_i8mf2_tumu(__VA_ARGS__)
18505
#define vasub_vx_i8mf2_m(...) __riscv_vasub_vx_i8mf2_tumu(__VA_ARGS__)
18506
#define vasub_vv_i8m1_m(...) __riscv_vasub_vv_i8m1_tumu(__VA_ARGS__)
18507
#define vasub_vx_i8m1_m(...) __riscv_vasub_vx_i8m1_tumu(__VA_ARGS__)
18508
#define vasub_vv_i8m2_m(...) __riscv_vasub_vv_i8m2_tumu(__VA_ARGS__)
18509
#define vasub_vx_i8m2_m(...) __riscv_vasub_vx_i8m2_tumu(__VA_ARGS__)
18510
#define vasub_vv_i8m4_m(...) __riscv_vasub_vv_i8m4_tumu(__VA_ARGS__)
18511
#define vasub_vx_i8m4_m(...) __riscv_vasub_vx_i8m4_tumu(__VA_ARGS__)
18512
#define vasub_vv_i8m8_m(...) __riscv_vasub_vv_i8m8_tumu(__VA_ARGS__)
18513
#define vasub_vx_i8m8_m(...) __riscv_vasub_vx_i8m8_tumu(__VA_ARGS__)
18514
#define vasub_vv_i16mf4_m(...) __riscv_vasub_vv_i16mf4_tumu(__VA_ARGS__)
18515
#define vasub_vx_i16mf4_m(...) __riscv_vasub_vx_i16mf4_tumu(__VA_ARGS__)
18516
#define vasub_vv_i16mf2_m(...) __riscv_vasub_vv_i16mf2_tumu(__VA_ARGS__)
18517
#define vasub_vx_i16mf2_m(...) __riscv_vasub_vx_i16mf2_tumu(__VA_ARGS__)
18518
#define vasub_vv_i16m1_m(...) __riscv_vasub_vv_i16m1_tumu(__VA_ARGS__)
18519
#define vasub_vx_i16m1_m(...) __riscv_vasub_vx_i16m1_tumu(__VA_ARGS__)
18520
#define vasub_vv_i16m2_m(...) __riscv_vasub_vv_i16m2_tumu(__VA_ARGS__)
18521
#define vasub_vx_i16m2_m(...) __riscv_vasub_vx_i16m2_tumu(__VA_ARGS__)
18522
#define vasub_vv_i16m4_m(...) __riscv_vasub_vv_i16m4_tumu(__VA_ARGS__)
18523
#define vasub_vx_i16m4_m(...) __riscv_vasub_vx_i16m4_tumu(__VA_ARGS__)
18524
#define vasub_vv_i16m8_m(...) __riscv_vasub_vv_i16m8_tumu(__VA_ARGS__)
18525
#define vasub_vx_i16m8_m(...) __riscv_vasub_vx_i16m8_tumu(__VA_ARGS__)
18526
#define vasub_vv_i32mf2_m(...) __riscv_vasub_vv_i32mf2_tumu(__VA_ARGS__)
18527
#define vasub_vx_i32mf2_m(...) __riscv_vasub_vx_i32mf2_tumu(__VA_ARGS__)
18528
#define vasub_vv_i32m1_m(...) __riscv_vasub_vv_i32m1_tumu(__VA_ARGS__)
18529
#define vasub_vx_i32m1_m(...) __riscv_vasub_vx_i32m1_tumu(__VA_ARGS__)
18530
#define vasub_vv_i32m2_m(...) __riscv_vasub_vv_i32m2_tumu(__VA_ARGS__)
18531
#define vasub_vx_i32m2_m(...) __riscv_vasub_vx_i32m2_tumu(__VA_ARGS__)
18532
#define vasub_vv_i32m4_m(...) __riscv_vasub_vv_i32m4_tumu(__VA_ARGS__)
18533
#define vasub_vx_i32m4_m(...) __riscv_vasub_vx_i32m4_tumu(__VA_ARGS__)
18534
#define vasub_vv_i32m8_m(...) __riscv_vasub_vv_i32m8_tumu(__VA_ARGS__)
18535
#define vasub_vx_i32m8_m(...) __riscv_vasub_vx_i32m8_tumu(__VA_ARGS__)
18536
#define vasub_vv_i64m1_m(...) __riscv_vasub_vv_i64m1_tumu(__VA_ARGS__)
18537
#define vasub_vx_i64m1_m(...) __riscv_vasub_vx_i64m1_tumu(__VA_ARGS__)
18538
#define vasub_vv_i64m2_m(...) __riscv_vasub_vv_i64m2_tumu(__VA_ARGS__)
18539
#define vasub_vx_i64m2_m(...) __riscv_vasub_vx_i64m2_tumu(__VA_ARGS__)
18540
#define vasub_vv_i64m4_m(...) __riscv_vasub_vv_i64m4_tumu(__VA_ARGS__)
18541
#define vasub_vx_i64m4_m(...) __riscv_vasub_vx_i64m4_tumu(__VA_ARGS__)
18542
#define vasub_vv_i64m8_m(...) __riscv_vasub_vv_i64m8_tumu(__VA_ARGS__)
18543
#define vasub_vx_i64m8_m(...) __riscv_vasub_vx_i64m8_tumu(__VA_ARGS__)
18544
#define vaaddu_vv_u8mf8_m(...) __riscv_vaaddu_vv_u8mf8_tumu(__VA_ARGS__)
18545
#define vaaddu_vx_u8mf8_m(...) __riscv_vaaddu_vx_u8mf8_tumu(__VA_ARGS__)
18546
#define vaaddu_vv_u8mf4_m(...) __riscv_vaaddu_vv_u8mf4_tumu(__VA_ARGS__)
18547
#define vaaddu_vx_u8mf4_m(...) __riscv_vaaddu_vx_u8mf4_tumu(__VA_ARGS__)
18548
#define vaaddu_vv_u8mf2_m(...) __riscv_vaaddu_vv_u8mf2_tumu(__VA_ARGS__)
18549
#define vaaddu_vx_u8mf2_m(...) __riscv_vaaddu_vx_u8mf2_tumu(__VA_ARGS__)
18550
#define vaaddu_vv_u8m1_m(...) __riscv_vaaddu_vv_u8m1_tumu(__VA_ARGS__)
18551
#define vaaddu_vx_u8m1_m(...) __riscv_vaaddu_vx_u8m1_tumu(__VA_ARGS__)
18552
#define vaaddu_vv_u8m2_m(...) __riscv_vaaddu_vv_u8m2_tumu(__VA_ARGS__)
18553
#define vaaddu_vx_u8m2_m(...) __riscv_vaaddu_vx_u8m2_tumu(__VA_ARGS__)
18554
#define vaaddu_vv_u8m4_m(...) __riscv_vaaddu_vv_u8m4_tumu(__VA_ARGS__)
18555
#define vaaddu_vx_u8m4_m(...) __riscv_vaaddu_vx_u8m4_tumu(__VA_ARGS__)
18556
#define vaaddu_vv_u8m8_m(...) __riscv_vaaddu_vv_u8m8_tumu(__VA_ARGS__)
18557
#define vaaddu_vx_u8m8_m(...) __riscv_vaaddu_vx_u8m8_tumu(__VA_ARGS__)
18558
#define vaaddu_vv_u16mf4_m(...) __riscv_vaaddu_vv_u16mf4_tumu(__VA_ARGS__)
18559
#define vaaddu_vx_u16mf4_m(...) __riscv_vaaddu_vx_u16mf4_tumu(__VA_ARGS__)
18560
#define vaaddu_vv_u16mf2_m(...) __riscv_vaaddu_vv_u16mf2_tumu(__VA_ARGS__)
18561
#define vaaddu_vx_u16mf2_m(...) __riscv_vaaddu_vx_u16mf2_tumu(__VA_ARGS__)
18562
#define vaaddu_vv_u16m1_m(...) __riscv_vaaddu_vv_u16m1_tumu(__VA_ARGS__)
18563
#define vaaddu_vx_u16m1_m(...) __riscv_vaaddu_vx_u16m1_tumu(__VA_ARGS__)
18564
#define vaaddu_vv_u16m2_m(...) __riscv_vaaddu_vv_u16m2_tumu(__VA_ARGS__)
18565
#define vaaddu_vx_u16m2_m(...) __riscv_vaaddu_vx_u16m2_tumu(__VA_ARGS__)
18566
#define vaaddu_vv_u16m4_m(...) __riscv_vaaddu_vv_u16m4_tumu(__VA_ARGS__)
18567
#define vaaddu_vx_u16m4_m(...) __riscv_vaaddu_vx_u16m4_tumu(__VA_ARGS__)
18568
#define vaaddu_vv_u16m8_m(...) __riscv_vaaddu_vv_u16m8_tumu(__VA_ARGS__)
18569
#define vaaddu_vx_u16m8_m(...) __riscv_vaaddu_vx_u16m8_tumu(__VA_ARGS__)
18570
#define vaaddu_vv_u32mf2_m(...) __riscv_vaaddu_vv_u32mf2_tumu(__VA_ARGS__)
18571
#define vaaddu_vx_u32mf2_m(...) __riscv_vaaddu_vx_u32mf2_tumu(__VA_ARGS__)
18572
#define vaaddu_vv_u32m1_m(...) __riscv_vaaddu_vv_u32m1_tumu(__VA_ARGS__)
18573
#define vaaddu_vx_u32m1_m(...) __riscv_vaaddu_vx_u32m1_tumu(__VA_ARGS__)
18574
#define vaaddu_vv_u32m2_m(...) __riscv_vaaddu_vv_u32m2_tumu(__VA_ARGS__)
18575
#define vaaddu_vx_u32m2_m(...) __riscv_vaaddu_vx_u32m2_tumu(__VA_ARGS__)
18576
#define vaaddu_vv_u32m4_m(...) __riscv_vaaddu_vv_u32m4_tumu(__VA_ARGS__)
18577
#define vaaddu_vx_u32m4_m(...) __riscv_vaaddu_vx_u32m4_tumu(__VA_ARGS__)
18578
#define vaaddu_vv_u32m8_m(...) __riscv_vaaddu_vv_u32m8_tumu(__VA_ARGS__)
18579
#define vaaddu_vx_u32m8_m(...) __riscv_vaaddu_vx_u32m8_tumu(__VA_ARGS__)
18580
#define vaaddu_vv_u64m1_m(...) __riscv_vaaddu_vv_u64m1_tumu(__VA_ARGS__)
18581
#define vaaddu_vx_u64m1_m(...) __riscv_vaaddu_vx_u64m1_tumu(__VA_ARGS__)
18582
#define vaaddu_vv_u64m2_m(...) __riscv_vaaddu_vv_u64m2_tumu(__VA_ARGS__)
18583
#define vaaddu_vx_u64m2_m(...) __riscv_vaaddu_vx_u64m2_tumu(__VA_ARGS__)
18584
#define vaaddu_vv_u64m4_m(...) __riscv_vaaddu_vv_u64m4_tumu(__VA_ARGS__)
18585
#define vaaddu_vx_u64m4_m(...) __riscv_vaaddu_vx_u64m4_tumu(__VA_ARGS__)
18586
#define vaaddu_vv_u64m8_m(...) __riscv_vaaddu_vv_u64m8_tumu(__VA_ARGS__)
18587
#define vaaddu_vx_u64m8_m(...) __riscv_vaaddu_vx_u64m8_tumu(__VA_ARGS__)
18588
#define vasubu_vv_u8mf8_m(...) __riscv_vasubu_vv_u8mf8_tumu(__VA_ARGS__)
18589
#define vasubu_vx_u8mf8_m(...) __riscv_vasubu_vx_u8mf8_tumu(__VA_ARGS__)
18590
#define vasubu_vv_u8mf4_m(...) __riscv_vasubu_vv_u8mf4_tumu(__VA_ARGS__)
18591
#define vasubu_vx_u8mf4_m(...) __riscv_vasubu_vx_u8mf4_tumu(__VA_ARGS__)
18592
#define vasubu_vv_u8mf2_m(...) __riscv_vasubu_vv_u8mf2_tumu(__VA_ARGS__)
18593
#define vasubu_vx_u8mf2_m(...) __riscv_vasubu_vx_u8mf2_tumu(__VA_ARGS__)
18594
#define vasubu_vv_u8m1_m(...) __riscv_vasubu_vv_u8m1_tumu(__VA_ARGS__)
18595
#define vasubu_vx_u8m1_m(...) __riscv_vasubu_vx_u8m1_tumu(__VA_ARGS__)
18596
#define vasubu_vv_u8m2_m(...) __riscv_vasubu_vv_u8m2_tumu(__VA_ARGS__)
18597
#define vasubu_vx_u8m2_m(...) __riscv_vasubu_vx_u8m2_tumu(__VA_ARGS__)
18598
#define vasubu_vv_u8m4_m(...) __riscv_vasubu_vv_u8m4_tumu(__VA_ARGS__)
18599
#define vasubu_vx_u8m4_m(...) __riscv_vasubu_vx_u8m4_tumu(__VA_ARGS__)
18600
#define vasubu_vv_u8m8_m(...) __riscv_vasubu_vv_u8m8_tumu(__VA_ARGS__)
18601
#define vasubu_vx_u8m8_m(...) __riscv_vasubu_vx_u8m8_tumu(__VA_ARGS__)
18602
#define vasubu_vv_u16mf4_m(...) __riscv_vasubu_vv_u16mf4_tumu(__VA_ARGS__)
18603
#define vasubu_vx_u16mf4_m(...) __riscv_vasubu_vx_u16mf4_tumu(__VA_ARGS__)
18604
#define vasubu_vv_u16mf2_m(...) __riscv_vasubu_vv_u16mf2_tumu(__VA_ARGS__)
18605
#define vasubu_vx_u16mf2_m(...) __riscv_vasubu_vx_u16mf2_tumu(__VA_ARGS__)
18606
#define vasubu_vv_u16m1_m(...) __riscv_vasubu_vv_u16m1_tumu(__VA_ARGS__)
18607
#define vasubu_vx_u16m1_m(...) __riscv_vasubu_vx_u16m1_tumu(__VA_ARGS__)
18608
#define vasubu_vv_u16m2_m(...) __riscv_vasubu_vv_u16m2_tumu(__VA_ARGS__)
18609
#define vasubu_vx_u16m2_m(...) __riscv_vasubu_vx_u16m2_tumu(__VA_ARGS__)
18610
#define vasubu_vv_u16m4_m(...) __riscv_vasubu_vv_u16m4_tumu(__VA_ARGS__)
18611
#define vasubu_vx_u16m4_m(...) __riscv_vasubu_vx_u16m4_tumu(__VA_ARGS__)
18612
#define vasubu_vv_u16m8_m(...) __riscv_vasubu_vv_u16m8_tumu(__VA_ARGS__)
18613
#define vasubu_vx_u16m8_m(...) __riscv_vasubu_vx_u16m8_tumu(__VA_ARGS__)
18614
#define vasubu_vv_u32mf2_m(...) __riscv_vasubu_vv_u32mf2_tumu(__VA_ARGS__)
18615
#define vasubu_vx_u32mf2_m(...) __riscv_vasubu_vx_u32mf2_tumu(__VA_ARGS__)
18616
#define vasubu_vv_u32m1_m(...) __riscv_vasubu_vv_u32m1_tumu(__VA_ARGS__)
18617
#define vasubu_vx_u32m1_m(...) __riscv_vasubu_vx_u32m1_tumu(__VA_ARGS__)
18618
#define vasubu_vv_u32m2_m(...) __riscv_vasubu_vv_u32m2_tumu(__VA_ARGS__)
18619
#define vasubu_vx_u32m2_m(...) __riscv_vasubu_vx_u32m2_tumu(__VA_ARGS__)
18620
#define vasubu_vv_u32m4_m(...) __riscv_vasubu_vv_u32m4_tumu(__VA_ARGS__)
18621
#define vasubu_vx_u32m4_m(...) __riscv_vasubu_vx_u32m4_tumu(__VA_ARGS__)
18622
#define vasubu_vv_u32m8_m(...) __riscv_vasubu_vv_u32m8_tumu(__VA_ARGS__)
18623
#define vasubu_vx_u32m8_m(...) __riscv_vasubu_vx_u32m8_tumu(__VA_ARGS__)
18624
#define vasubu_vv_u64m1_m(...) __riscv_vasubu_vv_u64m1_tumu(__VA_ARGS__)
18625
#define vasubu_vx_u64m1_m(...) __riscv_vasubu_vx_u64m1_tumu(__VA_ARGS__)
18626
#define vasubu_vv_u64m2_m(...) __riscv_vasubu_vv_u64m2_tumu(__VA_ARGS__)
18627
#define vasubu_vx_u64m2_m(...) __riscv_vasubu_vx_u64m2_tumu(__VA_ARGS__)
18628
#define vasubu_vv_u64m4_m(...) __riscv_vasubu_vv_u64m4_tumu(__VA_ARGS__)
18629
#define vasubu_vx_u64m4_m(...) __riscv_vasubu_vx_u64m4_tumu(__VA_ARGS__)
18630
#define vasubu_vv_u64m8_m(...) __riscv_vasubu_vv_u64m8_tumu(__VA_ARGS__)
18631
#define vasubu_vx_u64m8_m(...) __riscv_vasubu_vx_u64m8_tumu(__VA_ARGS__)
18632
#define vsmul_vv_i8mf8(...) __riscv_vsmul_vv_i8mf8(__VA_ARGS__)
18633
#define vsmul_vx_i8mf8(...) __riscv_vsmul_vx_i8mf8(__VA_ARGS__)
18634
#define vsmul_vv_i8mf4(...) __riscv_vsmul_vv_i8mf4(__VA_ARGS__)
18635
#define vsmul_vx_i8mf4(...) __riscv_vsmul_vx_i8mf4(__VA_ARGS__)
18636
#define vsmul_vv_i8mf2(...) __riscv_vsmul_vv_i8mf2(__VA_ARGS__)
18637
#define vsmul_vx_i8mf2(...) __riscv_vsmul_vx_i8mf2(__VA_ARGS__)
18638
#define vsmul_vv_i8m1(...) __riscv_vsmul_vv_i8m1(__VA_ARGS__)
18639
#define vsmul_vx_i8m1(...) __riscv_vsmul_vx_i8m1(__VA_ARGS__)
18640
#define vsmul_vv_i8m2(...) __riscv_vsmul_vv_i8m2(__VA_ARGS__)
18641
#define vsmul_vx_i8m2(...) __riscv_vsmul_vx_i8m2(__VA_ARGS__)
18642
#define vsmul_vv_i8m4(...) __riscv_vsmul_vv_i8m4(__VA_ARGS__)
18643
#define vsmul_vx_i8m4(...) __riscv_vsmul_vx_i8m4(__VA_ARGS__)
18644
#define vsmul_vv_i8m8(...) __riscv_vsmul_vv_i8m8(__VA_ARGS__)
18645
#define vsmul_vx_i8m8(...) __riscv_vsmul_vx_i8m8(__VA_ARGS__)
18646
#define vsmul_vv_i16mf4(...) __riscv_vsmul_vv_i16mf4(__VA_ARGS__)
18647
#define vsmul_vx_i16mf4(...) __riscv_vsmul_vx_i16mf4(__VA_ARGS__)
18648
#define vsmul_vv_i16mf2(...) __riscv_vsmul_vv_i16mf2(__VA_ARGS__)
18649
#define vsmul_vx_i16mf2(...) __riscv_vsmul_vx_i16mf2(__VA_ARGS__)
18650
#define vsmul_vv_i16m1(...) __riscv_vsmul_vv_i16m1(__VA_ARGS__)
18651
#define vsmul_vx_i16m1(...) __riscv_vsmul_vx_i16m1(__VA_ARGS__)
18652
#define vsmul_vv_i16m2(...) __riscv_vsmul_vv_i16m2(__VA_ARGS__)
18653
#define vsmul_vx_i16m2(...) __riscv_vsmul_vx_i16m2(__VA_ARGS__)
18654
#define vsmul_vv_i16m4(...) __riscv_vsmul_vv_i16m4(__VA_ARGS__)
18655
#define vsmul_vx_i16m4(...) __riscv_vsmul_vx_i16m4(__VA_ARGS__)
18656
#define vsmul_vv_i16m8(...) __riscv_vsmul_vv_i16m8(__VA_ARGS__)
18657
#define vsmul_vx_i16m8(...) __riscv_vsmul_vx_i16m8(__VA_ARGS__)
18658
#define vsmul_vv_i32mf2(...) __riscv_vsmul_vv_i32mf2(__VA_ARGS__)
18659
#define vsmul_vx_i32mf2(...) __riscv_vsmul_vx_i32mf2(__VA_ARGS__)
18660
#define vsmul_vv_i32m1(...) __riscv_vsmul_vv_i32m1(__VA_ARGS__)
18661
#define vsmul_vx_i32m1(...) __riscv_vsmul_vx_i32m1(__VA_ARGS__)
18662
#define vsmul_vv_i32m2(...) __riscv_vsmul_vv_i32m2(__VA_ARGS__)
18663
#define vsmul_vx_i32m2(...) __riscv_vsmul_vx_i32m2(__VA_ARGS__)
18664
#define vsmul_vv_i32m4(...) __riscv_vsmul_vv_i32m4(__VA_ARGS__)
18665
#define vsmul_vx_i32m4(...) __riscv_vsmul_vx_i32m4(__VA_ARGS__)
18666
#define vsmul_vv_i32m8(...) __riscv_vsmul_vv_i32m8(__VA_ARGS__)
18667
#define vsmul_vx_i32m8(...) __riscv_vsmul_vx_i32m8(__VA_ARGS__)
18668
#define vsmul_vv_i64m1(...) __riscv_vsmul_vv_i64m1(__VA_ARGS__)
18669
#define vsmul_vx_i64m1(...) __riscv_vsmul_vx_i64m1(__VA_ARGS__)
18670
#define vsmul_vv_i64m2(...) __riscv_vsmul_vv_i64m2(__VA_ARGS__)
18671
#define vsmul_vx_i64m2(...) __riscv_vsmul_vx_i64m2(__VA_ARGS__)
18672
#define vsmul_vv_i64m4(...) __riscv_vsmul_vv_i64m4(__VA_ARGS__)
18673
#define vsmul_vx_i64m4(...) __riscv_vsmul_vx_i64m4(__VA_ARGS__)
18674
#define vsmul_vv_i64m8(...) __riscv_vsmul_vv_i64m8(__VA_ARGS__)
18675
#define vsmul_vx_i64m8(...) __riscv_vsmul_vx_i64m8(__VA_ARGS__)
18676
// masked functions
18677
#define vsmul_vv_i8mf8_m(...) __riscv_vsmul_vv_i8mf8_mu(__VA_ARGS__)
18678
#define vsmul_vx_i8mf8_m(...) __riscv_vsmul_vx_i8mf8_mu(__VA_ARGS__)
18679
#define vsmul_vv_i8mf4_m(...) __riscv_vsmul_vv_i8mf4_mu(__VA_ARGS__)
18680
#define vsmul_vx_i8mf4_m(...) __riscv_vsmul_vx_i8mf4_mu(__VA_ARGS__)
18681
#define vsmul_vv_i8mf2_m(...) __riscv_vsmul_vv_i8mf2_mu(__VA_ARGS__)
18682
#define vsmul_vx_i8mf2_m(...) __riscv_vsmul_vx_i8mf2_mu(__VA_ARGS__)
18683
#define vsmul_vv_i8m1_m(...) __riscv_vsmul_vv_i8m1_mu(__VA_ARGS__)
18684
#define vsmul_vx_i8m1_m(...) __riscv_vsmul_vx_i8m1_mu(__VA_ARGS__)
18685
#define vsmul_vv_i8m2_m(...) __riscv_vsmul_vv_i8m2_mu(__VA_ARGS__)
18686
#define vsmul_vx_i8m2_m(...) __riscv_vsmul_vx_i8m2_mu(__VA_ARGS__)
18687
#define vsmul_vv_i8m4_m(...) __riscv_vsmul_vv_i8m4_mu(__VA_ARGS__)
18688
#define vsmul_vx_i8m4_m(...) __riscv_vsmul_vx_i8m4_mu(__VA_ARGS__)
18689
#define vsmul_vv_i8m8_m(...) __riscv_vsmul_vv_i8m8_mu(__VA_ARGS__)
18690
#define vsmul_vx_i8m8_m(...) __riscv_vsmul_vx_i8m8_mu(__VA_ARGS__)
18691
#define vsmul_vv_i16mf4_m(...) __riscv_vsmul_vv_i16mf4_mu(__VA_ARGS__)
18692
#define vsmul_vx_i16mf4_m(...) __riscv_vsmul_vx_i16mf4_mu(__VA_ARGS__)
18693
#define vsmul_vv_i16mf2_m(...) __riscv_vsmul_vv_i16mf2_mu(__VA_ARGS__)
18694
#define vsmul_vx_i16mf2_m(...) __riscv_vsmul_vx_i16mf2_mu(__VA_ARGS__)
18695
#define vsmul_vv_i16m1_m(...) __riscv_vsmul_vv_i16m1_mu(__VA_ARGS__)
18696
#define vsmul_vx_i16m1_m(...) __riscv_vsmul_vx_i16m1_mu(__VA_ARGS__)
18697
#define vsmul_vv_i16m2_m(...) __riscv_vsmul_vv_i16m2_mu(__VA_ARGS__)
18698
#define vsmul_vx_i16m2_m(...) __riscv_vsmul_vx_i16m2_mu(__VA_ARGS__)
18699
#define vsmul_vv_i16m4_m(...) __riscv_vsmul_vv_i16m4_mu(__VA_ARGS__)
18700
#define vsmul_vx_i16m4_m(...) __riscv_vsmul_vx_i16m4_mu(__VA_ARGS__)
18701
#define vsmul_vv_i16m8_m(...) __riscv_vsmul_vv_i16m8_mu(__VA_ARGS__)
18702
#define vsmul_vx_i16m8_m(...) __riscv_vsmul_vx_i16m8_mu(__VA_ARGS__)
18703
#define vsmul_vv_i32mf2_m(...) __riscv_vsmul_vv_i32mf2_mu(__VA_ARGS__)
18704
#define vsmul_vx_i32mf2_m(...) __riscv_vsmul_vx_i32mf2_mu(__VA_ARGS__)
18705
#define vsmul_vv_i32m1_m(...) __riscv_vsmul_vv_i32m1_mu(__VA_ARGS__)
18706
#define vsmul_vx_i32m1_m(...) __riscv_vsmul_vx_i32m1_mu(__VA_ARGS__)
18707
#define vsmul_vv_i32m2_m(...) __riscv_vsmul_vv_i32m2_mu(__VA_ARGS__)
18708
#define vsmul_vx_i32m2_m(...) __riscv_vsmul_vx_i32m2_mu(__VA_ARGS__)
18709
#define vsmul_vv_i32m4_m(...) __riscv_vsmul_vv_i32m4_mu(__VA_ARGS__)
18710
#define vsmul_vx_i32m4_m(...) __riscv_vsmul_vx_i32m4_mu(__VA_ARGS__)
18711
#define vsmul_vv_i32m8_m(...) __riscv_vsmul_vv_i32m8_mu(__VA_ARGS__)
18712
#define vsmul_vx_i32m8_m(...) __riscv_vsmul_vx_i32m8_mu(__VA_ARGS__)
18713
#define vsmul_vv_i64m1_m(...) __riscv_vsmul_vv_i64m1_mu(__VA_ARGS__)
18714
#define vsmul_vx_i64m1_m(...) __riscv_vsmul_vx_i64m1_mu(__VA_ARGS__)
18715
#define vsmul_vv_i64m2_m(...) __riscv_vsmul_vv_i64m2_mu(__VA_ARGS__)
18716
#define vsmul_vx_i64m2_m(...) __riscv_vsmul_vx_i64m2_mu(__VA_ARGS__)
18717
#define vsmul_vv_i64m4_m(...) __riscv_vsmul_vv_i64m4_mu(__VA_ARGS__)
18718
#define vsmul_vx_i64m4_m(...) __riscv_vsmul_vx_i64m4_mu(__VA_ARGS__)
18719
#define vsmul_vv_i64m8_m(...) __riscv_vsmul_vv_i64m8_mu(__VA_ARGS__)
18720
#define vsmul_vx_i64m8_m(...) __riscv_vsmul_vx_i64m8_mu(__VA_ARGS__)
18721
#define vssra_vv_i8mf8(...) __riscv_vssra_vv_i8mf8(__VA_ARGS__)
18722
#define vssra_vx_i8mf8(...) __riscv_vssra_vx_i8mf8(__VA_ARGS__)
18723
#define vssra_vv_i8mf4(...) __riscv_vssra_vv_i8mf4(__VA_ARGS__)
18724
#define vssra_vx_i8mf4(...) __riscv_vssra_vx_i8mf4(__VA_ARGS__)
18725
#define vssra_vv_i8mf2(...) __riscv_vssra_vv_i8mf2(__VA_ARGS__)
18726
#define vssra_vx_i8mf2(...) __riscv_vssra_vx_i8mf2(__VA_ARGS__)
18727
#define vssra_vv_i8m1(...) __riscv_vssra_vv_i8m1(__VA_ARGS__)
18728
#define vssra_vx_i8m1(...) __riscv_vssra_vx_i8m1(__VA_ARGS__)
18729
#define vssra_vv_i8m2(...) __riscv_vssra_vv_i8m2(__VA_ARGS__)
18730
#define vssra_vx_i8m2(...) __riscv_vssra_vx_i8m2(__VA_ARGS__)
18731
#define vssra_vv_i8m4(...) __riscv_vssra_vv_i8m4(__VA_ARGS__)
18732
#define vssra_vx_i8m4(...) __riscv_vssra_vx_i8m4(__VA_ARGS__)
18733
#define vssra_vv_i8m8(...) __riscv_vssra_vv_i8m8(__VA_ARGS__)
18734
#define vssra_vx_i8m8(...) __riscv_vssra_vx_i8m8(__VA_ARGS__)
18735
#define vssra_vv_i16mf4(...) __riscv_vssra_vv_i16mf4(__VA_ARGS__)
18736
#define vssra_vx_i16mf4(...) __riscv_vssra_vx_i16mf4(__VA_ARGS__)
18737
#define vssra_vv_i16mf2(...) __riscv_vssra_vv_i16mf2(__VA_ARGS__)
18738
#define vssra_vx_i16mf2(...) __riscv_vssra_vx_i16mf2(__VA_ARGS__)
18739
#define vssra_vv_i16m1(...) __riscv_vssra_vv_i16m1(__VA_ARGS__)
18740
#define vssra_vx_i16m1(...) __riscv_vssra_vx_i16m1(__VA_ARGS__)
18741
#define vssra_vv_i16m2(...) __riscv_vssra_vv_i16m2(__VA_ARGS__)
18742
#define vssra_vx_i16m2(...) __riscv_vssra_vx_i16m2(__VA_ARGS__)
18743
#define vssra_vv_i16m4(...) __riscv_vssra_vv_i16m4(__VA_ARGS__)
18744
#define vssra_vx_i16m4(...) __riscv_vssra_vx_i16m4(__VA_ARGS__)
18745
#define vssra_vv_i16m8(...) __riscv_vssra_vv_i16m8(__VA_ARGS__)
18746
#define vssra_vx_i16m8(...) __riscv_vssra_vx_i16m8(__VA_ARGS__)
18747
#define vssra_vv_i32mf2(...) __riscv_vssra_vv_i32mf2(__VA_ARGS__)
18748
#define vssra_vx_i32mf2(...) __riscv_vssra_vx_i32mf2(__VA_ARGS__)
18749
#define vssra_vv_i32m1(...) __riscv_vssra_vv_i32m1(__VA_ARGS__)
18750
#define vssra_vx_i32m1(...) __riscv_vssra_vx_i32m1(__VA_ARGS__)
18751
#define vssra_vv_i32m2(...) __riscv_vssra_vv_i32m2(__VA_ARGS__)
18752
#define vssra_vx_i32m2(...) __riscv_vssra_vx_i32m2(__VA_ARGS__)
18753
#define vssra_vv_i32m4(...) __riscv_vssra_vv_i32m4(__VA_ARGS__)
18754
#define vssra_vx_i32m4(...) __riscv_vssra_vx_i32m4(__VA_ARGS__)
18755
#define vssra_vv_i32m8(...) __riscv_vssra_vv_i32m8(__VA_ARGS__)
18756
#define vssra_vx_i32m8(...) __riscv_vssra_vx_i32m8(__VA_ARGS__)
18757
#define vssra_vv_i64m1(...) __riscv_vssra_vv_i64m1(__VA_ARGS__)
18758
#define vssra_vx_i64m1(...) __riscv_vssra_vx_i64m1(__VA_ARGS__)
18759
#define vssra_vv_i64m2(...) __riscv_vssra_vv_i64m2(__VA_ARGS__)
18760
#define vssra_vx_i64m2(...) __riscv_vssra_vx_i64m2(__VA_ARGS__)
18761
#define vssra_vv_i64m4(...) __riscv_vssra_vv_i64m4(__VA_ARGS__)
18762
#define vssra_vx_i64m4(...) __riscv_vssra_vx_i64m4(__VA_ARGS__)
18763
#define vssra_vv_i64m8(...) __riscv_vssra_vv_i64m8(__VA_ARGS__)
18764
#define vssra_vx_i64m8(...) __riscv_vssra_vx_i64m8(__VA_ARGS__)
18765
#define vssrl_vv_u8mf8(...) __riscv_vssrl_vv_u8mf8(__VA_ARGS__)
18766
#define vssrl_vx_u8mf8(...) __riscv_vssrl_vx_u8mf8(__VA_ARGS__)
18767
#define vssrl_vv_u8mf4(...) __riscv_vssrl_vv_u8mf4(__VA_ARGS__)
18768
#define vssrl_vx_u8mf4(...) __riscv_vssrl_vx_u8mf4(__VA_ARGS__)
18769
#define vssrl_vv_u8mf2(...) __riscv_vssrl_vv_u8mf2(__VA_ARGS__)
18770
#define vssrl_vx_u8mf2(...) __riscv_vssrl_vx_u8mf2(__VA_ARGS__)
18771
#define vssrl_vv_u8m1(...) __riscv_vssrl_vv_u8m1(__VA_ARGS__)
18772
#define vssrl_vx_u8m1(...) __riscv_vssrl_vx_u8m1(__VA_ARGS__)
18773
#define vssrl_vv_u8m2(...) __riscv_vssrl_vv_u8m2(__VA_ARGS__)
18774
#define vssrl_vx_u8m2(...) __riscv_vssrl_vx_u8m2(__VA_ARGS__)
18775
#define vssrl_vv_u8m4(...) __riscv_vssrl_vv_u8m4(__VA_ARGS__)
18776
#define vssrl_vx_u8m4(...) __riscv_vssrl_vx_u8m4(__VA_ARGS__)
18777
#define vssrl_vv_u8m8(...) __riscv_vssrl_vv_u8m8(__VA_ARGS__)
18778
#define vssrl_vx_u8m8(...) __riscv_vssrl_vx_u8m8(__VA_ARGS__)
18779
#define vssrl_vv_u16mf4(...) __riscv_vssrl_vv_u16mf4(__VA_ARGS__)
18780
#define vssrl_vx_u16mf4(...) __riscv_vssrl_vx_u16mf4(__VA_ARGS__)
18781
#define vssrl_vv_u16mf2(...) __riscv_vssrl_vv_u16mf2(__VA_ARGS__)
18782
#define vssrl_vx_u16mf2(...) __riscv_vssrl_vx_u16mf2(__VA_ARGS__)
18783
#define vssrl_vv_u16m1(...) __riscv_vssrl_vv_u16m1(__VA_ARGS__)
18784
#define vssrl_vx_u16m1(...) __riscv_vssrl_vx_u16m1(__VA_ARGS__)
18785
#define vssrl_vv_u16m2(...) __riscv_vssrl_vv_u16m2(__VA_ARGS__)
18786
#define vssrl_vx_u16m2(...) __riscv_vssrl_vx_u16m2(__VA_ARGS__)
18787
#define vssrl_vv_u16m4(...) __riscv_vssrl_vv_u16m4(__VA_ARGS__)
18788
#define vssrl_vx_u16m4(...) __riscv_vssrl_vx_u16m4(__VA_ARGS__)
18789
#define vssrl_vv_u16m8(...) __riscv_vssrl_vv_u16m8(__VA_ARGS__)
18790
#define vssrl_vx_u16m8(...) __riscv_vssrl_vx_u16m8(__VA_ARGS__)
18791
#define vssrl_vv_u32mf2(...) __riscv_vssrl_vv_u32mf2(__VA_ARGS__)
18792
#define vssrl_vx_u32mf2(...) __riscv_vssrl_vx_u32mf2(__VA_ARGS__)
18793
#define vssrl_vv_u32m1(...) __riscv_vssrl_vv_u32m1(__VA_ARGS__)
18794
#define vssrl_vx_u32m1(...) __riscv_vssrl_vx_u32m1(__VA_ARGS__)
18795
#define vssrl_vv_u32m2(...) __riscv_vssrl_vv_u32m2(__VA_ARGS__)
18796
#define vssrl_vx_u32m2(...) __riscv_vssrl_vx_u32m2(__VA_ARGS__)
18797
#define vssrl_vv_u32m4(...) __riscv_vssrl_vv_u32m4(__VA_ARGS__)
18798
#define vssrl_vx_u32m4(...) __riscv_vssrl_vx_u32m4(__VA_ARGS__)
18799
#define vssrl_vv_u32m8(...) __riscv_vssrl_vv_u32m8(__VA_ARGS__)
18800
#define vssrl_vx_u32m8(...) __riscv_vssrl_vx_u32m8(__VA_ARGS__)
18801
#define vssrl_vv_u64m1(...) __riscv_vssrl_vv_u64m1(__VA_ARGS__)
18802
#define vssrl_vx_u64m1(...) __riscv_vssrl_vx_u64m1(__VA_ARGS__)
18803
#define vssrl_vv_u64m2(...) __riscv_vssrl_vv_u64m2(__VA_ARGS__)
18804
#define vssrl_vx_u64m2(...) __riscv_vssrl_vx_u64m2(__VA_ARGS__)
18805
#define vssrl_vv_u64m4(...) __riscv_vssrl_vv_u64m4(__VA_ARGS__)
18806
#define vssrl_vx_u64m4(...) __riscv_vssrl_vx_u64m4(__VA_ARGS__)
18807
#define vssrl_vv_u64m8(...) __riscv_vssrl_vv_u64m8(__VA_ARGS__)
18808
#define vssrl_vx_u64m8(...) __riscv_vssrl_vx_u64m8(__VA_ARGS__)
18809
// masked functions
18810
#define vssra_vv_i8mf8_m(...) __riscv_vssra_vv_i8mf8_tumu(__VA_ARGS__)
18811
#define vssra_vx_i8mf8_m(...) __riscv_vssra_vx_i8mf8_tumu(__VA_ARGS__)
18812
#define vssra_vv_i8mf4_m(...) __riscv_vssra_vv_i8mf4_tumu(__VA_ARGS__)
18813
#define vssra_vx_i8mf4_m(...) __riscv_vssra_vx_i8mf4_tumu(__VA_ARGS__)
18814
#define vssra_vv_i8mf2_m(...) __riscv_vssra_vv_i8mf2_tumu(__VA_ARGS__)
18815
#define vssra_vx_i8mf2_m(...) __riscv_vssra_vx_i8mf2_tumu(__VA_ARGS__)
18816
#define vssra_vv_i8m1_m(...) __riscv_vssra_vv_i8m1_tumu(__VA_ARGS__)
18817
#define vssra_vx_i8m1_m(...) __riscv_vssra_vx_i8m1_tumu(__VA_ARGS__)
18818
#define vssra_vv_i8m2_m(...) __riscv_vssra_vv_i8m2_tumu(__VA_ARGS__)
18819
#define vssra_vx_i8m2_m(...) __riscv_vssra_vx_i8m2_tumu(__VA_ARGS__)
18820
#define vssra_vv_i8m4_m(...) __riscv_vssra_vv_i8m4_tumu(__VA_ARGS__)
18821
#define vssra_vx_i8m4_m(...) __riscv_vssra_vx_i8m4_tumu(__VA_ARGS__)
18822
#define vssra_vv_i8m8_m(...) __riscv_vssra_vv_i8m8_tumu(__VA_ARGS__)
18823
#define vssra_vx_i8m8_m(...) __riscv_vssra_vx_i8m8_tumu(__VA_ARGS__)
18824
#define vssra_vv_i16mf4_m(...) __riscv_vssra_vv_i16mf4_tumu(__VA_ARGS__)
18825
#define vssra_vx_i16mf4_m(...) __riscv_vssra_vx_i16mf4_tumu(__VA_ARGS__)
18826
#define vssra_vv_i16mf2_m(...) __riscv_vssra_vv_i16mf2_tumu(__VA_ARGS__)
18827
#define vssra_vx_i16mf2_m(...) __riscv_vssra_vx_i16mf2_tumu(__VA_ARGS__)
18828
#define vssra_vv_i16m1_m(...) __riscv_vssra_vv_i16m1_tumu(__VA_ARGS__)
18829
#define vssra_vx_i16m1_m(...) __riscv_vssra_vx_i16m1_tumu(__VA_ARGS__)
18830
#define vssra_vv_i16m2_m(...) __riscv_vssra_vv_i16m2_tumu(__VA_ARGS__)
18831
#define vssra_vx_i16m2_m(...) __riscv_vssra_vx_i16m2_tumu(__VA_ARGS__)
18832
#define vssra_vv_i16m4_m(...) __riscv_vssra_vv_i16m4_tumu(__VA_ARGS__)
18833
#define vssra_vx_i16m4_m(...) __riscv_vssra_vx_i16m4_tumu(__VA_ARGS__)
18834
#define vssra_vv_i16m8_m(...) __riscv_vssra_vv_i16m8_tumu(__VA_ARGS__)
18835
#define vssra_vx_i16m8_m(...) __riscv_vssra_vx_i16m8_tumu(__VA_ARGS__)
18836
#define vssra_vv_i32mf2_m(...) __riscv_vssra_vv_i32mf2_tumu(__VA_ARGS__)
18837
#define vssra_vx_i32mf2_m(...) __riscv_vssra_vx_i32mf2_tumu(__VA_ARGS__)
18838
#define vssra_vv_i32m1_m(...) __riscv_vssra_vv_i32m1_tumu(__VA_ARGS__)
18839
#define vssra_vx_i32m1_m(...) __riscv_vssra_vx_i32m1_tumu(__VA_ARGS__)
18840
#define vssra_vv_i32m2_m(...) __riscv_vssra_vv_i32m2_tumu(__VA_ARGS__)
18841
#define vssra_vx_i32m2_m(...) __riscv_vssra_vx_i32m2_tumu(__VA_ARGS__)
18842
#define vssra_vv_i32m4_m(...) __riscv_vssra_vv_i32m4_tumu(__VA_ARGS__)
18843
#define vssra_vx_i32m4_m(...) __riscv_vssra_vx_i32m4_tumu(__VA_ARGS__)
18844
#define vssra_vv_i32m8_m(...) __riscv_vssra_vv_i32m8_tumu(__VA_ARGS__)
18845
#define vssra_vx_i32m8_m(...) __riscv_vssra_vx_i32m8_tumu(__VA_ARGS__)
18846
#define vssra_vv_i64m1_m(...) __riscv_vssra_vv_i64m1_tumu(__VA_ARGS__)
18847
#define vssra_vx_i64m1_m(...) __riscv_vssra_vx_i64m1_tumu(__VA_ARGS__)
18848
#define vssra_vv_i64m2_m(...) __riscv_vssra_vv_i64m2_tumu(__VA_ARGS__)
18849
#define vssra_vx_i64m2_m(...) __riscv_vssra_vx_i64m2_tumu(__VA_ARGS__)
18850
#define vssra_vv_i64m4_m(...) __riscv_vssra_vv_i64m4_tumu(__VA_ARGS__)
18851
#define vssra_vx_i64m4_m(...) __riscv_vssra_vx_i64m4_tumu(__VA_ARGS__)
18852
#define vssra_vv_i64m8_m(...) __riscv_vssra_vv_i64m8_tumu(__VA_ARGS__)
18853
#define vssra_vx_i64m8_m(...) __riscv_vssra_vx_i64m8_tumu(__VA_ARGS__)
18854
#define vssrl_vv_u8mf8_m(...) __riscv_vssrl_vv_u8mf8_tumu(__VA_ARGS__)
18855
#define vssrl_vx_u8mf8_m(...) __riscv_vssrl_vx_u8mf8_tumu(__VA_ARGS__)
18856
#define vssrl_vv_u8mf4_m(...) __riscv_vssrl_vv_u8mf4_tumu(__VA_ARGS__)
18857
#define vssrl_vx_u8mf4_m(...) __riscv_vssrl_vx_u8mf4_tumu(__VA_ARGS__)
18858
#define vssrl_vv_u8mf2_m(...) __riscv_vssrl_vv_u8mf2_tumu(__VA_ARGS__)
18859
#define vssrl_vx_u8mf2_m(...) __riscv_vssrl_vx_u8mf2_tumu(__VA_ARGS__)
18860
#define vssrl_vv_u8m1_m(...) __riscv_vssrl_vv_u8m1_tumu(__VA_ARGS__)
18861
#define vssrl_vx_u8m1_m(...) __riscv_vssrl_vx_u8m1_tumu(__VA_ARGS__)
18862
#define vssrl_vv_u8m2_m(...) __riscv_vssrl_vv_u8m2_tumu(__VA_ARGS__)
18863
#define vssrl_vx_u8m2_m(...) __riscv_vssrl_vx_u8m2_tumu(__VA_ARGS__)
18864
#define vssrl_vv_u8m4_m(...) __riscv_vssrl_vv_u8m4_tumu(__VA_ARGS__)
18865
#define vssrl_vx_u8m4_m(...) __riscv_vssrl_vx_u8m4_tumu(__VA_ARGS__)
18866
#define vssrl_vv_u8m8_m(...) __riscv_vssrl_vv_u8m8_tumu(__VA_ARGS__)
18867
#define vssrl_vx_u8m8_m(...) __riscv_vssrl_vx_u8m8_tumu(__VA_ARGS__)
18868
#define vssrl_vv_u16mf4_m(...) __riscv_vssrl_vv_u16mf4_tumu(__VA_ARGS__)
18869
#define vssrl_vx_u16mf4_m(...) __riscv_vssrl_vx_u16mf4_tumu(__VA_ARGS__)
18870
#define vssrl_vv_u16mf2_m(...) __riscv_vssrl_vv_u16mf2_tumu(__VA_ARGS__)
18871
#define vssrl_vx_u16mf2_m(...) __riscv_vssrl_vx_u16mf2_tumu(__VA_ARGS__)
18872
#define vssrl_vv_u16m1_m(...) __riscv_vssrl_vv_u16m1_tumu(__VA_ARGS__)
18873
#define vssrl_vx_u16m1_m(...) __riscv_vssrl_vx_u16m1_tumu(__VA_ARGS__)
18874
#define vssrl_vv_u16m2_m(...) __riscv_vssrl_vv_u16m2_tumu(__VA_ARGS__)
18875
#define vssrl_vx_u16m2_m(...) __riscv_vssrl_vx_u16m2_tumu(__VA_ARGS__)
18876
#define vssrl_vv_u16m4_m(...) __riscv_vssrl_vv_u16m4_tumu(__VA_ARGS__)
18877
#define vssrl_vx_u16m4_m(...) __riscv_vssrl_vx_u16m4_tumu(__VA_ARGS__)
18878
#define vssrl_vv_u16m8_m(...) __riscv_vssrl_vv_u16m8_tumu(__VA_ARGS__)
18879
#define vssrl_vx_u16m8_m(...) __riscv_vssrl_vx_u16m8_tumu(__VA_ARGS__)
18880
#define vssrl_vv_u32mf2_m(...) __riscv_vssrl_vv_u32mf2_tumu(__VA_ARGS__)
18881
#define vssrl_vx_u32mf2_m(...) __riscv_vssrl_vx_u32mf2_tumu(__VA_ARGS__)
18882
#define vssrl_vv_u32m1_m(...) __riscv_vssrl_vv_u32m1_tumu(__VA_ARGS__)
18883
#define vssrl_vx_u32m1_m(...) __riscv_vssrl_vx_u32m1_tumu(__VA_ARGS__)
18884
#define vssrl_vv_u32m2_m(...) __riscv_vssrl_vv_u32m2_tumu(__VA_ARGS__)
18885
#define vssrl_vx_u32m2_m(...) __riscv_vssrl_vx_u32m2_tumu(__VA_ARGS__)
18886
#define vssrl_vv_u32m4_m(...) __riscv_vssrl_vv_u32m4_tumu(__VA_ARGS__)
18887
#define vssrl_vx_u32m4_m(...) __riscv_vssrl_vx_u32m4_tumu(__VA_ARGS__)
18888
#define vssrl_vv_u32m8_m(...) __riscv_vssrl_vv_u32m8_tumu(__VA_ARGS__)
18889
#define vssrl_vx_u32m8_m(...) __riscv_vssrl_vx_u32m8_tumu(__VA_ARGS__)
18890
#define vssrl_vv_u64m1_m(...) __riscv_vssrl_vv_u64m1_tumu(__VA_ARGS__)
18891
#define vssrl_vx_u64m1_m(...) __riscv_vssrl_vx_u64m1_tumu(__VA_ARGS__)
18892
#define vssrl_vv_u64m2_m(...) __riscv_vssrl_vv_u64m2_tumu(__VA_ARGS__)
18893
#define vssrl_vx_u64m2_m(...) __riscv_vssrl_vx_u64m2_tumu(__VA_ARGS__)
18894
#define vssrl_vv_u64m4_m(...) __riscv_vssrl_vv_u64m4_tumu(__VA_ARGS__)
18895
#define vssrl_vx_u64m4_m(...) __riscv_vssrl_vx_u64m4_tumu(__VA_ARGS__)
18896
#define vssrl_vv_u64m8_m(...) __riscv_vssrl_vv_u64m8_tumu(__VA_ARGS__)
18897
#define vssrl_vx_u64m8_m(...) __riscv_vssrl_vx_u64m8_tumu(__VA_ARGS__)
18898
#define vnclip_wv_i8mf8(...) __riscv_vnclip_wv_i8mf8(__VA_ARGS__)
18899
#define vnclip_wx_i8mf8(...) __riscv_vnclip_wx_i8mf8(__VA_ARGS__)
18900
#define vnclip_wv_i8mf4(...) __riscv_vnclip_wv_i8mf4(__VA_ARGS__)
18901
#define vnclip_wx_i8mf4(...) __riscv_vnclip_wx_i8mf4(__VA_ARGS__)
18902
#define vnclip_wv_i8mf2(...) __riscv_vnclip_wv_i8mf2(__VA_ARGS__)
18903
#define vnclip_wx_i8mf2(...) __riscv_vnclip_wx_i8mf2(__VA_ARGS__)
18904
#define vnclip_wv_i8m1(...) __riscv_vnclip_wv_i8m1(__VA_ARGS__)
18905
#define vnclip_wx_i8m1(...) __riscv_vnclip_wx_i8m1(__VA_ARGS__)
18906
#define vnclip_wv_i8m2(...) __riscv_vnclip_wv_i8m2(__VA_ARGS__)
18907
#define vnclip_wx_i8m2(...) __riscv_vnclip_wx_i8m2(__VA_ARGS__)
18908
#define vnclip_wv_i8m4(...) __riscv_vnclip_wv_i8m4(__VA_ARGS__)
18909
#define vnclip_wx_i8m4(...) __riscv_vnclip_wx_i8m4(__VA_ARGS__)
18910
#define vnclip_wv_i16mf4(...) __riscv_vnclip_wv_i16mf4(__VA_ARGS__)
18911
#define vnclip_wx_i16mf4(...) __riscv_vnclip_wx_i16mf4(__VA_ARGS__)
18912
#define vnclip_wv_i16mf2(...) __riscv_vnclip_wv_i16mf2(__VA_ARGS__)
18913
#define vnclip_wx_i16mf2(...) __riscv_vnclip_wx_i16mf2(__VA_ARGS__)
18914
#define vnclip_wv_i16m1(...) __riscv_vnclip_wv_i16m1(__VA_ARGS__)
18915
#define vnclip_wx_i16m1(...) __riscv_vnclip_wx_i16m1(__VA_ARGS__)
18916
#define vnclip_wv_i16m2(...) __riscv_vnclip_wv_i16m2(__VA_ARGS__)
18917
#define vnclip_wx_i16m2(...) __riscv_vnclip_wx_i16m2(__VA_ARGS__)
18918
#define vnclip_wv_i16m4(...) __riscv_vnclip_wv_i16m4(__VA_ARGS__)
18919
#define vnclip_wx_i16m4(...) __riscv_vnclip_wx_i16m4(__VA_ARGS__)
18920
#define vnclip_wv_i32mf2(...) __riscv_vnclip_wv_i32mf2(__VA_ARGS__)
18921
#define vnclip_wx_i32mf2(...) __riscv_vnclip_wx_i32mf2(__VA_ARGS__)
18922
#define vnclip_wv_i32m1(...) __riscv_vnclip_wv_i32m1(__VA_ARGS__)
18923
#define vnclip_wx_i32m1(...) __riscv_vnclip_wx_i32m1(__VA_ARGS__)
18924
#define vnclip_wv_i32m2(...) __riscv_vnclip_wv_i32m2(__VA_ARGS__)
18925
#define vnclip_wx_i32m2(...) __riscv_vnclip_wx_i32m2(__VA_ARGS__)
18926
#define vnclip_wv_i32m4(...) __riscv_vnclip_wv_i32m4(__VA_ARGS__)
18927
#define vnclip_wx_i32m4(...) __riscv_vnclip_wx_i32m4(__VA_ARGS__)
18928
#define vnclipu_wv_u8mf8(...) __riscv_vnclipu_wv_u8mf8(__VA_ARGS__)
18929
#define vnclipu_wx_u8mf8(...) __riscv_vnclipu_wx_u8mf8(__VA_ARGS__)
18930
#define vnclipu_wv_u8mf4(...) __riscv_vnclipu_wv_u8mf4(__VA_ARGS__)
18931
#define vnclipu_wx_u8mf4(...) __riscv_vnclipu_wx_u8mf4(__VA_ARGS__)
18932
#define vnclipu_wv_u8mf2(...) __riscv_vnclipu_wv_u8mf2(__VA_ARGS__)
18933
#define vnclipu_wx_u8mf2(...) __riscv_vnclipu_wx_u8mf2(__VA_ARGS__)
18934
#define vnclipu_wv_u8m1(...) __riscv_vnclipu_wv_u8m1(__VA_ARGS__)
18935
#define vnclipu_wx_u8m1(...) __riscv_vnclipu_wx_u8m1(__VA_ARGS__)
18936
#define vnclipu_wv_u8m2(...) __riscv_vnclipu_wv_u8m2(__VA_ARGS__)
18937
#define vnclipu_wx_u8m2(...) __riscv_vnclipu_wx_u8m2(__VA_ARGS__)
18938
#define vnclipu_wv_u8m4(...) __riscv_vnclipu_wv_u8m4(__VA_ARGS__)
18939
#define vnclipu_wx_u8m4(...) __riscv_vnclipu_wx_u8m4(__VA_ARGS__)
18940
#define vnclipu_wv_u16mf4(...) __riscv_vnclipu_wv_u16mf4(__VA_ARGS__)
18941
#define vnclipu_wx_u16mf4(...) __riscv_vnclipu_wx_u16mf4(__VA_ARGS__)
18942
#define vnclipu_wv_u16mf2(...) __riscv_vnclipu_wv_u16mf2(__VA_ARGS__)
18943
#define vnclipu_wx_u16mf2(...) __riscv_vnclipu_wx_u16mf2(__VA_ARGS__)
18944
#define vnclipu_wv_u16m1(...) __riscv_vnclipu_wv_u16m1(__VA_ARGS__)
18945
#define vnclipu_wx_u16m1(...) __riscv_vnclipu_wx_u16m1(__VA_ARGS__)
18946
#define vnclipu_wv_u16m2(...) __riscv_vnclipu_wv_u16m2(__VA_ARGS__)
18947
#define vnclipu_wx_u16m2(...) __riscv_vnclipu_wx_u16m2(__VA_ARGS__)
18948
#define vnclipu_wv_u16m4(...) __riscv_vnclipu_wv_u16m4(__VA_ARGS__)
18949
#define vnclipu_wx_u16m4(...) __riscv_vnclipu_wx_u16m4(__VA_ARGS__)
18950
#define vnclipu_wv_u32mf2(...) __riscv_vnclipu_wv_u32mf2(__VA_ARGS__)
18951
#define vnclipu_wx_u32mf2(...) __riscv_vnclipu_wx_u32mf2(__VA_ARGS__)
18952
#define vnclipu_wv_u32m1(...) __riscv_vnclipu_wv_u32m1(__VA_ARGS__)
18953
#define vnclipu_wx_u32m1(...) __riscv_vnclipu_wx_u32m1(__VA_ARGS__)
18954
#define vnclipu_wv_u32m2(...) __riscv_vnclipu_wv_u32m2(__VA_ARGS__)
18955
#define vnclipu_wx_u32m2(...) __riscv_vnclipu_wx_u32m2(__VA_ARGS__)
18956
#define vnclipu_wv_u32m4(...) __riscv_vnclipu_wv_u32m4(__VA_ARGS__)
18957
#define vnclipu_wx_u32m4(...) __riscv_vnclipu_wx_u32m4(__VA_ARGS__)
18958
// masked functions
18959
#define vnclip_wv_i8mf8_m(...) __riscv_vnclip_wv_i8mf8_tumu(__VA_ARGS__)
18960
#define vnclip_wx_i8mf8_m(...) __riscv_vnclip_wx_i8mf8_tumu(__VA_ARGS__)
18961
#define vnclip_wv_i8mf4_m(...) __riscv_vnclip_wv_i8mf4_tumu(__VA_ARGS__)
18962
#define vnclip_wx_i8mf4_m(...) __riscv_vnclip_wx_i8mf4_tumu(__VA_ARGS__)
18963
#define vnclip_wv_i8mf2_m(...) __riscv_vnclip_wv_i8mf2_tumu(__VA_ARGS__)
18964
#define vnclip_wx_i8mf2_m(...) __riscv_vnclip_wx_i8mf2_tumu(__VA_ARGS__)
18965
#define vnclip_wv_i8m1_m(...) __riscv_vnclip_wv_i8m1_tumu(__VA_ARGS__)
18966
#define vnclip_wx_i8m1_m(...) __riscv_vnclip_wx_i8m1_tumu(__VA_ARGS__)
18967
#define vnclip_wv_i8m2_m(...) __riscv_vnclip_wv_i8m2_tumu(__VA_ARGS__)
18968
#define vnclip_wx_i8m2_m(...) __riscv_vnclip_wx_i8m2_tumu(__VA_ARGS__)
18969
#define vnclip_wv_i8m4_m(...) __riscv_vnclip_wv_i8m4_tumu(__VA_ARGS__)
18970
#define vnclip_wx_i8m4_m(...) __riscv_vnclip_wx_i8m4_tumu(__VA_ARGS__)
18971
#define vnclip_wv_i16mf4_m(...) __riscv_vnclip_wv_i16mf4_tumu(__VA_ARGS__)
18972
#define vnclip_wx_i16mf4_m(...) __riscv_vnclip_wx_i16mf4_tumu(__VA_ARGS__)
18973
#define vnclip_wv_i16mf2_m(...) __riscv_vnclip_wv_i16mf2_tumu(__VA_ARGS__)
18974
#define vnclip_wx_i16mf2_m(...) __riscv_vnclip_wx_i16mf2_tumu(__VA_ARGS__)
18975
#define vnclip_wv_i16m1_m(...) __riscv_vnclip_wv_i16m1_tumu(__VA_ARGS__)
18976
#define vnclip_wx_i16m1_m(...) __riscv_vnclip_wx_i16m1_tumu(__VA_ARGS__)
18977
#define vnclip_wv_i16m2_m(...) __riscv_vnclip_wv_i16m2_tumu(__VA_ARGS__)
18978
#define vnclip_wx_i16m2_m(...) __riscv_vnclip_wx_i16m2_tumu(__VA_ARGS__)
18979
#define vnclip_wv_i16m4_m(...) __riscv_vnclip_wv_i16m4_tumu(__VA_ARGS__)
18980
#define vnclip_wx_i16m4_m(...) __riscv_vnclip_wx_i16m4_tumu(__VA_ARGS__)
18981
#define vnclip_wv_i32mf2_m(...) __riscv_vnclip_wv_i32mf2_tumu(__VA_ARGS__)
18982
#define vnclip_wx_i32mf2_m(...) __riscv_vnclip_wx_i32mf2_tumu(__VA_ARGS__)
18983
#define vnclip_wv_i32m1_m(...) __riscv_vnclip_wv_i32m1_tumu(__VA_ARGS__)
18984
#define vnclip_wx_i32m1_m(...) __riscv_vnclip_wx_i32m1_tumu(__VA_ARGS__)
18985
#define vnclip_wv_i32m2_m(...) __riscv_vnclip_wv_i32m2_tumu(__VA_ARGS__)
18986
#define vnclip_wx_i32m2_m(...) __riscv_vnclip_wx_i32m2_tumu(__VA_ARGS__)
18987
#define vnclip_wv_i32m4_m(...) __riscv_vnclip_wv_i32m4_tumu(__VA_ARGS__)
18988
#define vnclip_wx_i32m4_m(...) __riscv_vnclip_wx_i32m4_tumu(__VA_ARGS__)
18989
#define vnclipu_wv_u8mf8_m(...) __riscv_vnclipu_wv_u8mf8_tumu(__VA_ARGS__)
18990
#define vnclipu_wx_u8mf8_m(...) __riscv_vnclipu_wx_u8mf8_tumu(__VA_ARGS__)
18991
#define vnclipu_wv_u8mf4_m(...) __riscv_vnclipu_wv_u8mf4_tumu(__VA_ARGS__)
18992
#define vnclipu_wx_u8mf4_m(...) __riscv_vnclipu_wx_u8mf4_tumu(__VA_ARGS__)
18993
#define vnclipu_wv_u8mf2_m(...) __riscv_vnclipu_wv_u8mf2_tumu(__VA_ARGS__)
18994
#define vnclipu_wx_u8mf2_m(...) __riscv_vnclipu_wx_u8mf2_tumu(__VA_ARGS__)
18995
#define vnclipu_wv_u8m1_m(...) __riscv_vnclipu_wv_u8m1_tumu(__VA_ARGS__)
18996
#define vnclipu_wx_u8m1_m(...) __riscv_vnclipu_wx_u8m1_tumu(__VA_ARGS__)
18997
#define vnclipu_wv_u8m2_m(...) __riscv_vnclipu_wv_u8m2_tumu(__VA_ARGS__)
18998
#define vnclipu_wx_u8m2_m(...) __riscv_vnclipu_wx_u8m2_tumu(__VA_ARGS__)
18999
#define vnclipu_wv_u8m4_m(...) __riscv_vnclipu_wv_u8m4_tumu(__VA_ARGS__)
19000
#define vnclipu_wx_u8m4_m(...) __riscv_vnclipu_wx_u8m4_tumu(__VA_ARGS__)
19001
#define vnclipu_wv_u16mf4_m(...) __riscv_vnclipu_wv_u16mf4_tumu(__VA_ARGS__)
19002
#define vnclipu_wx_u16mf4_m(...) __riscv_vnclipu_wx_u16mf4_tumu(__VA_ARGS__)
19003
#define vnclipu_wv_u16mf2_m(...) __riscv_vnclipu_wv_u16mf2_tumu(__VA_ARGS__)
19004
#define vnclipu_wx_u16mf2_m(...) __riscv_vnclipu_wx_u16mf2_tumu(__VA_ARGS__)
19005
#define vnclipu_wv_u16m1_m(...) __riscv_vnclipu_wv_u16m1_tumu(__VA_ARGS__)
19006
#define vnclipu_wx_u16m1_m(...) __riscv_vnclipu_wx_u16m1_tumu(__VA_ARGS__)
19007
#define vnclipu_wv_u16m2_m(...) __riscv_vnclipu_wv_u16m2_tumu(__VA_ARGS__)
19008
#define vnclipu_wx_u16m2_m(...) __riscv_vnclipu_wx_u16m2_tumu(__VA_ARGS__)
19009
#define vnclipu_wv_u16m4_m(...) __riscv_vnclipu_wv_u16m4_tumu(__VA_ARGS__)
19010
#define vnclipu_wx_u16m4_m(...) __riscv_vnclipu_wx_u16m4_tumu(__VA_ARGS__)
19011
#define vnclipu_wv_u32mf2_m(...) __riscv_vnclipu_wv_u32mf2_tumu(__VA_ARGS__)
19012
#define vnclipu_wx_u32mf2_m(...) __riscv_vnclipu_wx_u32mf2_tumu(__VA_ARGS__)
19013
#define vnclipu_wv_u32m1_m(...) __riscv_vnclipu_wv_u32m1_tumu(__VA_ARGS__)
19014
#define vnclipu_wx_u32m1_m(...) __riscv_vnclipu_wx_u32m1_tumu(__VA_ARGS__)
19015
#define vnclipu_wv_u32m2_m(...) __riscv_vnclipu_wv_u32m2_tumu(__VA_ARGS__)
19016
#define vnclipu_wx_u32m2_m(...) __riscv_vnclipu_wx_u32m2_tumu(__VA_ARGS__)
19017
#define vnclipu_wv_u32m4_m(...) __riscv_vnclipu_wv_u32m4_tumu(__VA_ARGS__)
19018
#define vnclipu_wx_u32m4_m(...) __riscv_vnclipu_wx_u32m4_tumu(__VA_ARGS__)
19019
#define vfadd_vv_f16mf4(...) __riscv_vfadd_vv_f16mf4(__VA_ARGS__)
19020
#define vfadd_vf_f16mf4(...) __riscv_vfadd_vf_f16mf4(__VA_ARGS__)
19021
#define vfadd_vv_f16mf2(...) __riscv_vfadd_vv_f16mf2(__VA_ARGS__)
19022
#define vfadd_vf_f16mf2(...) __riscv_vfadd_vf_f16mf2(__VA_ARGS__)
19023
#define vfadd_vv_f16m1(...) __riscv_vfadd_vv_f16m1(__VA_ARGS__)
19024
#define vfadd_vf_f16m1(...) __riscv_vfadd_vf_f16m1(__VA_ARGS__)
19025
#define vfadd_vv_f16m2(...) __riscv_vfadd_vv_f16m2(__VA_ARGS__)
19026
#define vfadd_vf_f16m2(...) __riscv_vfadd_vf_f16m2(__VA_ARGS__)
19027
#define vfadd_vv_f16m4(...) __riscv_vfadd_vv_f16m4(__VA_ARGS__)
19028
#define vfadd_vf_f16m4(...) __riscv_vfadd_vf_f16m4(__VA_ARGS__)
19029
#define vfadd_vv_f16m8(...) __riscv_vfadd_vv_f16m8(__VA_ARGS__)
19030
#define vfadd_vf_f16m8(...) __riscv_vfadd_vf_f16m8(__VA_ARGS__)
19031
#define vfadd_vv_f32mf2(...) __riscv_vfadd_vv_f32mf2(__VA_ARGS__)
19032
#define vfadd_vf_f32mf2(...) __riscv_vfadd_vf_f32mf2(__VA_ARGS__)
19033
#define vfadd_vv_f32m1(...) __riscv_vfadd_vv_f32m1(__VA_ARGS__)
19034
#define vfadd_vf_f32m1(...) __riscv_vfadd_vf_f32m1(__VA_ARGS__)
19035
#define vfadd_vv_f32m2(...) __riscv_vfadd_vv_f32m2(__VA_ARGS__)
19036
#define vfadd_vf_f32m2(...) __riscv_vfadd_vf_f32m2(__VA_ARGS__)
19037
#define vfadd_vv_f32m4(...) __riscv_vfadd_vv_f32m4(__VA_ARGS__)
19038
#define vfadd_vf_f32m4(...) __riscv_vfadd_vf_f32m4(__VA_ARGS__)
19039
#define vfadd_vv_f32m8(...) __riscv_vfadd_vv_f32m8(__VA_ARGS__)
19040
#define vfadd_vf_f32m8(...) __riscv_vfadd_vf_f32m8(__VA_ARGS__)
19041
#define vfadd_vv_f64m1(...) __riscv_vfadd_vv_f64m1(__VA_ARGS__)
19042
#define vfadd_vf_f64m1(...) __riscv_vfadd_vf_f64m1(__VA_ARGS__)
19043
#define vfadd_vv_f64m2(...) __riscv_vfadd_vv_f64m2(__VA_ARGS__)
19044
#define vfadd_vf_f64m2(...) __riscv_vfadd_vf_f64m2(__VA_ARGS__)
19045
#define vfadd_vv_f64m4(...) __riscv_vfadd_vv_f64m4(__VA_ARGS__)
19046
#define vfadd_vf_f64m4(...) __riscv_vfadd_vf_f64m4(__VA_ARGS__)
19047
#define vfadd_vv_f64m8(...) __riscv_vfadd_vv_f64m8(__VA_ARGS__)
19048
#define vfadd_vf_f64m8(...) __riscv_vfadd_vf_f64m8(__VA_ARGS__)
19049
#define vfsub_vv_f16mf4(...) __riscv_vfsub_vv_f16mf4(__VA_ARGS__)
19050
#define vfsub_vf_f16mf4(...) __riscv_vfsub_vf_f16mf4(__VA_ARGS__)
19051
#define vfsub_vv_f16mf2(...) __riscv_vfsub_vv_f16mf2(__VA_ARGS__)
19052
#define vfsub_vf_f16mf2(...) __riscv_vfsub_vf_f16mf2(__VA_ARGS__)
19053
#define vfsub_vv_f16m1(...) __riscv_vfsub_vv_f16m1(__VA_ARGS__)
19054
#define vfsub_vf_f16m1(...) __riscv_vfsub_vf_f16m1(__VA_ARGS__)
19055
#define vfsub_vv_f16m2(...) __riscv_vfsub_vv_f16m2(__VA_ARGS__)
19056
#define vfsub_vf_f16m2(...) __riscv_vfsub_vf_f16m2(__VA_ARGS__)
19057
#define vfsub_vv_f16m4(...) __riscv_vfsub_vv_f16m4(__VA_ARGS__)
19058
#define vfsub_vf_f16m4(...) __riscv_vfsub_vf_f16m4(__VA_ARGS__)
19059
#define vfsub_vv_f16m8(...) __riscv_vfsub_vv_f16m8(__VA_ARGS__)
19060
#define vfsub_vf_f16m8(...) __riscv_vfsub_vf_f16m8(__VA_ARGS__)
19061
#define vfsub_vv_f32mf2(...) __riscv_vfsub_vv_f32mf2(__VA_ARGS__)
19062
#define vfsub_vf_f32mf2(...) __riscv_vfsub_vf_f32mf2(__VA_ARGS__)
19063
#define vfsub_vv_f32m1(...) __riscv_vfsub_vv_f32m1(__VA_ARGS__)
19064
#define vfsub_vf_f32m1(...) __riscv_vfsub_vf_f32m1(__VA_ARGS__)
19065
#define vfsub_vv_f32m2(...) __riscv_vfsub_vv_f32m2(__VA_ARGS__)
19066
#define vfsub_vf_f32m2(...) __riscv_vfsub_vf_f32m2(__VA_ARGS__)
19067
#define vfsub_vv_f32m4(...) __riscv_vfsub_vv_f32m4(__VA_ARGS__)
19068
#define vfsub_vf_f32m4(...) __riscv_vfsub_vf_f32m4(__VA_ARGS__)
19069
#define vfsub_vv_f32m8(...) __riscv_vfsub_vv_f32m8(__VA_ARGS__)
19070
#define vfsub_vf_f32m8(...) __riscv_vfsub_vf_f32m8(__VA_ARGS__)
19071
#define vfsub_vv_f64m1(...) __riscv_vfsub_vv_f64m1(__VA_ARGS__)
19072
#define vfsub_vf_f64m1(...) __riscv_vfsub_vf_f64m1(__VA_ARGS__)
19073
#define vfsub_vv_f64m2(...) __riscv_vfsub_vv_f64m2(__VA_ARGS__)
19074
#define vfsub_vf_f64m2(...) __riscv_vfsub_vf_f64m2(__VA_ARGS__)
19075
#define vfsub_vv_f64m4(...) __riscv_vfsub_vv_f64m4(__VA_ARGS__)
19076
#define vfsub_vf_f64m4(...) __riscv_vfsub_vf_f64m4(__VA_ARGS__)
19077
#define vfsub_vv_f64m8(...) __riscv_vfsub_vv_f64m8(__VA_ARGS__)
19078
#define vfsub_vf_f64m8(...) __riscv_vfsub_vf_f64m8(__VA_ARGS__)
19079
#define vfrsub_vf_f16mf4(...) __riscv_vfrsub_vf_f16mf4(__VA_ARGS__)
19080
#define vfrsub_vf_f16mf2(...) __riscv_vfrsub_vf_f16mf2(__VA_ARGS__)
19081
#define vfrsub_vf_f16m1(...) __riscv_vfrsub_vf_f16m1(__VA_ARGS__)
19082
#define vfrsub_vf_f16m2(...) __riscv_vfrsub_vf_f16m2(__VA_ARGS__)
19083
#define vfrsub_vf_f16m4(...) __riscv_vfrsub_vf_f16m4(__VA_ARGS__)
19084
#define vfrsub_vf_f16m8(...) __riscv_vfrsub_vf_f16m8(__VA_ARGS__)
19085
#define vfrsub_vf_f32mf2(...) __riscv_vfrsub_vf_f32mf2(__VA_ARGS__)
19086
#define vfrsub_vf_f32m1(...) __riscv_vfrsub_vf_f32m1(__VA_ARGS__)
19087
#define vfrsub_vf_f32m2(...) __riscv_vfrsub_vf_f32m2(__VA_ARGS__)
19088
#define vfrsub_vf_f32m4(...) __riscv_vfrsub_vf_f32m4(__VA_ARGS__)
19089
#define vfrsub_vf_f32m8(...) __riscv_vfrsub_vf_f32m8(__VA_ARGS__)
19090
#define vfrsub_vf_f64m1(...) __riscv_vfrsub_vf_f64m1(__VA_ARGS__)
19091
#define vfrsub_vf_f64m2(...) __riscv_vfrsub_vf_f64m2(__VA_ARGS__)
19092
#define vfrsub_vf_f64m4(...) __riscv_vfrsub_vf_f64m4(__VA_ARGS__)
19093
#define vfrsub_vf_f64m8(...) __riscv_vfrsub_vf_f64m8(__VA_ARGS__)
19094
#define vfneg_v_f16mf4(...) __riscv_vfneg_v_f16mf4(__VA_ARGS__)
19095
#define vfneg_v_f16mf2(...) __riscv_vfneg_v_f16mf2(__VA_ARGS__)
19096
#define vfneg_v_f16m1(...) __riscv_vfneg_v_f16m1(__VA_ARGS__)
19097
#define vfneg_v_f16m2(...) __riscv_vfneg_v_f16m2(__VA_ARGS__)
19098
#define vfneg_v_f16m4(...) __riscv_vfneg_v_f16m4(__VA_ARGS__)
19099
#define vfneg_v_f16m8(...) __riscv_vfneg_v_f16m8(__VA_ARGS__)
19100
#define vfneg_v_f32mf2(...) __riscv_vfneg_v_f32mf2(__VA_ARGS__)
19101
#define vfneg_v_f32m1(...) __riscv_vfneg_v_f32m1(__VA_ARGS__)
19102
#define vfneg_v_f32m2(...) __riscv_vfneg_v_f32m2(__VA_ARGS__)
19103
#define vfneg_v_f32m4(...) __riscv_vfneg_v_f32m4(__VA_ARGS__)
19104
#define vfneg_v_f32m8(...) __riscv_vfneg_v_f32m8(__VA_ARGS__)
19105
#define vfneg_v_f64m1(...) __riscv_vfneg_v_f64m1(__VA_ARGS__)
19106
#define vfneg_v_f64m2(...) __riscv_vfneg_v_f64m2(__VA_ARGS__)
19107
#define vfneg_v_f64m4(...) __riscv_vfneg_v_f64m4(__VA_ARGS__)
19108
#define vfneg_v_f64m8(...) __riscv_vfneg_v_f64m8(__VA_ARGS__)
19109
// masked functions
19110
#define vfadd_vv_f16mf4_m(...) __riscv_vfadd_vv_f16mf4_tumu(__VA_ARGS__)
19111
#define vfadd_vf_f16mf4_m(...) __riscv_vfadd_vf_f16mf4_tumu(__VA_ARGS__)
19112
#define vfadd_vv_f16mf2_m(...) __riscv_vfadd_vv_f16mf2_tumu(__VA_ARGS__)
19113
#define vfadd_vf_f16mf2_m(...) __riscv_vfadd_vf_f16mf2_tumu(__VA_ARGS__)
19114
#define vfadd_vv_f16m1_m(...) __riscv_vfadd_vv_f16m1_tumu(__VA_ARGS__)
19115
#define vfadd_vf_f16m1_m(...) __riscv_vfadd_vf_f16m1_tumu(__VA_ARGS__)
19116
#define vfadd_vv_f16m2_m(...) __riscv_vfadd_vv_f16m2_tumu(__VA_ARGS__)
19117
#define vfadd_vf_f16m2_m(...) __riscv_vfadd_vf_f16m2_tumu(__VA_ARGS__)
19118
#define vfadd_vv_f16m4_m(...) __riscv_vfadd_vv_f16m4_tumu(__VA_ARGS__)
19119
#define vfadd_vf_f16m4_m(...) __riscv_vfadd_vf_f16m4_tumu(__VA_ARGS__)
19120
#define vfadd_vv_f16m8_m(...) __riscv_vfadd_vv_f16m8_tumu(__VA_ARGS__)
19121
#define vfadd_vf_f16m8_m(...) __riscv_vfadd_vf_f16m8_tumu(__VA_ARGS__)
19122
#define vfadd_vv_f32mf2_m(...) __riscv_vfadd_vv_f32mf2_tumu(__VA_ARGS__)
19123
#define vfadd_vf_f32mf2_m(...) __riscv_vfadd_vf_f32mf2_tumu(__VA_ARGS__)
19124
#define vfadd_vv_f32m1_m(...) __riscv_vfadd_vv_f32m1_tumu(__VA_ARGS__)
19125
#define vfadd_vf_f32m1_m(...) __riscv_vfadd_vf_f32m1_tumu(__VA_ARGS__)
19126
#define vfadd_vv_f32m2_m(...) __riscv_vfadd_vv_f32m2_tumu(__VA_ARGS__)
19127
#define vfadd_vf_f32m2_m(...) __riscv_vfadd_vf_f32m2_tumu(__VA_ARGS__)
19128
#define vfadd_vv_f32m4_m(...) __riscv_vfadd_vv_f32m4_tumu(__VA_ARGS__)
19129
#define vfadd_vf_f32m4_m(...) __riscv_vfadd_vf_f32m4_tumu(__VA_ARGS__)
19130
#define vfadd_vv_f32m8_m(...) __riscv_vfadd_vv_f32m8_tumu(__VA_ARGS__)
19131
#define vfadd_vf_f32m8_m(...) __riscv_vfadd_vf_f32m8_tumu(__VA_ARGS__)
19132
#define vfadd_vv_f64m1_m(...) __riscv_vfadd_vv_f64m1_tumu(__VA_ARGS__)
19133
#define vfadd_vf_f64m1_m(...) __riscv_vfadd_vf_f64m1_tumu(__VA_ARGS__)
19134
#define vfadd_vv_f64m2_m(...) __riscv_vfadd_vv_f64m2_tumu(__VA_ARGS__)
19135
#define vfadd_vf_f64m2_m(...) __riscv_vfadd_vf_f64m2_tumu(__VA_ARGS__)
19136
#define vfadd_vv_f64m4_m(...) __riscv_vfadd_vv_f64m4_tumu(__VA_ARGS__)
19137
#define vfadd_vf_f64m4_m(...) __riscv_vfadd_vf_f64m4_tumu(__VA_ARGS__)
19138
#define vfadd_vv_f64m8_m(...) __riscv_vfadd_vv_f64m8_tumu(__VA_ARGS__)
19139
#define vfadd_vf_f64m8_m(...) __riscv_vfadd_vf_f64m8_tumu(__VA_ARGS__)
19140
#define vfsub_vv_f16mf4_m(...) __riscv_vfsub_vv_f16mf4_tumu(__VA_ARGS__)
19141
#define vfsub_vf_f16mf4_m(...) __riscv_vfsub_vf_f16mf4_tumu(__VA_ARGS__)
19142
#define vfsub_vv_f16mf2_m(...) __riscv_vfsub_vv_f16mf2_tumu(__VA_ARGS__)
19143
#define vfsub_vf_f16mf2_m(...) __riscv_vfsub_vf_f16mf2_tumu(__VA_ARGS__)
19144
#define vfsub_vv_f16m1_m(...) __riscv_vfsub_vv_f16m1_tumu(__VA_ARGS__)
19145
#define vfsub_vf_f16m1_m(...) __riscv_vfsub_vf_f16m1_tumu(__VA_ARGS__)
19146
#define vfsub_vv_f16m2_m(...) __riscv_vfsub_vv_f16m2_tumu(__VA_ARGS__)
19147
#define vfsub_vf_f16m2_m(...) __riscv_vfsub_vf_f16m2_tumu(__VA_ARGS__)
19148
#define vfsub_vv_f16m4_m(...) __riscv_vfsub_vv_f16m4_tumu(__VA_ARGS__)
19149
#define vfsub_vf_f16m4_m(...) __riscv_vfsub_vf_f16m4_tumu(__VA_ARGS__)
19150
#define vfsub_vv_f16m8_m(...) __riscv_vfsub_vv_f16m8_tumu(__VA_ARGS__)
19151
#define vfsub_vf_f16m8_m(...) __riscv_vfsub_vf_f16m8_tumu(__VA_ARGS__)
19152
#define vfsub_vv_f32mf2_m(...) __riscv_vfsub_vv_f32mf2_tumu(__VA_ARGS__)
19153
#define vfsub_vf_f32mf2_m(...) __riscv_vfsub_vf_f32mf2_tumu(__VA_ARGS__)
19154
#define vfsub_vv_f32m1_m(...) __riscv_vfsub_vv_f32m1_tumu(__VA_ARGS__)
19155
#define vfsub_vf_f32m1_m(...) __riscv_vfsub_vf_f32m1_tumu(__VA_ARGS__)
19156
#define vfsub_vv_f32m2_m(...) __riscv_vfsub_vv_f32m2_tumu(__VA_ARGS__)
19157
#define vfsub_vf_f32m2_m(...) __riscv_vfsub_vf_f32m2_tumu(__VA_ARGS__)
19158
#define vfsub_vv_f32m4_m(...) __riscv_vfsub_vv_f32m4_tumu(__VA_ARGS__)
19159
#define vfsub_vf_f32m4_m(...) __riscv_vfsub_vf_f32m4_tumu(__VA_ARGS__)
19160
#define vfsub_vv_f32m8_m(...) __riscv_vfsub_vv_f32m8_tumu(__VA_ARGS__)
19161
#define vfsub_vf_f32m8_m(...) __riscv_vfsub_vf_f32m8_tumu(__VA_ARGS__)
19162
#define vfsub_vv_f64m1_m(...) __riscv_vfsub_vv_f64m1_tumu(__VA_ARGS__)
19163
#define vfsub_vf_f64m1_m(...) __riscv_vfsub_vf_f64m1_tumu(__VA_ARGS__)
19164
#define vfsub_vv_f64m2_m(...) __riscv_vfsub_vv_f64m2_tumu(__VA_ARGS__)
19165
#define vfsub_vf_f64m2_m(...) __riscv_vfsub_vf_f64m2_tumu(__VA_ARGS__)
19166
#define vfsub_vv_f64m4_m(...) __riscv_vfsub_vv_f64m4_tumu(__VA_ARGS__)
19167
#define vfsub_vf_f64m4_m(...) __riscv_vfsub_vf_f64m4_tumu(__VA_ARGS__)
19168
#define vfsub_vv_f64m8_m(...) __riscv_vfsub_vv_f64m8_tumu(__VA_ARGS__)
19169
#define vfsub_vf_f64m8_m(...) __riscv_vfsub_vf_f64m8_tumu(__VA_ARGS__)
19170
#define vfrsub_vf_f16mf4_m(...) __riscv_vfrsub_vf_f16mf4_tumu(__VA_ARGS__)
19171
#define vfrsub_vf_f16mf2_m(...) __riscv_vfrsub_vf_f16mf2_tumu(__VA_ARGS__)
19172
#define vfrsub_vf_f16m1_m(...) __riscv_vfrsub_vf_f16m1_tumu(__VA_ARGS__)
19173
#define vfrsub_vf_f16m2_m(...) __riscv_vfrsub_vf_f16m2_tumu(__VA_ARGS__)
19174
#define vfrsub_vf_f16m4_m(...) __riscv_vfrsub_vf_f16m4_tumu(__VA_ARGS__)
19175
#define vfrsub_vf_f16m8_m(...) __riscv_vfrsub_vf_f16m8_tumu(__VA_ARGS__)
19176
#define vfrsub_vf_f32mf2_m(...) __riscv_vfrsub_vf_f32mf2_tumu(__VA_ARGS__)
19177
#define vfrsub_vf_f32m1_m(...) __riscv_vfrsub_vf_f32m1_tumu(__VA_ARGS__)
19178
#define vfrsub_vf_f32m2_m(...) __riscv_vfrsub_vf_f32m2_tumu(__VA_ARGS__)
19179
#define vfrsub_vf_f32m4_m(...) __riscv_vfrsub_vf_f32m4_tumu(__VA_ARGS__)
19180
#define vfrsub_vf_f32m8_m(...) __riscv_vfrsub_vf_f32m8_tumu(__VA_ARGS__)
19181
#define vfrsub_vf_f64m1_m(...) __riscv_vfrsub_vf_f64m1_tumu(__VA_ARGS__)
19182
#define vfrsub_vf_f64m2_m(...) __riscv_vfrsub_vf_f64m2_tumu(__VA_ARGS__)
19183
#define vfrsub_vf_f64m4_m(...) __riscv_vfrsub_vf_f64m4_tumu(__VA_ARGS__)
19184
#define vfrsub_vf_f64m8_m(...) __riscv_vfrsub_vf_f64m8_tumu(__VA_ARGS__)
19185
#define vfneg_v_f16mf4_m(...) __riscv_vfneg_v_f16mf4_tumu(__VA_ARGS__)
19186
#define vfneg_v_f16mf2_m(...) __riscv_vfneg_v_f16mf2_tumu(__VA_ARGS__)
19187
#define vfneg_v_f16m1_m(...) __riscv_vfneg_v_f16m1_tumu(__VA_ARGS__)
19188
#define vfneg_v_f16m2_m(...) __riscv_vfneg_v_f16m2_tumu(__VA_ARGS__)
19189
#define vfneg_v_f16m4_m(...) __riscv_vfneg_v_f16m4_tumu(__VA_ARGS__)
19190
#define vfneg_v_f16m8_m(...) __riscv_vfneg_v_f16m8_tumu(__VA_ARGS__)
19191
#define vfneg_v_f32mf2_m(...) __riscv_vfneg_v_f32mf2_tumu(__VA_ARGS__)
19192
#define vfneg_v_f32m1_m(...) __riscv_vfneg_v_f32m1_tumu(__VA_ARGS__)
19193
#define vfneg_v_f32m2_m(...) __riscv_vfneg_v_f32m2_tumu(__VA_ARGS__)
19194
#define vfneg_v_f32m4_m(...) __riscv_vfneg_v_f32m4_tumu(__VA_ARGS__)
19195
#define vfneg_v_f32m8_m(...) __riscv_vfneg_v_f32m8_tumu(__VA_ARGS__)
19196
#define vfneg_v_f64m1_m(...) __riscv_vfneg_v_f64m1_tumu(__VA_ARGS__)
19197
#define vfneg_v_f64m2_m(...) __riscv_vfneg_v_f64m2_tumu(__VA_ARGS__)
19198
#define vfneg_v_f64m4_m(...) __riscv_vfneg_v_f64m4_tumu(__VA_ARGS__)
19199
#define vfneg_v_f64m8_m(...) __riscv_vfneg_v_f64m8_tumu(__VA_ARGS__)
19200
#define vfwadd_vv_f32mf2(...) __riscv_vfwadd_vv_f32mf2(__VA_ARGS__)
19201
#define vfwadd_vf_f32mf2(...) __riscv_vfwadd_vf_f32mf2(__VA_ARGS__)
19202
#define vfwadd_wv_f32mf2(...) __riscv_vfwadd_wv_f32mf2(__VA_ARGS__)
19203
#define vfwadd_wf_f32mf2(...) __riscv_vfwadd_wf_f32mf2(__VA_ARGS__)
19204
#define vfwadd_vv_f32m1(...) __riscv_vfwadd_vv_f32m1(__VA_ARGS__)
19205
#define vfwadd_vf_f32m1(...) __riscv_vfwadd_vf_f32m1(__VA_ARGS__)
19206
#define vfwadd_wv_f32m1(...) __riscv_vfwadd_wv_f32m1(__VA_ARGS__)
19207
#define vfwadd_wf_f32m1(...) __riscv_vfwadd_wf_f32m1(__VA_ARGS__)
19208
#define vfwadd_vv_f32m2(...) __riscv_vfwadd_vv_f32m2(__VA_ARGS__)
19209
#define vfwadd_vf_f32m2(...) __riscv_vfwadd_vf_f32m2(__VA_ARGS__)
19210
#define vfwadd_wv_f32m2(...) __riscv_vfwadd_wv_f32m2(__VA_ARGS__)
19211
#define vfwadd_wf_f32m2(...) __riscv_vfwadd_wf_f32m2(__VA_ARGS__)
19212
#define vfwadd_vv_f32m4(...) __riscv_vfwadd_vv_f32m4(__VA_ARGS__)
19213
#define vfwadd_vf_f32m4(...) __riscv_vfwadd_vf_f32m4(__VA_ARGS__)
19214
#define vfwadd_wv_f32m4(...) __riscv_vfwadd_wv_f32m4(__VA_ARGS__)
19215
#define vfwadd_wf_f32m4(...) __riscv_vfwadd_wf_f32m4(__VA_ARGS__)
19216
#define vfwadd_vv_f32m8(...) __riscv_vfwadd_vv_f32m8(__VA_ARGS__)
19217
#define vfwadd_vf_f32m8(...) __riscv_vfwadd_vf_f32m8(__VA_ARGS__)
19218
#define vfwadd_wv_f32m8(...) __riscv_vfwadd_wv_f32m8(__VA_ARGS__)
19219
#define vfwadd_wf_f32m8(...) __riscv_vfwadd_wf_f32m8(__VA_ARGS__)
19220
#define vfwadd_vv_f64m1(...) __riscv_vfwadd_vv_f64m1(__VA_ARGS__)
19221
#define vfwadd_vf_f64m1(...) __riscv_vfwadd_vf_f64m1(__VA_ARGS__)
19222
#define vfwadd_wv_f64m1(...) __riscv_vfwadd_wv_f64m1(__VA_ARGS__)
19223
#define vfwadd_wf_f64m1(...) __riscv_vfwadd_wf_f64m1(__VA_ARGS__)
19224
#define vfwadd_vv_f64m2(...) __riscv_vfwadd_vv_f64m2(__VA_ARGS__)
19225
#define vfwadd_vf_f64m2(...) __riscv_vfwadd_vf_f64m2(__VA_ARGS__)
19226
#define vfwadd_wv_f64m2(...) __riscv_vfwadd_wv_f64m2(__VA_ARGS__)
19227
#define vfwadd_wf_f64m2(...) __riscv_vfwadd_wf_f64m2(__VA_ARGS__)
19228
#define vfwadd_vv_f64m4(...) __riscv_vfwadd_vv_f64m4(__VA_ARGS__)
19229
#define vfwadd_vf_f64m4(...) __riscv_vfwadd_vf_f64m4(__VA_ARGS__)
19230
#define vfwadd_wv_f64m4(...) __riscv_vfwadd_wv_f64m4(__VA_ARGS__)
19231
#define vfwadd_wf_f64m4(...) __riscv_vfwadd_wf_f64m4(__VA_ARGS__)
19232
#define vfwadd_vv_f64m8(...) __riscv_vfwadd_vv_f64m8(__VA_ARGS__)
19233
#define vfwadd_vf_f64m8(...) __riscv_vfwadd_vf_f64m8(__VA_ARGS__)
19234
#define vfwadd_wv_f64m8(...) __riscv_vfwadd_wv_f64m8(__VA_ARGS__)
19235
#define vfwadd_wf_f64m8(...) __riscv_vfwadd_wf_f64m8(__VA_ARGS__)
19236
#define vfwsub_vv_f32mf2(...) __riscv_vfwsub_vv_f32mf2(__VA_ARGS__)
19237
#define vfwsub_vf_f32mf2(...) __riscv_vfwsub_vf_f32mf2(__VA_ARGS__)
19238
#define vfwsub_wv_f32mf2(...) __riscv_vfwsub_wv_f32mf2(__VA_ARGS__)
19239
#define vfwsub_wf_f32mf2(...) __riscv_vfwsub_wf_f32mf2(__VA_ARGS__)
19240
#define vfwsub_vv_f32m1(...) __riscv_vfwsub_vv_f32m1(__VA_ARGS__)
19241
#define vfwsub_vf_f32m1(...) __riscv_vfwsub_vf_f32m1(__VA_ARGS__)
19242
#define vfwsub_wv_f32m1(...) __riscv_vfwsub_wv_f32m1(__VA_ARGS__)
19243
#define vfwsub_wf_f32m1(...) __riscv_vfwsub_wf_f32m1(__VA_ARGS__)
19244
#define vfwsub_vv_f32m2(...) __riscv_vfwsub_vv_f32m2(__VA_ARGS__)
19245
#define vfwsub_vf_f32m2(...) __riscv_vfwsub_vf_f32m2(__VA_ARGS__)
19246
#define vfwsub_wv_f32m2(...) __riscv_vfwsub_wv_f32m2(__VA_ARGS__)
19247
#define vfwsub_wf_f32m2(...) __riscv_vfwsub_wf_f32m2(__VA_ARGS__)
19248
#define vfwsub_vv_f32m4(...) __riscv_vfwsub_vv_f32m4(__VA_ARGS__)
19249
#define vfwsub_vf_f32m4(...) __riscv_vfwsub_vf_f32m4(__VA_ARGS__)
19250
#define vfwsub_wv_f32m4(...) __riscv_vfwsub_wv_f32m4(__VA_ARGS__)
19251
#define vfwsub_wf_f32m4(...) __riscv_vfwsub_wf_f32m4(__VA_ARGS__)
19252
#define vfwsub_vv_f32m8(...) __riscv_vfwsub_vv_f32m8(__VA_ARGS__)
19253
#define vfwsub_vf_f32m8(...) __riscv_vfwsub_vf_f32m8(__VA_ARGS__)
19254
#define vfwsub_wv_f32m8(...) __riscv_vfwsub_wv_f32m8(__VA_ARGS__)
19255
#define vfwsub_wf_f32m8(...) __riscv_vfwsub_wf_f32m8(__VA_ARGS__)
19256
#define vfwsub_vv_f64m1(...) __riscv_vfwsub_vv_f64m1(__VA_ARGS__)
19257
#define vfwsub_vf_f64m1(...) __riscv_vfwsub_vf_f64m1(__VA_ARGS__)
19258
#define vfwsub_wv_f64m1(...) __riscv_vfwsub_wv_f64m1(__VA_ARGS__)
19259
#define vfwsub_wf_f64m1(...) __riscv_vfwsub_wf_f64m1(__VA_ARGS__)
19260
#define vfwsub_vv_f64m2(...) __riscv_vfwsub_vv_f64m2(__VA_ARGS__)
19261
#define vfwsub_vf_f64m2(...) __riscv_vfwsub_vf_f64m2(__VA_ARGS__)
19262
#define vfwsub_wv_f64m2(...) __riscv_vfwsub_wv_f64m2(__VA_ARGS__)
19263
#define vfwsub_wf_f64m2(...) __riscv_vfwsub_wf_f64m2(__VA_ARGS__)
19264
#define vfwsub_vv_f64m4(...) __riscv_vfwsub_vv_f64m4(__VA_ARGS__)
19265
#define vfwsub_vf_f64m4(...) __riscv_vfwsub_vf_f64m4(__VA_ARGS__)
19266
#define vfwsub_wv_f64m4(...) __riscv_vfwsub_wv_f64m4(__VA_ARGS__)
19267
#define vfwsub_wf_f64m4(...) __riscv_vfwsub_wf_f64m4(__VA_ARGS__)
19268
#define vfwsub_vv_f64m8(...) __riscv_vfwsub_vv_f64m8(__VA_ARGS__)
19269
#define vfwsub_vf_f64m8(...) __riscv_vfwsub_vf_f64m8(__VA_ARGS__)
19270
#define vfwsub_wv_f64m8(...) __riscv_vfwsub_wv_f64m8(__VA_ARGS__)
19271
#define vfwsub_wf_f64m8(...) __riscv_vfwsub_wf_f64m8(__VA_ARGS__)
19272
// masked functions
19273
#define vfwadd_vv_f32mf2_m(...) __riscv_vfwadd_vv_f32mf2_tumu(__VA_ARGS__)
19274
#define vfwadd_vf_f32mf2_m(...) __riscv_vfwadd_vf_f32mf2_tumu(__VA_ARGS__)
19275
#define vfwadd_wv_f32mf2_m(...) __riscv_vfwadd_wv_f32mf2_tumu(__VA_ARGS__)
19276
#define vfwadd_wf_f32mf2_m(...) __riscv_vfwadd_wf_f32mf2_tumu(__VA_ARGS__)
19277
#define vfwadd_vv_f32m1_m(...) __riscv_vfwadd_vv_f32m1_tumu(__VA_ARGS__)
19278
#define vfwadd_vf_f32m1_m(...) __riscv_vfwadd_vf_f32m1_tumu(__VA_ARGS__)
19279
#define vfwadd_wv_f32m1_m(...) __riscv_vfwadd_wv_f32m1_tumu(__VA_ARGS__)
19280
#define vfwadd_wf_f32m1_m(...) __riscv_vfwadd_wf_f32m1_tumu(__VA_ARGS__)
19281
#define vfwadd_vv_f32m2_m(...) __riscv_vfwadd_vv_f32m2_tumu(__VA_ARGS__)
19282
#define vfwadd_vf_f32m2_m(...) __riscv_vfwadd_vf_f32m2_tumu(__VA_ARGS__)
19283
#define vfwadd_wv_f32m2_m(...) __riscv_vfwadd_wv_f32m2_tumu(__VA_ARGS__)
19284
#define vfwadd_wf_f32m2_m(...) __riscv_vfwadd_wf_f32m2_tumu(__VA_ARGS__)
19285
#define vfwadd_vv_f32m4_m(...) __riscv_vfwadd_vv_f32m4_tumu(__VA_ARGS__)
19286
#define vfwadd_vf_f32m4_m(...) __riscv_vfwadd_vf_f32m4_tumu(__VA_ARGS__)
19287
#define vfwadd_wv_f32m4_m(...) __riscv_vfwadd_wv_f32m4_tumu(__VA_ARGS__)
19288
#define vfwadd_wf_f32m4_m(...) __riscv_vfwadd_wf_f32m4_tumu(__VA_ARGS__)
19289
#define vfwadd_vv_f32m8_m(...) __riscv_vfwadd_vv_f32m8_tumu(__VA_ARGS__)
19290
#define vfwadd_vf_f32m8_m(...) __riscv_vfwadd_vf_f32m8_tumu(__VA_ARGS__)
19291
#define vfwadd_wv_f32m8_m(...) __riscv_vfwadd_wv_f32m8_tumu(__VA_ARGS__)
19292
#define vfwadd_wf_f32m8_m(...) __riscv_vfwadd_wf_f32m8_tumu(__VA_ARGS__)
19293
#define vfwadd_vv_f64m1_m(...) __riscv_vfwadd_vv_f64m1_tumu(__VA_ARGS__)
19294
#define vfwadd_vf_f64m1_m(...) __riscv_vfwadd_vf_f64m1_tumu(__VA_ARGS__)
19295
#define vfwadd_wv_f64m1_m(...) __riscv_vfwadd_wv_f64m1_tumu(__VA_ARGS__)
19296
#define vfwadd_wf_f64m1_m(...) __riscv_vfwadd_wf_f64m1_tumu(__VA_ARGS__)
19297
#define vfwadd_vv_f64m2_m(...) __riscv_vfwadd_vv_f64m2_tumu(__VA_ARGS__)
19298
#define vfwadd_vf_f64m2_m(...) __riscv_vfwadd_vf_f64m2_tumu(__VA_ARGS__)
19299
#define vfwadd_wv_f64m2_m(...) __riscv_vfwadd_wv_f64m2_tumu(__VA_ARGS__)
19300
#define vfwadd_wf_f64m2_m(...) __riscv_vfwadd_wf_f64m2_tumu(__VA_ARGS__)
19301
#define vfwadd_vv_f64m4_m(...) __riscv_vfwadd_vv_f64m4_tumu(__VA_ARGS__)
19302
#define vfwadd_vf_f64m4_m(...) __riscv_vfwadd_vf_f64m4_tumu(__VA_ARGS__)
19303
#define vfwadd_wv_f64m4_m(...) __riscv_vfwadd_wv_f64m4_tumu(__VA_ARGS__)
19304
#define vfwadd_wf_f64m4_m(...) __riscv_vfwadd_wf_f64m4_tumu(__VA_ARGS__)
19305
#define vfwadd_vv_f64m8_m(...) __riscv_vfwadd_vv_f64m8_tumu(__VA_ARGS__)
19306
#define vfwadd_vf_f64m8_m(...) __riscv_vfwadd_vf_f64m8_tumu(__VA_ARGS__)
19307
#define vfwadd_wv_f64m8_m(...) __riscv_vfwadd_wv_f64m8_tumu(__VA_ARGS__)
19308
#define vfwadd_wf_f64m8_m(...) __riscv_vfwadd_wf_f64m8_tumu(__VA_ARGS__)
19309
#define vfwsub_vv_f32mf2_m(...) __riscv_vfwsub_vv_f32mf2_tumu(__VA_ARGS__)
19310
#define vfwsub_vf_f32mf2_m(...) __riscv_vfwsub_vf_f32mf2_tumu(__VA_ARGS__)
19311
#define vfwsub_wv_f32mf2_m(...) __riscv_vfwsub_wv_f32mf2_tumu(__VA_ARGS__)
19312
#define vfwsub_wf_f32mf2_m(...) __riscv_vfwsub_wf_f32mf2_tumu(__VA_ARGS__)
19313
#define vfwsub_vv_f32m1_m(...) __riscv_vfwsub_vv_f32m1_tumu(__VA_ARGS__)
19314
#define vfwsub_vf_f32m1_m(...) __riscv_vfwsub_vf_f32m1_tumu(__VA_ARGS__)
19315
#define vfwsub_wv_f32m1_m(...) __riscv_vfwsub_wv_f32m1_tumu(__VA_ARGS__)
19316
#define vfwsub_wf_f32m1_m(...) __riscv_vfwsub_wf_f32m1_tumu(__VA_ARGS__)
19317
#define vfwsub_vv_f32m2_m(...) __riscv_vfwsub_vv_f32m2_tumu(__VA_ARGS__)
19318
#define vfwsub_vf_f32m2_m(...) __riscv_vfwsub_vf_f32m2_tumu(__VA_ARGS__)
19319
#define vfwsub_wv_f32m2_m(...) __riscv_vfwsub_wv_f32m2_tumu(__VA_ARGS__)
19320
#define vfwsub_wf_f32m2_m(...) __riscv_vfwsub_wf_f32m2_tumu(__VA_ARGS__)
19321
#define vfwsub_vv_f32m4_m(...) __riscv_vfwsub_vv_f32m4_tumu(__VA_ARGS__)
19322
#define vfwsub_vf_f32m4_m(...) __riscv_vfwsub_vf_f32m4_tumu(__VA_ARGS__)
19323
#define vfwsub_wv_f32m4_m(...) __riscv_vfwsub_wv_f32m4_tumu(__VA_ARGS__)
19324
#define vfwsub_wf_f32m4_m(...) __riscv_vfwsub_wf_f32m4_tumu(__VA_ARGS__)
19325
#define vfwsub_vv_f32m8_m(...) __riscv_vfwsub_vv_f32m8_tumu(__VA_ARGS__)
19326
#define vfwsub_vf_f32m8_m(...) __riscv_vfwsub_vf_f32m8_tumu(__VA_ARGS__)
19327
#define vfwsub_wv_f32m8_m(...) __riscv_vfwsub_wv_f32m8_tumu(__VA_ARGS__)
19328
#define vfwsub_wf_f32m8_m(...) __riscv_vfwsub_wf_f32m8_tumu(__VA_ARGS__)
19329
#define vfwsub_vv_f64m1_m(...) __riscv_vfwsub_vv_f64m1_tumu(__VA_ARGS__)
19330
#define vfwsub_vf_f64m1_m(...) __riscv_vfwsub_vf_f64m1_tumu(__VA_ARGS__)
19331
#define vfwsub_wv_f64m1_m(...) __riscv_vfwsub_wv_f64m1_tumu(__VA_ARGS__)
19332
#define vfwsub_wf_f64m1_m(...) __riscv_vfwsub_wf_f64m1_tumu(__VA_ARGS__)
19333
#define vfwsub_vv_f64m2_m(...) __riscv_vfwsub_vv_f64m2_tumu(__VA_ARGS__)
19334
#define vfwsub_vf_f64m2_m(...) __riscv_vfwsub_vf_f64m2_tumu(__VA_ARGS__)
19335
#define vfwsub_wv_f64m2_m(...) __riscv_vfwsub_wv_f64m2_tumu(__VA_ARGS__)
19336
#define vfwsub_wf_f64m2_m(...) __riscv_vfwsub_wf_f64m2_tumu(__VA_ARGS__)
19337
#define vfwsub_vv_f64m4_m(...) __riscv_vfwsub_vv_f64m4_tumu(__VA_ARGS__)
19338
#define vfwsub_vf_f64m4_m(...) __riscv_vfwsub_vf_f64m4_tumu(__VA_ARGS__)
19339
#define vfwsub_wv_f64m4_m(...) __riscv_vfwsub_wv_f64m4_tumu(__VA_ARGS__)
19340
#define vfwsub_wf_f64m4_m(...) __riscv_vfwsub_wf_f64m4_tumu(__VA_ARGS__)
19341
#define vfwsub_vv_f64m8_m(...) __riscv_vfwsub_vv_f64m8_tumu(__VA_ARGS__)
19342
#define vfwsub_vf_f64m8_m(...) __riscv_vfwsub_vf_f64m8_tumu(__VA_ARGS__)
19343
#define vfwsub_wv_f64m8_m(...) __riscv_vfwsub_wv_f64m8_tumu(__VA_ARGS__)
19344
#define vfwsub_wf_f64m8_m(...) __riscv_vfwsub_wf_f64m8_tumu(__VA_ARGS__)
19345
#define vfmul_vv_f16mf4(...) __riscv_vfmul_vv_f16mf4(__VA_ARGS__)
19346
#define vfmul_vf_f16mf4(...) __riscv_vfmul_vf_f16mf4(__VA_ARGS__)
19347
#define vfmul_vv_f16mf2(...) __riscv_vfmul_vv_f16mf2(__VA_ARGS__)
19348
#define vfmul_vf_f16mf2(...) __riscv_vfmul_vf_f16mf2(__VA_ARGS__)
19349
#define vfmul_vv_f16m1(...) __riscv_vfmul_vv_f16m1(__VA_ARGS__)
19350
#define vfmul_vf_f16m1(...) __riscv_vfmul_vf_f16m1(__VA_ARGS__)
19351
#define vfmul_vv_f16m2(...) __riscv_vfmul_vv_f16m2(__VA_ARGS__)
19352
#define vfmul_vf_f16m2(...) __riscv_vfmul_vf_f16m2(__VA_ARGS__)
19353
#define vfmul_vv_f16m4(...) __riscv_vfmul_vv_f16m4(__VA_ARGS__)
19354
#define vfmul_vf_f16m4(...) __riscv_vfmul_vf_f16m4(__VA_ARGS__)
19355
#define vfmul_vv_f16m8(...) __riscv_vfmul_vv_f16m8(__VA_ARGS__)
19356
#define vfmul_vf_f16m8(...) __riscv_vfmul_vf_f16m8(__VA_ARGS__)
19357
#define vfmul_vv_f32mf2(...) __riscv_vfmul_vv_f32mf2(__VA_ARGS__)
19358
#define vfmul_vf_f32mf2(...) __riscv_vfmul_vf_f32mf2(__VA_ARGS__)
19359
#define vfmul_vv_f32m1(...) __riscv_vfmul_vv_f32m1(__VA_ARGS__)
19360
#define vfmul_vf_f32m1(...) __riscv_vfmul_vf_f32m1(__VA_ARGS__)
19361
#define vfmul_vv_f32m2(...) __riscv_vfmul_vv_f32m2(__VA_ARGS__)
19362
#define vfmul_vf_f32m2(...) __riscv_vfmul_vf_f32m2(__VA_ARGS__)
19363
#define vfmul_vv_f32m4(...) __riscv_vfmul_vv_f32m4(__VA_ARGS__)
19364
#define vfmul_vf_f32m4(...) __riscv_vfmul_vf_f32m4(__VA_ARGS__)
19365
#define vfmul_vv_f32m8(...) __riscv_vfmul_vv_f32m8(__VA_ARGS__)
19366
#define vfmul_vf_f32m8(...) __riscv_vfmul_vf_f32m8(__VA_ARGS__)
19367
#define vfmul_vv_f64m1(...) __riscv_vfmul_vv_f64m1(__VA_ARGS__)
19368
#define vfmul_vf_f64m1(...) __riscv_vfmul_vf_f64m1(__VA_ARGS__)
19369
#define vfmul_vv_f64m2(...) __riscv_vfmul_vv_f64m2(__VA_ARGS__)
19370
#define vfmul_vf_f64m2(...) __riscv_vfmul_vf_f64m2(__VA_ARGS__)
19371
#define vfmul_vv_f64m4(...) __riscv_vfmul_vv_f64m4(__VA_ARGS__)
19372
#define vfmul_vf_f64m4(...) __riscv_vfmul_vf_f64m4(__VA_ARGS__)
19373
#define vfmul_vv_f64m8(...) __riscv_vfmul_vv_f64m8(__VA_ARGS__)
19374
#define vfmul_vf_f64m8(...) __riscv_vfmul_vf_f64m8(__VA_ARGS__)
19375
#define vfdiv_vv_f16mf4(...) __riscv_vfdiv_vv_f16mf4(__VA_ARGS__)
19376
#define vfdiv_vf_f16mf4(...) __riscv_vfdiv_vf_f16mf4(__VA_ARGS__)
19377
#define vfdiv_vv_f16mf2(...) __riscv_vfdiv_vv_f16mf2(__VA_ARGS__)
19378
#define vfdiv_vf_f16mf2(...) __riscv_vfdiv_vf_f16mf2(__VA_ARGS__)
19379
#define vfdiv_vv_f16m1(...) __riscv_vfdiv_vv_f16m1(__VA_ARGS__)
19380
#define vfdiv_vf_f16m1(...) __riscv_vfdiv_vf_f16m1(__VA_ARGS__)
19381
#define vfdiv_vv_f16m2(...) __riscv_vfdiv_vv_f16m2(__VA_ARGS__)
19382
#define vfdiv_vf_f16m2(...) __riscv_vfdiv_vf_f16m2(__VA_ARGS__)
19383
#define vfdiv_vv_f16m4(...) __riscv_vfdiv_vv_f16m4(__VA_ARGS__)
19384
#define vfdiv_vf_f16m4(...) __riscv_vfdiv_vf_f16m4(__VA_ARGS__)
19385
#define vfdiv_vv_f16m8(...) __riscv_vfdiv_vv_f16m8(__VA_ARGS__)
19386
#define vfdiv_vf_f16m8(...) __riscv_vfdiv_vf_f16m8(__VA_ARGS__)
19387
#define vfdiv_vv_f32mf2(...) __riscv_vfdiv_vv_f32mf2(__VA_ARGS__)
19388
#define vfdiv_vf_f32mf2(...) __riscv_vfdiv_vf_f32mf2(__VA_ARGS__)
19389
#define vfdiv_vv_f32m1(...) __riscv_vfdiv_vv_f32m1(__VA_ARGS__)
19390
#define vfdiv_vf_f32m1(...) __riscv_vfdiv_vf_f32m1(__VA_ARGS__)
19391
#define vfdiv_vv_f32m2(...) __riscv_vfdiv_vv_f32m2(__VA_ARGS__)
19392
#define vfdiv_vf_f32m2(...) __riscv_vfdiv_vf_f32m2(__VA_ARGS__)
19393
#define vfdiv_vv_f32m4(...) __riscv_vfdiv_vv_f32m4(__VA_ARGS__)
19394
#define vfdiv_vf_f32m4(...) __riscv_vfdiv_vf_f32m4(__VA_ARGS__)
19395
#define vfdiv_vv_f32m8(...) __riscv_vfdiv_vv_f32m8(__VA_ARGS__)
19396
#define vfdiv_vf_f32m8(...) __riscv_vfdiv_vf_f32m8(__VA_ARGS__)
19397
#define vfdiv_vv_f64m1(...) __riscv_vfdiv_vv_f64m1(__VA_ARGS__)
19398
#define vfdiv_vf_f64m1(...) __riscv_vfdiv_vf_f64m1(__VA_ARGS__)
19399
#define vfdiv_vv_f64m2(...) __riscv_vfdiv_vv_f64m2(__VA_ARGS__)
19400
#define vfdiv_vf_f64m2(...) __riscv_vfdiv_vf_f64m2(__VA_ARGS__)
19401
#define vfdiv_vv_f64m4(...) __riscv_vfdiv_vv_f64m4(__VA_ARGS__)
19402
#define vfdiv_vf_f64m4(...) __riscv_vfdiv_vf_f64m4(__VA_ARGS__)
19403
#define vfdiv_vv_f64m8(...) __riscv_vfdiv_vv_f64m8(__VA_ARGS__)
19404
#define vfdiv_vf_f64m8(...) __riscv_vfdiv_vf_f64m8(__VA_ARGS__)
19405
#define vfrdiv_vf_f16mf4(...) __riscv_vfrdiv_vf_f16mf4(__VA_ARGS__)
19406
#define vfrdiv_vf_f16mf2(...) __riscv_vfrdiv_vf_f16mf2(__VA_ARGS__)
19407
#define vfrdiv_vf_f16m1(...) __riscv_vfrdiv_vf_f16m1(__VA_ARGS__)
19408
#define vfrdiv_vf_f16m2(...) __riscv_vfrdiv_vf_f16m2(__VA_ARGS__)
19409
#define vfrdiv_vf_f16m4(...) __riscv_vfrdiv_vf_f16m4(__VA_ARGS__)
19410
#define vfrdiv_vf_f16m8(...) __riscv_vfrdiv_vf_f16m8(__VA_ARGS__)
19411
#define vfrdiv_vf_f32mf2(...) __riscv_vfrdiv_vf_f32mf2(__VA_ARGS__)
19412
#define vfrdiv_vf_f32m1(...) __riscv_vfrdiv_vf_f32m1(__VA_ARGS__)
19413
#define vfrdiv_vf_f32m2(...) __riscv_vfrdiv_vf_f32m2(__VA_ARGS__)
19414
#define vfrdiv_vf_f32m4(...) __riscv_vfrdiv_vf_f32m4(__VA_ARGS__)
19415
#define vfrdiv_vf_f32m8(...) __riscv_vfrdiv_vf_f32m8(__VA_ARGS__)
19416
#define vfrdiv_vf_f64m1(...) __riscv_vfrdiv_vf_f64m1(__VA_ARGS__)
19417
#define vfrdiv_vf_f64m2(...) __riscv_vfrdiv_vf_f64m2(__VA_ARGS__)
19418
#define vfrdiv_vf_f64m4(...) __riscv_vfrdiv_vf_f64m4(__VA_ARGS__)
19419
#define vfrdiv_vf_f64m8(...) __riscv_vfrdiv_vf_f64m8(__VA_ARGS__)
19420
// masked functions
19421
#define vfmul_vv_f16mf4_m(...) __riscv_vfmul_vv_f16mf4_tumu(__VA_ARGS__)
19422
#define vfmul_vf_f16mf4_m(...) __riscv_vfmul_vf_f16mf4_tumu(__VA_ARGS__)
19423
#define vfmul_vv_f16mf2_m(...) __riscv_vfmul_vv_f16mf2_tumu(__VA_ARGS__)
19424
#define vfmul_vf_f16mf2_m(...) __riscv_vfmul_vf_f16mf2_tumu(__VA_ARGS__)
19425
#define vfmul_vv_f16m1_m(...) __riscv_vfmul_vv_f16m1_tumu(__VA_ARGS__)
19426
#define vfmul_vf_f16m1_m(...) __riscv_vfmul_vf_f16m1_tumu(__VA_ARGS__)
19427
#define vfmul_vv_f16m2_m(...) __riscv_vfmul_vv_f16m2_tumu(__VA_ARGS__)
19428
#define vfmul_vf_f16m2_m(...) __riscv_vfmul_vf_f16m2_tumu(__VA_ARGS__)
19429
#define vfmul_vv_f16m4_m(...) __riscv_vfmul_vv_f16m4_tumu(__VA_ARGS__)
19430
#define vfmul_vf_f16m4_m(...) __riscv_vfmul_vf_f16m4_tumu(__VA_ARGS__)
19431
#define vfmul_vv_f16m8_m(...) __riscv_vfmul_vv_f16m8_tumu(__VA_ARGS__)
19432
#define vfmul_vf_f16m8_m(...) __riscv_vfmul_vf_f16m8_tumu(__VA_ARGS__)
19433
#define vfmul_vv_f32mf2_m(...) __riscv_vfmul_vv_f32mf2_tumu(__VA_ARGS__)
19434
#define vfmul_vf_f32mf2_m(...) __riscv_vfmul_vf_f32mf2_tumu(__VA_ARGS__)
19435
#define vfmul_vv_f32m1_m(...) __riscv_vfmul_vv_f32m1_tumu(__VA_ARGS__)
19436
#define vfmul_vf_f32m1_m(...) __riscv_vfmul_vf_f32m1_tumu(__VA_ARGS__)
19437
#define vfmul_vv_f32m2_m(...) __riscv_vfmul_vv_f32m2_tumu(__VA_ARGS__)
19438
#define vfmul_vf_f32m2_m(...) __riscv_vfmul_vf_f32m2_tumu(__VA_ARGS__)
19439
#define vfmul_vv_f32m4_m(...) __riscv_vfmul_vv_f32m4_tumu(__VA_ARGS__)
19440
#define vfmul_vf_f32m4_m(...) __riscv_vfmul_vf_f32m4_tumu(__VA_ARGS__)
19441
#define vfmul_vv_f32m8_m(...) __riscv_vfmul_vv_f32m8_tumu(__VA_ARGS__)
19442
#define vfmul_vf_f32m8_m(...) __riscv_vfmul_vf_f32m8_tumu(__VA_ARGS__)
19443
#define vfmul_vv_f64m1_m(...) __riscv_vfmul_vv_f64m1_tumu(__VA_ARGS__)
19444
#define vfmul_vf_f64m1_m(...) __riscv_vfmul_vf_f64m1_tumu(__VA_ARGS__)
19445
#define vfmul_vv_f64m2_m(...) __riscv_vfmul_vv_f64m2_tumu(__VA_ARGS__)
19446
#define vfmul_vf_f64m2_m(...) __riscv_vfmul_vf_f64m2_tumu(__VA_ARGS__)
19447
#define vfmul_vv_f64m4_m(...) __riscv_vfmul_vv_f64m4_tumu(__VA_ARGS__)
19448
#define vfmul_vf_f64m4_m(...) __riscv_vfmul_vf_f64m4_tumu(__VA_ARGS__)
19449
#define vfmul_vv_f64m8_m(...) __riscv_vfmul_vv_f64m8_tumu(__VA_ARGS__)
19450
#define vfmul_vf_f64m8_m(...) __riscv_vfmul_vf_f64m8_tumu(__VA_ARGS__)
19451
#define vfdiv_vv_f16mf4_m(...) __riscv_vfdiv_vv_f16mf4_tumu(__VA_ARGS__)
19452
#define vfdiv_vf_f16mf4_m(...) __riscv_vfdiv_vf_f16mf4_tumu(__VA_ARGS__)
19453
#define vfdiv_vv_f16mf2_m(...) __riscv_vfdiv_vv_f16mf2_tumu(__VA_ARGS__)
19454
#define vfdiv_vf_f16mf2_m(...) __riscv_vfdiv_vf_f16mf2_tumu(__VA_ARGS__)
19455
#define vfdiv_vv_f16m1_m(...) __riscv_vfdiv_vv_f16m1_tumu(__VA_ARGS__)
19456
#define vfdiv_vf_f16m1_m(...) __riscv_vfdiv_vf_f16m1_tumu(__VA_ARGS__)
19457
#define vfdiv_vv_f16m2_m(...) __riscv_vfdiv_vv_f16m2_tumu(__VA_ARGS__)
19458
#define vfdiv_vf_f16m2_m(...) __riscv_vfdiv_vf_f16m2_tumu(__VA_ARGS__)
19459
#define vfdiv_vv_f16m4_m(...) __riscv_vfdiv_vv_f16m4_tumu(__VA_ARGS__)
19460
#define vfdiv_vf_f16m4_m(...) __riscv_vfdiv_vf_f16m4_tumu(__VA_ARGS__)
19461
#define vfdiv_vv_f16m8_m(...) __riscv_vfdiv_vv_f16m8_tumu(__VA_ARGS__)
19462
#define vfdiv_vf_f16m8_m(...) __riscv_vfdiv_vf_f16m8_tumu(__VA_ARGS__)
19463
#define vfdiv_vv_f32mf2_m(...) __riscv_vfdiv_vv_f32mf2_tumu(__VA_ARGS__)
19464
#define vfdiv_vf_f32mf2_m(...) __riscv_vfdiv_vf_f32mf2_tumu(__VA_ARGS__)
19465
#define vfdiv_vv_f32m1_m(...) __riscv_vfdiv_vv_f32m1_tumu(__VA_ARGS__)
19466
#define vfdiv_vf_f32m1_m(...) __riscv_vfdiv_vf_f32m1_tumu(__VA_ARGS__)
19467
#define vfdiv_vv_f32m2_m(...) __riscv_vfdiv_vv_f32m2_tumu(__VA_ARGS__)
19468
#define vfdiv_vf_f32m2_m(...) __riscv_vfdiv_vf_f32m2_tumu(__VA_ARGS__)
19469
#define vfdiv_vv_f32m4_m(...) __riscv_vfdiv_vv_f32m4_tumu(__VA_ARGS__)
19470
#define vfdiv_vf_f32m4_m(...) __riscv_vfdiv_vf_f32m4_tumu(__VA_ARGS__)
19471
#define vfdiv_vv_f32m8_m(...) __riscv_vfdiv_vv_f32m8_tumu(__VA_ARGS__)
19472
#define vfdiv_vf_f32m8_m(...) __riscv_vfdiv_vf_f32m8_tumu(__VA_ARGS__)
19473
#define vfdiv_vv_f64m1_m(...) __riscv_vfdiv_vv_f64m1_tumu(__VA_ARGS__)
19474
#define vfdiv_vf_f64m1_m(...) __riscv_vfdiv_vf_f64m1_tumu(__VA_ARGS__)
19475
#define vfdiv_vv_f64m2_m(...) __riscv_vfdiv_vv_f64m2_tumu(__VA_ARGS__)
19476
#define vfdiv_vf_f64m2_m(...) __riscv_vfdiv_vf_f64m2_tumu(__VA_ARGS__)
19477
#define vfdiv_vv_f64m4_m(...) __riscv_vfdiv_vv_f64m4_tumu(__VA_ARGS__)
19478
#define vfdiv_vf_f64m4_m(...) __riscv_vfdiv_vf_f64m4_tumu(__VA_ARGS__)
19479
#define vfdiv_vv_f64m8_m(...) __riscv_vfdiv_vv_f64m8_tumu(__VA_ARGS__)
19480
#define vfdiv_vf_f64m8_m(...) __riscv_vfdiv_vf_f64m8_tumu(__VA_ARGS__)
19481
#define vfrdiv_vf_f16mf4_m(...) __riscv_vfrdiv_vf_f16mf4_tumu(__VA_ARGS__)
19482
#define vfrdiv_vf_f16mf2_m(...) __riscv_vfrdiv_vf_f16mf2_tumu(__VA_ARGS__)
19483
#define vfrdiv_vf_f16m1_m(...) __riscv_vfrdiv_vf_f16m1_tumu(__VA_ARGS__)
19484
#define vfrdiv_vf_f16m2_m(...) __riscv_vfrdiv_vf_f16m2_tumu(__VA_ARGS__)
19485
#define vfrdiv_vf_f16m4_m(...) __riscv_vfrdiv_vf_f16m4_tumu(__VA_ARGS__)
19486
#define vfrdiv_vf_f16m8_m(...) __riscv_vfrdiv_vf_f16m8_tumu(__VA_ARGS__)
19487
#define vfrdiv_vf_f32mf2_m(...) __riscv_vfrdiv_vf_f32mf2_tumu(__VA_ARGS__)
19488
#define vfrdiv_vf_f32m1_m(...) __riscv_vfrdiv_vf_f32m1_tumu(__VA_ARGS__)
19489
#define vfrdiv_vf_f32m2_m(...) __riscv_vfrdiv_vf_f32m2_tumu(__VA_ARGS__)
19490
#define vfrdiv_vf_f32m4_m(...) __riscv_vfrdiv_vf_f32m4_tumu(__VA_ARGS__)
19491
#define vfrdiv_vf_f32m8_m(...) __riscv_vfrdiv_vf_f32m8_tumu(__VA_ARGS__)
19492
#define vfrdiv_vf_f64m1_m(...) __riscv_vfrdiv_vf_f64m1_tumu(__VA_ARGS__)
19493
#define vfrdiv_vf_f64m2_m(...) __riscv_vfrdiv_vf_f64m2_tumu(__VA_ARGS__)
19494
#define vfrdiv_vf_f64m4_m(...) __riscv_vfrdiv_vf_f64m4_tumu(__VA_ARGS__)
19495
#define vfrdiv_vf_f64m8_m(...) __riscv_vfrdiv_vf_f64m8_tumu(__VA_ARGS__)
19496
#define vfwmul_vv_f32mf2(...) __riscv_vfwmul_vv_f32mf2(__VA_ARGS__)
19497
#define vfwmul_vf_f32mf2(...) __riscv_vfwmul_vf_f32mf2(__VA_ARGS__)
19498
#define vfwmul_vv_f32m1(...) __riscv_vfwmul_vv_f32m1(__VA_ARGS__)
19499
#define vfwmul_vf_f32m1(...) __riscv_vfwmul_vf_f32m1(__VA_ARGS__)
19500
#define vfwmul_vv_f32m2(...) __riscv_vfwmul_vv_f32m2(__VA_ARGS__)
19501
#define vfwmul_vf_f32m2(...) __riscv_vfwmul_vf_f32m2(__VA_ARGS__)
19502
#define vfwmul_vv_f32m4(...) __riscv_vfwmul_vv_f32m4(__VA_ARGS__)
19503
#define vfwmul_vf_f32m4(...) __riscv_vfwmul_vf_f32m4(__VA_ARGS__)
19504
#define vfwmul_vv_f32m8(...) __riscv_vfwmul_vv_f32m8(__VA_ARGS__)
19505
#define vfwmul_vf_f32m8(...) __riscv_vfwmul_vf_f32m8(__VA_ARGS__)
19506
#define vfwmul_vv_f64m1(...) __riscv_vfwmul_vv_f64m1(__VA_ARGS__)
19507
#define vfwmul_vf_f64m1(...) __riscv_vfwmul_vf_f64m1(__VA_ARGS__)
19508
#define vfwmul_vv_f64m2(...) __riscv_vfwmul_vv_f64m2(__VA_ARGS__)
19509
#define vfwmul_vf_f64m2(...) __riscv_vfwmul_vf_f64m2(__VA_ARGS__)
19510
#define vfwmul_vv_f64m4(...) __riscv_vfwmul_vv_f64m4(__VA_ARGS__)
19511
#define vfwmul_vf_f64m4(...) __riscv_vfwmul_vf_f64m4(__VA_ARGS__)
19512
#define vfwmul_vv_f64m8(...) __riscv_vfwmul_vv_f64m8(__VA_ARGS__)
19513
#define vfwmul_vf_f64m8(...) __riscv_vfwmul_vf_f64m8(__VA_ARGS__)
19514
// masked functions
19515
#define vfwmul_vv_f32mf2_m(...) __riscv_vfwmul_vv_f32mf2_tumu(__VA_ARGS__)
19516
#define vfwmul_vf_f32mf2_m(...) __riscv_vfwmul_vf_f32mf2_tumu(__VA_ARGS__)
19517
#define vfwmul_vv_f32m1_m(...) __riscv_vfwmul_vv_f32m1_tumu(__VA_ARGS__)
19518
#define vfwmul_vf_f32m1_m(...) __riscv_vfwmul_vf_f32m1_tumu(__VA_ARGS__)
19519
#define vfwmul_vv_f32m2_m(...) __riscv_vfwmul_vv_f32m2_tumu(__VA_ARGS__)
19520
#define vfwmul_vf_f32m2_m(...) __riscv_vfwmul_vf_f32m2_tumu(__VA_ARGS__)
19521
#define vfwmul_vv_f32m4_m(...) __riscv_vfwmul_vv_f32m4_tumu(__VA_ARGS__)
19522
#define vfwmul_vf_f32m4_m(...) __riscv_vfwmul_vf_f32m4_tumu(__VA_ARGS__)
19523
#define vfwmul_vv_f32m8_m(...) __riscv_vfwmul_vv_f32m8_tumu(__VA_ARGS__)
19524
#define vfwmul_vf_f32m8_m(...) __riscv_vfwmul_vf_f32m8_tumu(__VA_ARGS__)
19525
#define vfwmul_vv_f64m1_m(...) __riscv_vfwmul_vv_f64m1_tumu(__VA_ARGS__)
19526
#define vfwmul_vf_f64m1_m(...) __riscv_vfwmul_vf_f64m1_tumu(__VA_ARGS__)
19527
#define vfwmul_vv_f64m2_m(...) __riscv_vfwmul_vv_f64m2_tumu(__VA_ARGS__)
19528
#define vfwmul_vf_f64m2_m(...) __riscv_vfwmul_vf_f64m2_tumu(__VA_ARGS__)
19529
#define vfwmul_vv_f64m4_m(...) __riscv_vfwmul_vv_f64m4_tumu(__VA_ARGS__)
19530
#define vfwmul_vf_f64m4_m(...) __riscv_vfwmul_vf_f64m4_tumu(__VA_ARGS__)
19531
#define vfwmul_vv_f64m8_m(...) __riscv_vfwmul_vv_f64m8_tumu(__VA_ARGS__)
19532
#define vfwmul_vf_f64m8_m(...) __riscv_vfwmul_vf_f64m8_tumu(__VA_ARGS__)
19533
#define vfmacc_vv_f16mf4(...) __riscv_vfmacc_vv_f16mf4_tu(__VA_ARGS__)
19534
#define vfmacc_vf_f16mf4(...) __riscv_vfmacc_vf_f16mf4_tu(__VA_ARGS__)
19535
#define vfmacc_vv_f16mf2(...) __riscv_vfmacc_vv_f16mf2_tu(__VA_ARGS__)
19536
#define vfmacc_vf_f16mf2(...) __riscv_vfmacc_vf_f16mf2_tu(__VA_ARGS__)
19537
#define vfmacc_vv_f16m1(...) __riscv_vfmacc_vv_f16m1_tu(__VA_ARGS__)
19538
#define vfmacc_vf_f16m1(...) __riscv_vfmacc_vf_f16m1_tu(__VA_ARGS__)
19539
#define vfmacc_vv_f16m2(...) __riscv_vfmacc_vv_f16m2_tu(__VA_ARGS__)
19540
#define vfmacc_vf_f16m2(...) __riscv_vfmacc_vf_f16m2_tu(__VA_ARGS__)
19541
#define vfmacc_vv_f16m4(...) __riscv_vfmacc_vv_f16m4_tu(__VA_ARGS__)
19542
#define vfmacc_vf_f16m4(...) __riscv_vfmacc_vf_f16m4_tu(__VA_ARGS__)
19543
#define vfmacc_vv_f16m8(...) __riscv_vfmacc_vv_f16m8_tu(__VA_ARGS__)
19544
#define vfmacc_vf_f16m8(...) __riscv_vfmacc_vf_f16m8_tu(__VA_ARGS__)
19545
#define vfmacc_vv_f32mf2(...) __riscv_vfmacc_vv_f32mf2_tu(__VA_ARGS__)
19546
#define vfmacc_vf_f32mf2(...) __riscv_vfmacc_vf_f32mf2_tu(__VA_ARGS__)
19547
#define vfmacc_vv_f32m1(...) __riscv_vfmacc_vv_f32m1_tu(__VA_ARGS__)
19548
#define vfmacc_vf_f32m1(...) __riscv_vfmacc_vf_f32m1_tu(__VA_ARGS__)
19549
#define vfmacc_vv_f32m2(...) __riscv_vfmacc_vv_f32m2_tu(__VA_ARGS__)
19550
#define vfmacc_vf_f32m2(...) __riscv_vfmacc_vf_f32m2_tu(__VA_ARGS__)
19551
#define vfmacc_vv_f32m4(...) __riscv_vfmacc_vv_f32m4_tu(__VA_ARGS__)
19552
#define vfmacc_vf_f32m4(...) __riscv_vfmacc_vf_f32m4_tu(__VA_ARGS__)
19553
#define vfmacc_vv_f32m8(...) __riscv_vfmacc_vv_f32m8_tu(__VA_ARGS__)
19554
#define vfmacc_vf_f32m8(...) __riscv_vfmacc_vf_f32m8_tu(__VA_ARGS__)
19555
#define vfmacc_vv_f64m1(...) __riscv_vfmacc_vv_f64m1_tu(__VA_ARGS__)
19556
#define vfmacc_vf_f64m1(...) __riscv_vfmacc_vf_f64m1_tu(__VA_ARGS__)
19557
#define vfmacc_vv_f64m2(...) __riscv_vfmacc_vv_f64m2_tu(__VA_ARGS__)
19558
#define vfmacc_vf_f64m2(...) __riscv_vfmacc_vf_f64m2_tu(__VA_ARGS__)
19559
#define vfmacc_vv_f64m4(...) __riscv_vfmacc_vv_f64m4_tu(__VA_ARGS__)
19560
#define vfmacc_vf_f64m4(...) __riscv_vfmacc_vf_f64m4_tu(__VA_ARGS__)
19561
#define vfmacc_vv_f64m8(...) __riscv_vfmacc_vv_f64m8_tu(__VA_ARGS__)
19562
#define vfmacc_vf_f64m8(...) __riscv_vfmacc_vf_f64m8_tu(__VA_ARGS__)
19563
#define vfnmacc_vv_f16mf4(...) __riscv_vfnmacc_vv_f16mf4_tu(__VA_ARGS__)
19564
#define vfnmacc_vf_f16mf4(...) __riscv_vfnmacc_vf_f16mf4_tu(__VA_ARGS__)
19565
#define vfnmacc_vv_f16mf2(...) __riscv_vfnmacc_vv_f16mf2_tu(__VA_ARGS__)
19566
#define vfnmacc_vf_f16mf2(...) __riscv_vfnmacc_vf_f16mf2_tu(__VA_ARGS__)
19567
#define vfnmacc_vv_f16m1(...) __riscv_vfnmacc_vv_f16m1_tu(__VA_ARGS__)
19568
#define vfnmacc_vf_f16m1(...) __riscv_vfnmacc_vf_f16m1_tu(__VA_ARGS__)
19569
#define vfnmacc_vv_f16m2(...) __riscv_vfnmacc_vv_f16m2_tu(__VA_ARGS__)
19570
#define vfnmacc_vf_f16m2(...) __riscv_vfnmacc_vf_f16m2_tu(__VA_ARGS__)
19571
#define vfnmacc_vv_f16m4(...) __riscv_vfnmacc_vv_f16m4_tu(__VA_ARGS__)
19572
#define vfnmacc_vf_f16m4(...) __riscv_vfnmacc_vf_f16m4_tu(__VA_ARGS__)
19573
#define vfnmacc_vv_f16m8(...) __riscv_vfnmacc_vv_f16m8_tu(__VA_ARGS__)
19574
#define vfnmacc_vf_f16m8(...) __riscv_vfnmacc_vf_f16m8_tu(__VA_ARGS__)
19575
#define vfnmacc_vv_f32mf2(...) __riscv_vfnmacc_vv_f32mf2_tu(__VA_ARGS__)
19576
#define vfnmacc_vf_f32mf2(...) __riscv_vfnmacc_vf_f32mf2_tu(__VA_ARGS__)
19577
#define vfnmacc_vv_f32m1(...) __riscv_vfnmacc_vv_f32m1_tu(__VA_ARGS__)
19578
#define vfnmacc_vf_f32m1(...) __riscv_vfnmacc_vf_f32m1_tu(__VA_ARGS__)
19579
#define vfnmacc_vv_f32m2(...) __riscv_vfnmacc_vv_f32m2_tu(__VA_ARGS__)
19580
#define vfnmacc_vf_f32m2(...) __riscv_vfnmacc_vf_f32m2_tu(__VA_ARGS__)
19581
#define vfnmacc_vv_f32m4(...) __riscv_vfnmacc_vv_f32m4_tu(__VA_ARGS__)
19582
#define vfnmacc_vf_f32m4(...) __riscv_vfnmacc_vf_f32m4_tu(__VA_ARGS__)
19583
#define vfnmacc_vv_f32m8(...) __riscv_vfnmacc_vv_f32m8_tu(__VA_ARGS__)
19584
#define vfnmacc_vf_f32m8(...) __riscv_vfnmacc_vf_f32m8_tu(__VA_ARGS__)
19585
#define vfnmacc_vv_f64m1(...) __riscv_vfnmacc_vv_f64m1_tu(__VA_ARGS__)
19586
#define vfnmacc_vf_f64m1(...) __riscv_vfnmacc_vf_f64m1_tu(__VA_ARGS__)
19587
#define vfnmacc_vv_f64m2(...) __riscv_vfnmacc_vv_f64m2_tu(__VA_ARGS__)
19588
#define vfnmacc_vf_f64m2(...) __riscv_vfnmacc_vf_f64m2_tu(__VA_ARGS__)
19589
#define vfnmacc_vv_f64m4(...) __riscv_vfnmacc_vv_f64m4_tu(__VA_ARGS__)
19590
#define vfnmacc_vf_f64m4(...) __riscv_vfnmacc_vf_f64m4_tu(__VA_ARGS__)
19591
#define vfnmacc_vv_f64m8(...) __riscv_vfnmacc_vv_f64m8_tu(__VA_ARGS__)
19592
#define vfnmacc_vf_f64m8(...) __riscv_vfnmacc_vf_f64m8_tu(__VA_ARGS__)
19593
#define vfmsac_vv_f16mf4(...) __riscv_vfmsac_vv_f16mf4_tu(__VA_ARGS__)
19594
#define vfmsac_vf_f16mf4(...) __riscv_vfmsac_vf_f16mf4_tu(__VA_ARGS__)
19595
#define vfmsac_vv_f16mf2(...) __riscv_vfmsac_vv_f16mf2_tu(__VA_ARGS__)
19596
#define vfmsac_vf_f16mf2(...) __riscv_vfmsac_vf_f16mf2_tu(__VA_ARGS__)
19597
#define vfmsac_vv_f16m1(...) __riscv_vfmsac_vv_f16m1_tu(__VA_ARGS__)
19598
#define vfmsac_vf_f16m1(...) __riscv_vfmsac_vf_f16m1_tu(__VA_ARGS__)
19599
#define vfmsac_vv_f16m2(...) __riscv_vfmsac_vv_f16m2_tu(__VA_ARGS__)
19600
#define vfmsac_vf_f16m2(...) __riscv_vfmsac_vf_f16m2_tu(__VA_ARGS__)
19601
#define vfmsac_vv_f16m4(...) __riscv_vfmsac_vv_f16m4_tu(__VA_ARGS__)
19602
#define vfmsac_vf_f16m4(...) __riscv_vfmsac_vf_f16m4_tu(__VA_ARGS__)
19603
#define vfmsac_vv_f16m8(...) __riscv_vfmsac_vv_f16m8_tu(__VA_ARGS__)
19604
#define vfmsac_vf_f16m8(...) __riscv_vfmsac_vf_f16m8_tu(__VA_ARGS__)
19605
#define vfmsac_vv_f32mf2(...) __riscv_vfmsac_vv_f32mf2_tu(__VA_ARGS__)
19606
#define vfmsac_vf_f32mf2(...) __riscv_vfmsac_vf_f32mf2_tu(__VA_ARGS__)
19607
#define vfmsac_vv_f32m1(...) __riscv_vfmsac_vv_f32m1_tu(__VA_ARGS__)
19608
#define vfmsac_vf_f32m1(...) __riscv_vfmsac_vf_f32m1_tu(__VA_ARGS__)
19609
#define vfmsac_vv_f32m2(...) __riscv_vfmsac_vv_f32m2_tu(__VA_ARGS__)
19610
#define vfmsac_vf_f32m2(...) __riscv_vfmsac_vf_f32m2_tu(__VA_ARGS__)
19611
#define vfmsac_vv_f32m4(...) __riscv_vfmsac_vv_f32m4_tu(__VA_ARGS__)
19612
#define vfmsac_vf_f32m4(...) __riscv_vfmsac_vf_f32m4_tu(__VA_ARGS__)
19613
#define vfmsac_vv_f32m8(...) __riscv_vfmsac_vv_f32m8_tu(__VA_ARGS__)
19614
#define vfmsac_vf_f32m8(...) __riscv_vfmsac_vf_f32m8_tu(__VA_ARGS__)
19615
#define vfmsac_vv_f64m1(...) __riscv_vfmsac_vv_f64m1_tu(__VA_ARGS__)
19616
#define vfmsac_vf_f64m1(...) __riscv_vfmsac_vf_f64m1_tu(__VA_ARGS__)
19617
#define vfmsac_vv_f64m2(...) __riscv_vfmsac_vv_f64m2_tu(__VA_ARGS__)
19618
#define vfmsac_vf_f64m2(...) __riscv_vfmsac_vf_f64m2_tu(__VA_ARGS__)
19619
#define vfmsac_vv_f64m4(...) __riscv_vfmsac_vv_f64m4_tu(__VA_ARGS__)
19620
#define vfmsac_vf_f64m4(...) __riscv_vfmsac_vf_f64m4_tu(__VA_ARGS__)
19621
#define vfmsac_vv_f64m8(...) __riscv_vfmsac_vv_f64m8_tu(__VA_ARGS__)
19622
#define vfmsac_vf_f64m8(...) __riscv_vfmsac_vf_f64m8_tu(__VA_ARGS__)
19623
#define vfnmsac_vv_f16mf4(...) __riscv_vfnmsac_vv_f16mf4_tu(__VA_ARGS__)
19624
#define vfnmsac_vf_f16mf4(...) __riscv_vfnmsac_vf_f16mf4_tu(__VA_ARGS__)
19625
#define vfnmsac_vv_f16mf2(...) __riscv_vfnmsac_vv_f16mf2_tu(__VA_ARGS__)
19626
#define vfnmsac_vf_f16mf2(...) __riscv_vfnmsac_vf_f16mf2_tu(__VA_ARGS__)
19627
#define vfnmsac_vv_f16m1(...) __riscv_vfnmsac_vv_f16m1_tu(__VA_ARGS__)
19628
#define vfnmsac_vf_f16m1(...) __riscv_vfnmsac_vf_f16m1_tu(__VA_ARGS__)
19629
#define vfnmsac_vv_f16m2(...) __riscv_vfnmsac_vv_f16m2_tu(__VA_ARGS__)
19630
#define vfnmsac_vf_f16m2(...) __riscv_vfnmsac_vf_f16m2_tu(__VA_ARGS__)
19631
#define vfnmsac_vv_f16m4(...) __riscv_vfnmsac_vv_f16m4_tu(__VA_ARGS__)
19632
#define vfnmsac_vf_f16m4(...) __riscv_vfnmsac_vf_f16m4_tu(__VA_ARGS__)
19633
#define vfnmsac_vv_f16m8(...) __riscv_vfnmsac_vv_f16m8_tu(__VA_ARGS__)
19634
#define vfnmsac_vf_f16m8(...) __riscv_vfnmsac_vf_f16m8_tu(__VA_ARGS__)
19635
#define vfnmsac_vv_f32mf2(...) __riscv_vfnmsac_vv_f32mf2_tu(__VA_ARGS__)
19636
#define vfnmsac_vf_f32mf2(...) __riscv_vfnmsac_vf_f32mf2_tu(__VA_ARGS__)
19637
#define vfnmsac_vv_f32m1(...) __riscv_vfnmsac_vv_f32m1_tu(__VA_ARGS__)
19638
#define vfnmsac_vf_f32m1(...) __riscv_vfnmsac_vf_f32m1_tu(__VA_ARGS__)
19639
#define vfnmsac_vv_f32m2(...) __riscv_vfnmsac_vv_f32m2_tu(__VA_ARGS__)
19640
#define vfnmsac_vf_f32m2(...) __riscv_vfnmsac_vf_f32m2_tu(__VA_ARGS__)
19641
#define vfnmsac_vv_f32m4(...) __riscv_vfnmsac_vv_f32m4_tu(__VA_ARGS__)
19642
#define vfnmsac_vf_f32m4(...) __riscv_vfnmsac_vf_f32m4_tu(__VA_ARGS__)
19643
#define vfnmsac_vv_f32m8(...) __riscv_vfnmsac_vv_f32m8_tu(__VA_ARGS__)
19644
#define vfnmsac_vf_f32m8(...) __riscv_vfnmsac_vf_f32m8_tu(__VA_ARGS__)
19645
#define vfnmsac_vv_f64m1(...) __riscv_vfnmsac_vv_f64m1_tu(__VA_ARGS__)
19646
#define vfnmsac_vf_f64m1(...) __riscv_vfnmsac_vf_f64m1_tu(__VA_ARGS__)
19647
#define vfnmsac_vv_f64m2(...) __riscv_vfnmsac_vv_f64m2_tu(__VA_ARGS__)
19648
#define vfnmsac_vf_f64m2(...) __riscv_vfnmsac_vf_f64m2_tu(__VA_ARGS__)
19649
#define vfnmsac_vv_f64m4(...) __riscv_vfnmsac_vv_f64m4_tu(__VA_ARGS__)
19650
#define vfnmsac_vf_f64m4(...) __riscv_vfnmsac_vf_f64m4_tu(__VA_ARGS__)
19651
#define vfnmsac_vv_f64m8(...) __riscv_vfnmsac_vv_f64m8_tu(__VA_ARGS__)
19652
#define vfnmsac_vf_f64m8(...) __riscv_vfnmsac_vf_f64m8_tu(__VA_ARGS__)
19653
#define vfmadd_vv_f16mf4(...) __riscv_vfmadd_vv_f16mf4_tu(__VA_ARGS__)
19654
#define vfmadd_vf_f16mf4(...) __riscv_vfmadd_vf_f16mf4_tu(__VA_ARGS__)
19655
#define vfmadd_vv_f16mf2(...) __riscv_vfmadd_vv_f16mf2_tu(__VA_ARGS__)
19656
#define vfmadd_vf_f16mf2(...) __riscv_vfmadd_vf_f16mf2_tu(__VA_ARGS__)
19657
#define vfmadd_vv_f16m1(...) __riscv_vfmadd_vv_f16m1_tu(__VA_ARGS__)
19658
#define vfmadd_vf_f16m1(...) __riscv_vfmadd_vf_f16m1_tu(__VA_ARGS__)
19659
#define vfmadd_vv_f16m2(...) __riscv_vfmadd_vv_f16m2_tu(__VA_ARGS__)
19660
#define vfmadd_vf_f16m2(...) __riscv_vfmadd_vf_f16m2_tu(__VA_ARGS__)
19661
#define vfmadd_vv_f16m4(...) __riscv_vfmadd_vv_f16m4_tu(__VA_ARGS__)
19662
#define vfmadd_vf_f16m4(...) __riscv_vfmadd_vf_f16m4_tu(__VA_ARGS__)
19663
#define vfmadd_vv_f16m8(...) __riscv_vfmadd_vv_f16m8_tu(__VA_ARGS__)
19664
#define vfmadd_vf_f16m8(...) __riscv_vfmadd_vf_f16m8_tu(__VA_ARGS__)
19665
#define vfmadd_vv_f32mf2(...) __riscv_vfmadd_vv_f32mf2_tu(__VA_ARGS__)
19666
#define vfmadd_vf_f32mf2(...) __riscv_vfmadd_vf_f32mf2_tu(__VA_ARGS__)
19667
#define vfmadd_vv_f32m1(...) __riscv_vfmadd_vv_f32m1_tu(__VA_ARGS__)
19668
#define vfmadd_vf_f32m1(...) __riscv_vfmadd_vf_f32m1_tu(__VA_ARGS__)
19669
#define vfmadd_vv_f32m2(...) __riscv_vfmadd_vv_f32m2_tu(__VA_ARGS__)
19670
#define vfmadd_vf_f32m2(...) __riscv_vfmadd_vf_f32m2_tu(__VA_ARGS__)
19671
#define vfmadd_vv_f32m4(...) __riscv_vfmadd_vv_f32m4_tu(__VA_ARGS__)
19672
#define vfmadd_vf_f32m4(...) __riscv_vfmadd_vf_f32m4_tu(__VA_ARGS__)
19673
#define vfmadd_vv_f32m8(...) __riscv_vfmadd_vv_f32m8_tu(__VA_ARGS__)
19674
#define vfmadd_vf_f32m8(...) __riscv_vfmadd_vf_f32m8_tu(__VA_ARGS__)
19675
#define vfmadd_vv_f64m1(...) __riscv_vfmadd_vv_f64m1_tu(__VA_ARGS__)
19676
#define vfmadd_vf_f64m1(...) __riscv_vfmadd_vf_f64m1_tu(__VA_ARGS__)
19677
#define vfmadd_vv_f64m2(...) __riscv_vfmadd_vv_f64m2_tu(__VA_ARGS__)
19678
#define vfmadd_vf_f64m2(...) __riscv_vfmadd_vf_f64m2_tu(__VA_ARGS__)
19679
#define vfmadd_vv_f64m4(...) __riscv_vfmadd_vv_f64m4_tu(__VA_ARGS__)
19680
#define vfmadd_vf_f64m4(...) __riscv_vfmadd_vf_f64m4_tu(__VA_ARGS__)
19681
#define vfmadd_vv_f64m8(...) __riscv_vfmadd_vv_f64m8_tu(__VA_ARGS__)
19682
#define vfmadd_vf_f64m8(...) __riscv_vfmadd_vf_f64m8_tu(__VA_ARGS__)
19683
#define vfnmadd_vv_f16mf4(...) __riscv_vfnmadd_vv_f16mf4_tu(__VA_ARGS__)
19684
#define vfnmadd_vf_f16mf4(...) __riscv_vfnmadd_vf_f16mf4_tu(__VA_ARGS__)
19685
#define vfnmadd_vv_f16mf2(...) __riscv_vfnmadd_vv_f16mf2_tu(__VA_ARGS__)
19686
#define vfnmadd_vf_f16mf2(...) __riscv_vfnmadd_vf_f16mf2_tu(__VA_ARGS__)
19687
#define vfnmadd_vv_f16m1(...) __riscv_vfnmadd_vv_f16m1_tu(__VA_ARGS__)
19688
#define vfnmadd_vf_f16m1(...) __riscv_vfnmadd_vf_f16m1_tu(__VA_ARGS__)
19689
#define vfnmadd_vv_f16m2(...) __riscv_vfnmadd_vv_f16m2_tu(__VA_ARGS__)
19690
#define vfnmadd_vf_f16m2(...) __riscv_vfnmadd_vf_f16m2_tu(__VA_ARGS__)
19691
#define vfnmadd_vv_f16m4(...) __riscv_vfnmadd_vv_f16m4_tu(__VA_ARGS__)
19692
#define vfnmadd_vf_f16m4(...) __riscv_vfnmadd_vf_f16m4_tu(__VA_ARGS__)
19693
#define vfnmadd_vv_f16m8(...) __riscv_vfnmadd_vv_f16m8_tu(__VA_ARGS__)
19694
#define vfnmadd_vf_f16m8(...) __riscv_vfnmadd_vf_f16m8_tu(__VA_ARGS__)
19695
#define vfnmadd_vv_f32mf2(...) __riscv_vfnmadd_vv_f32mf2_tu(__VA_ARGS__)
19696
#define vfnmadd_vf_f32mf2(...) __riscv_vfnmadd_vf_f32mf2_tu(__VA_ARGS__)
19697
#define vfnmadd_vv_f32m1(...) __riscv_vfnmadd_vv_f32m1_tu(__VA_ARGS__)
19698
#define vfnmadd_vf_f32m1(...) __riscv_vfnmadd_vf_f32m1_tu(__VA_ARGS__)
19699
#define vfnmadd_vv_f32m2(...) __riscv_vfnmadd_vv_f32m2_tu(__VA_ARGS__)
19700
#define vfnmadd_vf_f32m2(...) __riscv_vfnmadd_vf_f32m2_tu(__VA_ARGS__)
19701
#define vfnmadd_vv_f32m4(...) __riscv_vfnmadd_vv_f32m4_tu(__VA_ARGS__)
19702
#define vfnmadd_vf_f32m4(...) __riscv_vfnmadd_vf_f32m4_tu(__VA_ARGS__)
19703
#define vfnmadd_vv_f32m8(...) __riscv_vfnmadd_vv_f32m8_tu(__VA_ARGS__)
19704
#define vfnmadd_vf_f32m8(...) __riscv_vfnmadd_vf_f32m8_tu(__VA_ARGS__)
19705
#define vfnmadd_vv_f64m1(...) __riscv_vfnmadd_vv_f64m1_tu(__VA_ARGS__)
19706
#define vfnmadd_vf_f64m1(...) __riscv_vfnmadd_vf_f64m1_tu(__VA_ARGS__)
19707
#define vfnmadd_vv_f64m2(...) __riscv_vfnmadd_vv_f64m2_tu(__VA_ARGS__)
19708
#define vfnmadd_vf_f64m2(...) __riscv_vfnmadd_vf_f64m2_tu(__VA_ARGS__)
19709
#define vfnmadd_vv_f64m4(...) __riscv_vfnmadd_vv_f64m4_tu(__VA_ARGS__)
19710
#define vfnmadd_vf_f64m4(...) __riscv_vfnmadd_vf_f64m4_tu(__VA_ARGS__)
19711
#define vfnmadd_vv_f64m8(...) __riscv_vfnmadd_vv_f64m8_tu(__VA_ARGS__)
19712
#define vfnmadd_vf_f64m8(...) __riscv_vfnmadd_vf_f64m8_tu(__VA_ARGS__)
19713
#define vfmsub_vv_f16mf4(...) __riscv_vfmsub_vv_f16mf4_tu(__VA_ARGS__)
19714
#define vfmsub_vf_f16mf4(...) __riscv_vfmsub_vf_f16mf4_tu(__VA_ARGS__)
19715
#define vfmsub_vv_f16mf2(...) __riscv_vfmsub_vv_f16mf2_tu(__VA_ARGS__)
19716
#define vfmsub_vf_f16mf2(...) __riscv_vfmsub_vf_f16mf2_tu(__VA_ARGS__)
19717
#define vfmsub_vv_f16m1(...) __riscv_vfmsub_vv_f16m1_tu(__VA_ARGS__)
19718
#define vfmsub_vf_f16m1(...) __riscv_vfmsub_vf_f16m1_tu(__VA_ARGS__)
19719
#define vfmsub_vv_f16m2(...) __riscv_vfmsub_vv_f16m2_tu(__VA_ARGS__)
19720
#define vfmsub_vf_f16m2(...) __riscv_vfmsub_vf_f16m2_tu(__VA_ARGS__)
19721
#define vfmsub_vv_f16m4(...) __riscv_vfmsub_vv_f16m4_tu(__VA_ARGS__)
19722
#define vfmsub_vf_f16m4(...) __riscv_vfmsub_vf_f16m4_tu(__VA_ARGS__)
19723
#define vfmsub_vv_f16m8(...) __riscv_vfmsub_vv_f16m8_tu(__VA_ARGS__)
19724
#define vfmsub_vf_f16m8(...) __riscv_vfmsub_vf_f16m8_tu(__VA_ARGS__)
19725
#define vfmsub_vv_f32mf2(...) __riscv_vfmsub_vv_f32mf2_tu(__VA_ARGS__)
19726
#define vfmsub_vf_f32mf2(...) __riscv_vfmsub_vf_f32mf2_tu(__VA_ARGS__)
19727
#define vfmsub_vv_f32m1(...) __riscv_vfmsub_vv_f32m1_tu(__VA_ARGS__)
19728
#define vfmsub_vf_f32m1(...) __riscv_vfmsub_vf_f32m1_tu(__VA_ARGS__)
19729
#define vfmsub_vv_f32m2(...) __riscv_vfmsub_vv_f32m2_tu(__VA_ARGS__)
19730
#define vfmsub_vf_f32m2(...) __riscv_vfmsub_vf_f32m2_tu(__VA_ARGS__)
19731
#define vfmsub_vv_f32m4(...) __riscv_vfmsub_vv_f32m4_tu(__VA_ARGS__)
19732
#define vfmsub_vf_f32m4(...) __riscv_vfmsub_vf_f32m4_tu(__VA_ARGS__)
19733
#define vfmsub_vv_f32m8(...) __riscv_vfmsub_vv_f32m8_tu(__VA_ARGS__)
19734
#define vfmsub_vf_f32m8(...) __riscv_vfmsub_vf_f32m8_tu(__VA_ARGS__)
19735
#define vfmsub_vv_f64m1(...) __riscv_vfmsub_vv_f64m1_tu(__VA_ARGS__)
19736
#define vfmsub_vf_f64m1(...) __riscv_vfmsub_vf_f64m1_tu(__VA_ARGS__)
19737
#define vfmsub_vv_f64m2(...) __riscv_vfmsub_vv_f64m2_tu(__VA_ARGS__)
19738
#define vfmsub_vf_f64m2(...) __riscv_vfmsub_vf_f64m2_tu(__VA_ARGS__)
19739
#define vfmsub_vv_f64m4(...) __riscv_vfmsub_vv_f64m4_tu(__VA_ARGS__)
19740
#define vfmsub_vf_f64m4(...) __riscv_vfmsub_vf_f64m4_tu(__VA_ARGS__)
19741
#define vfmsub_vv_f64m8(...) __riscv_vfmsub_vv_f64m8_tu(__VA_ARGS__)
19742
#define vfmsub_vf_f64m8(...) __riscv_vfmsub_vf_f64m8_tu(__VA_ARGS__)
19743
#define vfnmsub_vv_f16mf4(...) __riscv_vfnmsub_vv_f16mf4_tu(__VA_ARGS__)
19744
#define vfnmsub_vf_f16mf4(...) __riscv_vfnmsub_vf_f16mf4_tu(__VA_ARGS__)
19745
#define vfnmsub_vv_f16mf2(...) __riscv_vfnmsub_vv_f16mf2_tu(__VA_ARGS__)
19746
#define vfnmsub_vf_f16mf2(...) __riscv_vfnmsub_vf_f16mf2_tu(__VA_ARGS__)
19747
#define vfnmsub_vv_f16m1(...) __riscv_vfnmsub_vv_f16m1_tu(__VA_ARGS__)
19748
#define vfnmsub_vf_f16m1(...) __riscv_vfnmsub_vf_f16m1_tu(__VA_ARGS__)
19749
#define vfnmsub_vv_f16m2(...) __riscv_vfnmsub_vv_f16m2_tu(__VA_ARGS__)
19750
#define vfnmsub_vf_f16m2(...) __riscv_vfnmsub_vf_f16m2_tu(__VA_ARGS__)
19751
#define vfnmsub_vv_f16m4(...) __riscv_vfnmsub_vv_f16m4_tu(__VA_ARGS__)
19752
#define vfnmsub_vf_f16m4(...) __riscv_vfnmsub_vf_f16m4_tu(__VA_ARGS__)
19753
#define vfnmsub_vv_f16m8(...) __riscv_vfnmsub_vv_f16m8_tu(__VA_ARGS__)
19754
#define vfnmsub_vf_f16m8(...) __riscv_vfnmsub_vf_f16m8_tu(__VA_ARGS__)
19755
#define vfnmsub_vv_f32mf2(...) __riscv_vfnmsub_vv_f32mf2_tu(__VA_ARGS__)
19756
#define vfnmsub_vf_f32mf2(...) __riscv_vfnmsub_vf_f32mf2_tu(__VA_ARGS__)
19757
#define vfnmsub_vv_f32m1(...) __riscv_vfnmsub_vv_f32m1_tu(__VA_ARGS__)
19758
#define vfnmsub_vf_f32m1(...) __riscv_vfnmsub_vf_f32m1_tu(__VA_ARGS__)
19759
#define vfnmsub_vv_f32m2(...) __riscv_vfnmsub_vv_f32m2_tu(__VA_ARGS__)
19760
#define vfnmsub_vf_f32m2(...) __riscv_vfnmsub_vf_f32m2_tu(__VA_ARGS__)
19761
#define vfnmsub_vv_f32m4(...) __riscv_vfnmsub_vv_f32m4_tu(__VA_ARGS__)
19762
#define vfnmsub_vf_f32m4(...) __riscv_vfnmsub_vf_f32m4_tu(__VA_ARGS__)
19763
#define vfnmsub_vv_f32m8(...) __riscv_vfnmsub_vv_f32m8_tu(__VA_ARGS__)
19764
#define vfnmsub_vf_f32m8(...) __riscv_vfnmsub_vf_f32m8_tu(__VA_ARGS__)
19765
#define vfnmsub_vv_f64m1(...) __riscv_vfnmsub_vv_f64m1_tu(__VA_ARGS__)
19766
#define vfnmsub_vf_f64m1(...) __riscv_vfnmsub_vf_f64m1_tu(__VA_ARGS__)
19767
#define vfnmsub_vv_f64m2(...) __riscv_vfnmsub_vv_f64m2_tu(__VA_ARGS__)
19768
#define vfnmsub_vf_f64m2(...) __riscv_vfnmsub_vf_f64m2_tu(__VA_ARGS__)
19769
#define vfnmsub_vv_f64m4(...) __riscv_vfnmsub_vv_f64m4_tu(__VA_ARGS__)
19770
#define vfnmsub_vf_f64m4(...) __riscv_vfnmsub_vf_f64m4_tu(__VA_ARGS__)
19771
#define vfnmsub_vv_f64m8(...) __riscv_vfnmsub_vv_f64m8_tu(__VA_ARGS__)
19772
#define vfnmsub_vf_f64m8(...) __riscv_vfnmsub_vf_f64m8_tu(__VA_ARGS__)
19773
// masked functions
19774
#define vfmacc_vv_f16mf4_m(...) __riscv_vfmacc_vv_f16mf4_tumu(__VA_ARGS__)
19775
#define vfmacc_vf_f16mf4_m(...) __riscv_vfmacc_vf_f16mf4_tumu(__VA_ARGS__)
19776
#define vfmacc_vv_f16mf2_m(...) __riscv_vfmacc_vv_f16mf2_tumu(__VA_ARGS__)
19777
#define vfmacc_vf_f16mf2_m(...) __riscv_vfmacc_vf_f16mf2_tumu(__VA_ARGS__)
19778
#define vfmacc_vv_f16m1_m(...) __riscv_vfmacc_vv_f16m1_tumu(__VA_ARGS__)
19779
#define vfmacc_vf_f16m1_m(...) __riscv_vfmacc_vf_f16m1_tumu(__VA_ARGS__)
19780
#define vfmacc_vv_f16m2_m(...) __riscv_vfmacc_vv_f16m2_tumu(__VA_ARGS__)
19781
#define vfmacc_vf_f16m2_m(...) __riscv_vfmacc_vf_f16m2_tumu(__VA_ARGS__)
19782
#define vfmacc_vv_f16m4_m(...) __riscv_vfmacc_vv_f16m4_tumu(__VA_ARGS__)
19783
#define vfmacc_vf_f16m4_m(...) __riscv_vfmacc_vf_f16m4_tumu(__VA_ARGS__)
19784
#define vfmacc_vv_f16m8_m(...) __riscv_vfmacc_vv_f16m8_tumu(__VA_ARGS__)
19785
#define vfmacc_vf_f16m8_m(...) __riscv_vfmacc_vf_f16m8_tumu(__VA_ARGS__)
19786
#define vfmacc_vv_f32mf2_m(...) __riscv_vfmacc_vv_f32mf2_tumu(__VA_ARGS__)
19787
#define vfmacc_vf_f32mf2_m(...) __riscv_vfmacc_vf_f32mf2_tumu(__VA_ARGS__)
19788
#define vfmacc_vv_f32m1_m(...) __riscv_vfmacc_vv_f32m1_tumu(__VA_ARGS__)
19789
#define vfmacc_vf_f32m1_m(...) __riscv_vfmacc_vf_f32m1_tumu(__VA_ARGS__)
19790
#define vfmacc_vv_f32m2_m(...) __riscv_vfmacc_vv_f32m2_tumu(__VA_ARGS__)
19791
#define vfmacc_vf_f32m2_m(...) __riscv_vfmacc_vf_f32m2_tumu(__VA_ARGS__)
19792
#define vfmacc_vv_f32m4_m(...) __riscv_vfmacc_vv_f32m4_tumu(__VA_ARGS__)
19793
#define vfmacc_vf_f32m4_m(...) __riscv_vfmacc_vf_f32m4_tumu(__VA_ARGS__)
19794
#define vfmacc_vv_f32m8_m(...) __riscv_vfmacc_vv_f32m8_tumu(__VA_ARGS__)
19795
#define vfmacc_vf_f32m8_m(...) __riscv_vfmacc_vf_f32m8_tumu(__VA_ARGS__)
19796
#define vfmacc_vv_f64m1_m(...) __riscv_vfmacc_vv_f64m1_tumu(__VA_ARGS__)
19797
#define vfmacc_vf_f64m1_m(...) __riscv_vfmacc_vf_f64m1_tumu(__VA_ARGS__)
19798
#define vfmacc_vv_f64m2_m(...) __riscv_vfmacc_vv_f64m2_tumu(__VA_ARGS__)
19799
#define vfmacc_vf_f64m2_m(...) __riscv_vfmacc_vf_f64m2_tumu(__VA_ARGS__)
19800
#define vfmacc_vv_f64m4_m(...) __riscv_vfmacc_vv_f64m4_tumu(__VA_ARGS__)
19801
#define vfmacc_vf_f64m4_m(...) __riscv_vfmacc_vf_f64m4_tumu(__VA_ARGS__)
19802
#define vfmacc_vv_f64m8_m(...) __riscv_vfmacc_vv_f64m8_tumu(__VA_ARGS__)
19803
#define vfmacc_vf_f64m8_m(...) __riscv_vfmacc_vf_f64m8_tumu(__VA_ARGS__)
19804
#define vfnmacc_vv_f16mf4_m(...) __riscv_vfnmacc_vv_f16mf4_tumu(__VA_ARGS__)
19805
#define vfnmacc_vf_f16mf4_m(...) __riscv_vfnmacc_vf_f16mf4_tumu(__VA_ARGS__)
19806
#define vfnmacc_vv_f16mf2_m(...) __riscv_vfnmacc_vv_f16mf2_tumu(__VA_ARGS__)
19807
#define vfnmacc_vf_f16mf2_m(...) __riscv_vfnmacc_vf_f16mf2_tumu(__VA_ARGS__)
19808
#define vfnmacc_vv_f16m1_m(...) __riscv_vfnmacc_vv_f16m1_tumu(__VA_ARGS__)
19809
#define vfnmacc_vf_f16m1_m(...) __riscv_vfnmacc_vf_f16m1_tumu(__VA_ARGS__)
19810
#define vfnmacc_vv_f16m2_m(...) __riscv_vfnmacc_vv_f16m2_tumu(__VA_ARGS__)
19811
#define vfnmacc_vf_f16m2_m(...) __riscv_vfnmacc_vf_f16m2_tumu(__VA_ARGS__)
19812
#define vfnmacc_vv_f16m4_m(...) __riscv_vfnmacc_vv_f16m4_tumu(__VA_ARGS__)
19813
#define vfnmacc_vf_f16m4_m(...) __riscv_vfnmacc_vf_f16m4_tumu(__VA_ARGS__)
19814
#define vfnmacc_vv_f16m8_m(...) __riscv_vfnmacc_vv_f16m8_tumu(__VA_ARGS__)
19815
#define vfnmacc_vf_f16m8_m(...) __riscv_vfnmacc_vf_f16m8_tumu(__VA_ARGS__)
19816
#define vfnmacc_vv_f32mf2_m(...) __riscv_vfnmacc_vv_f32mf2_tumu(__VA_ARGS__)
19817
#define vfnmacc_vf_f32mf2_m(...) __riscv_vfnmacc_vf_f32mf2_tumu(__VA_ARGS__)
19818
#define vfnmacc_vv_f32m1_m(...) __riscv_vfnmacc_vv_f32m1_tumu(__VA_ARGS__)
19819
#define vfnmacc_vf_f32m1_m(...) __riscv_vfnmacc_vf_f32m1_tumu(__VA_ARGS__)
19820
#define vfnmacc_vv_f32m2_m(...) __riscv_vfnmacc_vv_f32m2_tumu(__VA_ARGS__)
19821
#define vfnmacc_vf_f32m2_m(...) __riscv_vfnmacc_vf_f32m2_tumu(__VA_ARGS__)
19822
#define vfnmacc_vv_f32m4_m(...) __riscv_vfnmacc_vv_f32m4_tumu(__VA_ARGS__)
19823
#define vfnmacc_vf_f32m4_m(...) __riscv_vfnmacc_vf_f32m4_tumu(__VA_ARGS__)
19824
#define vfnmacc_vv_f32m8_m(...) __riscv_vfnmacc_vv_f32m8_tumu(__VA_ARGS__)
19825
#define vfnmacc_vf_f32m8_m(...) __riscv_vfnmacc_vf_f32m8_tumu(__VA_ARGS__)
19826
#define vfnmacc_vv_f64m1_m(...) __riscv_vfnmacc_vv_f64m1_tumu(__VA_ARGS__)
19827
#define vfnmacc_vf_f64m1_m(...) __riscv_vfnmacc_vf_f64m1_tumu(__VA_ARGS__)
19828
#define vfnmacc_vv_f64m2_m(...) __riscv_vfnmacc_vv_f64m2_tumu(__VA_ARGS__)
19829
#define vfnmacc_vf_f64m2_m(...) __riscv_vfnmacc_vf_f64m2_tumu(__VA_ARGS__)
19830
#define vfnmacc_vv_f64m4_m(...) __riscv_vfnmacc_vv_f64m4_tumu(__VA_ARGS__)
19831
#define vfnmacc_vf_f64m4_m(...) __riscv_vfnmacc_vf_f64m4_tumu(__VA_ARGS__)
19832
#define vfnmacc_vv_f64m8_m(...) __riscv_vfnmacc_vv_f64m8_tumu(__VA_ARGS__)
19833
#define vfnmacc_vf_f64m8_m(...) __riscv_vfnmacc_vf_f64m8_tumu(__VA_ARGS__)
19834
#define vfmsac_vv_f16mf4_m(...) __riscv_vfmsac_vv_f16mf4_tumu(__VA_ARGS__)
19835
#define vfmsac_vf_f16mf4_m(...) __riscv_vfmsac_vf_f16mf4_tumu(__VA_ARGS__)
19836
#define vfmsac_vv_f16mf2_m(...) __riscv_vfmsac_vv_f16mf2_tumu(__VA_ARGS__)
19837
#define vfmsac_vf_f16mf2_m(...) __riscv_vfmsac_vf_f16mf2_tumu(__VA_ARGS__)
19838
#define vfmsac_vv_f16m1_m(...) __riscv_vfmsac_vv_f16m1_tumu(__VA_ARGS__)
19839
#define vfmsac_vf_f16m1_m(...) __riscv_vfmsac_vf_f16m1_tumu(__VA_ARGS__)
19840
#define vfmsac_vv_f16m2_m(...) __riscv_vfmsac_vv_f16m2_tumu(__VA_ARGS__)
19841
#define vfmsac_vf_f16m2_m(...) __riscv_vfmsac_vf_f16m2_tumu(__VA_ARGS__)
19842
#define vfmsac_vv_f16m4_m(...) __riscv_vfmsac_vv_f16m4_tumu(__VA_ARGS__)
19843
#define vfmsac_vf_f16m4_m(...) __riscv_vfmsac_vf_f16m4_tumu(__VA_ARGS__)
19844
#define vfmsac_vv_f16m8_m(...) __riscv_vfmsac_vv_f16m8_tumu(__VA_ARGS__)
19845
#define vfmsac_vf_f16m8_m(...) __riscv_vfmsac_vf_f16m8_tumu(__VA_ARGS__)
19846
#define vfmsac_vv_f32mf2_m(...) __riscv_vfmsac_vv_f32mf2_tumu(__VA_ARGS__)
19847
#define vfmsac_vf_f32mf2_m(...) __riscv_vfmsac_vf_f32mf2_tumu(__VA_ARGS__)
19848
#define vfmsac_vv_f32m1_m(...) __riscv_vfmsac_vv_f32m1_tumu(__VA_ARGS__)
19849
#define vfmsac_vf_f32m1_m(...) __riscv_vfmsac_vf_f32m1_tumu(__VA_ARGS__)
19850
#define vfmsac_vv_f32m2_m(...) __riscv_vfmsac_vv_f32m2_tumu(__VA_ARGS__)
19851
#define vfmsac_vf_f32m2_m(...) __riscv_vfmsac_vf_f32m2_tumu(__VA_ARGS__)
19852
#define vfmsac_vv_f32m4_m(...) __riscv_vfmsac_vv_f32m4_tumu(__VA_ARGS__)
19853
#define vfmsac_vf_f32m4_m(...) __riscv_vfmsac_vf_f32m4_tumu(__VA_ARGS__)
19854
#define vfmsac_vv_f32m8_m(...) __riscv_vfmsac_vv_f32m8_tumu(__VA_ARGS__)
19855
#define vfmsac_vf_f32m8_m(...) __riscv_vfmsac_vf_f32m8_tumu(__VA_ARGS__)
19856
#define vfmsac_vv_f64m1_m(...) __riscv_vfmsac_vv_f64m1_tumu(__VA_ARGS__)
19857
#define vfmsac_vf_f64m1_m(...) __riscv_vfmsac_vf_f64m1_tumu(__VA_ARGS__)
19858
#define vfmsac_vv_f64m2_m(...) __riscv_vfmsac_vv_f64m2_tumu(__VA_ARGS__)
19859
#define vfmsac_vf_f64m2_m(...) __riscv_vfmsac_vf_f64m2_tumu(__VA_ARGS__)
19860
#define vfmsac_vv_f64m4_m(...) __riscv_vfmsac_vv_f64m4_tumu(__VA_ARGS__)
19861
#define vfmsac_vf_f64m4_m(...) __riscv_vfmsac_vf_f64m4_tumu(__VA_ARGS__)
19862
#define vfmsac_vv_f64m8_m(...) __riscv_vfmsac_vv_f64m8_tumu(__VA_ARGS__)
19863
#define vfmsac_vf_f64m8_m(...) __riscv_vfmsac_vf_f64m8_tumu(__VA_ARGS__)
19864
#define vfnmsac_vv_f16mf4_m(...) __riscv_vfnmsac_vv_f16mf4_tumu(__VA_ARGS__)
19865
#define vfnmsac_vf_f16mf4_m(...) __riscv_vfnmsac_vf_f16mf4_tumu(__VA_ARGS__)
19866
#define vfnmsac_vv_f16mf2_m(...) __riscv_vfnmsac_vv_f16mf2_tumu(__VA_ARGS__)
19867
#define vfnmsac_vf_f16mf2_m(...) __riscv_vfnmsac_vf_f16mf2_tumu(__VA_ARGS__)
19868
#define vfnmsac_vv_f16m1_m(...) __riscv_vfnmsac_vv_f16m1_tumu(__VA_ARGS__)
19869
#define vfnmsac_vf_f16m1_m(...) __riscv_vfnmsac_vf_f16m1_tumu(__VA_ARGS__)
19870
#define vfnmsac_vv_f16m2_m(...) __riscv_vfnmsac_vv_f16m2_tumu(__VA_ARGS__)
19871
#define vfnmsac_vf_f16m2_m(...) __riscv_vfnmsac_vf_f16m2_tumu(__VA_ARGS__)
19872
#define vfnmsac_vv_f16m4_m(...) __riscv_vfnmsac_vv_f16m4_tumu(__VA_ARGS__)
19873
#define vfnmsac_vf_f16m4_m(...) __riscv_vfnmsac_vf_f16m4_tumu(__VA_ARGS__)
19874
#define vfnmsac_vv_f16m8_m(...) __riscv_vfnmsac_vv_f16m8_tumu(__VA_ARGS__)
19875
#define vfnmsac_vf_f16m8_m(...) __riscv_vfnmsac_vf_f16m8_tumu(__VA_ARGS__)
19876
#define vfnmsac_vv_f32mf2_m(...) __riscv_vfnmsac_vv_f32mf2_tumu(__VA_ARGS__)
19877
#define vfnmsac_vf_f32mf2_m(...) __riscv_vfnmsac_vf_f32mf2_tumu(__VA_ARGS__)
19878
#define vfnmsac_vv_f32m1_m(...) __riscv_vfnmsac_vv_f32m1_tumu(__VA_ARGS__)
19879
#define vfnmsac_vf_f32m1_m(...) __riscv_vfnmsac_vf_f32m1_tumu(__VA_ARGS__)
19880
#define vfnmsac_vv_f32m2_m(...) __riscv_vfnmsac_vv_f32m2_tumu(__VA_ARGS__)
19881
#define vfnmsac_vf_f32m2_m(...) __riscv_vfnmsac_vf_f32m2_tumu(__VA_ARGS__)
19882
#define vfnmsac_vv_f32m4_m(...) __riscv_vfnmsac_vv_f32m4_tumu(__VA_ARGS__)
19883
#define vfnmsac_vf_f32m4_m(...) __riscv_vfnmsac_vf_f32m4_tumu(__VA_ARGS__)
19884
#define vfnmsac_vv_f32m8_m(...) __riscv_vfnmsac_vv_f32m8_tumu(__VA_ARGS__)
19885
#define vfnmsac_vf_f32m8_m(...) __riscv_vfnmsac_vf_f32m8_tumu(__VA_ARGS__)
19886
#define vfnmsac_vv_f64m1_m(...) __riscv_vfnmsac_vv_f64m1_tumu(__VA_ARGS__)
19887
#define vfnmsac_vf_f64m1_m(...) __riscv_vfnmsac_vf_f64m1_tumu(__VA_ARGS__)
19888
#define vfnmsac_vv_f64m2_m(...) __riscv_vfnmsac_vv_f64m2_tumu(__VA_ARGS__)
19889
#define vfnmsac_vf_f64m2_m(...) __riscv_vfnmsac_vf_f64m2_tumu(__VA_ARGS__)
19890
#define vfnmsac_vv_f64m4_m(...) __riscv_vfnmsac_vv_f64m4_tumu(__VA_ARGS__)
19891
#define vfnmsac_vf_f64m4_m(...) __riscv_vfnmsac_vf_f64m4_tumu(__VA_ARGS__)
19892
#define vfnmsac_vv_f64m8_m(...) __riscv_vfnmsac_vv_f64m8_tumu(__VA_ARGS__)
19893
#define vfnmsac_vf_f64m8_m(...) __riscv_vfnmsac_vf_f64m8_tumu(__VA_ARGS__)
19894
#define vfmadd_vv_f16mf4_m(...) __riscv_vfmadd_vv_f16mf4_tumu(__VA_ARGS__)
19895
#define vfmadd_vf_f16mf4_m(...) __riscv_vfmadd_vf_f16mf4_tumu(__VA_ARGS__)
19896
#define vfmadd_vv_f16mf2_m(...) __riscv_vfmadd_vv_f16mf2_tumu(__VA_ARGS__)
19897
#define vfmadd_vf_f16mf2_m(...) __riscv_vfmadd_vf_f16mf2_tumu(__VA_ARGS__)
19898
#define vfmadd_vv_f16m1_m(...) __riscv_vfmadd_vv_f16m1_tumu(__VA_ARGS__)
19899
#define vfmadd_vf_f16m1_m(...) __riscv_vfmadd_vf_f16m1_tumu(__VA_ARGS__)
19900
#define vfmadd_vv_f16m2_m(...) __riscv_vfmadd_vv_f16m2_tumu(__VA_ARGS__)
19901
#define vfmadd_vf_f16m2_m(...) __riscv_vfmadd_vf_f16m2_tumu(__VA_ARGS__)
19902
#define vfmadd_vv_f16m4_m(...) __riscv_vfmadd_vv_f16m4_tumu(__VA_ARGS__)
19903
#define vfmadd_vf_f16m4_m(...) __riscv_vfmadd_vf_f16m4_tumu(__VA_ARGS__)
19904
#define vfmadd_vv_f16m8_m(...) __riscv_vfmadd_vv_f16m8_tumu(__VA_ARGS__)
19905
#define vfmadd_vf_f16m8_m(...) __riscv_vfmadd_vf_f16m8_tumu(__VA_ARGS__)
19906
#define vfmadd_vv_f32mf2_m(...) __riscv_vfmadd_vv_f32mf2_tumu(__VA_ARGS__)
19907
#define vfmadd_vf_f32mf2_m(...) __riscv_vfmadd_vf_f32mf2_tumu(__VA_ARGS__)
19908
#define vfmadd_vv_f32m1_m(...) __riscv_vfmadd_vv_f32m1_tumu(__VA_ARGS__)
19909
#define vfmadd_vf_f32m1_m(...) __riscv_vfmadd_vf_f32m1_tumu(__VA_ARGS__)
19910
#define vfmadd_vv_f32m2_m(...) __riscv_vfmadd_vv_f32m2_tumu(__VA_ARGS__)
19911
#define vfmadd_vf_f32m2_m(...) __riscv_vfmadd_vf_f32m2_tumu(__VA_ARGS__)
19912
#define vfmadd_vv_f32m4_m(...) __riscv_vfmadd_vv_f32m4_tumu(__VA_ARGS__)
19913
#define vfmadd_vf_f32m4_m(...) __riscv_vfmadd_vf_f32m4_tumu(__VA_ARGS__)
19914
#define vfmadd_vv_f32m8_m(...) __riscv_vfmadd_vv_f32m8_tumu(__VA_ARGS__)
19915
#define vfmadd_vf_f32m8_m(...) __riscv_vfmadd_vf_f32m8_tumu(__VA_ARGS__)
19916
#define vfmadd_vv_f64m1_m(...) __riscv_vfmadd_vv_f64m1_tumu(__VA_ARGS__)
19917
#define vfmadd_vf_f64m1_m(...) __riscv_vfmadd_vf_f64m1_tumu(__VA_ARGS__)
19918
#define vfmadd_vv_f64m2_m(...) __riscv_vfmadd_vv_f64m2_tumu(__VA_ARGS__)
19919
#define vfmadd_vf_f64m2_m(...) __riscv_vfmadd_vf_f64m2_tumu(__VA_ARGS__)
19920
#define vfmadd_vv_f64m4_m(...) __riscv_vfmadd_vv_f64m4_tumu(__VA_ARGS__)
19921
#define vfmadd_vf_f64m4_m(...) __riscv_vfmadd_vf_f64m4_tumu(__VA_ARGS__)
19922
#define vfmadd_vv_f64m8_m(...) __riscv_vfmadd_vv_f64m8_tumu(__VA_ARGS__)
19923
#define vfmadd_vf_f64m8_m(...) __riscv_vfmadd_vf_f64m8_tumu(__VA_ARGS__)
19924
#define vfnmadd_vv_f16mf4_m(...) __riscv_vfnmadd_vv_f16mf4_tumu(__VA_ARGS__)
19925
#define vfnmadd_vf_f16mf4_m(...) __riscv_vfnmadd_vf_f16mf4_tumu(__VA_ARGS__)
19926
#define vfnmadd_vv_f16mf2_m(...) __riscv_vfnmadd_vv_f16mf2_tumu(__VA_ARGS__)
19927
#define vfnmadd_vf_f16mf2_m(...) __riscv_vfnmadd_vf_f16mf2_tumu(__VA_ARGS__)
19928
#define vfnmadd_vv_f16m1_m(...) __riscv_vfnmadd_vv_f16m1_tumu(__VA_ARGS__)
19929
#define vfnmadd_vf_f16m1_m(...) __riscv_vfnmadd_vf_f16m1_tumu(__VA_ARGS__)
19930
#define vfnmadd_vv_f16m2_m(...) __riscv_vfnmadd_vv_f16m2_tumu(__VA_ARGS__)
19931
#define vfnmadd_vf_f16m2_m(...) __riscv_vfnmadd_vf_f16m2_tumu(__VA_ARGS__)
19932
#define vfnmadd_vv_f16m4_m(...) __riscv_vfnmadd_vv_f16m4_tumu(__VA_ARGS__)
19933
#define vfnmadd_vf_f16m4_m(...) __riscv_vfnmadd_vf_f16m4_tumu(__VA_ARGS__)
19934
#define vfnmadd_vv_f16m8_m(...) __riscv_vfnmadd_vv_f16m8_tumu(__VA_ARGS__)
19935
#define vfnmadd_vf_f16m8_m(...) __riscv_vfnmadd_vf_f16m8_tumu(__VA_ARGS__)
19936
#define vfnmadd_vv_f32mf2_m(...) __riscv_vfnmadd_vv_f32mf2_tumu(__VA_ARGS__)
19937
#define vfnmadd_vf_f32mf2_m(...) __riscv_vfnmadd_vf_f32mf2_tumu(__VA_ARGS__)
19938
#define vfnmadd_vv_f32m1_m(...) __riscv_vfnmadd_vv_f32m1_tumu(__VA_ARGS__)
19939
#define vfnmadd_vf_f32m1_m(...) __riscv_vfnmadd_vf_f32m1_tumu(__VA_ARGS__)
19940
#define vfnmadd_vv_f32m2_m(...) __riscv_vfnmadd_vv_f32m2_tumu(__VA_ARGS__)
19941
#define vfnmadd_vf_f32m2_m(...) __riscv_vfnmadd_vf_f32m2_tumu(__VA_ARGS__)
19942
#define vfnmadd_vv_f32m4_m(...) __riscv_vfnmadd_vv_f32m4_tumu(__VA_ARGS__)
19943
#define vfnmadd_vf_f32m4_m(...) __riscv_vfnmadd_vf_f32m4_tumu(__VA_ARGS__)
19944
#define vfnmadd_vv_f32m8_m(...) __riscv_vfnmadd_vv_f32m8_tumu(__VA_ARGS__)
19945
#define vfnmadd_vf_f32m8_m(...) __riscv_vfnmadd_vf_f32m8_tumu(__VA_ARGS__)
19946
#define vfnmadd_vv_f64m1_m(...) __riscv_vfnmadd_vv_f64m1_tumu(__VA_ARGS__)
19947
#define vfnmadd_vf_f64m1_m(...) __riscv_vfnmadd_vf_f64m1_tumu(__VA_ARGS__)
19948
#define vfnmadd_vv_f64m2_m(...) __riscv_vfnmadd_vv_f64m2_tumu(__VA_ARGS__)
19949
#define vfnmadd_vf_f64m2_m(...) __riscv_vfnmadd_vf_f64m2_tumu(__VA_ARGS__)
19950
#define vfnmadd_vv_f64m4_m(...) __riscv_vfnmadd_vv_f64m4_tumu(__VA_ARGS__)
19951
#define vfnmadd_vf_f64m4_m(...) __riscv_vfnmadd_vf_f64m4_tumu(__VA_ARGS__)
19952
#define vfnmadd_vv_f64m8_m(...) __riscv_vfnmadd_vv_f64m8_tumu(__VA_ARGS__)
19953
#define vfnmadd_vf_f64m8_m(...) __riscv_vfnmadd_vf_f64m8_tumu(__VA_ARGS__)
19954
#define vfmsub_vv_f16mf4_m(...) __riscv_vfmsub_vv_f16mf4_tumu(__VA_ARGS__)
19955
#define vfmsub_vf_f16mf4_m(...) __riscv_vfmsub_vf_f16mf4_tumu(__VA_ARGS__)
19956
#define vfmsub_vv_f16mf2_m(...) __riscv_vfmsub_vv_f16mf2_tumu(__VA_ARGS__)
19957
#define vfmsub_vf_f16mf2_m(...) __riscv_vfmsub_vf_f16mf2_tumu(__VA_ARGS__)
19958
#define vfmsub_vv_f16m1_m(...) __riscv_vfmsub_vv_f16m1_tumu(__VA_ARGS__)
19959
#define vfmsub_vf_f16m1_m(...) __riscv_vfmsub_vf_f16m1_tumu(__VA_ARGS__)
19960
#define vfmsub_vv_f16m2_m(...) __riscv_vfmsub_vv_f16m2_tumu(__VA_ARGS__)
19961
#define vfmsub_vf_f16m2_m(...) __riscv_vfmsub_vf_f16m2_tumu(__VA_ARGS__)
19962
#define vfmsub_vv_f16m4_m(...) __riscv_vfmsub_vv_f16m4_tumu(__VA_ARGS__)
19963
#define vfmsub_vf_f16m4_m(...) __riscv_vfmsub_vf_f16m4_tumu(__VA_ARGS__)
19964
#define vfmsub_vv_f16m8_m(...) __riscv_vfmsub_vv_f16m8_tumu(__VA_ARGS__)
19965
#define vfmsub_vf_f16m8_m(...) __riscv_vfmsub_vf_f16m8_tumu(__VA_ARGS__)
19966
#define vfmsub_vv_f32mf2_m(...) __riscv_vfmsub_vv_f32mf2_tumu(__VA_ARGS__)
19967
#define vfmsub_vf_f32mf2_m(...) __riscv_vfmsub_vf_f32mf2_tumu(__VA_ARGS__)
19968
#define vfmsub_vv_f32m1_m(...) __riscv_vfmsub_vv_f32m1_tumu(__VA_ARGS__)
19969
#define vfmsub_vf_f32m1_m(...) __riscv_vfmsub_vf_f32m1_tumu(__VA_ARGS__)
19970
#define vfmsub_vv_f32m2_m(...) __riscv_vfmsub_vv_f32m2_tumu(__VA_ARGS__)
19971
#define vfmsub_vf_f32m2_m(...) __riscv_vfmsub_vf_f32m2_tumu(__VA_ARGS__)
19972
#define vfmsub_vv_f32m4_m(...) __riscv_vfmsub_vv_f32m4_tumu(__VA_ARGS__)
19973
#define vfmsub_vf_f32m4_m(...) __riscv_vfmsub_vf_f32m4_tumu(__VA_ARGS__)
19974
#define vfmsub_vv_f32m8_m(...) __riscv_vfmsub_vv_f32m8_tumu(__VA_ARGS__)
19975
#define vfmsub_vf_f32m8_m(...) __riscv_vfmsub_vf_f32m8_tumu(__VA_ARGS__)
19976
#define vfmsub_vv_f64m1_m(...) __riscv_vfmsub_vv_f64m1_tumu(__VA_ARGS__)
19977
#define vfmsub_vf_f64m1_m(...) __riscv_vfmsub_vf_f64m1_tumu(__VA_ARGS__)
19978
#define vfmsub_vv_f64m2_m(...) __riscv_vfmsub_vv_f64m2_tumu(__VA_ARGS__)
19979
#define vfmsub_vf_f64m2_m(...) __riscv_vfmsub_vf_f64m2_tumu(__VA_ARGS__)
19980
#define vfmsub_vv_f64m4_m(...) __riscv_vfmsub_vv_f64m4_tumu(__VA_ARGS__)
19981
#define vfmsub_vf_f64m4_m(...) __riscv_vfmsub_vf_f64m4_tumu(__VA_ARGS__)
19982
#define vfmsub_vv_f64m8_m(...) __riscv_vfmsub_vv_f64m8_tumu(__VA_ARGS__)
19983
#define vfmsub_vf_f64m8_m(...) __riscv_vfmsub_vf_f64m8_tumu(__VA_ARGS__)
19984
#define vfnmsub_vv_f16mf4_m(...) __riscv_vfnmsub_vv_f16mf4_tumu(__VA_ARGS__)
19985
#define vfnmsub_vf_f16mf4_m(...) __riscv_vfnmsub_vf_f16mf4_tumu(__VA_ARGS__)
19986
#define vfnmsub_vv_f16mf2_m(...) __riscv_vfnmsub_vv_f16mf2_tumu(__VA_ARGS__)
19987
#define vfnmsub_vf_f16mf2_m(...) __riscv_vfnmsub_vf_f16mf2_tumu(__VA_ARGS__)
19988
#define vfnmsub_vv_f16m1_m(...) __riscv_vfnmsub_vv_f16m1_tumu(__VA_ARGS__)
19989
#define vfnmsub_vf_f16m1_m(...) __riscv_vfnmsub_vf_f16m1_tumu(__VA_ARGS__)
19990
#define vfnmsub_vv_f16m2_m(...) __riscv_vfnmsub_vv_f16m2_tumu(__VA_ARGS__)
19991
#define vfnmsub_vf_f16m2_m(...) __riscv_vfnmsub_vf_f16m2_tumu(__VA_ARGS__)
19992
#define vfnmsub_vv_f16m4_m(...) __riscv_vfnmsub_vv_f16m4_tumu(__VA_ARGS__)
19993
#define vfnmsub_vf_f16m4_m(...) __riscv_vfnmsub_vf_f16m4_tumu(__VA_ARGS__)
19994
#define vfnmsub_vv_f16m8_m(...) __riscv_vfnmsub_vv_f16m8_tumu(__VA_ARGS__)
19995
#define vfnmsub_vf_f16m8_m(...) __riscv_vfnmsub_vf_f16m8_tumu(__VA_ARGS__)
19996
#define vfnmsub_vv_f32mf2_m(...) __riscv_vfnmsub_vv_f32mf2_tumu(__VA_ARGS__)
19997
#define vfnmsub_vf_f32mf2_m(...) __riscv_vfnmsub_vf_f32mf2_tumu(__VA_ARGS__)
19998
#define vfnmsub_vv_f32m1_m(...) __riscv_vfnmsub_vv_f32m1_tumu(__VA_ARGS__)
19999
#define vfnmsub_vf_f32m1_m(...) __riscv_vfnmsub_vf_f32m1_tumu(__VA_ARGS__)
20000
#define vfnmsub_vv_f32m2_m(...) __riscv_vfnmsub_vv_f32m2_tumu(__VA_ARGS__)
20001
#define vfnmsub_vf_f32m2_m(...) __riscv_vfnmsub_vf_f32m2_tumu(__VA_ARGS__)
20002
#define vfnmsub_vv_f32m4_m(...) __riscv_vfnmsub_vv_f32m4_tumu(__VA_ARGS__)
20003
#define vfnmsub_vf_f32m4_m(...) __riscv_vfnmsub_vf_f32m4_tumu(__VA_ARGS__)
20004
#define vfnmsub_vv_f32m8_m(...) __riscv_vfnmsub_vv_f32m8_tumu(__VA_ARGS__)
20005
#define vfnmsub_vf_f32m8_m(...) __riscv_vfnmsub_vf_f32m8_tumu(__VA_ARGS__)
20006
#define vfnmsub_vv_f64m1_m(...) __riscv_vfnmsub_vv_f64m1_tumu(__VA_ARGS__)
20007
#define vfnmsub_vf_f64m1_m(...) __riscv_vfnmsub_vf_f64m1_tumu(__VA_ARGS__)
20008
#define vfnmsub_vv_f64m2_m(...) __riscv_vfnmsub_vv_f64m2_tumu(__VA_ARGS__)
20009
#define vfnmsub_vf_f64m2_m(...) __riscv_vfnmsub_vf_f64m2_tumu(__VA_ARGS__)
20010
#define vfnmsub_vv_f64m4_m(...) __riscv_vfnmsub_vv_f64m4_tumu(__VA_ARGS__)
20011
#define vfnmsub_vf_f64m4_m(...) __riscv_vfnmsub_vf_f64m4_tumu(__VA_ARGS__)
20012
#define vfnmsub_vv_f64m8_m(...) __riscv_vfnmsub_vv_f64m8_tumu(__VA_ARGS__)
20013
#define vfnmsub_vf_f64m8_m(...) __riscv_vfnmsub_vf_f64m8_tumu(__VA_ARGS__)
20014
#define vfwmacc_vv_f32mf2(...) __riscv_vfwmacc_vv_f32mf2_tu(__VA_ARGS__)
20015
#define vfwmacc_vf_f32mf2(...) __riscv_vfwmacc_vf_f32mf2_tu(__VA_ARGS__)
20016
#define vfwmacc_vv_f32m1(...) __riscv_vfwmacc_vv_f32m1_tu(__VA_ARGS__)
20017
#define vfwmacc_vf_f32m1(...) __riscv_vfwmacc_vf_f32m1_tu(__VA_ARGS__)
20018
#define vfwmacc_vv_f32m2(...) __riscv_vfwmacc_vv_f32m2_tu(__VA_ARGS__)
20019
#define vfwmacc_vf_f32m2(...) __riscv_vfwmacc_vf_f32m2_tu(__VA_ARGS__)
20020
#define vfwmacc_vv_f32m4(...) __riscv_vfwmacc_vv_f32m4_tu(__VA_ARGS__)
20021
#define vfwmacc_vf_f32m4(...) __riscv_vfwmacc_vf_f32m4_tu(__VA_ARGS__)
20022
#define vfwmacc_vv_f32m8(...) __riscv_vfwmacc_vv_f32m8_tu(__VA_ARGS__)
20023
#define vfwmacc_vf_f32m8(...) __riscv_vfwmacc_vf_f32m8_tu(__VA_ARGS__)
20024
#define vfwmacc_vv_f64m1(...) __riscv_vfwmacc_vv_f64m1_tu(__VA_ARGS__)
20025
#define vfwmacc_vf_f64m1(...) __riscv_vfwmacc_vf_f64m1_tu(__VA_ARGS__)
20026
#define vfwmacc_vv_f64m2(...) __riscv_vfwmacc_vv_f64m2_tu(__VA_ARGS__)
20027
#define vfwmacc_vf_f64m2(...) __riscv_vfwmacc_vf_f64m2_tu(__VA_ARGS__)
20028
#define vfwmacc_vv_f64m4(...) __riscv_vfwmacc_vv_f64m4_tu(__VA_ARGS__)
20029
#define vfwmacc_vf_f64m4(...) __riscv_vfwmacc_vf_f64m4_tu(__VA_ARGS__)
20030
#define vfwmacc_vv_f64m8(...) __riscv_vfwmacc_vv_f64m8_tu(__VA_ARGS__)
20031
#define vfwmacc_vf_f64m8(...) __riscv_vfwmacc_vf_f64m8_tu(__VA_ARGS__)
20032
#define vfwnmacc_vv_f32mf2(...) __riscv_vfwnmacc_vv_f32mf2_tu(__VA_ARGS__)
20033
#define vfwnmacc_vf_f32mf2(...) __riscv_vfwnmacc_vf_f32mf2_tu(__VA_ARGS__)
20034
#define vfwnmacc_vv_f32m1(...) __riscv_vfwnmacc_vv_f32m1_tu(__VA_ARGS__)
20035
#define vfwnmacc_vf_f32m1(...) __riscv_vfwnmacc_vf_f32m1_tu(__VA_ARGS__)
20036
#define vfwnmacc_vv_f32m2(...) __riscv_vfwnmacc_vv_f32m2_tu(__VA_ARGS__)
20037
#define vfwnmacc_vf_f32m2(...) __riscv_vfwnmacc_vf_f32m2_tu(__VA_ARGS__)
20038
#define vfwnmacc_vv_f32m4(...) __riscv_vfwnmacc_vv_f32m4_tu(__VA_ARGS__)
20039
#define vfwnmacc_vf_f32m4(...) __riscv_vfwnmacc_vf_f32m4_tu(__VA_ARGS__)
20040
#define vfwnmacc_vv_f32m8(...) __riscv_vfwnmacc_vv_f32m8_tu(__VA_ARGS__)
20041
#define vfwnmacc_vf_f32m8(...) __riscv_vfwnmacc_vf_f32m8_tu(__VA_ARGS__)
20042
#define vfwnmacc_vv_f64m1(...) __riscv_vfwnmacc_vv_f64m1_tu(__VA_ARGS__)
20043
#define vfwnmacc_vf_f64m1(...) __riscv_vfwnmacc_vf_f64m1_tu(__VA_ARGS__)
20044
#define vfwnmacc_vv_f64m2(...) __riscv_vfwnmacc_vv_f64m2_tu(__VA_ARGS__)
20045
#define vfwnmacc_vf_f64m2(...) __riscv_vfwnmacc_vf_f64m2_tu(__VA_ARGS__)
20046
#define vfwnmacc_vv_f64m4(...) __riscv_vfwnmacc_vv_f64m4_tu(__VA_ARGS__)
20047
#define vfwnmacc_vf_f64m4(...) __riscv_vfwnmacc_vf_f64m4_tu(__VA_ARGS__)
20048
#define vfwnmacc_vv_f64m8(...) __riscv_vfwnmacc_vv_f64m8_tu(__VA_ARGS__)
20049
#define vfwnmacc_vf_f64m8(...) __riscv_vfwnmacc_vf_f64m8_tu(__VA_ARGS__)
20050
#define vfwmsac_vv_f32mf2(...) __riscv_vfwmsac_vv_f32mf2_tu(__VA_ARGS__)
20051
#define vfwmsac_vf_f32mf2(...) __riscv_vfwmsac_vf_f32mf2_tu(__VA_ARGS__)
20052
#define vfwmsac_vv_f32m1(...) __riscv_vfwmsac_vv_f32m1_tu(__VA_ARGS__)
20053
#define vfwmsac_vf_f32m1(...) __riscv_vfwmsac_vf_f32m1_tu(__VA_ARGS__)
20054
#define vfwmsac_vv_f32m2(...) __riscv_vfwmsac_vv_f32m2_tu(__VA_ARGS__)
20055
#define vfwmsac_vf_f32m2(...) __riscv_vfwmsac_vf_f32m2_tu(__VA_ARGS__)
20056
#define vfwmsac_vv_f32m4(...) __riscv_vfwmsac_vv_f32m4_tu(__VA_ARGS__)
20057
#define vfwmsac_vf_f32m4(...) __riscv_vfwmsac_vf_f32m4_tu(__VA_ARGS__)
20058
#define vfwmsac_vv_f32m8(...) __riscv_vfwmsac_vv_f32m8_tu(__VA_ARGS__)
20059
#define vfwmsac_vf_f32m8(...) __riscv_vfwmsac_vf_f32m8_tu(__VA_ARGS__)
20060
#define vfwmsac_vv_f64m1(...) __riscv_vfwmsac_vv_f64m1_tu(__VA_ARGS__)
20061
#define vfwmsac_vf_f64m1(...) __riscv_vfwmsac_vf_f64m1_tu(__VA_ARGS__)
20062
#define vfwmsac_vv_f64m2(...) __riscv_vfwmsac_vv_f64m2_tu(__VA_ARGS__)
20063
#define vfwmsac_vf_f64m2(...) __riscv_vfwmsac_vf_f64m2_tu(__VA_ARGS__)
20064
#define vfwmsac_vv_f64m4(...) __riscv_vfwmsac_vv_f64m4_tu(__VA_ARGS__)
20065
#define vfwmsac_vf_f64m4(...) __riscv_vfwmsac_vf_f64m4_tu(__VA_ARGS__)
20066
#define vfwmsac_vv_f64m8(...) __riscv_vfwmsac_vv_f64m8_tu(__VA_ARGS__)
20067
#define vfwmsac_vf_f64m8(...) __riscv_vfwmsac_vf_f64m8_tu(__VA_ARGS__)
20068
#define vfwnmsac_vv_f32mf2(...) __riscv_vfwnmsac_vv_f32mf2_tu(__VA_ARGS__)
20069
#define vfwnmsac_vf_f32mf2(...) __riscv_vfwnmsac_vf_f32mf2_tu(__VA_ARGS__)
20070
#define vfwnmsac_vv_f32m1(...) __riscv_vfwnmsac_vv_f32m1_tu(__VA_ARGS__)
20071
#define vfwnmsac_vf_f32m1(...) __riscv_vfwnmsac_vf_f32m1_tu(__VA_ARGS__)
20072
#define vfwnmsac_vv_f32m2(...) __riscv_vfwnmsac_vv_f32m2_tu(__VA_ARGS__)
20073
#define vfwnmsac_vf_f32m2(...) __riscv_vfwnmsac_vf_f32m2_tu(__VA_ARGS__)
20074
#define vfwnmsac_vv_f32m4(...) __riscv_vfwnmsac_vv_f32m4_tu(__VA_ARGS__)
20075
#define vfwnmsac_vf_f32m4(...) __riscv_vfwnmsac_vf_f32m4_tu(__VA_ARGS__)
20076
#define vfwnmsac_vv_f32m8(...) __riscv_vfwnmsac_vv_f32m8_tu(__VA_ARGS__)
20077
#define vfwnmsac_vf_f32m8(...) __riscv_vfwnmsac_vf_f32m8_tu(__VA_ARGS__)
20078
#define vfwnmsac_vv_f64m1(...) __riscv_vfwnmsac_vv_f64m1_tu(__VA_ARGS__)
20079
#define vfwnmsac_vf_f64m1(...) __riscv_vfwnmsac_vf_f64m1_tu(__VA_ARGS__)
20080
#define vfwnmsac_vv_f64m2(...) __riscv_vfwnmsac_vv_f64m2_tu(__VA_ARGS__)
20081
#define vfwnmsac_vf_f64m2(...) __riscv_vfwnmsac_vf_f64m2_tu(__VA_ARGS__)
20082
#define vfwnmsac_vv_f64m4(...) __riscv_vfwnmsac_vv_f64m4_tu(__VA_ARGS__)
20083
#define vfwnmsac_vf_f64m4(...) __riscv_vfwnmsac_vf_f64m4_tu(__VA_ARGS__)
20084
#define vfwnmsac_vv_f64m8(...) __riscv_vfwnmsac_vv_f64m8_tu(__VA_ARGS__)
20085
#define vfwnmsac_vf_f64m8(...) __riscv_vfwnmsac_vf_f64m8_tu(__VA_ARGS__)
20086
// masked functions
20087
#define vfwmacc_vv_f32mf2_m(...) __riscv_vfwmacc_vv_f32mf2_tumu(__VA_ARGS__)
20088
#define vfwmacc_vf_f32mf2_m(...) __riscv_vfwmacc_vf_f32mf2_tumu(__VA_ARGS__)
20089
#define vfwmacc_vv_f32m1_m(...) __riscv_vfwmacc_vv_f32m1_tumu(__VA_ARGS__)
20090
#define vfwmacc_vf_f32m1_m(...) __riscv_vfwmacc_vf_f32m1_tumu(__VA_ARGS__)
20091
#define vfwmacc_vv_f32m2_m(...) __riscv_vfwmacc_vv_f32m2_tumu(__VA_ARGS__)
20092
#define vfwmacc_vf_f32m2_m(...) __riscv_vfwmacc_vf_f32m2_tumu(__VA_ARGS__)
20093
#define vfwmacc_vv_f32m4_m(...) __riscv_vfwmacc_vv_f32m4_tumu(__VA_ARGS__)
20094
#define vfwmacc_vf_f32m4_m(...) __riscv_vfwmacc_vf_f32m4_tumu(__VA_ARGS__)
20095
#define vfwmacc_vv_f32m8_m(...) __riscv_vfwmacc_vv_f32m8_tumu(__VA_ARGS__)
20096
#define vfwmacc_vf_f32m8_m(...) __riscv_vfwmacc_vf_f32m8_tumu(__VA_ARGS__)
20097
#define vfwmacc_vv_f64m1_m(...) __riscv_vfwmacc_vv_f64m1_tumu(__VA_ARGS__)
20098
#define vfwmacc_vf_f64m1_m(...) __riscv_vfwmacc_vf_f64m1_tumu(__VA_ARGS__)
20099
#define vfwmacc_vv_f64m2_m(...) __riscv_vfwmacc_vv_f64m2_tumu(__VA_ARGS__)
20100
#define vfwmacc_vf_f64m2_m(...) __riscv_vfwmacc_vf_f64m2_tumu(__VA_ARGS__)
20101
#define vfwmacc_vv_f64m4_m(...) __riscv_vfwmacc_vv_f64m4_tumu(__VA_ARGS__)
20102
#define vfwmacc_vf_f64m4_m(...) __riscv_vfwmacc_vf_f64m4_tumu(__VA_ARGS__)
20103
#define vfwmacc_vv_f64m8_m(...) __riscv_vfwmacc_vv_f64m8_tumu(__VA_ARGS__)
20104
#define vfwmacc_vf_f64m8_m(...) __riscv_vfwmacc_vf_f64m8_tumu(__VA_ARGS__)
20105
#define vfwnmacc_vv_f32mf2_m(...) __riscv_vfwnmacc_vv_f32mf2_tumu(__VA_ARGS__)
20106
#define vfwnmacc_vf_f32mf2_m(...) __riscv_vfwnmacc_vf_f32mf2_tumu(__VA_ARGS__)
20107
#define vfwnmacc_vv_f32m1_m(...) __riscv_vfwnmacc_vv_f32m1_tumu(__VA_ARGS__)
20108
#define vfwnmacc_vf_f32m1_m(...) __riscv_vfwnmacc_vf_f32m1_tumu(__VA_ARGS__)
20109
#define vfwnmacc_vv_f32m2_m(...) __riscv_vfwnmacc_vv_f32m2_tumu(__VA_ARGS__)
20110
#define vfwnmacc_vf_f32m2_m(...) __riscv_vfwnmacc_vf_f32m2_tumu(__VA_ARGS__)
20111
#define vfwnmacc_vv_f32m4_m(...) __riscv_vfwnmacc_vv_f32m4_tumu(__VA_ARGS__)
20112
#define vfwnmacc_vf_f32m4_m(...) __riscv_vfwnmacc_vf_f32m4_tumu(__VA_ARGS__)
20113
#define vfwnmacc_vv_f32m8_m(...) __riscv_vfwnmacc_vv_f32m8_tumu(__VA_ARGS__)
20114
#define vfwnmacc_vf_f32m8_m(...) __riscv_vfwnmacc_vf_f32m8_tumu(__VA_ARGS__)
20115
#define vfwnmacc_vv_f64m1_m(...) __riscv_vfwnmacc_vv_f64m1_tumu(__VA_ARGS__)
20116
#define vfwnmacc_vf_f64m1_m(...) __riscv_vfwnmacc_vf_f64m1_tumu(__VA_ARGS__)
20117
#define vfwnmacc_vv_f64m2_m(...) __riscv_vfwnmacc_vv_f64m2_tumu(__VA_ARGS__)
20118
#define vfwnmacc_vf_f64m2_m(...) __riscv_vfwnmacc_vf_f64m2_tumu(__VA_ARGS__)
20119
#define vfwnmacc_vv_f64m4_m(...) __riscv_vfwnmacc_vv_f64m4_tumu(__VA_ARGS__)
20120
#define vfwnmacc_vf_f64m4_m(...) __riscv_vfwnmacc_vf_f64m4_tumu(__VA_ARGS__)
20121
#define vfwnmacc_vv_f64m8_m(...) __riscv_vfwnmacc_vv_f64m8_tumu(__VA_ARGS__)
20122
#define vfwnmacc_vf_f64m8_m(...) __riscv_vfwnmacc_vf_f64m8_tumu(__VA_ARGS__)
20123
#define vfwmsac_vv_f32mf2_m(...) __riscv_vfwmsac_vv_f32mf2_tumu(__VA_ARGS__)
20124
#define vfwmsac_vf_f32mf2_m(...) __riscv_vfwmsac_vf_f32mf2_tumu(__VA_ARGS__)
20125
#define vfwmsac_vv_f32m1_m(...) __riscv_vfwmsac_vv_f32m1_tumu(__VA_ARGS__)
20126
#define vfwmsac_vf_f32m1_m(...) __riscv_vfwmsac_vf_f32m1_tumu(__VA_ARGS__)
20127
#define vfwmsac_vv_f32m2_m(...) __riscv_vfwmsac_vv_f32m2_tumu(__VA_ARGS__)
20128
#define vfwmsac_vf_f32m2_m(...) __riscv_vfwmsac_vf_f32m2_tumu(__VA_ARGS__)
20129
#define vfwmsac_vv_f32m4_m(...) __riscv_vfwmsac_vv_f32m4_tumu(__VA_ARGS__)
20130
#define vfwmsac_vf_f32m4_m(...) __riscv_vfwmsac_vf_f32m4_tumu(__VA_ARGS__)
20131
#define vfwmsac_vv_f32m8_m(...) __riscv_vfwmsac_vv_f32m8_tumu(__VA_ARGS__)
20132
#define vfwmsac_vf_f32m8_m(...) __riscv_vfwmsac_vf_f32m8_tumu(__VA_ARGS__)
20133
#define vfwmsac_vv_f64m1_m(...) __riscv_vfwmsac_vv_f64m1_tumu(__VA_ARGS__)
20134
#define vfwmsac_vf_f64m1_m(...) __riscv_vfwmsac_vf_f64m1_tumu(__VA_ARGS__)
20135
#define vfwmsac_vv_f64m2_m(...) __riscv_vfwmsac_vv_f64m2_tumu(__VA_ARGS__)
20136
#define vfwmsac_vf_f64m2_m(...) __riscv_vfwmsac_vf_f64m2_tumu(__VA_ARGS__)
20137
#define vfwmsac_vv_f64m4_m(...) __riscv_vfwmsac_vv_f64m4_tumu(__VA_ARGS__)
20138
#define vfwmsac_vf_f64m4_m(...) __riscv_vfwmsac_vf_f64m4_tumu(__VA_ARGS__)
20139
#define vfwmsac_vv_f64m8_m(...) __riscv_vfwmsac_vv_f64m8_tumu(__VA_ARGS__)
20140
#define vfwmsac_vf_f64m8_m(...) __riscv_vfwmsac_vf_f64m8_tumu(__VA_ARGS__)
20141
#define vfwnmsac_vv_f32mf2_m(...) __riscv_vfwnmsac_vv_f32mf2_tumu(__VA_ARGS__)
20142
#define vfwnmsac_vf_f32mf2_m(...) __riscv_vfwnmsac_vf_f32mf2_tumu(__VA_ARGS__)
20143
#define vfwnmsac_vv_f32m1_m(...) __riscv_vfwnmsac_vv_f32m1_tumu(__VA_ARGS__)
20144
#define vfwnmsac_vf_f32m1_m(...) __riscv_vfwnmsac_vf_f32m1_tumu(__VA_ARGS__)
20145
#define vfwnmsac_vv_f32m2_m(...) __riscv_vfwnmsac_vv_f32m2_tumu(__VA_ARGS__)
20146
#define vfwnmsac_vf_f32m2_m(...) __riscv_vfwnmsac_vf_f32m2_tumu(__VA_ARGS__)
20147
#define vfwnmsac_vv_f32m4_m(...) __riscv_vfwnmsac_vv_f32m4_tumu(__VA_ARGS__)
20148
#define vfwnmsac_vf_f32m4_m(...) __riscv_vfwnmsac_vf_f32m4_tumu(__VA_ARGS__)
20149
#define vfwnmsac_vv_f32m8_m(...) __riscv_vfwnmsac_vv_f32m8_tumu(__VA_ARGS__)
20150
#define vfwnmsac_vf_f32m8_m(...) __riscv_vfwnmsac_vf_f32m8_tumu(__VA_ARGS__)
20151
#define vfwnmsac_vv_f64m1_m(...) __riscv_vfwnmsac_vv_f64m1_tumu(__VA_ARGS__)
20152
#define vfwnmsac_vf_f64m1_m(...) __riscv_vfwnmsac_vf_f64m1_tumu(__VA_ARGS__)
20153
#define vfwnmsac_vv_f64m2_m(...) __riscv_vfwnmsac_vv_f64m2_tumu(__VA_ARGS__)
20154
#define vfwnmsac_vf_f64m2_m(...) __riscv_vfwnmsac_vf_f64m2_tumu(__VA_ARGS__)
20155
#define vfwnmsac_vv_f64m4_m(...) __riscv_vfwnmsac_vv_f64m4_tumu(__VA_ARGS__)
20156
#define vfwnmsac_vf_f64m4_m(...) __riscv_vfwnmsac_vf_f64m4_tumu(__VA_ARGS__)
20157
#define vfwnmsac_vv_f64m8_m(...) __riscv_vfwnmsac_vv_f64m8_tumu(__VA_ARGS__)
20158
#define vfwnmsac_vf_f64m8_m(...) __riscv_vfwnmsac_vf_f64m8_tumu(__VA_ARGS__)
20159
#define vfsqrt_v_f16mf4(...) __riscv_vfsqrt_v_f16mf4(__VA_ARGS__)
20160
#define vfsqrt_v_f16mf2(...) __riscv_vfsqrt_v_f16mf2(__VA_ARGS__)
20161
#define vfsqrt_v_f16m1(...) __riscv_vfsqrt_v_f16m1(__VA_ARGS__)
20162
#define vfsqrt_v_f16m2(...) __riscv_vfsqrt_v_f16m2(__VA_ARGS__)
20163
#define vfsqrt_v_f16m4(...) __riscv_vfsqrt_v_f16m4(__VA_ARGS__)
20164
#define vfsqrt_v_f16m8(...) __riscv_vfsqrt_v_f16m8(__VA_ARGS__)
20165
#define vfsqrt_v_f32mf2(...) __riscv_vfsqrt_v_f32mf2(__VA_ARGS__)
20166
#define vfsqrt_v_f32m1(...) __riscv_vfsqrt_v_f32m1(__VA_ARGS__)
20167
#define vfsqrt_v_f32m2(...) __riscv_vfsqrt_v_f32m2(__VA_ARGS__)
20168
#define vfsqrt_v_f32m4(...) __riscv_vfsqrt_v_f32m4(__VA_ARGS__)
20169
#define vfsqrt_v_f32m8(...) __riscv_vfsqrt_v_f32m8(__VA_ARGS__)
20170
#define vfsqrt_v_f64m1(...) __riscv_vfsqrt_v_f64m1(__VA_ARGS__)
20171
#define vfsqrt_v_f64m2(...) __riscv_vfsqrt_v_f64m2(__VA_ARGS__)
20172
#define vfsqrt_v_f64m4(...) __riscv_vfsqrt_v_f64m4(__VA_ARGS__)
20173
#define vfsqrt_v_f64m8(...) __riscv_vfsqrt_v_f64m8(__VA_ARGS__)
20174
// masked functions
20175
#define vfsqrt_v_f16mf4_m(...) __riscv_vfsqrt_v_f16mf4_tumu(__VA_ARGS__)
20176
#define vfsqrt_v_f16mf2_m(...) __riscv_vfsqrt_v_f16mf2_tumu(__VA_ARGS__)
20177
#define vfsqrt_v_f16m1_m(...) __riscv_vfsqrt_v_f16m1_tumu(__VA_ARGS__)
20178
#define vfsqrt_v_f16m2_m(...) __riscv_vfsqrt_v_f16m2_tumu(__VA_ARGS__)
20179
#define vfsqrt_v_f16m4_m(...) __riscv_vfsqrt_v_f16m4_tumu(__VA_ARGS__)
20180
#define vfsqrt_v_f16m8_m(...) __riscv_vfsqrt_v_f16m8_tumu(__VA_ARGS__)
20181
#define vfsqrt_v_f32mf2_m(...) __riscv_vfsqrt_v_f32mf2_tumu(__VA_ARGS__)
20182
#define vfsqrt_v_f32m1_m(...) __riscv_vfsqrt_v_f32m1_tumu(__VA_ARGS__)
20183
#define vfsqrt_v_f32m2_m(...) __riscv_vfsqrt_v_f32m2_tumu(__VA_ARGS__)
20184
#define vfsqrt_v_f32m4_m(...) __riscv_vfsqrt_v_f32m4_tumu(__VA_ARGS__)
20185
#define vfsqrt_v_f32m8_m(...) __riscv_vfsqrt_v_f32m8_tumu(__VA_ARGS__)
20186
#define vfsqrt_v_f64m1_m(...) __riscv_vfsqrt_v_f64m1_tumu(__VA_ARGS__)
20187
#define vfsqrt_v_f64m2_m(...) __riscv_vfsqrt_v_f64m2_tumu(__VA_ARGS__)
20188
#define vfsqrt_v_f64m4_m(...) __riscv_vfsqrt_v_f64m4_tumu(__VA_ARGS__)
20189
#define vfsqrt_v_f64m8_m(...) __riscv_vfsqrt_v_f64m8_tumu(__VA_ARGS__)
20190
#define vfrsqrt7_v_f16mf4(...) __riscv_vfrsqrt7_v_f16mf4(__VA_ARGS__)
20191
#define vfrsqrt7_v_f16mf2(...) __riscv_vfrsqrt7_v_f16mf2(__VA_ARGS__)
20192
#define vfrsqrt7_v_f16m1(...) __riscv_vfrsqrt7_v_f16m1(__VA_ARGS__)
20193
#define vfrsqrt7_v_f16m2(...) __riscv_vfrsqrt7_v_f16m2(__VA_ARGS__)
20194
#define vfrsqrt7_v_f16m4(...) __riscv_vfrsqrt7_v_f16m4(__VA_ARGS__)
20195
#define vfrsqrt7_v_f16m8(...) __riscv_vfrsqrt7_v_f16m8(__VA_ARGS__)
20196
#define vfrsqrt7_v_f32mf2(...) __riscv_vfrsqrt7_v_f32mf2(__VA_ARGS__)
20197
#define vfrsqrt7_v_f32m1(...) __riscv_vfrsqrt7_v_f32m1(__VA_ARGS__)
20198
#define vfrsqrt7_v_f32m2(...) __riscv_vfrsqrt7_v_f32m2(__VA_ARGS__)
20199
#define vfrsqrt7_v_f32m4(...) __riscv_vfrsqrt7_v_f32m4(__VA_ARGS__)
20200
#define vfrsqrt7_v_f32m8(...) __riscv_vfrsqrt7_v_f32m8(__VA_ARGS__)
20201
#define vfrsqrt7_v_f64m1(...) __riscv_vfrsqrt7_v_f64m1(__VA_ARGS__)
20202
#define vfrsqrt7_v_f64m2(...) __riscv_vfrsqrt7_v_f64m2(__VA_ARGS__)
20203
#define vfrsqrt7_v_f64m4(...) __riscv_vfrsqrt7_v_f64m4(__VA_ARGS__)
20204
#define vfrsqrt7_v_f64m8(...) __riscv_vfrsqrt7_v_f64m8(__VA_ARGS__)
20205
// masked functions
20206
#define vfrsqrt7_v_f16mf4_m(...) __riscv_vfrsqrt7_v_f16mf4_tumu(__VA_ARGS__)
20207
#define vfrsqrt7_v_f16mf2_m(...) __riscv_vfrsqrt7_v_f16mf2_tumu(__VA_ARGS__)
20208
#define vfrsqrt7_v_f16m1_m(...) __riscv_vfrsqrt7_v_f16m1_tumu(__VA_ARGS__)
20209
#define vfrsqrt7_v_f16m2_m(...) __riscv_vfrsqrt7_v_f16m2_tumu(__VA_ARGS__)
20210
#define vfrsqrt7_v_f16m4_m(...) __riscv_vfrsqrt7_v_f16m4_tumu(__VA_ARGS__)
20211
#define vfrsqrt7_v_f16m8_m(...) __riscv_vfrsqrt7_v_f16m8_tumu(__VA_ARGS__)
20212
#define vfrsqrt7_v_f32mf2_m(...) __riscv_vfrsqrt7_v_f32mf2_tumu(__VA_ARGS__)
20213
#define vfrsqrt7_v_f32m1_m(...) __riscv_vfrsqrt7_v_f32m1_tumu(__VA_ARGS__)
20214
#define vfrsqrt7_v_f32m2_m(...) __riscv_vfrsqrt7_v_f32m2_tumu(__VA_ARGS__)
20215
#define vfrsqrt7_v_f32m4_m(...) __riscv_vfrsqrt7_v_f32m4_tumu(__VA_ARGS__)
20216
#define vfrsqrt7_v_f32m8_m(...) __riscv_vfrsqrt7_v_f32m8_tumu(__VA_ARGS__)
20217
#define vfrsqrt7_v_f64m1_m(...) __riscv_vfrsqrt7_v_f64m1_tumu(__VA_ARGS__)
20218
#define vfrsqrt7_v_f64m2_m(...) __riscv_vfrsqrt7_v_f64m2_tumu(__VA_ARGS__)
20219
#define vfrsqrt7_v_f64m4_m(...) __riscv_vfrsqrt7_v_f64m4_tumu(__VA_ARGS__)
20220
#define vfrsqrt7_v_f64m8_m(...) __riscv_vfrsqrt7_v_f64m8_tumu(__VA_ARGS__)
20221
#define vfrec7_v_f16mf4(...) __riscv_vfrec7_v_f16mf4(__VA_ARGS__)
20222
#define vfrec7_v_f16mf2(...) __riscv_vfrec7_v_f16mf2(__VA_ARGS__)
20223
#define vfrec7_v_f16m1(...) __riscv_vfrec7_v_f16m1(__VA_ARGS__)
20224
#define vfrec7_v_f16m2(...) __riscv_vfrec7_v_f16m2(__VA_ARGS__)
20225
#define vfrec7_v_f16m4(...) __riscv_vfrec7_v_f16m4(__VA_ARGS__)
20226
#define vfrec7_v_f16m8(...) __riscv_vfrec7_v_f16m8(__VA_ARGS__)
20227
#define vfrec7_v_f32mf2(...) __riscv_vfrec7_v_f32mf2(__VA_ARGS__)
20228
#define vfrec7_v_f32m1(...) __riscv_vfrec7_v_f32m1(__VA_ARGS__)
20229
#define vfrec7_v_f32m2(...) __riscv_vfrec7_v_f32m2(__VA_ARGS__)
20230
#define vfrec7_v_f32m4(...) __riscv_vfrec7_v_f32m4(__VA_ARGS__)
20231
#define vfrec7_v_f32m8(...) __riscv_vfrec7_v_f32m8(__VA_ARGS__)
20232
#define vfrec7_v_f64m1(...) __riscv_vfrec7_v_f64m1(__VA_ARGS__)
20233
#define vfrec7_v_f64m2(...) __riscv_vfrec7_v_f64m2(__VA_ARGS__)
20234
#define vfrec7_v_f64m4(...) __riscv_vfrec7_v_f64m4(__VA_ARGS__)
20235
#define vfrec7_v_f64m8(...) __riscv_vfrec7_v_f64m8(__VA_ARGS__)
20236
// masked functions
20237
#define vfrec7_v_f16mf4_m(...) __riscv_vfrec7_v_f16mf4_tumu(__VA_ARGS__)
20238
#define vfrec7_v_f16mf2_m(...) __riscv_vfrec7_v_f16mf2_tumu(__VA_ARGS__)
20239
#define vfrec7_v_f16m1_m(...) __riscv_vfrec7_v_f16m1_tumu(__VA_ARGS__)
20240
#define vfrec7_v_f16m2_m(...) __riscv_vfrec7_v_f16m2_tumu(__VA_ARGS__)
20241
#define vfrec7_v_f16m4_m(...) __riscv_vfrec7_v_f16m4_tumu(__VA_ARGS__)
20242
#define vfrec7_v_f16m8_m(...) __riscv_vfrec7_v_f16m8_tumu(__VA_ARGS__)
20243
#define vfrec7_v_f32mf2_m(...) __riscv_vfrec7_v_f32mf2_tumu(__VA_ARGS__)
20244
#define vfrec7_v_f32m1_m(...) __riscv_vfrec7_v_f32m1_tumu(__VA_ARGS__)
20245
#define vfrec7_v_f32m2_m(...) __riscv_vfrec7_v_f32m2_tumu(__VA_ARGS__)
20246
#define vfrec7_v_f32m4_m(...) __riscv_vfrec7_v_f32m4_tumu(__VA_ARGS__)
20247
#define vfrec7_v_f32m8_m(...) __riscv_vfrec7_v_f32m8_tumu(__VA_ARGS__)
20248
#define vfrec7_v_f64m1_m(...) __riscv_vfrec7_v_f64m1_tumu(__VA_ARGS__)
20249
#define vfrec7_v_f64m2_m(...) __riscv_vfrec7_v_f64m2_tumu(__VA_ARGS__)
20250
#define vfrec7_v_f64m4_m(...) __riscv_vfrec7_v_f64m4_tumu(__VA_ARGS__)
20251
#define vfrec7_v_f64m8_m(...) __riscv_vfrec7_v_f64m8_tumu(__VA_ARGS__)
20252
#define vfmin_vv_f16mf4(...) __riscv_vfmin_vv_f16mf4(__VA_ARGS__)
20253
#define vfmin_vf_f16mf4(...) __riscv_vfmin_vf_f16mf4(__VA_ARGS__)
20254
#define vfmin_vv_f16mf2(...) __riscv_vfmin_vv_f16mf2(__VA_ARGS__)
20255
#define vfmin_vf_f16mf2(...) __riscv_vfmin_vf_f16mf2(__VA_ARGS__)
20256
#define vfmin_vv_f16m1(...) __riscv_vfmin_vv_f16m1(__VA_ARGS__)
20257
#define vfmin_vf_f16m1(...) __riscv_vfmin_vf_f16m1(__VA_ARGS__)
20258
#define vfmin_vv_f16m2(...) __riscv_vfmin_vv_f16m2(__VA_ARGS__)
20259
#define vfmin_vf_f16m2(...) __riscv_vfmin_vf_f16m2(__VA_ARGS__)
20260
#define vfmin_vv_f16m4(...) __riscv_vfmin_vv_f16m4(__VA_ARGS__)
20261
#define vfmin_vf_f16m4(...) __riscv_vfmin_vf_f16m4(__VA_ARGS__)
20262
#define vfmin_vv_f16m8(...) __riscv_vfmin_vv_f16m8(__VA_ARGS__)
20263
#define vfmin_vf_f16m8(...) __riscv_vfmin_vf_f16m8(__VA_ARGS__)
20264
#define vfmin_vv_f32mf2(...) __riscv_vfmin_vv_f32mf2(__VA_ARGS__)
20265
#define vfmin_vf_f32mf2(...) __riscv_vfmin_vf_f32mf2(__VA_ARGS__)
20266
#define vfmin_vv_f32m1(...) __riscv_vfmin_vv_f32m1(__VA_ARGS__)
20267
#define vfmin_vf_f32m1(...) __riscv_vfmin_vf_f32m1(__VA_ARGS__)
20268
#define vfmin_vv_f32m2(...) __riscv_vfmin_vv_f32m2(__VA_ARGS__)
20269
#define vfmin_vf_f32m2(...) __riscv_vfmin_vf_f32m2(__VA_ARGS__)
20270
#define vfmin_vv_f32m4(...) __riscv_vfmin_vv_f32m4(__VA_ARGS__)
20271
#define vfmin_vf_f32m4(...) __riscv_vfmin_vf_f32m4(__VA_ARGS__)
20272
#define vfmin_vv_f32m8(...) __riscv_vfmin_vv_f32m8(__VA_ARGS__)
20273
#define vfmin_vf_f32m8(...) __riscv_vfmin_vf_f32m8(__VA_ARGS__)
20274
#define vfmin_vv_f64m1(...) __riscv_vfmin_vv_f64m1(__VA_ARGS__)
20275
#define vfmin_vf_f64m1(...) __riscv_vfmin_vf_f64m1(__VA_ARGS__)
20276
#define vfmin_vv_f64m2(...) __riscv_vfmin_vv_f64m2(__VA_ARGS__)
20277
#define vfmin_vf_f64m2(...) __riscv_vfmin_vf_f64m2(__VA_ARGS__)
20278
#define vfmin_vv_f64m4(...) __riscv_vfmin_vv_f64m4(__VA_ARGS__)
20279
#define vfmin_vf_f64m4(...) __riscv_vfmin_vf_f64m4(__VA_ARGS__)
20280
#define vfmin_vv_f64m8(...) __riscv_vfmin_vv_f64m8(__VA_ARGS__)
20281
#define vfmin_vf_f64m8(...) __riscv_vfmin_vf_f64m8(__VA_ARGS__)
20282
#define vfmax_vv_f16mf4(...) __riscv_vfmax_vv_f16mf4(__VA_ARGS__)
20283
#define vfmax_vf_f16mf4(...) __riscv_vfmax_vf_f16mf4(__VA_ARGS__)
20284
#define vfmax_vv_f16mf2(...) __riscv_vfmax_vv_f16mf2(__VA_ARGS__)
20285
#define vfmax_vf_f16mf2(...) __riscv_vfmax_vf_f16mf2(__VA_ARGS__)
20286
#define vfmax_vv_f16m1(...) __riscv_vfmax_vv_f16m1(__VA_ARGS__)
20287
#define vfmax_vf_f16m1(...) __riscv_vfmax_vf_f16m1(__VA_ARGS__)
20288
#define vfmax_vv_f16m2(...) __riscv_vfmax_vv_f16m2(__VA_ARGS__)
20289
#define vfmax_vf_f16m2(...) __riscv_vfmax_vf_f16m2(__VA_ARGS__)
20290
#define vfmax_vv_f16m4(...) __riscv_vfmax_vv_f16m4(__VA_ARGS__)
20291
#define vfmax_vf_f16m4(...) __riscv_vfmax_vf_f16m4(__VA_ARGS__)
20292
#define vfmax_vv_f16m8(...) __riscv_vfmax_vv_f16m8(__VA_ARGS__)
20293
#define vfmax_vf_f16m8(...) __riscv_vfmax_vf_f16m8(__VA_ARGS__)
20294
#define vfmax_vv_f32mf2(...) __riscv_vfmax_vv_f32mf2(__VA_ARGS__)
20295
#define vfmax_vf_f32mf2(...) __riscv_vfmax_vf_f32mf2(__VA_ARGS__)
20296
#define vfmax_vv_f32m1(...) __riscv_vfmax_vv_f32m1(__VA_ARGS__)
20297
#define vfmax_vf_f32m1(...) __riscv_vfmax_vf_f32m1(__VA_ARGS__)
20298
#define vfmax_vv_f32m2(...) __riscv_vfmax_vv_f32m2(__VA_ARGS__)
20299
#define vfmax_vf_f32m2(...) __riscv_vfmax_vf_f32m2(__VA_ARGS__)
20300
#define vfmax_vv_f32m4(...) __riscv_vfmax_vv_f32m4(__VA_ARGS__)
20301
#define vfmax_vf_f32m4(...) __riscv_vfmax_vf_f32m4(__VA_ARGS__)
20302
#define vfmax_vv_f32m8(...) __riscv_vfmax_vv_f32m8(__VA_ARGS__)
20303
#define vfmax_vf_f32m8(...) __riscv_vfmax_vf_f32m8(__VA_ARGS__)
20304
#define vfmax_vv_f64m1(...) __riscv_vfmax_vv_f64m1(__VA_ARGS__)
20305
#define vfmax_vf_f64m1(...) __riscv_vfmax_vf_f64m1(__VA_ARGS__)
20306
#define vfmax_vv_f64m2(...) __riscv_vfmax_vv_f64m2(__VA_ARGS__)
20307
#define vfmax_vf_f64m2(...) __riscv_vfmax_vf_f64m2(__VA_ARGS__)
20308
#define vfmax_vv_f64m4(...) __riscv_vfmax_vv_f64m4(__VA_ARGS__)
20309
#define vfmax_vf_f64m4(...) __riscv_vfmax_vf_f64m4(__VA_ARGS__)
20310
#define vfmax_vv_f64m8(...) __riscv_vfmax_vv_f64m8(__VA_ARGS__)
20311
#define vfmax_vf_f64m8(...) __riscv_vfmax_vf_f64m8(__VA_ARGS__)
20312
// masked functions
20313
#define vfmin_vv_f16mf4_m(...) __riscv_vfmin_vv_f16mf4_tumu(__VA_ARGS__)
20314
#define vfmin_vf_f16mf4_m(...) __riscv_vfmin_vf_f16mf4_tumu(__VA_ARGS__)
20315
#define vfmin_vv_f16mf2_m(...) __riscv_vfmin_vv_f16mf2_tumu(__VA_ARGS__)
20316
#define vfmin_vf_f16mf2_m(...) __riscv_vfmin_vf_f16mf2_tumu(__VA_ARGS__)
20317
#define vfmin_vv_f16m1_m(...) __riscv_vfmin_vv_f16m1_tumu(__VA_ARGS__)
20318
#define vfmin_vf_f16m1_m(...) __riscv_vfmin_vf_f16m1_tumu(__VA_ARGS__)
20319
#define vfmin_vv_f16m2_m(...) __riscv_vfmin_vv_f16m2_tumu(__VA_ARGS__)
20320
#define vfmin_vf_f16m2_m(...) __riscv_vfmin_vf_f16m2_tumu(__VA_ARGS__)
20321
#define vfmin_vv_f16m4_m(...) __riscv_vfmin_vv_f16m4_tumu(__VA_ARGS__)
20322
#define vfmin_vf_f16m4_m(...) __riscv_vfmin_vf_f16m4_tumu(__VA_ARGS__)
20323
#define vfmin_vv_f16m8_m(...) __riscv_vfmin_vv_f16m8_tumu(__VA_ARGS__)
20324
#define vfmin_vf_f16m8_m(...) __riscv_vfmin_vf_f16m8_tumu(__VA_ARGS__)
20325
#define vfmin_vv_f32mf2_m(...) __riscv_vfmin_vv_f32mf2_tumu(__VA_ARGS__)
20326
#define vfmin_vf_f32mf2_m(...) __riscv_vfmin_vf_f32mf2_tumu(__VA_ARGS__)
20327
#define vfmin_vv_f32m1_m(...) __riscv_vfmin_vv_f32m1_tumu(__VA_ARGS__)
20328
#define vfmin_vf_f32m1_m(...) __riscv_vfmin_vf_f32m1_tumu(__VA_ARGS__)
20329
#define vfmin_vv_f32m2_m(...) __riscv_vfmin_vv_f32m2_tumu(__VA_ARGS__)
20330
#define vfmin_vf_f32m2_m(...) __riscv_vfmin_vf_f32m2_tumu(__VA_ARGS__)
20331
#define vfmin_vv_f32m4_m(...) __riscv_vfmin_vv_f32m4_tumu(__VA_ARGS__)
20332
#define vfmin_vf_f32m4_m(...) __riscv_vfmin_vf_f32m4_tumu(__VA_ARGS__)
20333
#define vfmin_vv_f32m8_m(...) __riscv_vfmin_vv_f32m8_tumu(__VA_ARGS__)
20334
#define vfmin_vf_f32m8_m(...) __riscv_vfmin_vf_f32m8_tumu(__VA_ARGS__)
20335
#define vfmin_vv_f64m1_m(...) __riscv_vfmin_vv_f64m1_tumu(__VA_ARGS__)
20336
#define vfmin_vf_f64m1_m(...) __riscv_vfmin_vf_f64m1_tumu(__VA_ARGS__)
20337
#define vfmin_vv_f64m2_m(...) __riscv_vfmin_vv_f64m2_tumu(__VA_ARGS__)
20338
#define vfmin_vf_f64m2_m(...) __riscv_vfmin_vf_f64m2_tumu(__VA_ARGS__)
20339
#define vfmin_vv_f64m4_m(...) __riscv_vfmin_vv_f64m4_tumu(__VA_ARGS__)
20340
#define vfmin_vf_f64m4_m(...) __riscv_vfmin_vf_f64m4_tumu(__VA_ARGS__)
20341
#define vfmin_vv_f64m8_m(...) __riscv_vfmin_vv_f64m8_tumu(__VA_ARGS__)
20342
#define vfmin_vf_f64m8_m(...) __riscv_vfmin_vf_f64m8_tumu(__VA_ARGS__)
20343
#define vfmax_vv_f16mf4_m(...) __riscv_vfmax_vv_f16mf4_tumu(__VA_ARGS__)
20344
#define vfmax_vf_f16mf4_m(...) __riscv_vfmax_vf_f16mf4_tumu(__VA_ARGS__)
20345
#define vfmax_vv_f16mf2_m(...) __riscv_vfmax_vv_f16mf2_tumu(__VA_ARGS__)
20346
#define vfmax_vf_f16mf2_m(...) __riscv_vfmax_vf_f16mf2_tumu(__VA_ARGS__)
20347
#define vfmax_vv_f16m1_m(...) __riscv_vfmax_vv_f16m1_tumu(__VA_ARGS__)
20348
#define vfmax_vf_f16m1_m(...) __riscv_vfmax_vf_f16m1_tumu(__VA_ARGS__)
20349
#define vfmax_vv_f16m2_m(...) __riscv_vfmax_vv_f16m2_tumu(__VA_ARGS__)
20350
#define vfmax_vf_f16m2_m(...) __riscv_vfmax_vf_f16m2_tumu(__VA_ARGS__)
20351
#define vfmax_vv_f16m4_m(...) __riscv_vfmax_vv_f16m4_tumu(__VA_ARGS__)
20352
#define vfmax_vf_f16m4_m(...) __riscv_vfmax_vf_f16m4_tumu(__VA_ARGS__)
20353
#define vfmax_vv_f16m8_m(...) __riscv_vfmax_vv_f16m8_tumu(__VA_ARGS__)
20354
#define vfmax_vf_f16m8_m(...) __riscv_vfmax_vf_f16m8_tumu(__VA_ARGS__)
20355
#define vfmax_vv_f32mf2_m(...) __riscv_vfmax_vv_f32mf2_tumu(__VA_ARGS__)
20356
#define vfmax_vf_f32mf2_m(...) __riscv_vfmax_vf_f32mf2_tumu(__VA_ARGS__)
20357
#define vfmax_vv_f32m1_m(...) __riscv_vfmax_vv_f32m1_tumu(__VA_ARGS__)
20358
#define vfmax_vf_f32m1_m(...) __riscv_vfmax_vf_f32m1_tumu(__VA_ARGS__)
20359
#define vfmax_vv_f32m2_m(...) __riscv_vfmax_vv_f32m2_tumu(__VA_ARGS__)
20360
#define vfmax_vf_f32m2_m(...) __riscv_vfmax_vf_f32m2_tumu(__VA_ARGS__)
20361
#define vfmax_vv_f32m4_m(...) __riscv_vfmax_vv_f32m4_tumu(__VA_ARGS__)
20362
#define vfmax_vf_f32m4_m(...) __riscv_vfmax_vf_f32m4_tumu(__VA_ARGS__)
20363
#define vfmax_vv_f32m8_m(...) __riscv_vfmax_vv_f32m8_tumu(__VA_ARGS__)
20364
#define vfmax_vf_f32m8_m(...) __riscv_vfmax_vf_f32m8_tumu(__VA_ARGS__)
20365
#define vfmax_vv_f64m1_m(...) __riscv_vfmax_vv_f64m1_tumu(__VA_ARGS__)
20366
#define vfmax_vf_f64m1_m(...) __riscv_vfmax_vf_f64m1_tumu(__VA_ARGS__)
20367
#define vfmax_vv_f64m2_m(...) __riscv_vfmax_vv_f64m2_tumu(__VA_ARGS__)
20368
#define vfmax_vf_f64m2_m(...) __riscv_vfmax_vf_f64m2_tumu(__VA_ARGS__)
20369
#define vfmax_vv_f64m4_m(...) __riscv_vfmax_vv_f64m4_tumu(__VA_ARGS__)
20370
#define vfmax_vf_f64m4_m(...) __riscv_vfmax_vf_f64m4_tumu(__VA_ARGS__)
20371
#define vfmax_vv_f64m8_m(...) __riscv_vfmax_vv_f64m8_tumu(__VA_ARGS__)
20372
#define vfmax_vf_f64m8_m(...) __riscv_vfmax_vf_f64m8_tumu(__VA_ARGS__)
20373
#define vfsgnj_vv_f16mf4(...) __riscv_vfsgnj_vv_f16mf4(__VA_ARGS__)
20374
#define vfsgnj_vf_f16mf4(...) __riscv_vfsgnj_vf_f16mf4(__VA_ARGS__)
20375
#define vfsgnj_vv_f16mf2(...) __riscv_vfsgnj_vv_f16mf2(__VA_ARGS__)
20376
#define vfsgnj_vf_f16mf2(...) __riscv_vfsgnj_vf_f16mf2(__VA_ARGS__)
20377
#define vfsgnj_vv_f16m1(...) __riscv_vfsgnj_vv_f16m1(__VA_ARGS__)
20378
#define vfsgnj_vf_f16m1(...) __riscv_vfsgnj_vf_f16m1(__VA_ARGS__)
20379
#define vfsgnj_vv_f16m2(...) __riscv_vfsgnj_vv_f16m2(__VA_ARGS__)
20380
#define vfsgnj_vf_f16m2(...) __riscv_vfsgnj_vf_f16m2(__VA_ARGS__)
20381
#define vfsgnj_vv_f16m4(...) __riscv_vfsgnj_vv_f16m4(__VA_ARGS__)
20382
#define vfsgnj_vf_f16m4(...) __riscv_vfsgnj_vf_f16m4(__VA_ARGS__)
20383
#define vfsgnj_vv_f16m8(...) __riscv_vfsgnj_vv_f16m8(__VA_ARGS__)
20384
#define vfsgnj_vf_f16m8(...) __riscv_vfsgnj_vf_f16m8(__VA_ARGS__)
20385
#define vfsgnj_vv_f32mf2(...) __riscv_vfsgnj_vv_f32mf2(__VA_ARGS__)
20386
#define vfsgnj_vf_f32mf2(...) __riscv_vfsgnj_vf_f32mf2(__VA_ARGS__)
20387
#define vfsgnj_vv_f32m1(...) __riscv_vfsgnj_vv_f32m1(__VA_ARGS__)
20388
#define vfsgnj_vf_f32m1(...) __riscv_vfsgnj_vf_f32m1(__VA_ARGS__)
20389
#define vfsgnj_vv_f32m2(...) __riscv_vfsgnj_vv_f32m2(__VA_ARGS__)
20390
#define vfsgnj_vf_f32m2(...) __riscv_vfsgnj_vf_f32m2(__VA_ARGS__)
20391
#define vfsgnj_vv_f32m4(...) __riscv_vfsgnj_vv_f32m4(__VA_ARGS__)
20392
#define vfsgnj_vf_f32m4(...) __riscv_vfsgnj_vf_f32m4(__VA_ARGS__)
20393
#define vfsgnj_vv_f32m8(...) __riscv_vfsgnj_vv_f32m8(__VA_ARGS__)
20394
#define vfsgnj_vf_f32m8(...) __riscv_vfsgnj_vf_f32m8(__VA_ARGS__)
20395
#define vfsgnj_vv_f64m1(...) __riscv_vfsgnj_vv_f64m1(__VA_ARGS__)
20396
#define vfsgnj_vf_f64m1(...) __riscv_vfsgnj_vf_f64m1(__VA_ARGS__)
20397
#define vfsgnj_vv_f64m2(...) __riscv_vfsgnj_vv_f64m2(__VA_ARGS__)
20398
#define vfsgnj_vf_f64m2(...) __riscv_vfsgnj_vf_f64m2(__VA_ARGS__)
20399
#define vfsgnj_vv_f64m4(...) __riscv_vfsgnj_vv_f64m4(__VA_ARGS__)
20400
#define vfsgnj_vf_f64m4(...) __riscv_vfsgnj_vf_f64m4(__VA_ARGS__)
20401
#define vfsgnj_vv_f64m8(...) __riscv_vfsgnj_vv_f64m8(__VA_ARGS__)
20402
#define vfsgnj_vf_f64m8(...) __riscv_vfsgnj_vf_f64m8(__VA_ARGS__)
20403
#define vfsgnjn_vv_f16mf4(...) __riscv_vfsgnjn_vv_f16mf4(__VA_ARGS__)
20404
#define vfsgnjn_vf_f16mf4(...) __riscv_vfsgnjn_vf_f16mf4(__VA_ARGS__)
20405
#define vfsgnjn_vv_f16mf2(...) __riscv_vfsgnjn_vv_f16mf2(__VA_ARGS__)
20406
#define vfsgnjn_vf_f16mf2(...) __riscv_vfsgnjn_vf_f16mf2(__VA_ARGS__)
20407
#define vfsgnjn_vv_f16m1(...) __riscv_vfsgnjn_vv_f16m1(__VA_ARGS__)
20408
#define vfsgnjn_vf_f16m1(...) __riscv_vfsgnjn_vf_f16m1(__VA_ARGS__)
20409
#define vfsgnjn_vv_f16m2(...) __riscv_vfsgnjn_vv_f16m2(__VA_ARGS__)
20410
#define vfsgnjn_vf_f16m2(...) __riscv_vfsgnjn_vf_f16m2(__VA_ARGS__)
20411
#define vfsgnjn_vv_f16m4(...) __riscv_vfsgnjn_vv_f16m4(__VA_ARGS__)
20412
#define vfsgnjn_vf_f16m4(...) __riscv_vfsgnjn_vf_f16m4(__VA_ARGS__)
20413
#define vfsgnjn_vv_f16m8(...) __riscv_vfsgnjn_vv_f16m8(__VA_ARGS__)
20414
#define vfsgnjn_vf_f16m8(...) __riscv_vfsgnjn_vf_f16m8(__VA_ARGS__)
20415
#define vfsgnjn_vv_f32mf2(...) __riscv_vfsgnjn_vv_f32mf2(__VA_ARGS__)
20416
#define vfsgnjn_vf_f32mf2(...) __riscv_vfsgnjn_vf_f32mf2(__VA_ARGS__)
20417
#define vfsgnjn_vv_f32m1(...) __riscv_vfsgnjn_vv_f32m1(__VA_ARGS__)
20418
#define vfsgnjn_vf_f32m1(...) __riscv_vfsgnjn_vf_f32m1(__VA_ARGS__)
20419
#define vfsgnjn_vv_f32m2(...) __riscv_vfsgnjn_vv_f32m2(__VA_ARGS__)
20420
#define vfsgnjn_vf_f32m2(...) __riscv_vfsgnjn_vf_f32m2(__VA_ARGS__)
20421
#define vfsgnjn_vv_f32m4(...) __riscv_vfsgnjn_vv_f32m4(__VA_ARGS__)
20422
#define vfsgnjn_vf_f32m4(...) __riscv_vfsgnjn_vf_f32m4(__VA_ARGS__)
20423
#define vfsgnjn_vv_f32m8(...) __riscv_vfsgnjn_vv_f32m8(__VA_ARGS__)
20424
#define vfsgnjn_vf_f32m8(...) __riscv_vfsgnjn_vf_f32m8(__VA_ARGS__)
20425
#define vfsgnjn_vv_f64m1(...) __riscv_vfsgnjn_vv_f64m1(__VA_ARGS__)
20426
#define vfsgnjn_vf_f64m1(...) __riscv_vfsgnjn_vf_f64m1(__VA_ARGS__)
20427
#define vfsgnjn_vv_f64m2(...) __riscv_vfsgnjn_vv_f64m2(__VA_ARGS__)
20428
#define vfsgnjn_vf_f64m2(...) __riscv_vfsgnjn_vf_f64m2(__VA_ARGS__)
20429
#define vfsgnjn_vv_f64m4(...) __riscv_vfsgnjn_vv_f64m4(__VA_ARGS__)
20430
#define vfsgnjn_vf_f64m4(...) __riscv_vfsgnjn_vf_f64m4(__VA_ARGS__)
20431
#define vfsgnjn_vv_f64m8(...) __riscv_vfsgnjn_vv_f64m8(__VA_ARGS__)
20432
#define vfsgnjn_vf_f64m8(...) __riscv_vfsgnjn_vf_f64m8(__VA_ARGS__)
20433
#define vfsgnjx_vv_f16mf4(...) __riscv_vfsgnjx_vv_f16mf4(__VA_ARGS__)
20434
#define vfsgnjx_vf_f16mf4(...) __riscv_vfsgnjx_vf_f16mf4(__VA_ARGS__)
20435
#define vfsgnjx_vv_f16mf2(...) __riscv_vfsgnjx_vv_f16mf2(__VA_ARGS__)
20436
#define vfsgnjx_vf_f16mf2(...) __riscv_vfsgnjx_vf_f16mf2(__VA_ARGS__)
20437
#define vfsgnjx_vv_f16m1(...) __riscv_vfsgnjx_vv_f16m1(__VA_ARGS__)
20438
#define vfsgnjx_vf_f16m1(...) __riscv_vfsgnjx_vf_f16m1(__VA_ARGS__)
20439
#define vfsgnjx_vv_f16m2(...) __riscv_vfsgnjx_vv_f16m2(__VA_ARGS__)
20440
#define vfsgnjx_vf_f16m2(...) __riscv_vfsgnjx_vf_f16m2(__VA_ARGS__)
20441
#define vfsgnjx_vv_f16m4(...) __riscv_vfsgnjx_vv_f16m4(__VA_ARGS__)
20442
#define vfsgnjx_vf_f16m4(...) __riscv_vfsgnjx_vf_f16m4(__VA_ARGS__)
20443
#define vfsgnjx_vv_f16m8(...) __riscv_vfsgnjx_vv_f16m8(__VA_ARGS__)
20444
#define vfsgnjx_vf_f16m8(...) __riscv_vfsgnjx_vf_f16m8(__VA_ARGS__)
20445
#define vfsgnjx_vv_f32mf2(...) __riscv_vfsgnjx_vv_f32mf2(__VA_ARGS__)
20446
#define vfsgnjx_vf_f32mf2(...) __riscv_vfsgnjx_vf_f32mf2(__VA_ARGS__)
20447
#define vfsgnjx_vv_f32m1(...) __riscv_vfsgnjx_vv_f32m1(__VA_ARGS__)
20448
#define vfsgnjx_vf_f32m1(...) __riscv_vfsgnjx_vf_f32m1(__VA_ARGS__)
20449
#define vfsgnjx_vv_f32m2(...) __riscv_vfsgnjx_vv_f32m2(__VA_ARGS__)
20450
#define vfsgnjx_vf_f32m2(...) __riscv_vfsgnjx_vf_f32m2(__VA_ARGS__)
20451
#define vfsgnjx_vv_f32m4(...) __riscv_vfsgnjx_vv_f32m4(__VA_ARGS__)
20452
#define vfsgnjx_vf_f32m4(...) __riscv_vfsgnjx_vf_f32m4(__VA_ARGS__)
20453
#define vfsgnjx_vv_f32m8(...) __riscv_vfsgnjx_vv_f32m8(__VA_ARGS__)
20454
#define vfsgnjx_vf_f32m8(...) __riscv_vfsgnjx_vf_f32m8(__VA_ARGS__)
20455
#define vfsgnjx_vv_f64m1(...) __riscv_vfsgnjx_vv_f64m1(__VA_ARGS__)
20456
#define vfsgnjx_vf_f64m1(...) __riscv_vfsgnjx_vf_f64m1(__VA_ARGS__)
20457
#define vfsgnjx_vv_f64m2(...) __riscv_vfsgnjx_vv_f64m2(__VA_ARGS__)
20458
#define vfsgnjx_vf_f64m2(...) __riscv_vfsgnjx_vf_f64m2(__VA_ARGS__)
20459
#define vfsgnjx_vv_f64m4(...) __riscv_vfsgnjx_vv_f64m4(__VA_ARGS__)
20460
#define vfsgnjx_vf_f64m4(...) __riscv_vfsgnjx_vf_f64m4(__VA_ARGS__)
20461
#define vfsgnjx_vv_f64m8(...) __riscv_vfsgnjx_vv_f64m8(__VA_ARGS__)
20462
#define vfsgnjx_vf_f64m8(...) __riscv_vfsgnjx_vf_f64m8(__VA_ARGS__)
20463
// masked functions
20464
#define vfsgnj_vv_f16mf4_m(...) __riscv_vfsgnj_vv_f16mf4_tumu(__VA_ARGS__)
20465
#define vfsgnj_vf_f16mf4_m(...) __riscv_vfsgnj_vf_f16mf4_tumu(__VA_ARGS__)
20466
#define vfsgnj_vv_f16mf2_m(...) __riscv_vfsgnj_vv_f16mf2_tumu(__VA_ARGS__)
20467
#define vfsgnj_vf_f16mf2_m(...) __riscv_vfsgnj_vf_f16mf2_tumu(__VA_ARGS__)
20468
#define vfsgnj_vv_f16m1_m(...) __riscv_vfsgnj_vv_f16m1_tumu(__VA_ARGS__)
20469
#define vfsgnj_vf_f16m1_m(...) __riscv_vfsgnj_vf_f16m1_tumu(__VA_ARGS__)
20470
#define vfsgnj_vv_f16m2_m(...) __riscv_vfsgnj_vv_f16m2_tumu(__VA_ARGS__)
20471
#define vfsgnj_vf_f16m2_m(...) __riscv_vfsgnj_vf_f16m2_tumu(__VA_ARGS__)
20472
#define vfsgnj_vv_f16m4_m(...) __riscv_vfsgnj_vv_f16m4_tumu(__VA_ARGS__)
20473
#define vfsgnj_vf_f16m4_m(...) __riscv_vfsgnj_vf_f16m4_tumu(__VA_ARGS__)
20474
#define vfsgnj_vv_f16m8_m(...) __riscv_vfsgnj_vv_f16m8_tumu(__VA_ARGS__)
20475
#define vfsgnj_vf_f16m8_m(...) __riscv_vfsgnj_vf_f16m8_tumu(__VA_ARGS__)
20476
#define vfsgnj_vv_f32mf2_m(...) __riscv_vfsgnj_vv_f32mf2_tumu(__VA_ARGS__)
20477
#define vfsgnj_vf_f32mf2_m(...) __riscv_vfsgnj_vf_f32mf2_tumu(__VA_ARGS__)
20478
#define vfsgnj_vv_f32m1_m(...) __riscv_vfsgnj_vv_f32m1_tumu(__VA_ARGS__)
20479
#define vfsgnj_vf_f32m1_m(...) __riscv_vfsgnj_vf_f32m1_tumu(__VA_ARGS__)
20480
#define vfsgnj_vv_f32m2_m(...) __riscv_vfsgnj_vv_f32m2_tumu(__VA_ARGS__)
20481
#define vfsgnj_vf_f32m2_m(...) __riscv_vfsgnj_vf_f32m2_tumu(__VA_ARGS__)
20482
#define vfsgnj_vv_f32m4_m(...) __riscv_vfsgnj_vv_f32m4_tumu(__VA_ARGS__)
20483
#define vfsgnj_vf_f32m4_m(...) __riscv_vfsgnj_vf_f32m4_tumu(__VA_ARGS__)
20484
#define vfsgnj_vv_f32m8_m(...) __riscv_vfsgnj_vv_f32m8_tumu(__VA_ARGS__)
20485
#define vfsgnj_vf_f32m8_m(...) __riscv_vfsgnj_vf_f32m8_tumu(__VA_ARGS__)
20486
#define vfsgnj_vv_f64m1_m(...) __riscv_vfsgnj_vv_f64m1_tumu(__VA_ARGS__)
20487
#define vfsgnj_vf_f64m1_m(...) __riscv_vfsgnj_vf_f64m1_tumu(__VA_ARGS__)
20488
#define vfsgnj_vv_f64m2_m(...) __riscv_vfsgnj_vv_f64m2_tumu(__VA_ARGS__)
20489
#define vfsgnj_vf_f64m2_m(...) __riscv_vfsgnj_vf_f64m2_tumu(__VA_ARGS__)
20490
#define vfsgnj_vv_f64m4_m(...) __riscv_vfsgnj_vv_f64m4_tumu(__VA_ARGS__)
20491
#define vfsgnj_vf_f64m4_m(...) __riscv_vfsgnj_vf_f64m4_tumu(__VA_ARGS__)
20492
#define vfsgnj_vv_f64m8_m(...) __riscv_vfsgnj_vv_f64m8_tumu(__VA_ARGS__)
20493
#define vfsgnj_vf_f64m8_m(...) __riscv_vfsgnj_vf_f64m8_tumu(__VA_ARGS__)
20494
#define vfsgnjn_vv_f16mf4_m(...) __riscv_vfsgnjn_vv_f16mf4_tumu(__VA_ARGS__)
20495
#define vfsgnjn_vf_f16mf4_m(...) __riscv_vfsgnjn_vf_f16mf4_tumu(__VA_ARGS__)
20496
#define vfsgnjn_vv_f16mf2_m(...) __riscv_vfsgnjn_vv_f16mf2_tumu(__VA_ARGS__)
20497
#define vfsgnjn_vf_f16mf2_m(...) __riscv_vfsgnjn_vf_f16mf2_tumu(__VA_ARGS__)
20498
#define vfsgnjn_vv_f16m1_m(...) __riscv_vfsgnjn_vv_f16m1_tumu(__VA_ARGS__)
20499
#define vfsgnjn_vf_f16m1_m(...) __riscv_vfsgnjn_vf_f16m1_tumu(__VA_ARGS__)
20500
#define vfsgnjn_vv_f16m2_m(...) __riscv_vfsgnjn_vv_f16m2_tumu(__VA_ARGS__)
20501
#define vfsgnjn_vf_f16m2_m(...) __riscv_vfsgnjn_vf_f16m2_tumu(__VA_ARGS__)
20502
#define vfsgnjn_vv_f16m4_m(...) __riscv_vfsgnjn_vv_f16m4_tumu(__VA_ARGS__)
20503
#define vfsgnjn_vf_f16m4_m(...) __riscv_vfsgnjn_vf_f16m4_tumu(__VA_ARGS__)
20504
#define vfsgnjn_vv_f16m8_m(...) __riscv_vfsgnjn_vv_f16m8_tumu(__VA_ARGS__)
20505
#define vfsgnjn_vf_f16m8_m(...) __riscv_vfsgnjn_vf_f16m8_tumu(__VA_ARGS__)
20506
#define vfsgnjn_vv_f32mf2_m(...) __riscv_vfsgnjn_vv_f32mf2_tumu(__VA_ARGS__)
20507
#define vfsgnjn_vf_f32mf2_m(...) __riscv_vfsgnjn_vf_f32mf2_tumu(__VA_ARGS__)
20508
#define vfsgnjn_vv_f32m1_m(...) __riscv_vfsgnjn_vv_f32m1_tumu(__VA_ARGS__)
20509
#define vfsgnjn_vf_f32m1_m(...) __riscv_vfsgnjn_vf_f32m1_tumu(__VA_ARGS__)
20510
#define vfsgnjn_vv_f32m2_m(...) __riscv_vfsgnjn_vv_f32m2_tumu(__VA_ARGS__)
20511
#define vfsgnjn_vf_f32m2_m(...) __riscv_vfsgnjn_vf_f32m2_tumu(__VA_ARGS__)
20512
#define vfsgnjn_vv_f32m4_m(...) __riscv_vfsgnjn_vv_f32m4_tumu(__VA_ARGS__)
20513
#define vfsgnjn_vf_f32m4_m(...) __riscv_vfsgnjn_vf_f32m4_tumu(__VA_ARGS__)
20514
#define vfsgnjn_vv_f32m8_m(...) __riscv_vfsgnjn_vv_f32m8_tumu(__VA_ARGS__)
20515
#define vfsgnjn_vf_f32m8_m(...) __riscv_vfsgnjn_vf_f32m8_tumu(__VA_ARGS__)
20516
#define vfsgnjn_vv_f64m1_m(...) __riscv_vfsgnjn_vv_f64m1_tumu(__VA_ARGS__)
20517
#define vfsgnjn_vf_f64m1_m(...) __riscv_vfsgnjn_vf_f64m1_tumu(__VA_ARGS__)
20518
#define vfsgnjn_vv_f64m2_m(...) __riscv_vfsgnjn_vv_f64m2_tumu(__VA_ARGS__)
20519
#define vfsgnjn_vf_f64m2_m(...) __riscv_vfsgnjn_vf_f64m2_tumu(__VA_ARGS__)
20520
#define vfsgnjn_vv_f64m4_m(...) __riscv_vfsgnjn_vv_f64m4_tumu(__VA_ARGS__)
20521
#define vfsgnjn_vf_f64m4_m(...) __riscv_vfsgnjn_vf_f64m4_tumu(__VA_ARGS__)
20522
#define vfsgnjn_vv_f64m8_m(...) __riscv_vfsgnjn_vv_f64m8_tumu(__VA_ARGS__)
20523
#define vfsgnjn_vf_f64m8_m(...) __riscv_vfsgnjn_vf_f64m8_tumu(__VA_ARGS__)
20524
#define vfsgnjx_vv_f16mf4_m(...) __riscv_vfsgnjx_vv_f16mf4_tumu(__VA_ARGS__)
20525
#define vfsgnjx_vf_f16mf4_m(...) __riscv_vfsgnjx_vf_f16mf4_tumu(__VA_ARGS__)
20526
#define vfsgnjx_vv_f16mf2_m(...) __riscv_vfsgnjx_vv_f16mf2_tumu(__VA_ARGS__)
20527
#define vfsgnjx_vf_f16mf2_m(...) __riscv_vfsgnjx_vf_f16mf2_tumu(__VA_ARGS__)
20528
#define vfsgnjx_vv_f16m1_m(...) __riscv_vfsgnjx_vv_f16m1_tumu(__VA_ARGS__)
20529
#define vfsgnjx_vf_f16m1_m(...) __riscv_vfsgnjx_vf_f16m1_tumu(__VA_ARGS__)
20530
#define vfsgnjx_vv_f16m2_m(...) __riscv_vfsgnjx_vv_f16m2_tumu(__VA_ARGS__)
20531
#define vfsgnjx_vf_f16m2_m(...) __riscv_vfsgnjx_vf_f16m2_tumu(__VA_ARGS__)
20532
#define vfsgnjx_vv_f16m4_m(...) __riscv_vfsgnjx_vv_f16m4_tumu(__VA_ARGS__)
20533
#define vfsgnjx_vf_f16m4_m(...) __riscv_vfsgnjx_vf_f16m4_tumu(__VA_ARGS__)
20534
#define vfsgnjx_vv_f16m8_m(...) __riscv_vfsgnjx_vv_f16m8_tumu(__VA_ARGS__)
20535
#define vfsgnjx_vf_f16m8_m(...) __riscv_vfsgnjx_vf_f16m8_tumu(__VA_ARGS__)
20536
#define vfsgnjx_vv_f32mf2_m(...) __riscv_vfsgnjx_vv_f32mf2_tumu(__VA_ARGS__)
20537
#define vfsgnjx_vf_f32mf2_m(...) __riscv_vfsgnjx_vf_f32mf2_tumu(__VA_ARGS__)
20538
#define vfsgnjx_vv_f32m1_m(...) __riscv_vfsgnjx_vv_f32m1_tumu(__VA_ARGS__)
20539
#define vfsgnjx_vf_f32m1_m(...) __riscv_vfsgnjx_vf_f32m1_tumu(__VA_ARGS__)
20540
#define vfsgnjx_vv_f32m2_m(...) __riscv_vfsgnjx_vv_f32m2_tumu(__VA_ARGS__)
20541
#define vfsgnjx_vf_f32m2_m(...) __riscv_vfsgnjx_vf_f32m2_tumu(__VA_ARGS__)
20542
#define vfsgnjx_vv_f32m4_m(...) __riscv_vfsgnjx_vv_f32m4_tumu(__VA_ARGS__)
20543
#define vfsgnjx_vf_f32m4_m(...) __riscv_vfsgnjx_vf_f32m4_tumu(__VA_ARGS__)
20544
#define vfsgnjx_vv_f32m8_m(...) __riscv_vfsgnjx_vv_f32m8_tumu(__VA_ARGS__)
20545
#define vfsgnjx_vf_f32m8_m(...) __riscv_vfsgnjx_vf_f32m8_tumu(__VA_ARGS__)
20546
#define vfsgnjx_vv_f64m1_m(...) __riscv_vfsgnjx_vv_f64m1_tumu(__VA_ARGS__)
20547
#define vfsgnjx_vf_f64m1_m(...) __riscv_vfsgnjx_vf_f64m1_tumu(__VA_ARGS__)
20548
#define vfsgnjx_vv_f64m2_m(...) __riscv_vfsgnjx_vv_f64m2_tumu(__VA_ARGS__)
20549
#define vfsgnjx_vf_f64m2_m(...) __riscv_vfsgnjx_vf_f64m2_tumu(__VA_ARGS__)
20550
#define vfsgnjx_vv_f64m4_m(...) __riscv_vfsgnjx_vv_f64m4_tumu(__VA_ARGS__)
20551
#define vfsgnjx_vf_f64m4_m(...) __riscv_vfsgnjx_vf_f64m4_tumu(__VA_ARGS__)
20552
#define vfsgnjx_vv_f64m8_m(...) __riscv_vfsgnjx_vv_f64m8_tumu(__VA_ARGS__)
20553
#define vfsgnjx_vf_f64m8_m(...) __riscv_vfsgnjx_vf_f64m8_tumu(__VA_ARGS__)
20554
#define vfabs_v_f16mf4(...) __riscv_vfabs_v_f16mf4(__VA_ARGS__)
20555
#define vfabs_v_f16mf2(...) __riscv_vfabs_v_f16mf2(__VA_ARGS__)
20556
#define vfabs_v_f16m1(...) __riscv_vfabs_v_f16m1(__VA_ARGS__)
20557
#define vfabs_v_f16m2(...) __riscv_vfabs_v_f16m2(__VA_ARGS__)
20558
#define vfabs_v_f16m4(...) __riscv_vfabs_v_f16m4(__VA_ARGS__)
20559
#define vfabs_v_f16m8(...) __riscv_vfabs_v_f16m8(__VA_ARGS__)
20560
#define vfabs_v_f32mf2(...) __riscv_vfabs_v_f32mf2(__VA_ARGS__)
20561
#define vfabs_v_f32m1(...) __riscv_vfabs_v_f32m1(__VA_ARGS__)
20562
#define vfabs_v_f32m2(...) __riscv_vfabs_v_f32m2(__VA_ARGS__)
20563
#define vfabs_v_f32m4(...) __riscv_vfabs_v_f32m4(__VA_ARGS__)
20564
#define vfabs_v_f32m8(...) __riscv_vfabs_v_f32m8(__VA_ARGS__)
20565
#define vfabs_v_f64m1(...) __riscv_vfabs_v_f64m1(__VA_ARGS__)
20566
#define vfabs_v_f64m2(...) __riscv_vfabs_v_f64m2(__VA_ARGS__)
20567
#define vfabs_v_f64m4(...) __riscv_vfabs_v_f64m4(__VA_ARGS__)
20568
#define vfabs_v_f64m8(...) __riscv_vfabs_v_f64m8(__VA_ARGS__)
20569
// masked functions
20570
#define vfabs_v_f16mf4_m(...) __riscv_vfabs_v_f16mf4_tumu(__VA_ARGS__)
20571
#define vfabs_v_f16mf2_m(...) __riscv_vfabs_v_f16mf2_tumu(__VA_ARGS__)
20572
#define vfabs_v_f16m1_m(...) __riscv_vfabs_v_f16m1_tumu(__VA_ARGS__)
20573
#define vfabs_v_f16m2_m(...) __riscv_vfabs_v_f16m2_tumu(__VA_ARGS__)
20574
#define vfabs_v_f16m4_m(...) __riscv_vfabs_v_f16m4_tumu(__VA_ARGS__)
20575
#define vfabs_v_f16m8_m(...) __riscv_vfabs_v_f16m8_tumu(__VA_ARGS__)
20576
#define vfabs_v_f32mf2_m(...) __riscv_vfabs_v_f32mf2_tumu(__VA_ARGS__)
20577
#define vfabs_v_f32m1_m(...) __riscv_vfabs_v_f32m1_tumu(__VA_ARGS__)
20578
#define vfabs_v_f32m2_m(...) __riscv_vfabs_v_f32m2_tumu(__VA_ARGS__)
20579
#define vfabs_v_f32m4_m(...) __riscv_vfabs_v_f32m4_tumu(__VA_ARGS__)
20580
#define vfabs_v_f32m8_m(...) __riscv_vfabs_v_f32m8_tumu(__VA_ARGS__)
20581
#define vfabs_v_f64m1_m(...) __riscv_vfabs_v_f64m1_tumu(__VA_ARGS__)
20582
#define vfabs_v_f64m2_m(...) __riscv_vfabs_v_f64m2_tumu(__VA_ARGS__)
20583
#define vfabs_v_f64m4_m(...) __riscv_vfabs_v_f64m4_tumu(__VA_ARGS__)
20584
#define vfabs_v_f64m8_m(...) __riscv_vfabs_v_f64m8_tumu(__VA_ARGS__)
20585
#define vmfeq_vv_f16mf4_b64(...) __riscv_vmfeq_vv_f16mf4_b64(__VA_ARGS__)
20586
#define vmfeq_vf_f16mf4_b64(...) __riscv_vmfeq_vf_f16mf4_b64(__VA_ARGS__)
20587
#define vmfeq_vv_f16mf2_b32(...) __riscv_vmfeq_vv_f16mf2_b32(__VA_ARGS__)
20588
#define vmfeq_vf_f16mf2_b32(...) __riscv_vmfeq_vf_f16mf2_b32(__VA_ARGS__)
20589
#define vmfeq_vv_f16m1_b16(...) __riscv_vmfeq_vv_f16m1_b16(__VA_ARGS__)
20590
#define vmfeq_vf_f16m1_b16(...) __riscv_vmfeq_vf_f16m1_b16(__VA_ARGS__)
20591
#define vmfeq_vv_f16m2_b8(...) __riscv_vmfeq_vv_f16m2_b8(__VA_ARGS__)
20592
#define vmfeq_vf_f16m2_b8(...) __riscv_vmfeq_vf_f16m2_b8(__VA_ARGS__)
20593
#define vmfeq_vv_f16m4_b4(...) __riscv_vmfeq_vv_f16m4_b4(__VA_ARGS__)
20594
#define vmfeq_vf_f16m4_b4(...) __riscv_vmfeq_vf_f16m4_b4(__VA_ARGS__)
20595
#define vmfeq_vv_f16m8_b2(...) __riscv_vmfeq_vv_f16m8_b2(__VA_ARGS__)
20596
#define vmfeq_vf_f16m8_b2(...) __riscv_vmfeq_vf_f16m8_b2(__VA_ARGS__)
20597
#define vmfeq_vv_f32mf2_b64(...) __riscv_vmfeq_vv_f32mf2_b64(__VA_ARGS__)
20598
#define vmfeq_vf_f32mf2_b64(...) __riscv_vmfeq_vf_f32mf2_b64(__VA_ARGS__)
20599
#define vmfeq_vv_f32m1_b32(...) __riscv_vmfeq_vv_f32m1_b32(__VA_ARGS__)
20600
#define vmfeq_vf_f32m1_b32(...) __riscv_vmfeq_vf_f32m1_b32(__VA_ARGS__)
20601
#define vmfeq_vv_f32m2_b16(...) __riscv_vmfeq_vv_f32m2_b16(__VA_ARGS__)
20602
#define vmfeq_vf_f32m2_b16(...) __riscv_vmfeq_vf_f32m2_b16(__VA_ARGS__)
20603
#define vmfeq_vv_f32m4_b8(...) __riscv_vmfeq_vv_f32m4_b8(__VA_ARGS__)
20604
#define vmfeq_vf_f32m4_b8(...) __riscv_vmfeq_vf_f32m4_b8(__VA_ARGS__)
20605
#define vmfeq_vv_f32m8_b4(...) __riscv_vmfeq_vv_f32m8_b4(__VA_ARGS__)
20606
#define vmfeq_vf_f32m8_b4(...) __riscv_vmfeq_vf_f32m8_b4(__VA_ARGS__)
20607
#define vmfeq_vv_f64m1_b64(...) __riscv_vmfeq_vv_f64m1_b64(__VA_ARGS__)
20608
#define vmfeq_vf_f64m1_b64(...) __riscv_vmfeq_vf_f64m1_b64(__VA_ARGS__)
20609
#define vmfeq_vv_f64m2_b32(...) __riscv_vmfeq_vv_f64m2_b32(__VA_ARGS__)
20610
#define vmfeq_vf_f64m2_b32(...) __riscv_vmfeq_vf_f64m2_b32(__VA_ARGS__)
20611
#define vmfeq_vv_f64m4_b16(...) __riscv_vmfeq_vv_f64m4_b16(__VA_ARGS__)
20612
#define vmfeq_vf_f64m4_b16(...) __riscv_vmfeq_vf_f64m4_b16(__VA_ARGS__)
20613
#define vmfeq_vv_f64m8_b8(...) __riscv_vmfeq_vv_f64m8_b8(__VA_ARGS__)
20614
#define vmfeq_vf_f64m8_b8(...) __riscv_vmfeq_vf_f64m8_b8(__VA_ARGS__)
20615
#define vmfne_vv_f16mf4_b64(...) __riscv_vmfne_vv_f16mf4_b64(__VA_ARGS__)
20616
#define vmfne_vf_f16mf4_b64(...) __riscv_vmfne_vf_f16mf4_b64(__VA_ARGS__)
20617
#define vmfne_vv_f16mf2_b32(...) __riscv_vmfne_vv_f16mf2_b32(__VA_ARGS__)
20618
#define vmfne_vf_f16mf2_b32(...) __riscv_vmfne_vf_f16mf2_b32(__VA_ARGS__)
20619
#define vmfne_vv_f16m1_b16(...) __riscv_vmfne_vv_f16m1_b16(__VA_ARGS__)
20620
#define vmfne_vf_f16m1_b16(...) __riscv_vmfne_vf_f16m1_b16(__VA_ARGS__)
20621
#define vmfne_vv_f16m2_b8(...) __riscv_vmfne_vv_f16m2_b8(__VA_ARGS__)
20622
#define vmfne_vf_f16m2_b8(...) __riscv_vmfne_vf_f16m2_b8(__VA_ARGS__)
20623
#define vmfne_vv_f16m4_b4(...) __riscv_vmfne_vv_f16m4_b4(__VA_ARGS__)
20624
#define vmfne_vf_f16m4_b4(...) __riscv_vmfne_vf_f16m4_b4(__VA_ARGS__)
20625
#define vmfne_vv_f16m8_b2(...) __riscv_vmfne_vv_f16m8_b2(__VA_ARGS__)
20626
#define vmfne_vf_f16m8_b2(...) __riscv_vmfne_vf_f16m8_b2(__VA_ARGS__)
20627
#define vmfne_vv_f32mf2_b64(...) __riscv_vmfne_vv_f32mf2_b64(__VA_ARGS__)
20628
#define vmfne_vf_f32mf2_b64(...) __riscv_vmfne_vf_f32mf2_b64(__VA_ARGS__)
20629
#define vmfne_vv_f32m1_b32(...) __riscv_vmfne_vv_f32m1_b32(__VA_ARGS__)
20630
#define vmfne_vf_f32m1_b32(...) __riscv_vmfne_vf_f32m1_b32(__VA_ARGS__)
20631
#define vmfne_vv_f32m2_b16(...) __riscv_vmfne_vv_f32m2_b16(__VA_ARGS__)
20632
#define vmfne_vf_f32m2_b16(...) __riscv_vmfne_vf_f32m2_b16(__VA_ARGS__)
20633
#define vmfne_vv_f32m4_b8(...) __riscv_vmfne_vv_f32m4_b8(__VA_ARGS__)
20634
#define vmfne_vf_f32m4_b8(...) __riscv_vmfne_vf_f32m4_b8(__VA_ARGS__)
20635
#define vmfne_vv_f32m8_b4(...) __riscv_vmfne_vv_f32m8_b4(__VA_ARGS__)
20636
#define vmfne_vf_f32m8_b4(...) __riscv_vmfne_vf_f32m8_b4(__VA_ARGS__)
20637
#define vmfne_vv_f64m1_b64(...) __riscv_vmfne_vv_f64m1_b64(__VA_ARGS__)
20638
#define vmfne_vf_f64m1_b64(...) __riscv_vmfne_vf_f64m1_b64(__VA_ARGS__)
20639
#define vmfne_vv_f64m2_b32(...) __riscv_vmfne_vv_f64m2_b32(__VA_ARGS__)
20640
#define vmfne_vf_f64m2_b32(...) __riscv_vmfne_vf_f64m2_b32(__VA_ARGS__)
20641
#define vmfne_vv_f64m4_b16(...) __riscv_vmfne_vv_f64m4_b16(__VA_ARGS__)
20642
#define vmfne_vf_f64m4_b16(...) __riscv_vmfne_vf_f64m4_b16(__VA_ARGS__)
20643
#define vmfne_vv_f64m8_b8(...) __riscv_vmfne_vv_f64m8_b8(__VA_ARGS__)
20644
#define vmfne_vf_f64m8_b8(...) __riscv_vmfne_vf_f64m8_b8(__VA_ARGS__)
20645
#define vmflt_vv_f16mf4_b64(...) __riscv_vmflt_vv_f16mf4_b64(__VA_ARGS__)
20646
#define vmflt_vf_f16mf4_b64(...) __riscv_vmflt_vf_f16mf4_b64(__VA_ARGS__)
20647
#define vmflt_vv_f16mf2_b32(...) __riscv_vmflt_vv_f16mf2_b32(__VA_ARGS__)
20648
#define vmflt_vf_f16mf2_b32(...) __riscv_vmflt_vf_f16mf2_b32(__VA_ARGS__)
20649
#define vmflt_vv_f16m1_b16(...) __riscv_vmflt_vv_f16m1_b16(__VA_ARGS__)
20650
#define vmflt_vf_f16m1_b16(...) __riscv_vmflt_vf_f16m1_b16(__VA_ARGS__)
20651
#define vmflt_vv_f16m2_b8(...) __riscv_vmflt_vv_f16m2_b8(__VA_ARGS__)
20652
#define vmflt_vf_f16m2_b8(...) __riscv_vmflt_vf_f16m2_b8(__VA_ARGS__)
20653
#define vmflt_vv_f16m4_b4(...) __riscv_vmflt_vv_f16m4_b4(__VA_ARGS__)
20654
#define vmflt_vf_f16m4_b4(...) __riscv_vmflt_vf_f16m4_b4(__VA_ARGS__)
20655
#define vmflt_vv_f16m8_b2(...) __riscv_vmflt_vv_f16m8_b2(__VA_ARGS__)
20656
#define vmflt_vf_f16m8_b2(...) __riscv_vmflt_vf_f16m8_b2(__VA_ARGS__)
20657
#define vmflt_vv_f32mf2_b64(...) __riscv_vmflt_vv_f32mf2_b64(__VA_ARGS__)
20658
#define vmflt_vf_f32mf2_b64(...) __riscv_vmflt_vf_f32mf2_b64(__VA_ARGS__)
20659
#define vmflt_vv_f32m1_b32(...) __riscv_vmflt_vv_f32m1_b32(__VA_ARGS__)
20660
#define vmflt_vf_f32m1_b32(...) __riscv_vmflt_vf_f32m1_b32(__VA_ARGS__)
20661
#define vmflt_vv_f32m2_b16(...) __riscv_vmflt_vv_f32m2_b16(__VA_ARGS__)
20662
#define vmflt_vf_f32m2_b16(...) __riscv_vmflt_vf_f32m2_b16(__VA_ARGS__)
20663
#define vmflt_vv_f32m4_b8(...) __riscv_vmflt_vv_f32m4_b8(__VA_ARGS__)
20664
#define vmflt_vf_f32m4_b8(...) __riscv_vmflt_vf_f32m4_b8(__VA_ARGS__)
20665
#define vmflt_vv_f32m8_b4(...) __riscv_vmflt_vv_f32m8_b4(__VA_ARGS__)
20666
#define vmflt_vf_f32m8_b4(...) __riscv_vmflt_vf_f32m8_b4(__VA_ARGS__)
20667
#define vmflt_vv_f64m1_b64(...) __riscv_vmflt_vv_f64m1_b64(__VA_ARGS__)
20668
#define vmflt_vf_f64m1_b64(...) __riscv_vmflt_vf_f64m1_b64(__VA_ARGS__)
20669
#define vmflt_vv_f64m2_b32(...) __riscv_vmflt_vv_f64m2_b32(__VA_ARGS__)
20670
#define vmflt_vf_f64m2_b32(...) __riscv_vmflt_vf_f64m2_b32(__VA_ARGS__)
20671
#define vmflt_vv_f64m4_b16(...) __riscv_vmflt_vv_f64m4_b16(__VA_ARGS__)
20672
#define vmflt_vf_f64m4_b16(...) __riscv_vmflt_vf_f64m4_b16(__VA_ARGS__)
20673
#define vmflt_vv_f64m8_b8(...) __riscv_vmflt_vv_f64m8_b8(__VA_ARGS__)
20674
#define vmflt_vf_f64m8_b8(...) __riscv_vmflt_vf_f64m8_b8(__VA_ARGS__)
20675
#define vmfle_vv_f16mf4_b64(...) __riscv_vmfle_vv_f16mf4_b64(__VA_ARGS__)
20676
#define vmfle_vf_f16mf4_b64(...) __riscv_vmfle_vf_f16mf4_b64(__VA_ARGS__)
20677
#define vmfle_vv_f16mf2_b32(...) __riscv_vmfle_vv_f16mf2_b32(__VA_ARGS__)
20678
#define vmfle_vf_f16mf2_b32(...) __riscv_vmfle_vf_f16mf2_b32(__VA_ARGS__)
20679
#define vmfle_vv_f16m1_b16(...) __riscv_vmfle_vv_f16m1_b16(__VA_ARGS__)
20680
#define vmfle_vf_f16m1_b16(...) __riscv_vmfle_vf_f16m1_b16(__VA_ARGS__)
20681
#define vmfle_vv_f16m2_b8(...) __riscv_vmfle_vv_f16m2_b8(__VA_ARGS__)
20682
#define vmfle_vf_f16m2_b8(...) __riscv_vmfle_vf_f16m2_b8(__VA_ARGS__)
20683
#define vmfle_vv_f16m4_b4(...) __riscv_vmfle_vv_f16m4_b4(__VA_ARGS__)
20684
#define vmfle_vf_f16m4_b4(...) __riscv_vmfle_vf_f16m4_b4(__VA_ARGS__)
20685
#define vmfle_vv_f16m8_b2(...) __riscv_vmfle_vv_f16m8_b2(__VA_ARGS__)
20686
#define vmfle_vf_f16m8_b2(...) __riscv_vmfle_vf_f16m8_b2(__VA_ARGS__)
20687
#define vmfle_vv_f32mf2_b64(...) __riscv_vmfle_vv_f32mf2_b64(__VA_ARGS__)
20688
#define vmfle_vf_f32mf2_b64(...) __riscv_vmfle_vf_f32mf2_b64(__VA_ARGS__)
20689
#define vmfle_vv_f32m1_b32(...) __riscv_vmfle_vv_f32m1_b32(__VA_ARGS__)
20690
#define vmfle_vf_f32m1_b32(...) __riscv_vmfle_vf_f32m1_b32(__VA_ARGS__)
20691
#define vmfle_vv_f32m2_b16(...) __riscv_vmfle_vv_f32m2_b16(__VA_ARGS__)
20692
#define vmfle_vf_f32m2_b16(...) __riscv_vmfle_vf_f32m2_b16(__VA_ARGS__)
20693
#define vmfle_vv_f32m4_b8(...) __riscv_vmfle_vv_f32m4_b8(__VA_ARGS__)
20694
#define vmfle_vf_f32m4_b8(...) __riscv_vmfle_vf_f32m4_b8(__VA_ARGS__)
20695
#define vmfle_vv_f32m8_b4(...) __riscv_vmfle_vv_f32m8_b4(__VA_ARGS__)
20696
#define vmfle_vf_f32m8_b4(...) __riscv_vmfle_vf_f32m8_b4(__VA_ARGS__)
20697
#define vmfle_vv_f64m1_b64(...) __riscv_vmfle_vv_f64m1_b64(__VA_ARGS__)
20698
#define vmfle_vf_f64m1_b64(...) __riscv_vmfle_vf_f64m1_b64(__VA_ARGS__)
20699
#define vmfle_vv_f64m2_b32(...) __riscv_vmfle_vv_f64m2_b32(__VA_ARGS__)
20700
#define vmfle_vf_f64m2_b32(...) __riscv_vmfle_vf_f64m2_b32(__VA_ARGS__)
20701
#define vmfle_vv_f64m4_b16(...) __riscv_vmfle_vv_f64m4_b16(__VA_ARGS__)
20702
#define vmfle_vf_f64m4_b16(...) __riscv_vmfle_vf_f64m4_b16(__VA_ARGS__)
20703
#define vmfle_vv_f64m8_b8(...) __riscv_vmfle_vv_f64m8_b8(__VA_ARGS__)
20704
#define vmfle_vf_f64m8_b8(...) __riscv_vmfle_vf_f64m8_b8(__VA_ARGS__)
20705
#define vmfgt_vv_f16mf4_b64(...) __riscv_vmfgt_vv_f16mf4_b64(__VA_ARGS__)
20706
#define vmfgt_vf_f16mf4_b64(...) __riscv_vmfgt_vf_f16mf4_b64(__VA_ARGS__)
20707
#define vmfgt_vv_f16mf2_b32(...) __riscv_vmfgt_vv_f16mf2_b32(__VA_ARGS__)
20708
#define vmfgt_vf_f16mf2_b32(...) __riscv_vmfgt_vf_f16mf2_b32(__VA_ARGS__)
20709
#define vmfgt_vv_f16m1_b16(...) __riscv_vmfgt_vv_f16m1_b16(__VA_ARGS__)
20710
#define vmfgt_vf_f16m1_b16(...) __riscv_vmfgt_vf_f16m1_b16(__VA_ARGS__)
20711
#define vmfgt_vv_f16m2_b8(...) __riscv_vmfgt_vv_f16m2_b8(__VA_ARGS__)
20712
#define vmfgt_vf_f16m2_b8(...) __riscv_vmfgt_vf_f16m2_b8(__VA_ARGS__)
20713
#define vmfgt_vv_f16m4_b4(...) __riscv_vmfgt_vv_f16m4_b4(__VA_ARGS__)
20714
#define vmfgt_vf_f16m4_b4(...) __riscv_vmfgt_vf_f16m4_b4(__VA_ARGS__)
20715
#define vmfgt_vv_f16m8_b2(...) __riscv_vmfgt_vv_f16m8_b2(__VA_ARGS__)
20716
#define vmfgt_vf_f16m8_b2(...) __riscv_vmfgt_vf_f16m8_b2(__VA_ARGS__)
20717
#define vmfgt_vv_f32mf2_b64(...) __riscv_vmfgt_vv_f32mf2_b64(__VA_ARGS__)
20718
#define vmfgt_vf_f32mf2_b64(...) __riscv_vmfgt_vf_f32mf2_b64(__VA_ARGS__)
20719
#define vmfgt_vv_f32m1_b32(...) __riscv_vmfgt_vv_f32m1_b32(__VA_ARGS__)
20720
#define vmfgt_vf_f32m1_b32(...) __riscv_vmfgt_vf_f32m1_b32(__VA_ARGS__)
20721
#define vmfgt_vv_f32m2_b16(...) __riscv_vmfgt_vv_f32m2_b16(__VA_ARGS__)
20722
#define vmfgt_vf_f32m2_b16(...) __riscv_vmfgt_vf_f32m2_b16(__VA_ARGS__)
20723
#define vmfgt_vv_f32m4_b8(...) __riscv_vmfgt_vv_f32m4_b8(__VA_ARGS__)
20724
#define vmfgt_vf_f32m4_b8(...) __riscv_vmfgt_vf_f32m4_b8(__VA_ARGS__)
20725
#define vmfgt_vv_f32m8_b4(...) __riscv_vmfgt_vv_f32m8_b4(__VA_ARGS__)
20726
#define vmfgt_vf_f32m8_b4(...) __riscv_vmfgt_vf_f32m8_b4(__VA_ARGS__)
20727
#define vmfgt_vv_f64m1_b64(...) __riscv_vmfgt_vv_f64m1_b64(__VA_ARGS__)
20728
#define vmfgt_vf_f64m1_b64(...) __riscv_vmfgt_vf_f64m1_b64(__VA_ARGS__)
20729
#define vmfgt_vv_f64m2_b32(...) __riscv_vmfgt_vv_f64m2_b32(__VA_ARGS__)
20730
#define vmfgt_vf_f64m2_b32(...) __riscv_vmfgt_vf_f64m2_b32(__VA_ARGS__)
20731
#define vmfgt_vv_f64m4_b16(...) __riscv_vmfgt_vv_f64m4_b16(__VA_ARGS__)
20732
#define vmfgt_vf_f64m4_b16(...) __riscv_vmfgt_vf_f64m4_b16(__VA_ARGS__)
20733
#define vmfgt_vv_f64m8_b8(...) __riscv_vmfgt_vv_f64m8_b8(__VA_ARGS__)
20734
#define vmfgt_vf_f64m8_b8(...) __riscv_vmfgt_vf_f64m8_b8(__VA_ARGS__)
20735
#define vmfge_vv_f16mf4_b64(...) __riscv_vmfge_vv_f16mf4_b64(__VA_ARGS__)
20736
#define vmfge_vf_f16mf4_b64(...) __riscv_vmfge_vf_f16mf4_b64(__VA_ARGS__)
20737
#define vmfge_vv_f16mf2_b32(...) __riscv_vmfge_vv_f16mf2_b32(__VA_ARGS__)
20738
#define vmfge_vf_f16mf2_b32(...) __riscv_vmfge_vf_f16mf2_b32(__VA_ARGS__)
20739
#define vmfge_vv_f16m1_b16(...) __riscv_vmfge_vv_f16m1_b16(__VA_ARGS__)
20740
#define vmfge_vf_f16m1_b16(...) __riscv_vmfge_vf_f16m1_b16(__VA_ARGS__)
20741
#define vmfge_vv_f16m2_b8(...) __riscv_vmfge_vv_f16m2_b8(__VA_ARGS__)
20742
#define vmfge_vf_f16m2_b8(...) __riscv_vmfge_vf_f16m2_b8(__VA_ARGS__)
20743
#define vmfge_vv_f16m4_b4(...) __riscv_vmfge_vv_f16m4_b4(__VA_ARGS__)
20744
#define vmfge_vf_f16m4_b4(...) __riscv_vmfge_vf_f16m4_b4(__VA_ARGS__)
20745
#define vmfge_vv_f16m8_b2(...) __riscv_vmfge_vv_f16m8_b2(__VA_ARGS__)
20746
#define vmfge_vf_f16m8_b2(...) __riscv_vmfge_vf_f16m8_b2(__VA_ARGS__)
20747
#define vmfge_vv_f32mf2_b64(...) __riscv_vmfge_vv_f32mf2_b64(__VA_ARGS__)
20748
#define vmfge_vf_f32mf2_b64(...) __riscv_vmfge_vf_f32mf2_b64(__VA_ARGS__)
20749
#define vmfge_vv_f32m1_b32(...) __riscv_vmfge_vv_f32m1_b32(__VA_ARGS__)
20750
#define vmfge_vf_f32m1_b32(...) __riscv_vmfge_vf_f32m1_b32(__VA_ARGS__)
20751
#define vmfge_vv_f32m2_b16(...) __riscv_vmfge_vv_f32m2_b16(__VA_ARGS__)
20752
#define vmfge_vf_f32m2_b16(...) __riscv_vmfge_vf_f32m2_b16(__VA_ARGS__)
20753
#define vmfge_vv_f32m4_b8(...) __riscv_vmfge_vv_f32m4_b8(__VA_ARGS__)
20754
#define vmfge_vf_f32m4_b8(...) __riscv_vmfge_vf_f32m4_b8(__VA_ARGS__)
20755
#define vmfge_vv_f32m8_b4(...) __riscv_vmfge_vv_f32m8_b4(__VA_ARGS__)
20756
#define vmfge_vf_f32m8_b4(...) __riscv_vmfge_vf_f32m8_b4(__VA_ARGS__)
20757
#define vmfge_vv_f64m1_b64(...) __riscv_vmfge_vv_f64m1_b64(__VA_ARGS__)
20758
#define vmfge_vf_f64m1_b64(...) __riscv_vmfge_vf_f64m1_b64(__VA_ARGS__)
20759
#define vmfge_vv_f64m2_b32(...) __riscv_vmfge_vv_f64m2_b32(__VA_ARGS__)
20760
#define vmfge_vf_f64m2_b32(...) __riscv_vmfge_vf_f64m2_b32(__VA_ARGS__)
20761
#define vmfge_vv_f64m4_b16(...) __riscv_vmfge_vv_f64m4_b16(__VA_ARGS__)
20762
#define vmfge_vf_f64m4_b16(...) __riscv_vmfge_vf_f64m4_b16(__VA_ARGS__)
20763
#define vmfge_vv_f64m8_b8(...) __riscv_vmfge_vv_f64m8_b8(__VA_ARGS__)
20764
#define vmfge_vf_f64m8_b8(...) __riscv_vmfge_vf_f64m8_b8(__VA_ARGS__)
20765
// masked functions
20766
#define vmfeq_vv_f16mf4_b64_m(...) __riscv_vmfeq_vv_f16mf4_b64_mu(__VA_ARGS__)
20767
#define vmfeq_vf_f16mf4_b64_m(...) __riscv_vmfeq_vf_f16mf4_b64_mu(__VA_ARGS__)
20768
#define vmfeq_vv_f16mf2_b32_m(...) __riscv_vmfeq_vv_f16mf2_b32_mu(__VA_ARGS__)
20769
#define vmfeq_vf_f16mf2_b32_m(...) __riscv_vmfeq_vf_f16mf2_b32_mu(__VA_ARGS__)
20770
#define vmfeq_vv_f16m1_b16_m(...) __riscv_vmfeq_vv_f16m1_b16_mu(__VA_ARGS__)
20771
#define vmfeq_vf_f16m1_b16_m(...) __riscv_vmfeq_vf_f16m1_b16_mu(__VA_ARGS__)
20772
#define vmfeq_vv_f16m2_b8_m(...) __riscv_vmfeq_vv_f16m2_b8_mu(__VA_ARGS__)
20773
#define vmfeq_vf_f16m2_b8_m(...) __riscv_vmfeq_vf_f16m2_b8_mu(__VA_ARGS__)
20774
#define vmfeq_vv_f16m4_b4_m(...) __riscv_vmfeq_vv_f16m4_b4_mu(__VA_ARGS__)
20775
#define vmfeq_vf_f16m4_b4_m(...) __riscv_vmfeq_vf_f16m4_b4_mu(__VA_ARGS__)
20776
#define vmfeq_vv_f16m8_b2_m(...) __riscv_vmfeq_vv_f16m8_b2_mu(__VA_ARGS__)
20777
#define vmfeq_vf_f16m8_b2_m(...) __riscv_vmfeq_vf_f16m8_b2_mu(__VA_ARGS__)
20778
#define vmfeq_vv_f32mf2_b64_m(...) __riscv_vmfeq_vv_f32mf2_b64_mu(__VA_ARGS__)
20779
#define vmfeq_vf_f32mf2_b64_m(...) __riscv_vmfeq_vf_f32mf2_b64_mu(__VA_ARGS__)
20780
#define vmfeq_vv_f32m1_b32_m(...) __riscv_vmfeq_vv_f32m1_b32_mu(__VA_ARGS__)
20781
#define vmfeq_vf_f32m1_b32_m(...) __riscv_vmfeq_vf_f32m1_b32_mu(__VA_ARGS__)
20782
#define vmfeq_vv_f32m2_b16_m(...) __riscv_vmfeq_vv_f32m2_b16_mu(__VA_ARGS__)
20783
#define vmfeq_vf_f32m2_b16_m(...) __riscv_vmfeq_vf_f32m2_b16_mu(__VA_ARGS__)
20784
#define vmfeq_vv_f32m4_b8_m(...) __riscv_vmfeq_vv_f32m4_b8_mu(__VA_ARGS__)
20785
#define vmfeq_vf_f32m4_b8_m(...) __riscv_vmfeq_vf_f32m4_b8_mu(__VA_ARGS__)
20786
#define vmfeq_vv_f32m8_b4_m(...) __riscv_vmfeq_vv_f32m8_b4_mu(__VA_ARGS__)
20787
#define vmfeq_vf_f32m8_b4_m(...) __riscv_vmfeq_vf_f32m8_b4_mu(__VA_ARGS__)
20788
#define vmfeq_vv_f64m1_b64_m(...) __riscv_vmfeq_vv_f64m1_b64_mu(__VA_ARGS__)
20789
#define vmfeq_vf_f64m1_b64_m(...) __riscv_vmfeq_vf_f64m1_b64_mu(__VA_ARGS__)
20790
#define vmfeq_vv_f64m2_b32_m(...) __riscv_vmfeq_vv_f64m2_b32_mu(__VA_ARGS__)
20791
#define vmfeq_vf_f64m2_b32_m(...) __riscv_vmfeq_vf_f64m2_b32_mu(__VA_ARGS__)
20792
#define vmfeq_vv_f64m4_b16_m(...) __riscv_vmfeq_vv_f64m4_b16_mu(__VA_ARGS__)
20793
#define vmfeq_vf_f64m4_b16_m(...) __riscv_vmfeq_vf_f64m4_b16_mu(__VA_ARGS__)
20794
#define vmfeq_vv_f64m8_b8_m(...) __riscv_vmfeq_vv_f64m8_b8_mu(__VA_ARGS__)
20795
#define vmfeq_vf_f64m8_b8_m(...) __riscv_vmfeq_vf_f64m8_b8_mu(__VA_ARGS__)
20796
#define vmfne_vv_f16mf4_b64_m(...) __riscv_vmfne_vv_f16mf4_b64_mu(__VA_ARGS__)
20797
#define vmfne_vf_f16mf4_b64_m(...) __riscv_vmfne_vf_f16mf4_b64_mu(__VA_ARGS__)
20798
#define vmfne_vv_f16mf2_b32_m(...) __riscv_vmfne_vv_f16mf2_b32_mu(__VA_ARGS__)
20799
#define vmfne_vf_f16mf2_b32_m(...) __riscv_vmfne_vf_f16mf2_b32_mu(__VA_ARGS__)
20800
#define vmfne_vv_f16m1_b16_m(...) __riscv_vmfne_vv_f16m1_b16_mu(__VA_ARGS__)
20801
#define vmfne_vf_f16m1_b16_m(...) __riscv_vmfne_vf_f16m1_b16_mu(__VA_ARGS__)
20802
#define vmfne_vv_f16m2_b8_m(...) __riscv_vmfne_vv_f16m2_b8_mu(__VA_ARGS__)
20803
#define vmfne_vf_f16m2_b8_m(...) __riscv_vmfne_vf_f16m2_b8_mu(__VA_ARGS__)
20804
#define vmfne_vv_f16m4_b4_m(...) __riscv_vmfne_vv_f16m4_b4_mu(__VA_ARGS__)
20805
#define vmfne_vf_f16m4_b4_m(...) __riscv_vmfne_vf_f16m4_b4_mu(__VA_ARGS__)
20806
#define vmfne_vv_f16m8_b2_m(...) __riscv_vmfne_vv_f16m8_b2_mu(__VA_ARGS__)
20807
#define vmfne_vf_f16m8_b2_m(...) __riscv_vmfne_vf_f16m8_b2_mu(__VA_ARGS__)
20808
#define vmfne_vv_f32mf2_b64_m(...) __riscv_vmfne_vv_f32mf2_b64_mu(__VA_ARGS__)
20809
#define vmfne_vf_f32mf2_b64_m(...) __riscv_vmfne_vf_f32mf2_b64_mu(__VA_ARGS__)
20810
#define vmfne_vv_f32m1_b32_m(...) __riscv_vmfne_vv_f32m1_b32_mu(__VA_ARGS__)
20811
#define vmfne_vf_f32m1_b32_m(...) __riscv_vmfne_vf_f32m1_b32_mu(__VA_ARGS__)
20812
#define vmfne_vv_f32m2_b16_m(...) __riscv_vmfne_vv_f32m2_b16_mu(__VA_ARGS__)
20813
#define vmfne_vf_f32m2_b16_m(...) __riscv_vmfne_vf_f32m2_b16_mu(__VA_ARGS__)
20814
#define vmfne_vv_f32m4_b8_m(...) __riscv_vmfne_vv_f32m4_b8_mu(__VA_ARGS__)
20815
#define vmfne_vf_f32m4_b8_m(...) __riscv_vmfne_vf_f32m4_b8_mu(__VA_ARGS__)
20816
#define vmfne_vv_f32m8_b4_m(...) __riscv_vmfne_vv_f32m8_b4_mu(__VA_ARGS__)
20817
#define vmfne_vf_f32m8_b4_m(...) __riscv_vmfne_vf_f32m8_b4_mu(__VA_ARGS__)
20818
#define vmfne_vv_f64m1_b64_m(...) __riscv_vmfne_vv_f64m1_b64_mu(__VA_ARGS__)
20819
#define vmfne_vf_f64m1_b64_m(...) __riscv_vmfne_vf_f64m1_b64_mu(__VA_ARGS__)
20820
#define vmfne_vv_f64m2_b32_m(...) __riscv_vmfne_vv_f64m2_b32_mu(__VA_ARGS__)
20821
#define vmfne_vf_f64m2_b32_m(...) __riscv_vmfne_vf_f64m2_b32_mu(__VA_ARGS__)
20822
#define vmfne_vv_f64m4_b16_m(...) __riscv_vmfne_vv_f64m4_b16_mu(__VA_ARGS__)
20823
#define vmfne_vf_f64m4_b16_m(...) __riscv_vmfne_vf_f64m4_b16_mu(__VA_ARGS__)
20824
#define vmfne_vv_f64m8_b8_m(...) __riscv_vmfne_vv_f64m8_b8_mu(__VA_ARGS__)
20825
#define vmfne_vf_f64m8_b8_m(...) __riscv_vmfne_vf_f64m8_b8_mu(__VA_ARGS__)
20826
#define vmflt_vv_f16mf4_b64_m(...) __riscv_vmflt_vv_f16mf4_b64_mu(__VA_ARGS__)
20827
#define vmflt_vf_f16mf4_b64_m(...) __riscv_vmflt_vf_f16mf4_b64_mu(__VA_ARGS__)
20828
#define vmflt_vv_f16mf2_b32_m(...) __riscv_vmflt_vv_f16mf2_b32_mu(__VA_ARGS__)
20829
#define vmflt_vf_f16mf2_b32_m(...) __riscv_vmflt_vf_f16mf2_b32_mu(__VA_ARGS__)
20830
#define vmflt_vv_f16m1_b16_m(...) __riscv_vmflt_vv_f16m1_b16_mu(__VA_ARGS__)
20831
#define vmflt_vf_f16m1_b16_m(...) __riscv_vmflt_vf_f16m1_b16_mu(__VA_ARGS__)
20832
#define vmflt_vv_f16m2_b8_m(...) __riscv_vmflt_vv_f16m2_b8_mu(__VA_ARGS__)
20833
#define vmflt_vf_f16m2_b8_m(...) __riscv_vmflt_vf_f16m2_b8_mu(__VA_ARGS__)
20834
#define vmflt_vv_f16m4_b4_m(...) __riscv_vmflt_vv_f16m4_b4_mu(__VA_ARGS__)
20835
#define vmflt_vf_f16m4_b4_m(...) __riscv_vmflt_vf_f16m4_b4_mu(__VA_ARGS__)
20836
#define vmflt_vv_f16m8_b2_m(...) __riscv_vmflt_vv_f16m8_b2_mu(__VA_ARGS__)
20837
#define vmflt_vf_f16m8_b2_m(...) __riscv_vmflt_vf_f16m8_b2_mu(__VA_ARGS__)
20838
#define vmflt_vv_f32mf2_b64_m(...) __riscv_vmflt_vv_f32mf2_b64_mu(__VA_ARGS__)
20839
#define vmflt_vf_f32mf2_b64_m(...) __riscv_vmflt_vf_f32mf2_b64_mu(__VA_ARGS__)
20840
#define vmflt_vv_f32m1_b32_m(...) __riscv_vmflt_vv_f32m1_b32_mu(__VA_ARGS__)
20841
#define vmflt_vf_f32m1_b32_m(...) __riscv_vmflt_vf_f32m1_b32_mu(__VA_ARGS__)
20842
#define vmflt_vv_f32m2_b16_m(...) __riscv_vmflt_vv_f32m2_b16_mu(__VA_ARGS__)
20843
#define vmflt_vf_f32m2_b16_m(...) __riscv_vmflt_vf_f32m2_b16_mu(__VA_ARGS__)
20844
#define vmflt_vv_f32m4_b8_m(...) __riscv_vmflt_vv_f32m4_b8_mu(__VA_ARGS__)
20845
#define vmflt_vf_f32m4_b8_m(...) __riscv_vmflt_vf_f32m4_b8_mu(__VA_ARGS__)
20846
#define vmflt_vv_f32m8_b4_m(...) __riscv_vmflt_vv_f32m8_b4_mu(__VA_ARGS__)
20847
#define vmflt_vf_f32m8_b4_m(...) __riscv_vmflt_vf_f32m8_b4_mu(__VA_ARGS__)
20848
#define vmflt_vv_f64m1_b64_m(...) __riscv_vmflt_vv_f64m1_b64_mu(__VA_ARGS__)
20849
#define vmflt_vf_f64m1_b64_m(...) __riscv_vmflt_vf_f64m1_b64_mu(__VA_ARGS__)
20850
#define vmflt_vv_f64m2_b32_m(...) __riscv_vmflt_vv_f64m2_b32_mu(__VA_ARGS__)
20851
#define vmflt_vf_f64m2_b32_m(...) __riscv_vmflt_vf_f64m2_b32_mu(__VA_ARGS__)
20852
#define vmflt_vv_f64m4_b16_m(...) __riscv_vmflt_vv_f64m4_b16_mu(__VA_ARGS__)
20853
#define vmflt_vf_f64m4_b16_m(...) __riscv_vmflt_vf_f64m4_b16_mu(__VA_ARGS__)
20854
#define vmflt_vv_f64m8_b8_m(...) __riscv_vmflt_vv_f64m8_b8_mu(__VA_ARGS__)
20855
#define vmflt_vf_f64m8_b8_m(...) __riscv_vmflt_vf_f64m8_b8_mu(__VA_ARGS__)
20856
#define vmfle_vv_f16mf4_b64_m(...) __riscv_vmfle_vv_f16mf4_b64_mu(__VA_ARGS__)
20857
#define vmfle_vf_f16mf4_b64_m(...) __riscv_vmfle_vf_f16mf4_b64_mu(__VA_ARGS__)
20858
#define vmfle_vv_f16mf2_b32_m(...) __riscv_vmfle_vv_f16mf2_b32_mu(__VA_ARGS__)
20859
#define vmfle_vf_f16mf2_b32_m(...) __riscv_vmfle_vf_f16mf2_b32_mu(__VA_ARGS__)
20860
#define vmfle_vv_f16m1_b16_m(...) __riscv_vmfle_vv_f16m1_b16_mu(__VA_ARGS__)
20861
#define vmfle_vf_f16m1_b16_m(...) __riscv_vmfle_vf_f16m1_b16_mu(__VA_ARGS__)
20862
#define vmfle_vv_f16m2_b8_m(...) __riscv_vmfle_vv_f16m2_b8_mu(__VA_ARGS__)
20863
#define vmfle_vf_f16m2_b8_m(...) __riscv_vmfle_vf_f16m2_b8_mu(__VA_ARGS__)
20864
#define vmfle_vv_f16m4_b4_m(...) __riscv_vmfle_vv_f16m4_b4_mu(__VA_ARGS__)
20865
#define vmfle_vf_f16m4_b4_m(...) __riscv_vmfle_vf_f16m4_b4_mu(__VA_ARGS__)
20866
#define vmfle_vv_f16m8_b2_m(...) __riscv_vmfle_vv_f16m8_b2_mu(__VA_ARGS__)
20867
#define vmfle_vf_f16m8_b2_m(...) __riscv_vmfle_vf_f16m8_b2_mu(__VA_ARGS__)
20868
#define vmfle_vv_f32mf2_b64_m(...) __riscv_vmfle_vv_f32mf2_b64_mu(__VA_ARGS__)
20869
#define vmfle_vf_f32mf2_b64_m(...) __riscv_vmfle_vf_f32mf2_b64_mu(__VA_ARGS__)
20870
#define vmfle_vv_f32m1_b32_m(...) __riscv_vmfle_vv_f32m1_b32_mu(__VA_ARGS__)
20871
#define vmfle_vf_f32m1_b32_m(...) __riscv_vmfle_vf_f32m1_b32_mu(__VA_ARGS__)
20872
#define vmfle_vv_f32m2_b16_m(...) __riscv_vmfle_vv_f32m2_b16_mu(__VA_ARGS__)
20873
#define vmfle_vf_f32m2_b16_m(...) __riscv_vmfle_vf_f32m2_b16_mu(__VA_ARGS__)
20874
#define vmfle_vv_f32m4_b8_m(...) __riscv_vmfle_vv_f32m4_b8_mu(__VA_ARGS__)
20875
#define vmfle_vf_f32m4_b8_m(...) __riscv_vmfle_vf_f32m4_b8_mu(__VA_ARGS__)
20876
#define vmfle_vv_f32m8_b4_m(...) __riscv_vmfle_vv_f32m8_b4_mu(__VA_ARGS__)
20877
#define vmfle_vf_f32m8_b4_m(...) __riscv_vmfle_vf_f32m8_b4_mu(__VA_ARGS__)
20878
#define vmfle_vv_f64m1_b64_m(...) __riscv_vmfle_vv_f64m1_b64_mu(__VA_ARGS__)
20879
#define vmfle_vf_f64m1_b64_m(...) __riscv_vmfle_vf_f64m1_b64_mu(__VA_ARGS__)
20880
#define vmfle_vv_f64m2_b32_m(...) __riscv_vmfle_vv_f64m2_b32_mu(__VA_ARGS__)
20881
#define vmfle_vf_f64m2_b32_m(...) __riscv_vmfle_vf_f64m2_b32_mu(__VA_ARGS__)
20882
#define vmfle_vv_f64m4_b16_m(...) __riscv_vmfle_vv_f64m4_b16_mu(__VA_ARGS__)
20883
#define vmfle_vf_f64m4_b16_m(...) __riscv_vmfle_vf_f64m4_b16_mu(__VA_ARGS__)
20884
#define vmfle_vv_f64m8_b8_m(...) __riscv_vmfle_vv_f64m8_b8_mu(__VA_ARGS__)
20885
#define vmfle_vf_f64m8_b8_m(...) __riscv_vmfle_vf_f64m8_b8_mu(__VA_ARGS__)
20886
#define vmfgt_vv_f16mf4_b64_m(...) __riscv_vmfgt_vv_f16mf4_b64_mu(__VA_ARGS__)
20887
#define vmfgt_vf_f16mf4_b64_m(...) __riscv_vmfgt_vf_f16mf4_b64_mu(__VA_ARGS__)
20888
#define vmfgt_vv_f16mf2_b32_m(...) __riscv_vmfgt_vv_f16mf2_b32_mu(__VA_ARGS__)
20889
#define vmfgt_vf_f16mf2_b32_m(...) __riscv_vmfgt_vf_f16mf2_b32_mu(__VA_ARGS__)
20890
#define vmfgt_vv_f16m1_b16_m(...) __riscv_vmfgt_vv_f16m1_b16_mu(__VA_ARGS__)
20891
#define vmfgt_vf_f16m1_b16_m(...) __riscv_vmfgt_vf_f16m1_b16_mu(__VA_ARGS__)
20892
#define vmfgt_vv_f16m2_b8_m(...) __riscv_vmfgt_vv_f16m2_b8_mu(__VA_ARGS__)
20893
#define vmfgt_vf_f16m2_b8_m(...) __riscv_vmfgt_vf_f16m2_b8_mu(__VA_ARGS__)
20894
#define vmfgt_vv_f16m4_b4_m(...) __riscv_vmfgt_vv_f16m4_b4_mu(__VA_ARGS__)
20895
#define vmfgt_vf_f16m4_b4_m(...) __riscv_vmfgt_vf_f16m4_b4_mu(__VA_ARGS__)
20896
#define vmfgt_vv_f16m8_b2_m(...) __riscv_vmfgt_vv_f16m8_b2_mu(__VA_ARGS__)
20897
#define vmfgt_vf_f16m8_b2_m(...) __riscv_vmfgt_vf_f16m8_b2_mu(__VA_ARGS__)
20898
#define vmfgt_vv_f32mf2_b64_m(...) __riscv_vmfgt_vv_f32mf2_b64_mu(__VA_ARGS__)
20899
#define vmfgt_vf_f32mf2_b64_m(...) __riscv_vmfgt_vf_f32mf2_b64_mu(__VA_ARGS__)
20900
#define vmfgt_vv_f32m1_b32_m(...) __riscv_vmfgt_vv_f32m1_b32_mu(__VA_ARGS__)
20901
#define vmfgt_vf_f32m1_b32_m(...) __riscv_vmfgt_vf_f32m1_b32_mu(__VA_ARGS__)
20902
#define vmfgt_vv_f32m2_b16_m(...) __riscv_vmfgt_vv_f32m2_b16_mu(__VA_ARGS__)
20903
#define vmfgt_vf_f32m2_b16_m(...) __riscv_vmfgt_vf_f32m2_b16_mu(__VA_ARGS__)
20904
#define vmfgt_vv_f32m4_b8_m(...) __riscv_vmfgt_vv_f32m4_b8_mu(__VA_ARGS__)
20905
#define vmfgt_vf_f32m4_b8_m(...) __riscv_vmfgt_vf_f32m4_b8_mu(__VA_ARGS__)
20906
#define vmfgt_vv_f32m8_b4_m(...) __riscv_vmfgt_vv_f32m8_b4_mu(__VA_ARGS__)
20907
#define vmfgt_vf_f32m8_b4_m(...) __riscv_vmfgt_vf_f32m8_b4_mu(__VA_ARGS__)
20908
#define vmfgt_vv_f64m1_b64_m(...) __riscv_vmfgt_vv_f64m1_b64_mu(__VA_ARGS__)
20909
#define vmfgt_vf_f64m1_b64_m(...) __riscv_vmfgt_vf_f64m1_b64_mu(__VA_ARGS__)
20910
#define vmfgt_vv_f64m2_b32_m(...) __riscv_vmfgt_vv_f64m2_b32_mu(__VA_ARGS__)
20911
#define vmfgt_vf_f64m2_b32_m(...) __riscv_vmfgt_vf_f64m2_b32_mu(__VA_ARGS__)
20912
#define vmfgt_vv_f64m4_b16_m(...) __riscv_vmfgt_vv_f64m4_b16_mu(__VA_ARGS__)
20913
#define vmfgt_vf_f64m4_b16_m(...) __riscv_vmfgt_vf_f64m4_b16_mu(__VA_ARGS__)
20914
#define vmfgt_vv_f64m8_b8_m(...) __riscv_vmfgt_vv_f64m8_b8_mu(__VA_ARGS__)
20915
#define vmfgt_vf_f64m8_b8_m(...) __riscv_vmfgt_vf_f64m8_b8_mu(__VA_ARGS__)
20916
#define vmfge_vv_f16mf4_b64_m(...) __riscv_vmfge_vv_f16mf4_b64_mu(__VA_ARGS__)
20917
#define vmfge_vf_f16mf4_b64_m(...) __riscv_vmfge_vf_f16mf4_b64_mu(__VA_ARGS__)
20918
#define vmfge_vv_f16mf2_b32_m(...) __riscv_vmfge_vv_f16mf2_b32_mu(__VA_ARGS__)
20919
#define vmfge_vf_f16mf2_b32_m(...) __riscv_vmfge_vf_f16mf2_b32_mu(__VA_ARGS__)
20920
#define vmfge_vv_f16m1_b16_m(...) __riscv_vmfge_vv_f16m1_b16_mu(__VA_ARGS__)
20921
#define vmfge_vf_f16m1_b16_m(...) __riscv_vmfge_vf_f16m1_b16_mu(__VA_ARGS__)
20922
#define vmfge_vv_f16m2_b8_m(...) __riscv_vmfge_vv_f16m2_b8_mu(__VA_ARGS__)
20923
#define vmfge_vf_f16m2_b8_m(...) __riscv_vmfge_vf_f16m2_b8_mu(__VA_ARGS__)
20924
#define vmfge_vv_f16m4_b4_m(...) __riscv_vmfge_vv_f16m4_b4_mu(__VA_ARGS__)
20925
#define vmfge_vf_f16m4_b4_m(...) __riscv_vmfge_vf_f16m4_b4_mu(__VA_ARGS__)
20926
#define vmfge_vv_f16m8_b2_m(...) __riscv_vmfge_vv_f16m8_b2_mu(__VA_ARGS__)
20927
#define vmfge_vf_f16m8_b2_m(...) __riscv_vmfge_vf_f16m8_b2_mu(__VA_ARGS__)
20928
#define vmfge_vv_f32mf2_b64_m(...) __riscv_vmfge_vv_f32mf2_b64_mu(__VA_ARGS__)
20929
#define vmfge_vf_f32mf2_b64_m(...) __riscv_vmfge_vf_f32mf2_b64_mu(__VA_ARGS__)
20930
#define vmfge_vv_f32m1_b32_m(...) __riscv_vmfge_vv_f32m1_b32_mu(__VA_ARGS__)
20931
#define vmfge_vf_f32m1_b32_m(...) __riscv_vmfge_vf_f32m1_b32_mu(__VA_ARGS__)
20932
#define vmfge_vv_f32m2_b16_m(...) __riscv_vmfge_vv_f32m2_b16_mu(__VA_ARGS__)
20933
#define vmfge_vf_f32m2_b16_m(...) __riscv_vmfge_vf_f32m2_b16_mu(__VA_ARGS__)
20934
#define vmfge_vv_f32m4_b8_m(...) __riscv_vmfge_vv_f32m4_b8_mu(__VA_ARGS__)
20935
#define vmfge_vf_f32m4_b8_m(...) __riscv_vmfge_vf_f32m4_b8_mu(__VA_ARGS__)
20936
#define vmfge_vv_f32m8_b4_m(...) __riscv_vmfge_vv_f32m8_b4_mu(__VA_ARGS__)
20937
#define vmfge_vf_f32m8_b4_m(...) __riscv_vmfge_vf_f32m8_b4_mu(__VA_ARGS__)
20938
#define vmfge_vv_f64m1_b64_m(...) __riscv_vmfge_vv_f64m1_b64_mu(__VA_ARGS__)
20939
#define vmfge_vf_f64m1_b64_m(...) __riscv_vmfge_vf_f64m1_b64_mu(__VA_ARGS__)
20940
#define vmfge_vv_f64m2_b32_m(...) __riscv_vmfge_vv_f64m2_b32_mu(__VA_ARGS__)
20941
#define vmfge_vf_f64m2_b32_m(...) __riscv_vmfge_vf_f64m2_b32_mu(__VA_ARGS__)
20942
#define vmfge_vv_f64m4_b16_m(...) __riscv_vmfge_vv_f64m4_b16_mu(__VA_ARGS__)
20943
#define vmfge_vf_f64m4_b16_m(...) __riscv_vmfge_vf_f64m4_b16_mu(__VA_ARGS__)
20944
#define vmfge_vv_f64m8_b8_m(...) __riscv_vmfge_vv_f64m8_b8_mu(__VA_ARGS__)
20945
#define vmfge_vf_f64m8_b8_m(...) __riscv_vmfge_vf_f64m8_b8_mu(__VA_ARGS__)
20946
#define vfclass_v_u16mf4(...) __riscv_vfclass_v_u16mf4(__VA_ARGS__)
20947
#define vfclass_v_u16mf2(...) __riscv_vfclass_v_u16mf2(__VA_ARGS__)
20948
#define vfclass_v_u16m1(...) __riscv_vfclass_v_u16m1(__VA_ARGS__)
20949
#define vfclass_v_u16m2(...) __riscv_vfclass_v_u16m2(__VA_ARGS__)
20950
#define vfclass_v_u16m4(...) __riscv_vfclass_v_u16m4(__VA_ARGS__)
20951
#define vfclass_v_u16m8(...) __riscv_vfclass_v_u16m8(__VA_ARGS__)
20952
#define vfclass_v_u32mf2(...) __riscv_vfclass_v_u32mf2(__VA_ARGS__)
20953
#define vfclass_v_u32m1(...) __riscv_vfclass_v_u32m1(__VA_ARGS__)
20954
#define vfclass_v_u32m2(...) __riscv_vfclass_v_u32m2(__VA_ARGS__)
20955
#define vfclass_v_u32m4(...) __riscv_vfclass_v_u32m4(__VA_ARGS__)
20956
#define vfclass_v_u32m8(...) __riscv_vfclass_v_u32m8(__VA_ARGS__)
20957
#define vfclass_v_u64m1(...) __riscv_vfclass_v_u64m1(__VA_ARGS__)
20958
#define vfclass_v_u64m2(...) __riscv_vfclass_v_u64m2(__VA_ARGS__)
20959
#define vfclass_v_u64m4(...) __riscv_vfclass_v_u64m4(__VA_ARGS__)
20960
#define vfclass_v_u64m8(...) __riscv_vfclass_v_u64m8(__VA_ARGS__)
20961
// masked functions
20962
#define vfclass_v_u16mf4_m(...) __riscv_vfclass_v_u16mf4_tumu(__VA_ARGS__)
20963
#define vfclass_v_u16mf2_m(...) __riscv_vfclass_v_u16mf2_tumu(__VA_ARGS__)
20964
#define vfclass_v_u16m1_m(...) __riscv_vfclass_v_u16m1_tumu(__VA_ARGS__)
20965
#define vfclass_v_u16m2_m(...) __riscv_vfclass_v_u16m2_tumu(__VA_ARGS__)
20966
#define vfclass_v_u16m4_m(...) __riscv_vfclass_v_u16m4_tumu(__VA_ARGS__)
20967
#define vfclass_v_u16m8_m(...) __riscv_vfclass_v_u16m8_tumu(__VA_ARGS__)
20968
#define vfclass_v_u32mf2_m(...) __riscv_vfclass_v_u32mf2_tumu(__VA_ARGS__)
20969
#define vfclass_v_u32m1_m(...) __riscv_vfclass_v_u32m1_tumu(__VA_ARGS__)
20970
#define vfclass_v_u32m2_m(...) __riscv_vfclass_v_u32m2_tumu(__VA_ARGS__)
20971
#define vfclass_v_u32m4_m(...) __riscv_vfclass_v_u32m4_tumu(__VA_ARGS__)
20972
#define vfclass_v_u32m8_m(...) __riscv_vfclass_v_u32m8_tumu(__VA_ARGS__)
20973
#define vfclass_v_u64m1_m(...) __riscv_vfclass_v_u64m1_tumu(__VA_ARGS__)
20974
#define vfclass_v_u64m2_m(...) __riscv_vfclass_v_u64m2_tumu(__VA_ARGS__)
20975
#define vfclass_v_u64m4_m(...) __riscv_vfclass_v_u64m4_tumu(__VA_ARGS__)
20976
#define vfclass_v_u64m8_m(...) __riscv_vfclass_v_u64m8_tumu(__VA_ARGS__)
20977
#define vmerge_vvm_f16mf4(mask, op1, op2, vl) __riscv_vmerge_vvm_f16mf4((op1), (op2), (mask), (vl))
20978
#define vfmerge_vfm_f16mf4(mask, op1, op2, vl) __riscv_vfmerge_vfm_f16mf4((op1), (op2), (mask), (vl))
20979
#define vmerge_vvm_f16mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_f16mf2((op1), (op2), (mask), (vl))
20980
#define vfmerge_vfm_f16mf2(mask, op1, op2, vl) __riscv_vfmerge_vfm_f16mf2((op1), (op2), (mask), (vl))
20981
#define vmerge_vvm_f16m1(mask, op1, op2, vl) __riscv_vmerge_vvm_f16m1((op1), (op2), (mask), (vl))
20982
#define vfmerge_vfm_f16m1(mask, op1, op2, vl) __riscv_vfmerge_vfm_f16m1((op1), (op2), (mask), (vl))
20983
#define vmerge_vvm_f16m2(mask, op1, op2, vl) __riscv_vmerge_vvm_f16m2((op1), (op2), (mask), (vl))
20984
#define vfmerge_vfm_f16m2(mask, op1, op2, vl) __riscv_vfmerge_vfm_f16m2((op1), (op2), (mask), (vl))
20985
#define vmerge_vvm_f16m4(mask, op1, op2, vl) __riscv_vmerge_vvm_f16m4((op1), (op2), (mask), (vl))
20986
#define vfmerge_vfm_f16m4(mask, op1, op2, vl) __riscv_vfmerge_vfm_f16m4((op1), (op2), (mask), (vl))
20987
#define vmerge_vvm_f16m8(mask, op1, op2, vl) __riscv_vmerge_vvm_f16m8((op1), (op2), (mask), (vl))
20988
#define vfmerge_vfm_f16m8(mask, op1, op2, vl) __riscv_vfmerge_vfm_f16m8((op1), (op2), (mask), (vl))
20989
#define vmerge_vvm_f32mf2(mask, op1, op2, vl) __riscv_vmerge_vvm_f32mf2((op1), (op2), (mask), (vl))
20990
#define vfmerge_vfm_f32mf2(mask, op1, op2, vl) __riscv_vfmerge_vfm_f32mf2((op1), (op2), (mask), (vl))
20991
#define vmerge_vvm_f32m1(mask, op1, op2, vl) __riscv_vmerge_vvm_f32m1((op1), (op2), (mask), (vl))
20992
#define vfmerge_vfm_f32m1(mask, op1, op2, vl) __riscv_vfmerge_vfm_f32m1((op1), (op2), (mask), (vl))
20993
#define vmerge_vvm_f32m2(mask, op1, op2, vl) __riscv_vmerge_vvm_f32m2((op1), (op2), (mask), (vl))
20994
#define vfmerge_vfm_f32m2(mask, op1, op2, vl) __riscv_vfmerge_vfm_f32m2((op1), (op2), (mask), (vl))
20995
#define vmerge_vvm_f32m4(mask, op1, op2, vl) __riscv_vmerge_vvm_f32m4((op1), (op2), (mask), (vl))
20996
#define vfmerge_vfm_f32m4(mask, op1, op2, vl) __riscv_vfmerge_vfm_f32m4((op1), (op2), (mask), (vl))
20997
#define vmerge_vvm_f32m8(mask, op1, op2, vl) __riscv_vmerge_vvm_f32m8((op1), (op2), (mask), (vl))
20998
#define vfmerge_vfm_f32m8(mask, op1, op2, vl) __riscv_vfmerge_vfm_f32m8((op1), (op2), (mask), (vl))
20999
#define vmerge_vvm_f64m1(mask, op1, op2, vl) __riscv_vmerge_vvm_f64m1((op1), (op2), (mask), (vl))
21000
#define vfmerge_vfm_f64m1(mask, op1, op2, vl) __riscv_vfmerge_vfm_f64m1((op1), (op2), (mask), (vl))
21001
#define vmerge_vvm_f64m2(mask, op1, op2, vl) __riscv_vmerge_vvm_f64m2((op1), (op2), (mask), (vl))
21002
#define vfmerge_vfm_f64m2(mask, op1, op2, vl) __riscv_vfmerge_vfm_f64m2((op1), (op2), (mask), (vl))
21003
#define vmerge_vvm_f64m4(mask, op1, op2, vl) __riscv_vmerge_vvm_f64m4((op1), (op2), (mask), (vl))
21004
#define vfmerge_vfm_f64m4(mask, op1, op2, vl) __riscv_vfmerge_vfm_f64m4((op1), (op2), (mask), (vl))
21005
#define vmerge_vvm_f64m8(mask, op1, op2, vl) __riscv_vmerge_vvm_f64m8((op1), (op2), (mask), (vl))
21006
#define vfmerge_vfm_f64m8(mask, op1, op2, vl) __riscv_vfmerge_vfm_f64m8((op1), (op2), (mask), (vl))
21007
#define vmv_v_v_f16mf4(...) __riscv_vmv_v_v_f16mf4(__VA_ARGS__)
21008
#define vfmv_v_f_f16mf4(...) __riscv_vfmv_v_f_f16mf4(__VA_ARGS__)
21009
#define vmv_v_v_f16mf2(...) __riscv_vmv_v_v_f16mf2(__VA_ARGS__)
21010
#define vfmv_v_f_f16mf2(...) __riscv_vfmv_v_f_f16mf2(__VA_ARGS__)
21011
#define vmv_v_v_f16m1(...) __riscv_vmv_v_v_f16m1(__VA_ARGS__)
21012
#define vfmv_v_f_f16m1(...) __riscv_vfmv_v_f_f16m1(__VA_ARGS__)
21013
#define vmv_v_v_f16m2(...) __riscv_vmv_v_v_f16m2(__VA_ARGS__)
21014
#define vfmv_v_f_f16m2(...) __riscv_vfmv_v_f_f16m2(__VA_ARGS__)
21015
#define vmv_v_v_f16m4(...) __riscv_vmv_v_v_f16m4(__VA_ARGS__)
21016
#define vfmv_v_f_f16m4(...) __riscv_vfmv_v_f_f16m4(__VA_ARGS__)
21017
#define vmv_v_v_f16m8(...) __riscv_vmv_v_v_f16m8(__VA_ARGS__)
21018
#define vfmv_v_f_f16m8(...) __riscv_vfmv_v_f_f16m8(__VA_ARGS__)
21019
#define vmv_v_v_f32mf2(...) __riscv_vmv_v_v_f32mf2(__VA_ARGS__)
21020
#define vfmv_v_f_f32mf2(...) __riscv_vfmv_v_f_f32mf2(__VA_ARGS__)
21021
#define vmv_v_v_f32m1(...) __riscv_vmv_v_v_f32m1(__VA_ARGS__)
21022
#define vfmv_v_f_f32m1(...) __riscv_vfmv_v_f_f32m1(__VA_ARGS__)
21023
#define vmv_v_v_f32m2(...) __riscv_vmv_v_v_f32m2(__VA_ARGS__)
21024
#define vfmv_v_f_f32m2(...) __riscv_vfmv_v_f_f32m2(__VA_ARGS__)
21025
#define vmv_v_v_f32m4(...) __riscv_vmv_v_v_f32m4(__VA_ARGS__)
21026
#define vfmv_v_f_f32m4(...) __riscv_vfmv_v_f_f32m4(__VA_ARGS__)
21027
#define vmv_v_v_f32m8(...) __riscv_vmv_v_v_f32m8(__VA_ARGS__)
21028
#define vfmv_v_f_f32m8(...) __riscv_vfmv_v_f_f32m8(__VA_ARGS__)
21029
#define vmv_v_v_f64m1(...) __riscv_vmv_v_v_f64m1(__VA_ARGS__)
21030
#define vfmv_v_f_f64m1(...) __riscv_vfmv_v_f_f64m1(__VA_ARGS__)
21031
#define vmv_v_v_f64m2(...) __riscv_vmv_v_v_f64m2(__VA_ARGS__)
21032
#define vfmv_v_f_f64m2(...) __riscv_vfmv_v_f_f64m2(__VA_ARGS__)
21033
#define vmv_v_v_f64m4(...) __riscv_vmv_v_v_f64m4(__VA_ARGS__)
21034
#define vfmv_v_f_f64m4(...) __riscv_vfmv_v_f_f64m4(__VA_ARGS__)
21035
#define vmv_v_v_f64m8(...) __riscv_vmv_v_v_f64m8(__VA_ARGS__)
21036
#define vfmv_v_f_f64m8(...) __riscv_vfmv_v_f_f64m8(__VA_ARGS__)
21037
#define vfcvt_x_f_v_i16mf4(...) __riscv_vfcvt_x_f_v_i16mf4(__VA_ARGS__)
21038
#define vfcvt_rtz_x_f_v_i16mf4(...) __riscv_vfcvt_rtz_x_f_v_i16mf4(__VA_ARGS__)
21039
#define vfcvt_x_f_v_i16mf2(...) __riscv_vfcvt_x_f_v_i16mf2(__VA_ARGS__)
21040
#define vfcvt_rtz_x_f_v_i16mf2(...) __riscv_vfcvt_rtz_x_f_v_i16mf2(__VA_ARGS__)
21041
#define vfcvt_x_f_v_i16m1(...) __riscv_vfcvt_x_f_v_i16m1(__VA_ARGS__)
21042
#define vfcvt_rtz_x_f_v_i16m1(...) __riscv_vfcvt_rtz_x_f_v_i16m1(__VA_ARGS__)
21043
#define vfcvt_x_f_v_i16m2(...) __riscv_vfcvt_x_f_v_i16m2(__VA_ARGS__)
21044
#define vfcvt_rtz_x_f_v_i16m2(...) __riscv_vfcvt_rtz_x_f_v_i16m2(__VA_ARGS__)
21045
#define vfcvt_x_f_v_i16m4(...) __riscv_vfcvt_x_f_v_i16m4(__VA_ARGS__)
21046
#define vfcvt_rtz_x_f_v_i16m4(...) __riscv_vfcvt_rtz_x_f_v_i16m4(__VA_ARGS__)
21047
#define vfcvt_x_f_v_i16m8(...) __riscv_vfcvt_x_f_v_i16m8(__VA_ARGS__)
21048
#define vfcvt_rtz_x_f_v_i16m8(...) __riscv_vfcvt_rtz_x_f_v_i16m8(__VA_ARGS__)
21049
#define vfcvt_xu_f_v_u16mf4(...) __riscv_vfcvt_xu_f_v_u16mf4(__VA_ARGS__)
21050
#define vfcvt_rtz_xu_f_v_u16mf4(...) __riscv_vfcvt_rtz_xu_f_v_u16mf4(__VA_ARGS__)
21051
#define vfcvt_xu_f_v_u16mf2(...) __riscv_vfcvt_xu_f_v_u16mf2(__VA_ARGS__)
21052
#define vfcvt_rtz_xu_f_v_u16mf2(...) __riscv_vfcvt_rtz_xu_f_v_u16mf2(__VA_ARGS__)
21053
#define vfcvt_xu_f_v_u16m1(...) __riscv_vfcvt_xu_f_v_u16m1(__VA_ARGS__)
21054
#define vfcvt_rtz_xu_f_v_u16m1(...) __riscv_vfcvt_rtz_xu_f_v_u16m1(__VA_ARGS__)
21055
#define vfcvt_xu_f_v_u16m2(...) __riscv_vfcvt_xu_f_v_u16m2(__VA_ARGS__)
21056
#define vfcvt_rtz_xu_f_v_u16m2(...) __riscv_vfcvt_rtz_xu_f_v_u16m2(__VA_ARGS__)
21057
#define vfcvt_xu_f_v_u16m4(...) __riscv_vfcvt_xu_f_v_u16m4(__VA_ARGS__)
21058
#define vfcvt_rtz_xu_f_v_u16m4(...) __riscv_vfcvt_rtz_xu_f_v_u16m4(__VA_ARGS__)
21059
#define vfcvt_xu_f_v_u16m8(...) __riscv_vfcvt_xu_f_v_u16m8(__VA_ARGS__)
21060
#define vfcvt_rtz_xu_f_v_u16m8(...) __riscv_vfcvt_rtz_xu_f_v_u16m8(__VA_ARGS__)
21061
#define vfcvt_f_x_v_f16mf4(...) __riscv_vfcvt_f_x_v_f16mf4(__VA_ARGS__)
21062
#define vfcvt_f_x_v_f16mf2(...) __riscv_vfcvt_f_x_v_f16mf2(__VA_ARGS__)
21063
#define vfcvt_f_x_v_f16m1(...) __riscv_vfcvt_f_x_v_f16m1(__VA_ARGS__)
21064
#define vfcvt_f_x_v_f16m2(...) __riscv_vfcvt_f_x_v_f16m2(__VA_ARGS__)
21065
#define vfcvt_f_x_v_f16m4(...) __riscv_vfcvt_f_x_v_f16m4(__VA_ARGS__)
21066
#define vfcvt_f_x_v_f16m8(...) __riscv_vfcvt_f_x_v_f16m8(__VA_ARGS__)
21067
#define vfcvt_f_xu_v_f16mf4(...) __riscv_vfcvt_f_xu_v_f16mf4(__VA_ARGS__)
21068
#define vfcvt_f_xu_v_f16mf2(...) __riscv_vfcvt_f_xu_v_f16mf2(__VA_ARGS__)
21069
#define vfcvt_f_xu_v_f16m1(...) __riscv_vfcvt_f_xu_v_f16m1(__VA_ARGS__)
21070
#define vfcvt_f_xu_v_f16m2(...) __riscv_vfcvt_f_xu_v_f16m2(__VA_ARGS__)
21071
#define vfcvt_f_xu_v_f16m4(...) __riscv_vfcvt_f_xu_v_f16m4(__VA_ARGS__)
21072
#define vfcvt_f_xu_v_f16m8(...) __riscv_vfcvt_f_xu_v_f16m8(__VA_ARGS__)
21073
#define vfcvt_x_f_v_i32mf2(...) __riscv_vfcvt_x_f_v_i32mf2(__VA_ARGS__)
21074
#define vfcvt_rtz_x_f_v_i32mf2(...) __riscv_vfcvt_rtz_x_f_v_i32mf2(__VA_ARGS__)
21075
#define vfcvt_x_f_v_i32m1(...) __riscv_vfcvt_x_f_v_i32m1(__VA_ARGS__)
21076
#define vfcvt_rtz_x_f_v_i32m1(...) __riscv_vfcvt_rtz_x_f_v_i32m1(__VA_ARGS__)
21077
#define vfcvt_x_f_v_i32m2(...) __riscv_vfcvt_x_f_v_i32m2(__VA_ARGS__)
21078
#define vfcvt_rtz_x_f_v_i32m2(...) __riscv_vfcvt_rtz_x_f_v_i32m2(__VA_ARGS__)
21079
#define vfcvt_x_f_v_i32m4(...) __riscv_vfcvt_x_f_v_i32m4(__VA_ARGS__)
21080
#define vfcvt_rtz_x_f_v_i32m4(...) __riscv_vfcvt_rtz_x_f_v_i32m4(__VA_ARGS__)
21081
#define vfcvt_x_f_v_i32m8(...) __riscv_vfcvt_x_f_v_i32m8(__VA_ARGS__)
21082
#define vfcvt_rtz_x_f_v_i32m8(...) __riscv_vfcvt_rtz_x_f_v_i32m8(__VA_ARGS__)
21083
#define vfcvt_xu_f_v_u32mf2(...) __riscv_vfcvt_xu_f_v_u32mf2(__VA_ARGS__)
21084
#define vfcvt_rtz_xu_f_v_u32mf2(...) __riscv_vfcvt_rtz_xu_f_v_u32mf2(__VA_ARGS__)
21085
#define vfcvt_xu_f_v_u32m1(...) __riscv_vfcvt_xu_f_v_u32m1(__VA_ARGS__)
21086
#define vfcvt_rtz_xu_f_v_u32m1(...) __riscv_vfcvt_rtz_xu_f_v_u32m1(__VA_ARGS__)
21087
#define vfcvt_xu_f_v_u32m2(...) __riscv_vfcvt_xu_f_v_u32m2(__VA_ARGS__)
21088
#define vfcvt_rtz_xu_f_v_u32m2(...) __riscv_vfcvt_rtz_xu_f_v_u32m2(__VA_ARGS__)
21089
#define vfcvt_xu_f_v_u32m4(...) __riscv_vfcvt_xu_f_v_u32m4(__VA_ARGS__)
21090
#define vfcvt_rtz_xu_f_v_u32m4(...) __riscv_vfcvt_rtz_xu_f_v_u32m4(__VA_ARGS__)
21091
#define vfcvt_xu_f_v_u32m8(...) __riscv_vfcvt_xu_f_v_u32m8(__VA_ARGS__)
21092
#define vfcvt_rtz_xu_f_v_u32m8(...) __riscv_vfcvt_rtz_xu_f_v_u32m8(__VA_ARGS__)
21093
#define vfcvt_f_x_v_f32mf2(...) __riscv_vfcvt_f_x_v_f32mf2(__VA_ARGS__)
21094
#define vfcvt_f_x_v_f32m1(...) __riscv_vfcvt_f_x_v_f32m1(__VA_ARGS__)
21095
#define vfcvt_f_x_v_f32m2(...) __riscv_vfcvt_f_x_v_f32m2(__VA_ARGS__)
21096
#define vfcvt_f_x_v_f32m4(...) __riscv_vfcvt_f_x_v_f32m4(__VA_ARGS__)
21097
#define vfcvt_f_x_v_f32m8(...) __riscv_vfcvt_f_x_v_f32m8(__VA_ARGS__)
21098
#define vfcvt_f_xu_v_f32mf2(...) __riscv_vfcvt_f_xu_v_f32mf2(__VA_ARGS__)
21099
#define vfcvt_f_xu_v_f32m1(...) __riscv_vfcvt_f_xu_v_f32m1(__VA_ARGS__)
21100
#define vfcvt_f_xu_v_f32m2(...) __riscv_vfcvt_f_xu_v_f32m2(__VA_ARGS__)
21101
#define vfcvt_f_xu_v_f32m4(...) __riscv_vfcvt_f_xu_v_f32m4(__VA_ARGS__)
21102
#define vfcvt_f_xu_v_f32m8(...) __riscv_vfcvt_f_xu_v_f32m8(__VA_ARGS__)
21103
#define vfcvt_x_f_v_i64m1(...) __riscv_vfcvt_x_f_v_i64m1(__VA_ARGS__)
21104
#define vfcvt_rtz_x_f_v_i64m1(...) __riscv_vfcvt_rtz_x_f_v_i64m1(__VA_ARGS__)
21105
#define vfcvt_x_f_v_i64m2(...) __riscv_vfcvt_x_f_v_i64m2(__VA_ARGS__)
21106
#define vfcvt_rtz_x_f_v_i64m2(...) __riscv_vfcvt_rtz_x_f_v_i64m2(__VA_ARGS__)
21107
#define vfcvt_x_f_v_i64m4(...) __riscv_vfcvt_x_f_v_i64m4(__VA_ARGS__)
21108
#define vfcvt_rtz_x_f_v_i64m4(...) __riscv_vfcvt_rtz_x_f_v_i64m4(__VA_ARGS__)
21109
#define vfcvt_x_f_v_i64m8(...) __riscv_vfcvt_x_f_v_i64m8(__VA_ARGS__)
21110
#define vfcvt_rtz_x_f_v_i64m8(...) __riscv_vfcvt_rtz_x_f_v_i64m8(__VA_ARGS__)
21111
#define vfcvt_xu_f_v_u64m1(...) __riscv_vfcvt_xu_f_v_u64m1(__VA_ARGS__)
21112
#define vfcvt_rtz_xu_f_v_u64m1(...) __riscv_vfcvt_rtz_xu_f_v_u64m1(__VA_ARGS__)
21113
#define vfcvt_xu_f_v_u64m2(...) __riscv_vfcvt_xu_f_v_u64m2(__VA_ARGS__)
21114
#define vfcvt_rtz_xu_f_v_u64m2(...) __riscv_vfcvt_rtz_xu_f_v_u64m2(__VA_ARGS__)
21115
#define vfcvt_xu_f_v_u64m4(...) __riscv_vfcvt_xu_f_v_u64m4(__VA_ARGS__)
21116
#define vfcvt_rtz_xu_f_v_u64m4(...) __riscv_vfcvt_rtz_xu_f_v_u64m4(__VA_ARGS__)
21117
#define vfcvt_xu_f_v_u64m8(...) __riscv_vfcvt_xu_f_v_u64m8(__VA_ARGS__)
21118
#define vfcvt_rtz_xu_f_v_u64m8(...) __riscv_vfcvt_rtz_xu_f_v_u64m8(__VA_ARGS__)
21119
#define vfcvt_f_x_v_f64m1(...) __riscv_vfcvt_f_x_v_f64m1(__VA_ARGS__)
21120
#define vfcvt_f_x_v_f64m2(...) __riscv_vfcvt_f_x_v_f64m2(__VA_ARGS__)
21121
#define vfcvt_f_x_v_f64m4(...) __riscv_vfcvt_f_x_v_f64m4(__VA_ARGS__)
21122
#define vfcvt_f_x_v_f64m8(...) __riscv_vfcvt_f_x_v_f64m8(__VA_ARGS__)
21123
#define vfcvt_f_xu_v_f64m1(...) __riscv_vfcvt_f_xu_v_f64m1(__VA_ARGS__)
21124
#define vfcvt_f_xu_v_f64m2(...) __riscv_vfcvt_f_xu_v_f64m2(__VA_ARGS__)
21125
#define vfcvt_f_xu_v_f64m4(...) __riscv_vfcvt_f_xu_v_f64m4(__VA_ARGS__)
21126
#define vfcvt_f_xu_v_f64m8(...) __riscv_vfcvt_f_xu_v_f64m8(__VA_ARGS__)
21127
// masked functions
21128
#define vfcvt_x_f_v_i16mf4_m(...) __riscv_vfcvt_x_f_v_i16mf4_tumu(__VA_ARGS__)
21129
#define vfcvt_rtz_x_f_v_i16mf4_m(...) __riscv_vfcvt_rtz_x_f_v_i16mf4_tumu(__VA_ARGS__)
21130
#define vfcvt_x_f_v_i16mf2_m(...) __riscv_vfcvt_x_f_v_i16mf2_tumu(__VA_ARGS__)
21131
#define vfcvt_rtz_x_f_v_i16mf2_m(...) __riscv_vfcvt_rtz_x_f_v_i16mf2_tumu(__VA_ARGS__)
21132
#define vfcvt_x_f_v_i16m1_m(...) __riscv_vfcvt_x_f_v_i16m1_tumu(__VA_ARGS__)
21133
#define vfcvt_rtz_x_f_v_i16m1_m(...) __riscv_vfcvt_rtz_x_f_v_i16m1_tumu(__VA_ARGS__)
21134
#define vfcvt_x_f_v_i16m2_m(...) __riscv_vfcvt_x_f_v_i16m2_tumu(__VA_ARGS__)
21135
#define vfcvt_rtz_x_f_v_i16m2_m(...) __riscv_vfcvt_rtz_x_f_v_i16m2_tumu(__VA_ARGS__)
21136
#define vfcvt_x_f_v_i16m4_m(...) __riscv_vfcvt_x_f_v_i16m4_tumu(__VA_ARGS__)
21137
#define vfcvt_rtz_x_f_v_i16m4_m(...) __riscv_vfcvt_rtz_x_f_v_i16m4_tumu(__VA_ARGS__)
21138
#define vfcvt_x_f_v_i16m8_m(...) __riscv_vfcvt_x_f_v_i16m8_tumu(__VA_ARGS__)
21139
#define vfcvt_rtz_x_f_v_i16m8_m(...) __riscv_vfcvt_rtz_x_f_v_i16m8_tumu(__VA_ARGS__)
21140
#define vfcvt_xu_f_v_u16mf4_m(...) __riscv_vfcvt_xu_f_v_u16mf4_tumu(__VA_ARGS__)
21141
#define vfcvt_rtz_xu_f_v_u16mf4_m(...) __riscv_vfcvt_rtz_xu_f_v_u16mf4_tumu(__VA_ARGS__)
21142
#define vfcvt_xu_f_v_u16mf2_m(...) __riscv_vfcvt_xu_f_v_u16mf2_tumu(__VA_ARGS__)
21143
#define vfcvt_rtz_xu_f_v_u16mf2_m(...) __riscv_vfcvt_rtz_xu_f_v_u16mf2_tumu(__VA_ARGS__)
21144
#define vfcvt_xu_f_v_u16m1_m(...) __riscv_vfcvt_xu_f_v_u16m1_tumu(__VA_ARGS__)
21145
#define vfcvt_rtz_xu_f_v_u16m1_m(...) __riscv_vfcvt_rtz_xu_f_v_u16m1_tumu(__VA_ARGS__)
21146
#define vfcvt_xu_f_v_u16m2_m(...) __riscv_vfcvt_xu_f_v_u16m2_tumu(__VA_ARGS__)
21147
#define vfcvt_rtz_xu_f_v_u16m2_m(...) __riscv_vfcvt_rtz_xu_f_v_u16m2_tumu(__VA_ARGS__)
21148
#define vfcvt_xu_f_v_u16m4_m(...) __riscv_vfcvt_xu_f_v_u16m4_tumu(__VA_ARGS__)
21149
#define vfcvt_rtz_xu_f_v_u16m4_m(...) __riscv_vfcvt_rtz_xu_f_v_u16m4_tumu(__VA_ARGS__)
21150
#define vfcvt_xu_f_v_u16m8_m(...) __riscv_vfcvt_xu_f_v_u16m8_tumu(__VA_ARGS__)
21151
#define vfcvt_rtz_xu_f_v_u16m8_m(...) __riscv_vfcvt_rtz_xu_f_v_u16m8_tumu(__VA_ARGS__)
21152
#define vfcvt_f_x_v_f16mf4_m(...) __riscv_vfcvt_f_x_v_f16mf4_tumu(__VA_ARGS__)
21153
#define vfcvt_f_x_v_f16mf2_m(...) __riscv_vfcvt_f_x_v_f16mf2_tumu(__VA_ARGS__)
21154
#define vfcvt_f_x_v_f16m1_m(...) __riscv_vfcvt_f_x_v_f16m1_tumu(__VA_ARGS__)
21155
#define vfcvt_f_x_v_f16m2_m(...) __riscv_vfcvt_f_x_v_f16m2_tumu(__VA_ARGS__)
21156
#define vfcvt_f_x_v_f16m4_m(...) __riscv_vfcvt_f_x_v_f16m4_tumu(__VA_ARGS__)
21157
#define vfcvt_f_x_v_f16m8_m(...) __riscv_vfcvt_f_x_v_f16m8_tumu(__VA_ARGS__)
21158
#define vfcvt_f_xu_v_f16mf4_m(...) __riscv_vfcvt_f_xu_v_f16mf4_tumu(__VA_ARGS__)
21159
#define vfcvt_f_xu_v_f16mf2_m(...) __riscv_vfcvt_f_xu_v_f16mf2_tumu(__VA_ARGS__)
21160
#define vfcvt_f_xu_v_f16m1_m(...) __riscv_vfcvt_f_xu_v_f16m1_tumu(__VA_ARGS__)
21161
#define vfcvt_f_xu_v_f16m2_m(...) __riscv_vfcvt_f_xu_v_f16m2_tumu(__VA_ARGS__)
21162
#define vfcvt_f_xu_v_f16m4_m(...) __riscv_vfcvt_f_xu_v_f16m4_tumu(__VA_ARGS__)
21163
#define vfcvt_f_xu_v_f16m8_m(...) __riscv_vfcvt_f_xu_v_f16m8_tumu(__VA_ARGS__)
21164
#define vfcvt_x_f_v_i32mf2_m(...) __riscv_vfcvt_x_f_v_i32mf2_tumu(__VA_ARGS__)
21165
#define vfcvt_rtz_x_f_v_i32mf2_m(...) __riscv_vfcvt_rtz_x_f_v_i32mf2_tumu(__VA_ARGS__)
21166
#define vfcvt_x_f_v_i32m1_m(...) __riscv_vfcvt_x_f_v_i32m1_tumu(__VA_ARGS__)
21167
#define vfcvt_rtz_x_f_v_i32m1_m(...) __riscv_vfcvt_rtz_x_f_v_i32m1_tumu(__VA_ARGS__)
21168
#define vfcvt_x_f_v_i32m2_m(...) __riscv_vfcvt_x_f_v_i32m2_tumu(__VA_ARGS__)
21169
#define vfcvt_rtz_x_f_v_i32m2_m(...) __riscv_vfcvt_rtz_x_f_v_i32m2_tumu(__VA_ARGS__)
21170
#define vfcvt_x_f_v_i32m4_m(...) __riscv_vfcvt_x_f_v_i32m4_tumu(__VA_ARGS__)
21171
#define vfcvt_rtz_x_f_v_i32m4_m(...) __riscv_vfcvt_rtz_x_f_v_i32m4_tumu(__VA_ARGS__)
21172
#define vfcvt_x_f_v_i32m8_m(...) __riscv_vfcvt_x_f_v_i32m8_tumu(__VA_ARGS__)
21173
#define vfcvt_rtz_x_f_v_i32m8_m(...) __riscv_vfcvt_rtz_x_f_v_i32m8_tumu(__VA_ARGS__)
21174
#define vfcvt_xu_f_v_u32mf2_m(...) __riscv_vfcvt_xu_f_v_u32mf2_tumu(__VA_ARGS__)
21175
#define vfcvt_rtz_xu_f_v_u32mf2_m(...) __riscv_vfcvt_rtz_xu_f_v_u32mf2_tumu(__VA_ARGS__)
21176
#define vfcvt_xu_f_v_u32m1_m(...) __riscv_vfcvt_xu_f_v_u32m1_tumu(__VA_ARGS__)
21177
#define vfcvt_rtz_xu_f_v_u32m1_m(...) __riscv_vfcvt_rtz_xu_f_v_u32m1_tumu(__VA_ARGS__)
21178
#define vfcvt_xu_f_v_u32m2_m(...) __riscv_vfcvt_xu_f_v_u32m2_tumu(__VA_ARGS__)
21179
#define vfcvt_rtz_xu_f_v_u32m2_m(...) __riscv_vfcvt_rtz_xu_f_v_u32m2_tumu(__VA_ARGS__)
21180
#define vfcvt_xu_f_v_u32m4_m(...) __riscv_vfcvt_xu_f_v_u32m4_tumu(__VA_ARGS__)
21181
#define vfcvt_rtz_xu_f_v_u32m4_m(...) __riscv_vfcvt_rtz_xu_f_v_u32m4_tumu(__VA_ARGS__)
21182
#define vfcvt_xu_f_v_u32m8_m(...) __riscv_vfcvt_xu_f_v_u32m8_tumu(__VA_ARGS__)
21183
#define vfcvt_rtz_xu_f_v_u32m8_m(...) __riscv_vfcvt_rtz_xu_f_v_u32m8_tumu(__VA_ARGS__)
21184
#define vfcvt_f_x_v_f32mf2_m(...) __riscv_vfcvt_f_x_v_f32mf2_tumu(__VA_ARGS__)
21185
#define vfcvt_f_x_v_f32m1_m(...) __riscv_vfcvt_f_x_v_f32m1_tumu(__VA_ARGS__)
21186
#define vfcvt_f_x_v_f32m2_m(...) __riscv_vfcvt_f_x_v_f32m2_tumu(__VA_ARGS__)
21187
#define vfcvt_f_x_v_f32m4_m(...) __riscv_vfcvt_f_x_v_f32m4_tumu(__VA_ARGS__)
21188
#define vfcvt_f_x_v_f32m8_m(...) __riscv_vfcvt_f_x_v_f32m8_tumu(__VA_ARGS__)
21189
#define vfcvt_f_xu_v_f32mf2_m(...) __riscv_vfcvt_f_xu_v_f32mf2_tumu(__VA_ARGS__)
21190
#define vfcvt_f_xu_v_f32m1_m(...) __riscv_vfcvt_f_xu_v_f32m1_tumu(__VA_ARGS__)
21191
#define vfcvt_f_xu_v_f32m2_m(...) __riscv_vfcvt_f_xu_v_f32m2_tumu(__VA_ARGS__)
21192
#define vfcvt_f_xu_v_f32m4_m(...) __riscv_vfcvt_f_xu_v_f32m4_tumu(__VA_ARGS__)
21193
#define vfcvt_f_xu_v_f32m8_m(...) __riscv_vfcvt_f_xu_v_f32m8_tumu(__VA_ARGS__)
21194
#define vfcvt_x_f_v_i64m1_m(...) __riscv_vfcvt_x_f_v_i64m1_tumu(__VA_ARGS__)
21195
#define vfcvt_rtz_x_f_v_i64m1_m(...) __riscv_vfcvt_rtz_x_f_v_i64m1_tumu(__VA_ARGS__)
21196
#define vfcvt_x_f_v_i64m2_m(...) __riscv_vfcvt_x_f_v_i64m2_tumu(__VA_ARGS__)
21197
#define vfcvt_rtz_x_f_v_i64m2_m(...) __riscv_vfcvt_rtz_x_f_v_i64m2_tumu(__VA_ARGS__)
21198
#define vfcvt_x_f_v_i64m4_m(...) __riscv_vfcvt_x_f_v_i64m4_tumu(__VA_ARGS__)
21199
#define vfcvt_rtz_x_f_v_i64m4_m(...) __riscv_vfcvt_rtz_x_f_v_i64m4_tumu(__VA_ARGS__)
21200
#define vfcvt_x_f_v_i64m8_m(...) __riscv_vfcvt_x_f_v_i64m8_tumu(__VA_ARGS__)
21201
#define vfcvt_rtz_x_f_v_i64m8_m(...) __riscv_vfcvt_rtz_x_f_v_i64m8_tumu(__VA_ARGS__)
21202
#define vfcvt_xu_f_v_u64m1_m(...) __riscv_vfcvt_xu_f_v_u64m1_tumu(__VA_ARGS__)
21203
#define vfcvt_rtz_xu_f_v_u64m1_m(...) __riscv_vfcvt_rtz_xu_f_v_u64m1_tumu(__VA_ARGS__)
21204
#define vfcvt_xu_f_v_u64m2_m(...) __riscv_vfcvt_xu_f_v_u64m2_tumu(__VA_ARGS__)
21205
#define vfcvt_rtz_xu_f_v_u64m2_m(...) __riscv_vfcvt_rtz_xu_f_v_u64m2_tumu(__VA_ARGS__)
21206
#define vfcvt_xu_f_v_u64m4_m(...) __riscv_vfcvt_xu_f_v_u64m4_tumu(__VA_ARGS__)
21207
#define vfcvt_rtz_xu_f_v_u64m4_m(...) __riscv_vfcvt_rtz_xu_f_v_u64m4_tumu(__VA_ARGS__)
21208
#define vfcvt_xu_f_v_u64m8_m(...) __riscv_vfcvt_xu_f_v_u64m8_tumu(__VA_ARGS__)
21209
#define vfcvt_rtz_xu_f_v_u64m8_m(...) __riscv_vfcvt_rtz_xu_f_v_u64m8_tumu(__VA_ARGS__)
21210
#define vfcvt_f_x_v_f64m1_m(...) __riscv_vfcvt_f_x_v_f64m1_tumu(__VA_ARGS__)
21211
#define vfcvt_f_x_v_f64m2_m(...) __riscv_vfcvt_f_x_v_f64m2_tumu(__VA_ARGS__)
21212
#define vfcvt_f_x_v_f64m4_m(...) __riscv_vfcvt_f_x_v_f64m4_tumu(__VA_ARGS__)
21213
#define vfcvt_f_x_v_f64m8_m(...) __riscv_vfcvt_f_x_v_f64m8_tumu(__VA_ARGS__)
21214
#define vfcvt_f_xu_v_f64m1_m(...) __riscv_vfcvt_f_xu_v_f64m1_tumu(__VA_ARGS__)
21215
#define vfcvt_f_xu_v_f64m2_m(...) __riscv_vfcvt_f_xu_v_f64m2_tumu(__VA_ARGS__)
21216
#define vfcvt_f_xu_v_f64m4_m(...) __riscv_vfcvt_f_xu_v_f64m4_tumu(__VA_ARGS__)
21217
#define vfcvt_f_xu_v_f64m8_m(...) __riscv_vfcvt_f_xu_v_f64m8_tumu(__VA_ARGS__)
21218
#define vwcvt_x_x_v_i16mf4(...) __riscv_vwcvt_x_x_v_i16mf4(__VA_ARGS__)
21219
#define vwcvt_x_x_v_i16mf2(...) __riscv_vwcvt_x_x_v_i16mf2(__VA_ARGS__)
21220
#define vwcvt_x_x_v_i16m1(...) __riscv_vwcvt_x_x_v_i16m1(__VA_ARGS__)
21221
#define vwcvt_x_x_v_i16m2(...) __riscv_vwcvt_x_x_v_i16m2(__VA_ARGS__)
21222
#define vwcvt_x_x_v_i16m4(...) __riscv_vwcvt_x_x_v_i16m4(__VA_ARGS__)
21223
#define vwcvt_x_x_v_i16m8(...) __riscv_vwcvt_x_x_v_i16m8(__VA_ARGS__)
21224
#define vwcvtu_x_x_v_u16mf4(...) __riscv_vwcvtu_x_x_v_u16mf4(__VA_ARGS__)
21225
#define vwcvtu_x_x_v_u16mf2(...) __riscv_vwcvtu_x_x_v_u16mf2(__VA_ARGS__)
21226
#define vwcvtu_x_x_v_u16m1(...) __riscv_vwcvtu_x_x_v_u16m1(__VA_ARGS__)
21227
#define vwcvtu_x_x_v_u16m2(...) __riscv_vwcvtu_x_x_v_u16m2(__VA_ARGS__)
21228
#define vwcvtu_x_x_v_u16m4(...) __riscv_vwcvtu_x_x_v_u16m4(__VA_ARGS__)
21229
#define vwcvtu_x_x_v_u16m8(...) __riscv_vwcvtu_x_x_v_u16m8(__VA_ARGS__)
21230
#define vfwcvt_f_x_v_f16mf4(...) __riscv_vfwcvt_f_x_v_f16mf4(__VA_ARGS__)
21231
#define vfwcvt_f_x_v_f16mf2(...) __riscv_vfwcvt_f_x_v_f16mf2(__VA_ARGS__)
21232
#define vfwcvt_f_x_v_f16m1(...) __riscv_vfwcvt_f_x_v_f16m1(__VA_ARGS__)
21233
#define vfwcvt_f_x_v_f16m2(...) __riscv_vfwcvt_f_x_v_f16m2(__VA_ARGS__)
21234
#define vfwcvt_f_x_v_f16m4(...) __riscv_vfwcvt_f_x_v_f16m4(__VA_ARGS__)
21235
#define vfwcvt_f_x_v_f16m8(...) __riscv_vfwcvt_f_x_v_f16m8(__VA_ARGS__)
21236
#define vfwcvt_f_xu_v_f16mf4(...) __riscv_vfwcvt_f_xu_v_f16mf4(__VA_ARGS__)
21237
#define vfwcvt_f_xu_v_f16mf2(...) __riscv_vfwcvt_f_xu_v_f16mf2(__VA_ARGS__)
21238
#define vfwcvt_f_xu_v_f16m1(...) __riscv_vfwcvt_f_xu_v_f16m1(__VA_ARGS__)
21239
#define vfwcvt_f_xu_v_f16m2(...) __riscv_vfwcvt_f_xu_v_f16m2(__VA_ARGS__)
21240
#define vfwcvt_f_xu_v_f16m4(...) __riscv_vfwcvt_f_xu_v_f16m4(__VA_ARGS__)
21241
#define vfwcvt_f_xu_v_f16m8(...) __riscv_vfwcvt_f_xu_v_f16m8(__VA_ARGS__)
21242
#define vfwcvt_x_f_v_i32mf2(...) __riscv_vfwcvt_x_f_v_i32mf2(__VA_ARGS__)
21243
#define vfwcvt_rtz_x_f_v_i32mf2(...) __riscv_vfwcvt_rtz_x_f_v_i32mf2(__VA_ARGS__)
21244
#define vfwcvt_x_f_v_i32m1(...) __riscv_vfwcvt_x_f_v_i32m1(__VA_ARGS__)
21245
#define vfwcvt_rtz_x_f_v_i32m1(...) __riscv_vfwcvt_rtz_x_f_v_i32m1(__VA_ARGS__)
21246
#define vfwcvt_x_f_v_i32m2(...) __riscv_vfwcvt_x_f_v_i32m2(__VA_ARGS__)
21247
#define vfwcvt_rtz_x_f_v_i32m2(...) __riscv_vfwcvt_rtz_x_f_v_i32m2(__VA_ARGS__)
21248
#define vfwcvt_x_f_v_i32m4(...) __riscv_vfwcvt_x_f_v_i32m4(__VA_ARGS__)
21249
#define vfwcvt_rtz_x_f_v_i32m4(...) __riscv_vfwcvt_rtz_x_f_v_i32m4(__VA_ARGS__)
21250
#define vfwcvt_x_f_v_i32m8(...) __riscv_vfwcvt_x_f_v_i32m8(__VA_ARGS__)
21251
#define vfwcvt_rtz_x_f_v_i32m8(...) __riscv_vfwcvt_rtz_x_f_v_i32m8(__VA_ARGS__)
21252
#define vwcvt_x_x_v_i32mf2(...) __riscv_vwcvt_x_x_v_i32mf2(__VA_ARGS__)
21253
#define vwcvt_x_x_v_i32m1(...) __riscv_vwcvt_x_x_v_i32m1(__VA_ARGS__)
21254
#define vwcvt_x_x_v_i32m2(...) __riscv_vwcvt_x_x_v_i32m2(__VA_ARGS__)
21255
#define vwcvt_x_x_v_i32m4(...) __riscv_vwcvt_x_x_v_i32m4(__VA_ARGS__)
21256
#define vwcvt_x_x_v_i32m8(...) __riscv_vwcvt_x_x_v_i32m8(__VA_ARGS__)
21257
#define vwcvtu_x_x_v_u32mf2(...) __riscv_vwcvtu_x_x_v_u32mf2(__VA_ARGS__)
21258
#define vwcvtu_x_x_v_u32m1(...) __riscv_vwcvtu_x_x_v_u32m1(__VA_ARGS__)
21259
#define vwcvtu_x_x_v_u32m2(...) __riscv_vwcvtu_x_x_v_u32m2(__VA_ARGS__)
21260
#define vwcvtu_x_x_v_u32m4(...) __riscv_vwcvtu_x_x_v_u32m4(__VA_ARGS__)
21261
#define vwcvtu_x_x_v_u32m8(...) __riscv_vwcvtu_x_x_v_u32m8(__VA_ARGS__)
21262
#define vfwcvt_xu_f_v_u32mf2(...) __riscv_vfwcvt_xu_f_v_u32mf2(__VA_ARGS__)
21263
#define vfwcvt_rtz_xu_f_v_u32mf2(...) __riscv_vfwcvt_rtz_xu_f_v_u32mf2(__VA_ARGS__)
21264
#define vfwcvt_xu_f_v_u32m1(...) __riscv_vfwcvt_xu_f_v_u32m1(__VA_ARGS__)
21265
#define vfwcvt_rtz_xu_f_v_u32m1(...) __riscv_vfwcvt_rtz_xu_f_v_u32m1(__VA_ARGS__)
21266
#define vfwcvt_xu_f_v_u32m2(...) __riscv_vfwcvt_xu_f_v_u32m2(__VA_ARGS__)
21267
#define vfwcvt_rtz_xu_f_v_u32m2(...) __riscv_vfwcvt_rtz_xu_f_v_u32m2(__VA_ARGS__)
21268
#define vfwcvt_xu_f_v_u32m4(...) __riscv_vfwcvt_xu_f_v_u32m4(__VA_ARGS__)
21269
#define vfwcvt_rtz_xu_f_v_u32m4(...) __riscv_vfwcvt_rtz_xu_f_v_u32m4(__VA_ARGS__)
21270
#define vfwcvt_xu_f_v_u32m8(...) __riscv_vfwcvt_xu_f_v_u32m8(__VA_ARGS__)
21271
#define vfwcvt_rtz_xu_f_v_u32m8(...) __riscv_vfwcvt_rtz_xu_f_v_u32m8(__VA_ARGS__)
21272
#define vfwcvt_f_x_v_f32mf2(...) __riscv_vfwcvt_f_x_v_f32mf2(__VA_ARGS__)
21273
#define vfwcvt_f_x_v_f32m1(...) __riscv_vfwcvt_f_x_v_f32m1(__VA_ARGS__)
21274
#define vfwcvt_f_x_v_f32m2(...) __riscv_vfwcvt_f_x_v_f32m2(__VA_ARGS__)
21275
#define vfwcvt_f_x_v_f32m4(...) __riscv_vfwcvt_f_x_v_f32m4(__VA_ARGS__)
21276
#define vfwcvt_f_x_v_f32m8(...) __riscv_vfwcvt_f_x_v_f32m8(__VA_ARGS__)
21277
#define vfwcvt_f_xu_v_f32mf2(...) __riscv_vfwcvt_f_xu_v_f32mf2(__VA_ARGS__)
21278
#define vfwcvt_f_xu_v_f32m1(...) __riscv_vfwcvt_f_xu_v_f32m1(__VA_ARGS__)
21279
#define vfwcvt_f_xu_v_f32m2(...) __riscv_vfwcvt_f_xu_v_f32m2(__VA_ARGS__)
21280
#define vfwcvt_f_xu_v_f32m4(...) __riscv_vfwcvt_f_xu_v_f32m4(__VA_ARGS__)
21281
#define vfwcvt_f_xu_v_f32m8(...) __riscv_vfwcvt_f_xu_v_f32m8(__VA_ARGS__)
21282
#define vfwcvt_f_f_v_f32mf2(...) __riscv_vfwcvt_f_f_v_f32mf2(__VA_ARGS__)
21283
#define vfwcvt_f_f_v_f32m1(...) __riscv_vfwcvt_f_f_v_f32m1(__VA_ARGS__)
21284
#define vfwcvt_f_f_v_f32m2(...) __riscv_vfwcvt_f_f_v_f32m2(__VA_ARGS__)
21285
#define vfwcvt_f_f_v_f32m4(...) __riscv_vfwcvt_f_f_v_f32m4(__VA_ARGS__)
21286
#define vfwcvt_f_f_v_f32m8(...) __riscv_vfwcvt_f_f_v_f32m8(__VA_ARGS__)
21287
#define vfwcvt_x_f_v_i64m1(...) __riscv_vfwcvt_x_f_v_i64m1(__VA_ARGS__)
21288
#define vfwcvt_rtz_x_f_v_i64m1(...) __riscv_vfwcvt_rtz_x_f_v_i64m1(__VA_ARGS__)
21289
#define vfwcvt_x_f_v_i64m2(...) __riscv_vfwcvt_x_f_v_i64m2(__VA_ARGS__)
21290
#define vfwcvt_rtz_x_f_v_i64m2(...) __riscv_vfwcvt_rtz_x_f_v_i64m2(__VA_ARGS__)
21291
#define vfwcvt_x_f_v_i64m4(...) __riscv_vfwcvt_x_f_v_i64m4(__VA_ARGS__)
21292
#define vfwcvt_rtz_x_f_v_i64m4(...) __riscv_vfwcvt_rtz_x_f_v_i64m4(__VA_ARGS__)
21293
#define vfwcvt_x_f_v_i64m8(...) __riscv_vfwcvt_x_f_v_i64m8(__VA_ARGS__)
21294
#define vfwcvt_rtz_x_f_v_i64m8(...) __riscv_vfwcvt_rtz_x_f_v_i64m8(__VA_ARGS__)
21295
#define vwcvt_x_x_v_i64m1(...) __riscv_vwcvt_x_x_v_i64m1(__VA_ARGS__)
21296
#define vwcvt_x_x_v_i64m2(...) __riscv_vwcvt_x_x_v_i64m2(__VA_ARGS__)
21297
#define vwcvt_x_x_v_i64m4(...) __riscv_vwcvt_x_x_v_i64m4(__VA_ARGS__)
21298
#define vwcvt_x_x_v_i64m8(...) __riscv_vwcvt_x_x_v_i64m8(__VA_ARGS__)
21299
#define vwcvtu_x_x_v_u64m1(...) __riscv_vwcvtu_x_x_v_u64m1(__VA_ARGS__)
21300
#define vwcvtu_x_x_v_u64m2(...) __riscv_vwcvtu_x_x_v_u64m2(__VA_ARGS__)
21301
#define vwcvtu_x_x_v_u64m4(...) __riscv_vwcvtu_x_x_v_u64m4(__VA_ARGS__)
21302
#define vwcvtu_x_x_v_u64m8(...) __riscv_vwcvtu_x_x_v_u64m8(__VA_ARGS__)
21303
#define vfwcvt_xu_f_v_u64m1(...) __riscv_vfwcvt_xu_f_v_u64m1(__VA_ARGS__)
21304
#define vfwcvt_rtz_xu_f_v_u64m1(...) __riscv_vfwcvt_rtz_xu_f_v_u64m1(__VA_ARGS__)
21305
#define vfwcvt_xu_f_v_u64m2(...) __riscv_vfwcvt_xu_f_v_u64m2(__VA_ARGS__)
21306
#define vfwcvt_rtz_xu_f_v_u64m2(...) __riscv_vfwcvt_rtz_xu_f_v_u64m2(__VA_ARGS__)
21307
#define vfwcvt_xu_f_v_u64m4(...) __riscv_vfwcvt_xu_f_v_u64m4(__VA_ARGS__)
21308
#define vfwcvt_rtz_xu_f_v_u64m4(...) __riscv_vfwcvt_rtz_xu_f_v_u64m4(__VA_ARGS__)
21309
#define vfwcvt_xu_f_v_u64m8(...) __riscv_vfwcvt_xu_f_v_u64m8(__VA_ARGS__)
21310
#define vfwcvt_rtz_xu_f_v_u64m8(...) __riscv_vfwcvt_rtz_xu_f_v_u64m8(__VA_ARGS__)
21311
#define vfwcvt_f_x_v_f64m1(...) __riscv_vfwcvt_f_x_v_f64m1(__VA_ARGS__)
21312
#define vfwcvt_f_x_v_f64m2(...) __riscv_vfwcvt_f_x_v_f64m2(__VA_ARGS__)
21313
#define vfwcvt_f_x_v_f64m4(...) __riscv_vfwcvt_f_x_v_f64m4(__VA_ARGS__)
21314
#define vfwcvt_f_x_v_f64m8(...) __riscv_vfwcvt_f_x_v_f64m8(__VA_ARGS__)
21315
#define vfwcvt_f_xu_v_f64m1(...) __riscv_vfwcvt_f_xu_v_f64m1(__VA_ARGS__)
21316
#define vfwcvt_f_xu_v_f64m2(...) __riscv_vfwcvt_f_xu_v_f64m2(__VA_ARGS__)
21317
#define vfwcvt_f_xu_v_f64m4(...) __riscv_vfwcvt_f_xu_v_f64m4(__VA_ARGS__)
21318
#define vfwcvt_f_xu_v_f64m8(...) __riscv_vfwcvt_f_xu_v_f64m8(__VA_ARGS__)
21319
#define vfwcvt_f_f_v_f64m1(...) __riscv_vfwcvt_f_f_v_f64m1(__VA_ARGS__)
21320
#define vfwcvt_f_f_v_f64m2(...) __riscv_vfwcvt_f_f_v_f64m2(__VA_ARGS__)
21321
#define vfwcvt_f_f_v_f64m4(...) __riscv_vfwcvt_f_f_v_f64m4(__VA_ARGS__)
21322
#define vfwcvt_f_f_v_f64m8(...) __riscv_vfwcvt_f_f_v_f64m8(__VA_ARGS__)
21323
// masked functions
21324
#define vwcvt_x_x_v_i16mf4_m(...) __riscv_vwcvt_x_x_v_i16mf4_tumu(__VA_ARGS__)
21325
#define vwcvt_x_x_v_i16mf2_m(...) __riscv_vwcvt_x_x_v_i16mf2_tumu(__VA_ARGS__)
21326
#define vwcvt_x_x_v_i16m1_m(...) __riscv_vwcvt_x_x_v_i16m1_tumu(__VA_ARGS__)
21327
#define vwcvt_x_x_v_i16m2_m(...) __riscv_vwcvt_x_x_v_i16m2_tumu(__VA_ARGS__)
21328
#define vwcvt_x_x_v_i16m4_m(...) __riscv_vwcvt_x_x_v_i16m4_tumu(__VA_ARGS__)
21329
#define vwcvt_x_x_v_i16m8_m(...) __riscv_vwcvt_x_x_v_i16m8_tumu(__VA_ARGS__)
21330
#define vwcvtu_x_x_v_u16mf4_m(...) __riscv_vwcvtu_x_x_v_u16mf4_tumu(__VA_ARGS__)
21331
#define vwcvtu_x_x_v_u16mf2_m(...) __riscv_vwcvtu_x_x_v_u16mf2_tumu(__VA_ARGS__)
21332
#define vwcvtu_x_x_v_u16m1_m(...) __riscv_vwcvtu_x_x_v_u16m1_tumu(__VA_ARGS__)
21333
#define vwcvtu_x_x_v_u16m2_m(...) __riscv_vwcvtu_x_x_v_u16m2_tumu(__VA_ARGS__)
21334
#define vwcvtu_x_x_v_u16m4_m(...) __riscv_vwcvtu_x_x_v_u16m4_tumu(__VA_ARGS__)
21335
#define vwcvtu_x_x_v_u16m8_m(...) __riscv_vwcvtu_x_x_v_u16m8_tumu(__VA_ARGS__)
21336
#define vfwcvt_f_x_v_f16mf4_m(...) __riscv_vfwcvt_f_x_v_f16mf4_tumu(__VA_ARGS__)
21337
#define vfwcvt_f_x_v_f16mf2_m(...) __riscv_vfwcvt_f_x_v_f16mf2_tumu(__VA_ARGS__)
21338
#define vfwcvt_f_x_v_f16m1_m(...) __riscv_vfwcvt_f_x_v_f16m1_tumu(__VA_ARGS__)
21339
#define vfwcvt_f_x_v_f16m2_m(...) __riscv_vfwcvt_f_x_v_f16m2_tumu(__VA_ARGS__)
21340
#define vfwcvt_f_x_v_f16m4_m(...) __riscv_vfwcvt_f_x_v_f16m4_tumu(__VA_ARGS__)
21341
#define vfwcvt_f_x_v_f16m8_m(...) __riscv_vfwcvt_f_x_v_f16m8_tumu(__VA_ARGS__)
21342
#define vfwcvt_f_xu_v_f16mf4_m(...) __riscv_vfwcvt_f_xu_v_f16mf4_tumu(__VA_ARGS__)
21343
#define vfwcvt_f_xu_v_f16mf2_m(...) __riscv_vfwcvt_f_xu_v_f16mf2_tumu(__VA_ARGS__)
21344
#define vfwcvt_f_xu_v_f16m1_m(...) __riscv_vfwcvt_f_xu_v_f16m1_tumu(__VA_ARGS__)
21345
#define vfwcvt_f_xu_v_f16m2_m(...) __riscv_vfwcvt_f_xu_v_f16m2_tumu(__VA_ARGS__)
21346
#define vfwcvt_f_xu_v_f16m4_m(...) __riscv_vfwcvt_f_xu_v_f16m4_tumu(__VA_ARGS__)
21347
#define vfwcvt_f_xu_v_f16m8_m(...) __riscv_vfwcvt_f_xu_v_f16m8_tumu(__VA_ARGS__)
21348
#define vfwcvt_x_f_v_i32mf2_m(...) __riscv_vfwcvt_x_f_v_i32mf2_tumu(__VA_ARGS__)
21349
#define vfwcvt_rtz_x_f_v_i32mf2_m(...) __riscv_vfwcvt_rtz_x_f_v_i32mf2_tumu(__VA_ARGS__)
21350
#define vfwcvt_x_f_v_i32m1_m(...) __riscv_vfwcvt_x_f_v_i32m1_tumu(__VA_ARGS__)
21351
#define vfwcvt_rtz_x_f_v_i32m1_m(...) __riscv_vfwcvt_rtz_x_f_v_i32m1_tumu(__VA_ARGS__)
21352
#define vfwcvt_x_f_v_i32m2_m(...) __riscv_vfwcvt_x_f_v_i32m2_tumu(__VA_ARGS__)
21353
#define vfwcvt_rtz_x_f_v_i32m2_m(...) __riscv_vfwcvt_rtz_x_f_v_i32m2_tumu(__VA_ARGS__)
21354
#define vfwcvt_x_f_v_i32m4_m(...) __riscv_vfwcvt_x_f_v_i32m4_tumu(__VA_ARGS__)
21355
#define vfwcvt_rtz_x_f_v_i32m4_m(...) __riscv_vfwcvt_rtz_x_f_v_i32m4_tumu(__VA_ARGS__)
21356
#define vfwcvt_x_f_v_i32m8_m(...) __riscv_vfwcvt_x_f_v_i32m8_tumu(__VA_ARGS__)
21357
#define vfwcvt_rtz_x_f_v_i32m8_m(...) __riscv_vfwcvt_rtz_x_f_v_i32m8_tumu(__VA_ARGS__)
21358
#define vwcvt_x_x_v_i32mf2_m(...) __riscv_vwcvt_x_x_v_i32mf2_tumu(__VA_ARGS__)
21359
#define vwcvt_x_x_v_i32m1_m(...) __riscv_vwcvt_x_x_v_i32m1_tumu(__VA_ARGS__)
21360
#define vwcvt_x_x_v_i32m2_m(...) __riscv_vwcvt_x_x_v_i32m2_tumu(__VA_ARGS__)
21361
#define vwcvt_x_x_v_i32m4_m(...) __riscv_vwcvt_x_x_v_i32m4_tumu(__VA_ARGS__)
21362
#define vwcvt_x_x_v_i32m8_m(...) __riscv_vwcvt_x_x_v_i32m8_tumu(__VA_ARGS__)
21363
#define vwcvtu_x_x_v_u32mf2_m(...) __riscv_vwcvtu_x_x_v_u32mf2_tumu(__VA_ARGS__)
21364
#define vwcvtu_x_x_v_u32m1_m(...) __riscv_vwcvtu_x_x_v_u32m1_tumu(__VA_ARGS__)
21365
#define vwcvtu_x_x_v_u32m2_m(...) __riscv_vwcvtu_x_x_v_u32m2_tumu(__VA_ARGS__)
21366
#define vwcvtu_x_x_v_u32m4_m(...) __riscv_vwcvtu_x_x_v_u32m4_tumu(__VA_ARGS__)
21367
#define vwcvtu_x_x_v_u32m8_m(...) __riscv_vwcvtu_x_x_v_u32m8_tumu(__VA_ARGS__)
21368
#define vfwcvt_xu_f_v_u32mf2_m(...) __riscv_vfwcvt_xu_f_v_u32mf2_tumu(__VA_ARGS__)
21369
#define vfwcvt_rtz_xu_f_v_u32mf2_m(...) __riscv_vfwcvt_rtz_xu_f_v_u32mf2_tumu(__VA_ARGS__)
21370
#define vfwcvt_xu_f_v_u32m1_m(...) __riscv_vfwcvt_xu_f_v_u32m1_tumu(__VA_ARGS__)
21371
#define vfwcvt_rtz_xu_f_v_u32m1_m(...) __riscv_vfwcvt_rtz_xu_f_v_u32m1_tumu(__VA_ARGS__)
21372
#define vfwcvt_xu_f_v_u32m2_m(...) __riscv_vfwcvt_xu_f_v_u32m2_tumu(__VA_ARGS__)
21373
#define vfwcvt_rtz_xu_f_v_u32m2_m(...) __riscv_vfwcvt_rtz_xu_f_v_u32m2_tumu(__VA_ARGS__)
21374
#define vfwcvt_xu_f_v_u32m4_m(...) __riscv_vfwcvt_xu_f_v_u32m4_tumu(__VA_ARGS__)
21375
#define vfwcvt_rtz_xu_f_v_u32m4_m(...) __riscv_vfwcvt_rtz_xu_f_v_u32m4_tumu(__VA_ARGS__)
21376
#define vfwcvt_xu_f_v_u32m8_m(...) __riscv_vfwcvt_xu_f_v_u32m8_tumu(__VA_ARGS__)
21377
#define vfwcvt_rtz_xu_f_v_u32m8_m(...) __riscv_vfwcvt_rtz_xu_f_v_u32m8_tumu(__VA_ARGS__)
21378
#define vfwcvt_f_x_v_f32mf2_m(...) __riscv_vfwcvt_f_x_v_f32mf2_tumu(__VA_ARGS__)
21379
#define vfwcvt_f_x_v_f32m1_m(...) __riscv_vfwcvt_f_x_v_f32m1_tumu(__VA_ARGS__)
21380
#define vfwcvt_f_x_v_f32m2_m(...) __riscv_vfwcvt_f_x_v_f32m2_tumu(__VA_ARGS__)
21381
#define vfwcvt_f_x_v_f32m4_m(...) __riscv_vfwcvt_f_x_v_f32m4_tumu(__VA_ARGS__)
21382
#define vfwcvt_f_x_v_f32m8_m(...) __riscv_vfwcvt_f_x_v_f32m8_tumu(__VA_ARGS__)
21383
#define vfwcvt_f_xu_v_f32mf2_m(...) __riscv_vfwcvt_f_xu_v_f32mf2_tumu(__VA_ARGS__)
21384
#define vfwcvt_f_xu_v_f32m1_m(...) __riscv_vfwcvt_f_xu_v_f32m1_tumu(__VA_ARGS__)
21385
#define vfwcvt_f_xu_v_f32m2_m(...) __riscv_vfwcvt_f_xu_v_f32m2_tumu(__VA_ARGS__)
21386
#define vfwcvt_f_xu_v_f32m4_m(...) __riscv_vfwcvt_f_xu_v_f32m4_tumu(__VA_ARGS__)
21387
#define vfwcvt_f_xu_v_f32m8_m(...) __riscv_vfwcvt_f_xu_v_f32m8_tumu(__VA_ARGS__)
21388
#define vfwcvt_f_f_v_f32mf2_m(...) __riscv_vfwcvt_f_f_v_f32mf2_tumu(__VA_ARGS__)
21389
#define vfwcvt_f_f_v_f32m1_m(...) __riscv_vfwcvt_f_f_v_f32m1_tumu(__VA_ARGS__)
21390
#define vfwcvt_f_f_v_f32m2_m(...) __riscv_vfwcvt_f_f_v_f32m2_tumu(__VA_ARGS__)
21391
#define vfwcvt_f_f_v_f32m4_m(...) __riscv_vfwcvt_f_f_v_f32m4_tumu(__VA_ARGS__)
21392
#define vfwcvt_f_f_v_f32m8_m(...) __riscv_vfwcvt_f_f_v_f32m8_tumu(__VA_ARGS__)
21393
#define vfwcvt_x_f_v_i64m1_m(...) __riscv_vfwcvt_x_f_v_i64m1_tumu(__VA_ARGS__)
21394
#define vfwcvt_rtz_x_f_v_i64m1_m(...) __riscv_vfwcvt_rtz_x_f_v_i64m1_tumu(__VA_ARGS__)
21395
#define vfwcvt_x_f_v_i64m2_m(...) __riscv_vfwcvt_x_f_v_i64m2_tumu(__VA_ARGS__)
21396
#define vfwcvt_rtz_x_f_v_i64m2_m(...) __riscv_vfwcvt_rtz_x_f_v_i64m2_tumu(__VA_ARGS__)
21397
#define vfwcvt_x_f_v_i64m4_m(...) __riscv_vfwcvt_x_f_v_i64m4_tumu(__VA_ARGS__)
21398
#define vfwcvt_rtz_x_f_v_i64m4_m(...) __riscv_vfwcvt_rtz_x_f_v_i64m4_tumu(__VA_ARGS__)
21399
#define vfwcvt_x_f_v_i64m8_m(...) __riscv_vfwcvt_x_f_v_i64m8_tumu(__VA_ARGS__)
21400
#define vfwcvt_rtz_x_f_v_i64m8_m(...) __riscv_vfwcvt_rtz_x_f_v_i64m8_tumu(__VA_ARGS__)
21401
#define vwcvt_x_x_v_i64m1_m(...) __riscv_vwcvt_x_x_v_i64m1_tumu(__VA_ARGS__)
21402
#define vwcvt_x_x_v_i64m2_m(...) __riscv_vwcvt_x_x_v_i64m2_tumu(__VA_ARGS__)
21403
#define vwcvt_x_x_v_i64m4_m(...) __riscv_vwcvt_x_x_v_i64m4_tumu(__VA_ARGS__)
21404
#define vwcvt_x_x_v_i64m8_m(...) __riscv_vwcvt_x_x_v_i64m8_tumu(__VA_ARGS__)
21405
#define vwcvtu_x_x_v_u64m1_m(...) __riscv_vwcvtu_x_x_v_u64m1_tumu(__VA_ARGS__)
21406
#define vwcvtu_x_x_v_u64m2_m(...) __riscv_vwcvtu_x_x_v_u64m2_tumu(__VA_ARGS__)
21407
#define vwcvtu_x_x_v_u64m4_m(...) __riscv_vwcvtu_x_x_v_u64m4_tumu(__VA_ARGS__)
21408
#define vwcvtu_x_x_v_u64m8_m(...) __riscv_vwcvtu_x_x_v_u64m8_tumu(__VA_ARGS__)
21409
#define vfwcvt_xu_f_v_u64m1_m(...) __riscv_vfwcvt_xu_f_v_u64m1_tumu(__VA_ARGS__)
21410
#define vfwcvt_rtz_xu_f_v_u64m1_m(...) __riscv_vfwcvt_rtz_xu_f_v_u64m1_tumu(__VA_ARGS__)
21411
#define vfwcvt_xu_f_v_u64m2_m(...) __riscv_vfwcvt_xu_f_v_u64m2_tumu(__VA_ARGS__)
21412
#define vfwcvt_rtz_xu_f_v_u64m2_m(...) __riscv_vfwcvt_rtz_xu_f_v_u64m2_tumu(__VA_ARGS__)
21413
#define vfwcvt_xu_f_v_u64m4_m(...) __riscv_vfwcvt_xu_f_v_u64m4_tumu(__VA_ARGS__)
21414
#define vfwcvt_rtz_xu_f_v_u64m4_m(...) __riscv_vfwcvt_rtz_xu_f_v_u64m4_tumu(__VA_ARGS__)
21415
#define vfwcvt_xu_f_v_u64m8_m(...) __riscv_vfwcvt_xu_f_v_u64m8_tumu(__VA_ARGS__)
21416
#define vfwcvt_rtz_xu_f_v_u64m8_m(...) __riscv_vfwcvt_rtz_xu_f_v_u64m8_tumu(__VA_ARGS__)
21417
#define vfwcvt_f_x_v_f64m1_m(...) __riscv_vfwcvt_f_x_v_f64m1_tumu(__VA_ARGS__)
21418
#define vfwcvt_f_x_v_f64m2_m(...) __riscv_vfwcvt_f_x_v_f64m2_tumu(__VA_ARGS__)
21419
#define vfwcvt_f_x_v_f64m4_m(...) __riscv_vfwcvt_f_x_v_f64m4_tumu(__VA_ARGS__)
21420
#define vfwcvt_f_x_v_f64m8_m(...) __riscv_vfwcvt_f_x_v_f64m8_tumu(__VA_ARGS__)
21421
#define vfwcvt_f_xu_v_f64m1_m(...) __riscv_vfwcvt_f_xu_v_f64m1_tumu(__VA_ARGS__)
21422
#define vfwcvt_f_xu_v_f64m2_m(...) __riscv_vfwcvt_f_xu_v_f64m2_tumu(__VA_ARGS__)
21423
#define vfwcvt_f_xu_v_f64m4_m(...) __riscv_vfwcvt_f_xu_v_f64m4_tumu(__VA_ARGS__)
21424
#define vfwcvt_f_xu_v_f64m8_m(...) __riscv_vfwcvt_f_xu_v_f64m8_tumu(__VA_ARGS__)
21425
#define vfwcvt_f_f_v_f64m1_m(...) __riscv_vfwcvt_f_f_v_f64m1_tumu(__VA_ARGS__)
21426
#define vfwcvt_f_f_v_f64m2_m(...) __riscv_vfwcvt_f_f_v_f64m2_tumu(__VA_ARGS__)
21427
#define vfwcvt_f_f_v_f64m4_m(...) __riscv_vfwcvt_f_f_v_f64m4_tumu(__VA_ARGS__)
21428
#define vfwcvt_f_f_v_f64m8_m(...) __riscv_vfwcvt_f_f_v_f64m8_tumu(__VA_ARGS__)
21429
#define vfncvt_x_f_w_i8mf8(...) __riscv_vfncvt_x_f_w_i8mf8(__VA_ARGS__)
21430
#define vfncvt_rtz_x_f_w_i8mf8(...) __riscv_vfncvt_rtz_x_f_w_i8mf8(__VA_ARGS__)
21431
#define vfncvt_x_f_w_i8mf4(...) __riscv_vfncvt_x_f_w_i8mf4(__VA_ARGS__)
21432
#define vfncvt_rtz_x_f_w_i8mf4(...) __riscv_vfncvt_rtz_x_f_w_i8mf4(__VA_ARGS__)
21433
#define vfncvt_x_f_w_i8mf2(...) __riscv_vfncvt_x_f_w_i8mf2(__VA_ARGS__)
21434
#define vfncvt_rtz_x_f_w_i8mf2(...) __riscv_vfncvt_rtz_x_f_w_i8mf2(__VA_ARGS__)
21435
#define vfncvt_x_f_w_i8m1(...) __riscv_vfncvt_x_f_w_i8m1(__VA_ARGS__)
21436
#define vfncvt_rtz_x_f_w_i8m1(...) __riscv_vfncvt_rtz_x_f_w_i8m1(__VA_ARGS__)
21437
#define vfncvt_x_f_w_i8m2(...) __riscv_vfncvt_x_f_w_i8m2(__VA_ARGS__)
21438
#define vfncvt_rtz_x_f_w_i8m2(...) __riscv_vfncvt_rtz_x_f_w_i8m2(__VA_ARGS__)
21439
#define vfncvt_x_f_w_i8m4(...) __riscv_vfncvt_x_f_w_i8m4(__VA_ARGS__)
21440
#define vfncvt_rtz_x_f_w_i8m4(...) __riscv_vfncvt_rtz_x_f_w_i8m4(__VA_ARGS__)
21441
#define vncvt_x_x_w_i8mf8(...) __riscv_vncvt_x_x_w_i8mf8(__VA_ARGS__)
21442
#define vncvt_x_x_w_i8mf4(...) __riscv_vncvt_x_x_w_i8mf4(__VA_ARGS__)
21443
#define vncvt_x_x_w_i8mf2(...) __riscv_vncvt_x_x_w_i8mf2(__VA_ARGS__)
21444
#define vncvt_x_x_w_i8m1(...) __riscv_vncvt_x_x_w_i8m1(__VA_ARGS__)
21445
#define vncvt_x_x_w_i8m2(...) __riscv_vncvt_x_x_w_i8m2(__VA_ARGS__)
21446
#define vncvt_x_x_w_i8m4(...) __riscv_vncvt_x_x_w_i8m4(__VA_ARGS__)
21447
#define vncvt_x_x_w_u8mf8(...) __riscv_vncvt_x_x_w_u8mf8(__VA_ARGS__)
21448
#define vncvt_x_x_w_u8mf4(...) __riscv_vncvt_x_x_w_u8mf4(__VA_ARGS__)
21449
#define vncvt_x_x_w_u8mf2(...) __riscv_vncvt_x_x_w_u8mf2(__VA_ARGS__)
21450
#define vncvt_x_x_w_u8m1(...) __riscv_vncvt_x_x_w_u8m1(__VA_ARGS__)
21451
#define vncvt_x_x_w_u8m2(...) __riscv_vncvt_x_x_w_u8m2(__VA_ARGS__)
21452
#define vncvt_x_x_w_u8m4(...) __riscv_vncvt_x_x_w_u8m4(__VA_ARGS__)
21453
#define vfncvt_xu_f_w_u8mf8(...) __riscv_vfncvt_xu_f_w_u8mf8(__VA_ARGS__)
21454
#define vfncvt_rtz_xu_f_w_u8mf8(...) __riscv_vfncvt_rtz_xu_f_w_u8mf8(__VA_ARGS__)
21455
#define vfncvt_xu_f_w_u8mf4(...) __riscv_vfncvt_xu_f_w_u8mf4(__VA_ARGS__)
21456
#define vfncvt_rtz_xu_f_w_u8mf4(...) __riscv_vfncvt_rtz_xu_f_w_u8mf4(__VA_ARGS__)
21457
#define vfncvt_xu_f_w_u8mf2(...) __riscv_vfncvt_xu_f_w_u8mf2(__VA_ARGS__)
21458
#define vfncvt_rtz_xu_f_w_u8mf2(...) __riscv_vfncvt_rtz_xu_f_w_u8mf2(__VA_ARGS__)
21459
#define vfncvt_xu_f_w_u8m1(...) __riscv_vfncvt_xu_f_w_u8m1(__VA_ARGS__)
21460
#define vfncvt_rtz_xu_f_w_u8m1(...) __riscv_vfncvt_rtz_xu_f_w_u8m1(__VA_ARGS__)
21461
#define vfncvt_xu_f_w_u8m2(...) __riscv_vfncvt_xu_f_w_u8m2(__VA_ARGS__)
21462
#define vfncvt_rtz_xu_f_w_u8m2(...) __riscv_vfncvt_rtz_xu_f_w_u8m2(__VA_ARGS__)
21463
#define vfncvt_xu_f_w_u8m4(...) __riscv_vfncvt_xu_f_w_u8m4(__VA_ARGS__)
21464
#define vfncvt_rtz_xu_f_w_u8m4(...) __riscv_vfncvt_rtz_xu_f_w_u8m4(__VA_ARGS__)
21465
#define vfncvt_x_f_w_i16mf4(...) __riscv_vfncvt_x_f_w_i16mf4(__VA_ARGS__)
21466
#define vfncvt_rtz_x_f_w_i16mf4(...) __riscv_vfncvt_rtz_x_f_w_i16mf4(__VA_ARGS__)
21467
#define vfncvt_x_f_w_i16mf2(...) __riscv_vfncvt_x_f_w_i16mf2(__VA_ARGS__)
21468
#define vfncvt_rtz_x_f_w_i16mf2(...) __riscv_vfncvt_rtz_x_f_w_i16mf2(__VA_ARGS__)
21469
#define vfncvt_x_f_w_i16m1(...) __riscv_vfncvt_x_f_w_i16m1(__VA_ARGS__)
21470
#define vfncvt_rtz_x_f_w_i16m1(...) __riscv_vfncvt_rtz_x_f_w_i16m1(__VA_ARGS__)
21471
#define vfncvt_x_f_w_i16m2(...) __riscv_vfncvt_x_f_w_i16m2(__VA_ARGS__)
21472
#define vfncvt_rtz_x_f_w_i16m2(...) __riscv_vfncvt_rtz_x_f_w_i16m2(__VA_ARGS__)
21473
#define vfncvt_x_f_w_i16m4(...) __riscv_vfncvt_x_f_w_i16m4(__VA_ARGS__)
21474
#define vfncvt_rtz_x_f_w_i16m4(...) __riscv_vfncvt_rtz_x_f_w_i16m4(__VA_ARGS__)
21475
#define vncvt_x_x_w_i16mf4(...) __riscv_vncvt_x_x_w_i16mf4(__VA_ARGS__)
21476
#define vncvt_x_x_w_i16mf2(...) __riscv_vncvt_x_x_w_i16mf2(__VA_ARGS__)
21477
#define vncvt_x_x_w_i16m1(...) __riscv_vncvt_x_x_w_i16m1(__VA_ARGS__)
21478
#define vncvt_x_x_w_i16m2(...) __riscv_vncvt_x_x_w_i16m2(__VA_ARGS__)
21479
#define vncvt_x_x_w_i16m4(...) __riscv_vncvt_x_x_w_i16m4(__VA_ARGS__)
21480
#define vncvt_x_x_w_u16mf4(...) __riscv_vncvt_x_x_w_u16mf4(__VA_ARGS__)
21481
#define vncvt_x_x_w_u16mf2(...) __riscv_vncvt_x_x_w_u16mf2(__VA_ARGS__)
21482
#define vncvt_x_x_w_u16m1(...) __riscv_vncvt_x_x_w_u16m1(__VA_ARGS__)
21483
#define vncvt_x_x_w_u16m2(...) __riscv_vncvt_x_x_w_u16m2(__VA_ARGS__)
21484
#define vncvt_x_x_w_u16m4(...) __riscv_vncvt_x_x_w_u16m4(__VA_ARGS__)
21485
#define vfncvt_xu_f_w_u16mf4(...) __riscv_vfncvt_xu_f_w_u16mf4(__VA_ARGS__)
21486
#define vfncvt_rtz_xu_f_w_u16mf4(...) __riscv_vfncvt_rtz_xu_f_w_u16mf4(__VA_ARGS__)
21487
#define vfncvt_xu_f_w_u16mf2(...) __riscv_vfncvt_xu_f_w_u16mf2(__VA_ARGS__)
21488
#define vfncvt_rtz_xu_f_w_u16mf2(...) __riscv_vfncvt_rtz_xu_f_w_u16mf2(__VA_ARGS__)
21489
#define vfncvt_xu_f_w_u16m1(...) __riscv_vfncvt_xu_f_w_u16m1(__VA_ARGS__)
21490
#define vfncvt_rtz_xu_f_w_u16m1(...) __riscv_vfncvt_rtz_xu_f_w_u16m1(__VA_ARGS__)
21491
#define vfncvt_xu_f_w_u16m2(...) __riscv_vfncvt_xu_f_w_u16m2(__VA_ARGS__)
21492
#define vfncvt_rtz_xu_f_w_u16m2(...) __riscv_vfncvt_rtz_xu_f_w_u16m2(__VA_ARGS__)
21493
#define vfncvt_xu_f_w_u16m4(...) __riscv_vfncvt_xu_f_w_u16m4(__VA_ARGS__)
21494
#define vfncvt_rtz_xu_f_w_u16m4(...) __riscv_vfncvt_rtz_xu_f_w_u16m4(__VA_ARGS__)
21495
#define vfncvt_f_x_w_f16mf4(...) __riscv_vfncvt_f_x_w_f16mf4(__VA_ARGS__)
21496
#define vfncvt_f_x_w_f16mf2(...) __riscv_vfncvt_f_x_w_f16mf2(__VA_ARGS__)
21497
#define vfncvt_f_x_w_f16m1(...) __riscv_vfncvt_f_x_w_f16m1(__VA_ARGS__)
21498
#define vfncvt_f_x_w_f16m2(...) __riscv_vfncvt_f_x_w_f16m2(__VA_ARGS__)
21499
#define vfncvt_f_x_w_f16m4(...) __riscv_vfncvt_f_x_w_f16m4(__VA_ARGS__)
21500
#define vfncvt_f_xu_w_f16mf4(...) __riscv_vfncvt_f_xu_w_f16mf4(__VA_ARGS__)
21501
#define vfncvt_f_xu_w_f16mf2(...) __riscv_vfncvt_f_xu_w_f16mf2(__VA_ARGS__)
21502
#define vfncvt_f_xu_w_f16m1(...) __riscv_vfncvt_f_xu_w_f16m1(__VA_ARGS__)
21503
#define vfncvt_f_xu_w_f16m2(...) __riscv_vfncvt_f_xu_w_f16m2(__VA_ARGS__)
21504
#define vfncvt_f_xu_w_f16m4(...) __riscv_vfncvt_f_xu_w_f16m4(__VA_ARGS__)
21505
#define vfncvt_f_f_w_f16mf4(...) __riscv_vfncvt_f_f_w_f16mf4(__VA_ARGS__)
21506
#define vfncvt_rod_f_f_w_f16mf4(...) __riscv_vfncvt_rod_f_f_w_f16mf4(__VA_ARGS__)
21507
#define vfncvt_f_f_w_f16mf2(...) __riscv_vfncvt_f_f_w_f16mf2(__VA_ARGS__)
21508
#define vfncvt_rod_f_f_w_f16mf2(...) __riscv_vfncvt_rod_f_f_w_f16mf2(__VA_ARGS__)
21509
#define vfncvt_f_f_w_f16m1(...) __riscv_vfncvt_f_f_w_f16m1(__VA_ARGS__)
21510
#define vfncvt_rod_f_f_w_f16m1(...) __riscv_vfncvt_rod_f_f_w_f16m1(__VA_ARGS__)
21511
#define vfncvt_f_f_w_f16m2(...) __riscv_vfncvt_f_f_w_f16m2(__VA_ARGS__)
21512
#define vfncvt_rod_f_f_w_f16m2(...) __riscv_vfncvt_rod_f_f_w_f16m2(__VA_ARGS__)
21513
#define vfncvt_f_f_w_f16m4(...) __riscv_vfncvt_f_f_w_f16m4(__VA_ARGS__)
21514
#define vfncvt_rod_f_f_w_f16m4(...) __riscv_vfncvt_rod_f_f_w_f16m4(__VA_ARGS__)
21515
#define vfncvt_x_f_w_i32mf2(...) __riscv_vfncvt_x_f_w_i32mf2(__VA_ARGS__)
21516
#define vfncvt_rtz_x_f_w_i32mf2(...) __riscv_vfncvt_rtz_x_f_w_i32mf2(__VA_ARGS__)
21517
#define vfncvt_x_f_w_i32m1(...) __riscv_vfncvt_x_f_w_i32m1(__VA_ARGS__)
21518
#define vfncvt_rtz_x_f_w_i32m1(...) __riscv_vfncvt_rtz_x_f_w_i32m1(__VA_ARGS__)
21519
#define vfncvt_x_f_w_i32m2(...) __riscv_vfncvt_x_f_w_i32m2(__VA_ARGS__)
21520
#define vfncvt_rtz_x_f_w_i32m2(...) __riscv_vfncvt_rtz_x_f_w_i32m2(__VA_ARGS__)
21521
#define vfncvt_x_f_w_i32m4(...) __riscv_vfncvt_x_f_w_i32m4(__VA_ARGS__)
21522
#define vfncvt_rtz_x_f_w_i32m4(...) __riscv_vfncvt_rtz_x_f_w_i32m4(__VA_ARGS__)
21523
#define vncvt_x_x_w_i32mf2(...) __riscv_vncvt_x_x_w_i32mf2(__VA_ARGS__)
21524
#define vncvt_x_x_w_i32m1(...) __riscv_vncvt_x_x_w_i32m1(__VA_ARGS__)
21525
#define vncvt_x_x_w_i32m2(...) __riscv_vncvt_x_x_w_i32m2(__VA_ARGS__)
21526
#define vncvt_x_x_w_i32m4(...) __riscv_vncvt_x_x_w_i32m4(__VA_ARGS__)
21527
#define vncvt_x_x_w_u32mf2(...) __riscv_vncvt_x_x_w_u32mf2(__VA_ARGS__)
21528
#define vncvt_x_x_w_u32m1(...) __riscv_vncvt_x_x_w_u32m1(__VA_ARGS__)
21529
#define vncvt_x_x_w_u32m2(...) __riscv_vncvt_x_x_w_u32m2(__VA_ARGS__)
21530
#define vncvt_x_x_w_u32m4(...) __riscv_vncvt_x_x_w_u32m4(__VA_ARGS__)
21531
#define vfncvt_xu_f_w_u32mf2(...) __riscv_vfncvt_xu_f_w_u32mf2(__VA_ARGS__)
21532
#define vfncvt_rtz_xu_f_w_u32mf2(...) __riscv_vfncvt_rtz_xu_f_w_u32mf2(__VA_ARGS__)
21533
#define vfncvt_xu_f_w_u32m1(...) __riscv_vfncvt_xu_f_w_u32m1(__VA_ARGS__)
21534
#define vfncvt_rtz_xu_f_w_u32m1(...) __riscv_vfncvt_rtz_xu_f_w_u32m1(__VA_ARGS__)
21535
#define vfncvt_xu_f_w_u32m2(...) __riscv_vfncvt_xu_f_w_u32m2(__VA_ARGS__)
21536
#define vfncvt_rtz_xu_f_w_u32m2(...) __riscv_vfncvt_rtz_xu_f_w_u32m2(__VA_ARGS__)
21537
#define vfncvt_xu_f_w_u32m4(...) __riscv_vfncvt_xu_f_w_u32m4(__VA_ARGS__)
21538
#define vfncvt_rtz_xu_f_w_u32m4(...) __riscv_vfncvt_rtz_xu_f_w_u32m4(__VA_ARGS__)
21539
#define vfncvt_f_x_w_f32mf2(...) __riscv_vfncvt_f_x_w_f32mf2(__VA_ARGS__)
21540
#define vfncvt_f_x_w_f32m1(...) __riscv_vfncvt_f_x_w_f32m1(__VA_ARGS__)
21541
#define vfncvt_f_x_w_f32m2(...) __riscv_vfncvt_f_x_w_f32m2(__VA_ARGS__)
21542
#define vfncvt_f_x_w_f32m4(...) __riscv_vfncvt_f_x_w_f32m4(__VA_ARGS__)
21543
#define vfncvt_f_xu_w_f32mf2(...) __riscv_vfncvt_f_xu_w_f32mf2(__VA_ARGS__)
21544
#define vfncvt_f_xu_w_f32m1(...) __riscv_vfncvt_f_xu_w_f32m1(__VA_ARGS__)
21545
#define vfncvt_f_xu_w_f32m2(...) __riscv_vfncvt_f_xu_w_f32m2(__VA_ARGS__)
21546
#define vfncvt_f_xu_w_f32m4(...) __riscv_vfncvt_f_xu_w_f32m4(__VA_ARGS__)
21547
#define vfncvt_f_f_w_f32mf2(...) __riscv_vfncvt_f_f_w_f32mf2(__VA_ARGS__)
21548
#define vfncvt_rod_f_f_w_f32mf2(...) __riscv_vfncvt_rod_f_f_w_f32mf2(__VA_ARGS__)
21549
#define vfncvt_f_f_w_f32m1(...) __riscv_vfncvt_f_f_w_f32m1(__VA_ARGS__)
21550
#define vfncvt_rod_f_f_w_f32m1(...) __riscv_vfncvt_rod_f_f_w_f32m1(__VA_ARGS__)
21551
#define vfncvt_f_f_w_f32m2(...) __riscv_vfncvt_f_f_w_f32m2(__VA_ARGS__)
21552
#define vfncvt_rod_f_f_w_f32m2(...) __riscv_vfncvt_rod_f_f_w_f32m2(__VA_ARGS__)
21553
#define vfncvt_f_f_w_f32m4(...) __riscv_vfncvt_f_f_w_f32m4(__VA_ARGS__)
21554
#define vfncvt_rod_f_f_w_f32m4(...) __riscv_vfncvt_rod_f_f_w_f32m4(__VA_ARGS__)
21555
// masked functions
21556
#define vfncvt_x_f_w_i8mf8_m(...) __riscv_vfncvt_x_f_w_i8mf8_tumu(__VA_ARGS__)
21557
#define vfncvt_rtz_x_f_w_i8mf8_m(...) __riscv_vfncvt_rtz_x_f_w_i8mf8_tumu(__VA_ARGS__)
21558
#define vfncvt_x_f_w_i8mf4_m(...) __riscv_vfncvt_x_f_w_i8mf4_tumu(__VA_ARGS__)
21559
#define vfncvt_rtz_x_f_w_i8mf4_m(...) __riscv_vfncvt_rtz_x_f_w_i8mf4_tumu(__VA_ARGS__)
21560
#define vfncvt_x_f_w_i8mf2_m(...) __riscv_vfncvt_x_f_w_i8mf2_tumu(__VA_ARGS__)
21561
#define vfncvt_rtz_x_f_w_i8mf2_m(...) __riscv_vfncvt_rtz_x_f_w_i8mf2_tumu(__VA_ARGS__)
21562
#define vfncvt_x_f_w_i8m1_m(...) __riscv_vfncvt_x_f_w_i8m1_tumu(__VA_ARGS__)
21563
#define vfncvt_rtz_x_f_w_i8m1_m(...) __riscv_vfncvt_rtz_x_f_w_i8m1_tumu(__VA_ARGS__)
21564
#define vfncvt_x_f_w_i8m2_m(...) __riscv_vfncvt_x_f_w_i8m2_tumu(__VA_ARGS__)
21565
#define vfncvt_rtz_x_f_w_i8m2_m(...) __riscv_vfncvt_rtz_x_f_w_i8m2_tumu(__VA_ARGS__)
21566
#define vfncvt_x_f_w_i8m4_m(...) __riscv_vfncvt_x_f_w_i8m4_tumu(__VA_ARGS__)
21567
#define vfncvt_rtz_x_f_w_i8m4_m(...) __riscv_vfncvt_rtz_x_f_w_i8m4_tumu(__VA_ARGS__)
21568
#define vncvt_x_x_w_i8mf8_m(...) __riscv_vncvt_x_x_w_i8mf8_tumu(__VA_ARGS__)
21569
#define vncvt_x_x_w_i8mf4_m(...) __riscv_vncvt_x_x_w_i8mf4_tumu(__VA_ARGS__)
21570
#define vncvt_x_x_w_i8mf2_m(...) __riscv_vncvt_x_x_w_i8mf2_tumu(__VA_ARGS__)
21571
#define vncvt_x_x_w_i8m1_m(...) __riscv_vncvt_x_x_w_i8m1_tumu(__VA_ARGS__)
21572
#define vncvt_x_x_w_i8m2_m(...) __riscv_vncvt_x_x_w_i8m2_tumu(__VA_ARGS__)
21573
#define vncvt_x_x_w_i8m4_m(...) __riscv_vncvt_x_x_w_i8m4_tumu(__VA_ARGS__)
21574
#define vncvt_x_x_w_u8mf8_m(...) __riscv_vncvt_x_x_w_u8mf8_tumu(__VA_ARGS__)
21575
#define vncvt_x_x_w_u8mf4_m(...) __riscv_vncvt_x_x_w_u8mf4_tumu(__VA_ARGS__)
21576
#define vncvt_x_x_w_u8mf2_m(...) __riscv_vncvt_x_x_w_u8mf2_tumu(__VA_ARGS__)
21577
#define vncvt_x_x_w_u8m1_m(...) __riscv_vncvt_x_x_w_u8m1_tumu(__VA_ARGS__)
21578
#define vncvt_x_x_w_u8m2_m(...) __riscv_vncvt_x_x_w_u8m2_tumu(__VA_ARGS__)
21579
#define vncvt_x_x_w_u8m4_m(...) __riscv_vncvt_x_x_w_u8m4_tumu(__VA_ARGS__)
21580
#define vfncvt_xu_f_w_u8mf8_m(...) __riscv_vfncvt_xu_f_w_u8mf8_tumu(__VA_ARGS__)
21581
#define vfncvt_rtz_xu_f_w_u8mf8_m(...) __riscv_vfncvt_rtz_xu_f_w_u8mf8_tumu(__VA_ARGS__)
21582
#define vfncvt_xu_f_w_u8mf4_m(...) __riscv_vfncvt_xu_f_w_u8mf4_tumu(__VA_ARGS__)
21583
#define vfncvt_rtz_xu_f_w_u8mf4_m(...) __riscv_vfncvt_rtz_xu_f_w_u8mf4_tumu(__VA_ARGS__)
21584
#define vfncvt_xu_f_w_u8mf2_m(...) __riscv_vfncvt_xu_f_w_u8mf2_tumu(__VA_ARGS__)
21585
#define vfncvt_rtz_xu_f_w_u8mf2_m(...) __riscv_vfncvt_rtz_xu_f_w_u8mf2_tumu(__VA_ARGS__)
21586
#define vfncvt_xu_f_w_u8m1_m(...) __riscv_vfncvt_xu_f_w_u8m1_tumu(__VA_ARGS__)
21587
#define vfncvt_rtz_xu_f_w_u8m1_m(...) __riscv_vfncvt_rtz_xu_f_w_u8m1_tumu(__VA_ARGS__)
21588
#define vfncvt_xu_f_w_u8m2_m(...) __riscv_vfncvt_xu_f_w_u8m2_tumu(__VA_ARGS__)
21589
#define vfncvt_rtz_xu_f_w_u8m2_m(...) __riscv_vfncvt_rtz_xu_f_w_u8m2_tumu(__VA_ARGS__)
21590
#define vfncvt_xu_f_w_u8m4_m(...) __riscv_vfncvt_xu_f_w_u8m4_tumu(__VA_ARGS__)
21591
#define vfncvt_rtz_xu_f_w_u8m4_m(...) __riscv_vfncvt_rtz_xu_f_w_u8m4_tumu(__VA_ARGS__)
21592
#define vfncvt_x_f_w_i16mf4_m(...) __riscv_vfncvt_x_f_w_i16mf4_tumu(__VA_ARGS__)
21593
#define vfncvt_rtz_x_f_w_i16mf4_m(...) __riscv_vfncvt_rtz_x_f_w_i16mf4_tumu(__VA_ARGS__)
21594
#define vfncvt_x_f_w_i16mf2_m(...) __riscv_vfncvt_x_f_w_i16mf2_tumu(__VA_ARGS__)
21595
#define vfncvt_rtz_x_f_w_i16mf2_m(...) __riscv_vfncvt_rtz_x_f_w_i16mf2_tumu(__VA_ARGS__)
21596
#define vfncvt_x_f_w_i16m1_m(...) __riscv_vfncvt_x_f_w_i16m1_tumu(__VA_ARGS__)
21597
#define vfncvt_rtz_x_f_w_i16m1_m(...) __riscv_vfncvt_rtz_x_f_w_i16m1_tumu(__VA_ARGS__)
21598
#define vfncvt_x_f_w_i16m2_m(...) __riscv_vfncvt_x_f_w_i16m2_tumu(__VA_ARGS__)
21599
#define vfncvt_rtz_x_f_w_i16m2_m(...) __riscv_vfncvt_rtz_x_f_w_i16m2_tumu(__VA_ARGS__)
21600
#define vfncvt_x_f_w_i16m4_m(...) __riscv_vfncvt_x_f_w_i16m4_tumu(__VA_ARGS__)
21601
#define vfncvt_rtz_x_f_w_i16m4_m(...) __riscv_vfncvt_rtz_x_f_w_i16m4_tumu(__VA_ARGS__)
21602
#define vncvt_x_x_w_i16mf4_m(...) __riscv_vncvt_x_x_w_i16mf4_tumu(__VA_ARGS__)
21603
#define vncvt_x_x_w_i16mf2_m(...) __riscv_vncvt_x_x_w_i16mf2_tumu(__VA_ARGS__)
21604
#define vncvt_x_x_w_i16m1_m(...) __riscv_vncvt_x_x_w_i16m1_tumu(__VA_ARGS__)
21605
#define vncvt_x_x_w_i16m2_m(...) __riscv_vncvt_x_x_w_i16m2_tumu(__VA_ARGS__)
21606
#define vncvt_x_x_w_i16m4_m(...) __riscv_vncvt_x_x_w_i16m4_tumu(__VA_ARGS__)
21607
#define vncvt_x_x_w_u16mf4_m(...) __riscv_vncvt_x_x_w_u16mf4_tumu(__VA_ARGS__)
21608
#define vncvt_x_x_w_u16mf2_m(...) __riscv_vncvt_x_x_w_u16mf2_tumu(__VA_ARGS__)
21609
#define vncvt_x_x_w_u16m1_m(...) __riscv_vncvt_x_x_w_u16m1_tumu(__VA_ARGS__)
21610
#define vncvt_x_x_w_u16m2_m(...) __riscv_vncvt_x_x_w_u16m2_tumu(__VA_ARGS__)
21611
#define vncvt_x_x_w_u16m4_m(...) __riscv_vncvt_x_x_w_u16m4_tumu(__VA_ARGS__)
21612
#define vfncvt_xu_f_w_u16mf4_m(...) __riscv_vfncvt_xu_f_w_u16mf4_tumu(__VA_ARGS__)
21613
#define vfncvt_rtz_xu_f_w_u16mf4_m(...) __riscv_vfncvt_rtz_xu_f_w_u16mf4_tumu(__VA_ARGS__)
21614
#define vfncvt_xu_f_w_u16mf2_m(...) __riscv_vfncvt_xu_f_w_u16mf2_tumu(__VA_ARGS__)
21615
#define vfncvt_rtz_xu_f_w_u16mf2_m(...) __riscv_vfncvt_rtz_xu_f_w_u16mf2_tumu(__VA_ARGS__)
21616
#define vfncvt_xu_f_w_u16m1_m(...) __riscv_vfncvt_xu_f_w_u16m1_tumu(__VA_ARGS__)
21617
#define vfncvt_rtz_xu_f_w_u16m1_m(...) __riscv_vfncvt_rtz_xu_f_w_u16m1_tumu(__VA_ARGS__)
21618
#define vfncvt_xu_f_w_u16m2_m(...) __riscv_vfncvt_xu_f_w_u16m2_tumu(__VA_ARGS__)
21619
#define vfncvt_rtz_xu_f_w_u16m2_m(...) __riscv_vfncvt_rtz_xu_f_w_u16m2_tumu(__VA_ARGS__)
21620
#define vfncvt_xu_f_w_u16m4_m(...) __riscv_vfncvt_xu_f_w_u16m4_tumu(__VA_ARGS__)
21621
#define vfncvt_rtz_xu_f_w_u16m4_m(...) __riscv_vfncvt_rtz_xu_f_w_u16m4_tumu(__VA_ARGS__)
21622
#define vfncvt_f_x_w_f16mf4_m(...) __riscv_vfncvt_f_x_w_f16mf4_tumu(__VA_ARGS__)
21623
#define vfncvt_f_x_w_f16mf2_m(...) __riscv_vfncvt_f_x_w_f16mf2_tumu(__VA_ARGS__)
21624
#define vfncvt_f_x_w_f16m1_m(...) __riscv_vfncvt_f_x_w_f16m1_tumu(__VA_ARGS__)
21625
#define vfncvt_f_x_w_f16m2_m(...) __riscv_vfncvt_f_x_w_f16m2_tumu(__VA_ARGS__)
21626
#define vfncvt_f_x_w_f16m4_m(...) __riscv_vfncvt_f_x_w_f16m4_tumu(__VA_ARGS__)
21627
#define vfncvt_f_xu_w_f16mf4_m(...) __riscv_vfncvt_f_xu_w_f16mf4_tumu(__VA_ARGS__)
21628
#define vfncvt_f_xu_w_f16mf2_m(...) __riscv_vfncvt_f_xu_w_f16mf2_tumu(__VA_ARGS__)
21629
#define vfncvt_f_xu_w_f16m1_m(...) __riscv_vfncvt_f_xu_w_f16m1_tumu(__VA_ARGS__)
21630
#define vfncvt_f_xu_w_f16m2_m(...) __riscv_vfncvt_f_xu_w_f16m2_tumu(__VA_ARGS__)
21631
#define vfncvt_f_xu_w_f16m4_m(...) __riscv_vfncvt_f_xu_w_f16m4_tumu(__VA_ARGS__)
21632
#define vfncvt_f_f_w_f16mf4_m(...) __riscv_vfncvt_f_f_w_f16mf4_tumu(__VA_ARGS__)
21633
#define vfncvt_rod_f_f_w_f16mf4_m(...) __riscv_vfncvt_rod_f_f_w_f16mf4_tumu(__VA_ARGS__)
21634
#define vfncvt_f_f_w_f16mf2_m(...) __riscv_vfncvt_f_f_w_f16mf2_tumu(__VA_ARGS__)
21635
#define vfncvt_rod_f_f_w_f16mf2_m(...) __riscv_vfncvt_rod_f_f_w_f16mf2_tumu(__VA_ARGS__)
21636
#define vfncvt_f_f_w_f16m1_m(...) __riscv_vfncvt_f_f_w_f16m1_tumu(__VA_ARGS__)
21637
#define vfncvt_rod_f_f_w_f16m1_m(...) __riscv_vfncvt_rod_f_f_w_f16m1_tumu(__VA_ARGS__)
21638
#define vfncvt_f_f_w_f16m2_m(...) __riscv_vfncvt_f_f_w_f16m2_tumu(__VA_ARGS__)
21639
#define vfncvt_rod_f_f_w_f16m2_m(...) __riscv_vfncvt_rod_f_f_w_f16m2_tumu(__VA_ARGS__)
21640
#define vfncvt_f_f_w_f16m4_m(...) __riscv_vfncvt_f_f_w_f16m4_tumu(__VA_ARGS__)
21641
#define vfncvt_rod_f_f_w_f16m4_m(...) __riscv_vfncvt_rod_f_f_w_f16m4_tumu(__VA_ARGS__)
21642
#define vfncvt_x_f_w_i32mf2_m(...) __riscv_vfncvt_x_f_w_i32mf2_tumu(__VA_ARGS__)
21643
#define vfncvt_rtz_x_f_w_i32mf2_m(...) __riscv_vfncvt_rtz_x_f_w_i32mf2_tumu(__VA_ARGS__)
21644
#define vfncvt_x_f_w_i32m1_m(...) __riscv_vfncvt_x_f_w_i32m1_tumu(__VA_ARGS__)
21645
#define vfncvt_rtz_x_f_w_i32m1_m(...) __riscv_vfncvt_rtz_x_f_w_i32m1_tumu(__VA_ARGS__)
21646
#define vfncvt_x_f_w_i32m2_m(...) __riscv_vfncvt_x_f_w_i32m2_tumu(__VA_ARGS__)
21647
#define vfncvt_rtz_x_f_w_i32m2_m(...) __riscv_vfncvt_rtz_x_f_w_i32m2_tumu(__VA_ARGS__)
21648
#define vfncvt_x_f_w_i32m4_m(...) __riscv_vfncvt_x_f_w_i32m4_tumu(__VA_ARGS__)
21649
#define vfncvt_rtz_x_f_w_i32m4_m(...) __riscv_vfncvt_rtz_x_f_w_i32m4_tumu(__VA_ARGS__)
21650
#define vncvt_x_x_w_i32mf2_m(...) __riscv_vncvt_x_x_w_i32mf2_tumu(__VA_ARGS__)
21651
#define vncvt_x_x_w_i32m1_m(...) __riscv_vncvt_x_x_w_i32m1_tumu(__VA_ARGS__)
21652
#define vncvt_x_x_w_i32m2_m(...) __riscv_vncvt_x_x_w_i32m2_tumu(__VA_ARGS__)
21653
#define vncvt_x_x_w_i32m4_m(...) __riscv_vncvt_x_x_w_i32m4_tumu(__VA_ARGS__)
21654
#define vncvt_x_x_w_u32mf2_m(...) __riscv_vncvt_x_x_w_u32mf2_tumu(__VA_ARGS__)
21655
#define vncvt_x_x_w_u32m1_m(...) __riscv_vncvt_x_x_w_u32m1_tumu(__VA_ARGS__)
21656
#define vncvt_x_x_w_u32m2_m(...) __riscv_vncvt_x_x_w_u32m2_tumu(__VA_ARGS__)
21657
#define vncvt_x_x_w_u32m4_m(...) __riscv_vncvt_x_x_w_u32m4_tumu(__VA_ARGS__)
21658
#define vfncvt_xu_f_w_u32mf2_m(...) __riscv_vfncvt_xu_f_w_u32mf2_tumu(__VA_ARGS__)
21659
#define vfncvt_rtz_xu_f_w_u32mf2_m(...) __riscv_vfncvt_rtz_xu_f_w_u32mf2_tumu(__VA_ARGS__)
21660
#define vfncvt_xu_f_w_u32m1_m(...) __riscv_vfncvt_xu_f_w_u32m1_tumu(__VA_ARGS__)
21661
#define vfncvt_rtz_xu_f_w_u32m1_m(...) __riscv_vfncvt_rtz_xu_f_w_u32m1_tumu(__VA_ARGS__)
21662
#define vfncvt_xu_f_w_u32m2_m(...) __riscv_vfncvt_xu_f_w_u32m2_tumu(__VA_ARGS__)
21663
#define vfncvt_rtz_xu_f_w_u32m2_m(...) __riscv_vfncvt_rtz_xu_f_w_u32m2_tumu(__VA_ARGS__)
21664
#define vfncvt_xu_f_w_u32m4_m(...) __riscv_vfncvt_xu_f_w_u32m4_tumu(__VA_ARGS__)
21665
#define vfncvt_rtz_xu_f_w_u32m4_m(...) __riscv_vfncvt_rtz_xu_f_w_u32m4_tumu(__VA_ARGS__)
21666
#define vfncvt_f_x_w_f32mf2_m(...) __riscv_vfncvt_f_x_w_f32mf2_tumu(__VA_ARGS__)
21667
#define vfncvt_f_x_w_f32m1_m(...) __riscv_vfncvt_f_x_w_f32m1_tumu(__VA_ARGS__)
21668
#define vfncvt_f_x_w_f32m2_m(...) __riscv_vfncvt_f_x_w_f32m2_tumu(__VA_ARGS__)
21669
#define vfncvt_f_x_w_f32m4_m(...) __riscv_vfncvt_f_x_w_f32m4_tumu(__VA_ARGS__)
21670
#define vfncvt_f_xu_w_f32mf2_m(...) __riscv_vfncvt_f_xu_w_f32mf2_tumu(__VA_ARGS__)
21671
#define vfncvt_f_xu_w_f32m1_m(...) __riscv_vfncvt_f_xu_w_f32m1_tumu(__VA_ARGS__)
21672
#define vfncvt_f_xu_w_f32m2_m(...) __riscv_vfncvt_f_xu_w_f32m2_tumu(__VA_ARGS__)
21673
#define vfncvt_f_xu_w_f32m4_m(...) __riscv_vfncvt_f_xu_w_f32m4_tumu(__VA_ARGS__)
21674
#define vfncvt_f_f_w_f32mf2_m(...) __riscv_vfncvt_f_f_w_f32mf2_tumu(__VA_ARGS__)
21675
#define vfncvt_rod_f_f_w_f32mf2_m(...) __riscv_vfncvt_rod_f_f_w_f32mf2_tumu(__VA_ARGS__)
21676
#define vfncvt_f_f_w_f32m1_m(...) __riscv_vfncvt_f_f_w_f32m1_tumu(__VA_ARGS__)
21677
#define vfncvt_rod_f_f_w_f32m1_m(...) __riscv_vfncvt_rod_f_f_w_f32m1_tumu(__VA_ARGS__)
21678
#define vfncvt_f_f_w_f32m2_m(...) __riscv_vfncvt_f_f_w_f32m2_tumu(__VA_ARGS__)
21679
#define vfncvt_rod_f_f_w_f32m2_m(...) __riscv_vfncvt_rod_f_f_w_f32m2_tumu(__VA_ARGS__)
21680
#define vfncvt_f_f_w_f32m4_m(...) __riscv_vfncvt_f_f_w_f32m4_tumu(__VA_ARGS__)
21681
#define vfncvt_rod_f_f_w_f32m4_m(...) __riscv_vfncvt_rod_f_f_w_f32m4_tumu(__VA_ARGS__)
21682
#define vredsum_vs_i8mf8_i8m1(...) __riscv_vredsum_vs_i8mf8_i8m1_tu(__VA_ARGS__)
21683
#define vredsum_vs_i8mf4_i8m1(...) __riscv_vredsum_vs_i8mf4_i8m1_tu(__VA_ARGS__)
21684
#define vredsum_vs_i8mf2_i8m1(...) __riscv_vredsum_vs_i8mf2_i8m1_tu(__VA_ARGS__)
21685
#define vredsum_vs_i8m1_i8m1(...) __riscv_vredsum_vs_i8m1_i8m1_tu(__VA_ARGS__)
21686
#define vredsum_vs_i8m2_i8m1(...) __riscv_vredsum_vs_i8m2_i8m1_tu(__VA_ARGS__)
21687
#define vredsum_vs_i8m4_i8m1(...) __riscv_vredsum_vs_i8m4_i8m1_tu(__VA_ARGS__)
21688
#define vredsum_vs_i8m8_i8m1(...) __riscv_vredsum_vs_i8m8_i8m1_tu(__VA_ARGS__)
21689
#define vredsum_vs_i16mf4_i16m1(...) __riscv_vredsum_vs_i16mf4_i16m1_tu(__VA_ARGS__)
21690
#define vredsum_vs_i16mf2_i16m1(...) __riscv_vredsum_vs_i16mf2_i16m1_tu(__VA_ARGS__)
21691
#define vredsum_vs_i16m1_i16m1(...) __riscv_vredsum_vs_i16m1_i16m1_tu(__VA_ARGS__)
21692
#define vredsum_vs_i16m2_i16m1(...) __riscv_vredsum_vs_i16m2_i16m1_tu(__VA_ARGS__)
21693
#define vredsum_vs_i16m4_i16m1(...) __riscv_vredsum_vs_i16m4_i16m1_tu(__VA_ARGS__)
21694
#define vredsum_vs_i16m8_i16m1(...) __riscv_vredsum_vs_i16m8_i16m1_tu(__VA_ARGS__)
21695
#define vredsum_vs_i32mf2_i32m1(...) __riscv_vredsum_vs_i32mf2_i32m1_tu(__VA_ARGS__)
21696
#define vredsum_vs_i32m1_i32m1(...) __riscv_vredsum_vs_i32m1_i32m1_tu(__VA_ARGS__)
21697
#define vredsum_vs_i32m2_i32m1(...) __riscv_vredsum_vs_i32m2_i32m1_tu(__VA_ARGS__)
21698
#define vredsum_vs_i32m4_i32m1(...) __riscv_vredsum_vs_i32m4_i32m1_tu(__VA_ARGS__)
21699
#define vredsum_vs_i32m8_i32m1(...) __riscv_vredsum_vs_i32m8_i32m1_tu(__VA_ARGS__)
21700
#define vredsum_vs_i64m1_i64m1(...) __riscv_vredsum_vs_i64m1_i64m1_tu(__VA_ARGS__)
21701
#define vredsum_vs_i64m2_i64m1(...) __riscv_vredsum_vs_i64m2_i64m1_tu(__VA_ARGS__)
21702
#define vredsum_vs_i64m4_i64m1(...) __riscv_vredsum_vs_i64m4_i64m1_tu(__VA_ARGS__)
21703
#define vredsum_vs_i64m8_i64m1(...) __riscv_vredsum_vs_i64m8_i64m1_tu(__VA_ARGS__)
21704
#define vredmax_vs_i8mf8_i8m1(...) __riscv_vredmax_vs_i8mf8_i8m1_tu(__VA_ARGS__)
21705
#define vredmax_vs_i8mf4_i8m1(...) __riscv_vredmax_vs_i8mf4_i8m1_tu(__VA_ARGS__)
21706
#define vredmax_vs_i8mf2_i8m1(...) __riscv_vredmax_vs_i8mf2_i8m1_tu(__VA_ARGS__)
21707
#define vredmax_vs_i8m1_i8m1(...) __riscv_vredmax_vs_i8m1_i8m1_tu(__VA_ARGS__)
21708
#define vredmax_vs_i8m2_i8m1(...) __riscv_vredmax_vs_i8m2_i8m1_tu(__VA_ARGS__)
21709
#define vredmax_vs_i8m4_i8m1(...) __riscv_vredmax_vs_i8m4_i8m1_tu(__VA_ARGS__)
21710
#define vredmax_vs_i8m8_i8m1(...) __riscv_vredmax_vs_i8m8_i8m1_tu(__VA_ARGS__)
21711
#define vredmax_vs_i16mf4_i16m1(...) __riscv_vredmax_vs_i16mf4_i16m1_tu(__VA_ARGS__)
21712
#define vredmax_vs_i16mf2_i16m1(...) __riscv_vredmax_vs_i16mf2_i16m1_tu(__VA_ARGS__)
21713
#define vredmax_vs_i16m1_i16m1(...) __riscv_vredmax_vs_i16m1_i16m1_tu(__VA_ARGS__)
21714
#define vredmax_vs_i16m2_i16m1(...) __riscv_vredmax_vs_i16m2_i16m1_tu(__VA_ARGS__)
21715
#define vredmax_vs_i16m4_i16m1(...) __riscv_vredmax_vs_i16m4_i16m1_tu(__VA_ARGS__)
21716
#define vredmax_vs_i16m8_i16m1(...) __riscv_vredmax_vs_i16m8_i16m1_tu(__VA_ARGS__)
21717
#define vredmax_vs_i32mf2_i32m1(...) __riscv_vredmax_vs_i32mf2_i32m1_tu(__VA_ARGS__)
21718
#define vredmax_vs_i32m1_i32m1(...) __riscv_vredmax_vs_i32m1_i32m1_tu(__VA_ARGS__)
21719
#define vredmax_vs_i32m2_i32m1(...) __riscv_vredmax_vs_i32m2_i32m1_tu(__VA_ARGS__)
21720
#define vredmax_vs_i32m4_i32m1(...) __riscv_vredmax_vs_i32m4_i32m1_tu(__VA_ARGS__)
21721
#define vredmax_vs_i32m8_i32m1(...) __riscv_vredmax_vs_i32m8_i32m1_tu(__VA_ARGS__)
21722
#define vredmax_vs_i64m1_i64m1(...) __riscv_vredmax_vs_i64m1_i64m1_tu(__VA_ARGS__)
21723
#define vredmax_vs_i64m2_i64m1(...) __riscv_vredmax_vs_i64m2_i64m1_tu(__VA_ARGS__)
21724
#define vredmax_vs_i64m4_i64m1(...) __riscv_vredmax_vs_i64m4_i64m1_tu(__VA_ARGS__)
21725
#define vredmax_vs_i64m8_i64m1(...) __riscv_vredmax_vs_i64m8_i64m1_tu(__VA_ARGS__)
21726
#define vredmin_vs_i8mf8_i8m1(...) __riscv_vredmin_vs_i8mf8_i8m1_tu(__VA_ARGS__)
21727
#define vredmin_vs_i8mf4_i8m1(...) __riscv_vredmin_vs_i8mf4_i8m1_tu(__VA_ARGS__)
21728
#define vredmin_vs_i8mf2_i8m1(...) __riscv_vredmin_vs_i8mf2_i8m1_tu(__VA_ARGS__)
21729
#define vredmin_vs_i8m1_i8m1(...) __riscv_vredmin_vs_i8m1_i8m1_tu(__VA_ARGS__)
21730
#define vredmin_vs_i8m2_i8m1(...) __riscv_vredmin_vs_i8m2_i8m1_tu(__VA_ARGS__)
21731
#define vredmin_vs_i8m4_i8m1(...) __riscv_vredmin_vs_i8m4_i8m1_tu(__VA_ARGS__)
21732
#define vredmin_vs_i8m8_i8m1(...) __riscv_vredmin_vs_i8m8_i8m1_tu(__VA_ARGS__)
21733
#define vredmin_vs_i16mf4_i16m1(...) __riscv_vredmin_vs_i16mf4_i16m1_tu(__VA_ARGS__)
21734
#define vredmin_vs_i16mf2_i16m1(...) __riscv_vredmin_vs_i16mf2_i16m1_tu(__VA_ARGS__)
21735
#define vredmin_vs_i16m1_i16m1(...) __riscv_vredmin_vs_i16m1_i16m1_tu(__VA_ARGS__)
21736
#define vredmin_vs_i16m2_i16m1(...) __riscv_vredmin_vs_i16m2_i16m1_tu(__VA_ARGS__)
21737
#define vredmin_vs_i16m4_i16m1(...) __riscv_vredmin_vs_i16m4_i16m1_tu(__VA_ARGS__)
21738
#define vredmin_vs_i16m8_i16m1(...) __riscv_vredmin_vs_i16m8_i16m1_tu(__VA_ARGS__)
21739
#define vredmin_vs_i32mf2_i32m1(...) __riscv_vredmin_vs_i32mf2_i32m1_tu(__VA_ARGS__)
21740
#define vredmin_vs_i32m1_i32m1(...) __riscv_vredmin_vs_i32m1_i32m1_tu(__VA_ARGS__)
21741
#define vredmin_vs_i32m2_i32m1(...) __riscv_vredmin_vs_i32m2_i32m1_tu(__VA_ARGS__)
21742
#define vredmin_vs_i32m4_i32m1(...) __riscv_vredmin_vs_i32m4_i32m1_tu(__VA_ARGS__)
21743
#define vredmin_vs_i32m8_i32m1(...) __riscv_vredmin_vs_i32m8_i32m1_tu(__VA_ARGS__)
21744
#define vredmin_vs_i64m1_i64m1(...) __riscv_vredmin_vs_i64m1_i64m1_tu(__VA_ARGS__)
21745
#define vredmin_vs_i64m2_i64m1(...) __riscv_vredmin_vs_i64m2_i64m1_tu(__VA_ARGS__)
21746
#define vredmin_vs_i64m4_i64m1(...) __riscv_vredmin_vs_i64m4_i64m1_tu(__VA_ARGS__)
21747
#define vredmin_vs_i64m8_i64m1(...) __riscv_vredmin_vs_i64m8_i64m1_tu(__VA_ARGS__)
21748
#define vredand_vs_i8mf8_i8m1(...) __riscv_vredand_vs_i8mf8_i8m1_tu(__VA_ARGS__)
21749
#define vredand_vs_i8mf4_i8m1(...) __riscv_vredand_vs_i8mf4_i8m1_tu(__VA_ARGS__)
21750
#define vredand_vs_i8mf2_i8m1(...) __riscv_vredand_vs_i8mf2_i8m1_tu(__VA_ARGS__)
21751
#define vredand_vs_i8m1_i8m1(...) __riscv_vredand_vs_i8m1_i8m1_tu(__VA_ARGS__)
21752
#define vredand_vs_i8m2_i8m1(...) __riscv_vredand_vs_i8m2_i8m1_tu(__VA_ARGS__)
21753
#define vredand_vs_i8m4_i8m1(...) __riscv_vredand_vs_i8m4_i8m1_tu(__VA_ARGS__)
21754
#define vredand_vs_i8m8_i8m1(...) __riscv_vredand_vs_i8m8_i8m1_tu(__VA_ARGS__)
21755
#define vredand_vs_i16mf4_i16m1(...) __riscv_vredand_vs_i16mf4_i16m1_tu(__VA_ARGS__)
21756
#define vredand_vs_i16mf2_i16m1(...) __riscv_vredand_vs_i16mf2_i16m1_tu(__VA_ARGS__)
21757
#define vredand_vs_i16m1_i16m1(...) __riscv_vredand_vs_i16m1_i16m1_tu(__VA_ARGS__)
21758
#define vredand_vs_i16m2_i16m1(...) __riscv_vredand_vs_i16m2_i16m1_tu(__VA_ARGS__)
21759
#define vredand_vs_i16m4_i16m1(...) __riscv_vredand_vs_i16m4_i16m1_tu(__VA_ARGS__)
21760
#define vredand_vs_i16m8_i16m1(...) __riscv_vredand_vs_i16m8_i16m1_tu(__VA_ARGS__)
21761
#define vredand_vs_i32mf2_i32m1(...) __riscv_vredand_vs_i32mf2_i32m1_tu(__VA_ARGS__)
21762
#define vredand_vs_i32m1_i32m1(...) __riscv_vredand_vs_i32m1_i32m1_tu(__VA_ARGS__)
21763
#define vredand_vs_i32m2_i32m1(...) __riscv_vredand_vs_i32m2_i32m1_tu(__VA_ARGS__)
21764
#define vredand_vs_i32m4_i32m1(...) __riscv_vredand_vs_i32m4_i32m1_tu(__VA_ARGS__)
21765
#define vredand_vs_i32m8_i32m1(...) __riscv_vredand_vs_i32m8_i32m1_tu(__VA_ARGS__)
21766
#define vredand_vs_i64m1_i64m1(...) __riscv_vredand_vs_i64m1_i64m1_tu(__VA_ARGS__)
21767
#define vredand_vs_i64m2_i64m1(...) __riscv_vredand_vs_i64m2_i64m1_tu(__VA_ARGS__)
21768
#define vredand_vs_i64m4_i64m1(...) __riscv_vredand_vs_i64m4_i64m1_tu(__VA_ARGS__)
21769
#define vredand_vs_i64m8_i64m1(...) __riscv_vredand_vs_i64m8_i64m1_tu(__VA_ARGS__)
21770
#define vredor_vs_i8mf8_i8m1(...) __riscv_vredor_vs_i8mf8_i8m1_tu(__VA_ARGS__)
21771
#define vredor_vs_i8mf4_i8m1(...) __riscv_vredor_vs_i8mf4_i8m1_tu(__VA_ARGS__)
21772
#define vredor_vs_i8mf2_i8m1(...) __riscv_vredor_vs_i8mf2_i8m1_tu(__VA_ARGS__)
21773
#define vredor_vs_i8m1_i8m1(...) __riscv_vredor_vs_i8m1_i8m1_tu(__VA_ARGS__)
21774
#define vredor_vs_i8m2_i8m1(...) __riscv_vredor_vs_i8m2_i8m1_tu(__VA_ARGS__)
21775
#define vredor_vs_i8m4_i8m1(...) __riscv_vredor_vs_i8m4_i8m1_tu(__VA_ARGS__)
21776
#define vredor_vs_i8m8_i8m1(...) __riscv_vredor_vs_i8m8_i8m1_tu(__VA_ARGS__)
21777
#define vredor_vs_i16mf4_i16m1(...) __riscv_vredor_vs_i16mf4_i16m1_tu(__VA_ARGS__)
21778
#define vredor_vs_i16mf2_i16m1(...) __riscv_vredor_vs_i16mf2_i16m1_tu(__VA_ARGS__)
21779
#define vredor_vs_i16m1_i16m1(...) __riscv_vredor_vs_i16m1_i16m1_tu(__VA_ARGS__)
21780
#define vredor_vs_i16m2_i16m1(...) __riscv_vredor_vs_i16m2_i16m1_tu(__VA_ARGS__)
21781
#define vredor_vs_i16m4_i16m1(...) __riscv_vredor_vs_i16m4_i16m1_tu(__VA_ARGS__)
21782
#define vredor_vs_i16m8_i16m1(...) __riscv_vredor_vs_i16m8_i16m1_tu(__VA_ARGS__)
21783
#define vredor_vs_i32mf2_i32m1(...) __riscv_vredor_vs_i32mf2_i32m1_tu(__VA_ARGS__)
21784
#define vredor_vs_i32m1_i32m1(...) __riscv_vredor_vs_i32m1_i32m1_tu(__VA_ARGS__)
21785
#define vredor_vs_i32m2_i32m1(...) __riscv_vredor_vs_i32m2_i32m1_tu(__VA_ARGS__)
21786
#define vredor_vs_i32m4_i32m1(...) __riscv_vredor_vs_i32m4_i32m1_tu(__VA_ARGS__)
21787
#define vredor_vs_i32m8_i32m1(...) __riscv_vredor_vs_i32m8_i32m1_tu(__VA_ARGS__)
21788
#define vredor_vs_i64m1_i64m1(...) __riscv_vredor_vs_i64m1_i64m1_tu(__VA_ARGS__)
21789
#define vredor_vs_i64m2_i64m1(...) __riscv_vredor_vs_i64m2_i64m1_tu(__VA_ARGS__)
21790
#define vredor_vs_i64m4_i64m1(...) __riscv_vredor_vs_i64m4_i64m1_tu(__VA_ARGS__)
21791
#define vredor_vs_i64m8_i64m1(...) __riscv_vredor_vs_i64m8_i64m1_tu(__VA_ARGS__)
21792
#define vredxor_vs_i8mf8_i8m1(...) __riscv_vredxor_vs_i8mf8_i8m1_tu(__VA_ARGS__)
21793
#define vredxor_vs_i8mf4_i8m1(...) __riscv_vredxor_vs_i8mf4_i8m1_tu(__VA_ARGS__)
21794
#define vredxor_vs_i8mf2_i8m1(...) __riscv_vredxor_vs_i8mf2_i8m1_tu(__VA_ARGS__)
21795
#define vredxor_vs_i8m1_i8m1(...) __riscv_vredxor_vs_i8m1_i8m1_tu(__VA_ARGS__)
21796
#define vredxor_vs_i8m2_i8m1(...) __riscv_vredxor_vs_i8m2_i8m1_tu(__VA_ARGS__)
21797
#define vredxor_vs_i8m4_i8m1(...) __riscv_vredxor_vs_i8m4_i8m1_tu(__VA_ARGS__)
21798
#define vredxor_vs_i8m8_i8m1(...) __riscv_vredxor_vs_i8m8_i8m1_tu(__VA_ARGS__)
21799
#define vredxor_vs_i16mf4_i16m1(...) __riscv_vredxor_vs_i16mf4_i16m1_tu(__VA_ARGS__)
21800
#define vredxor_vs_i16mf2_i16m1(...) __riscv_vredxor_vs_i16mf2_i16m1_tu(__VA_ARGS__)
21801
#define vredxor_vs_i16m1_i16m1(...) __riscv_vredxor_vs_i16m1_i16m1_tu(__VA_ARGS__)
21802
#define vredxor_vs_i16m2_i16m1(...) __riscv_vredxor_vs_i16m2_i16m1_tu(__VA_ARGS__)
21803
#define vredxor_vs_i16m4_i16m1(...) __riscv_vredxor_vs_i16m4_i16m1_tu(__VA_ARGS__)
21804
#define vredxor_vs_i16m8_i16m1(...) __riscv_vredxor_vs_i16m8_i16m1_tu(__VA_ARGS__)
21805
#define vredxor_vs_i32mf2_i32m1(...) __riscv_vredxor_vs_i32mf2_i32m1_tu(__VA_ARGS__)
21806
#define vredxor_vs_i32m1_i32m1(...) __riscv_vredxor_vs_i32m1_i32m1_tu(__VA_ARGS__)
21807
#define vredxor_vs_i32m2_i32m1(...) __riscv_vredxor_vs_i32m2_i32m1_tu(__VA_ARGS__)
21808
#define vredxor_vs_i32m4_i32m1(...) __riscv_vredxor_vs_i32m4_i32m1_tu(__VA_ARGS__)
21809
#define vredxor_vs_i32m8_i32m1(...) __riscv_vredxor_vs_i32m8_i32m1_tu(__VA_ARGS__)
21810
#define vredxor_vs_i64m1_i64m1(...) __riscv_vredxor_vs_i64m1_i64m1_tu(__VA_ARGS__)
21811
#define vredxor_vs_i64m2_i64m1(...) __riscv_vredxor_vs_i64m2_i64m1_tu(__VA_ARGS__)
21812
#define vredxor_vs_i64m4_i64m1(...) __riscv_vredxor_vs_i64m4_i64m1_tu(__VA_ARGS__)
21813
#define vredxor_vs_i64m8_i64m1(...) __riscv_vredxor_vs_i64m8_i64m1_tu(__VA_ARGS__)
21814
#define vredsum_vs_u8mf8_u8m1(...) __riscv_vredsum_vs_u8mf8_u8m1_tu(__VA_ARGS__)
21815
#define vredsum_vs_u8mf4_u8m1(...) __riscv_vredsum_vs_u8mf4_u8m1_tu(__VA_ARGS__)
21816
#define vredsum_vs_u8mf2_u8m1(...) __riscv_vredsum_vs_u8mf2_u8m1_tu(__VA_ARGS__)
21817
#define vredsum_vs_u8m1_u8m1(...) __riscv_vredsum_vs_u8m1_u8m1_tu(__VA_ARGS__)
21818
#define vredsum_vs_u8m2_u8m1(...) __riscv_vredsum_vs_u8m2_u8m1_tu(__VA_ARGS__)
21819
#define vredsum_vs_u8m4_u8m1(...) __riscv_vredsum_vs_u8m4_u8m1_tu(__VA_ARGS__)
21820
#define vredsum_vs_u8m8_u8m1(...) __riscv_vredsum_vs_u8m8_u8m1_tu(__VA_ARGS__)
21821
#define vredsum_vs_u16mf4_u16m1(...) __riscv_vredsum_vs_u16mf4_u16m1_tu(__VA_ARGS__)
21822
#define vredsum_vs_u16mf2_u16m1(...) __riscv_vredsum_vs_u16mf2_u16m1_tu(__VA_ARGS__)
21823
#define vredsum_vs_u16m1_u16m1(...) __riscv_vredsum_vs_u16m1_u16m1_tu(__VA_ARGS__)
21824
#define vredsum_vs_u16m2_u16m1(...) __riscv_vredsum_vs_u16m2_u16m1_tu(__VA_ARGS__)
21825
#define vredsum_vs_u16m4_u16m1(...) __riscv_vredsum_vs_u16m4_u16m1_tu(__VA_ARGS__)
21826
#define vredsum_vs_u16m8_u16m1(...) __riscv_vredsum_vs_u16m8_u16m1_tu(__VA_ARGS__)
21827
#define vredsum_vs_u32mf2_u32m1(...) __riscv_vredsum_vs_u32mf2_u32m1_tu(__VA_ARGS__)
21828
#define vredsum_vs_u32m1_u32m1(...) __riscv_vredsum_vs_u32m1_u32m1_tu(__VA_ARGS__)
21829
#define vredsum_vs_u32m2_u32m1(...) __riscv_vredsum_vs_u32m2_u32m1_tu(__VA_ARGS__)
21830
#define vredsum_vs_u32m4_u32m1(...) __riscv_vredsum_vs_u32m4_u32m1_tu(__VA_ARGS__)
21831
#define vredsum_vs_u32m8_u32m1(...) __riscv_vredsum_vs_u32m8_u32m1_tu(__VA_ARGS__)
21832
#define vredsum_vs_u64m1_u64m1(...) __riscv_vredsum_vs_u64m1_u64m1_tu(__VA_ARGS__)
21833
#define vredsum_vs_u64m2_u64m1(...) __riscv_vredsum_vs_u64m2_u64m1_tu(__VA_ARGS__)
21834
#define vredsum_vs_u64m4_u64m1(...) __riscv_vredsum_vs_u64m4_u64m1_tu(__VA_ARGS__)
21835
#define vredsum_vs_u64m8_u64m1(...) __riscv_vredsum_vs_u64m8_u64m1_tu(__VA_ARGS__)
21836
#define vredmaxu_vs_u8mf8_u8m1(...) __riscv_vredmaxu_vs_u8mf8_u8m1_tu(__VA_ARGS__)
21837
#define vredmaxu_vs_u8mf4_u8m1(...) __riscv_vredmaxu_vs_u8mf4_u8m1_tu(__VA_ARGS__)
21838
#define vredmaxu_vs_u8mf2_u8m1(...) __riscv_vredmaxu_vs_u8mf2_u8m1_tu(__VA_ARGS__)
21839
#define vredmaxu_vs_u8m1_u8m1(...) __riscv_vredmaxu_vs_u8m1_u8m1_tu(__VA_ARGS__)
21840
#define vredmaxu_vs_u8m2_u8m1(...) __riscv_vredmaxu_vs_u8m2_u8m1_tu(__VA_ARGS__)
21841
#define vredmaxu_vs_u8m4_u8m1(...) __riscv_vredmaxu_vs_u8m4_u8m1_tu(__VA_ARGS__)
21842
#define vredmaxu_vs_u8m8_u8m1(...) __riscv_vredmaxu_vs_u8m8_u8m1_tu(__VA_ARGS__)
21843
#define vredmaxu_vs_u16mf4_u16m1(...) __riscv_vredmaxu_vs_u16mf4_u16m1_tu(__VA_ARGS__)
21844
#define vredmaxu_vs_u16mf2_u16m1(...) __riscv_vredmaxu_vs_u16mf2_u16m1_tu(__VA_ARGS__)
21845
#define vredmaxu_vs_u16m1_u16m1(...) __riscv_vredmaxu_vs_u16m1_u16m1_tu(__VA_ARGS__)
21846
#define vredmaxu_vs_u16m2_u16m1(...) __riscv_vredmaxu_vs_u16m2_u16m1_tu(__VA_ARGS__)
21847
#define vredmaxu_vs_u16m4_u16m1(...) __riscv_vredmaxu_vs_u16m4_u16m1_tu(__VA_ARGS__)
21848
#define vredmaxu_vs_u16m8_u16m1(...) __riscv_vredmaxu_vs_u16m8_u16m1_tu(__VA_ARGS__)
21849
#define vredmaxu_vs_u32mf2_u32m1(...) __riscv_vredmaxu_vs_u32mf2_u32m1_tu(__VA_ARGS__)
21850
#define vredmaxu_vs_u32m1_u32m1(...) __riscv_vredmaxu_vs_u32m1_u32m1_tu(__VA_ARGS__)
21851
#define vredmaxu_vs_u32m2_u32m1(...) __riscv_vredmaxu_vs_u32m2_u32m1_tu(__VA_ARGS__)
21852
#define vredmaxu_vs_u32m4_u32m1(...) __riscv_vredmaxu_vs_u32m4_u32m1_tu(__VA_ARGS__)
21853
#define vredmaxu_vs_u32m8_u32m1(...) __riscv_vredmaxu_vs_u32m8_u32m1_tu(__VA_ARGS__)
21854
#define vredmaxu_vs_u64m1_u64m1(...) __riscv_vredmaxu_vs_u64m1_u64m1_tu(__VA_ARGS__)
21855
#define vredmaxu_vs_u64m2_u64m1(...) __riscv_vredmaxu_vs_u64m2_u64m1_tu(__VA_ARGS__)
21856
#define vredmaxu_vs_u64m4_u64m1(...) __riscv_vredmaxu_vs_u64m4_u64m1_tu(__VA_ARGS__)
21857
#define vredmaxu_vs_u64m8_u64m1(...) __riscv_vredmaxu_vs_u64m8_u64m1_tu(__VA_ARGS__)
21858
#define vredminu_vs_u8mf8_u8m1(...) __riscv_vredminu_vs_u8mf8_u8m1_tu(__VA_ARGS__)
21859
#define vredminu_vs_u8mf4_u8m1(...) __riscv_vredminu_vs_u8mf4_u8m1_tu(__VA_ARGS__)
21860
#define vredminu_vs_u8mf2_u8m1(...) __riscv_vredminu_vs_u8mf2_u8m1_tu(__VA_ARGS__)
21861
#define vredminu_vs_u8m1_u8m1(...) __riscv_vredminu_vs_u8m1_u8m1_tu(__VA_ARGS__)
21862
#define vredminu_vs_u8m2_u8m1(...) __riscv_vredminu_vs_u8m2_u8m1_tu(__VA_ARGS__)
21863
#define vredminu_vs_u8m4_u8m1(...) __riscv_vredminu_vs_u8m4_u8m1_tu(__VA_ARGS__)
21864
#define vredminu_vs_u8m8_u8m1(...) __riscv_vredminu_vs_u8m8_u8m1_tu(__VA_ARGS__)
21865
#define vredminu_vs_u16mf4_u16m1(...) __riscv_vredminu_vs_u16mf4_u16m1_tu(__VA_ARGS__)
21866
#define vredminu_vs_u16mf2_u16m1(...) __riscv_vredminu_vs_u16mf2_u16m1_tu(__VA_ARGS__)
21867
#define vredminu_vs_u16m1_u16m1(...) __riscv_vredminu_vs_u16m1_u16m1_tu(__VA_ARGS__)
21868
#define vredminu_vs_u16m2_u16m1(...) __riscv_vredminu_vs_u16m2_u16m1_tu(__VA_ARGS__)
21869
#define vredminu_vs_u16m4_u16m1(...) __riscv_vredminu_vs_u16m4_u16m1_tu(__VA_ARGS__)
21870
#define vredminu_vs_u16m8_u16m1(...) __riscv_vredminu_vs_u16m8_u16m1_tu(__VA_ARGS__)
21871
#define vredminu_vs_u32mf2_u32m1(...) __riscv_vredminu_vs_u32mf2_u32m1_tu(__VA_ARGS__)
21872
#define vredminu_vs_u32m1_u32m1(...) __riscv_vredminu_vs_u32m1_u32m1_tu(__VA_ARGS__)
21873
#define vredminu_vs_u32m2_u32m1(...) __riscv_vredminu_vs_u32m2_u32m1_tu(__VA_ARGS__)
21874
#define vredminu_vs_u32m4_u32m1(...) __riscv_vredminu_vs_u32m4_u32m1_tu(__VA_ARGS__)
21875
#define vredminu_vs_u32m8_u32m1(...) __riscv_vredminu_vs_u32m8_u32m1_tu(__VA_ARGS__)
21876
#define vredminu_vs_u64m1_u64m1(...) __riscv_vredminu_vs_u64m1_u64m1_tu(__VA_ARGS__)
21877
#define vredminu_vs_u64m2_u64m1(...) __riscv_vredminu_vs_u64m2_u64m1_tu(__VA_ARGS__)
21878
#define vredminu_vs_u64m4_u64m1(...) __riscv_vredminu_vs_u64m4_u64m1_tu(__VA_ARGS__)
21879
#define vredminu_vs_u64m8_u64m1(...) __riscv_vredminu_vs_u64m8_u64m1_tu(__VA_ARGS__)
21880
#define vredand_vs_u8mf8_u8m1(...) __riscv_vredand_vs_u8mf8_u8m1_tu(__VA_ARGS__)
21881
#define vredand_vs_u8mf4_u8m1(...) __riscv_vredand_vs_u8mf4_u8m1_tu(__VA_ARGS__)
21882
#define vredand_vs_u8mf2_u8m1(...) __riscv_vredand_vs_u8mf2_u8m1_tu(__VA_ARGS__)
21883
#define vredand_vs_u8m1_u8m1(...) __riscv_vredand_vs_u8m1_u8m1_tu(__VA_ARGS__)
21884
#define vredand_vs_u8m2_u8m1(...) __riscv_vredand_vs_u8m2_u8m1_tu(__VA_ARGS__)
21885
#define vredand_vs_u8m4_u8m1(...) __riscv_vredand_vs_u8m4_u8m1_tu(__VA_ARGS__)
21886
#define vredand_vs_u8m8_u8m1(...) __riscv_vredand_vs_u8m8_u8m1_tu(__VA_ARGS__)
21887
#define vredand_vs_u16mf4_u16m1(...) __riscv_vredand_vs_u16mf4_u16m1_tu(__VA_ARGS__)
21888
#define vredand_vs_u16mf2_u16m1(...) __riscv_vredand_vs_u16mf2_u16m1_tu(__VA_ARGS__)
21889
#define vredand_vs_u16m1_u16m1(...) __riscv_vredand_vs_u16m1_u16m1_tu(__VA_ARGS__)
21890
#define vredand_vs_u16m2_u16m1(...) __riscv_vredand_vs_u16m2_u16m1_tu(__VA_ARGS__)
21891
#define vredand_vs_u16m4_u16m1(...) __riscv_vredand_vs_u16m4_u16m1_tu(__VA_ARGS__)
21892
#define vredand_vs_u16m8_u16m1(...) __riscv_vredand_vs_u16m8_u16m1_tu(__VA_ARGS__)
21893
#define vredand_vs_u32mf2_u32m1(...) __riscv_vredand_vs_u32mf2_u32m1_tu(__VA_ARGS__)
21894
#define vredand_vs_u32m1_u32m1(...) __riscv_vredand_vs_u32m1_u32m1_tu(__VA_ARGS__)
21895
#define vredand_vs_u32m2_u32m1(...) __riscv_vredand_vs_u32m2_u32m1_tu(__VA_ARGS__)
21896
#define vredand_vs_u32m4_u32m1(...) __riscv_vredand_vs_u32m4_u32m1_tu(__VA_ARGS__)
21897
#define vredand_vs_u32m8_u32m1(...) __riscv_vredand_vs_u32m8_u32m1_tu(__VA_ARGS__)
21898
#define vredand_vs_u64m1_u64m1(...) __riscv_vredand_vs_u64m1_u64m1_tu(__VA_ARGS__)
21899
#define vredand_vs_u64m2_u64m1(...) __riscv_vredand_vs_u64m2_u64m1_tu(__VA_ARGS__)
21900
#define vredand_vs_u64m4_u64m1(...) __riscv_vredand_vs_u64m4_u64m1_tu(__VA_ARGS__)
21901
#define vredand_vs_u64m8_u64m1(...) __riscv_vredand_vs_u64m8_u64m1_tu(__VA_ARGS__)
21902
#define vredor_vs_u8mf8_u8m1(...) __riscv_vredor_vs_u8mf8_u8m1_tu(__VA_ARGS__)
21903
#define vredor_vs_u8mf4_u8m1(...) __riscv_vredor_vs_u8mf4_u8m1_tu(__VA_ARGS__)
21904
#define vredor_vs_u8mf2_u8m1(...) __riscv_vredor_vs_u8mf2_u8m1_tu(__VA_ARGS__)
21905
#define vredor_vs_u8m1_u8m1(...) __riscv_vredor_vs_u8m1_u8m1_tu(__VA_ARGS__)
21906
#define vredor_vs_u8m2_u8m1(...) __riscv_vredor_vs_u8m2_u8m1_tu(__VA_ARGS__)
21907
#define vredor_vs_u8m4_u8m1(...) __riscv_vredor_vs_u8m4_u8m1_tu(__VA_ARGS__)
21908
#define vredor_vs_u8m8_u8m1(...) __riscv_vredor_vs_u8m8_u8m1_tu(__VA_ARGS__)
21909
#define vredor_vs_u16mf4_u16m1(...) __riscv_vredor_vs_u16mf4_u16m1_tu(__VA_ARGS__)
21910
#define vredor_vs_u16mf2_u16m1(...) __riscv_vredor_vs_u16mf2_u16m1_tu(__VA_ARGS__)
21911
#define vredor_vs_u16m1_u16m1(...) __riscv_vredor_vs_u16m1_u16m1_tu(__VA_ARGS__)
21912
#define vredor_vs_u16m2_u16m1(...) __riscv_vredor_vs_u16m2_u16m1_tu(__VA_ARGS__)
21913
#define vredor_vs_u16m4_u16m1(...) __riscv_vredor_vs_u16m4_u16m1_tu(__VA_ARGS__)
21914
#define vredor_vs_u16m8_u16m1(...) __riscv_vredor_vs_u16m8_u16m1_tu(__VA_ARGS__)
21915
#define vredor_vs_u32mf2_u32m1(...) __riscv_vredor_vs_u32mf2_u32m1_tu(__VA_ARGS__)
21916
#define vredor_vs_u32m1_u32m1(...) __riscv_vredor_vs_u32m1_u32m1_tu(__VA_ARGS__)
21917
#define vredor_vs_u32m2_u32m1(...) __riscv_vredor_vs_u32m2_u32m1_tu(__VA_ARGS__)
21918
#define vredor_vs_u32m4_u32m1(...) __riscv_vredor_vs_u32m4_u32m1_tu(__VA_ARGS__)
21919
#define vredor_vs_u32m8_u32m1(...) __riscv_vredor_vs_u32m8_u32m1_tu(__VA_ARGS__)
21920
#define vredor_vs_u64m1_u64m1(...) __riscv_vredor_vs_u64m1_u64m1_tu(__VA_ARGS__)
21921
#define vredor_vs_u64m2_u64m1(...) __riscv_vredor_vs_u64m2_u64m1_tu(__VA_ARGS__)
21922
#define vredor_vs_u64m4_u64m1(...) __riscv_vredor_vs_u64m4_u64m1_tu(__VA_ARGS__)
21923
#define vredor_vs_u64m8_u64m1(...) __riscv_vredor_vs_u64m8_u64m1_tu(__VA_ARGS__)
21924
#define vredxor_vs_u8mf8_u8m1(...) __riscv_vredxor_vs_u8mf8_u8m1_tu(__VA_ARGS__)
21925
#define vredxor_vs_u8mf4_u8m1(...) __riscv_vredxor_vs_u8mf4_u8m1_tu(__VA_ARGS__)
21926
#define vredxor_vs_u8mf2_u8m1(...) __riscv_vredxor_vs_u8mf2_u8m1_tu(__VA_ARGS__)
21927
#define vredxor_vs_u8m1_u8m1(...) __riscv_vredxor_vs_u8m1_u8m1_tu(__VA_ARGS__)
21928
#define vredxor_vs_u8m2_u8m1(...) __riscv_vredxor_vs_u8m2_u8m1_tu(__VA_ARGS__)
21929
#define vredxor_vs_u8m4_u8m1(...) __riscv_vredxor_vs_u8m4_u8m1_tu(__VA_ARGS__)
21930
#define vredxor_vs_u8m8_u8m1(...) __riscv_vredxor_vs_u8m8_u8m1_tu(__VA_ARGS__)
21931
#define vredxor_vs_u16mf4_u16m1(...) __riscv_vredxor_vs_u16mf4_u16m1_tu(__VA_ARGS__)
21932
#define vredxor_vs_u16mf2_u16m1(...) __riscv_vredxor_vs_u16mf2_u16m1_tu(__VA_ARGS__)
21933
#define vredxor_vs_u16m1_u16m1(...) __riscv_vredxor_vs_u16m1_u16m1_tu(__VA_ARGS__)
21934
#define vredxor_vs_u16m2_u16m1(...) __riscv_vredxor_vs_u16m2_u16m1_tu(__VA_ARGS__)
21935
#define vredxor_vs_u16m4_u16m1(...) __riscv_vredxor_vs_u16m4_u16m1_tu(__VA_ARGS__)
21936
#define vredxor_vs_u16m8_u16m1(...) __riscv_vredxor_vs_u16m8_u16m1_tu(__VA_ARGS__)
21937
#define vredxor_vs_u32mf2_u32m1(...) __riscv_vredxor_vs_u32mf2_u32m1_tu(__VA_ARGS__)
21938
#define vredxor_vs_u32m1_u32m1(...) __riscv_vredxor_vs_u32m1_u32m1_tu(__VA_ARGS__)
21939
#define vredxor_vs_u32m2_u32m1(...) __riscv_vredxor_vs_u32m2_u32m1_tu(__VA_ARGS__)
21940
#define vredxor_vs_u32m4_u32m1(...) __riscv_vredxor_vs_u32m4_u32m1_tu(__VA_ARGS__)
21941
#define vredxor_vs_u32m8_u32m1(...) __riscv_vredxor_vs_u32m8_u32m1_tu(__VA_ARGS__)
21942
#define vredxor_vs_u64m1_u64m1(...) __riscv_vredxor_vs_u64m1_u64m1_tu(__VA_ARGS__)
21943
#define vredxor_vs_u64m2_u64m1(...) __riscv_vredxor_vs_u64m2_u64m1_tu(__VA_ARGS__)
21944
#define vredxor_vs_u64m4_u64m1(...) __riscv_vredxor_vs_u64m4_u64m1_tu(__VA_ARGS__)
21945
#define vredxor_vs_u64m8_u64m1(...) __riscv_vredxor_vs_u64m8_u64m1_tu(__VA_ARGS__)
21946
// masked functions
21947
#define vredsum_vs_i8mf8_i8m1_m(...) __riscv_vredsum_vs_i8mf8_i8m1_tum(__VA_ARGS__)
21948
#define vredsum_vs_i8mf4_i8m1_m(...) __riscv_vredsum_vs_i8mf4_i8m1_tum(__VA_ARGS__)
21949
#define vredsum_vs_i8mf2_i8m1_m(...) __riscv_vredsum_vs_i8mf2_i8m1_tum(__VA_ARGS__)
21950
#define vredsum_vs_i8m1_i8m1_m(...) __riscv_vredsum_vs_i8m1_i8m1_tum(__VA_ARGS__)
21951
#define vredsum_vs_i8m2_i8m1_m(...) __riscv_vredsum_vs_i8m2_i8m1_tum(__VA_ARGS__)
21952
#define vredsum_vs_i8m4_i8m1_m(...) __riscv_vredsum_vs_i8m4_i8m1_tum(__VA_ARGS__)
21953
#define vredsum_vs_i8m8_i8m1_m(...) __riscv_vredsum_vs_i8m8_i8m1_tum(__VA_ARGS__)
21954
#define vredsum_vs_i16mf4_i16m1_m(...) __riscv_vredsum_vs_i16mf4_i16m1_tum(__VA_ARGS__)
21955
#define vredsum_vs_i16mf2_i16m1_m(...) __riscv_vredsum_vs_i16mf2_i16m1_tum(__VA_ARGS__)
21956
#define vredsum_vs_i16m1_i16m1_m(...) __riscv_vredsum_vs_i16m1_i16m1_tum(__VA_ARGS__)
21957
#define vredsum_vs_i16m2_i16m1_m(...) __riscv_vredsum_vs_i16m2_i16m1_tum(__VA_ARGS__)
21958
#define vredsum_vs_i16m4_i16m1_m(...) __riscv_vredsum_vs_i16m4_i16m1_tum(__VA_ARGS__)
21959
#define vredsum_vs_i16m8_i16m1_m(...) __riscv_vredsum_vs_i16m8_i16m1_tum(__VA_ARGS__)
21960
#define vredsum_vs_i32mf2_i32m1_m(...) __riscv_vredsum_vs_i32mf2_i32m1_tum(__VA_ARGS__)
21961
#define vredsum_vs_i32m1_i32m1_m(...) __riscv_vredsum_vs_i32m1_i32m1_tum(__VA_ARGS__)
21962
#define vredsum_vs_i32m2_i32m1_m(...) __riscv_vredsum_vs_i32m2_i32m1_tum(__VA_ARGS__)
21963
#define vredsum_vs_i32m4_i32m1_m(...) __riscv_vredsum_vs_i32m4_i32m1_tum(__VA_ARGS__)
21964
#define vredsum_vs_i32m8_i32m1_m(...) __riscv_vredsum_vs_i32m8_i32m1_tum(__VA_ARGS__)
21965
#define vredsum_vs_i64m1_i64m1_m(...) __riscv_vredsum_vs_i64m1_i64m1_tum(__VA_ARGS__)
21966
#define vredsum_vs_i64m2_i64m1_m(...) __riscv_vredsum_vs_i64m2_i64m1_tum(__VA_ARGS__)
21967
#define vredsum_vs_i64m4_i64m1_m(...) __riscv_vredsum_vs_i64m4_i64m1_tum(__VA_ARGS__)
21968
#define vredsum_vs_i64m8_i64m1_m(...) __riscv_vredsum_vs_i64m8_i64m1_tum(__VA_ARGS__)
21969
#define vredmax_vs_i8mf8_i8m1_m(...) __riscv_vredmax_vs_i8mf8_i8m1_tum(__VA_ARGS__)
21970
#define vredmax_vs_i8mf4_i8m1_m(...) __riscv_vredmax_vs_i8mf4_i8m1_tum(__VA_ARGS__)
21971
#define vredmax_vs_i8mf2_i8m1_m(...) __riscv_vredmax_vs_i8mf2_i8m1_tum(__VA_ARGS__)
21972
#define vredmax_vs_i8m1_i8m1_m(...) __riscv_vredmax_vs_i8m1_i8m1_tum(__VA_ARGS__)
21973
#define vredmax_vs_i8m2_i8m1_m(...) __riscv_vredmax_vs_i8m2_i8m1_tum(__VA_ARGS__)
21974
#define vredmax_vs_i8m4_i8m1_m(...) __riscv_vredmax_vs_i8m4_i8m1_tum(__VA_ARGS__)
21975
#define vredmax_vs_i8m8_i8m1_m(...) __riscv_vredmax_vs_i8m8_i8m1_tum(__VA_ARGS__)
21976
#define vredmax_vs_i16mf4_i16m1_m(...) __riscv_vredmax_vs_i16mf4_i16m1_tum(__VA_ARGS__)
21977
#define vredmax_vs_i16mf2_i16m1_m(...) __riscv_vredmax_vs_i16mf2_i16m1_tum(__VA_ARGS__)
21978
#define vredmax_vs_i16m1_i16m1_m(...) __riscv_vredmax_vs_i16m1_i16m1_tum(__VA_ARGS__)
21979
#define vredmax_vs_i16m2_i16m1_m(...) __riscv_vredmax_vs_i16m2_i16m1_tum(__VA_ARGS__)
21980
#define vredmax_vs_i16m4_i16m1_m(...) __riscv_vredmax_vs_i16m4_i16m1_tum(__VA_ARGS__)
21981
#define vredmax_vs_i16m8_i16m1_m(...) __riscv_vredmax_vs_i16m8_i16m1_tum(__VA_ARGS__)
21982
#define vredmax_vs_i32mf2_i32m1_m(...) __riscv_vredmax_vs_i32mf2_i32m1_tum(__VA_ARGS__)
21983
#define vredmax_vs_i32m1_i32m1_m(...) __riscv_vredmax_vs_i32m1_i32m1_tum(__VA_ARGS__)
21984
#define vredmax_vs_i32m2_i32m1_m(...) __riscv_vredmax_vs_i32m2_i32m1_tum(__VA_ARGS__)
21985
#define vredmax_vs_i32m4_i32m1_m(...) __riscv_vredmax_vs_i32m4_i32m1_tum(__VA_ARGS__)
21986
#define vredmax_vs_i32m8_i32m1_m(...) __riscv_vredmax_vs_i32m8_i32m1_tum(__VA_ARGS__)
21987
#define vredmax_vs_i64m1_i64m1_m(...) __riscv_vredmax_vs_i64m1_i64m1_tum(__VA_ARGS__)
21988
#define vredmax_vs_i64m2_i64m1_m(...) __riscv_vredmax_vs_i64m2_i64m1_tum(__VA_ARGS__)
21989
#define vredmax_vs_i64m4_i64m1_m(...) __riscv_vredmax_vs_i64m4_i64m1_tum(__VA_ARGS__)
21990
#define vredmax_vs_i64m8_i64m1_m(...) __riscv_vredmax_vs_i64m8_i64m1_tum(__VA_ARGS__)
21991
#define vredmin_vs_i8mf8_i8m1_m(...) __riscv_vredmin_vs_i8mf8_i8m1_tum(__VA_ARGS__)
21992
#define vredmin_vs_i8mf4_i8m1_m(...) __riscv_vredmin_vs_i8mf4_i8m1_tum(__VA_ARGS__)
21993
#define vredmin_vs_i8mf2_i8m1_m(...) __riscv_vredmin_vs_i8mf2_i8m1_tum(__VA_ARGS__)
21994
#define vredmin_vs_i8m1_i8m1_m(...) __riscv_vredmin_vs_i8m1_i8m1_tum(__VA_ARGS__)
21995
#define vredmin_vs_i8m2_i8m1_m(...) __riscv_vredmin_vs_i8m2_i8m1_tum(__VA_ARGS__)
21996
#define vredmin_vs_i8m4_i8m1_m(...) __riscv_vredmin_vs_i8m4_i8m1_tum(__VA_ARGS__)
21997
#define vredmin_vs_i8m8_i8m1_m(...) __riscv_vredmin_vs_i8m8_i8m1_tum(__VA_ARGS__)
21998
#define vredmin_vs_i16mf4_i16m1_m(...) __riscv_vredmin_vs_i16mf4_i16m1_tum(__VA_ARGS__)
21999
#define vredmin_vs_i16mf2_i16m1_m(...) __riscv_vredmin_vs_i16mf2_i16m1_tum(__VA_ARGS__)
22000
#define vredmin_vs_i16m1_i16m1_m(...) __riscv_vredmin_vs_i16m1_i16m1_tum(__VA_ARGS__)
22001
#define vredmin_vs_i16m2_i16m1_m(...) __riscv_vredmin_vs_i16m2_i16m1_tum(__VA_ARGS__)
22002
#define vredmin_vs_i16m4_i16m1_m(...) __riscv_vredmin_vs_i16m4_i16m1_tum(__VA_ARGS__)
22003
#define vredmin_vs_i16m8_i16m1_m(...) __riscv_vredmin_vs_i16m8_i16m1_tum(__VA_ARGS__)
22004
#define vredmin_vs_i32mf2_i32m1_m(...) __riscv_vredmin_vs_i32mf2_i32m1_tum(__VA_ARGS__)
22005
#define vredmin_vs_i32m1_i32m1_m(...) __riscv_vredmin_vs_i32m1_i32m1_tum(__VA_ARGS__)
22006
#define vredmin_vs_i32m2_i32m1_m(...) __riscv_vredmin_vs_i32m2_i32m1_tum(__VA_ARGS__)
22007
#define vredmin_vs_i32m4_i32m1_m(...) __riscv_vredmin_vs_i32m4_i32m1_tum(__VA_ARGS__)
22008
#define vredmin_vs_i32m8_i32m1_m(...) __riscv_vredmin_vs_i32m8_i32m1_tum(__VA_ARGS__)
22009
#define vredmin_vs_i64m1_i64m1_m(...) __riscv_vredmin_vs_i64m1_i64m1_tum(__VA_ARGS__)
22010
#define vredmin_vs_i64m2_i64m1_m(...) __riscv_vredmin_vs_i64m2_i64m1_tum(__VA_ARGS__)
22011
#define vredmin_vs_i64m4_i64m1_m(...) __riscv_vredmin_vs_i64m4_i64m1_tum(__VA_ARGS__)
22012
#define vredmin_vs_i64m8_i64m1_m(...) __riscv_vredmin_vs_i64m8_i64m1_tum(__VA_ARGS__)
22013
#define vredand_vs_i8mf8_i8m1_m(...) __riscv_vredand_vs_i8mf8_i8m1_tum(__VA_ARGS__)
22014
#define vredand_vs_i8mf4_i8m1_m(...) __riscv_vredand_vs_i8mf4_i8m1_tum(__VA_ARGS__)
22015
#define vredand_vs_i8mf2_i8m1_m(...) __riscv_vredand_vs_i8mf2_i8m1_tum(__VA_ARGS__)
22016
#define vredand_vs_i8m1_i8m1_m(...) __riscv_vredand_vs_i8m1_i8m1_tum(__VA_ARGS__)
22017
#define vredand_vs_i8m2_i8m1_m(...) __riscv_vredand_vs_i8m2_i8m1_tum(__VA_ARGS__)
22018
#define vredand_vs_i8m4_i8m1_m(...) __riscv_vredand_vs_i8m4_i8m1_tum(__VA_ARGS__)
22019
#define vredand_vs_i8m8_i8m1_m(...) __riscv_vredand_vs_i8m8_i8m1_tum(__VA_ARGS__)
22020
#define vredand_vs_i16mf4_i16m1_m(...) __riscv_vredand_vs_i16mf4_i16m1_tum(__VA_ARGS__)
22021
#define vredand_vs_i16mf2_i16m1_m(...) __riscv_vredand_vs_i16mf2_i16m1_tum(__VA_ARGS__)
22022
#define vredand_vs_i16m1_i16m1_m(...) __riscv_vredand_vs_i16m1_i16m1_tum(__VA_ARGS__)
22023
#define vredand_vs_i16m2_i16m1_m(...) __riscv_vredand_vs_i16m2_i16m1_tum(__VA_ARGS__)
22024
#define vredand_vs_i16m4_i16m1_m(...) __riscv_vredand_vs_i16m4_i16m1_tum(__VA_ARGS__)
22025
#define vredand_vs_i16m8_i16m1_m(...) __riscv_vredand_vs_i16m8_i16m1_tum(__VA_ARGS__)
22026
#define vredand_vs_i32mf2_i32m1_m(...) __riscv_vredand_vs_i32mf2_i32m1_tum(__VA_ARGS__)
22027
#define vredand_vs_i32m1_i32m1_m(...) __riscv_vredand_vs_i32m1_i32m1_tum(__VA_ARGS__)
22028
#define vredand_vs_i32m2_i32m1_m(...) __riscv_vredand_vs_i32m2_i32m1_tum(__VA_ARGS__)
22029
#define vredand_vs_i32m4_i32m1_m(...) __riscv_vredand_vs_i32m4_i32m1_tum(__VA_ARGS__)
22030
#define vredand_vs_i32m8_i32m1_m(...) __riscv_vredand_vs_i32m8_i32m1_tum(__VA_ARGS__)
22031
#define vredand_vs_i64m1_i64m1_m(...) __riscv_vredand_vs_i64m1_i64m1_tum(__VA_ARGS__)
22032
#define vredand_vs_i64m2_i64m1_m(...) __riscv_vredand_vs_i64m2_i64m1_tum(__VA_ARGS__)
22033
#define vredand_vs_i64m4_i64m1_m(...) __riscv_vredand_vs_i64m4_i64m1_tum(__VA_ARGS__)
22034
#define vredand_vs_i64m8_i64m1_m(...) __riscv_vredand_vs_i64m8_i64m1_tum(__VA_ARGS__)
22035
#define vredor_vs_i8mf8_i8m1_m(...) __riscv_vredor_vs_i8mf8_i8m1_tum(__VA_ARGS__)
22036
#define vredor_vs_i8mf4_i8m1_m(...) __riscv_vredor_vs_i8mf4_i8m1_tum(__VA_ARGS__)
22037
#define vredor_vs_i8mf2_i8m1_m(...) __riscv_vredor_vs_i8mf2_i8m1_tum(__VA_ARGS__)
22038
#define vredor_vs_i8m1_i8m1_m(...) __riscv_vredor_vs_i8m1_i8m1_tum(__VA_ARGS__)
22039
#define vredor_vs_i8m2_i8m1_m(...) __riscv_vredor_vs_i8m2_i8m1_tum(__VA_ARGS__)
22040
#define vredor_vs_i8m4_i8m1_m(...) __riscv_vredor_vs_i8m4_i8m1_tum(__VA_ARGS__)
22041
#define vredor_vs_i8m8_i8m1_m(...) __riscv_vredor_vs_i8m8_i8m1_tum(__VA_ARGS__)
22042
#define vredor_vs_i16mf4_i16m1_m(...) __riscv_vredor_vs_i16mf4_i16m1_tum(__VA_ARGS__)
22043
#define vredor_vs_i16mf2_i16m1_m(...) __riscv_vredor_vs_i16mf2_i16m1_tum(__VA_ARGS__)
22044
#define vredor_vs_i16m1_i16m1_m(...) __riscv_vredor_vs_i16m1_i16m1_tum(__VA_ARGS__)
22045
#define vredor_vs_i16m2_i16m1_m(...) __riscv_vredor_vs_i16m2_i16m1_tum(__VA_ARGS__)
22046
#define vredor_vs_i16m4_i16m1_m(...) __riscv_vredor_vs_i16m4_i16m1_tum(__VA_ARGS__)
22047
#define vredor_vs_i16m8_i16m1_m(...) __riscv_vredor_vs_i16m8_i16m1_tum(__VA_ARGS__)
22048
#define vredor_vs_i32mf2_i32m1_m(...) __riscv_vredor_vs_i32mf2_i32m1_tum(__VA_ARGS__)
22049
#define vredor_vs_i32m1_i32m1_m(...) __riscv_vredor_vs_i32m1_i32m1_tum(__VA_ARGS__)
22050
#define vredor_vs_i32m2_i32m1_m(...) __riscv_vredor_vs_i32m2_i32m1_tum(__VA_ARGS__)
22051
#define vredor_vs_i32m4_i32m1_m(...) __riscv_vredor_vs_i32m4_i32m1_tum(__VA_ARGS__)
22052
#define vredor_vs_i32m8_i32m1_m(...) __riscv_vredor_vs_i32m8_i32m1_tum(__VA_ARGS__)
22053
#define vredor_vs_i64m1_i64m1_m(...) __riscv_vredor_vs_i64m1_i64m1_tum(__VA_ARGS__)
22054
#define vredor_vs_i64m2_i64m1_m(...) __riscv_vredor_vs_i64m2_i64m1_tum(__VA_ARGS__)
22055
#define vredor_vs_i64m4_i64m1_m(...) __riscv_vredor_vs_i64m4_i64m1_tum(__VA_ARGS__)
22056
#define vredor_vs_i64m8_i64m1_m(...) __riscv_vredor_vs_i64m8_i64m1_tum(__VA_ARGS__)
22057
#define vredxor_vs_i8mf8_i8m1_m(...) __riscv_vredxor_vs_i8mf8_i8m1_tum(__VA_ARGS__)
22058
#define vredxor_vs_i8mf4_i8m1_m(...) __riscv_vredxor_vs_i8mf4_i8m1_tum(__VA_ARGS__)
22059
#define vredxor_vs_i8mf2_i8m1_m(...) __riscv_vredxor_vs_i8mf2_i8m1_tum(__VA_ARGS__)
22060
#define vredxor_vs_i8m1_i8m1_m(...) __riscv_vredxor_vs_i8m1_i8m1_tum(__VA_ARGS__)
22061
#define vredxor_vs_i8m2_i8m1_m(...) __riscv_vredxor_vs_i8m2_i8m1_tum(__VA_ARGS__)
22062
#define vredxor_vs_i8m4_i8m1_m(...) __riscv_vredxor_vs_i8m4_i8m1_tum(__VA_ARGS__)
22063
#define vredxor_vs_i8m8_i8m1_m(...) __riscv_vredxor_vs_i8m8_i8m1_tum(__VA_ARGS__)
22064
#define vredxor_vs_i16mf4_i16m1_m(...) __riscv_vredxor_vs_i16mf4_i16m1_tum(__VA_ARGS__)
22065
#define vredxor_vs_i16mf2_i16m1_m(...) __riscv_vredxor_vs_i16mf2_i16m1_tum(__VA_ARGS__)
22066
#define vredxor_vs_i16m1_i16m1_m(...) __riscv_vredxor_vs_i16m1_i16m1_tum(__VA_ARGS__)
22067
#define vredxor_vs_i16m2_i16m1_m(...) __riscv_vredxor_vs_i16m2_i16m1_tum(__VA_ARGS__)
22068
#define vredxor_vs_i16m4_i16m1_m(...) __riscv_vredxor_vs_i16m4_i16m1_tum(__VA_ARGS__)
22069
#define vredxor_vs_i16m8_i16m1_m(...) __riscv_vredxor_vs_i16m8_i16m1_tum(__VA_ARGS__)
22070
#define vredxor_vs_i32mf2_i32m1_m(...) __riscv_vredxor_vs_i32mf2_i32m1_tum(__VA_ARGS__)
22071
#define vredxor_vs_i32m1_i32m1_m(...) __riscv_vredxor_vs_i32m1_i32m1_tum(__VA_ARGS__)
22072
#define vredxor_vs_i32m2_i32m1_m(...) __riscv_vredxor_vs_i32m2_i32m1_tum(__VA_ARGS__)
22073
#define vredxor_vs_i32m4_i32m1_m(...) __riscv_vredxor_vs_i32m4_i32m1_tum(__VA_ARGS__)
22074
#define vredxor_vs_i32m8_i32m1_m(...) __riscv_vredxor_vs_i32m8_i32m1_tum(__VA_ARGS__)
22075
#define vredxor_vs_i64m1_i64m1_m(...) __riscv_vredxor_vs_i64m1_i64m1_tum(__VA_ARGS__)
22076
#define vredxor_vs_i64m2_i64m1_m(...) __riscv_vredxor_vs_i64m2_i64m1_tum(__VA_ARGS__)
22077
#define vredxor_vs_i64m4_i64m1_m(...) __riscv_vredxor_vs_i64m4_i64m1_tum(__VA_ARGS__)
22078
#define vredxor_vs_i64m8_i64m1_m(...) __riscv_vredxor_vs_i64m8_i64m1_tum(__VA_ARGS__)
22079
#define vredsum_vs_u8mf8_u8m1_m(...) __riscv_vredsum_vs_u8mf8_u8m1_tum(__VA_ARGS__)
22080
#define vredsum_vs_u8mf4_u8m1_m(...) __riscv_vredsum_vs_u8mf4_u8m1_tum(__VA_ARGS__)
22081
#define vredsum_vs_u8mf2_u8m1_m(...) __riscv_vredsum_vs_u8mf2_u8m1_tum(__VA_ARGS__)
22082
#define vredsum_vs_u8m1_u8m1_m(...) __riscv_vredsum_vs_u8m1_u8m1_tum(__VA_ARGS__)
22083
#define vredsum_vs_u8m2_u8m1_m(...) __riscv_vredsum_vs_u8m2_u8m1_tum(__VA_ARGS__)
22084
#define vredsum_vs_u8m4_u8m1_m(...) __riscv_vredsum_vs_u8m4_u8m1_tum(__VA_ARGS__)
22085
#define vredsum_vs_u8m8_u8m1_m(...) __riscv_vredsum_vs_u8m8_u8m1_tum(__VA_ARGS__)
22086
#define vredsum_vs_u16mf4_u16m1_m(...) __riscv_vredsum_vs_u16mf4_u16m1_tum(__VA_ARGS__)
22087
#define vredsum_vs_u16mf2_u16m1_m(...) __riscv_vredsum_vs_u16mf2_u16m1_tum(__VA_ARGS__)
22088
#define vredsum_vs_u16m1_u16m1_m(...) __riscv_vredsum_vs_u16m1_u16m1_tum(__VA_ARGS__)
22089
#define vredsum_vs_u16m2_u16m1_m(...) __riscv_vredsum_vs_u16m2_u16m1_tum(__VA_ARGS__)
22090
#define vredsum_vs_u16m4_u16m1_m(...) __riscv_vredsum_vs_u16m4_u16m1_tum(__VA_ARGS__)
22091
#define vredsum_vs_u16m8_u16m1_m(...) __riscv_vredsum_vs_u16m8_u16m1_tum(__VA_ARGS__)
22092
#define vredsum_vs_u32mf2_u32m1_m(...) __riscv_vredsum_vs_u32mf2_u32m1_tum(__VA_ARGS__)
22093
#define vredsum_vs_u32m1_u32m1_m(...) __riscv_vredsum_vs_u32m1_u32m1_tum(__VA_ARGS__)
22094
#define vredsum_vs_u32m2_u32m1_m(...) __riscv_vredsum_vs_u32m2_u32m1_tum(__VA_ARGS__)
22095
#define vredsum_vs_u32m4_u32m1_m(...) __riscv_vredsum_vs_u32m4_u32m1_tum(__VA_ARGS__)
22096
#define vredsum_vs_u32m8_u32m1_m(...) __riscv_vredsum_vs_u32m8_u32m1_tum(__VA_ARGS__)
22097
#define vredsum_vs_u64m1_u64m1_m(...) __riscv_vredsum_vs_u64m1_u64m1_tum(__VA_ARGS__)
22098
#define vredsum_vs_u64m2_u64m1_m(...) __riscv_vredsum_vs_u64m2_u64m1_tum(__VA_ARGS__)
22099
#define vredsum_vs_u64m4_u64m1_m(...) __riscv_vredsum_vs_u64m4_u64m1_tum(__VA_ARGS__)
22100
#define vredsum_vs_u64m8_u64m1_m(...) __riscv_vredsum_vs_u64m8_u64m1_tum(__VA_ARGS__)
22101
#define vredmaxu_vs_u8mf8_u8m1_m(...) __riscv_vredmaxu_vs_u8mf8_u8m1_tum(__VA_ARGS__)
22102
#define vredmaxu_vs_u8mf4_u8m1_m(...) __riscv_vredmaxu_vs_u8mf4_u8m1_tum(__VA_ARGS__)
22103
#define vredmaxu_vs_u8mf2_u8m1_m(...) __riscv_vredmaxu_vs_u8mf2_u8m1_tum(__VA_ARGS__)
22104
#define vredmaxu_vs_u8m1_u8m1_m(...) __riscv_vredmaxu_vs_u8m1_u8m1_tum(__VA_ARGS__)
22105
#define vredmaxu_vs_u8m2_u8m1_m(...) __riscv_vredmaxu_vs_u8m2_u8m1_tum(__VA_ARGS__)
22106
#define vredmaxu_vs_u8m4_u8m1_m(...) __riscv_vredmaxu_vs_u8m4_u8m1_tum(__VA_ARGS__)
22107
#define vredmaxu_vs_u8m8_u8m1_m(...) __riscv_vredmaxu_vs_u8m8_u8m1_tum(__VA_ARGS__)
22108
#define vredmaxu_vs_u16mf4_u16m1_m(...) __riscv_vredmaxu_vs_u16mf4_u16m1_tum(__VA_ARGS__)
22109
#define vredmaxu_vs_u16mf2_u16m1_m(...) __riscv_vredmaxu_vs_u16mf2_u16m1_tum(__VA_ARGS__)
22110
#define vredmaxu_vs_u16m1_u16m1_m(...) __riscv_vredmaxu_vs_u16m1_u16m1_tum(__VA_ARGS__)
22111
#define vredmaxu_vs_u16m2_u16m1_m(...) __riscv_vredmaxu_vs_u16m2_u16m1_tum(__VA_ARGS__)
22112
#define vredmaxu_vs_u16m4_u16m1_m(...) __riscv_vredmaxu_vs_u16m4_u16m1_tum(__VA_ARGS__)
22113
#define vredmaxu_vs_u16m8_u16m1_m(...) __riscv_vredmaxu_vs_u16m8_u16m1_tum(__VA_ARGS__)
22114
#define vredmaxu_vs_u32mf2_u32m1_m(...) __riscv_vredmaxu_vs_u32mf2_u32m1_tum(__VA_ARGS__)
22115
#define vredmaxu_vs_u32m1_u32m1_m(...) __riscv_vredmaxu_vs_u32m1_u32m1_tum(__VA_ARGS__)
22116
#define vredmaxu_vs_u32m2_u32m1_m(...) __riscv_vredmaxu_vs_u32m2_u32m1_tum(__VA_ARGS__)
22117
#define vredmaxu_vs_u32m4_u32m1_m(...) __riscv_vredmaxu_vs_u32m4_u32m1_tum(__VA_ARGS__)
22118
#define vredmaxu_vs_u32m8_u32m1_m(...) __riscv_vredmaxu_vs_u32m8_u32m1_tum(__VA_ARGS__)
22119
#define vredmaxu_vs_u64m1_u64m1_m(...) __riscv_vredmaxu_vs_u64m1_u64m1_tum(__VA_ARGS__)
22120
#define vredmaxu_vs_u64m2_u64m1_m(...) __riscv_vredmaxu_vs_u64m2_u64m1_tum(__VA_ARGS__)
22121
#define vredmaxu_vs_u64m4_u64m1_m(...) __riscv_vredmaxu_vs_u64m4_u64m1_tum(__VA_ARGS__)
22122
#define vredmaxu_vs_u64m8_u64m1_m(...) __riscv_vredmaxu_vs_u64m8_u64m1_tum(__VA_ARGS__)
22123
#define vredminu_vs_u8mf8_u8m1_m(...) __riscv_vredminu_vs_u8mf8_u8m1_tum(__VA_ARGS__)
22124
#define vredminu_vs_u8mf4_u8m1_m(...) __riscv_vredminu_vs_u8mf4_u8m1_tum(__VA_ARGS__)
22125
#define vredminu_vs_u8mf2_u8m1_m(...) __riscv_vredminu_vs_u8mf2_u8m1_tum(__VA_ARGS__)
22126
#define vredminu_vs_u8m1_u8m1_m(...) __riscv_vredminu_vs_u8m1_u8m1_tum(__VA_ARGS__)
22127
#define vredminu_vs_u8m2_u8m1_m(...) __riscv_vredminu_vs_u8m2_u8m1_tum(__VA_ARGS__)
22128
#define vredminu_vs_u8m4_u8m1_m(...) __riscv_vredminu_vs_u8m4_u8m1_tum(__VA_ARGS__)
22129
#define vredminu_vs_u8m8_u8m1_m(...) __riscv_vredminu_vs_u8m8_u8m1_tum(__VA_ARGS__)
22130
#define vredminu_vs_u16mf4_u16m1_m(...) __riscv_vredminu_vs_u16mf4_u16m1_tum(__VA_ARGS__)
22131
#define vredminu_vs_u16mf2_u16m1_m(...) __riscv_vredminu_vs_u16mf2_u16m1_tum(__VA_ARGS__)
22132
#define vredminu_vs_u16m1_u16m1_m(...) __riscv_vredminu_vs_u16m1_u16m1_tum(__VA_ARGS__)
22133
#define vredminu_vs_u16m2_u16m1_m(...) __riscv_vredminu_vs_u16m2_u16m1_tum(__VA_ARGS__)
22134
#define vredminu_vs_u16m4_u16m1_m(...) __riscv_vredminu_vs_u16m4_u16m1_tum(__VA_ARGS__)
22135
#define vredminu_vs_u16m8_u16m1_m(...) __riscv_vredminu_vs_u16m8_u16m1_tum(__VA_ARGS__)
22136
#define vredminu_vs_u32mf2_u32m1_m(...) __riscv_vredminu_vs_u32mf2_u32m1_tum(__VA_ARGS__)
22137
#define vredminu_vs_u32m1_u32m1_m(...) __riscv_vredminu_vs_u32m1_u32m1_tum(__VA_ARGS__)
22138
#define vredminu_vs_u32m2_u32m1_m(...) __riscv_vredminu_vs_u32m2_u32m1_tum(__VA_ARGS__)
22139
#define vredminu_vs_u32m4_u32m1_m(...) __riscv_vredminu_vs_u32m4_u32m1_tum(__VA_ARGS__)
22140
#define vredminu_vs_u32m8_u32m1_m(...) __riscv_vredminu_vs_u32m8_u32m1_tum(__VA_ARGS__)
22141
#define vredminu_vs_u64m1_u64m1_m(...) __riscv_vredminu_vs_u64m1_u64m1_tum(__VA_ARGS__)
22142
#define vredminu_vs_u64m2_u64m1_m(...) __riscv_vredminu_vs_u64m2_u64m1_tum(__VA_ARGS__)
22143
#define vredminu_vs_u64m4_u64m1_m(...) __riscv_vredminu_vs_u64m4_u64m1_tum(__VA_ARGS__)
22144
#define vredminu_vs_u64m8_u64m1_m(...) __riscv_vredminu_vs_u64m8_u64m1_tum(__VA_ARGS__)
22145
#define vredand_vs_u8mf8_u8m1_m(...) __riscv_vredand_vs_u8mf8_u8m1_tum(__VA_ARGS__)
22146
#define vredand_vs_u8mf4_u8m1_m(...) __riscv_vredand_vs_u8mf4_u8m1_tum(__VA_ARGS__)
22147
#define vredand_vs_u8mf2_u8m1_m(...) __riscv_vredand_vs_u8mf2_u8m1_tum(__VA_ARGS__)
22148
#define vredand_vs_u8m1_u8m1_m(...) __riscv_vredand_vs_u8m1_u8m1_tum(__VA_ARGS__)
22149
#define vredand_vs_u8m2_u8m1_m(...) __riscv_vredand_vs_u8m2_u8m1_tum(__VA_ARGS__)
22150
#define vredand_vs_u8m4_u8m1_m(...) __riscv_vredand_vs_u8m4_u8m1_tum(__VA_ARGS__)
22151
#define vredand_vs_u8m8_u8m1_m(...) __riscv_vredand_vs_u8m8_u8m1_tum(__VA_ARGS__)
22152
#define vredand_vs_u16mf4_u16m1_m(...) __riscv_vredand_vs_u16mf4_u16m1_tum(__VA_ARGS__)
22153
#define vredand_vs_u16mf2_u16m1_m(...) __riscv_vredand_vs_u16mf2_u16m1_tum(__VA_ARGS__)
22154
#define vredand_vs_u16m1_u16m1_m(...) __riscv_vredand_vs_u16m1_u16m1_tum(__VA_ARGS__)
22155
#define vredand_vs_u16m2_u16m1_m(...) __riscv_vredand_vs_u16m2_u16m1_tum(__VA_ARGS__)
22156
#define vredand_vs_u16m4_u16m1_m(...) __riscv_vredand_vs_u16m4_u16m1_tum(__VA_ARGS__)
22157
#define vredand_vs_u16m8_u16m1_m(...) __riscv_vredand_vs_u16m8_u16m1_tum(__VA_ARGS__)
22158
#define vredand_vs_u32mf2_u32m1_m(...) __riscv_vredand_vs_u32mf2_u32m1_tum(__VA_ARGS__)
22159
#define vredand_vs_u32m1_u32m1_m(...) __riscv_vredand_vs_u32m1_u32m1_tum(__VA_ARGS__)
22160
#define vredand_vs_u32m2_u32m1_m(...) __riscv_vredand_vs_u32m2_u32m1_tum(__VA_ARGS__)
22161
#define vredand_vs_u32m4_u32m1_m(...) __riscv_vredand_vs_u32m4_u32m1_tum(__VA_ARGS__)
22162
#define vredand_vs_u32m8_u32m1_m(...) __riscv_vredand_vs_u32m8_u32m1_tum(__VA_ARGS__)
22163
#define vredand_vs_u64m1_u64m1_m(...) __riscv_vredand_vs_u64m1_u64m1_tum(__VA_ARGS__)
22164
#define vredand_vs_u64m2_u64m1_m(...) __riscv_vredand_vs_u64m2_u64m1_tum(__VA_ARGS__)
22165
#define vredand_vs_u64m4_u64m1_m(...) __riscv_vredand_vs_u64m4_u64m1_tum(__VA_ARGS__)
22166
#define vredand_vs_u64m8_u64m1_m(...) __riscv_vredand_vs_u64m8_u64m1_tum(__VA_ARGS__)
22167
#define vredor_vs_u8mf8_u8m1_m(...) __riscv_vredor_vs_u8mf8_u8m1_tum(__VA_ARGS__)
22168
#define vredor_vs_u8mf4_u8m1_m(...) __riscv_vredor_vs_u8mf4_u8m1_tum(__VA_ARGS__)
22169
#define vredor_vs_u8mf2_u8m1_m(...) __riscv_vredor_vs_u8mf2_u8m1_tum(__VA_ARGS__)
22170
#define vredor_vs_u8m1_u8m1_m(...) __riscv_vredor_vs_u8m1_u8m1_tum(__VA_ARGS__)
22171
#define vredor_vs_u8m2_u8m1_m(...) __riscv_vredor_vs_u8m2_u8m1_tum(__VA_ARGS__)
22172
#define vredor_vs_u8m4_u8m1_m(...) __riscv_vredor_vs_u8m4_u8m1_tum(__VA_ARGS__)
22173
#define vredor_vs_u8m8_u8m1_m(...) __riscv_vredor_vs_u8m8_u8m1_tum(__VA_ARGS__)
22174
#define vredor_vs_u16mf4_u16m1_m(...) __riscv_vredor_vs_u16mf4_u16m1_tum(__VA_ARGS__)
22175
#define vredor_vs_u16mf2_u16m1_m(...) __riscv_vredor_vs_u16mf2_u16m1_tum(__VA_ARGS__)
22176
#define vredor_vs_u16m1_u16m1_m(...) __riscv_vredor_vs_u16m1_u16m1_tum(__VA_ARGS__)
22177
#define vredor_vs_u16m2_u16m1_m(...) __riscv_vredor_vs_u16m2_u16m1_tum(__VA_ARGS__)
22178
#define vredor_vs_u16m4_u16m1_m(...) __riscv_vredor_vs_u16m4_u16m1_tum(__VA_ARGS__)
22179
#define vredor_vs_u16m8_u16m1_m(...) __riscv_vredor_vs_u16m8_u16m1_tum(__VA_ARGS__)
22180
#define vredor_vs_u32mf2_u32m1_m(...) __riscv_vredor_vs_u32mf2_u32m1_tum(__VA_ARGS__)
22181
#define vredor_vs_u32m1_u32m1_m(...) __riscv_vredor_vs_u32m1_u32m1_tum(__VA_ARGS__)
22182
#define vredor_vs_u32m2_u32m1_m(...) __riscv_vredor_vs_u32m2_u32m1_tum(__VA_ARGS__)
22183
#define vredor_vs_u32m4_u32m1_m(...) __riscv_vredor_vs_u32m4_u32m1_tum(__VA_ARGS__)
22184
#define vredor_vs_u32m8_u32m1_m(...) __riscv_vredor_vs_u32m8_u32m1_tum(__VA_ARGS__)
22185
#define vredor_vs_u64m1_u64m1_m(...) __riscv_vredor_vs_u64m1_u64m1_tum(__VA_ARGS__)
22186
#define vredor_vs_u64m2_u64m1_m(...) __riscv_vredor_vs_u64m2_u64m1_tum(__VA_ARGS__)
22187
#define vredor_vs_u64m4_u64m1_m(...) __riscv_vredor_vs_u64m4_u64m1_tum(__VA_ARGS__)
22188
#define vredor_vs_u64m8_u64m1_m(...) __riscv_vredor_vs_u64m8_u64m1_tum(__VA_ARGS__)
22189
#define vredxor_vs_u8mf8_u8m1_m(...) __riscv_vredxor_vs_u8mf8_u8m1_tum(__VA_ARGS__)
22190
#define vredxor_vs_u8mf4_u8m1_m(...) __riscv_vredxor_vs_u8mf4_u8m1_tum(__VA_ARGS__)
22191
#define vredxor_vs_u8mf2_u8m1_m(...) __riscv_vredxor_vs_u8mf2_u8m1_tum(__VA_ARGS__)
22192
#define vredxor_vs_u8m1_u8m1_m(...) __riscv_vredxor_vs_u8m1_u8m1_tum(__VA_ARGS__)
22193
#define vredxor_vs_u8m2_u8m1_m(...) __riscv_vredxor_vs_u8m2_u8m1_tum(__VA_ARGS__)
22194
#define vredxor_vs_u8m4_u8m1_m(...) __riscv_vredxor_vs_u8m4_u8m1_tum(__VA_ARGS__)
22195
#define vredxor_vs_u8m8_u8m1_m(...) __riscv_vredxor_vs_u8m8_u8m1_tum(__VA_ARGS__)
22196
#define vredxor_vs_u16mf4_u16m1_m(...) __riscv_vredxor_vs_u16mf4_u16m1_tum(__VA_ARGS__)
22197
#define vredxor_vs_u16mf2_u16m1_m(...) __riscv_vredxor_vs_u16mf2_u16m1_tum(__VA_ARGS__)
22198
#define vredxor_vs_u16m1_u16m1_m(...) __riscv_vredxor_vs_u16m1_u16m1_tum(__VA_ARGS__)
22199
#define vredxor_vs_u16m2_u16m1_m(...) __riscv_vredxor_vs_u16m2_u16m1_tum(__VA_ARGS__)
22200
#define vredxor_vs_u16m4_u16m1_m(...) __riscv_vredxor_vs_u16m4_u16m1_tum(__VA_ARGS__)
22201
#define vredxor_vs_u16m8_u16m1_m(...) __riscv_vredxor_vs_u16m8_u16m1_tum(__VA_ARGS__)
22202
#define vredxor_vs_u32mf2_u32m1_m(...) __riscv_vredxor_vs_u32mf2_u32m1_tum(__VA_ARGS__)
22203
#define vredxor_vs_u32m1_u32m1_m(...) __riscv_vredxor_vs_u32m1_u32m1_tum(__VA_ARGS__)
22204
#define vredxor_vs_u32m2_u32m1_m(...) __riscv_vredxor_vs_u32m2_u32m1_tum(__VA_ARGS__)
22205
#define vredxor_vs_u32m4_u32m1_m(...) __riscv_vredxor_vs_u32m4_u32m1_tum(__VA_ARGS__)
22206
#define vredxor_vs_u32m8_u32m1_m(...) __riscv_vredxor_vs_u32m8_u32m1_tum(__VA_ARGS__)
22207
#define vredxor_vs_u64m1_u64m1_m(...) __riscv_vredxor_vs_u64m1_u64m1_tum(__VA_ARGS__)
22208
#define vredxor_vs_u64m2_u64m1_m(...) __riscv_vredxor_vs_u64m2_u64m1_tum(__VA_ARGS__)
22209
#define vredxor_vs_u64m4_u64m1_m(...) __riscv_vredxor_vs_u64m4_u64m1_tum(__VA_ARGS__)
22210
#define vredxor_vs_u64m8_u64m1_m(...) __riscv_vredxor_vs_u64m8_u64m1_tum(__VA_ARGS__)
22211
#define vwredsum_vs_i8mf8_i16m1(...) __riscv_vwredsum_vs_i8mf8_i16m1_tu(__VA_ARGS__)
22212
#define vwredsum_vs_i8mf4_i16m1(...) __riscv_vwredsum_vs_i8mf4_i16m1_tu(__VA_ARGS__)
22213
#define vwredsum_vs_i8mf2_i16m1(...) __riscv_vwredsum_vs_i8mf2_i16m1_tu(__VA_ARGS__)
22214
#define vwredsum_vs_i8m1_i16m1(...) __riscv_vwredsum_vs_i8m1_i16m1_tu(__VA_ARGS__)
22215
#define vwredsum_vs_i8m2_i16m1(...) __riscv_vwredsum_vs_i8m2_i16m1_tu(__VA_ARGS__)
22216
#define vwredsum_vs_i8m4_i16m1(...) __riscv_vwredsum_vs_i8m4_i16m1_tu(__VA_ARGS__)
22217
#define vwredsum_vs_i8m8_i16m1(...) __riscv_vwredsum_vs_i8m8_i16m1_tu(__VA_ARGS__)
22218
#define vwredsum_vs_i16mf4_i32m1(...) __riscv_vwredsum_vs_i16mf4_i32m1_tu(__VA_ARGS__)
22219
#define vwredsum_vs_i16mf2_i32m1(...) __riscv_vwredsum_vs_i16mf2_i32m1_tu(__VA_ARGS__)
22220
#define vwredsum_vs_i16m1_i32m1(...) __riscv_vwredsum_vs_i16m1_i32m1_tu(__VA_ARGS__)
22221
#define vwredsum_vs_i16m2_i32m1(...) __riscv_vwredsum_vs_i16m2_i32m1_tu(__VA_ARGS__)
22222
#define vwredsum_vs_i16m4_i32m1(...) __riscv_vwredsum_vs_i16m4_i32m1_tu(__VA_ARGS__)
22223
#define vwredsum_vs_i16m8_i32m1(...) __riscv_vwredsum_vs_i16m8_i32m1_tu(__VA_ARGS__)
22224
#define vwredsum_vs_i32mf2_i64m1(...) __riscv_vwredsum_vs_i32mf2_i64m1_tu(__VA_ARGS__)
22225
#define vwredsum_vs_i32m1_i64m1(...) __riscv_vwredsum_vs_i32m1_i64m1_tu(__VA_ARGS__)
22226
#define vwredsum_vs_i32m2_i64m1(...) __riscv_vwredsum_vs_i32m2_i64m1_tu(__VA_ARGS__)
22227
#define vwredsum_vs_i32m4_i64m1(...) __riscv_vwredsum_vs_i32m4_i64m1_tu(__VA_ARGS__)
22228
#define vwredsum_vs_i32m8_i64m1(...) __riscv_vwredsum_vs_i32m8_i64m1_tu(__VA_ARGS__)
22229
#define vwredsumu_vs_u8mf8_u16m1(...) __riscv_vwredsumu_vs_u8mf8_u16m1_tu(__VA_ARGS__)
22230
#define vwredsumu_vs_u8mf4_u16m1(...) __riscv_vwredsumu_vs_u8mf4_u16m1_tu(__VA_ARGS__)
22231
#define vwredsumu_vs_u8mf2_u16m1(...) __riscv_vwredsumu_vs_u8mf2_u16m1_tu(__VA_ARGS__)
22232
#define vwredsumu_vs_u8m1_u16m1(...) __riscv_vwredsumu_vs_u8m1_u16m1_tu(__VA_ARGS__)
22233
#define vwredsumu_vs_u8m2_u16m1(...) __riscv_vwredsumu_vs_u8m2_u16m1_tu(__VA_ARGS__)
22234
#define vwredsumu_vs_u8m4_u16m1(...) __riscv_vwredsumu_vs_u8m4_u16m1_tu(__VA_ARGS__)
22235
#define vwredsumu_vs_u8m8_u16m1(...) __riscv_vwredsumu_vs_u8m8_u16m1_tu(__VA_ARGS__)
22236
#define vwredsumu_vs_u16mf4_u32m1(...) __riscv_vwredsumu_vs_u16mf4_u32m1_tu(__VA_ARGS__)
22237
#define vwredsumu_vs_u16mf2_u32m1(...) __riscv_vwredsumu_vs_u16mf2_u32m1_tu(__VA_ARGS__)
22238
#define vwredsumu_vs_u16m1_u32m1(...) __riscv_vwredsumu_vs_u16m1_u32m1_tu(__VA_ARGS__)
22239
#define vwredsumu_vs_u16m2_u32m1(...) __riscv_vwredsumu_vs_u16m2_u32m1_tu(__VA_ARGS__)
22240
#define vwredsumu_vs_u16m4_u32m1(...) __riscv_vwredsumu_vs_u16m4_u32m1_tu(__VA_ARGS__)
22241
#define vwredsumu_vs_u16m8_u32m1(...) __riscv_vwredsumu_vs_u16m8_u32m1_tu(__VA_ARGS__)
22242
#define vwredsumu_vs_u32mf2_u64m1(...) __riscv_vwredsumu_vs_u32mf2_u64m1_tu(__VA_ARGS__)
22243
#define vwredsumu_vs_u32m1_u64m1(...) __riscv_vwredsumu_vs_u32m1_u64m1_tu(__VA_ARGS__)
22244
#define vwredsumu_vs_u32m2_u64m1(...) __riscv_vwredsumu_vs_u32m2_u64m1_tu(__VA_ARGS__)
22245
#define vwredsumu_vs_u32m4_u64m1(...) __riscv_vwredsumu_vs_u32m4_u64m1_tu(__VA_ARGS__)
22246
#define vwredsumu_vs_u32m8_u64m1(...) __riscv_vwredsumu_vs_u32m8_u64m1_tu(__VA_ARGS__)
22247
// masked functions
22248
#define vwredsum_vs_i8mf8_i16m1_m(...) __riscv_vwredsum_vs_i8mf8_i16m1_tum(__VA_ARGS__)
22249
#define vwredsum_vs_i8mf4_i16m1_m(...) __riscv_vwredsum_vs_i8mf4_i16m1_tum(__VA_ARGS__)
22250
#define vwredsum_vs_i8mf2_i16m1_m(...) __riscv_vwredsum_vs_i8mf2_i16m1_tum(__VA_ARGS__)
22251
#define vwredsum_vs_i8m1_i16m1_m(...) __riscv_vwredsum_vs_i8m1_i16m1_tum(__VA_ARGS__)
22252
#define vwredsum_vs_i8m2_i16m1_m(...) __riscv_vwredsum_vs_i8m2_i16m1_tum(__VA_ARGS__)
22253
#define vwredsum_vs_i8m4_i16m1_m(...) __riscv_vwredsum_vs_i8m4_i16m1_tum(__VA_ARGS__)
22254
#define vwredsum_vs_i8m8_i16m1_m(...) __riscv_vwredsum_vs_i8m8_i16m1_tum(__VA_ARGS__)
22255
#define vwredsum_vs_i16mf4_i32m1_m(...) __riscv_vwredsum_vs_i16mf4_i32m1_tum(__VA_ARGS__)
22256
#define vwredsum_vs_i16mf2_i32m1_m(...) __riscv_vwredsum_vs_i16mf2_i32m1_tum(__VA_ARGS__)
22257
#define vwredsum_vs_i16m1_i32m1_m(...) __riscv_vwredsum_vs_i16m1_i32m1_tum(__VA_ARGS__)
22258
#define vwredsum_vs_i16m2_i32m1_m(...) __riscv_vwredsum_vs_i16m2_i32m1_tum(__VA_ARGS__)
22259
#define vwredsum_vs_i16m4_i32m1_m(...) __riscv_vwredsum_vs_i16m4_i32m1_tum(__VA_ARGS__)
22260
#define vwredsum_vs_i16m8_i32m1_m(...) __riscv_vwredsum_vs_i16m8_i32m1_tum(__VA_ARGS__)
22261
#define vwredsum_vs_i32mf2_i64m1_m(...) __riscv_vwredsum_vs_i32mf2_i64m1_tum(__VA_ARGS__)
22262
#define vwredsum_vs_i32m1_i64m1_m(...) __riscv_vwredsum_vs_i32m1_i64m1_tum(__VA_ARGS__)
22263
#define vwredsum_vs_i32m2_i64m1_m(...) __riscv_vwredsum_vs_i32m2_i64m1_tum(__VA_ARGS__)
22264
#define vwredsum_vs_i32m4_i64m1_m(...) __riscv_vwredsum_vs_i32m4_i64m1_tum(__VA_ARGS__)
22265
#define vwredsum_vs_i32m8_i64m1_m(...) __riscv_vwredsum_vs_i32m8_i64m1_tum(__VA_ARGS__)
22266
#define vwredsumu_vs_u8mf8_u16m1_m(...) __riscv_vwredsumu_vs_u8mf8_u16m1_tum(__VA_ARGS__)
22267
#define vwredsumu_vs_u8mf4_u16m1_m(...) __riscv_vwredsumu_vs_u8mf4_u16m1_tum(__VA_ARGS__)
22268
#define vwredsumu_vs_u8mf2_u16m1_m(...) __riscv_vwredsumu_vs_u8mf2_u16m1_tum(__VA_ARGS__)
22269
#define vwredsumu_vs_u8m1_u16m1_m(...) __riscv_vwredsumu_vs_u8m1_u16m1_tum(__VA_ARGS__)
22270
#define vwredsumu_vs_u8m2_u16m1_m(...) __riscv_vwredsumu_vs_u8m2_u16m1_tum(__VA_ARGS__)
22271
#define vwredsumu_vs_u8m4_u16m1_m(...) __riscv_vwredsumu_vs_u8m4_u16m1_tum(__VA_ARGS__)
22272
#define vwredsumu_vs_u8m8_u16m1_m(...) __riscv_vwredsumu_vs_u8m8_u16m1_tum(__VA_ARGS__)
22273
#define vwredsumu_vs_u16mf4_u32m1_m(...) __riscv_vwredsumu_vs_u16mf4_u32m1_tum(__VA_ARGS__)
22274
#define vwredsumu_vs_u16mf2_u32m1_m(...) __riscv_vwredsumu_vs_u16mf2_u32m1_tum(__VA_ARGS__)
22275
#define vwredsumu_vs_u16m1_u32m1_m(...) __riscv_vwredsumu_vs_u16m1_u32m1_tum(__VA_ARGS__)
22276
#define vwredsumu_vs_u16m2_u32m1_m(...) __riscv_vwredsumu_vs_u16m2_u32m1_tum(__VA_ARGS__)
22277
#define vwredsumu_vs_u16m4_u32m1_m(...) __riscv_vwredsumu_vs_u16m4_u32m1_tum(__VA_ARGS__)
22278
#define vwredsumu_vs_u16m8_u32m1_m(...) __riscv_vwredsumu_vs_u16m8_u32m1_tum(__VA_ARGS__)
22279
#define vwredsumu_vs_u32mf2_u64m1_m(...) __riscv_vwredsumu_vs_u32mf2_u64m1_tum(__VA_ARGS__)
22280
#define vwredsumu_vs_u32m1_u64m1_m(...) __riscv_vwredsumu_vs_u32m1_u64m1_tum(__VA_ARGS__)
22281
#define vwredsumu_vs_u32m2_u64m1_m(...) __riscv_vwredsumu_vs_u32m2_u64m1_tum(__VA_ARGS__)
22282
#define vwredsumu_vs_u32m4_u64m1_m(...) __riscv_vwredsumu_vs_u32m4_u64m1_tum(__VA_ARGS__)
22283
#define vwredsumu_vs_u32m8_u64m1_m(...) __riscv_vwredsumu_vs_u32m8_u64m1_tum(__VA_ARGS__)
22284
#define vfredosum_vs_f16mf4_f16m1(...) __riscv_vfredosum_vs_f16mf4_f16m1_tu(__VA_ARGS__)
22285
#define vfredosum_vs_f16mf2_f16m1(...) __riscv_vfredosum_vs_f16mf2_f16m1_tu(__VA_ARGS__)
22286
#define vfredosum_vs_f16m1_f16m1(...) __riscv_vfredosum_vs_f16m1_f16m1_tu(__VA_ARGS__)
22287
#define vfredosum_vs_f16m2_f16m1(...) __riscv_vfredosum_vs_f16m2_f16m1_tu(__VA_ARGS__)
22288
#define vfredosum_vs_f16m4_f16m1(...) __riscv_vfredosum_vs_f16m4_f16m1_tu(__VA_ARGS__)
22289
#define vfredosum_vs_f16m8_f16m1(...) __riscv_vfredosum_vs_f16m8_f16m1_tu(__VA_ARGS__)
22290
#define vfredosum_vs_f32mf2_f32m1(...) __riscv_vfredosum_vs_f32mf2_f32m1_tu(__VA_ARGS__)
22291
#define vfredosum_vs_f32m1_f32m1(...) __riscv_vfredosum_vs_f32m1_f32m1_tu(__VA_ARGS__)
22292
#define vfredosum_vs_f32m2_f32m1(...) __riscv_vfredosum_vs_f32m2_f32m1_tu(__VA_ARGS__)
22293
#define vfredosum_vs_f32m4_f32m1(...) __riscv_vfredosum_vs_f32m4_f32m1_tu(__VA_ARGS__)
22294
#define vfredosum_vs_f32m8_f32m1(...) __riscv_vfredosum_vs_f32m8_f32m1_tu(__VA_ARGS__)
22295
#define vfredosum_vs_f64m1_f64m1(...) __riscv_vfredosum_vs_f64m1_f64m1_tu(__VA_ARGS__)
22296
#define vfredosum_vs_f64m2_f64m1(...) __riscv_vfredosum_vs_f64m2_f64m1_tu(__VA_ARGS__)
22297
#define vfredosum_vs_f64m4_f64m1(...) __riscv_vfredosum_vs_f64m4_f64m1_tu(__VA_ARGS__)
22298
#define vfredosum_vs_f64m8_f64m1(...) __riscv_vfredosum_vs_f64m8_f64m1_tu(__VA_ARGS__)
22299
#define vfredusum_vs_f16mf4_f16m1(...) __riscv_vfredusum_vs_f16mf4_f16m1_tu(__VA_ARGS__)
22300
#define vfredusum_vs_f16mf2_f16m1(...) __riscv_vfredusum_vs_f16mf2_f16m1_tu(__VA_ARGS__)
22301
#define vfredusum_vs_f16m1_f16m1(...) __riscv_vfredusum_vs_f16m1_f16m1_tu(__VA_ARGS__)
22302
#define vfredusum_vs_f16m2_f16m1(...) __riscv_vfredusum_vs_f16m2_f16m1_tu(__VA_ARGS__)
22303
#define vfredusum_vs_f16m4_f16m1(...) __riscv_vfredusum_vs_f16m4_f16m1_tu(__VA_ARGS__)
22304
#define vfredusum_vs_f16m8_f16m1(...) __riscv_vfredusum_vs_f16m8_f16m1_tu(__VA_ARGS__)
22305
#define vfredusum_vs_f32mf2_f32m1(...) __riscv_vfredusum_vs_f32mf2_f32m1_tu(__VA_ARGS__)
22306
#define vfredusum_vs_f32m1_f32m1(...) __riscv_vfredusum_vs_f32m1_f32m1_tu(__VA_ARGS__)
22307
#define vfredusum_vs_f32m2_f32m1(...) __riscv_vfredusum_vs_f32m2_f32m1_tu(__VA_ARGS__)
22308
#define vfredusum_vs_f32m4_f32m1(...) __riscv_vfredusum_vs_f32m4_f32m1_tu(__VA_ARGS__)
22309
#define vfredusum_vs_f32m8_f32m1(...) __riscv_vfredusum_vs_f32m8_f32m1_tu(__VA_ARGS__)
22310
#define vfredusum_vs_f64m1_f64m1(...) __riscv_vfredusum_vs_f64m1_f64m1_tu(__VA_ARGS__)
22311
#define vfredusum_vs_f64m2_f64m1(...) __riscv_vfredusum_vs_f64m2_f64m1_tu(__VA_ARGS__)
22312
#define vfredusum_vs_f64m4_f64m1(...) __riscv_vfredusum_vs_f64m4_f64m1_tu(__VA_ARGS__)
22313
#define vfredusum_vs_f64m8_f64m1(...) __riscv_vfredusum_vs_f64m8_f64m1_tu(__VA_ARGS__)
22314
#define vfredmax_vs_f16mf4_f16m1(...) __riscv_vfredmax_vs_f16mf4_f16m1_tu(__VA_ARGS__)
22315
#define vfredmax_vs_f16mf2_f16m1(...) __riscv_vfredmax_vs_f16mf2_f16m1_tu(__VA_ARGS__)
22316
#define vfredmax_vs_f16m1_f16m1(...) __riscv_vfredmax_vs_f16m1_f16m1_tu(__VA_ARGS__)
22317
#define vfredmax_vs_f16m2_f16m1(...) __riscv_vfredmax_vs_f16m2_f16m1_tu(__VA_ARGS__)
22318
#define vfredmax_vs_f16m4_f16m1(...) __riscv_vfredmax_vs_f16m4_f16m1_tu(__VA_ARGS__)
22319
#define vfredmax_vs_f16m8_f16m1(...) __riscv_vfredmax_vs_f16m8_f16m1_tu(__VA_ARGS__)
22320
#define vfredmax_vs_f32mf2_f32m1(...) __riscv_vfredmax_vs_f32mf2_f32m1_tu(__VA_ARGS__)
22321
#define vfredmax_vs_f32m1_f32m1(...) __riscv_vfredmax_vs_f32m1_f32m1_tu(__VA_ARGS__)
22322
#define vfredmax_vs_f32m2_f32m1(...) __riscv_vfredmax_vs_f32m2_f32m1_tu(__VA_ARGS__)
22323
#define vfredmax_vs_f32m4_f32m1(...) __riscv_vfredmax_vs_f32m4_f32m1_tu(__VA_ARGS__)
22324
#define vfredmax_vs_f32m8_f32m1(...) __riscv_vfredmax_vs_f32m8_f32m1_tu(__VA_ARGS__)
22325
#define vfredmax_vs_f64m1_f64m1(...) __riscv_vfredmax_vs_f64m1_f64m1_tu(__VA_ARGS__)
22326
#define vfredmax_vs_f64m2_f64m1(...) __riscv_vfredmax_vs_f64m2_f64m1_tu(__VA_ARGS__)
22327
#define vfredmax_vs_f64m4_f64m1(...) __riscv_vfredmax_vs_f64m4_f64m1_tu(__VA_ARGS__)
22328
#define vfredmax_vs_f64m8_f64m1(...) __riscv_vfredmax_vs_f64m8_f64m1_tu(__VA_ARGS__)
22329
#define vfredmin_vs_f16mf4_f16m1(...) __riscv_vfredmin_vs_f16mf4_f16m1_tu(__VA_ARGS__)
22330
#define vfredmin_vs_f16mf2_f16m1(...) __riscv_vfredmin_vs_f16mf2_f16m1_tu(__VA_ARGS__)
22331
#define vfredmin_vs_f16m1_f16m1(...) __riscv_vfredmin_vs_f16m1_f16m1_tu(__VA_ARGS__)
22332
#define vfredmin_vs_f16m2_f16m1(...) __riscv_vfredmin_vs_f16m2_f16m1_tu(__VA_ARGS__)
22333
#define vfredmin_vs_f16m4_f16m1(...) __riscv_vfredmin_vs_f16m4_f16m1_tu(__VA_ARGS__)
22334
#define vfredmin_vs_f16m8_f16m1(...) __riscv_vfredmin_vs_f16m8_f16m1_tu(__VA_ARGS__)
22335
#define vfredmin_vs_f32mf2_f32m1(...) __riscv_vfredmin_vs_f32mf2_f32m1_tu(__VA_ARGS__)
22336
#define vfredmin_vs_f32m1_f32m1(...) __riscv_vfredmin_vs_f32m1_f32m1_tu(__VA_ARGS__)
22337
#define vfredmin_vs_f32m2_f32m1(...) __riscv_vfredmin_vs_f32m2_f32m1_tu(__VA_ARGS__)
22338
#define vfredmin_vs_f32m4_f32m1(...) __riscv_vfredmin_vs_f32m4_f32m1_tu(__VA_ARGS__)
22339
#define vfredmin_vs_f32m8_f32m1(...) __riscv_vfredmin_vs_f32m8_f32m1_tu(__VA_ARGS__)
22340
#define vfredmin_vs_f64m1_f64m1(...) __riscv_vfredmin_vs_f64m1_f64m1_tu(__VA_ARGS__)
22341
#define vfredmin_vs_f64m2_f64m1(...) __riscv_vfredmin_vs_f64m2_f64m1_tu(__VA_ARGS__)
22342
#define vfredmin_vs_f64m4_f64m1(...) __riscv_vfredmin_vs_f64m4_f64m1_tu(__VA_ARGS__)
22343
#define vfredmin_vs_f64m8_f64m1(...) __riscv_vfredmin_vs_f64m8_f64m1_tu(__VA_ARGS__)
22344
// masked functions
22345
#define vfredosum_vs_f16mf4_f16m1_m(...) __riscv_vfredosum_vs_f16mf4_f16m1_tum(__VA_ARGS__)
22346
#define vfredosum_vs_f16mf2_f16m1_m(...) __riscv_vfredosum_vs_f16mf2_f16m1_tum(__VA_ARGS__)
22347
#define vfredosum_vs_f16m1_f16m1_m(...) __riscv_vfredosum_vs_f16m1_f16m1_tum(__VA_ARGS__)
22348
#define vfredosum_vs_f16m2_f16m1_m(...) __riscv_vfredosum_vs_f16m2_f16m1_tum(__VA_ARGS__)
22349
#define vfredosum_vs_f16m4_f16m1_m(...) __riscv_vfredosum_vs_f16m4_f16m1_tum(__VA_ARGS__)
22350
#define vfredosum_vs_f16m8_f16m1_m(...) __riscv_vfredosum_vs_f16m8_f16m1_tum(__VA_ARGS__)
22351
#define vfredosum_vs_f32mf2_f32m1_m(...) __riscv_vfredosum_vs_f32mf2_f32m1_tum(__VA_ARGS__)
22352
#define vfredosum_vs_f32m1_f32m1_m(...) __riscv_vfredosum_vs_f32m1_f32m1_tum(__VA_ARGS__)
22353
#define vfredosum_vs_f32m2_f32m1_m(...) __riscv_vfredosum_vs_f32m2_f32m1_tum(__VA_ARGS__)
22354
#define vfredosum_vs_f32m4_f32m1_m(...) __riscv_vfredosum_vs_f32m4_f32m1_tum(__VA_ARGS__)
22355
#define vfredosum_vs_f32m8_f32m1_m(...) __riscv_vfredosum_vs_f32m8_f32m1_tum(__VA_ARGS__)
22356
#define vfredosum_vs_f64m1_f64m1_m(...) __riscv_vfredosum_vs_f64m1_f64m1_tum(__VA_ARGS__)
22357
#define vfredosum_vs_f64m2_f64m1_m(...) __riscv_vfredosum_vs_f64m2_f64m1_tum(__VA_ARGS__)
22358
#define vfredosum_vs_f64m4_f64m1_m(...) __riscv_vfredosum_vs_f64m4_f64m1_tum(__VA_ARGS__)
22359
#define vfredosum_vs_f64m8_f64m1_m(...) __riscv_vfredosum_vs_f64m8_f64m1_tum(__VA_ARGS__)
22360
#define vfredusum_vs_f16mf4_f16m1_m(...) __riscv_vfredusum_vs_f16mf4_f16m1_tum(__VA_ARGS__)
22361
#define vfredusum_vs_f16mf2_f16m1_m(...) __riscv_vfredusum_vs_f16mf2_f16m1_tum(__VA_ARGS__)
22362
#define vfredusum_vs_f16m1_f16m1_m(...) __riscv_vfredusum_vs_f16m1_f16m1_tum(__VA_ARGS__)
22363
#define vfredusum_vs_f16m2_f16m1_m(...) __riscv_vfredusum_vs_f16m2_f16m1_tum(__VA_ARGS__)
22364
#define vfredusum_vs_f16m4_f16m1_m(...) __riscv_vfredusum_vs_f16m4_f16m1_tum(__VA_ARGS__)
22365
#define vfredusum_vs_f16m8_f16m1_m(...) __riscv_vfredusum_vs_f16m8_f16m1_tum(__VA_ARGS__)
22366
#define vfredusum_vs_f32mf2_f32m1_m(...) __riscv_vfredusum_vs_f32mf2_f32m1_tum(__VA_ARGS__)
22367
#define vfredusum_vs_f32m1_f32m1_m(...) __riscv_vfredusum_vs_f32m1_f32m1_tum(__VA_ARGS__)
22368
#define vfredusum_vs_f32m2_f32m1_m(...) __riscv_vfredusum_vs_f32m2_f32m1_tum(__VA_ARGS__)
22369
#define vfredusum_vs_f32m4_f32m1_m(...) __riscv_vfredusum_vs_f32m4_f32m1_tum(__VA_ARGS__)
22370
#define vfredusum_vs_f32m8_f32m1_m(...) __riscv_vfredusum_vs_f32m8_f32m1_tum(__VA_ARGS__)
22371
#define vfredusum_vs_f64m1_f64m1_m(...) __riscv_vfredusum_vs_f64m1_f64m1_tum(__VA_ARGS__)
22372
#define vfredusum_vs_f64m2_f64m1_m(...) __riscv_vfredusum_vs_f64m2_f64m1_tum(__VA_ARGS__)
22373
#define vfredusum_vs_f64m4_f64m1_m(...) __riscv_vfredusum_vs_f64m4_f64m1_tum(__VA_ARGS__)
22374
#define vfredusum_vs_f64m8_f64m1_m(...) __riscv_vfredusum_vs_f64m8_f64m1_tum(__VA_ARGS__)
22375
#define vfredmax_vs_f16mf4_f16m1_m(...) __riscv_vfredmax_vs_f16mf4_f16m1_tum(__VA_ARGS__)
22376
#define vfredmax_vs_f16mf2_f16m1_m(...) __riscv_vfredmax_vs_f16mf2_f16m1_tum(__VA_ARGS__)
22377
#define vfredmax_vs_f16m1_f16m1_m(...) __riscv_vfredmax_vs_f16m1_f16m1_tum(__VA_ARGS__)
22378
#define vfredmax_vs_f16m2_f16m1_m(...) __riscv_vfredmax_vs_f16m2_f16m1_tum(__VA_ARGS__)
22379
#define vfredmax_vs_f16m4_f16m1_m(...) __riscv_vfredmax_vs_f16m4_f16m1_tum(__VA_ARGS__)
22380
#define vfredmax_vs_f16m8_f16m1_m(...) __riscv_vfredmax_vs_f16m8_f16m1_tum(__VA_ARGS__)
22381
#define vfredmax_vs_f32mf2_f32m1_m(...) __riscv_vfredmax_vs_f32mf2_f32m1_tum(__VA_ARGS__)
22382
#define vfredmax_vs_f32m1_f32m1_m(...) __riscv_vfredmax_vs_f32m1_f32m1_tum(__VA_ARGS__)
22383
#define vfredmax_vs_f32m2_f32m1_m(...) __riscv_vfredmax_vs_f32m2_f32m1_tum(__VA_ARGS__)
22384
#define vfredmax_vs_f32m4_f32m1_m(...) __riscv_vfredmax_vs_f32m4_f32m1_tum(__VA_ARGS__)
22385
#define vfredmax_vs_f32m8_f32m1_m(...) __riscv_vfredmax_vs_f32m8_f32m1_tum(__VA_ARGS__)
22386
#define vfredmax_vs_f64m1_f64m1_m(...) __riscv_vfredmax_vs_f64m1_f64m1_tum(__VA_ARGS__)
22387
#define vfredmax_vs_f64m2_f64m1_m(...) __riscv_vfredmax_vs_f64m2_f64m1_tum(__VA_ARGS__)
22388
#define vfredmax_vs_f64m4_f64m1_m(...) __riscv_vfredmax_vs_f64m4_f64m1_tum(__VA_ARGS__)
22389
#define vfredmax_vs_f64m8_f64m1_m(...) __riscv_vfredmax_vs_f64m8_f64m1_tum(__VA_ARGS__)
22390
#define vfredmin_vs_f16mf4_f16m1_m(...) __riscv_vfredmin_vs_f16mf4_f16m1_tum(__VA_ARGS__)
22391
#define vfredmin_vs_f16mf2_f16m1_m(...) __riscv_vfredmin_vs_f16mf2_f16m1_tum(__VA_ARGS__)
22392
#define vfredmin_vs_f16m1_f16m1_m(...) __riscv_vfredmin_vs_f16m1_f16m1_tum(__VA_ARGS__)
22393
#define vfredmin_vs_f16m2_f16m1_m(...) __riscv_vfredmin_vs_f16m2_f16m1_tum(__VA_ARGS__)
22394
#define vfredmin_vs_f16m4_f16m1_m(...) __riscv_vfredmin_vs_f16m4_f16m1_tum(__VA_ARGS__)
22395
#define vfredmin_vs_f16m8_f16m1_m(...) __riscv_vfredmin_vs_f16m8_f16m1_tum(__VA_ARGS__)
22396
#define vfredmin_vs_f32mf2_f32m1_m(...) __riscv_vfredmin_vs_f32mf2_f32m1_tum(__VA_ARGS__)
22397
#define vfredmin_vs_f32m1_f32m1_m(...) __riscv_vfredmin_vs_f32m1_f32m1_tum(__VA_ARGS__)
22398
#define vfredmin_vs_f32m2_f32m1_m(...) __riscv_vfredmin_vs_f32m2_f32m1_tum(__VA_ARGS__)
22399
#define vfredmin_vs_f32m4_f32m1_m(...) __riscv_vfredmin_vs_f32m4_f32m1_tum(__VA_ARGS__)
22400
#define vfredmin_vs_f32m8_f32m1_m(...) __riscv_vfredmin_vs_f32m8_f32m1_tum(__VA_ARGS__)
22401
#define vfredmin_vs_f64m1_f64m1_m(...) __riscv_vfredmin_vs_f64m1_f64m1_tum(__VA_ARGS__)
22402
#define vfredmin_vs_f64m2_f64m1_m(...) __riscv_vfredmin_vs_f64m2_f64m1_tum(__VA_ARGS__)
22403
#define vfredmin_vs_f64m4_f64m1_m(...) __riscv_vfredmin_vs_f64m4_f64m1_tum(__VA_ARGS__)
22404
#define vfredmin_vs_f64m8_f64m1_m(...) __riscv_vfredmin_vs_f64m8_f64m1_tum(__VA_ARGS__)
22405
#define vfwredosum_vs_f16mf4_f32m1(...) __riscv_vfwredosum_vs_f16mf4_f32m1_tu(__VA_ARGS__)
22406
#define vfwredosum_vs_f16mf2_f32m1(...) __riscv_vfwredosum_vs_f16mf2_f32m1_tu(__VA_ARGS__)
22407
#define vfwredosum_vs_f16m1_f32m1(...) __riscv_vfwredosum_vs_f16m1_f32m1_tu(__VA_ARGS__)
22408
#define vfwredosum_vs_f16m2_f32m1(...) __riscv_vfwredosum_vs_f16m2_f32m1_tu(__VA_ARGS__)
22409
#define vfwredosum_vs_f16m4_f32m1(...) __riscv_vfwredosum_vs_f16m4_f32m1_tu(__VA_ARGS__)
22410
#define vfwredosum_vs_f16m8_f32m1(...) __riscv_vfwredosum_vs_f16m8_f32m1_tu(__VA_ARGS__)
22411
#define vfwredosum_vs_f32mf2_f64m1(...) __riscv_vfwredosum_vs_f32mf2_f64m1_tu(__VA_ARGS__)
22412
#define vfwredosum_vs_f32m1_f64m1(...) __riscv_vfwredosum_vs_f32m1_f64m1_tu(__VA_ARGS__)
22413
#define vfwredosum_vs_f32m2_f64m1(...) __riscv_vfwredosum_vs_f32m2_f64m1_tu(__VA_ARGS__)
22414
#define vfwredosum_vs_f32m4_f64m1(...) __riscv_vfwredosum_vs_f32m4_f64m1_tu(__VA_ARGS__)
22415
#define vfwredosum_vs_f32m8_f64m1(...) __riscv_vfwredosum_vs_f32m8_f64m1_tu(__VA_ARGS__)
22416
#define vfwredusum_vs_f16mf4_f32m1(...) __riscv_vfwredusum_vs_f16mf4_f32m1_tu(__VA_ARGS__)
22417
#define vfwredusum_vs_f16mf2_f32m1(...) __riscv_vfwredusum_vs_f16mf2_f32m1_tu(__VA_ARGS__)
22418
#define vfwredusum_vs_f16m1_f32m1(...) __riscv_vfwredusum_vs_f16m1_f32m1_tu(__VA_ARGS__)
22419
#define vfwredusum_vs_f16m2_f32m1(...) __riscv_vfwredusum_vs_f16m2_f32m1_tu(__VA_ARGS__)
22420
#define vfwredusum_vs_f16m4_f32m1(...) __riscv_vfwredusum_vs_f16m4_f32m1_tu(__VA_ARGS__)
22421
#define vfwredusum_vs_f16m8_f32m1(...) __riscv_vfwredusum_vs_f16m8_f32m1_tu(__VA_ARGS__)
22422
#define vfwredusum_vs_f32mf2_f64m1(...) __riscv_vfwredusum_vs_f32mf2_f64m1_tu(__VA_ARGS__)
22423
#define vfwredusum_vs_f32m1_f64m1(...) __riscv_vfwredusum_vs_f32m1_f64m1_tu(__VA_ARGS__)
22424
#define vfwredusum_vs_f32m2_f64m1(...) __riscv_vfwredusum_vs_f32m2_f64m1_tu(__VA_ARGS__)
22425
#define vfwredusum_vs_f32m4_f64m1(...) __riscv_vfwredusum_vs_f32m4_f64m1_tu(__VA_ARGS__)
22426
#define vfwredusum_vs_f32m8_f64m1(...) __riscv_vfwredusum_vs_f32m8_f64m1_tu(__VA_ARGS__)
22427
// masked functions
22428
#define vfwredosum_vs_f16mf4_f32m1_m(...) __riscv_vfwredosum_vs_f16mf4_f32m1_tum(__VA_ARGS__)
22429
#define vfwredosum_vs_f16mf2_f32m1_m(...) __riscv_vfwredosum_vs_f16mf2_f32m1_tum(__VA_ARGS__)
22430
#define vfwredosum_vs_f16m1_f32m1_m(...) __riscv_vfwredosum_vs_f16m1_f32m1_tum(__VA_ARGS__)
22431
#define vfwredosum_vs_f16m2_f32m1_m(...) __riscv_vfwredosum_vs_f16m2_f32m1_tum(__VA_ARGS__)
22432
#define vfwredosum_vs_f16m4_f32m1_m(...) __riscv_vfwredosum_vs_f16m4_f32m1_tum(__VA_ARGS__)
22433
#define vfwredosum_vs_f16m8_f32m1_m(...) __riscv_vfwredosum_vs_f16m8_f32m1_tum(__VA_ARGS__)
22434
#define vfwredosum_vs_f32mf2_f64m1_m(...) __riscv_vfwredosum_vs_f32mf2_f64m1_tum(__VA_ARGS__)
22435
#define vfwredosum_vs_f32m1_f64m1_m(...) __riscv_vfwredosum_vs_f32m1_f64m1_tum(__VA_ARGS__)
22436
#define vfwredosum_vs_f32m2_f64m1_m(...) __riscv_vfwredosum_vs_f32m2_f64m1_tum(__VA_ARGS__)
22437
#define vfwredosum_vs_f32m4_f64m1_m(...) __riscv_vfwredosum_vs_f32m4_f64m1_tum(__VA_ARGS__)
22438
#define vfwredosum_vs_f32m8_f64m1_m(...) __riscv_vfwredosum_vs_f32m8_f64m1_tum(__VA_ARGS__)
22439
#define vfwredusum_vs_f16mf4_f32m1_m(...) __riscv_vfwredusum_vs_f16mf4_f32m1_tum(__VA_ARGS__)
22440
#define vfwredusum_vs_f16mf2_f32m1_m(...) __riscv_vfwredusum_vs_f16mf2_f32m1_tum(__VA_ARGS__)
22441
#define vfwredusum_vs_f16m1_f32m1_m(...) __riscv_vfwredusum_vs_f16m1_f32m1_tum(__VA_ARGS__)
22442
#define vfwredusum_vs_f16m2_f32m1_m(...) __riscv_vfwredusum_vs_f16m2_f32m1_tum(__VA_ARGS__)
22443
#define vfwredusum_vs_f16m4_f32m1_m(...) __riscv_vfwredusum_vs_f16m4_f32m1_tum(__VA_ARGS__)
22444
#define vfwredusum_vs_f16m8_f32m1_m(...) __riscv_vfwredusum_vs_f16m8_f32m1_tum(__VA_ARGS__)
22445
#define vfwredusum_vs_f32mf2_f64m1_m(...) __riscv_vfwredusum_vs_f32mf2_f64m1_tum(__VA_ARGS__)
22446
#define vfwredusum_vs_f32m1_f64m1_m(...) __riscv_vfwredusum_vs_f32m1_f64m1_tum(__VA_ARGS__)
22447
#define vfwredusum_vs_f32m2_f64m1_m(...) __riscv_vfwredusum_vs_f32m2_f64m1_tum(__VA_ARGS__)
22448
#define vfwredusum_vs_f32m4_f64m1_m(...) __riscv_vfwredusum_vs_f32m4_f64m1_tum(__VA_ARGS__)
22449
#define vfwredusum_vs_f32m8_f64m1_m(...) __riscv_vfwredusum_vs_f32m8_f64m1_tum(__VA_ARGS__)
22450
#define vlm_v_b1(...) __riscv_vlm_v_b1(__VA_ARGS__)
22451
#define vlm_v_b2(...) __riscv_vlm_v_b2(__VA_ARGS__)
22452
#define vlm_v_b4(...) __riscv_vlm_v_b4(__VA_ARGS__)
22453
#define vlm_v_b8(...) __riscv_vlm_v_b8(__VA_ARGS__)
22454
#define vlm_v_b16(...) __riscv_vlm_v_b16(__VA_ARGS__)
22455
#define vlm_v_b32(...) __riscv_vlm_v_b32(__VA_ARGS__)
22456
#define vlm_v_b64(...) __riscv_vlm_v_b64(__VA_ARGS__)
22457
#define vsm_v_b1(...) __riscv_vsm_v_b1(__VA_ARGS__)
22458
#define vsm_v_b2(...) __riscv_vsm_v_b2(__VA_ARGS__)
22459
#define vsm_v_b4(...) __riscv_vsm_v_b4(__VA_ARGS__)
22460
#define vsm_v_b8(...) __riscv_vsm_v_b8(__VA_ARGS__)
22461
#define vsm_v_b16(...) __riscv_vsm_v_b16(__VA_ARGS__)
22462
#define vsm_v_b32(...) __riscv_vsm_v_b32(__VA_ARGS__)
22463
#define vsm_v_b64(...) __riscv_vsm_v_b64(__VA_ARGS__)
22464
#define vmand_mm_b1(...) __riscv_vmand_mm_b1(__VA_ARGS__)
22465
#define vmand_mm_b2(...) __riscv_vmand_mm_b2(__VA_ARGS__)
22466
#define vmand_mm_b4(...) __riscv_vmand_mm_b4(__VA_ARGS__)
22467
#define vmand_mm_b8(...) __riscv_vmand_mm_b8(__VA_ARGS__)
22468
#define vmand_mm_b16(...) __riscv_vmand_mm_b16(__VA_ARGS__)
22469
#define vmand_mm_b32(...) __riscv_vmand_mm_b32(__VA_ARGS__)
22470
#define vmand_mm_b64(...) __riscv_vmand_mm_b64(__VA_ARGS__)
22471
#define vmnand_mm_b1(...) __riscv_vmnand_mm_b1(__VA_ARGS__)
22472
#define vmnand_mm_b2(...) __riscv_vmnand_mm_b2(__VA_ARGS__)
22473
#define vmnand_mm_b4(...) __riscv_vmnand_mm_b4(__VA_ARGS__)
22474
#define vmnand_mm_b8(...) __riscv_vmnand_mm_b8(__VA_ARGS__)
22475
#define vmnand_mm_b16(...) __riscv_vmnand_mm_b16(__VA_ARGS__)
22476
#define vmnand_mm_b32(...) __riscv_vmnand_mm_b32(__VA_ARGS__)
22477
#define vmnand_mm_b64(...) __riscv_vmnand_mm_b64(__VA_ARGS__)
22478
#define vmandn_mm_b1(...) __riscv_vmandn_mm_b1(__VA_ARGS__)
22479
#define vmandn_mm_b2(...) __riscv_vmandn_mm_b2(__VA_ARGS__)
22480
#define vmandn_mm_b4(...) __riscv_vmandn_mm_b4(__VA_ARGS__)
22481
#define vmandn_mm_b8(...) __riscv_vmandn_mm_b8(__VA_ARGS__)
22482
#define vmandn_mm_b16(...) __riscv_vmandn_mm_b16(__VA_ARGS__)
22483
#define vmandn_mm_b32(...) __riscv_vmandn_mm_b32(__VA_ARGS__)
22484
#define vmandn_mm_b64(...) __riscv_vmandn_mm_b64(__VA_ARGS__)
22485
#define vmxor_mm_b1(...) __riscv_vmxor_mm_b1(__VA_ARGS__)
22486
#define vmxor_mm_b2(...) __riscv_vmxor_mm_b2(__VA_ARGS__)
22487
#define vmxor_mm_b4(...) __riscv_vmxor_mm_b4(__VA_ARGS__)
22488
#define vmxor_mm_b8(...) __riscv_vmxor_mm_b8(__VA_ARGS__)
22489
#define vmxor_mm_b16(...) __riscv_vmxor_mm_b16(__VA_ARGS__)
22490
#define vmxor_mm_b32(...) __riscv_vmxor_mm_b32(__VA_ARGS__)
22491
#define vmxor_mm_b64(...) __riscv_vmxor_mm_b64(__VA_ARGS__)
22492
#define vmor_mm_b1(...) __riscv_vmor_mm_b1(__VA_ARGS__)
22493
#define vmor_mm_b2(...) __riscv_vmor_mm_b2(__VA_ARGS__)
22494
#define vmor_mm_b4(...) __riscv_vmor_mm_b4(__VA_ARGS__)
22495
#define vmor_mm_b8(...) __riscv_vmor_mm_b8(__VA_ARGS__)
22496
#define vmor_mm_b16(...) __riscv_vmor_mm_b16(__VA_ARGS__)
22497
#define vmor_mm_b32(...) __riscv_vmor_mm_b32(__VA_ARGS__)
22498
#define vmor_mm_b64(...) __riscv_vmor_mm_b64(__VA_ARGS__)
22499
#define vmnor_mm_b1(...) __riscv_vmnor_mm_b1(__VA_ARGS__)
22500
#define vmnor_mm_b2(...) __riscv_vmnor_mm_b2(__VA_ARGS__)
22501
#define vmnor_mm_b4(...) __riscv_vmnor_mm_b4(__VA_ARGS__)
22502
#define vmnor_mm_b8(...) __riscv_vmnor_mm_b8(__VA_ARGS__)
22503
#define vmnor_mm_b16(...) __riscv_vmnor_mm_b16(__VA_ARGS__)
22504
#define vmnor_mm_b32(...) __riscv_vmnor_mm_b32(__VA_ARGS__)
22505
#define vmnor_mm_b64(...) __riscv_vmnor_mm_b64(__VA_ARGS__)
22506
#define vmorn_mm_b1(...) __riscv_vmorn_mm_b1(__VA_ARGS__)
22507
#define vmorn_mm_b2(...) __riscv_vmorn_mm_b2(__VA_ARGS__)
22508
#define vmorn_mm_b4(...) __riscv_vmorn_mm_b4(__VA_ARGS__)
22509
#define vmorn_mm_b8(...) __riscv_vmorn_mm_b8(__VA_ARGS__)
22510
#define vmorn_mm_b16(...) __riscv_vmorn_mm_b16(__VA_ARGS__)
22511
#define vmorn_mm_b32(...) __riscv_vmorn_mm_b32(__VA_ARGS__)
22512
#define vmorn_mm_b64(...) __riscv_vmorn_mm_b64(__VA_ARGS__)
22513
#define vmxnor_mm_b1(...) __riscv_vmxnor_mm_b1(__VA_ARGS__)
22514
#define vmxnor_mm_b2(...) __riscv_vmxnor_mm_b2(__VA_ARGS__)
22515
#define vmxnor_mm_b4(...) __riscv_vmxnor_mm_b4(__VA_ARGS__)
22516
#define vmxnor_mm_b8(...) __riscv_vmxnor_mm_b8(__VA_ARGS__)
22517
#define vmxnor_mm_b16(...) __riscv_vmxnor_mm_b16(__VA_ARGS__)
22518
#define vmxnor_mm_b32(...) __riscv_vmxnor_mm_b32(__VA_ARGS__)
22519
#define vmxnor_mm_b64(...) __riscv_vmxnor_mm_b64(__VA_ARGS__)
22520
#define vmmv_m_b1(...) __riscv_vmmv_m_b1(__VA_ARGS__)
22521
#define vmmv_m_b2(...) __riscv_vmmv_m_b2(__VA_ARGS__)
22522
#define vmmv_m_b4(...) __riscv_vmmv_m_b4(__VA_ARGS__)
22523
#define vmmv_m_b8(...) __riscv_vmmv_m_b8(__VA_ARGS__)
22524
#define vmmv_m_b16(...) __riscv_vmmv_m_b16(__VA_ARGS__)
22525
#define vmmv_m_b32(...) __riscv_vmmv_m_b32(__VA_ARGS__)
22526
#define vmmv_m_b64(...) __riscv_vmmv_m_b64(__VA_ARGS__)
22527
#define vmclr_m_b1(...) __riscv_vmclr_m_b1(__VA_ARGS__)
22528
#define vmclr_m_b2(...) __riscv_vmclr_m_b2(__VA_ARGS__)
22529
#define vmclr_m_b4(...) __riscv_vmclr_m_b4(__VA_ARGS__)
22530
#define vmclr_m_b8(...) __riscv_vmclr_m_b8(__VA_ARGS__)
22531
#define vmclr_m_b16(...) __riscv_vmclr_m_b16(__VA_ARGS__)
22532
#define vmclr_m_b32(...) __riscv_vmclr_m_b32(__VA_ARGS__)
22533
#define vmclr_m_b64(...) __riscv_vmclr_m_b64(__VA_ARGS__)
22534
#define vmset_m_b1(...) __riscv_vmset_m_b1(__VA_ARGS__)
22535
#define vmset_m_b2(...) __riscv_vmset_m_b2(__VA_ARGS__)
22536
#define vmset_m_b4(...) __riscv_vmset_m_b4(__VA_ARGS__)
22537
#define vmset_m_b8(...) __riscv_vmset_m_b8(__VA_ARGS__)
22538
#define vmset_m_b16(...) __riscv_vmset_m_b16(__VA_ARGS__)
22539
#define vmset_m_b32(...) __riscv_vmset_m_b32(__VA_ARGS__)
22540
#define vmset_m_b64(...) __riscv_vmset_m_b64(__VA_ARGS__)
22541
#define vmnot_m_b1(...) __riscv_vmnot_m_b1(__VA_ARGS__)
22542
#define vmnot_m_b2(...) __riscv_vmnot_m_b2(__VA_ARGS__)
22543
#define vmnot_m_b4(...) __riscv_vmnot_m_b4(__VA_ARGS__)
22544
#define vmnot_m_b8(...) __riscv_vmnot_m_b8(__VA_ARGS__)
22545
#define vmnot_m_b16(...) __riscv_vmnot_m_b16(__VA_ARGS__)
22546
#define vmnot_m_b32(...) __riscv_vmnot_m_b32(__VA_ARGS__)
22547
#define vmnot_m_b64(...) __riscv_vmnot_m_b64(__VA_ARGS__)
22548
#define vcpop_m_b1(...) __riscv_vcpop_m_b1(__VA_ARGS__)
22549
#define vcpop_m_b2(...) __riscv_vcpop_m_b2(__VA_ARGS__)
22550
#define vcpop_m_b4(...) __riscv_vcpop_m_b4(__VA_ARGS__)
22551
#define vcpop_m_b8(...) __riscv_vcpop_m_b8(__VA_ARGS__)
22552
#define vcpop_m_b16(...) __riscv_vcpop_m_b16(__VA_ARGS__)
22553
#define vcpop_m_b32(...) __riscv_vcpop_m_b32(__VA_ARGS__)
22554
#define vcpop_m_b64(...) __riscv_vcpop_m_b64(__VA_ARGS__)
22555
// masked functions
22556
#define vcpop_m_b1_m(...) __riscv_vcpop_m_b1_m(__VA_ARGS__)
22557
#define vcpop_m_b2_m(...) __riscv_vcpop_m_b2_m(__VA_ARGS__)
22558
#define vcpop_m_b4_m(...) __riscv_vcpop_m_b4_m(__VA_ARGS__)
22559
#define vcpop_m_b8_m(...) __riscv_vcpop_m_b8_m(__VA_ARGS__)
22560
#define vcpop_m_b16_m(...) __riscv_vcpop_m_b16_m(__VA_ARGS__)
22561
#define vcpop_m_b32_m(...) __riscv_vcpop_m_b32_m(__VA_ARGS__)
22562
#define vcpop_m_b64_m(...) __riscv_vcpop_m_b64_m(__VA_ARGS__)
22563
#define vfirst_m_b1(...) __riscv_vfirst_m_b1(__VA_ARGS__)
22564
#define vfirst_m_b2(...) __riscv_vfirst_m_b2(__VA_ARGS__)
22565
#define vfirst_m_b4(...) __riscv_vfirst_m_b4(__VA_ARGS__)
22566
#define vfirst_m_b8(...) __riscv_vfirst_m_b8(__VA_ARGS__)
22567
#define vfirst_m_b16(...) __riscv_vfirst_m_b16(__VA_ARGS__)
22568
#define vfirst_m_b32(...) __riscv_vfirst_m_b32(__VA_ARGS__)
22569
#define vfirst_m_b64(...) __riscv_vfirst_m_b64(__VA_ARGS__)
22570
// masked functions
22571
#define vfirst_m_b1_m(...) __riscv_vfirst_m_b1_m(__VA_ARGS__)
22572
#define vfirst_m_b2_m(...) __riscv_vfirst_m_b2_m(__VA_ARGS__)
22573
#define vfirst_m_b4_m(...) __riscv_vfirst_m_b4_m(__VA_ARGS__)
22574
#define vfirst_m_b8_m(...) __riscv_vfirst_m_b8_m(__VA_ARGS__)
22575
#define vfirst_m_b16_m(...) __riscv_vfirst_m_b16_m(__VA_ARGS__)
22576
#define vfirst_m_b32_m(...) __riscv_vfirst_m_b32_m(__VA_ARGS__)
22577
#define vfirst_m_b64_m(...) __riscv_vfirst_m_b64_m(__VA_ARGS__)
22578
#define vmsbf_m_b1(...) __riscv_vmsbf_m_b1(__VA_ARGS__)
22579
#define vmsbf_m_b2(...) __riscv_vmsbf_m_b2(__VA_ARGS__)
22580
#define vmsbf_m_b4(...) __riscv_vmsbf_m_b4(__VA_ARGS__)
22581
#define vmsbf_m_b8(...) __riscv_vmsbf_m_b8(__VA_ARGS__)
22582
#define vmsbf_m_b16(...) __riscv_vmsbf_m_b16(__VA_ARGS__)
22583
#define vmsbf_m_b32(...) __riscv_vmsbf_m_b32(__VA_ARGS__)
22584
#define vmsbf_m_b64(...) __riscv_vmsbf_m_b64(__VA_ARGS__)
22585
// masked functions
22586
#define vmsbf_m_b1_m(...) __riscv_vmsbf_m_b1_mu(__VA_ARGS__)
22587
#define vmsbf_m_b2_m(...) __riscv_vmsbf_m_b2_mu(__VA_ARGS__)
22588
#define vmsbf_m_b4_m(...) __riscv_vmsbf_m_b4_mu(__VA_ARGS__)
22589
#define vmsbf_m_b8_m(...) __riscv_vmsbf_m_b8_mu(__VA_ARGS__)
22590
#define vmsbf_m_b16_m(...) __riscv_vmsbf_m_b16_mu(__VA_ARGS__)
22591
#define vmsbf_m_b32_m(...) __riscv_vmsbf_m_b32_mu(__VA_ARGS__)
22592
#define vmsbf_m_b64_m(...) __riscv_vmsbf_m_b64_mu(__VA_ARGS__)
22593
#define vmsif_m_b1(...) __riscv_vmsif_m_b1(__VA_ARGS__)
22594
#define vmsif_m_b2(...) __riscv_vmsif_m_b2(__VA_ARGS__)
22595
#define vmsif_m_b4(...) __riscv_vmsif_m_b4(__VA_ARGS__)
22596
#define vmsif_m_b8(...) __riscv_vmsif_m_b8(__VA_ARGS__)
22597
#define vmsif_m_b16(...) __riscv_vmsif_m_b16(__VA_ARGS__)
22598
#define vmsif_m_b32(...) __riscv_vmsif_m_b32(__VA_ARGS__)
22599
#define vmsif_m_b64(...) __riscv_vmsif_m_b64(__VA_ARGS__)
22600
// masked functions
22601
#define vmsif_m_b1_m(...) __riscv_vmsif_m_b1_mu(__VA_ARGS__)
22602
#define vmsif_m_b2_m(...) __riscv_vmsif_m_b2_mu(__VA_ARGS__)
22603
#define vmsif_m_b4_m(...) __riscv_vmsif_m_b4_mu(__VA_ARGS__)
22604
#define vmsif_m_b8_m(...) __riscv_vmsif_m_b8_mu(__VA_ARGS__)
22605
#define vmsif_m_b16_m(...) __riscv_vmsif_m_b16_mu(__VA_ARGS__)
22606
#define vmsif_m_b32_m(...) __riscv_vmsif_m_b32_mu(__VA_ARGS__)
22607
#define vmsif_m_b64_m(...) __riscv_vmsif_m_b64_mu(__VA_ARGS__)
22608
#define vmsof_m_b1(...) __riscv_vmsof_m_b1(__VA_ARGS__)
22609
#define vmsof_m_b2(...) __riscv_vmsof_m_b2(__VA_ARGS__)
22610
#define vmsof_m_b4(...) __riscv_vmsof_m_b4(__VA_ARGS__)
22611
#define vmsof_m_b8(...) __riscv_vmsof_m_b8(__VA_ARGS__)
22612
#define vmsof_m_b16(...) __riscv_vmsof_m_b16(__VA_ARGS__)
22613
#define vmsof_m_b32(...) __riscv_vmsof_m_b32(__VA_ARGS__)
22614
#define vmsof_m_b64(...) __riscv_vmsof_m_b64(__VA_ARGS__)
22615
// masked functions
22616
#define vmsof_m_b1_m(...) __riscv_vmsof_m_b1_mu(__VA_ARGS__)
22617
#define vmsof_m_b2_m(...) __riscv_vmsof_m_b2_mu(__VA_ARGS__)
22618
#define vmsof_m_b4_m(...) __riscv_vmsof_m_b4_mu(__VA_ARGS__)
22619
#define vmsof_m_b8_m(...) __riscv_vmsof_m_b8_mu(__VA_ARGS__)
22620
#define vmsof_m_b16_m(...) __riscv_vmsof_m_b16_mu(__VA_ARGS__)
22621
#define vmsof_m_b32_m(...) __riscv_vmsof_m_b32_mu(__VA_ARGS__)
22622
#define vmsof_m_b64_m(...) __riscv_vmsof_m_b64_mu(__VA_ARGS__)
22623
#define viota_m_u8mf8(...) __riscv_viota_m_u8mf8(__VA_ARGS__)
22624
#define viota_m_u8mf4(...) __riscv_viota_m_u8mf4(__VA_ARGS__)
22625
#define viota_m_u8mf2(...) __riscv_viota_m_u8mf2(__VA_ARGS__)
22626
#define viota_m_u8m1(...) __riscv_viota_m_u8m1(__VA_ARGS__)
22627
#define viota_m_u8m2(...) __riscv_viota_m_u8m2(__VA_ARGS__)
22628
#define viota_m_u8m4(...) __riscv_viota_m_u8m4(__VA_ARGS__)
22629
#define viota_m_u8m8(...) __riscv_viota_m_u8m8(__VA_ARGS__)
22630
#define viota_m_u16mf4(...) __riscv_viota_m_u16mf4(__VA_ARGS__)
22631
#define viota_m_u16mf2(...) __riscv_viota_m_u16mf2(__VA_ARGS__)
22632
#define viota_m_u16m1(...) __riscv_viota_m_u16m1(__VA_ARGS__)
22633
#define viota_m_u16m2(...) __riscv_viota_m_u16m2(__VA_ARGS__)
22634
#define viota_m_u16m4(...) __riscv_viota_m_u16m4(__VA_ARGS__)
22635
#define viota_m_u16m8(...) __riscv_viota_m_u16m8(__VA_ARGS__)
22636
#define viota_m_u32mf2(...) __riscv_viota_m_u32mf2(__VA_ARGS__)
22637
#define viota_m_u32m1(...) __riscv_viota_m_u32m1(__VA_ARGS__)
22638
#define viota_m_u32m2(...) __riscv_viota_m_u32m2(__VA_ARGS__)
22639
#define viota_m_u32m4(...) __riscv_viota_m_u32m4(__VA_ARGS__)
22640
#define viota_m_u32m8(...) __riscv_viota_m_u32m8(__VA_ARGS__)
22641
#define viota_m_u64m1(...) __riscv_viota_m_u64m1(__VA_ARGS__)
22642
#define viota_m_u64m2(...) __riscv_viota_m_u64m2(__VA_ARGS__)
22643
#define viota_m_u64m4(...) __riscv_viota_m_u64m4(__VA_ARGS__)
22644
#define viota_m_u64m8(...) __riscv_viota_m_u64m8(__VA_ARGS__)
22645
// masked functions
22646
#define viota_m_u8mf8_m(...) __riscv_viota_m_u8mf8_tumu(__VA_ARGS__)
22647
#define viota_m_u8mf4_m(...) __riscv_viota_m_u8mf4_tumu(__VA_ARGS__)
22648
#define viota_m_u8mf2_m(...) __riscv_viota_m_u8mf2_tumu(__VA_ARGS__)
22649
#define viota_m_u8m1_m(...) __riscv_viota_m_u8m1_tumu(__VA_ARGS__)
22650
#define viota_m_u8m2_m(...) __riscv_viota_m_u8m2_tumu(__VA_ARGS__)
22651
#define viota_m_u8m4_m(...) __riscv_viota_m_u8m4_tumu(__VA_ARGS__)
22652
#define viota_m_u8m8_m(...) __riscv_viota_m_u8m8_tumu(__VA_ARGS__)
22653
#define viota_m_u16mf4_m(...) __riscv_viota_m_u16mf4_tumu(__VA_ARGS__)
22654
#define viota_m_u16mf2_m(...) __riscv_viota_m_u16mf2_tumu(__VA_ARGS__)
22655
#define viota_m_u16m1_m(...) __riscv_viota_m_u16m1_tumu(__VA_ARGS__)
22656
#define viota_m_u16m2_m(...) __riscv_viota_m_u16m2_tumu(__VA_ARGS__)
22657
#define viota_m_u16m4_m(...) __riscv_viota_m_u16m4_tumu(__VA_ARGS__)
22658
#define viota_m_u16m8_m(...) __riscv_viota_m_u16m8_tumu(__VA_ARGS__)
22659
#define viota_m_u32mf2_m(...) __riscv_viota_m_u32mf2_tumu(__VA_ARGS__)
22660
#define viota_m_u32m1_m(...) __riscv_viota_m_u32m1_tumu(__VA_ARGS__)
22661
#define viota_m_u32m2_m(...) __riscv_viota_m_u32m2_tumu(__VA_ARGS__)
22662
#define viota_m_u32m4_m(...) __riscv_viota_m_u32m4_tumu(__VA_ARGS__)
22663
#define viota_m_u32m8_m(...) __riscv_viota_m_u32m8_tumu(__VA_ARGS__)
22664
#define viota_m_u64m1_m(...) __riscv_viota_m_u64m1_tumu(__VA_ARGS__)
22665
#define viota_m_u64m2_m(...) __riscv_viota_m_u64m2_tumu(__VA_ARGS__)
22666
#define viota_m_u64m4_m(...) __riscv_viota_m_u64m4_tumu(__VA_ARGS__)
22667
#define viota_m_u64m8_m(...) __riscv_viota_m_u64m8_tumu(__VA_ARGS__)
22668
#define vid_v_u8mf8(...) __riscv_vid_v_u8mf8(__VA_ARGS__)
22669
#define vid_v_u8mf4(...) __riscv_vid_v_u8mf4(__VA_ARGS__)
22670
#define vid_v_u8mf2(...) __riscv_vid_v_u8mf2(__VA_ARGS__)
22671
#define vid_v_u8m1(...) __riscv_vid_v_u8m1(__VA_ARGS__)
22672
#define vid_v_u8m2(...) __riscv_vid_v_u8m2(__VA_ARGS__)
22673
#define vid_v_u8m4(...) __riscv_vid_v_u8m4(__VA_ARGS__)
22674
#define vid_v_u8m8(...) __riscv_vid_v_u8m8(__VA_ARGS__)
22675
#define vid_v_u16mf4(...) __riscv_vid_v_u16mf4(__VA_ARGS__)
22676
#define vid_v_u16mf2(...) __riscv_vid_v_u16mf2(__VA_ARGS__)
22677
#define vid_v_u16m1(...) __riscv_vid_v_u16m1(__VA_ARGS__)
22678
#define vid_v_u16m2(...) __riscv_vid_v_u16m2(__VA_ARGS__)
22679
#define vid_v_u16m4(...) __riscv_vid_v_u16m4(__VA_ARGS__)
22680
#define vid_v_u16m8(...) __riscv_vid_v_u16m8(__VA_ARGS__)
22681
#define vid_v_u32mf2(...) __riscv_vid_v_u32mf2(__VA_ARGS__)
22682
#define vid_v_u32m1(...) __riscv_vid_v_u32m1(__VA_ARGS__)
22683
#define vid_v_u32m2(...) __riscv_vid_v_u32m2(__VA_ARGS__)
22684
#define vid_v_u32m4(...) __riscv_vid_v_u32m4(__VA_ARGS__)
22685
#define vid_v_u32m8(...) __riscv_vid_v_u32m8(__VA_ARGS__)
22686
#define vid_v_u64m1(...) __riscv_vid_v_u64m1(__VA_ARGS__)
22687
#define vid_v_u64m2(...) __riscv_vid_v_u64m2(__VA_ARGS__)
22688
#define vid_v_u64m4(...) __riscv_vid_v_u64m4(__VA_ARGS__)
22689
#define vid_v_u64m8(...) __riscv_vid_v_u64m8(__VA_ARGS__)
22690
// masked functions
22691
#define vid_v_u8mf8_m(...) __riscv_vid_v_u8mf8_tumu(__VA_ARGS__)
22692
#define vid_v_u8mf4_m(...) __riscv_vid_v_u8mf4_tumu(__VA_ARGS__)
22693
#define vid_v_u8mf2_m(...) __riscv_vid_v_u8mf2_tumu(__VA_ARGS__)
22694
#define vid_v_u8m1_m(...) __riscv_vid_v_u8m1_tumu(__VA_ARGS__)
22695
#define vid_v_u8m2_m(...) __riscv_vid_v_u8m2_tumu(__VA_ARGS__)
22696
#define vid_v_u8m4_m(...) __riscv_vid_v_u8m4_tumu(__VA_ARGS__)
22697
#define vid_v_u8m8_m(...) __riscv_vid_v_u8m8_tumu(__VA_ARGS__)
22698
#define vid_v_u16mf4_m(...) __riscv_vid_v_u16mf4_tumu(__VA_ARGS__)
22699
#define vid_v_u16mf2_m(...) __riscv_vid_v_u16mf2_tumu(__VA_ARGS__)
22700
#define vid_v_u16m1_m(...) __riscv_vid_v_u16m1_tumu(__VA_ARGS__)
22701
#define vid_v_u16m2_m(...) __riscv_vid_v_u16m2_tumu(__VA_ARGS__)
22702
#define vid_v_u16m4_m(...) __riscv_vid_v_u16m4_tumu(__VA_ARGS__)
22703
#define vid_v_u16m8_m(...) __riscv_vid_v_u16m8_tumu(__VA_ARGS__)
22704
#define vid_v_u32mf2_m(...) __riscv_vid_v_u32mf2_tumu(__VA_ARGS__)
22705
#define vid_v_u32m1_m(...) __riscv_vid_v_u32m1_tumu(__VA_ARGS__)
22706
#define vid_v_u32m2_m(...) __riscv_vid_v_u32m2_tumu(__VA_ARGS__)
22707
#define vid_v_u32m4_m(...) __riscv_vid_v_u32m4_tumu(__VA_ARGS__)
22708
#define vid_v_u32m8_m(...) __riscv_vid_v_u32m8_tumu(__VA_ARGS__)
22709
#define vid_v_u64m1_m(...) __riscv_vid_v_u64m1_tumu(__VA_ARGS__)
22710
#define vid_v_u64m2_m(...) __riscv_vid_v_u64m2_tumu(__VA_ARGS__)
22711
#define vid_v_u64m4_m(...) __riscv_vid_v_u64m4_tumu(__VA_ARGS__)
22712
#define vid_v_u64m8_m(...) __riscv_vid_v_u64m8_tumu(__VA_ARGS__)
22713
#define vfmv_f_s_f16mf4_f16(...) __riscv_vfmv_f_s_f16mf4_f16(__VA_ARGS__)
22714
#define vfmv_s_f_f16mf4(...) __riscv_vfmv_s_f_f16mf4_tu(__VA_ARGS__)
22715
#define vfmv_f_s_f16mf2_f16(...) __riscv_vfmv_f_s_f16mf2_f16(__VA_ARGS__)
22716
#define vfmv_s_f_f16mf2(...) __riscv_vfmv_s_f_f16mf2_tu(__VA_ARGS__)
22717
#define vfmv_f_s_f16m1_f16(...) __riscv_vfmv_f_s_f16m1_f16(__VA_ARGS__)
22718
#define vfmv_s_f_f16m1(...) __riscv_vfmv_s_f_f16m1_tu(__VA_ARGS__)
22719
#define vfmv_f_s_f16m2_f16(...) __riscv_vfmv_f_s_f16m2_f16(__VA_ARGS__)
22720
#define vfmv_s_f_f16m2(...) __riscv_vfmv_s_f_f16m2_tu(__VA_ARGS__)
22721
#define vfmv_f_s_f16m4_f16(...) __riscv_vfmv_f_s_f16m4_f16(__VA_ARGS__)
22722
#define vfmv_s_f_f16m4(...) __riscv_vfmv_s_f_f16m4_tu(__VA_ARGS__)
22723
#define vfmv_f_s_f16m8_f16(...) __riscv_vfmv_f_s_f16m8_f16(__VA_ARGS__)
22724
#define vfmv_s_f_f16m8(...) __riscv_vfmv_s_f_f16m8_tu(__VA_ARGS__)
22725
#define vfmv_f_s_f32mf2_f32(...) __riscv_vfmv_f_s_f32mf2_f32(__VA_ARGS__)
22726
#define vfmv_s_f_f32mf2(...) __riscv_vfmv_s_f_f32mf2_tu(__VA_ARGS__)
22727
#define vfmv_f_s_f32m1_f32(...) __riscv_vfmv_f_s_f32m1_f32(__VA_ARGS__)
22728
#define vfmv_s_f_f32m1(...) __riscv_vfmv_s_f_f32m1_tu(__VA_ARGS__)
22729
#define vfmv_f_s_f32m2_f32(...) __riscv_vfmv_f_s_f32m2_f32(__VA_ARGS__)
22730
#define vfmv_s_f_f32m2(...) __riscv_vfmv_s_f_f32m2_tu(__VA_ARGS__)
22731
#define vfmv_f_s_f32m4_f32(...) __riscv_vfmv_f_s_f32m4_f32(__VA_ARGS__)
22732
#define vfmv_s_f_f32m4(...) __riscv_vfmv_s_f_f32m4_tu(__VA_ARGS__)
22733
#define vfmv_f_s_f32m8_f32(...) __riscv_vfmv_f_s_f32m8_f32(__VA_ARGS__)
22734
#define vfmv_s_f_f32m8(...) __riscv_vfmv_s_f_f32m8_tu(__VA_ARGS__)
22735
#define vfmv_f_s_f64m1_f64(...) __riscv_vfmv_f_s_f64m1_f64(__VA_ARGS__)
22736
#define vfmv_s_f_f64m1(...) __riscv_vfmv_s_f_f64m1_tu(__VA_ARGS__)
22737
#define vfmv_f_s_f64m2_f64(...) __riscv_vfmv_f_s_f64m2_f64(__VA_ARGS__)
22738
#define vfmv_s_f_f64m2(...) __riscv_vfmv_s_f_f64m2_tu(__VA_ARGS__)
22739
#define vfmv_f_s_f64m4_f64(...) __riscv_vfmv_f_s_f64m4_f64(__VA_ARGS__)
22740
#define vfmv_s_f_f64m4(...) __riscv_vfmv_s_f_f64m4_tu(__VA_ARGS__)
22741
#define vfmv_f_s_f64m8_f64(...) __riscv_vfmv_f_s_f64m8_f64(__VA_ARGS__)
22742
#define vfmv_s_f_f64m8(...) __riscv_vfmv_s_f_f64m8_tu(__VA_ARGS__)
22743
#define vmv_x_s_i8mf8_i8(...) __riscv_vmv_x_s_i8mf8_i8(__VA_ARGS__)
22744
#define vmv_s_x_i8mf8(...) __riscv_vmv_s_x_i8mf8_tu(__VA_ARGS__)
22745
#define vmv_x_s_i8mf4_i8(...) __riscv_vmv_x_s_i8mf4_i8(__VA_ARGS__)
22746
#define vmv_s_x_i8mf4(...) __riscv_vmv_s_x_i8mf4_tu(__VA_ARGS__)
22747
#define vmv_x_s_i8mf2_i8(...) __riscv_vmv_x_s_i8mf2_i8(__VA_ARGS__)
22748
#define vmv_s_x_i8mf2(...) __riscv_vmv_s_x_i8mf2_tu(__VA_ARGS__)
22749
#define vmv_x_s_i8m1_i8(...) __riscv_vmv_x_s_i8m1_i8(__VA_ARGS__)
22750
#define vmv_s_x_i8m1(...) __riscv_vmv_s_x_i8m1_tu(__VA_ARGS__)
22751
#define vmv_x_s_i8m2_i8(...) __riscv_vmv_x_s_i8m2_i8(__VA_ARGS__)
22752
#define vmv_s_x_i8m2(...) __riscv_vmv_s_x_i8m2_tu(__VA_ARGS__)
22753
#define vmv_x_s_i8m4_i8(...) __riscv_vmv_x_s_i8m4_i8(__VA_ARGS__)
22754
#define vmv_s_x_i8m4(...) __riscv_vmv_s_x_i8m4_tu(__VA_ARGS__)
22755
#define vmv_x_s_i8m8_i8(...) __riscv_vmv_x_s_i8m8_i8(__VA_ARGS__)
22756
#define vmv_s_x_i8m8(...) __riscv_vmv_s_x_i8m8_tu(__VA_ARGS__)
22757
#define vmv_x_s_i16mf4_i16(...) __riscv_vmv_x_s_i16mf4_i16(__VA_ARGS__)
22758
#define vmv_s_x_i16mf4(...) __riscv_vmv_s_x_i16mf4_tu(__VA_ARGS__)
22759
#define vmv_x_s_i16mf2_i16(...) __riscv_vmv_x_s_i16mf2_i16(__VA_ARGS__)
22760
#define vmv_s_x_i16mf2(...) __riscv_vmv_s_x_i16mf2_tu(__VA_ARGS__)
22761
#define vmv_x_s_i16m1_i16(...) __riscv_vmv_x_s_i16m1_i16(__VA_ARGS__)
22762
#define vmv_s_x_i16m1(...) __riscv_vmv_s_x_i16m1_tu(__VA_ARGS__)
22763
#define vmv_x_s_i16m2_i16(...) __riscv_vmv_x_s_i16m2_i16(__VA_ARGS__)
22764
#define vmv_s_x_i16m2(...) __riscv_vmv_s_x_i16m2_tu(__VA_ARGS__)
22765
#define vmv_x_s_i16m4_i16(...) __riscv_vmv_x_s_i16m4_i16(__VA_ARGS__)
22766
#define vmv_s_x_i16m4(...) __riscv_vmv_s_x_i16m4_tu(__VA_ARGS__)
22767
#define vmv_x_s_i16m8_i16(...) __riscv_vmv_x_s_i16m8_i16(__VA_ARGS__)
22768
#define vmv_s_x_i16m8(...) __riscv_vmv_s_x_i16m8_tu(__VA_ARGS__)
22769
#define vmv_x_s_i32mf2_i32(...) __riscv_vmv_x_s_i32mf2_i32(__VA_ARGS__)
22770
#define vmv_s_x_i32mf2(...) __riscv_vmv_s_x_i32mf2_tu(__VA_ARGS__)
22771
#define vmv_x_s_i32m1_i32(...) __riscv_vmv_x_s_i32m1_i32(__VA_ARGS__)
22772
#define vmv_s_x_i32m1(...) __riscv_vmv_s_x_i32m1_tu(__VA_ARGS__)
22773
#define vmv_x_s_i32m2_i32(...) __riscv_vmv_x_s_i32m2_i32(__VA_ARGS__)
22774
#define vmv_s_x_i32m2(...) __riscv_vmv_s_x_i32m2_tu(__VA_ARGS__)
22775
#define vmv_x_s_i32m4_i32(...) __riscv_vmv_x_s_i32m4_i32(__VA_ARGS__)
22776
#define vmv_s_x_i32m4(...) __riscv_vmv_s_x_i32m4_tu(__VA_ARGS__)
22777
#define vmv_x_s_i32m8_i32(...) __riscv_vmv_x_s_i32m8_i32(__VA_ARGS__)
22778
#define vmv_s_x_i32m8(...) __riscv_vmv_s_x_i32m8_tu(__VA_ARGS__)
22779
#define vmv_x_s_i64m1_i64(...) __riscv_vmv_x_s_i64m1_i64(__VA_ARGS__)
22780
#define vmv_s_x_i64m1(...) __riscv_vmv_s_x_i64m1_tu(__VA_ARGS__)
22781
#define vmv_x_s_i64m2_i64(...) __riscv_vmv_x_s_i64m2_i64(__VA_ARGS__)
22782
#define vmv_s_x_i64m2(...) __riscv_vmv_s_x_i64m2_tu(__VA_ARGS__)
22783
#define vmv_x_s_i64m4_i64(...) __riscv_vmv_x_s_i64m4_i64(__VA_ARGS__)
22784
#define vmv_s_x_i64m4(...) __riscv_vmv_s_x_i64m4_tu(__VA_ARGS__)
22785
#define vmv_x_s_i64m8_i64(...) __riscv_vmv_x_s_i64m8_i64(__VA_ARGS__)
22786
#define vmv_s_x_i64m8(...) __riscv_vmv_s_x_i64m8_tu(__VA_ARGS__)
22787
#define vmv_x_s_u8mf8_u8(...) __riscv_vmv_x_s_u8mf8_u8(__VA_ARGS__)
22788
#define vmv_s_x_u8mf8(...) __riscv_vmv_s_x_u8mf8_tu(__VA_ARGS__)
22789
#define vmv_x_s_u8mf4_u8(...) __riscv_vmv_x_s_u8mf4_u8(__VA_ARGS__)
22790
#define vmv_s_x_u8mf4(...) __riscv_vmv_s_x_u8mf4_tu(__VA_ARGS__)
22791
#define vmv_x_s_u8mf2_u8(...) __riscv_vmv_x_s_u8mf2_u8(__VA_ARGS__)
22792
#define vmv_s_x_u8mf2(...) __riscv_vmv_s_x_u8mf2_tu(__VA_ARGS__)
22793
#define vmv_x_s_u8m1_u8(...) __riscv_vmv_x_s_u8m1_u8(__VA_ARGS__)
22794
#define vmv_s_x_u8m1(...) __riscv_vmv_s_x_u8m1_tu(__VA_ARGS__)
22795
#define vmv_x_s_u8m2_u8(...) __riscv_vmv_x_s_u8m2_u8(__VA_ARGS__)
22796
#define vmv_s_x_u8m2(...) __riscv_vmv_s_x_u8m2_tu(__VA_ARGS__)
22797
#define vmv_x_s_u8m4_u8(...) __riscv_vmv_x_s_u8m4_u8(__VA_ARGS__)
22798
#define vmv_s_x_u8m4(...) __riscv_vmv_s_x_u8m4_tu(__VA_ARGS__)
22799
#define vmv_x_s_u8m8_u8(...) __riscv_vmv_x_s_u8m8_u8(__VA_ARGS__)
22800
#define vmv_s_x_u8m8(...) __riscv_vmv_s_x_u8m8_tu(__VA_ARGS__)
22801
#define vmv_x_s_u16mf4_u16(...) __riscv_vmv_x_s_u16mf4_u16(__VA_ARGS__)
22802
#define vmv_s_x_u16mf4(...) __riscv_vmv_s_x_u16mf4_tu(__VA_ARGS__)
22803
#define vmv_x_s_u16mf2_u16(...) __riscv_vmv_x_s_u16mf2_u16(__VA_ARGS__)
22804
#define vmv_s_x_u16mf2(...) __riscv_vmv_s_x_u16mf2_tu(__VA_ARGS__)
22805
#define vmv_x_s_u16m1_u16(...) __riscv_vmv_x_s_u16m1_u16(__VA_ARGS__)
22806
#define vmv_s_x_u16m1(...) __riscv_vmv_s_x_u16m1_tu(__VA_ARGS__)
22807
#define vmv_x_s_u16m2_u16(...) __riscv_vmv_x_s_u16m2_u16(__VA_ARGS__)
22808
#define vmv_s_x_u16m2(...) __riscv_vmv_s_x_u16m2_tu(__VA_ARGS__)
22809
#define vmv_x_s_u16m4_u16(...) __riscv_vmv_x_s_u16m4_u16(__VA_ARGS__)
22810
#define vmv_s_x_u16m4(...) __riscv_vmv_s_x_u16m4_tu(__VA_ARGS__)
22811
#define vmv_x_s_u16m8_u16(...) __riscv_vmv_x_s_u16m8_u16(__VA_ARGS__)
22812
#define vmv_s_x_u16m8(...) __riscv_vmv_s_x_u16m8_tu(__VA_ARGS__)
22813
#define vmv_x_s_u32mf2_u32(...) __riscv_vmv_x_s_u32mf2_u32(__VA_ARGS__)
22814
#define vmv_s_x_u32mf2(...) __riscv_vmv_s_x_u32mf2_tu(__VA_ARGS__)
22815
#define vmv_x_s_u32m1_u32(...) __riscv_vmv_x_s_u32m1_u32(__VA_ARGS__)
22816
#define vmv_s_x_u32m1(...) __riscv_vmv_s_x_u32m1_tu(__VA_ARGS__)
22817
#define vmv_x_s_u32m2_u32(...) __riscv_vmv_x_s_u32m2_u32(__VA_ARGS__)
22818
#define vmv_s_x_u32m2(...) __riscv_vmv_s_x_u32m2_tu(__VA_ARGS__)
22819
#define vmv_x_s_u32m4_u32(...) __riscv_vmv_x_s_u32m4_u32(__VA_ARGS__)
22820
#define vmv_s_x_u32m4(...) __riscv_vmv_s_x_u32m4_tu(__VA_ARGS__)
22821
#define vmv_x_s_u32m8_u32(...) __riscv_vmv_x_s_u32m8_u32(__VA_ARGS__)
22822
#define vmv_s_x_u32m8(...) __riscv_vmv_s_x_u32m8_tu(__VA_ARGS__)
22823
#define vmv_x_s_u64m1_u64(...) __riscv_vmv_x_s_u64m1_u64(__VA_ARGS__)
22824
#define vmv_s_x_u64m1(...) __riscv_vmv_s_x_u64m1_tu(__VA_ARGS__)
22825
#define vmv_x_s_u64m2_u64(...) __riscv_vmv_x_s_u64m2_u64(__VA_ARGS__)
22826
#define vmv_s_x_u64m2(...) __riscv_vmv_s_x_u64m2_tu(__VA_ARGS__)
22827
#define vmv_x_s_u64m4_u64(...) __riscv_vmv_x_s_u64m4_u64(__VA_ARGS__)
22828
#define vmv_s_x_u64m4(...) __riscv_vmv_s_x_u64m4_tu(__VA_ARGS__)
22829
#define vmv_x_s_u64m8_u64(...) __riscv_vmv_x_s_u64m8_u64(__VA_ARGS__)
22830
#define vmv_s_x_u64m8(...) __riscv_vmv_s_x_u64m8_tu(__VA_ARGS__)
22831
#define vslideup_vx_f16mf4(...) __riscv_vslideup_vx_f16mf4_tu(__VA_ARGS__)
22832
#define vslideup_vx_f16mf2(...) __riscv_vslideup_vx_f16mf2_tu(__VA_ARGS__)
22833
#define vslideup_vx_f16m1(...) __riscv_vslideup_vx_f16m1_tu(__VA_ARGS__)
22834
#define vslideup_vx_f16m2(...) __riscv_vslideup_vx_f16m2_tu(__VA_ARGS__)
22835
#define vslideup_vx_f16m4(...) __riscv_vslideup_vx_f16m4_tu(__VA_ARGS__)
22836
#define vslideup_vx_f16m8(...) __riscv_vslideup_vx_f16m8_tu(__VA_ARGS__)
22837
#define vslideup_vx_f32mf2(...) __riscv_vslideup_vx_f32mf2_tu(__VA_ARGS__)
22838
#define vslideup_vx_f32m1(...) __riscv_vslideup_vx_f32m1_tu(__VA_ARGS__)
22839
#define vslideup_vx_f32m2(...) __riscv_vslideup_vx_f32m2_tu(__VA_ARGS__)
22840
#define vslideup_vx_f32m4(...) __riscv_vslideup_vx_f32m4_tu(__VA_ARGS__)
22841
#define vslideup_vx_f32m8(...) __riscv_vslideup_vx_f32m8_tu(__VA_ARGS__)
22842
#define vslideup_vx_f64m1(...) __riscv_vslideup_vx_f64m1_tu(__VA_ARGS__)
22843
#define vslideup_vx_f64m2(...) __riscv_vslideup_vx_f64m2_tu(__VA_ARGS__)
22844
#define vslideup_vx_f64m4(...) __riscv_vslideup_vx_f64m4_tu(__VA_ARGS__)
22845
#define vslideup_vx_f64m8(...) __riscv_vslideup_vx_f64m8_tu(__VA_ARGS__)
22846
#define vslideup_vx_i8mf8(...) __riscv_vslideup_vx_i8mf8_tu(__VA_ARGS__)
22847
#define vslideup_vx_i8mf4(...) __riscv_vslideup_vx_i8mf4_tu(__VA_ARGS__)
22848
#define vslideup_vx_i8mf2(...) __riscv_vslideup_vx_i8mf2_tu(__VA_ARGS__)
22849
#define vslideup_vx_i8m1(...) __riscv_vslideup_vx_i8m1_tu(__VA_ARGS__)
22850
#define vslideup_vx_i8m2(...) __riscv_vslideup_vx_i8m2_tu(__VA_ARGS__)
22851
#define vslideup_vx_i8m4(...) __riscv_vslideup_vx_i8m4_tu(__VA_ARGS__)
22852
#define vslideup_vx_i8m8(...) __riscv_vslideup_vx_i8m8_tu(__VA_ARGS__)
22853
#define vslideup_vx_i16mf4(...) __riscv_vslideup_vx_i16mf4_tu(__VA_ARGS__)
22854
#define vslideup_vx_i16mf2(...) __riscv_vslideup_vx_i16mf2_tu(__VA_ARGS__)
22855
#define vslideup_vx_i16m1(...) __riscv_vslideup_vx_i16m1_tu(__VA_ARGS__)
22856
#define vslideup_vx_i16m2(...) __riscv_vslideup_vx_i16m2_tu(__VA_ARGS__)
22857
#define vslideup_vx_i16m4(...) __riscv_vslideup_vx_i16m4_tu(__VA_ARGS__)
22858
#define vslideup_vx_i16m8(...) __riscv_vslideup_vx_i16m8_tu(__VA_ARGS__)
22859
#define vslideup_vx_i32mf2(...) __riscv_vslideup_vx_i32mf2_tu(__VA_ARGS__)
22860
#define vslideup_vx_i32m1(...) __riscv_vslideup_vx_i32m1_tu(__VA_ARGS__)
22861
#define vslideup_vx_i32m2(...) __riscv_vslideup_vx_i32m2_tu(__VA_ARGS__)
22862
#define vslideup_vx_i32m4(...) __riscv_vslideup_vx_i32m4_tu(__VA_ARGS__)
22863
#define vslideup_vx_i32m8(...) __riscv_vslideup_vx_i32m8_tu(__VA_ARGS__)
22864
#define vslideup_vx_i64m1(...) __riscv_vslideup_vx_i64m1_tu(__VA_ARGS__)
22865
#define vslideup_vx_i64m2(...) __riscv_vslideup_vx_i64m2_tu(__VA_ARGS__)
22866
#define vslideup_vx_i64m4(...) __riscv_vslideup_vx_i64m4_tu(__VA_ARGS__)
22867
#define vslideup_vx_i64m8(...) __riscv_vslideup_vx_i64m8_tu(__VA_ARGS__)
22868
#define vslideup_vx_u8mf8(...) __riscv_vslideup_vx_u8mf8_tu(__VA_ARGS__)
22869
#define vslideup_vx_u8mf4(...) __riscv_vslideup_vx_u8mf4_tu(__VA_ARGS__)
22870
#define vslideup_vx_u8mf2(...) __riscv_vslideup_vx_u8mf2_tu(__VA_ARGS__)
22871
#define vslideup_vx_u8m1(...) __riscv_vslideup_vx_u8m1_tu(__VA_ARGS__)
22872
#define vslideup_vx_u8m2(...) __riscv_vslideup_vx_u8m2_tu(__VA_ARGS__)
22873
#define vslideup_vx_u8m4(...) __riscv_vslideup_vx_u8m4_tu(__VA_ARGS__)
22874
#define vslideup_vx_u8m8(...) __riscv_vslideup_vx_u8m8_tu(__VA_ARGS__)
22875
#define vslideup_vx_u16mf4(...) __riscv_vslideup_vx_u16mf4_tu(__VA_ARGS__)
22876
#define vslideup_vx_u16mf2(...) __riscv_vslideup_vx_u16mf2_tu(__VA_ARGS__)
22877
#define vslideup_vx_u16m1(...) __riscv_vslideup_vx_u16m1_tu(__VA_ARGS__)
22878
#define vslideup_vx_u16m2(...) __riscv_vslideup_vx_u16m2_tu(__VA_ARGS__)
22879
#define vslideup_vx_u16m4(...) __riscv_vslideup_vx_u16m4_tu(__VA_ARGS__)
22880
#define vslideup_vx_u16m8(...) __riscv_vslideup_vx_u16m8_tu(__VA_ARGS__)
22881
#define vslideup_vx_u32mf2(...) __riscv_vslideup_vx_u32mf2_tu(__VA_ARGS__)
22882
#define vslideup_vx_u32m1(...) __riscv_vslideup_vx_u32m1_tu(__VA_ARGS__)
22883
#define vslideup_vx_u32m2(...) __riscv_vslideup_vx_u32m2_tu(__VA_ARGS__)
22884
#define vslideup_vx_u32m4(...) __riscv_vslideup_vx_u32m4_tu(__VA_ARGS__)
22885
#define vslideup_vx_u32m8(...) __riscv_vslideup_vx_u32m8_tu(__VA_ARGS__)
22886
#define vslideup_vx_u64m1(...) __riscv_vslideup_vx_u64m1_tu(__VA_ARGS__)
22887
#define vslideup_vx_u64m2(...) __riscv_vslideup_vx_u64m2_tu(__VA_ARGS__)
22888
#define vslideup_vx_u64m4(...) __riscv_vslideup_vx_u64m4_tu(__VA_ARGS__)
22889
#define vslideup_vx_u64m8(...) __riscv_vslideup_vx_u64m8_tu(__VA_ARGS__)
22890
// masked functions
22891
#define vslideup_vx_f16mf4_m(...) __riscv_vslideup_vx_f16mf4_tumu(__VA_ARGS__)
22892
#define vslideup_vx_f16mf2_m(...) __riscv_vslideup_vx_f16mf2_tumu(__VA_ARGS__)
22893
#define vslideup_vx_f16m1_m(...) __riscv_vslideup_vx_f16m1_tumu(__VA_ARGS__)
22894
#define vslideup_vx_f16m2_m(...) __riscv_vslideup_vx_f16m2_tumu(__VA_ARGS__)
22895
#define vslideup_vx_f16m4_m(...) __riscv_vslideup_vx_f16m4_tumu(__VA_ARGS__)
22896
#define vslideup_vx_f16m8_m(...) __riscv_vslideup_vx_f16m8_tumu(__VA_ARGS__)
22897
#define vslideup_vx_f32mf2_m(...) __riscv_vslideup_vx_f32mf2_tumu(__VA_ARGS__)
22898
#define vslideup_vx_f32m1_m(...) __riscv_vslideup_vx_f32m1_tumu(__VA_ARGS__)
22899
#define vslideup_vx_f32m2_m(...) __riscv_vslideup_vx_f32m2_tumu(__VA_ARGS__)
22900
#define vslideup_vx_f32m4_m(...) __riscv_vslideup_vx_f32m4_tumu(__VA_ARGS__)
22901
#define vslideup_vx_f32m8_m(...) __riscv_vslideup_vx_f32m8_tumu(__VA_ARGS__)
22902
#define vslideup_vx_f64m1_m(...) __riscv_vslideup_vx_f64m1_tumu(__VA_ARGS__)
22903
#define vslideup_vx_f64m2_m(...) __riscv_vslideup_vx_f64m2_tumu(__VA_ARGS__)
22904
#define vslideup_vx_f64m4_m(...) __riscv_vslideup_vx_f64m4_tumu(__VA_ARGS__)
22905
#define vslideup_vx_f64m8_m(...) __riscv_vslideup_vx_f64m8_tumu(__VA_ARGS__)
22906
#define vslideup_vx_i8mf8_m(...) __riscv_vslideup_vx_i8mf8_tumu(__VA_ARGS__)
22907
#define vslideup_vx_i8mf4_m(...) __riscv_vslideup_vx_i8mf4_tumu(__VA_ARGS__)
22908
#define vslideup_vx_i8mf2_m(...) __riscv_vslideup_vx_i8mf2_tumu(__VA_ARGS__)
22909
#define vslideup_vx_i8m1_m(...) __riscv_vslideup_vx_i8m1_tumu(__VA_ARGS__)
22910
#define vslideup_vx_i8m2_m(...) __riscv_vslideup_vx_i8m2_tumu(__VA_ARGS__)
22911
#define vslideup_vx_i8m4_m(...) __riscv_vslideup_vx_i8m4_tumu(__VA_ARGS__)
22912
#define vslideup_vx_i8m8_m(...) __riscv_vslideup_vx_i8m8_tumu(__VA_ARGS__)
22913
#define vslideup_vx_i16mf4_m(...) __riscv_vslideup_vx_i16mf4_tumu(__VA_ARGS__)
22914
#define vslideup_vx_i16mf2_m(...) __riscv_vslideup_vx_i16mf2_tumu(__VA_ARGS__)
22915
#define vslideup_vx_i16m1_m(...) __riscv_vslideup_vx_i16m1_tumu(__VA_ARGS__)
22916
#define vslideup_vx_i16m2_m(...) __riscv_vslideup_vx_i16m2_tumu(__VA_ARGS__)
22917
#define vslideup_vx_i16m4_m(...) __riscv_vslideup_vx_i16m4_tumu(__VA_ARGS__)
22918
#define vslideup_vx_i16m8_m(...) __riscv_vslideup_vx_i16m8_tumu(__VA_ARGS__)
22919
#define vslideup_vx_i32mf2_m(...) __riscv_vslideup_vx_i32mf2_tumu(__VA_ARGS__)
22920
#define vslideup_vx_i32m1_m(...) __riscv_vslideup_vx_i32m1_tumu(__VA_ARGS__)
22921
#define vslideup_vx_i32m2_m(...) __riscv_vslideup_vx_i32m2_tumu(__VA_ARGS__)
22922
#define vslideup_vx_i32m4_m(...) __riscv_vslideup_vx_i32m4_tumu(__VA_ARGS__)
22923
#define vslideup_vx_i32m8_m(...) __riscv_vslideup_vx_i32m8_tumu(__VA_ARGS__)
22924
#define vslideup_vx_i64m1_m(...) __riscv_vslideup_vx_i64m1_tumu(__VA_ARGS__)
22925
#define vslideup_vx_i64m2_m(...) __riscv_vslideup_vx_i64m2_tumu(__VA_ARGS__)
22926
#define vslideup_vx_i64m4_m(...) __riscv_vslideup_vx_i64m4_tumu(__VA_ARGS__)
22927
#define vslideup_vx_i64m8_m(...) __riscv_vslideup_vx_i64m8_tumu(__VA_ARGS__)
22928
#define vslideup_vx_u8mf8_m(...) __riscv_vslideup_vx_u8mf8_tumu(__VA_ARGS__)
22929
#define vslideup_vx_u8mf4_m(...) __riscv_vslideup_vx_u8mf4_tumu(__VA_ARGS__)
22930
#define vslideup_vx_u8mf2_m(...) __riscv_vslideup_vx_u8mf2_tumu(__VA_ARGS__)
22931
#define vslideup_vx_u8m1_m(...) __riscv_vslideup_vx_u8m1_tumu(__VA_ARGS__)
22932
#define vslideup_vx_u8m2_m(...) __riscv_vslideup_vx_u8m2_tumu(__VA_ARGS__)
22933
#define vslideup_vx_u8m4_m(...) __riscv_vslideup_vx_u8m4_tumu(__VA_ARGS__)
22934
#define vslideup_vx_u8m8_m(...) __riscv_vslideup_vx_u8m8_tumu(__VA_ARGS__)
22935
#define vslideup_vx_u16mf4_m(...) __riscv_vslideup_vx_u16mf4_tumu(__VA_ARGS__)
22936
#define vslideup_vx_u16mf2_m(...) __riscv_vslideup_vx_u16mf2_tumu(__VA_ARGS__)
22937
#define vslideup_vx_u16m1_m(...) __riscv_vslideup_vx_u16m1_tumu(__VA_ARGS__)
22938
#define vslideup_vx_u16m2_m(...) __riscv_vslideup_vx_u16m2_tumu(__VA_ARGS__)
22939
#define vslideup_vx_u16m4_m(...) __riscv_vslideup_vx_u16m4_tumu(__VA_ARGS__)
22940
#define vslideup_vx_u16m8_m(...) __riscv_vslideup_vx_u16m8_tumu(__VA_ARGS__)
22941
#define vslideup_vx_u32mf2_m(...) __riscv_vslideup_vx_u32mf2_tumu(__VA_ARGS__)
22942
#define vslideup_vx_u32m1_m(...) __riscv_vslideup_vx_u32m1_tumu(__VA_ARGS__)
22943
#define vslideup_vx_u32m2_m(...) __riscv_vslideup_vx_u32m2_tumu(__VA_ARGS__)
22944
#define vslideup_vx_u32m4_m(...) __riscv_vslideup_vx_u32m4_tumu(__VA_ARGS__)
22945
#define vslideup_vx_u32m8_m(...) __riscv_vslideup_vx_u32m8_tumu(__VA_ARGS__)
22946
#define vslideup_vx_u64m1_m(...) __riscv_vslideup_vx_u64m1_tumu(__VA_ARGS__)
22947
#define vslideup_vx_u64m2_m(...) __riscv_vslideup_vx_u64m2_tumu(__VA_ARGS__)
22948
#define vslideup_vx_u64m4_m(...) __riscv_vslideup_vx_u64m4_tumu(__VA_ARGS__)
22949
#define vslideup_vx_u64m8_m(...) __riscv_vslideup_vx_u64m8_tumu(__VA_ARGS__)
22950
#define vslidedown_vx_f16mf4(...) __riscv_vslidedown_vx_f16mf4_tu(__VA_ARGS__)
22951
#define vslidedown_vx_f16mf2(...) __riscv_vslidedown_vx_f16mf2_tu(__VA_ARGS__)
22952
#define vslidedown_vx_f16m1(...) __riscv_vslidedown_vx_f16m1_tu(__VA_ARGS__)
22953
#define vslidedown_vx_f16m2(...) __riscv_vslidedown_vx_f16m2_tu(__VA_ARGS__)
22954
#define vslidedown_vx_f16m4(...) __riscv_vslidedown_vx_f16m4_tu(__VA_ARGS__)
22955
#define vslidedown_vx_f16m8(...) __riscv_vslidedown_vx_f16m8_tu(__VA_ARGS__)
22956
#define vslidedown_vx_f32mf2(...) __riscv_vslidedown_vx_f32mf2_tu(__VA_ARGS__)
22957
#define vslidedown_vx_f32m1(...) __riscv_vslidedown_vx_f32m1_tu(__VA_ARGS__)
22958
#define vslidedown_vx_f32m2(...) __riscv_vslidedown_vx_f32m2_tu(__VA_ARGS__)
22959
#define vslidedown_vx_f32m4(...) __riscv_vslidedown_vx_f32m4_tu(__VA_ARGS__)
22960
#define vslidedown_vx_f32m8(...) __riscv_vslidedown_vx_f32m8_tu(__VA_ARGS__)
22961
#define vslidedown_vx_f64m1(...) __riscv_vslidedown_vx_f64m1_tu(__VA_ARGS__)
22962
#define vslidedown_vx_f64m2(...) __riscv_vslidedown_vx_f64m2_tu(__VA_ARGS__)
22963
#define vslidedown_vx_f64m4(...) __riscv_vslidedown_vx_f64m4_tu(__VA_ARGS__)
22964
#define vslidedown_vx_f64m8(...) __riscv_vslidedown_vx_f64m8_tu(__VA_ARGS__)
22965
#define vslidedown_vx_i8mf8(...) __riscv_vslidedown_vx_i8mf8_tu(__VA_ARGS__)
22966
#define vslidedown_vx_i8mf4(...) __riscv_vslidedown_vx_i8mf4_tu(__VA_ARGS__)
22967
#define vslidedown_vx_i8mf2(...) __riscv_vslidedown_vx_i8mf2_tu(__VA_ARGS__)
22968
#define vslidedown_vx_i8m1(...) __riscv_vslidedown_vx_i8m1_tu(__VA_ARGS__)
22969
#define vslidedown_vx_i8m2(...) __riscv_vslidedown_vx_i8m2_tu(__VA_ARGS__)
22970
#define vslidedown_vx_i8m4(...) __riscv_vslidedown_vx_i8m4_tu(__VA_ARGS__)
22971
#define vslidedown_vx_i8m8(...) __riscv_vslidedown_vx_i8m8_tu(__VA_ARGS__)
22972
#define vslidedown_vx_i16mf4(...) __riscv_vslidedown_vx_i16mf4_tu(__VA_ARGS__)
22973
#define vslidedown_vx_i16mf2(...) __riscv_vslidedown_vx_i16mf2_tu(__VA_ARGS__)
22974
#define vslidedown_vx_i16m1(...) __riscv_vslidedown_vx_i16m1_tu(__VA_ARGS__)
22975
#define vslidedown_vx_i16m2(...) __riscv_vslidedown_vx_i16m2_tu(__VA_ARGS__)
22976
#define vslidedown_vx_i16m4(...) __riscv_vslidedown_vx_i16m4_tu(__VA_ARGS__)
22977
#define vslidedown_vx_i16m8(...) __riscv_vslidedown_vx_i16m8_tu(__VA_ARGS__)
22978
#define vslidedown_vx_i32mf2(...) __riscv_vslidedown_vx_i32mf2_tu(__VA_ARGS__)
22979
#define vslidedown_vx_i32m1(...) __riscv_vslidedown_vx_i32m1_tu(__VA_ARGS__)
22980
#define vslidedown_vx_i32m2(...) __riscv_vslidedown_vx_i32m2_tu(__VA_ARGS__)
22981
#define vslidedown_vx_i32m4(...) __riscv_vslidedown_vx_i32m4_tu(__VA_ARGS__)
22982
#define vslidedown_vx_i32m8(...) __riscv_vslidedown_vx_i32m8_tu(__VA_ARGS__)
22983
#define vslidedown_vx_i64m1(...) __riscv_vslidedown_vx_i64m1_tu(__VA_ARGS__)
22984
#define vslidedown_vx_i64m2(...) __riscv_vslidedown_vx_i64m2_tu(__VA_ARGS__)
22985
#define vslidedown_vx_i64m4(...) __riscv_vslidedown_vx_i64m4_tu(__VA_ARGS__)
22986
#define vslidedown_vx_i64m8(...) __riscv_vslidedown_vx_i64m8_tu(__VA_ARGS__)
22987
#define vslidedown_vx_u8mf8(...) __riscv_vslidedown_vx_u8mf8_tu(__VA_ARGS__)
22988
#define vslidedown_vx_u8mf4(...) __riscv_vslidedown_vx_u8mf4_tu(__VA_ARGS__)
22989
#define vslidedown_vx_u8mf2(...) __riscv_vslidedown_vx_u8mf2_tu(__VA_ARGS__)
22990
#define vslidedown_vx_u8m1(...) __riscv_vslidedown_vx_u8m1_tu(__VA_ARGS__)
22991
#define vslidedown_vx_u8m2(...) __riscv_vslidedown_vx_u8m2_tu(__VA_ARGS__)
22992
#define vslidedown_vx_u8m4(...) __riscv_vslidedown_vx_u8m4_tu(__VA_ARGS__)
22993
#define vslidedown_vx_u8m8(...) __riscv_vslidedown_vx_u8m8_tu(__VA_ARGS__)
22994
#define vslidedown_vx_u16mf4(...) __riscv_vslidedown_vx_u16mf4_tu(__VA_ARGS__)
22995
#define vslidedown_vx_u16mf2(...) __riscv_vslidedown_vx_u16mf2_tu(__VA_ARGS__)
22996
#define vslidedown_vx_u16m1(...) __riscv_vslidedown_vx_u16m1_tu(__VA_ARGS__)
22997
#define vslidedown_vx_u16m2(...) __riscv_vslidedown_vx_u16m2_tu(__VA_ARGS__)
22998
#define vslidedown_vx_u16m4(...) __riscv_vslidedown_vx_u16m4_tu(__VA_ARGS__)
22999
#define vslidedown_vx_u16m8(...) __riscv_vslidedown_vx_u16m8_tu(__VA_ARGS__)
23000
#define vslidedown_vx_u32mf2(...) __riscv_vslidedown_vx_u32mf2_tu(__VA_ARGS__)
23001
#define vslidedown_vx_u32m1(...) __riscv_vslidedown_vx_u32m1_tu(__VA_ARGS__)
23002
#define vslidedown_vx_u32m2(...) __riscv_vslidedown_vx_u32m2_tu(__VA_ARGS__)
23003
#define vslidedown_vx_u32m4(...) __riscv_vslidedown_vx_u32m4_tu(__VA_ARGS__)
23004
#define vslidedown_vx_u32m8(...) __riscv_vslidedown_vx_u32m8_tu(__VA_ARGS__)
23005
#define vslidedown_vx_u64m1(...) __riscv_vslidedown_vx_u64m1_tu(__VA_ARGS__)
23006
#define vslidedown_vx_u64m2(...) __riscv_vslidedown_vx_u64m2_tu(__VA_ARGS__)
23007
#define vslidedown_vx_u64m4(...) __riscv_vslidedown_vx_u64m4_tu(__VA_ARGS__)
23008
#define vslidedown_vx_u64m8(...) __riscv_vslidedown_vx_u64m8_tu(__VA_ARGS__)
23009
// masked functions
23010
#define vslidedown_vx_f16mf4_m(...) __riscv_vslidedown_vx_f16mf4_tumu(__VA_ARGS__)
23011
#define vslidedown_vx_f16mf2_m(...) __riscv_vslidedown_vx_f16mf2_tumu(__VA_ARGS__)
23012
#define vslidedown_vx_f16m1_m(...) __riscv_vslidedown_vx_f16m1_tumu(__VA_ARGS__)
23013
#define vslidedown_vx_f16m2_m(...) __riscv_vslidedown_vx_f16m2_tumu(__VA_ARGS__)
23014
#define vslidedown_vx_f16m4_m(...) __riscv_vslidedown_vx_f16m4_tumu(__VA_ARGS__)
23015
#define vslidedown_vx_f16m8_m(...) __riscv_vslidedown_vx_f16m8_tumu(__VA_ARGS__)
23016
#define vslidedown_vx_f32mf2_m(...) __riscv_vslidedown_vx_f32mf2_tumu(__VA_ARGS__)
23017
#define vslidedown_vx_f32m1_m(...) __riscv_vslidedown_vx_f32m1_tumu(__VA_ARGS__)
23018
#define vslidedown_vx_f32m2_m(...) __riscv_vslidedown_vx_f32m2_tumu(__VA_ARGS__)
23019
#define vslidedown_vx_f32m4_m(...) __riscv_vslidedown_vx_f32m4_tumu(__VA_ARGS__)
23020
#define vslidedown_vx_f32m8_m(...) __riscv_vslidedown_vx_f32m8_tumu(__VA_ARGS__)
23021
#define vslidedown_vx_f64m1_m(...) __riscv_vslidedown_vx_f64m1_tumu(__VA_ARGS__)
23022
#define vslidedown_vx_f64m2_m(...) __riscv_vslidedown_vx_f64m2_tumu(__VA_ARGS__)
23023
#define vslidedown_vx_f64m4_m(...) __riscv_vslidedown_vx_f64m4_tumu(__VA_ARGS__)
23024
#define vslidedown_vx_f64m8_m(...) __riscv_vslidedown_vx_f64m8_tumu(__VA_ARGS__)
23025
#define vslidedown_vx_i8mf8_m(...) __riscv_vslidedown_vx_i8mf8_tumu(__VA_ARGS__)
23026
#define vslidedown_vx_i8mf4_m(...) __riscv_vslidedown_vx_i8mf4_tumu(__VA_ARGS__)
23027
#define vslidedown_vx_i8mf2_m(...) __riscv_vslidedown_vx_i8mf2_tumu(__VA_ARGS__)
23028
#define vslidedown_vx_i8m1_m(...) __riscv_vslidedown_vx_i8m1_tumu(__VA_ARGS__)
23029
#define vslidedown_vx_i8m2_m(...) __riscv_vslidedown_vx_i8m2_tumu(__VA_ARGS__)
23030
#define vslidedown_vx_i8m4_m(...) __riscv_vslidedown_vx_i8m4_tumu(__VA_ARGS__)
23031
#define vslidedown_vx_i8m8_m(...) __riscv_vslidedown_vx_i8m8_tumu(__VA_ARGS__)
23032
#define vslidedown_vx_i16mf4_m(...) __riscv_vslidedown_vx_i16mf4_tumu(__VA_ARGS__)
23033
#define vslidedown_vx_i16mf2_m(...) __riscv_vslidedown_vx_i16mf2_tumu(__VA_ARGS__)
23034
#define vslidedown_vx_i16m1_m(...) __riscv_vslidedown_vx_i16m1_tumu(__VA_ARGS__)
23035
#define vslidedown_vx_i16m2_m(...) __riscv_vslidedown_vx_i16m2_tumu(__VA_ARGS__)
23036
#define vslidedown_vx_i16m4_m(...) __riscv_vslidedown_vx_i16m4_tumu(__VA_ARGS__)
23037
#define vslidedown_vx_i16m8_m(...) __riscv_vslidedown_vx_i16m8_tumu(__VA_ARGS__)
23038
#define vslidedown_vx_i32mf2_m(...) __riscv_vslidedown_vx_i32mf2_tumu(__VA_ARGS__)
23039
#define vslidedown_vx_i32m1_m(...) __riscv_vslidedown_vx_i32m1_tumu(__VA_ARGS__)
23040
#define vslidedown_vx_i32m2_m(...) __riscv_vslidedown_vx_i32m2_tumu(__VA_ARGS__)
23041
#define vslidedown_vx_i32m4_m(...) __riscv_vslidedown_vx_i32m4_tumu(__VA_ARGS__)
23042
#define vslidedown_vx_i32m8_m(...) __riscv_vslidedown_vx_i32m8_tumu(__VA_ARGS__)
23043
#define vslidedown_vx_i64m1_m(...) __riscv_vslidedown_vx_i64m1_tumu(__VA_ARGS__)
23044
#define vslidedown_vx_i64m2_m(...) __riscv_vslidedown_vx_i64m2_tumu(__VA_ARGS__)
23045
#define vslidedown_vx_i64m4_m(...) __riscv_vslidedown_vx_i64m4_tumu(__VA_ARGS__)
23046
#define vslidedown_vx_i64m8_m(...) __riscv_vslidedown_vx_i64m8_tumu(__VA_ARGS__)
23047
#define vslidedown_vx_u8mf8_m(...) __riscv_vslidedown_vx_u8mf8_tumu(__VA_ARGS__)
23048
#define vslidedown_vx_u8mf4_m(...) __riscv_vslidedown_vx_u8mf4_tumu(__VA_ARGS__)
23049
#define vslidedown_vx_u8mf2_m(...) __riscv_vslidedown_vx_u8mf2_tumu(__VA_ARGS__)
23050
#define vslidedown_vx_u8m1_m(...) __riscv_vslidedown_vx_u8m1_tumu(__VA_ARGS__)
23051
#define vslidedown_vx_u8m2_m(...) __riscv_vslidedown_vx_u8m2_tumu(__VA_ARGS__)
23052
#define vslidedown_vx_u8m4_m(...) __riscv_vslidedown_vx_u8m4_tumu(__VA_ARGS__)
23053
#define vslidedown_vx_u8m8_m(...) __riscv_vslidedown_vx_u8m8_tumu(__VA_ARGS__)
23054
#define vslidedown_vx_u16mf4_m(...) __riscv_vslidedown_vx_u16mf4_tumu(__VA_ARGS__)
23055
#define vslidedown_vx_u16mf2_m(...) __riscv_vslidedown_vx_u16mf2_tumu(__VA_ARGS__)
23056
#define vslidedown_vx_u16m1_m(...) __riscv_vslidedown_vx_u16m1_tumu(__VA_ARGS__)
23057
#define vslidedown_vx_u16m2_m(...) __riscv_vslidedown_vx_u16m2_tumu(__VA_ARGS__)
23058
#define vslidedown_vx_u16m4_m(...) __riscv_vslidedown_vx_u16m4_tumu(__VA_ARGS__)
23059
#define vslidedown_vx_u16m8_m(...) __riscv_vslidedown_vx_u16m8_tumu(__VA_ARGS__)
23060
#define vslidedown_vx_u32mf2_m(...) __riscv_vslidedown_vx_u32mf2_tumu(__VA_ARGS__)
23061
#define vslidedown_vx_u32m1_m(...) __riscv_vslidedown_vx_u32m1_tumu(__VA_ARGS__)
23062
#define vslidedown_vx_u32m2_m(...) __riscv_vslidedown_vx_u32m2_tumu(__VA_ARGS__)
23063
#define vslidedown_vx_u32m4_m(...) __riscv_vslidedown_vx_u32m4_tumu(__VA_ARGS__)
23064
#define vslidedown_vx_u32m8_m(...) __riscv_vslidedown_vx_u32m8_tumu(__VA_ARGS__)
23065
#define vslidedown_vx_u64m1_m(...) __riscv_vslidedown_vx_u64m1_tumu(__VA_ARGS__)
23066
#define vslidedown_vx_u64m2_m(...) __riscv_vslidedown_vx_u64m2_tumu(__VA_ARGS__)
23067
#define vslidedown_vx_u64m4_m(...) __riscv_vslidedown_vx_u64m4_tumu(__VA_ARGS__)
23068
#define vslidedown_vx_u64m8_m(...) __riscv_vslidedown_vx_u64m8_tumu(__VA_ARGS__)
23069
#define vfslide1up_vf_f16mf4(...) __riscv_vfslide1up_vf_f16mf4(__VA_ARGS__)
23070
#define vfslide1up_vf_f16mf2(...) __riscv_vfslide1up_vf_f16mf2(__VA_ARGS__)
23071
#define vfslide1up_vf_f16m1(...) __riscv_vfslide1up_vf_f16m1(__VA_ARGS__)
23072
#define vfslide1up_vf_f16m2(...) __riscv_vfslide1up_vf_f16m2(__VA_ARGS__)
23073
#define vfslide1up_vf_f16m4(...) __riscv_vfslide1up_vf_f16m4(__VA_ARGS__)
23074
#define vfslide1up_vf_f16m8(...) __riscv_vfslide1up_vf_f16m8(__VA_ARGS__)
23075
#define vfslide1up_vf_f32mf2(...) __riscv_vfslide1up_vf_f32mf2(__VA_ARGS__)
23076
#define vfslide1up_vf_f32m1(...) __riscv_vfslide1up_vf_f32m1(__VA_ARGS__)
23077
#define vfslide1up_vf_f32m2(...) __riscv_vfslide1up_vf_f32m2(__VA_ARGS__)
23078
#define vfslide1up_vf_f32m4(...) __riscv_vfslide1up_vf_f32m4(__VA_ARGS__)
23079
#define vfslide1up_vf_f32m8(...) __riscv_vfslide1up_vf_f32m8(__VA_ARGS__)
23080
#define vfslide1up_vf_f64m1(...) __riscv_vfslide1up_vf_f64m1(__VA_ARGS__)
23081
#define vfslide1up_vf_f64m2(...) __riscv_vfslide1up_vf_f64m2(__VA_ARGS__)
23082
#define vfslide1up_vf_f64m4(...) __riscv_vfslide1up_vf_f64m4(__VA_ARGS__)
23083
#define vfslide1up_vf_f64m8(...) __riscv_vfslide1up_vf_f64m8(__VA_ARGS__)
23084
#define vfslide1down_vf_f16mf4(...) __riscv_vfslide1down_vf_f16mf4(__VA_ARGS__)
23085
#define vfslide1down_vf_f16mf2(...) __riscv_vfslide1down_vf_f16mf2(__VA_ARGS__)
23086
#define vfslide1down_vf_f16m1(...) __riscv_vfslide1down_vf_f16m1(__VA_ARGS__)
23087
#define vfslide1down_vf_f16m2(...) __riscv_vfslide1down_vf_f16m2(__VA_ARGS__)
23088
#define vfslide1down_vf_f16m4(...) __riscv_vfslide1down_vf_f16m4(__VA_ARGS__)
23089
#define vfslide1down_vf_f16m8(...) __riscv_vfslide1down_vf_f16m8(__VA_ARGS__)
23090
#define vfslide1down_vf_f32mf2(...) __riscv_vfslide1down_vf_f32mf2(__VA_ARGS__)
23091
#define vfslide1down_vf_f32m1(...) __riscv_vfslide1down_vf_f32m1(__VA_ARGS__)
23092
#define vfslide1down_vf_f32m2(...) __riscv_vfslide1down_vf_f32m2(__VA_ARGS__)
23093
#define vfslide1down_vf_f32m4(...) __riscv_vfslide1down_vf_f32m4(__VA_ARGS__)
23094
#define vfslide1down_vf_f32m8(...) __riscv_vfslide1down_vf_f32m8(__VA_ARGS__)
23095
#define vfslide1down_vf_f64m1(...) __riscv_vfslide1down_vf_f64m1(__VA_ARGS__)
23096
#define vfslide1down_vf_f64m2(...) __riscv_vfslide1down_vf_f64m2(__VA_ARGS__)
23097
#define vfslide1down_vf_f64m4(...) __riscv_vfslide1down_vf_f64m4(__VA_ARGS__)
23098
#define vfslide1down_vf_f64m8(...) __riscv_vfslide1down_vf_f64m8(__VA_ARGS__)
23099
#define vslide1up_vx_i8mf8(...) __riscv_vslide1up_vx_i8mf8(__VA_ARGS__)
23100
#define vslide1up_vx_i8mf4(...) __riscv_vslide1up_vx_i8mf4(__VA_ARGS__)
23101
#define vslide1up_vx_i8mf2(...) __riscv_vslide1up_vx_i8mf2(__VA_ARGS__)
23102
#define vslide1up_vx_i8m1(...) __riscv_vslide1up_vx_i8m1(__VA_ARGS__)
23103
#define vslide1up_vx_i8m2(...) __riscv_vslide1up_vx_i8m2(__VA_ARGS__)
23104
#define vslide1up_vx_i8m4(...) __riscv_vslide1up_vx_i8m4(__VA_ARGS__)
23105
#define vslide1up_vx_i8m8(...) __riscv_vslide1up_vx_i8m8(__VA_ARGS__)
23106
#define vslide1up_vx_i16mf4(...) __riscv_vslide1up_vx_i16mf4(__VA_ARGS__)
23107
#define vslide1up_vx_i16mf2(...) __riscv_vslide1up_vx_i16mf2(__VA_ARGS__)
23108
#define vslide1up_vx_i16m1(...) __riscv_vslide1up_vx_i16m1(__VA_ARGS__)
23109
#define vslide1up_vx_i16m2(...) __riscv_vslide1up_vx_i16m2(__VA_ARGS__)
23110
#define vslide1up_vx_i16m4(...) __riscv_vslide1up_vx_i16m4(__VA_ARGS__)
23111
#define vslide1up_vx_i16m8(...) __riscv_vslide1up_vx_i16m8(__VA_ARGS__)
23112
#define vslide1up_vx_i32mf2(...) __riscv_vslide1up_vx_i32mf2(__VA_ARGS__)
23113
#define vslide1up_vx_i32m1(...) __riscv_vslide1up_vx_i32m1(__VA_ARGS__)
23114
#define vslide1up_vx_i32m2(...) __riscv_vslide1up_vx_i32m2(__VA_ARGS__)
23115
#define vslide1up_vx_i32m4(...) __riscv_vslide1up_vx_i32m4(__VA_ARGS__)
23116
#define vslide1up_vx_i32m8(...) __riscv_vslide1up_vx_i32m8(__VA_ARGS__)
23117
#define vslide1up_vx_i64m1(...) __riscv_vslide1up_vx_i64m1(__VA_ARGS__)
23118
#define vslide1up_vx_i64m2(...) __riscv_vslide1up_vx_i64m2(__VA_ARGS__)
23119
#define vslide1up_vx_i64m4(...) __riscv_vslide1up_vx_i64m4(__VA_ARGS__)
23120
#define vslide1up_vx_i64m8(...) __riscv_vslide1up_vx_i64m8(__VA_ARGS__)
23121
#define vslide1down_vx_i8mf8(...) __riscv_vslide1down_vx_i8mf8(__VA_ARGS__)
23122
#define vslide1down_vx_i8mf4(...) __riscv_vslide1down_vx_i8mf4(__VA_ARGS__)
23123
#define vslide1down_vx_i8mf2(...) __riscv_vslide1down_vx_i8mf2(__VA_ARGS__)
23124
#define vslide1down_vx_i8m1(...) __riscv_vslide1down_vx_i8m1(__VA_ARGS__)
23125
#define vslide1down_vx_i8m2(...) __riscv_vslide1down_vx_i8m2(__VA_ARGS__)
23126
#define vslide1down_vx_i8m4(...) __riscv_vslide1down_vx_i8m4(__VA_ARGS__)
23127
#define vslide1down_vx_i8m8(...) __riscv_vslide1down_vx_i8m8(__VA_ARGS__)
23128
#define vslide1down_vx_i16mf4(...) __riscv_vslide1down_vx_i16mf4(__VA_ARGS__)
23129
#define vslide1down_vx_i16mf2(...) __riscv_vslide1down_vx_i16mf2(__VA_ARGS__)
23130
#define vslide1down_vx_i16m1(...) __riscv_vslide1down_vx_i16m1(__VA_ARGS__)
23131
#define vslide1down_vx_i16m2(...) __riscv_vslide1down_vx_i16m2(__VA_ARGS__)
23132
#define vslide1down_vx_i16m4(...) __riscv_vslide1down_vx_i16m4(__VA_ARGS__)
23133
#define vslide1down_vx_i16m8(...) __riscv_vslide1down_vx_i16m8(__VA_ARGS__)
23134
#define vslide1down_vx_i32mf2(...) __riscv_vslide1down_vx_i32mf2(__VA_ARGS__)
23135
#define vslide1down_vx_i32m1(...) __riscv_vslide1down_vx_i32m1(__VA_ARGS__)
23136
#define vslide1down_vx_i32m2(...) __riscv_vslide1down_vx_i32m2(__VA_ARGS__)
23137
#define vslide1down_vx_i32m4(...) __riscv_vslide1down_vx_i32m4(__VA_ARGS__)
23138
#define vslide1down_vx_i32m8(...) __riscv_vslide1down_vx_i32m8(__VA_ARGS__)
23139
#define vslide1down_vx_i64m1(...) __riscv_vslide1down_vx_i64m1(__VA_ARGS__)
23140
#define vslide1down_vx_i64m2(...) __riscv_vslide1down_vx_i64m2(__VA_ARGS__)
23141
#define vslide1down_vx_i64m4(...) __riscv_vslide1down_vx_i64m4(__VA_ARGS__)
23142
#define vslide1down_vx_i64m8(...) __riscv_vslide1down_vx_i64m8(__VA_ARGS__)
23143
#define vslide1up_vx_u8mf8(...) __riscv_vslide1up_vx_u8mf8(__VA_ARGS__)
23144
#define vslide1up_vx_u8mf4(...) __riscv_vslide1up_vx_u8mf4(__VA_ARGS__)
23145
#define vslide1up_vx_u8mf2(...) __riscv_vslide1up_vx_u8mf2(__VA_ARGS__)
23146
#define vslide1up_vx_u8m1(...) __riscv_vslide1up_vx_u8m1(__VA_ARGS__)
23147
#define vslide1up_vx_u8m2(...) __riscv_vslide1up_vx_u8m2(__VA_ARGS__)
23148
#define vslide1up_vx_u8m4(...) __riscv_vslide1up_vx_u8m4(__VA_ARGS__)
23149
#define vslide1up_vx_u8m8(...) __riscv_vslide1up_vx_u8m8(__VA_ARGS__)
23150
#define vslide1up_vx_u16mf4(...) __riscv_vslide1up_vx_u16mf4(__VA_ARGS__)
23151
#define vslide1up_vx_u16mf2(...) __riscv_vslide1up_vx_u16mf2(__VA_ARGS__)
23152
#define vslide1up_vx_u16m1(...) __riscv_vslide1up_vx_u16m1(__VA_ARGS__)
23153
#define vslide1up_vx_u16m2(...) __riscv_vslide1up_vx_u16m2(__VA_ARGS__)
23154
#define vslide1up_vx_u16m4(...) __riscv_vslide1up_vx_u16m4(__VA_ARGS__)
23155
#define vslide1up_vx_u16m8(...) __riscv_vslide1up_vx_u16m8(__VA_ARGS__)
23156
#define vslide1up_vx_u32mf2(...) __riscv_vslide1up_vx_u32mf2(__VA_ARGS__)
23157
#define vslide1up_vx_u32m1(...) __riscv_vslide1up_vx_u32m1(__VA_ARGS__)
23158
#define vslide1up_vx_u32m2(...) __riscv_vslide1up_vx_u32m2(__VA_ARGS__)
23159
#define vslide1up_vx_u32m4(...) __riscv_vslide1up_vx_u32m4(__VA_ARGS__)
23160
#define vslide1up_vx_u32m8(...) __riscv_vslide1up_vx_u32m8(__VA_ARGS__)
23161
#define vslide1up_vx_u64m1(...) __riscv_vslide1up_vx_u64m1(__VA_ARGS__)
23162
#define vslide1up_vx_u64m2(...) __riscv_vslide1up_vx_u64m2(__VA_ARGS__)
23163
#define vslide1up_vx_u64m4(...) __riscv_vslide1up_vx_u64m4(__VA_ARGS__)
23164
#define vslide1up_vx_u64m8(...) __riscv_vslide1up_vx_u64m8(__VA_ARGS__)
23165
#define vslide1down_vx_u8mf8(...) __riscv_vslide1down_vx_u8mf8(__VA_ARGS__)
23166
#define vslide1down_vx_u8mf4(...) __riscv_vslide1down_vx_u8mf4(__VA_ARGS__)
23167
#define vslide1down_vx_u8mf2(...) __riscv_vslide1down_vx_u8mf2(__VA_ARGS__)
23168
#define vslide1down_vx_u8m1(...) __riscv_vslide1down_vx_u8m1(__VA_ARGS__)
23169
#define vslide1down_vx_u8m2(...) __riscv_vslide1down_vx_u8m2(__VA_ARGS__)
23170
#define vslide1down_vx_u8m4(...) __riscv_vslide1down_vx_u8m4(__VA_ARGS__)
23171
#define vslide1down_vx_u8m8(...) __riscv_vslide1down_vx_u8m8(__VA_ARGS__)
23172
#define vslide1down_vx_u16mf4(...) __riscv_vslide1down_vx_u16mf4(__VA_ARGS__)
23173
#define vslide1down_vx_u16mf2(...) __riscv_vslide1down_vx_u16mf2(__VA_ARGS__)
23174
#define vslide1down_vx_u16m1(...) __riscv_vslide1down_vx_u16m1(__VA_ARGS__)
23175
#define vslide1down_vx_u16m2(...) __riscv_vslide1down_vx_u16m2(__VA_ARGS__)
23176
#define vslide1down_vx_u16m4(...) __riscv_vslide1down_vx_u16m4(__VA_ARGS__)
23177
#define vslide1down_vx_u16m8(...) __riscv_vslide1down_vx_u16m8(__VA_ARGS__)
23178
#define vslide1down_vx_u32mf2(...) __riscv_vslide1down_vx_u32mf2(__VA_ARGS__)
23179
#define vslide1down_vx_u32m1(...) __riscv_vslide1down_vx_u32m1(__VA_ARGS__)
23180
#define vslide1down_vx_u32m2(...) __riscv_vslide1down_vx_u32m2(__VA_ARGS__)
23181
#define vslide1down_vx_u32m4(...) __riscv_vslide1down_vx_u32m4(__VA_ARGS__)
23182
#define vslide1down_vx_u32m8(...) __riscv_vslide1down_vx_u32m8(__VA_ARGS__)
23183
#define vslide1down_vx_u64m1(...) __riscv_vslide1down_vx_u64m1(__VA_ARGS__)
23184
#define vslide1down_vx_u64m2(...) __riscv_vslide1down_vx_u64m2(__VA_ARGS__)
23185
#define vslide1down_vx_u64m4(...) __riscv_vslide1down_vx_u64m4(__VA_ARGS__)
23186
#define vslide1down_vx_u64m8(...) __riscv_vslide1down_vx_u64m8(__VA_ARGS__)
23187
// masked functions
23188
#define vfslide1up_vf_f16mf4_m(...) __riscv_vfslide1up_vf_f16mf4_tumu(__VA_ARGS__)
23189
#define vfslide1up_vf_f16mf2_m(...) __riscv_vfslide1up_vf_f16mf2_tumu(__VA_ARGS__)
23190
#define vfslide1up_vf_f16m1_m(...) __riscv_vfslide1up_vf_f16m1_tumu(__VA_ARGS__)
23191
#define vfslide1up_vf_f16m2_m(...) __riscv_vfslide1up_vf_f16m2_tumu(__VA_ARGS__)
23192
#define vfslide1up_vf_f16m4_m(...) __riscv_vfslide1up_vf_f16m4_tumu(__VA_ARGS__)
23193
#define vfslide1up_vf_f16m8_m(...) __riscv_vfslide1up_vf_f16m8_tumu(__VA_ARGS__)
23194
#define vfslide1up_vf_f32mf2_m(...) __riscv_vfslide1up_vf_f32mf2_tumu(__VA_ARGS__)
23195
#define vfslide1up_vf_f32m1_m(...) __riscv_vfslide1up_vf_f32m1_tumu(__VA_ARGS__)
23196
#define vfslide1up_vf_f32m2_m(...) __riscv_vfslide1up_vf_f32m2_tumu(__VA_ARGS__)
23197
#define vfslide1up_vf_f32m4_m(...) __riscv_vfslide1up_vf_f32m4_tumu(__VA_ARGS__)
23198
#define vfslide1up_vf_f32m8_m(...) __riscv_vfslide1up_vf_f32m8_tumu(__VA_ARGS__)
23199
#define vfslide1up_vf_f64m1_m(...) __riscv_vfslide1up_vf_f64m1_tumu(__VA_ARGS__)
23200
#define vfslide1up_vf_f64m2_m(...) __riscv_vfslide1up_vf_f64m2_tumu(__VA_ARGS__)
23201
#define vfslide1up_vf_f64m4_m(...) __riscv_vfslide1up_vf_f64m4_tumu(__VA_ARGS__)
23202
#define vfslide1up_vf_f64m8_m(...) __riscv_vfslide1up_vf_f64m8_tumu(__VA_ARGS__)
23203
#define vfslide1down_vf_f16mf4_m(...) __riscv_vfslide1down_vf_f16mf4_tumu(__VA_ARGS__)
23204
#define vfslide1down_vf_f16mf2_m(...) __riscv_vfslide1down_vf_f16mf2_tumu(__VA_ARGS__)
23205
#define vfslide1down_vf_f16m1_m(...) __riscv_vfslide1down_vf_f16m1_tumu(__VA_ARGS__)
23206
#define vfslide1down_vf_f16m2_m(...) __riscv_vfslide1down_vf_f16m2_tumu(__VA_ARGS__)
23207
#define vfslide1down_vf_f16m4_m(...) __riscv_vfslide1down_vf_f16m4_tumu(__VA_ARGS__)
23208
#define vfslide1down_vf_f16m8_m(...) __riscv_vfslide1down_vf_f16m8_tumu(__VA_ARGS__)
23209
#define vfslide1down_vf_f32mf2_m(...) __riscv_vfslide1down_vf_f32mf2_tumu(__VA_ARGS__)
23210
#define vfslide1down_vf_f32m1_m(...) __riscv_vfslide1down_vf_f32m1_tumu(__VA_ARGS__)
23211
#define vfslide1down_vf_f32m2_m(...) __riscv_vfslide1down_vf_f32m2_tumu(__VA_ARGS__)
23212
#define vfslide1down_vf_f32m4_m(...) __riscv_vfslide1down_vf_f32m4_tumu(__VA_ARGS__)
23213
#define vfslide1down_vf_f32m8_m(...) __riscv_vfslide1down_vf_f32m8_tumu(__VA_ARGS__)
23214
#define vfslide1down_vf_f64m1_m(...) __riscv_vfslide1down_vf_f64m1_tumu(__VA_ARGS__)
23215
#define vfslide1down_vf_f64m2_m(...) __riscv_vfslide1down_vf_f64m2_tumu(__VA_ARGS__)
23216
#define vfslide1down_vf_f64m4_m(...) __riscv_vfslide1down_vf_f64m4_tumu(__VA_ARGS__)
23217
#define vfslide1down_vf_f64m8_m(...) __riscv_vfslide1down_vf_f64m8_tumu(__VA_ARGS__)
23218
#define vslide1up_vx_i8mf8_m(...) __riscv_vslide1up_vx_i8mf8_tumu(__VA_ARGS__)
23219
#define vslide1up_vx_i8mf4_m(...) __riscv_vslide1up_vx_i8mf4_tumu(__VA_ARGS__)
23220
#define vslide1up_vx_i8mf2_m(...) __riscv_vslide1up_vx_i8mf2_tumu(__VA_ARGS__)
23221
#define vslide1up_vx_i8m1_m(...) __riscv_vslide1up_vx_i8m1_tumu(__VA_ARGS__)
23222
#define vslide1up_vx_i8m2_m(...) __riscv_vslide1up_vx_i8m2_tumu(__VA_ARGS__)
23223
#define vslide1up_vx_i8m4_m(...) __riscv_vslide1up_vx_i8m4_tumu(__VA_ARGS__)
23224
#define vslide1up_vx_i8m8_m(...) __riscv_vslide1up_vx_i8m8_tumu(__VA_ARGS__)
23225
#define vslide1up_vx_i16mf4_m(...) __riscv_vslide1up_vx_i16mf4_tumu(__VA_ARGS__)
23226
#define vslide1up_vx_i16mf2_m(...) __riscv_vslide1up_vx_i16mf2_tumu(__VA_ARGS__)
23227
#define vslide1up_vx_i16m1_m(...) __riscv_vslide1up_vx_i16m1_tumu(__VA_ARGS__)
23228
#define vslide1up_vx_i16m2_m(...) __riscv_vslide1up_vx_i16m2_tumu(__VA_ARGS__)
23229
#define vslide1up_vx_i16m4_m(...) __riscv_vslide1up_vx_i16m4_tumu(__VA_ARGS__)
23230
#define vslide1up_vx_i16m8_m(...) __riscv_vslide1up_vx_i16m8_tumu(__VA_ARGS__)
23231
#define vslide1up_vx_i32mf2_m(...) __riscv_vslide1up_vx_i32mf2_tumu(__VA_ARGS__)
23232
#define vslide1up_vx_i32m1_m(...) __riscv_vslide1up_vx_i32m1_tumu(__VA_ARGS__)
23233
#define vslide1up_vx_i32m2_m(...) __riscv_vslide1up_vx_i32m2_tumu(__VA_ARGS__)
23234
#define vslide1up_vx_i32m4_m(...) __riscv_vslide1up_vx_i32m4_tumu(__VA_ARGS__)
23235
#define vslide1up_vx_i32m8_m(...) __riscv_vslide1up_vx_i32m8_tumu(__VA_ARGS__)
23236
#define vslide1up_vx_i64m1_m(...) __riscv_vslide1up_vx_i64m1_tumu(__VA_ARGS__)
23237
#define vslide1up_vx_i64m2_m(...) __riscv_vslide1up_vx_i64m2_tumu(__VA_ARGS__)
23238
#define vslide1up_vx_i64m4_m(...) __riscv_vslide1up_vx_i64m4_tumu(__VA_ARGS__)
23239
#define vslide1up_vx_i64m8_m(...) __riscv_vslide1up_vx_i64m8_tumu(__VA_ARGS__)
23240
#define vslide1down_vx_i8mf8_m(...) __riscv_vslide1down_vx_i8mf8_tumu(__VA_ARGS__)
23241
#define vslide1down_vx_i8mf4_m(...) __riscv_vslide1down_vx_i8mf4_tumu(__VA_ARGS__)
23242
#define vslide1down_vx_i8mf2_m(...) __riscv_vslide1down_vx_i8mf2_tumu(__VA_ARGS__)
23243
#define vslide1down_vx_i8m1_m(...) __riscv_vslide1down_vx_i8m1_tumu(__VA_ARGS__)
23244
#define vslide1down_vx_i8m2_m(...) __riscv_vslide1down_vx_i8m2_tumu(__VA_ARGS__)
23245
#define vslide1down_vx_i8m4_m(...) __riscv_vslide1down_vx_i8m4_tumu(__VA_ARGS__)
23246
#define vslide1down_vx_i8m8_m(...) __riscv_vslide1down_vx_i8m8_tumu(__VA_ARGS__)
23247
#define vslide1down_vx_i16mf4_m(...) __riscv_vslide1down_vx_i16mf4_tumu(__VA_ARGS__)
23248
#define vslide1down_vx_i16mf2_m(...) __riscv_vslide1down_vx_i16mf2_tumu(__VA_ARGS__)
23249
#define vslide1down_vx_i16m1_m(...) __riscv_vslide1down_vx_i16m1_tumu(__VA_ARGS__)
23250
#define vslide1down_vx_i16m2_m(...) __riscv_vslide1down_vx_i16m2_tumu(__VA_ARGS__)
23251
#define vslide1down_vx_i16m4_m(...) __riscv_vslide1down_vx_i16m4_tumu(__VA_ARGS__)
23252
#define vslide1down_vx_i16m8_m(...) __riscv_vslide1down_vx_i16m8_tumu(__VA_ARGS__)
23253
#define vslide1down_vx_i32mf2_m(...) __riscv_vslide1down_vx_i32mf2_tumu(__VA_ARGS__)
23254
#define vslide1down_vx_i32m1_m(...) __riscv_vslide1down_vx_i32m1_tumu(__VA_ARGS__)
23255
#define vslide1down_vx_i32m2_m(...) __riscv_vslide1down_vx_i32m2_tumu(__VA_ARGS__)
23256
#define vslide1down_vx_i32m4_m(...) __riscv_vslide1down_vx_i32m4_tumu(__VA_ARGS__)
23257
#define vslide1down_vx_i32m8_m(...) __riscv_vslide1down_vx_i32m8_tumu(__VA_ARGS__)
23258
#define vslide1down_vx_i64m1_m(...) __riscv_vslide1down_vx_i64m1_tumu(__VA_ARGS__)
23259
#define vslide1down_vx_i64m2_m(...) __riscv_vslide1down_vx_i64m2_tumu(__VA_ARGS__)
23260
#define vslide1down_vx_i64m4_m(...) __riscv_vslide1down_vx_i64m4_tumu(__VA_ARGS__)
23261
#define vslide1down_vx_i64m8_m(...) __riscv_vslide1down_vx_i64m8_tumu(__VA_ARGS__)
23262
#define vslide1up_vx_u8mf8_m(...) __riscv_vslide1up_vx_u8mf8_tumu(__VA_ARGS__)
23263
#define vslide1up_vx_u8mf4_m(...) __riscv_vslide1up_vx_u8mf4_tumu(__VA_ARGS__)
23264
#define vslide1up_vx_u8mf2_m(...) __riscv_vslide1up_vx_u8mf2_tumu(__VA_ARGS__)
23265
#define vslide1up_vx_u8m1_m(...) __riscv_vslide1up_vx_u8m1_tumu(__VA_ARGS__)
23266
#define vslide1up_vx_u8m2_m(...) __riscv_vslide1up_vx_u8m2_tumu(__VA_ARGS__)
23267
#define vslide1up_vx_u8m4_m(...) __riscv_vslide1up_vx_u8m4_tumu(__VA_ARGS__)
23268
#define vslide1up_vx_u8m8_m(...) __riscv_vslide1up_vx_u8m8_tumu(__VA_ARGS__)
23269
#define vslide1up_vx_u16mf4_m(...) __riscv_vslide1up_vx_u16mf4_tumu(__VA_ARGS__)
23270
#define vslide1up_vx_u16mf2_m(...) __riscv_vslide1up_vx_u16mf2_tumu(__VA_ARGS__)
23271
#define vslide1up_vx_u16m1_m(...) __riscv_vslide1up_vx_u16m1_tumu(__VA_ARGS__)
23272
#define vslide1up_vx_u16m2_m(...) __riscv_vslide1up_vx_u16m2_tumu(__VA_ARGS__)
23273
#define vslide1up_vx_u16m4_m(...) __riscv_vslide1up_vx_u16m4_tumu(__VA_ARGS__)
23274
#define vslide1up_vx_u16m8_m(...) __riscv_vslide1up_vx_u16m8_tumu(__VA_ARGS__)
23275
#define vslide1up_vx_u32mf2_m(...) __riscv_vslide1up_vx_u32mf2_tumu(__VA_ARGS__)
23276
#define vslide1up_vx_u32m1_m(...) __riscv_vslide1up_vx_u32m1_tumu(__VA_ARGS__)
23277
#define vslide1up_vx_u32m2_m(...) __riscv_vslide1up_vx_u32m2_tumu(__VA_ARGS__)
23278
#define vslide1up_vx_u32m4_m(...) __riscv_vslide1up_vx_u32m4_tumu(__VA_ARGS__)
23279
#define vslide1up_vx_u32m8_m(...) __riscv_vslide1up_vx_u32m8_tumu(__VA_ARGS__)
23280
#define vslide1up_vx_u64m1_m(...) __riscv_vslide1up_vx_u64m1_tumu(__VA_ARGS__)
23281
#define vslide1up_vx_u64m2_m(...) __riscv_vslide1up_vx_u64m2_tumu(__VA_ARGS__)
23282
#define vslide1up_vx_u64m4_m(...) __riscv_vslide1up_vx_u64m4_tumu(__VA_ARGS__)
23283
#define vslide1up_vx_u64m8_m(...) __riscv_vslide1up_vx_u64m8_tumu(__VA_ARGS__)
23284
#define vslide1down_vx_u8mf8_m(...) __riscv_vslide1down_vx_u8mf8_tumu(__VA_ARGS__)
23285
#define vslide1down_vx_u8mf4_m(...) __riscv_vslide1down_vx_u8mf4_tumu(__VA_ARGS__)
23286
#define vslide1down_vx_u8mf2_m(...) __riscv_vslide1down_vx_u8mf2_tumu(__VA_ARGS__)
23287
#define vslide1down_vx_u8m1_m(...) __riscv_vslide1down_vx_u8m1_tumu(__VA_ARGS__)
23288
#define vslide1down_vx_u8m2_m(...) __riscv_vslide1down_vx_u8m2_tumu(__VA_ARGS__)
23289
#define vslide1down_vx_u8m4_m(...) __riscv_vslide1down_vx_u8m4_tumu(__VA_ARGS__)
23290
#define vslide1down_vx_u8m8_m(...) __riscv_vslide1down_vx_u8m8_tumu(__VA_ARGS__)
23291
#define vslide1down_vx_u16mf4_m(...) __riscv_vslide1down_vx_u16mf4_tumu(__VA_ARGS__)
23292
#define vslide1down_vx_u16mf2_m(...) __riscv_vslide1down_vx_u16mf2_tumu(__VA_ARGS__)
23293
#define vslide1down_vx_u16m1_m(...) __riscv_vslide1down_vx_u16m1_tumu(__VA_ARGS__)
23294
#define vslide1down_vx_u16m2_m(...) __riscv_vslide1down_vx_u16m2_tumu(__VA_ARGS__)
23295
#define vslide1down_vx_u16m4_m(...) __riscv_vslide1down_vx_u16m4_tumu(__VA_ARGS__)
23296
#define vslide1down_vx_u16m8_m(...) __riscv_vslide1down_vx_u16m8_tumu(__VA_ARGS__)
23297
#define vslide1down_vx_u32mf2_m(...) __riscv_vslide1down_vx_u32mf2_tumu(__VA_ARGS__)
23298
#define vslide1down_vx_u32m1_m(...) __riscv_vslide1down_vx_u32m1_tumu(__VA_ARGS__)
23299
#define vslide1down_vx_u32m2_m(...) __riscv_vslide1down_vx_u32m2_tumu(__VA_ARGS__)
23300
#define vslide1down_vx_u32m4_m(...) __riscv_vslide1down_vx_u32m4_tumu(__VA_ARGS__)
23301
#define vslide1down_vx_u32m8_m(...) __riscv_vslide1down_vx_u32m8_tumu(__VA_ARGS__)
23302
#define vslide1down_vx_u64m1_m(...) __riscv_vslide1down_vx_u64m1_tumu(__VA_ARGS__)
23303
#define vslide1down_vx_u64m2_m(...) __riscv_vslide1down_vx_u64m2_tumu(__VA_ARGS__)
23304
#define vslide1down_vx_u64m4_m(...) __riscv_vslide1down_vx_u64m4_tumu(__VA_ARGS__)
23305
#define vslide1down_vx_u64m8_m(...) __riscv_vslide1down_vx_u64m8_tumu(__VA_ARGS__)
23306
#define vrgather_vv_f16mf4(...) __riscv_vrgather_vv_f16mf4(__VA_ARGS__)
23307
#define vrgather_vx_f16mf4(...) __riscv_vrgather_vx_f16mf4(__VA_ARGS__)
23308
#define vrgather_vv_f16mf2(...) __riscv_vrgather_vv_f16mf2(__VA_ARGS__)
23309
#define vrgather_vx_f16mf2(...) __riscv_vrgather_vx_f16mf2(__VA_ARGS__)
23310
#define vrgather_vv_f16m1(...) __riscv_vrgather_vv_f16m1(__VA_ARGS__)
23311
#define vrgather_vx_f16m1(...) __riscv_vrgather_vx_f16m1(__VA_ARGS__)
23312
#define vrgather_vv_f16m2(...) __riscv_vrgather_vv_f16m2(__VA_ARGS__)
23313
#define vrgather_vx_f16m2(...) __riscv_vrgather_vx_f16m2(__VA_ARGS__)
23314
#define vrgather_vv_f16m4(...) __riscv_vrgather_vv_f16m4(__VA_ARGS__)
23315
#define vrgather_vx_f16m4(...) __riscv_vrgather_vx_f16m4(__VA_ARGS__)
23316
#define vrgather_vv_f16m8(...) __riscv_vrgather_vv_f16m8(__VA_ARGS__)
23317
#define vrgather_vx_f16m8(...) __riscv_vrgather_vx_f16m8(__VA_ARGS__)
23318
#define vrgather_vv_f32mf2(...) __riscv_vrgather_vv_f32mf2(__VA_ARGS__)
23319
#define vrgather_vx_f32mf2(...) __riscv_vrgather_vx_f32mf2(__VA_ARGS__)
23320
#define vrgather_vv_f32m1(...) __riscv_vrgather_vv_f32m1(__VA_ARGS__)
23321
#define vrgather_vx_f32m1(...) __riscv_vrgather_vx_f32m1(__VA_ARGS__)
23322
#define vrgather_vv_f32m2(...) __riscv_vrgather_vv_f32m2(__VA_ARGS__)
23323
#define vrgather_vx_f32m2(...) __riscv_vrgather_vx_f32m2(__VA_ARGS__)
23324
#define vrgather_vv_f32m4(...) __riscv_vrgather_vv_f32m4(__VA_ARGS__)
23325
#define vrgather_vx_f32m4(...) __riscv_vrgather_vx_f32m4(__VA_ARGS__)
23326
#define vrgather_vv_f32m8(...) __riscv_vrgather_vv_f32m8(__VA_ARGS__)
23327
#define vrgather_vx_f32m8(...) __riscv_vrgather_vx_f32m8(__VA_ARGS__)
23328
#define vrgather_vv_f64m1(...) __riscv_vrgather_vv_f64m1(__VA_ARGS__)
23329
#define vrgather_vx_f64m1(...) __riscv_vrgather_vx_f64m1(__VA_ARGS__)
23330
#define vrgather_vv_f64m2(...) __riscv_vrgather_vv_f64m2(__VA_ARGS__)
23331
#define vrgather_vx_f64m2(...) __riscv_vrgather_vx_f64m2(__VA_ARGS__)
23332
#define vrgather_vv_f64m4(...) __riscv_vrgather_vv_f64m4(__VA_ARGS__)
23333
#define vrgather_vx_f64m4(...) __riscv_vrgather_vx_f64m4(__VA_ARGS__)
23334
#define vrgather_vv_f64m8(...) __riscv_vrgather_vv_f64m8(__VA_ARGS__)
23335
#define vrgather_vx_f64m8(...) __riscv_vrgather_vx_f64m8(__VA_ARGS__)
23336
#define vrgatherei16_vv_f16mf4(...) __riscv_vrgatherei16_vv_f16mf4(__VA_ARGS__)
23337
#define vrgatherei16_vv_f16mf2(...) __riscv_vrgatherei16_vv_f16mf2(__VA_ARGS__)
23338
#define vrgatherei16_vv_f16m1(...) __riscv_vrgatherei16_vv_f16m1(__VA_ARGS__)
23339
#define vrgatherei16_vv_f16m2(...) __riscv_vrgatherei16_vv_f16m2(__VA_ARGS__)
23340
#define vrgatherei16_vv_f16m4(...) __riscv_vrgatherei16_vv_f16m4(__VA_ARGS__)
23341
#define vrgatherei16_vv_f16m8(...) __riscv_vrgatherei16_vv_f16m8(__VA_ARGS__)
23342
#define vrgatherei16_vv_f32mf2(...) __riscv_vrgatherei16_vv_f32mf2(__VA_ARGS__)
23343
#define vrgatherei16_vv_f32m1(...) __riscv_vrgatherei16_vv_f32m1(__VA_ARGS__)
23344
#define vrgatherei16_vv_f32m2(...) __riscv_vrgatherei16_vv_f32m2(__VA_ARGS__)
23345
#define vrgatherei16_vv_f32m4(...) __riscv_vrgatherei16_vv_f32m4(__VA_ARGS__)
23346
#define vrgatherei16_vv_f32m8(...) __riscv_vrgatherei16_vv_f32m8(__VA_ARGS__)
23347
#define vrgatherei16_vv_f64m1(...) __riscv_vrgatherei16_vv_f64m1(__VA_ARGS__)
23348
#define vrgatherei16_vv_f64m2(...) __riscv_vrgatherei16_vv_f64m2(__VA_ARGS__)
23349
#define vrgatherei16_vv_f64m4(...) __riscv_vrgatherei16_vv_f64m4(__VA_ARGS__)
23350
#define vrgatherei16_vv_f64m8(...) __riscv_vrgatherei16_vv_f64m8(__VA_ARGS__)
23351
#define vrgather_vv_i8mf8(...) __riscv_vrgather_vv_i8mf8(__VA_ARGS__)
23352
#define vrgather_vx_i8mf8(...) __riscv_vrgather_vx_i8mf8(__VA_ARGS__)
23353
#define vrgather_vv_i8mf4(...) __riscv_vrgather_vv_i8mf4(__VA_ARGS__)
23354
#define vrgather_vx_i8mf4(...) __riscv_vrgather_vx_i8mf4(__VA_ARGS__)
23355
#define vrgather_vv_i8mf2(...) __riscv_vrgather_vv_i8mf2(__VA_ARGS__)
23356
#define vrgather_vx_i8mf2(...) __riscv_vrgather_vx_i8mf2(__VA_ARGS__)
23357
#define vrgather_vv_i8m1(...) __riscv_vrgather_vv_i8m1(__VA_ARGS__)
23358
#define vrgather_vx_i8m1(...) __riscv_vrgather_vx_i8m1(__VA_ARGS__)
23359
#define vrgather_vv_i8m2(...) __riscv_vrgather_vv_i8m2(__VA_ARGS__)
23360
#define vrgather_vx_i8m2(...) __riscv_vrgather_vx_i8m2(__VA_ARGS__)
23361
#define vrgather_vv_i8m4(...) __riscv_vrgather_vv_i8m4(__VA_ARGS__)
23362
#define vrgather_vx_i8m4(...) __riscv_vrgather_vx_i8m4(__VA_ARGS__)
23363
#define vrgather_vv_i8m8(...) __riscv_vrgather_vv_i8m8(__VA_ARGS__)
23364
#define vrgather_vx_i8m8(...) __riscv_vrgather_vx_i8m8(__VA_ARGS__)
23365
#define vrgather_vv_i16mf4(...) __riscv_vrgather_vv_i16mf4(__VA_ARGS__)
23366
#define vrgather_vx_i16mf4(...) __riscv_vrgather_vx_i16mf4(__VA_ARGS__)
23367
#define vrgather_vv_i16mf2(...) __riscv_vrgather_vv_i16mf2(__VA_ARGS__)
23368
#define vrgather_vx_i16mf2(...) __riscv_vrgather_vx_i16mf2(__VA_ARGS__)
23369
#define vrgather_vv_i16m1(...) __riscv_vrgather_vv_i16m1(__VA_ARGS__)
23370
#define vrgather_vx_i16m1(...) __riscv_vrgather_vx_i16m1(__VA_ARGS__)
23371
#define vrgather_vv_i16m2(...) __riscv_vrgather_vv_i16m2(__VA_ARGS__)
23372
#define vrgather_vx_i16m2(...) __riscv_vrgather_vx_i16m2(__VA_ARGS__)
23373
#define vrgather_vv_i16m4(...) __riscv_vrgather_vv_i16m4(__VA_ARGS__)
23374
#define vrgather_vx_i16m4(...) __riscv_vrgather_vx_i16m4(__VA_ARGS__)
23375
#define vrgather_vv_i16m8(...) __riscv_vrgather_vv_i16m8(__VA_ARGS__)
23376
#define vrgather_vx_i16m8(...) __riscv_vrgather_vx_i16m8(__VA_ARGS__)
23377
#define vrgather_vv_i32mf2(...) __riscv_vrgather_vv_i32mf2(__VA_ARGS__)
23378
#define vrgather_vx_i32mf2(...) __riscv_vrgather_vx_i32mf2(__VA_ARGS__)
23379
#define vrgather_vv_i32m1(...) __riscv_vrgather_vv_i32m1(__VA_ARGS__)
23380
#define vrgather_vx_i32m1(...) __riscv_vrgather_vx_i32m1(__VA_ARGS__)
23381
#define vrgather_vv_i32m2(...) __riscv_vrgather_vv_i32m2(__VA_ARGS__)
23382
#define vrgather_vx_i32m2(...) __riscv_vrgather_vx_i32m2(__VA_ARGS__)
23383
#define vrgather_vv_i32m4(...) __riscv_vrgather_vv_i32m4(__VA_ARGS__)
23384
#define vrgather_vx_i32m4(...) __riscv_vrgather_vx_i32m4(__VA_ARGS__)
23385
#define vrgather_vv_i32m8(...) __riscv_vrgather_vv_i32m8(__VA_ARGS__)
23386
#define vrgather_vx_i32m8(...) __riscv_vrgather_vx_i32m8(__VA_ARGS__)
23387
#define vrgather_vv_i64m1(...) __riscv_vrgather_vv_i64m1(__VA_ARGS__)
23388
#define vrgather_vx_i64m1(...) __riscv_vrgather_vx_i64m1(__VA_ARGS__)
23389
#define vrgather_vv_i64m2(...) __riscv_vrgather_vv_i64m2(__VA_ARGS__)
23390
#define vrgather_vx_i64m2(...) __riscv_vrgather_vx_i64m2(__VA_ARGS__)
23391
#define vrgather_vv_i64m4(...) __riscv_vrgather_vv_i64m4(__VA_ARGS__)
23392
#define vrgather_vx_i64m4(...) __riscv_vrgather_vx_i64m4(__VA_ARGS__)
23393
#define vrgather_vv_i64m8(...) __riscv_vrgather_vv_i64m8(__VA_ARGS__)
23394
#define vrgather_vx_i64m8(...) __riscv_vrgather_vx_i64m8(__VA_ARGS__)
23395
#define vrgatherei16_vv_i8mf8(...) __riscv_vrgatherei16_vv_i8mf8(__VA_ARGS__)
23396
#define vrgatherei16_vv_i8mf4(...) __riscv_vrgatherei16_vv_i8mf4(__VA_ARGS__)
23397
#define vrgatherei16_vv_i8mf2(...) __riscv_vrgatherei16_vv_i8mf2(__VA_ARGS__)
23398
#define vrgatherei16_vv_i8m1(...) __riscv_vrgatherei16_vv_i8m1(__VA_ARGS__)
23399
#define vrgatherei16_vv_i8m2(...) __riscv_vrgatherei16_vv_i8m2(__VA_ARGS__)
23400
#define vrgatherei16_vv_i8m4(...) __riscv_vrgatherei16_vv_i8m4(__VA_ARGS__)
23401
#define vrgatherei16_vv_i16mf4(...) __riscv_vrgatherei16_vv_i16mf4(__VA_ARGS__)
23402
#define vrgatherei16_vv_i16mf2(...) __riscv_vrgatherei16_vv_i16mf2(__VA_ARGS__)
23403
#define vrgatherei16_vv_i16m1(...) __riscv_vrgatherei16_vv_i16m1(__VA_ARGS__)
23404
#define vrgatherei16_vv_i16m2(...) __riscv_vrgatherei16_vv_i16m2(__VA_ARGS__)
23405
#define vrgatherei16_vv_i16m4(...) __riscv_vrgatherei16_vv_i16m4(__VA_ARGS__)
23406
#define vrgatherei16_vv_i16m8(...) __riscv_vrgatherei16_vv_i16m8(__VA_ARGS__)
23407
#define vrgatherei16_vv_i32mf2(...) __riscv_vrgatherei16_vv_i32mf2(__VA_ARGS__)
23408
#define vrgatherei16_vv_i32m1(...) __riscv_vrgatherei16_vv_i32m1(__VA_ARGS__)
23409
#define vrgatherei16_vv_i32m2(...) __riscv_vrgatherei16_vv_i32m2(__VA_ARGS__)
23410
#define vrgatherei16_vv_i32m4(...) __riscv_vrgatherei16_vv_i32m4(__VA_ARGS__)
23411
#define vrgatherei16_vv_i32m8(...) __riscv_vrgatherei16_vv_i32m8(__VA_ARGS__)
23412
#define vrgatherei16_vv_i64m1(...) __riscv_vrgatherei16_vv_i64m1(__VA_ARGS__)
23413
#define vrgatherei16_vv_i64m2(...) __riscv_vrgatherei16_vv_i64m2(__VA_ARGS__)
23414
#define vrgatherei16_vv_i64m4(...) __riscv_vrgatherei16_vv_i64m4(__VA_ARGS__)
23415
#define vrgatherei16_vv_i64m8(...) __riscv_vrgatherei16_vv_i64m8(__VA_ARGS__)
23416
#define vrgather_vv_u8mf8(...) __riscv_vrgather_vv_u8mf8(__VA_ARGS__)
23417
#define vrgather_vx_u8mf8(...) __riscv_vrgather_vx_u8mf8(__VA_ARGS__)
23418
#define vrgather_vv_u8mf4(...) __riscv_vrgather_vv_u8mf4(__VA_ARGS__)
23419
#define vrgather_vx_u8mf4(...) __riscv_vrgather_vx_u8mf4(__VA_ARGS__)
23420
#define vrgather_vv_u8mf2(...) __riscv_vrgather_vv_u8mf2(__VA_ARGS__)
23421
#define vrgather_vx_u8mf2(...) __riscv_vrgather_vx_u8mf2(__VA_ARGS__)
23422
#define vrgather_vv_u8m1(...) __riscv_vrgather_vv_u8m1(__VA_ARGS__)
23423
#define vrgather_vx_u8m1(...) __riscv_vrgather_vx_u8m1(__VA_ARGS__)
23424
#define vrgather_vv_u8m2(...) __riscv_vrgather_vv_u8m2(__VA_ARGS__)
23425
#define vrgather_vx_u8m2(...) __riscv_vrgather_vx_u8m2(__VA_ARGS__)
23426
#define vrgather_vv_u8m4(...) __riscv_vrgather_vv_u8m4(__VA_ARGS__)
23427
#define vrgather_vx_u8m4(...) __riscv_vrgather_vx_u8m4(__VA_ARGS__)
23428
#define vrgather_vv_u8m8(...) __riscv_vrgather_vv_u8m8(__VA_ARGS__)
23429
#define vrgather_vx_u8m8(...) __riscv_vrgather_vx_u8m8(__VA_ARGS__)
23430
#define vrgather_vv_u16mf4(...) __riscv_vrgather_vv_u16mf4(__VA_ARGS__)
23431
#define vrgather_vx_u16mf4(...) __riscv_vrgather_vx_u16mf4(__VA_ARGS__)
23432
#define vrgather_vv_u16mf2(...) __riscv_vrgather_vv_u16mf2(__VA_ARGS__)
23433
#define vrgather_vx_u16mf2(...) __riscv_vrgather_vx_u16mf2(__VA_ARGS__)
23434
#define vrgather_vv_u16m1(...) __riscv_vrgather_vv_u16m1(__VA_ARGS__)
23435
#define vrgather_vx_u16m1(...) __riscv_vrgather_vx_u16m1(__VA_ARGS__)
23436
#define vrgather_vv_u16m2(...) __riscv_vrgather_vv_u16m2(__VA_ARGS__)
23437
#define vrgather_vx_u16m2(...) __riscv_vrgather_vx_u16m2(__VA_ARGS__)
23438
#define vrgather_vv_u16m4(...) __riscv_vrgather_vv_u16m4(__VA_ARGS__)
23439
#define vrgather_vx_u16m4(...) __riscv_vrgather_vx_u16m4(__VA_ARGS__)
23440
#define vrgather_vv_u16m8(...) __riscv_vrgather_vv_u16m8(__VA_ARGS__)
23441
#define vrgather_vx_u16m8(...) __riscv_vrgather_vx_u16m8(__VA_ARGS__)
23442
#define vrgather_vv_u32mf2(...) __riscv_vrgather_vv_u32mf2(__VA_ARGS__)
23443
#define vrgather_vx_u32mf2(...) __riscv_vrgather_vx_u32mf2(__VA_ARGS__)
23444
#define vrgather_vv_u32m1(...) __riscv_vrgather_vv_u32m1(__VA_ARGS__)
23445
#define vrgather_vx_u32m1(...) __riscv_vrgather_vx_u32m1(__VA_ARGS__)
23446
#define vrgather_vv_u32m2(...) __riscv_vrgather_vv_u32m2(__VA_ARGS__)
23447
#define vrgather_vx_u32m2(...) __riscv_vrgather_vx_u32m2(__VA_ARGS__)
23448
#define vrgather_vv_u32m4(...) __riscv_vrgather_vv_u32m4(__VA_ARGS__)
23449
#define vrgather_vx_u32m4(...) __riscv_vrgather_vx_u32m4(__VA_ARGS__)
23450
#define vrgather_vv_u32m8(...) __riscv_vrgather_vv_u32m8(__VA_ARGS__)
23451
#define vrgather_vx_u32m8(...) __riscv_vrgather_vx_u32m8(__VA_ARGS__)
23452
#define vrgather_vv_u64m1(...) __riscv_vrgather_vv_u64m1(__VA_ARGS__)
23453
#define vrgather_vx_u64m1(...) __riscv_vrgather_vx_u64m1(__VA_ARGS__)
23454
#define vrgather_vv_u64m2(...) __riscv_vrgather_vv_u64m2(__VA_ARGS__)
23455
#define vrgather_vx_u64m2(...) __riscv_vrgather_vx_u64m2(__VA_ARGS__)
23456
#define vrgather_vv_u64m4(...) __riscv_vrgather_vv_u64m4(__VA_ARGS__)
23457
#define vrgather_vx_u64m4(...) __riscv_vrgather_vx_u64m4(__VA_ARGS__)
23458
#define vrgather_vv_u64m8(...) __riscv_vrgather_vv_u64m8(__VA_ARGS__)
23459
#define vrgather_vx_u64m8(...) __riscv_vrgather_vx_u64m8(__VA_ARGS__)
23460
#define vrgatherei16_vv_u8mf8(...) __riscv_vrgatherei16_vv_u8mf8(__VA_ARGS__)
23461
#define vrgatherei16_vv_u8mf4(...) __riscv_vrgatherei16_vv_u8mf4(__VA_ARGS__)
23462
#define vrgatherei16_vv_u8mf2(...) __riscv_vrgatherei16_vv_u8mf2(__VA_ARGS__)
23463
#define vrgatherei16_vv_u8m1(...) __riscv_vrgatherei16_vv_u8m1(__VA_ARGS__)
23464
#define vrgatherei16_vv_u8m2(...) __riscv_vrgatherei16_vv_u8m2(__VA_ARGS__)
23465
#define vrgatherei16_vv_u8m4(...) __riscv_vrgatherei16_vv_u8m4(__VA_ARGS__)
23466
#define vrgatherei16_vv_u16mf4(...) __riscv_vrgatherei16_vv_u16mf4(__VA_ARGS__)
23467
#define vrgatherei16_vv_u16mf2(...) __riscv_vrgatherei16_vv_u16mf2(__VA_ARGS__)
23468
#define vrgatherei16_vv_u16m1(...) __riscv_vrgatherei16_vv_u16m1(__VA_ARGS__)
23469
#define vrgatherei16_vv_u16m2(...) __riscv_vrgatherei16_vv_u16m2(__VA_ARGS__)
23470
#define vrgatherei16_vv_u16m4(...) __riscv_vrgatherei16_vv_u16m4(__VA_ARGS__)
23471
#define vrgatherei16_vv_u16m8(...) __riscv_vrgatherei16_vv_u16m8(__VA_ARGS__)
23472
#define vrgatherei16_vv_u32mf2(...) __riscv_vrgatherei16_vv_u32mf2(__VA_ARGS__)
23473
#define vrgatherei16_vv_u32m1(...) __riscv_vrgatherei16_vv_u32m1(__VA_ARGS__)
23474
#define vrgatherei16_vv_u32m2(...) __riscv_vrgatherei16_vv_u32m2(__VA_ARGS__)
23475
#define vrgatherei16_vv_u32m4(...) __riscv_vrgatherei16_vv_u32m4(__VA_ARGS__)
23476
#define vrgatherei16_vv_u32m8(...) __riscv_vrgatherei16_vv_u32m8(__VA_ARGS__)
23477
#define vrgatherei16_vv_u64m1(...) __riscv_vrgatherei16_vv_u64m1(__VA_ARGS__)
23478
#define vrgatherei16_vv_u64m2(...) __riscv_vrgatherei16_vv_u64m2(__VA_ARGS__)
23479
#define vrgatherei16_vv_u64m4(...) __riscv_vrgatherei16_vv_u64m4(__VA_ARGS__)
23480
#define vrgatherei16_vv_u64m8(...) __riscv_vrgatherei16_vv_u64m8(__VA_ARGS__)
23481
// masked functions
23482
#define vrgather_vv_f16mf4_m(...) __riscv_vrgather_vv_f16mf4_tumu(__VA_ARGS__)
23483
#define vrgather_vx_f16mf4_m(...) __riscv_vrgather_vx_f16mf4_tumu(__VA_ARGS__)
23484
#define vrgather_vv_f16mf2_m(...) __riscv_vrgather_vv_f16mf2_tumu(__VA_ARGS__)
23485
#define vrgather_vx_f16mf2_m(...) __riscv_vrgather_vx_f16mf2_tumu(__VA_ARGS__)
23486
#define vrgather_vv_f16m1_m(...) __riscv_vrgather_vv_f16m1_tumu(__VA_ARGS__)
23487
#define vrgather_vx_f16m1_m(...) __riscv_vrgather_vx_f16m1_tumu(__VA_ARGS__)
23488
#define vrgather_vv_f16m2_m(...) __riscv_vrgather_vv_f16m2_tumu(__VA_ARGS__)
23489
#define vrgather_vx_f16m2_m(...) __riscv_vrgather_vx_f16m2_tumu(__VA_ARGS__)
23490
#define vrgather_vv_f16m4_m(...) __riscv_vrgather_vv_f16m4_tumu(__VA_ARGS__)
23491
#define vrgather_vx_f16m4_m(...) __riscv_vrgather_vx_f16m4_tumu(__VA_ARGS__)
23492
#define vrgather_vv_f16m8_m(...) __riscv_vrgather_vv_f16m8_tumu(__VA_ARGS__)
23493
#define vrgather_vx_f16m8_m(...) __riscv_vrgather_vx_f16m8_tumu(__VA_ARGS__)
23494
#define vrgather_vv_f32mf2_m(...) __riscv_vrgather_vv_f32mf2_tumu(__VA_ARGS__)
23495
#define vrgather_vx_f32mf2_m(...) __riscv_vrgather_vx_f32mf2_tumu(__VA_ARGS__)
23496
#define vrgather_vv_f32m1_m(...) __riscv_vrgather_vv_f32m1_tumu(__VA_ARGS__)
23497
#define vrgather_vx_f32m1_m(...) __riscv_vrgather_vx_f32m1_tumu(__VA_ARGS__)
23498
#define vrgather_vv_f32m2_m(...) __riscv_vrgather_vv_f32m2_tumu(__VA_ARGS__)
23499
#define vrgather_vx_f32m2_m(...) __riscv_vrgather_vx_f32m2_tumu(__VA_ARGS__)
23500
#define vrgather_vv_f32m4_m(...) __riscv_vrgather_vv_f32m4_tumu(__VA_ARGS__)
23501
#define vrgather_vx_f32m4_m(...) __riscv_vrgather_vx_f32m4_tumu(__VA_ARGS__)
23502
#define vrgather_vv_f32m8_m(...) __riscv_vrgather_vv_f32m8_tumu(__VA_ARGS__)
23503
#define vrgather_vx_f32m8_m(...) __riscv_vrgather_vx_f32m8_tumu(__VA_ARGS__)
23504
#define vrgather_vv_f64m1_m(...) __riscv_vrgather_vv_f64m1_tumu(__VA_ARGS__)
23505
#define vrgather_vx_f64m1_m(...) __riscv_vrgather_vx_f64m1_tumu(__VA_ARGS__)
23506
#define vrgather_vv_f64m2_m(...) __riscv_vrgather_vv_f64m2_tumu(__VA_ARGS__)
23507
#define vrgather_vx_f64m2_m(...) __riscv_vrgather_vx_f64m2_tumu(__VA_ARGS__)
23508
#define vrgather_vv_f64m4_m(...) __riscv_vrgather_vv_f64m4_tumu(__VA_ARGS__)
23509
#define vrgather_vx_f64m4_m(...) __riscv_vrgather_vx_f64m4_tumu(__VA_ARGS__)
23510
#define vrgather_vv_f64m8_m(...) __riscv_vrgather_vv_f64m8_tumu(__VA_ARGS__)
23511
#define vrgather_vx_f64m8_m(...) __riscv_vrgather_vx_f64m8_tumu(__VA_ARGS__)
23512
#define vrgatherei16_vv_f16mf4_m(...) __riscv_vrgatherei16_vv_f16mf4_tumu(__VA_ARGS__)
23513
#define vrgatherei16_vv_f16mf2_m(...) __riscv_vrgatherei16_vv_f16mf2_tumu(__VA_ARGS__)
23514
#define vrgatherei16_vv_f16m1_m(...) __riscv_vrgatherei16_vv_f16m1_tumu(__VA_ARGS__)
23515
#define vrgatherei16_vv_f16m2_m(...) __riscv_vrgatherei16_vv_f16m2_tumu(__VA_ARGS__)
23516
#define vrgatherei16_vv_f16m4_m(...) __riscv_vrgatherei16_vv_f16m4_tumu(__VA_ARGS__)
23517
#define vrgatherei16_vv_f16m8_m(...) __riscv_vrgatherei16_vv_f16m8_tumu(__VA_ARGS__)
23518
#define vrgatherei16_vv_f32mf2_m(...) __riscv_vrgatherei16_vv_f32mf2_tumu(__VA_ARGS__)
23519
#define vrgatherei16_vv_f32m1_m(...) __riscv_vrgatherei16_vv_f32m1_tumu(__VA_ARGS__)
23520
#define vrgatherei16_vv_f32m2_m(...) __riscv_vrgatherei16_vv_f32m2_tumu(__VA_ARGS__)
23521
#define vrgatherei16_vv_f32m4_m(...) __riscv_vrgatherei16_vv_f32m4_tumu(__VA_ARGS__)
23522
#define vrgatherei16_vv_f32m8_m(...) __riscv_vrgatherei16_vv_f32m8_tumu(__VA_ARGS__)
23523
#define vrgatherei16_vv_f64m1_m(...) __riscv_vrgatherei16_vv_f64m1_tumu(__VA_ARGS__)
23524
#define vrgatherei16_vv_f64m2_m(...) __riscv_vrgatherei16_vv_f64m2_tumu(__VA_ARGS__)
23525
#define vrgatherei16_vv_f64m4_m(...) __riscv_vrgatherei16_vv_f64m4_tumu(__VA_ARGS__)
23526
#define vrgatherei16_vv_f64m8_m(...) __riscv_vrgatherei16_vv_f64m8_tumu(__VA_ARGS__)
23527
#define vrgather_vv_i8mf8_m(...) __riscv_vrgather_vv_i8mf8_tumu(__VA_ARGS__)
23528
#define vrgather_vx_i8mf8_m(...) __riscv_vrgather_vx_i8mf8_tumu(__VA_ARGS__)
23529
#define vrgather_vv_i8mf4_m(...) __riscv_vrgather_vv_i8mf4_tumu(__VA_ARGS__)
23530
#define vrgather_vx_i8mf4_m(...) __riscv_vrgather_vx_i8mf4_tumu(__VA_ARGS__)
23531
#define vrgather_vv_i8mf2_m(...) __riscv_vrgather_vv_i8mf2_tumu(__VA_ARGS__)
23532
#define vrgather_vx_i8mf2_m(...) __riscv_vrgather_vx_i8mf2_tumu(__VA_ARGS__)
23533
#define vrgather_vv_i8m1_m(...) __riscv_vrgather_vv_i8m1_tumu(__VA_ARGS__)
23534
#define vrgather_vx_i8m1_m(...) __riscv_vrgather_vx_i8m1_tumu(__VA_ARGS__)
23535
#define vrgather_vv_i8m2_m(...) __riscv_vrgather_vv_i8m2_tumu(__VA_ARGS__)
23536
#define vrgather_vx_i8m2_m(...) __riscv_vrgather_vx_i8m2_tumu(__VA_ARGS__)
23537
#define vrgather_vv_i8m4_m(...) __riscv_vrgather_vv_i8m4_tumu(__VA_ARGS__)
23538
#define vrgather_vx_i8m4_m(...) __riscv_vrgather_vx_i8m4_tumu(__VA_ARGS__)
23539
#define vrgather_vv_i8m8_m(...) __riscv_vrgather_vv_i8m8_tumu(__VA_ARGS__)
23540
#define vrgather_vx_i8m8_m(...) __riscv_vrgather_vx_i8m8_tumu(__VA_ARGS__)
23541
#define vrgather_vv_i16mf4_m(...) __riscv_vrgather_vv_i16mf4_tumu(__VA_ARGS__)
23542
#define vrgather_vx_i16mf4_m(...) __riscv_vrgather_vx_i16mf4_tumu(__VA_ARGS__)
23543
#define vrgather_vv_i16mf2_m(...) __riscv_vrgather_vv_i16mf2_tumu(__VA_ARGS__)
23544
#define vrgather_vx_i16mf2_m(...) __riscv_vrgather_vx_i16mf2_tumu(__VA_ARGS__)
23545
#define vrgather_vv_i16m1_m(...) __riscv_vrgather_vv_i16m1_tumu(__VA_ARGS__)
23546
#define vrgather_vx_i16m1_m(...) __riscv_vrgather_vx_i16m1_tumu(__VA_ARGS__)
23547
#define vrgather_vv_i16m2_m(...) __riscv_vrgather_vv_i16m2_tumu(__VA_ARGS__)
23548
#define vrgather_vx_i16m2_m(...) __riscv_vrgather_vx_i16m2_tumu(__VA_ARGS__)
23549
#define vrgather_vv_i16m4_m(...) __riscv_vrgather_vv_i16m4_tumu(__VA_ARGS__)
23550
#define vrgather_vx_i16m4_m(...) __riscv_vrgather_vx_i16m4_tumu(__VA_ARGS__)
23551
#define vrgather_vv_i16m8_m(...) __riscv_vrgather_vv_i16m8_tumu(__VA_ARGS__)
23552
#define vrgather_vx_i16m8_m(...) __riscv_vrgather_vx_i16m8_tumu(__VA_ARGS__)
23553
#define vrgather_vv_i32mf2_m(...) __riscv_vrgather_vv_i32mf2_tumu(__VA_ARGS__)
23554
#define vrgather_vx_i32mf2_m(...) __riscv_vrgather_vx_i32mf2_tumu(__VA_ARGS__)
23555
#define vrgather_vv_i32m1_m(...) __riscv_vrgather_vv_i32m1_tumu(__VA_ARGS__)
23556
#define vrgather_vx_i32m1_m(...) __riscv_vrgather_vx_i32m1_tumu(__VA_ARGS__)
23557
#define vrgather_vv_i32m2_m(...) __riscv_vrgather_vv_i32m2_tumu(__VA_ARGS__)
23558
#define vrgather_vx_i32m2_m(...) __riscv_vrgather_vx_i32m2_tumu(__VA_ARGS__)
23559
#define vrgather_vv_i32m4_m(...) __riscv_vrgather_vv_i32m4_tumu(__VA_ARGS__)
23560
#define vrgather_vx_i32m4_m(...) __riscv_vrgather_vx_i32m4_tumu(__VA_ARGS__)
23561
#define vrgather_vv_i32m8_m(...) __riscv_vrgather_vv_i32m8_tumu(__VA_ARGS__)
23562
#define vrgather_vx_i32m8_m(...) __riscv_vrgather_vx_i32m8_tumu(__VA_ARGS__)
23563
#define vrgather_vv_i64m1_m(...) __riscv_vrgather_vv_i64m1_tumu(__VA_ARGS__)
23564
#define vrgather_vx_i64m1_m(...) __riscv_vrgather_vx_i64m1_tumu(__VA_ARGS__)
23565
#define vrgather_vv_i64m2_m(...) __riscv_vrgather_vv_i64m2_tumu(__VA_ARGS__)
23566
#define vrgather_vx_i64m2_m(...) __riscv_vrgather_vx_i64m2_tumu(__VA_ARGS__)
23567
#define vrgather_vv_i64m4_m(...) __riscv_vrgather_vv_i64m4_tumu(__VA_ARGS__)
23568
#define vrgather_vx_i64m4_m(...) __riscv_vrgather_vx_i64m4_tumu(__VA_ARGS__)
23569
#define vrgather_vv_i64m8_m(...) __riscv_vrgather_vv_i64m8_tumu(__VA_ARGS__)
23570
#define vrgather_vx_i64m8_m(...) __riscv_vrgather_vx_i64m8_tumu(__VA_ARGS__)
23571
#define vrgatherei16_vv_i8mf8_m(...) __riscv_vrgatherei16_vv_i8mf8_tumu(__VA_ARGS__)
23572
#define vrgatherei16_vv_i8mf4_m(...) __riscv_vrgatherei16_vv_i8mf4_tumu(__VA_ARGS__)
23573
#define vrgatherei16_vv_i8mf2_m(...) __riscv_vrgatherei16_vv_i8mf2_tumu(__VA_ARGS__)
23574
#define vrgatherei16_vv_i8m1_m(...) __riscv_vrgatherei16_vv_i8m1_tumu(__VA_ARGS__)
23575
#define vrgatherei16_vv_i8m2_m(...) __riscv_vrgatherei16_vv_i8m2_tumu(__VA_ARGS__)
23576
#define vrgatherei16_vv_i8m4_m(...) __riscv_vrgatherei16_vv_i8m4_tumu(__VA_ARGS__)
23577
#define vrgatherei16_vv_i16mf4_m(...) __riscv_vrgatherei16_vv_i16mf4_tumu(__VA_ARGS__)
23578
#define vrgatherei16_vv_i16mf2_m(...) __riscv_vrgatherei16_vv_i16mf2_tumu(__VA_ARGS__)
23579
#define vrgatherei16_vv_i16m1_m(...) __riscv_vrgatherei16_vv_i16m1_tumu(__VA_ARGS__)
23580
#define vrgatherei16_vv_i16m2_m(...) __riscv_vrgatherei16_vv_i16m2_tumu(__VA_ARGS__)
23581
#define vrgatherei16_vv_i16m4_m(...) __riscv_vrgatherei16_vv_i16m4_tumu(__VA_ARGS__)
23582
#define vrgatherei16_vv_i16m8_m(...) __riscv_vrgatherei16_vv_i16m8_tumu(__VA_ARGS__)
23583
#define vrgatherei16_vv_i32mf2_m(...) __riscv_vrgatherei16_vv_i32mf2_tumu(__VA_ARGS__)
23584
#define vrgatherei16_vv_i32m1_m(...) __riscv_vrgatherei16_vv_i32m1_tumu(__VA_ARGS__)
23585
#define vrgatherei16_vv_i32m2_m(...) __riscv_vrgatherei16_vv_i32m2_tumu(__VA_ARGS__)
23586
#define vrgatherei16_vv_i32m4_m(...) __riscv_vrgatherei16_vv_i32m4_tumu(__VA_ARGS__)
23587
#define vrgatherei16_vv_i32m8_m(...) __riscv_vrgatherei16_vv_i32m8_tumu(__VA_ARGS__)
23588
#define vrgatherei16_vv_i64m1_m(...) __riscv_vrgatherei16_vv_i64m1_tumu(__VA_ARGS__)
23589
#define vrgatherei16_vv_i64m2_m(...) __riscv_vrgatherei16_vv_i64m2_tumu(__VA_ARGS__)
23590
#define vrgatherei16_vv_i64m4_m(...) __riscv_vrgatherei16_vv_i64m4_tumu(__VA_ARGS__)
23591
#define vrgatherei16_vv_i64m8_m(...) __riscv_vrgatherei16_vv_i64m8_tumu(__VA_ARGS__)
23592
#define vrgather_vv_u8mf8_m(...) __riscv_vrgather_vv_u8mf8_tumu(__VA_ARGS__)
23593
#define vrgather_vx_u8mf8_m(...) __riscv_vrgather_vx_u8mf8_tumu(__VA_ARGS__)
23594
#define vrgather_vv_u8mf4_m(...) __riscv_vrgather_vv_u8mf4_tumu(__VA_ARGS__)
23595
#define vrgather_vx_u8mf4_m(...) __riscv_vrgather_vx_u8mf4_tumu(__VA_ARGS__)
23596
#define vrgather_vv_u8mf2_m(...) __riscv_vrgather_vv_u8mf2_tumu(__VA_ARGS__)
23597
#define vrgather_vx_u8mf2_m(...) __riscv_vrgather_vx_u8mf2_tumu(__VA_ARGS__)
23598
#define vrgather_vv_u8m1_m(...) __riscv_vrgather_vv_u8m1_tumu(__VA_ARGS__)
23599
#define vrgather_vx_u8m1_m(...) __riscv_vrgather_vx_u8m1_tumu(__VA_ARGS__)
23600
#define vrgather_vv_u8m2_m(...) __riscv_vrgather_vv_u8m2_tumu(__VA_ARGS__)
23601
#define vrgather_vx_u8m2_m(...) __riscv_vrgather_vx_u8m2_tumu(__VA_ARGS__)
23602
#define vrgather_vv_u8m4_m(...) __riscv_vrgather_vv_u8m4_tumu(__VA_ARGS__)
23603
#define vrgather_vx_u8m4_m(...) __riscv_vrgather_vx_u8m4_tumu(__VA_ARGS__)
23604
#define vrgather_vv_u8m8_m(...) __riscv_vrgather_vv_u8m8_tumu(__VA_ARGS__)
23605
#define vrgather_vx_u8m8_m(...) __riscv_vrgather_vx_u8m8_tumu(__VA_ARGS__)
23606
#define vrgather_vv_u16mf4_m(...) __riscv_vrgather_vv_u16mf4_tumu(__VA_ARGS__)
23607
#define vrgather_vx_u16mf4_m(...) __riscv_vrgather_vx_u16mf4_tumu(__VA_ARGS__)
23608
#define vrgather_vv_u16mf2_m(...) __riscv_vrgather_vv_u16mf2_tumu(__VA_ARGS__)
23609
#define vrgather_vx_u16mf2_m(...) __riscv_vrgather_vx_u16mf2_tumu(__VA_ARGS__)
23610
#define vrgather_vv_u16m1_m(...) __riscv_vrgather_vv_u16m1_tumu(__VA_ARGS__)
23611
#define vrgather_vx_u16m1_m(...) __riscv_vrgather_vx_u16m1_tumu(__VA_ARGS__)
23612
#define vrgather_vv_u16m2_m(...) __riscv_vrgather_vv_u16m2_tumu(__VA_ARGS__)
23613
#define vrgather_vx_u16m2_m(...) __riscv_vrgather_vx_u16m2_tumu(__VA_ARGS__)
23614
#define vrgather_vv_u16m4_m(...) __riscv_vrgather_vv_u16m4_tumu(__VA_ARGS__)
23615
#define vrgather_vx_u16m4_m(...) __riscv_vrgather_vx_u16m4_tumu(__VA_ARGS__)
23616
#define vrgather_vv_u16m8_m(...) __riscv_vrgather_vv_u16m8_tumu(__VA_ARGS__)
23617
#define vrgather_vx_u16m8_m(...) __riscv_vrgather_vx_u16m8_tumu(__VA_ARGS__)
23618
#define vrgather_vv_u32mf2_m(...) __riscv_vrgather_vv_u32mf2_tumu(__VA_ARGS__)
23619
#define vrgather_vx_u32mf2_m(...) __riscv_vrgather_vx_u32mf2_tumu(__VA_ARGS__)
23620
#define vrgather_vv_u32m1_m(...) __riscv_vrgather_vv_u32m1_tumu(__VA_ARGS__)
23621
#define vrgather_vx_u32m1_m(...) __riscv_vrgather_vx_u32m1_tumu(__VA_ARGS__)
23622
#define vrgather_vv_u32m2_m(...) __riscv_vrgather_vv_u32m2_tumu(__VA_ARGS__)
23623
#define vrgather_vx_u32m2_m(...) __riscv_vrgather_vx_u32m2_tumu(__VA_ARGS__)
23624
#define vrgather_vv_u32m4_m(...) __riscv_vrgather_vv_u32m4_tumu(__VA_ARGS__)
23625
#define vrgather_vx_u32m4_m(...) __riscv_vrgather_vx_u32m4_tumu(__VA_ARGS__)
23626
#define vrgather_vv_u32m8_m(...) __riscv_vrgather_vv_u32m8_tumu(__VA_ARGS__)
23627
#define vrgather_vx_u32m8_m(...) __riscv_vrgather_vx_u32m8_tumu(__VA_ARGS__)
23628
#define vrgather_vv_u64m1_m(...) __riscv_vrgather_vv_u64m1_tumu(__VA_ARGS__)
23629
#define vrgather_vx_u64m1_m(...) __riscv_vrgather_vx_u64m1_tumu(__VA_ARGS__)
23630
#define vrgather_vv_u64m2_m(...) __riscv_vrgather_vv_u64m2_tumu(__VA_ARGS__)
23631
#define vrgather_vx_u64m2_m(...) __riscv_vrgather_vx_u64m2_tumu(__VA_ARGS__)
23632
#define vrgather_vv_u64m4_m(...) __riscv_vrgather_vv_u64m4_tumu(__VA_ARGS__)
23633
#define vrgather_vx_u64m4_m(...) __riscv_vrgather_vx_u64m4_tumu(__VA_ARGS__)
23634
#define vrgather_vv_u64m8_m(...) __riscv_vrgather_vv_u64m8_tumu(__VA_ARGS__)
23635
#define vrgather_vx_u64m8_m(...) __riscv_vrgather_vx_u64m8_tumu(__VA_ARGS__)
23636
#define vrgatherei16_vv_u8mf8_m(...) __riscv_vrgatherei16_vv_u8mf8_tumu(__VA_ARGS__)
23637
#define vrgatherei16_vv_u8mf4_m(...) __riscv_vrgatherei16_vv_u8mf4_tumu(__VA_ARGS__)
23638
#define vrgatherei16_vv_u8mf2_m(...) __riscv_vrgatherei16_vv_u8mf2_tumu(__VA_ARGS__)
23639
#define vrgatherei16_vv_u8m1_m(...) __riscv_vrgatherei16_vv_u8m1_tumu(__VA_ARGS__)
23640
#define vrgatherei16_vv_u8m2_m(...) __riscv_vrgatherei16_vv_u8m2_tumu(__VA_ARGS__)
23641
#define vrgatherei16_vv_u8m4_m(...) __riscv_vrgatherei16_vv_u8m4_tumu(__VA_ARGS__)
23642
#define vrgatherei16_vv_u16mf4_m(...) __riscv_vrgatherei16_vv_u16mf4_tumu(__VA_ARGS__)
23643
#define vrgatherei16_vv_u16mf2_m(...) __riscv_vrgatherei16_vv_u16mf2_tumu(__VA_ARGS__)
23644
#define vrgatherei16_vv_u16m1_m(...) __riscv_vrgatherei16_vv_u16m1_tumu(__VA_ARGS__)
23645
#define vrgatherei16_vv_u16m2_m(...) __riscv_vrgatherei16_vv_u16m2_tumu(__VA_ARGS__)
23646
#define vrgatherei16_vv_u16m4_m(...) __riscv_vrgatherei16_vv_u16m4_tumu(__VA_ARGS__)
23647
#define vrgatherei16_vv_u16m8_m(...) __riscv_vrgatherei16_vv_u16m8_tumu(__VA_ARGS__)
23648
#define vrgatherei16_vv_u32mf2_m(...) __riscv_vrgatherei16_vv_u32mf2_tumu(__VA_ARGS__)
23649
#define vrgatherei16_vv_u32m1_m(...) __riscv_vrgatherei16_vv_u32m1_tumu(__VA_ARGS__)
23650
#define vrgatherei16_vv_u32m2_m(...) __riscv_vrgatherei16_vv_u32m2_tumu(__VA_ARGS__)
23651
#define vrgatherei16_vv_u32m4_m(...) __riscv_vrgatherei16_vv_u32m4_tumu(__VA_ARGS__)
23652
#define vrgatherei16_vv_u32m8_m(...) __riscv_vrgatherei16_vv_u32m8_tumu(__VA_ARGS__)
23653
#define vrgatherei16_vv_u64m1_m(...) __riscv_vrgatherei16_vv_u64m1_tumu(__VA_ARGS__)
23654
#define vrgatherei16_vv_u64m2_m(...) __riscv_vrgatherei16_vv_u64m2_tumu(__VA_ARGS__)
23655
#define vrgatherei16_vv_u64m4_m(...) __riscv_vrgatherei16_vv_u64m4_tumu(__VA_ARGS__)
23656
#define vrgatherei16_vv_u64m8_m(...) __riscv_vrgatherei16_vv_u64m8_tumu(__VA_ARGS__)
23657
#define vcompress_vm_f16mf4(mask, dest, src, vl) __riscv_vcompress_vm_f16mf4_tu((dest), (src), (mask), (vl))
23658
#define vcompress_vm_f16mf2(mask, dest, src, vl) __riscv_vcompress_vm_f16mf2_tu((dest), (src), (mask), (vl))
23659
#define vcompress_vm_f16m1(mask, dest, src, vl) __riscv_vcompress_vm_f16m1_tu((dest), (src), (mask), (vl))
23660
#define vcompress_vm_f16m2(mask, dest, src, vl) __riscv_vcompress_vm_f16m2_tu((dest), (src), (mask), (vl))
23661
#define vcompress_vm_f16m4(mask, dest, src, vl) __riscv_vcompress_vm_f16m4_tu((dest), (src), (mask), (vl))
23662
#define vcompress_vm_f16m8(mask, dest, src, vl) __riscv_vcompress_vm_f16m8_tu((dest), (src), (mask), (vl))
23663
#define vcompress_vm_f32mf2(mask, dest, src, vl) __riscv_vcompress_vm_f32mf2_tu((dest), (src), (mask), (vl))
23664
#define vcompress_vm_f32m1(mask, dest, src, vl) __riscv_vcompress_vm_f32m1_tu((dest), (src), (mask), (vl))
23665
#define vcompress_vm_f32m2(mask, dest, src, vl) __riscv_vcompress_vm_f32m2_tu((dest), (src), (mask), (vl))
23666
#define vcompress_vm_f32m4(mask, dest, src, vl) __riscv_vcompress_vm_f32m4_tu((dest), (src), (mask), (vl))
23667
#define vcompress_vm_f32m8(mask, dest, src, vl) __riscv_vcompress_vm_f32m8_tu((dest), (src), (mask), (vl))
23668
#define vcompress_vm_f64m1(mask, dest, src, vl) __riscv_vcompress_vm_f64m1_tu((dest), (src), (mask), (vl))
23669
#define vcompress_vm_f64m2(mask, dest, src, vl) __riscv_vcompress_vm_f64m2_tu((dest), (src), (mask), (vl))
23670
#define vcompress_vm_f64m4(mask, dest, src, vl) __riscv_vcompress_vm_f64m4_tu((dest), (src), (mask), (vl))
23671
#define vcompress_vm_f64m8(mask, dest, src, vl) __riscv_vcompress_vm_f64m8_tu((dest), (src), (mask), (vl))
23672
#define vcompress_vm_i8mf8(mask, dest, src, vl) __riscv_vcompress_vm_i8mf8_tu((dest), (src), (mask), (vl))
23673
#define vcompress_vm_i8mf4(mask, dest, src, vl) __riscv_vcompress_vm_i8mf4_tu((dest), (src), (mask), (vl))
23674
#define vcompress_vm_i8mf2(mask, dest, src, vl) __riscv_vcompress_vm_i8mf2_tu((dest), (src), (mask), (vl))
23675
#define vcompress_vm_i8m1(mask, dest, src, vl) __riscv_vcompress_vm_i8m1_tu((dest), (src), (mask), (vl))
23676
#define vcompress_vm_i8m2(mask, dest, src, vl) __riscv_vcompress_vm_i8m2_tu((dest), (src), (mask), (vl))
23677
#define vcompress_vm_i8m4(mask, dest, src, vl) __riscv_vcompress_vm_i8m4_tu((dest), (src), (mask), (vl))
23678
#define vcompress_vm_i8m8(mask, dest, src, vl) __riscv_vcompress_vm_i8m8_tu((dest), (src), (mask), (vl))
23679
#define vcompress_vm_i16mf4(mask, dest, src, vl) __riscv_vcompress_vm_i16mf4_tu((dest), (src), (mask), (vl))
23680
#define vcompress_vm_i16mf2(mask, dest, src, vl) __riscv_vcompress_vm_i16mf2_tu((dest), (src), (mask), (vl))
23681
#define vcompress_vm_i16m1(mask, dest, src, vl) __riscv_vcompress_vm_i16m1_tu((dest), (src), (mask), (vl))
23682
#define vcompress_vm_i16m2(mask, dest, src, vl) __riscv_vcompress_vm_i16m2_tu((dest), (src), (mask), (vl))
23683
#define vcompress_vm_i16m4(mask, dest, src, vl) __riscv_vcompress_vm_i16m4_tu((dest), (src), (mask), (vl))
23684
#define vcompress_vm_i16m8(mask, dest, src, vl) __riscv_vcompress_vm_i16m8_tu((dest), (src), (mask), (vl))
23685
#define vcompress_vm_i32mf2(mask, dest, src, vl) __riscv_vcompress_vm_i32mf2_tu((dest), (src), (mask), (vl))
23686
#define vcompress_vm_i32m1(mask, dest, src, vl) __riscv_vcompress_vm_i32m1_tu((dest), (src), (mask), (vl))
23687
#define vcompress_vm_i32m2(mask, dest, src, vl) __riscv_vcompress_vm_i32m2_tu((dest), (src), (mask), (vl))
23688
#define vcompress_vm_i32m4(mask, dest, src, vl) __riscv_vcompress_vm_i32m4_tu((dest), (src), (mask), (vl))
23689
#define vcompress_vm_i32m8(mask, dest, src, vl) __riscv_vcompress_vm_i32m8_tu((dest), (src), (mask), (vl))
23690
#define vcompress_vm_i64m1(mask, dest, src, vl) __riscv_vcompress_vm_i64m1_tu((dest), (src), (mask), (vl))
23691
#define vcompress_vm_i64m2(mask, dest, src, vl) __riscv_vcompress_vm_i64m2_tu((dest), (src), (mask), (vl))
23692
#define vcompress_vm_i64m4(mask, dest, src, vl) __riscv_vcompress_vm_i64m4_tu((dest), (src), (mask), (vl))
23693
#define vcompress_vm_i64m8(mask, dest, src, vl) __riscv_vcompress_vm_i64m8_tu((dest), (src), (mask), (vl))
23694
#define vcompress_vm_u8mf8(mask, dest, src, vl) __riscv_vcompress_vm_u8mf8_tu((dest), (src), (mask), (vl))
23695
#define vcompress_vm_u8mf4(mask, dest, src, vl) __riscv_vcompress_vm_u8mf4_tu((dest), (src), (mask), (vl))
23696
#define vcompress_vm_u8mf2(mask, dest, src, vl) __riscv_vcompress_vm_u8mf2_tu((dest), (src), (mask), (vl))
23697
#define vcompress_vm_u8m1(mask, dest, src, vl) __riscv_vcompress_vm_u8m1_tu((dest), (src), (mask), (vl))
23698
#define vcompress_vm_u8m2(mask, dest, src, vl) __riscv_vcompress_vm_u8m2_tu((dest), (src), (mask), (vl))
23699
#define vcompress_vm_u8m4(mask, dest, src, vl) __riscv_vcompress_vm_u8m4_tu((dest), (src), (mask), (vl))
23700
#define vcompress_vm_u8m8(mask, dest, src, vl) __riscv_vcompress_vm_u8m8_tu((dest), (src), (mask), (vl))
23701
#define vcompress_vm_u16mf4(mask, dest, src, vl) __riscv_vcompress_vm_u16mf4_tu((dest), (src), (mask), (vl))
23702
#define vcompress_vm_u16mf2(mask, dest, src, vl) __riscv_vcompress_vm_u16mf2_tu((dest), (src), (mask), (vl))
23703
#define vcompress_vm_u16m1(mask, dest, src, vl) __riscv_vcompress_vm_u16m1_tu((dest), (src), (mask), (vl))
23704
#define vcompress_vm_u16m2(mask, dest, src, vl) __riscv_vcompress_vm_u16m2_tu((dest), (src), (mask), (vl))
23705
#define vcompress_vm_u16m4(mask, dest, src, vl) __riscv_vcompress_vm_u16m4_tu((dest), (src), (mask), (vl))
23706
#define vcompress_vm_u16m8(mask, dest, src, vl) __riscv_vcompress_vm_u16m8_tu((dest), (src), (mask), (vl))
23707
#define vcompress_vm_u32mf2(mask, dest, src, vl) __riscv_vcompress_vm_u32mf2_tu((dest), (src), (mask), (vl))
23708
#define vcompress_vm_u32m1(mask, dest, src, vl) __riscv_vcompress_vm_u32m1_tu((dest), (src), (mask), (vl))
23709
#define vcompress_vm_u32m2(mask, dest, src, vl) __riscv_vcompress_vm_u32m2_tu((dest), (src), (mask), (vl))
23710
#define vcompress_vm_u32m4(mask, dest, src, vl) __riscv_vcompress_vm_u32m4_tu((dest), (src), (mask), (vl))
23711
#define vcompress_vm_u32m8(mask, dest, src, vl) __riscv_vcompress_vm_u32m8_tu((dest), (src), (mask), (vl))
23712
#define vcompress_vm_u64m1(mask, dest, src, vl) __riscv_vcompress_vm_u64m1_tu((dest), (src), (mask), (vl))
23713
#define vcompress_vm_u64m2(mask, dest, src, vl) __riscv_vcompress_vm_u64m2_tu((dest), (src), (mask), (vl))
23714
#define vcompress_vm_u64m4(mask, dest, src, vl) __riscv_vcompress_vm_u64m4_tu((dest), (src), (mask), (vl))
23715
#define vcompress_vm_u64m8(mask, dest, src, vl) __riscv_vcompress_vm_u64m8_tu((dest), (src), (mask), (vl))
23716
// Reinterpret between different type under the same SEW/LMUL
23717
#define vreinterpret_v_i8mf8_u8mf8(...) __riscv_vreinterpret_v_i8mf8_u8mf8(__VA_ARGS__)
23718
#define vreinterpret_v_i8mf4_u8mf4(...) __riscv_vreinterpret_v_i8mf4_u8mf4(__VA_ARGS__)
23719
#define vreinterpret_v_i8mf2_u8mf2(...) __riscv_vreinterpret_v_i8mf2_u8mf2(__VA_ARGS__)
23720
#define vreinterpret_v_i8m1_u8m1(...) __riscv_vreinterpret_v_i8m1_u8m1(__VA_ARGS__)
23721
#define vreinterpret_v_i8m2_u8m2(...) __riscv_vreinterpret_v_i8m2_u8m2(__VA_ARGS__)
23722
#define vreinterpret_v_i8m4_u8m4(...) __riscv_vreinterpret_v_i8m4_u8m4(__VA_ARGS__)
23723
#define vreinterpret_v_i8m8_u8m8(...) __riscv_vreinterpret_v_i8m8_u8m8(__VA_ARGS__)
23724
#define vreinterpret_v_u8mf8_i8mf8(...) __riscv_vreinterpret_v_u8mf8_i8mf8(__VA_ARGS__)
23725
#define vreinterpret_v_u8mf4_i8mf4(...) __riscv_vreinterpret_v_u8mf4_i8mf4(__VA_ARGS__)
23726
#define vreinterpret_v_u8mf2_i8mf2(...) __riscv_vreinterpret_v_u8mf2_i8mf2(__VA_ARGS__)
23727
#define vreinterpret_v_u8m1_i8m1(...) __riscv_vreinterpret_v_u8m1_i8m1(__VA_ARGS__)
23728
#define vreinterpret_v_u8m2_i8m2(...) __riscv_vreinterpret_v_u8m2_i8m2(__VA_ARGS__)
23729
#define vreinterpret_v_u8m4_i8m4(...) __riscv_vreinterpret_v_u8m4_i8m4(__VA_ARGS__)
23730
#define vreinterpret_v_u8m8_i8m8(...) __riscv_vreinterpret_v_u8m8_i8m8(__VA_ARGS__)
23731
#define vreinterpret_v_i16mf4_f16mf4(...) __riscv_vreinterpret_v_i16mf4_f16mf4(__VA_ARGS__)
23732
#define vreinterpret_v_i16mf2_f16mf2(...) __riscv_vreinterpret_v_i16mf2_f16mf2(__VA_ARGS__)
23733
#define vreinterpret_v_i16m1_f16m1(...) __riscv_vreinterpret_v_i16m1_f16m1(__VA_ARGS__)
23734
#define vreinterpret_v_i16m2_f16m2(...) __riscv_vreinterpret_v_i16m2_f16m2(__VA_ARGS__)
23735
#define vreinterpret_v_i16m4_f16m4(...) __riscv_vreinterpret_v_i16m4_f16m4(__VA_ARGS__)
23736
#define vreinterpret_v_i16m8_f16m8(...) __riscv_vreinterpret_v_i16m8_f16m8(__VA_ARGS__)
23737
#define vreinterpret_v_u16mf4_f16mf4(...) __riscv_vreinterpret_v_u16mf4_f16mf4(__VA_ARGS__)
23738
#define vreinterpret_v_u16mf2_f16mf2(...) __riscv_vreinterpret_v_u16mf2_f16mf2(__VA_ARGS__)
23739
#define vreinterpret_v_u16m1_f16m1(...) __riscv_vreinterpret_v_u16m1_f16m1(__VA_ARGS__)
23740
#define vreinterpret_v_u16m2_f16m2(...) __riscv_vreinterpret_v_u16m2_f16m2(__VA_ARGS__)
23741
#define vreinterpret_v_u16m4_f16m4(...) __riscv_vreinterpret_v_u16m4_f16m4(__VA_ARGS__)
23742
#define vreinterpret_v_u16m8_f16m8(...) __riscv_vreinterpret_v_u16m8_f16m8(__VA_ARGS__)
23743
#define vreinterpret_v_i16mf4_u16mf4(...) __riscv_vreinterpret_v_i16mf4_u16mf4(__VA_ARGS__)
23744
#define vreinterpret_v_i16mf2_u16mf2(...) __riscv_vreinterpret_v_i16mf2_u16mf2(__VA_ARGS__)
23745
#define vreinterpret_v_i16m1_u16m1(...) __riscv_vreinterpret_v_i16m1_u16m1(__VA_ARGS__)
23746
#define vreinterpret_v_i16m2_u16m2(...) __riscv_vreinterpret_v_i16m2_u16m2(__VA_ARGS__)
23747
#define vreinterpret_v_i16m4_u16m4(...) __riscv_vreinterpret_v_i16m4_u16m4(__VA_ARGS__)
23748
#define vreinterpret_v_i16m8_u16m8(...) __riscv_vreinterpret_v_i16m8_u16m8(__VA_ARGS__)
23749
#define vreinterpret_v_u16mf4_i16mf4(...) __riscv_vreinterpret_v_u16mf4_i16mf4(__VA_ARGS__)
23750
#define vreinterpret_v_u16mf2_i16mf2(...) __riscv_vreinterpret_v_u16mf2_i16mf2(__VA_ARGS__)
23751
#define vreinterpret_v_u16m1_i16m1(...) __riscv_vreinterpret_v_u16m1_i16m1(__VA_ARGS__)
23752
#define vreinterpret_v_u16m2_i16m2(...) __riscv_vreinterpret_v_u16m2_i16m2(__VA_ARGS__)
23753
#define vreinterpret_v_u16m4_i16m4(...) __riscv_vreinterpret_v_u16m4_i16m4(__VA_ARGS__)
23754
#define vreinterpret_v_u16m8_i16m8(...) __riscv_vreinterpret_v_u16m8_i16m8(__VA_ARGS__)
23755
#define vreinterpret_v_f16mf4_i16mf4(...) __riscv_vreinterpret_v_f16mf4_i16mf4(__VA_ARGS__)
23756
#define vreinterpret_v_f16mf2_i16mf2(...) __riscv_vreinterpret_v_f16mf2_i16mf2(__VA_ARGS__)
23757
#define vreinterpret_v_f16m1_i16m1(...) __riscv_vreinterpret_v_f16m1_i16m1(__VA_ARGS__)
23758
#define vreinterpret_v_f16m2_i16m2(...) __riscv_vreinterpret_v_f16m2_i16m2(__VA_ARGS__)
23759
#define vreinterpret_v_f16m4_i16m4(...) __riscv_vreinterpret_v_f16m4_i16m4(__VA_ARGS__)
23760
#define vreinterpret_v_f16m8_i16m8(...) __riscv_vreinterpret_v_f16m8_i16m8(__VA_ARGS__)
23761
#define vreinterpret_v_f16mf4_u16mf4(...) __riscv_vreinterpret_v_f16mf4_u16mf4(__VA_ARGS__)
23762
#define vreinterpret_v_f16mf2_u16mf2(...) __riscv_vreinterpret_v_f16mf2_u16mf2(__VA_ARGS__)
23763
#define vreinterpret_v_f16m1_u16m1(...) __riscv_vreinterpret_v_f16m1_u16m1(__VA_ARGS__)
23764
#define vreinterpret_v_f16m2_u16m2(...) __riscv_vreinterpret_v_f16m2_u16m2(__VA_ARGS__)
23765
#define vreinterpret_v_f16m4_u16m4(...) __riscv_vreinterpret_v_f16m4_u16m4(__VA_ARGS__)
23766
#define vreinterpret_v_f16m8_u16m8(...) __riscv_vreinterpret_v_f16m8_u16m8(__VA_ARGS__)
23767
#define vreinterpret_v_i32mf2_f32mf2(...) __riscv_vreinterpret_v_i32mf2_f32mf2(__VA_ARGS__)
23768
#define vreinterpret_v_i32m1_f32m1(...) __riscv_vreinterpret_v_i32m1_f32m1(__VA_ARGS__)
23769
#define vreinterpret_v_i32m2_f32m2(...) __riscv_vreinterpret_v_i32m2_f32m2(__VA_ARGS__)
23770
#define vreinterpret_v_i32m4_f32m4(...) __riscv_vreinterpret_v_i32m4_f32m4(__VA_ARGS__)
23771
#define vreinterpret_v_i32m8_f32m8(...) __riscv_vreinterpret_v_i32m8_f32m8(__VA_ARGS__)
23772
#define vreinterpret_v_u32mf2_f32mf2(...) __riscv_vreinterpret_v_u32mf2_f32mf2(__VA_ARGS__)
23773
#define vreinterpret_v_u32m1_f32m1(...) __riscv_vreinterpret_v_u32m1_f32m1(__VA_ARGS__)
23774
#define vreinterpret_v_u32m2_f32m2(...) __riscv_vreinterpret_v_u32m2_f32m2(__VA_ARGS__)
23775
#define vreinterpret_v_u32m4_f32m4(...) __riscv_vreinterpret_v_u32m4_f32m4(__VA_ARGS__)
23776
#define vreinterpret_v_u32m8_f32m8(...) __riscv_vreinterpret_v_u32m8_f32m8(__VA_ARGS__)
23777
#define vreinterpret_v_i32mf2_u32mf2(...) __riscv_vreinterpret_v_i32mf2_u32mf2(__VA_ARGS__)
23778
#define vreinterpret_v_i32m1_u32m1(...) __riscv_vreinterpret_v_i32m1_u32m1(__VA_ARGS__)
23779
#define vreinterpret_v_i32m2_u32m2(...) __riscv_vreinterpret_v_i32m2_u32m2(__VA_ARGS__)
23780
#define vreinterpret_v_i32m4_u32m4(...) __riscv_vreinterpret_v_i32m4_u32m4(__VA_ARGS__)
23781
#define vreinterpret_v_i32m8_u32m8(...) __riscv_vreinterpret_v_i32m8_u32m8(__VA_ARGS__)
23782
#define vreinterpret_v_u32mf2_i32mf2(...) __riscv_vreinterpret_v_u32mf2_i32mf2(__VA_ARGS__)
23783
#define vreinterpret_v_u32m1_i32m1(...) __riscv_vreinterpret_v_u32m1_i32m1(__VA_ARGS__)
23784
#define vreinterpret_v_u32m2_i32m2(...) __riscv_vreinterpret_v_u32m2_i32m2(__VA_ARGS__)
23785
#define vreinterpret_v_u32m4_i32m4(...) __riscv_vreinterpret_v_u32m4_i32m4(__VA_ARGS__)
23786
#define vreinterpret_v_u32m8_i32m8(...) __riscv_vreinterpret_v_u32m8_i32m8(__VA_ARGS__)
23787
#define vreinterpret_v_f32mf2_i32mf2(...) __riscv_vreinterpret_v_f32mf2_i32mf2(__VA_ARGS__)
23788
#define vreinterpret_v_f32m1_i32m1(...) __riscv_vreinterpret_v_f32m1_i32m1(__VA_ARGS__)
23789
#define vreinterpret_v_f32m2_i32m2(...) __riscv_vreinterpret_v_f32m2_i32m2(__VA_ARGS__)
23790
#define vreinterpret_v_f32m4_i32m4(...) __riscv_vreinterpret_v_f32m4_i32m4(__VA_ARGS__)
23791
#define vreinterpret_v_f32m8_i32m8(...) __riscv_vreinterpret_v_f32m8_i32m8(__VA_ARGS__)
23792
#define vreinterpret_v_f32mf2_u32mf2(...) __riscv_vreinterpret_v_f32mf2_u32mf2(__VA_ARGS__)
23793
#define vreinterpret_v_f32m1_u32m1(...) __riscv_vreinterpret_v_f32m1_u32m1(__VA_ARGS__)
23794
#define vreinterpret_v_f32m2_u32m2(...) __riscv_vreinterpret_v_f32m2_u32m2(__VA_ARGS__)
23795
#define vreinterpret_v_f32m4_u32m4(...) __riscv_vreinterpret_v_f32m4_u32m4(__VA_ARGS__)
23796
#define vreinterpret_v_f32m8_u32m8(...) __riscv_vreinterpret_v_f32m8_u32m8(__VA_ARGS__)
23797
#define vreinterpret_v_i64m1_f64m1(...) __riscv_vreinterpret_v_i64m1_f64m1(__VA_ARGS__)
23798
#define vreinterpret_v_i64m2_f64m2(...) __riscv_vreinterpret_v_i64m2_f64m2(__VA_ARGS__)
23799
#define vreinterpret_v_i64m4_f64m4(...) __riscv_vreinterpret_v_i64m4_f64m4(__VA_ARGS__)
23800
#define vreinterpret_v_i64m8_f64m8(...) __riscv_vreinterpret_v_i64m8_f64m8(__VA_ARGS__)
23801
#define vreinterpret_v_u64m1_f64m1(...) __riscv_vreinterpret_v_u64m1_f64m1(__VA_ARGS__)
23802
#define vreinterpret_v_u64m2_f64m2(...) __riscv_vreinterpret_v_u64m2_f64m2(__VA_ARGS__)
23803
#define vreinterpret_v_u64m4_f64m4(...) __riscv_vreinterpret_v_u64m4_f64m4(__VA_ARGS__)
23804
#define vreinterpret_v_u64m8_f64m8(...) __riscv_vreinterpret_v_u64m8_f64m8(__VA_ARGS__)
23805
#define vreinterpret_v_i64m1_u64m1(...) __riscv_vreinterpret_v_i64m1_u64m1(__VA_ARGS__)
23806
#define vreinterpret_v_i64m2_u64m2(...) __riscv_vreinterpret_v_i64m2_u64m2(__VA_ARGS__)
23807
#define vreinterpret_v_i64m4_u64m4(...) __riscv_vreinterpret_v_i64m4_u64m4(__VA_ARGS__)
23808
#define vreinterpret_v_i64m8_u64m8(...) __riscv_vreinterpret_v_i64m8_u64m8(__VA_ARGS__)
23809
#define vreinterpret_v_u64m1_i64m1(...) __riscv_vreinterpret_v_u64m1_i64m1(__VA_ARGS__)
23810
#define vreinterpret_v_u64m2_i64m2(...) __riscv_vreinterpret_v_u64m2_i64m2(__VA_ARGS__)
23811
#define vreinterpret_v_u64m4_i64m4(...) __riscv_vreinterpret_v_u64m4_i64m4(__VA_ARGS__)
23812
#define vreinterpret_v_u64m8_i64m8(...) __riscv_vreinterpret_v_u64m8_i64m8(__VA_ARGS__)
23813
#define vreinterpret_v_f64m1_i64m1(...) __riscv_vreinterpret_v_f64m1_i64m1(__VA_ARGS__)
23814
#define vreinterpret_v_f64m2_i64m2(...) __riscv_vreinterpret_v_f64m2_i64m2(__VA_ARGS__)
23815
#define vreinterpret_v_f64m4_i64m4(...) __riscv_vreinterpret_v_f64m4_i64m4(__VA_ARGS__)
23816
#define vreinterpret_v_f64m8_i64m8(...) __riscv_vreinterpret_v_f64m8_i64m8(__VA_ARGS__)
23817
#define vreinterpret_v_f64m1_u64m1(...) __riscv_vreinterpret_v_f64m1_u64m1(__VA_ARGS__)
23818
#define vreinterpret_v_f64m2_u64m2(...) __riscv_vreinterpret_v_f64m2_u64m2(__VA_ARGS__)
23819
#define vreinterpret_v_f64m4_u64m4(...) __riscv_vreinterpret_v_f64m4_u64m4(__VA_ARGS__)
23820
#define vreinterpret_v_f64m8_u64m8(...) __riscv_vreinterpret_v_f64m8_u64m8(__VA_ARGS__)
23821
// Reinterpret between different SEW under the same LMUL
23822
#define vreinterpret_v_i8mf4_i16mf4(...) __riscv_vreinterpret_v_i8mf4_i16mf4(__VA_ARGS__)
23823
#define vreinterpret_v_i8mf2_i16mf2(...) __riscv_vreinterpret_v_i8mf2_i16mf2(__VA_ARGS__)
23824
#define vreinterpret_v_i8m1_i16m1(...) __riscv_vreinterpret_v_i8m1_i16m1(__VA_ARGS__)
23825
#define vreinterpret_v_i8m2_i16m2(...) __riscv_vreinterpret_v_i8m2_i16m2(__VA_ARGS__)
23826
#define vreinterpret_v_i8m4_i16m4(...) __riscv_vreinterpret_v_i8m4_i16m4(__VA_ARGS__)
23827
#define vreinterpret_v_i8m8_i16m8(...) __riscv_vreinterpret_v_i8m8_i16m8(__VA_ARGS__)
23828
#define vreinterpret_v_u8mf4_u16mf4(...) __riscv_vreinterpret_v_u8mf4_u16mf4(__VA_ARGS__)
23829
#define vreinterpret_v_u8mf2_u16mf2(...) __riscv_vreinterpret_v_u8mf2_u16mf2(__VA_ARGS__)
23830
#define vreinterpret_v_u8m1_u16m1(...) __riscv_vreinterpret_v_u8m1_u16m1(__VA_ARGS__)
23831
#define vreinterpret_v_u8m2_u16m2(...) __riscv_vreinterpret_v_u8m2_u16m2(__VA_ARGS__)
23832
#define vreinterpret_v_u8m4_u16m4(...) __riscv_vreinterpret_v_u8m4_u16m4(__VA_ARGS__)
23833
#define vreinterpret_v_u8m8_u16m8(...) __riscv_vreinterpret_v_u8m8_u16m8(__VA_ARGS__)
23834
#define vreinterpret_v_i8mf2_i32mf2(...) __riscv_vreinterpret_v_i8mf2_i32mf2(__VA_ARGS__)
23835
#define vreinterpret_v_i8m1_i32m1(...) __riscv_vreinterpret_v_i8m1_i32m1(__VA_ARGS__)
23836
#define vreinterpret_v_i8m2_i32m2(...) __riscv_vreinterpret_v_i8m2_i32m2(__VA_ARGS__)
23837
#define vreinterpret_v_i8m4_i32m4(...) __riscv_vreinterpret_v_i8m4_i32m4(__VA_ARGS__)
23838
#define vreinterpret_v_i8m8_i32m8(...) __riscv_vreinterpret_v_i8m8_i32m8(__VA_ARGS__)
23839
#define vreinterpret_v_u8mf2_u32mf2(...) __riscv_vreinterpret_v_u8mf2_u32mf2(__VA_ARGS__)
23840
#define vreinterpret_v_u8m1_u32m1(...) __riscv_vreinterpret_v_u8m1_u32m1(__VA_ARGS__)
23841
#define vreinterpret_v_u8m2_u32m2(...) __riscv_vreinterpret_v_u8m2_u32m2(__VA_ARGS__)
23842
#define vreinterpret_v_u8m4_u32m4(...) __riscv_vreinterpret_v_u8m4_u32m4(__VA_ARGS__)
23843
#define vreinterpret_v_u8m8_u32m8(...) __riscv_vreinterpret_v_u8m8_u32m8(__VA_ARGS__)
23844
#define vreinterpret_v_i8m1_i64m1(...) __riscv_vreinterpret_v_i8m1_i64m1(__VA_ARGS__)
23845
#define vreinterpret_v_i8m2_i64m2(...) __riscv_vreinterpret_v_i8m2_i64m2(__VA_ARGS__)
23846
#define vreinterpret_v_i8m4_i64m4(...) __riscv_vreinterpret_v_i8m4_i64m4(__VA_ARGS__)
23847
#define vreinterpret_v_i8m8_i64m8(...) __riscv_vreinterpret_v_i8m8_i64m8(__VA_ARGS__)
23848
#define vreinterpret_v_u8m1_u64m1(...) __riscv_vreinterpret_v_u8m1_u64m1(__VA_ARGS__)
23849
#define vreinterpret_v_u8m2_u64m2(...) __riscv_vreinterpret_v_u8m2_u64m2(__VA_ARGS__)
23850
#define vreinterpret_v_u8m4_u64m4(...) __riscv_vreinterpret_v_u8m4_u64m4(__VA_ARGS__)
23851
#define vreinterpret_v_u8m8_u64m8(...) __riscv_vreinterpret_v_u8m8_u64m8(__VA_ARGS__)
23852
#define vreinterpret_v_i16mf4_i8mf4(...) __riscv_vreinterpret_v_i16mf4_i8mf4(__VA_ARGS__)
23853
#define vreinterpret_v_i16mf2_i8mf2(...) __riscv_vreinterpret_v_i16mf2_i8mf2(__VA_ARGS__)
23854
#define vreinterpret_v_i16m1_i8m1(...) __riscv_vreinterpret_v_i16m1_i8m1(__VA_ARGS__)
23855
#define vreinterpret_v_i16m2_i8m2(...) __riscv_vreinterpret_v_i16m2_i8m2(__VA_ARGS__)
23856
#define vreinterpret_v_i16m4_i8m4(...) __riscv_vreinterpret_v_i16m4_i8m4(__VA_ARGS__)
23857
#define vreinterpret_v_i16m8_i8m8(...) __riscv_vreinterpret_v_i16m8_i8m8(__VA_ARGS__)
23858
#define vreinterpret_v_u16mf4_u8mf4(...) __riscv_vreinterpret_v_u16mf4_u8mf4(__VA_ARGS__)
23859
#define vreinterpret_v_u16mf2_u8mf2(...) __riscv_vreinterpret_v_u16mf2_u8mf2(__VA_ARGS__)
23860
#define vreinterpret_v_u16m1_u8m1(...) __riscv_vreinterpret_v_u16m1_u8m1(__VA_ARGS__)
23861
#define vreinterpret_v_u16m2_u8m2(...) __riscv_vreinterpret_v_u16m2_u8m2(__VA_ARGS__)
23862
#define vreinterpret_v_u16m4_u8m4(...) __riscv_vreinterpret_v_u16m4_u8m4(__VA_ARGS__)
23863
#define vreinterpret_v_u16m8_u8m8(...) __riscv_vreinterpret_v_u16m8_u8m8(__VA_ARGS__)
23864
#define vreinterpret_v_i16mf2_i32mf2(...) __riscv_vreinterpret_v_i16mf2_i32mf2(__VA_ARGS__)
23865
#define vreinterpret_v_i16m1_i32m1(...) __riscv_vreinterpret_v_i16m1_i32m1(__VA_ARGS__)
23866
#define vreinterpret_v_i16m2_i32m2(...) __riscv_vreinterpret_v_i16m2_i32m2(__VA_ARGS__)
23867
#define vreinterpret_v_i16m4_i32m4(...) __riscv_vreinterpret_v_i16m4_i32m4(__VA_ARGS__)
23868
#define vreinterpret_v_i16m8_i32m8(...) __riscv_vreinterpret_v_i16m8_i32m8(__VA_ARGS__)
23869
#define vreinterpret_v_u16mf2_u32mf2(...) __riscv_vreinterpret_v_u16mf2_u32mf2(__VA_ARGS__)
23870
#define vreinterpret_v_u16m1_u32m1(...) __riscv_vreinterpret_v_u16m1_u32m1(__VA_ARGS__)
23871
#define vreinterpret_v_u16m2_u32m2(...) __riscv_vreinterpret_v_u16m2_u32m2(__VA_ARGS__)
23872
#define vreinterpret_v_u16m4_u32m4(...) __riscv_vreinterpret_v_u16m4_u32m4(__VA_ARGS__)
23873
#define vreinterpret_v_u16m8_u32m8(...) __riscv_vreinterpret_v_u16m8_u32m8(__VA_ARGS__)
23874
#define vreinterpret_v_i16m1_i64m1(...) __riscv_vreinterpret_v_i16m1_i64m1(__VA_ARGS__)
23875
#define vreinterpret_v_i16m2_i64m2(...) __riscv_vreinterpret_v_i16m2_i64m2(__VA_ARGS__)
23876
#define vreinterpret_v_i16m4_i64m4(...) __riscv_vreinterpret_v_i16m4_i64m4(__VA_ARGS__)
23877
#define vreinterpret_v_i16m8_i64m8(...) __riscv_vreinterpret_v_i16m8_i64m8(__VA_ARGS__)
23878
#define vreinterpret_v_u16m1_u64m1(...) __riscv_vreinterpret_v_u16m1_u64m1(__VA_ARGS__)
23879
#define vreinterpret_v_u16m2_u64m2(...) __riscv_vreinterpret_v_u16m2_u64m2(__VA_ARGS__)
23880
#define vreinterpret_v_u16m4_u64m4(...) __riscv_vreinterpret_v_u16m4_u64m4(__VA_ARGS__)
23881
#define vreinterpret_v_u16m8_u64m8(...) __riscv_vreinterpret_v_u16m8_u64m8(__VA_ARGS__)
23882
#define vreinterpret_v_i32mf2_i8mf2(...) __riscv_vreinterpret_v_i32mf2_i8mf2(__VA_ARGS__)
23883
#define vreinterpret_v_i32m1_i8m1(...) __riscv_vreinterpret_v_i32m1_i8m1(__VA_ARGS__)
23884
#define vreinterpret_v_i32m2_i8m2(...) __riscv_vreinterpret_v_i32m2_i8m2(__VA_ARGS__)
23885
#define vreinterpret_v_i32m4_i8m4(...) __riscv_vreinterpret_v_i32m4_i8m4(__VA_ARGS__)
23886
#define vreinterpret_v_i32m8_i8m8(...) __riscv_vreinterpret_v_i32m8_i8m8(__VA_ARGS__)
23887
#define vreinterpret_v_u32mf2_u8mf2(...) __riscv_vreinterpret_v_u32mf2_u8mf2(__VA_ARGS__)
23888
#define vreinterpret_v_u32m1_u8m1(...) __riscv_vreinterpret_v_u32m1_u8m1(__VA_ARGS__)
23889
#define vreinterpret_v_u32m2_u8m2(...) __riscv_vreinterpret_v_u32m2_u8m2(__VA_ARGS__)
23890
#define vreinterpret_v_u32m4_u8m4(...) __riscv_vreinterpret_v_u32m4_u8m4(__VA_ARGS__)
23891
#define vreinterpret_v_u32m8_u8m8(...) __riscv_vreinterpret_v_u32m8_u8m8(__VA_ARGS__)
23892
#define vreinterpret_v_i32mf2_i16mf2(...) __riscv_vreinterpret_v_i32mf2_i16mf2(__VA_ARGS__)
23893
#define vreinterpret_v_i32m1_i16m1(...) __riscv_vreinterpret_v_i32m1_i16m1(__VA_ARGS__)
23894
#define vreinterpret_v_i32m2_i16m2(...) __riscv_vreinterpret_v_i32m2_i16m2(__VA_ARGS__)
23895
#define vreinterpret_v_i32m4_i16m4(...) __riscv_vreinterpret_v_i32m4_i16m4(__VA_ARGS__)
23896
#define vreinterpret_v_i32m8_i16m8(...) __riscv_vreinterpret_v_i32m8_i16m8(__VA_ARGS__)
23897
#define vreinterpret_v_u32mf2_u16mf2(...) __riscv_vreinterpret_v_u32mf2_u16mf2(__VA_ARGS__)
23898
#define vreinterpret_v_u32m1_u16m1(...) __riscv_vreinterpret_v_u32m1_u16m1(__VA_ARGS__)
23899
#define vreinterpret_v_u32m2_u16m2(...) __riscv_vreinterpret_v_u32m2_u16m2(__VA_ARGS__)
23900
#define vreinterpret_v_u32m4_u16m4(...) __riscv_vreinterpret_v_u32m4_u16m4(__VA_ARGS__)
23901
#define vreinterpret_v_u32m8_u16m8(...) __riscv_vreinterpret_v_u32m8_u16m8(__VA_ARGS__)
23902
#define vreinterpret_v_i32m1_i64m1(...) __riscv_vreinterpret_v_i32m1_i64m1(__VA_ARGS__)
23903
#define vreinterpret_v_i32m2_i64m2(...) __riscv_vreinterpret_v_i32m2_i64m2(__VA_ARGS__)
23904
#define vreinterpret_v_i32m4_i64m4(...) __riscv_vreinterpret_v_i32m4_i64m4(__VA_ARGS__)
23905
#define vreinterpret_v_i32m8_i64m8(...) __riscv_vreinterpret_v_i32m8_i64m8(__VA_ARGS__)
23906
#define vreinterpret_v_u32m1_u64m1(...) __riscv_vreinterpret_v_u32m1_u64m1(__VA_ARGS__)
23907
#define vreinterpret_v_u32m2_u64m2(...) __riscv_vreinterpret_v_u32m2_u64m2(__VA_ARGS__)
23908
#define vreinterpret_v_u32m4_u64m4(...) __riscv_vreinterpret_v_u32m4_u64m4(__VA_ARGS__)
23909
#define vreinterpret_v_u32m8_u64m8(...) __riscv_vreinterpret_v_u32m8_u64m8(__VA_ARGS__)
23910
#define vreinterpret_v_i64m1_i8m1(...) __riscv_vreinterpret_v_i64m1_i8m1(__VA_ARGS__)
23911
#define vreinterpret_v_i64m2_i8m2(...) __riscv_vreinterpret_v_i64m2_i8m2(__VA_ARGS__)
23912
#define vreinterpret_v_i64m4_i8m4(...) __riscv_vreinterpret_v_i64m4_i8m4(__VA_ARGS__)
23913
#define vreinterpret_v_i64m8_i8m8(...) __riscv_vreinterpret_v_i64m8_i8m8(__VA_ARGS__)
23914
#define vreinterpret_v_u64m1_u8m1(...) __riscv_vreinterpret_v_u64m1_u8m1(__VA_ARGS__)
23915
#define vreinterpret_v_u64m2_u8m2(...) __riscv_vreinterpret_v_u64m2_u8m2(__VA_ARGS__)
23916
#define vreinterpret_v_u64m4_u8m4(...) __riscv_vreinterpret_v_u64m4_u8m4(__VA_ARGS__)
23917
#define vreinterpret_v_u64m8_u8m8(...) __riscv_vreinterpret_v_u64m8_u8m8(__VA_ARGS__)
23918
#define vreinterpret_v_i64m1_i16m1(...) __riscv_vreinterpret_v_i64m1_i16m1(__VA_ARGS__)
23919
#define vreinterpret_v_i64m2_i16m2(...) __riscv_vreinterpret_v_i64m2_i16m2(__VA_ARGS__)
23920
#define vreinterpret_v_i64m4_i16m4(...) __riscv_vreinterpret_v_i64m4_i16m4(__VA_ARGS__)
23921
#define vreinterpret_v_i64m8_i16m8(...) __riscv_vreinterpret_v_i64m8_i16m8(__VA_ARGS__)
23922
#define vreinterpret_v_u64m1_u16m1(...) __riscv_vreinterpret_v_u64m1_u16m1(__VA_ARGS__)
23923
#define vreinterpret_v_u64m2_u16m2(...) __riscv_vreinterpret_v_u64m2_u16m2(__VA_ARGS__)
23924
#define vreinterpret_v_u64m4_u16m4(...) __riscv_vreinterpret_v_u64m4_u16m4(__VA_ARGS__)
23925
#define vreinterpret_v_u64m8_u16m8(...) __riscv_vreinterpret_v_u64m8_u16m8(__VA_ARGS__)
23926
#define vreinterpret_v_i64m1_i32m1(...) __riscv_vreinterpret_v_i64m1_i32m1(__VA_ARGS__)
23927
#define vreinterpret_v_i64m2_i32m2(...) __riscv_vreinterpret_v_i64m2_i32m2(__VA_ARGS__)
23928
#define vreinterpret_v_i64m4_i32m4(...) __riscv_vreinterpret_v_i64m4_i32m4(__VA_ARGS__)
23929
#define vreinterpret_v_i64m8_i32m8(...) __riscv_vreinterpret_v_i64m8_i32m8(__VA_ARGS__)
23930
#define vreinterpret_v_u64m1_u32m1(...) __riscv_vreinterpret_v_u64m1_u32m1(__VA_ARGS__)
23931
#define vreinterpret_v_u64m2_u32m2(...) __riscv_vreinterpret_v_u64m2_u32m2(__VA_ARGS__)
23932
#define vreinterpret_v_u64m4_u32m4(...) __riscv_vreinterpret_v_u64m4_u32m4(__VA_ARGS__)
23933
#define vreinterpret_v_u64m8_u32m8(...) __riscv_vreinterpret_v_u64m8_u32m8(__VA_ARGS__)
23934
#define vlmul_ext_v_f16mf4_f16mf2(...) __riscv_vlmul_ext_v_f16mf4_f16mf2(__VA_ARGS__)
23935
#define vlmul_ext_v_f16mf4_f16m1(...) __riscv_vlmul_ext_v_f16mf4_f16m1(__VA_ARGS__)
23936
#define vlmul_ext_v_f16mf4_f16m2(...) __riscv_vlmul_ext_v_f16mf4_f16m2(__VA_ARGS__)
23937
#define vlmul_ext_v_f16mf4_f16m4(...) __riscv_vlmul_ext_v_f16mf4_f16m4(__VA_ARGS__)
23938
#define vlmul_ext_v_f16mf4_f16m8(...) __riscv_vlmul_ext_v_f16mf4_f16m8(__VA_ARGS__)
23939
#define vlmul_ext_v_f16mf2_f16m1(...) __riscv_vlmul_ext_v_f16mf2_f16m1(__VA_ARGS__)
23940
#define vlmul_ext_v_f16mf2_f16m2(...) __riscv_vlmul_ext_v_f16mf2_f16m2(__VA_ARGS__)
23941
#define vlmul_ext_v_f16mf2_f16m4(...) __riscv_vlmul_ext_v_f16mf2_f16m4(__VA_ARGS__)
23942
#define vlmul_ext_v_f16mf2_f16m8(...) __riscv_vlmul_ext_v_f16mf2_f16m8(__VA_ARGS__)
23943
#define vlmul_ext_v_f16m1_f16m2(...) __riscv_vlmul_ext_v_f16m1_f16m2(__VA_ARGS__)
23944
#define vlmul_ext_v_f16m1_f16m4(...) __riscv_vlmul_ext_v_f16m1_f16m4(__VA_ARGS__)
23945
#define vlmul_ext_v_f16m1_f16m8(...) __riscv_vlmul_ext_v_f16m1_f16m8(__VA_ARGS__)
23946
#define vlmul_ext_v_f16m2_f16m4(...) __riscv_vlmul_ext_v_f16m2_f16m4(__VA_ARGS__)
23947
#define vlmul_ext_v_f16m2_f16m8(...) __riscv_vlmul_ext_v_f16m2_f16m8(__VA_ARGS__)
23948
#define vlmul_ext_v_f16m4_f16m8(...) __riscv_vlmul_ext_v_f16m4_f16m8(__VA_ARGS__)
23949
#define vlmul_ext_v_f32mf2_f32m1(...) __riscv_vlmul_ext_v_f32mf2_f32m1(__VA_ARGS__)
23950
#define vlmul_ext_v_f32mf2_f32m2(...) __riscv_vlmul_ext_v_f32mf2_f32m2(__VA_ARGS__)
23951
#define vlmul_ext_v_f32mf2_f32m4(...) __riscv_vlmul_ext_v_f32mf2_f32m4(__VA_ARGS__)
23952
#define vlmul_ext_v_f32mf2_f32m8(...) __riscv_vlmul_ext_v_f32mf2_f32m8(__VA_ARGS__)
23953
#define vlmul_ext_v_f32m1_f32m2(...) __riscv_vlmul_ext_v_f32m1_f32m2(__VA_ARGS__)
23954
#define vlmul_ext_v_f32m1_f32m4(...) __riscv_vlmul_ext_v_f32m1_f32m4(__VA_ARGS__)
23955
#define vlmul_ext_v_f32m1_f32m8(...) __riscv_vlmul_ext_v_f32m1_f32m8(__VA_ARGS__)
23956
#define vlmul_ext_v_f32m2_f32m4(...) __riscv_vlmul_ext_v_f32m2_f32m4(__VA_ARGS__)
23957
#define vlmul_ext_v_f32m2_f32m8(...) __riscv_vlmul_ext_v_f32m2_f32m8(__VA_ARGS__)
23958
#define vlmul_ext_v_f32m4_f32m8(...) __riscv_vlmul_ext_v_f32m4_f32m8(__VA_ARGS__)
23959
#define vlmul_ext_v_f64m1_f64m2(...) __riscv_vlmul_ext_v_f64m1_f64m2(__VA_ARGS__)
23960
#define vlmul_ext_v_f64m1_f64m4(...) __riscv_vlmul_ext_v_f64m1_f64m4(__VA_ARGS__)
23961
#define vlmul_ext_v_f64m1_f64m8(...) __riscv_vlmul_ext_v_f64m1_f64m8(__VA_ARGS__)
23962
#define vlmul_ext_v_f64m2_f64m4(...) __riscv_vlmul_ext_v_f64m2_f64m4(__VA_ARGS__)
23963
#define vlmul_ext_v_f64m2_f64m8(...) __riscv_vlmul_ext_v_f64m2_f64m8(__VA_ARGS__)
23964
#define vlmul_ext_v_f64m4_f64m8(...) __riscv_vlmul_ext_v_f64m4_f64m8(__VA_ARGS__)
23965
#define vlmul_ext_v_i8mf8_i8mf4(...) __riscv_vlmul_ext_v_i8mf8_i8mf4(__VA_ARGS__)
23966
#define vlmul_ext_v_i8mf8_i8mf2(...) __riscv_vlmul_ext_v_i8mf8_i8mf2(__VA_ARGS__)
23967
#define vlmul_ext_v_i8mf8_i8m1(...) __riscv_vlmul_ext_v_i8mf8_i8m1(__VA_ARGS__)
23968
#define vlmul_ext_v_i8mf8_i8m2(...) __riscv_vlmul_ext_v_i8mf8_i8m2(__VA_ARGS__)
23969
#define vlmul_ext_v_i8mf8_i8m4(...) __riscv_vlmul_ext_v_i8mf8_i8m4(__VA_ARGS__)
23970
#define vlmul_ext_v_i8mf8_i8m8(...) __riscv_vlmul_ext_v_i8mf8_i8m8(__VA_ARGS__)
23971
#define vlmul_ext_v_i8mf4_i8mf2(...) __riscv_vlmul_ext_v_i8mf4_i8mf2(__VA_ARGS__)
23972
#define vlmul_ext_v_i8mf4_i8m1(...) __riscv_vlmul_ext_v_i8mf4_i8m1(__VA_ARGS__)
23973
#define vlmul_ext_v_i8mf4_i8m2(...) __riscv_vlmul_ext_v_i8mf4_i8m2(__VA_ARGS__)
23974
#define vlmul_ext_v_i8mf4_i8m4(...) __riscv_vlmul_ext_v_i8mf4_i8m4(__VA_ARGS__)
23975
#define vlmul_ext_v_i8mf4_i8m8(...) __riscv_vlmul_ext_v_i8mf4_i8m8(__VA_ARGS__)
23976
#define vlmul_ext_v_i8mf2_i8m1(...) __riscv_vlmul_ext_v_i8mf2_i8m1(__VA_ARGS__)
23977
#define vlmul_ext_v_i8mf2_i8m2(...) __riscv_vlmul_ext_v_i8mf2_i8m2(__VA_ARGS__)
23978
#define vlmul_ext_v_i8mf2_i8m4(...) __riscv_vlmul_ext_v_i8mf2_i8m4(__VA_ARGS__)
23979
#define vlmul_ext_v_i8mf2_i8m8(...) __riscv_vlmul_ext_v_i8mf2_i8m8(__VA_ARGS__)
23980
#define vlmul_ext_v_i8m1_i8m2(...) __riscv_vlmul_ext_v_i8m1_i8m2(__VA_ARGS__)
23981
#define vlmul_ext_v_i8m1_i8m4(...) __riscv_vlmul_ext_v_i8m1_i8m4(__VA_ARGS__)
23982
#define vlmul_ext_v_i8m1_i8m8(...) __riscv_vlmul_ext_v_i8m1_i8m8(__VA_ARGS__)
23983
#define vlmul_ext_v_i8m2_i8m4(...) __riscv_vlmul_ext_v_i8m2_i8m4(__VA_ARGS__)
23984
#define vlmul_ext_v_i8m2_i8m8(...) __riscv_vlmul_ext_v_i8m2_i8m8(__VA_ARGS__)
23985
#define vlmul_ext_v_i8m4_i8m8(...) __riscv_vlmul_ext_v_i8m4_i8m8(__VA_ARGS__)
23986
#define vlmul_ext_v_i16mf4_i16mf2(...) __riscv_vlmul_ext_v_i16mf4_i16mf2(__VA_ARGS__)
23987
#define vlmul_ext_v_i16mf4_i16m1(...) __riscv_vlmul_ext_v_i16mf4_i16m1(__VA_ARGS__)
23988
#define vlmul_ext_v_i16mf4_i16m2(...) __riscv_vlmul_ext_v_i16mf4_i16m2(__VA_ARGS__)
23989
#define vlmul_ext_v_i16mf4_i16m4(...) __riscv_vlmul_ext_v_i16mf4_i16m4(__VA_ARGS__)
23990
#define vlmul_ext_v_i16mf4_i16m8(...) __riscv_vlmul_ext_v_i16mf4_i16m8(__VA_ARGS__)
23991
#define vlmul_ext_v_i16mf2_i16m1(...) __riscv_vlmul_ext_v_i16mf2_i16m1(__VA_ARGS__)
23992
#define vlmul_ext_v_i16mf2_i16m2(...) __riscv_vlmul_ext_v_i16mf2_i16m2(__VA_ARGS__)
23993
#define vlmul_ext_v_i16mf2_i16m4(...) __riscv_vlmul_ext_v_i16mf2_i16m4(__VA_ARGS__)
23994
#define vlmul_ext_v_i16mf2_i16m8(...) __riscv_vlmul_ext_v_i16mf2_i16m8(__VA_ARGS__)
23995
#define vlmul_ext_v_i16m1_i16m2(...) __riscv_vlmul_ext_v_i16m1_i16m2(__VA_ARGS__)
23996
#define vlmul_ext_v_i16m1_i16m4(...) __riscv_vlmul_ext_v_i16m1_i16m4(__VA_ARGS__)
23997
#define vlmul_ext_v_i16m1_i16m8(...) __riscv_vlmul_ext_v_i16m1_i16m8(__VA_ARGS__)
23998
#define vlmul_ext_v_i16m2_i16m4(...) __riscv_vlmul_ext_v_i16m2_i16m4(__VA_ARGS__)
23999
#define vlmul_ext_v_i16m2_i16m8(...) __riscv_vlmul_ext_v_i16m2_i16m8(__VA_ARGS__)
24000
#define vlmul_ext_v_i16m4_i16m8(...) __riscv_vlmul_ext_v_i16m4_i16m8(__VA_ARGS__)
24001
#define vlmul_ext_v_i32mf2_i32m1(...) __riscv_vlmul_ext_v_i32mf2_i32m1(__VA_ARGS__)
24002
#define vlmul_ext_v_i32mf2_i32m2(...) __riscv_vlmul_ext_v_i32mf2_i32m2(__VA_ARGS__)
24003
#define vlmul_ext_v_i32mf2_i32m4(...) __riscv_vlmul_ext_v_i32mf2_i32m4(__VA_ARGS__)
24004
#define vlmul_ext_v_i32mf2_i32m8(...) __riscv_vlmul_ext_v_i32mf2_i32m8(__VA_ARGS__)
24005
#define vlmul_ext_v_i32m1_i32m2(...) __riscv_vlmul_ext_v_i32m1_i32m2(__VA_ARGS__)
24006
#define vlmul_ext_v_i32m1_i32m4(...) __riscv_vlmul_ext_v_i32m1_i32m4(__VA_ARGS__)
24007
#define vlmul_ext_v_i32m1_i32m8(...) __riscv_vlmul_ext_v_i32m1_i32m8(__VA_ARGS__)
24008
#define vlmul_ext_v_i32m2_i32m4(...) __riscv_vlmul_ext_v_i32m2_i32m4(__VA_ARGS__)
24009
#define vlmul_ext_v_i32m2_i32m8(...) __riscv_vlmul_ext_v_i32m2_i32m8(__VA_ARGS__)
24010
#define vlmul_ext_v_i32m4_i32m8(...) __riscv_vlmul_ext_v_i32m4_i32m8(__VA_ARGS__)
24011
#define vlmul_ext_v_i64m1_i64m2(...) __riscv_vlmul_ext_v_i64m1_i64m2(__VA_ARGS__)
24012
#define vlmul_ext_v_i64m1_i64m4(...) __riscv_vlmul_ext_v_i64m1_i64m4(__VA_ARGS__)
24013
#define vlmul_ext_v_i64m1_i64m8(...) __riscv_vlmul_ext_v_i64m1_i64m8(__VA_ARGS__)
24014
#define vlmul_ext_v_i64m2_i64m4(...) __riscv_vlmul_ext_v_i64m2_i64m4(__VA_ARGS__)
24015
#define vlmul_ext_v_i64m2_i64m8(...) __riscv_vlmul_ext_v_i64m2_i64m8(__VA_ARGS__)
24016
#define vlmul_ext_v_i64m4_i64m8(...) __riscv_vlmul_ext_v_i64m4_i64m8(__VA_ARGS__)
24017
#define vlmul_ext_v_u8mf8_u8mf4(...) __riscv_vlmul_ext_v_u8mf8_u8mf4(__VA_ARGS__)
24018
#define vlmul_ext_v_u8mf8_u8mf2(...) __riscv_vlmul_ext_v_u8mf8_u8mf2(__VA_ARGS__)
24019
#define vlmul_ext_v_u8mf8_u8m1(...) __riscv_vlmul_ext_v_u8mf8_u8m1(__VA_ARGS__)
24020
#define vlmul_ext_v_u8mf8_u8m2(...) __riscv_vlmul_ext_v_u8mf8_u8m2(__VA_ARGS__)
24021
#define vlmul_ext_v_u8mf8_u8m4(...) __riscv_vlmul_ext_v_u8mf8_u8m4(__VA_ARGS__)
24022
#define vlmul_ext_v_u8mf8_u8m8(...) __riscv_vlmul_ext_v_u8mf8_u8m8(__VA_ARGS__)
24023
#define vlmul_ext_v_u8mf4_u8mf2(...) __riscv_vlmul_ext_v_u8mf4_u8mf2(__VA_ARGS__)
24024
#define vlmul_ext_v_u8mf4_u8m1(...) __riscv_vlmul_ext_v_u8mf4_u8m1(__VA_ARGS__)
24025
#define vlmul_ext_v_u8mf4_u8m2(...) __riscv_vlmul_ext_v_u8mf4_u8m2(__VA_ARGS__)
24026
#define vlmul_ext_v_u8mf4_u8m4(...) __riscv_vlmul_ext_v_u8mf4_u8m4(__VA_ARGS__)
24027
#define vlmul_ext_v_u8mf4_u8m8(...) __riscv_vlmul_ext_v_u8mf4_u8m8(__VA_ARGS__)
24028
#define vlmul_ext_v_u8mf2_u8m1(...) __riscv_vlmul_ext_v_u8mf2_u8m1(__VA_ARGS__)
24029
#define vlmul_ext_v_u8mf2_u8m2(...) __riscv_vlmul_ext_v_u8mf2_u8m2(__VA_ARGS__)
24030
#define vlmul_ext_v_u8mf2_u8m4(...) __riscv_vlmul_ext_v_u8mf2_u8m4(__VA_ARGS__)
24031
#define vlmul_ext_v_u8mf2_u8m8(...) __riscv_vlmul_ext_v_u8mf2_u8m8(__VA_ARGS__)
24032
#define vlmul_ext_v_u8m1_u8m2(...) __riscv_vlmul_ext_v_u8m1_u8m2(__VA_ARGS__)
24033
#define vlmul_ext_v_u8m1_u8m4(...) __riscv_vlmul_ext_v_u8m1_u8m4(__VA_ARGS__)
24034
#define vlmul_ext_v_u8m1_u8m8(...) __riscv_vlmul_ext_v_u8m1_u8m8(__VA_ARGS__)
24035
#define vlmul_ext_v_u8m2_u8m4(...) __riscv_vlmul_ext_v_u8m2_u8m4(__VA_ARGS__)
24036
#define vlmul_ext_v_u8m2_u8m8(...) __riscv_vlmul_ext_v_u8m2_u8m8(__VA_ARGS__)
24037
#define vlmul_ext_v_u8m4_u8m8(...) __riscv_vlmul_ext_v_u8m4_u8m8(__VA_ARGS__)
24038
#define vlmul_ext_v_u16mf4_u16mf2(...) __riscv_vlmul_ext_v_u16mf4_u16mf2(__VA_ARGS__)
24039
#define vlmul_ext_v_u16mf4_u16m1(...) __riscv_vlmul_ext_v_u16mf4_u16m1(__VA_ARGS__)
24040
#define vlmul_ext_v_u16mf4_u16m2(...) __riscv_vlmul_ext_v_u16mf4_u16m2(__VA_ARGS__)
24041
#define vlmul_ext_v_u16mf4_u16m4(...) __riscv_vlmul_ext_v_u16mf4_u16m4(__VA_ARGS__)
24042
#define vlmul_ext_v_u16mf4_u16m8(...) __riscv_vlmul_ext_v_u16mf4_u16m8(__VA_ARGS__)
24043
#define vlmul_ext_v_u16mf2_u16m1(...) __riscv_vlmul_ext_v_u16mf2_u16m1(__VA_ARGS__)
24044
#define vlmul_ext_v_u16mf2_u16m2(...) __riscv_vlmul_ext_v_u16mf2_u16m2(__VA_ARGS__)
24045
#define vlmul_ext_v_u16mf2_u16m4(...) __riscv_vlmul_ext_v_u16mf2_u16m4(__VA_ARGS__)
24046
#define vlmul_ext_v_u16mf2_u16m8(...) __riscv_vlmul_ext_v_u16mf2_u16m8(__VA_ARGS__)
24047
#define vlmul_ext_v_u16m1_u16m2(...) __riscv_vlmul_ext_v_u16m1_u16m2(__VA_ARGS__)
24048
#define vlmul_ext_v_u16m1_u16m4(...) __riscv_vlmul_ext_v_u16m1_u16m4(__VA_ARGS__)
24049
#define vlmul_ext_v_u16m1_u16m8(...) __riscv_vlmul_ext_v_u16m1_u16m8(__VA_ARGS__)
24050
#define vlmul_ext_v_u16m2_u16m4(...) __riscv_vlmul_ext_v_u16m2_u16m4(__VA_ARGS__)
24051
#define vlmul_ext_v_u16m2_u16m8(...) __riscv_vlmul_ext_v_u16m2_u16m8(__VA_ARGS__)
24052
#define vlmul_ext_v_u16m4_u16m8(...) __riscv_vlmul_ext_v_u16m4_u16m8(__VA_ARGS__)
24053
#define vlmul_ext_v_u32mf2_u32m1(...) __riscv_vlmul_ext_v_u32mf2_u32m1(__VA_ARGS__)
24054
#define vlmul_ext_v_u32mf2_u32m2(...) __riscv_vlmul_ext_v_u32mf2_u32m2(__VA_ARGS__)
24055
#define vlmul_ext_v_u32mf2_u32m4(...) __riscv_vlmul_ext_v_u32mf2_u32m4(__VA_ARGS__)
24056
#define vlmul_ext_v_u32mf2_u32m8(...) __riscv_vlmul_ext_v_u32mf2_u32m8(__VA_ARGS__)
24057
#define vlmul_ext_v_u32m1_u32m2(...) __riscv_vlmul_ext_v_u32m1_u32m2(__VA_ARGS__)
24058
#define vlmul_ext_v_u32m1_u32m4(...) __riscv_vlmul_ext_v_u32m1_u32m4(__VA_ARGS__)
24059
#define vlmul_ext_v_u32m1_u32m8(...) __riscv_vlmul_ext_v_u32m1_u32m8(__VA_ARGS__)
24060
#define vlmul_ext_v_u32m2_u32m4(...) __riscv_vlmul_ext_v_u32m2_u32m4(__VA_ARGS__)
24061
#define vlmul_ext_v_u32m2_u32m8(...) __riscv_vlmul_ext_v_u32m2_u32m8(__VA_ARGS__)
24062
#define vlmul_ext_v_u32m4_u32m8(...) __riscv_vlmul_ext_v_u32m4_u32m8(__VA_ARGS__)
24063
#define vlmul_ext_v_u64m1_u64m2(...) __riscv_vlmul_ext_v_u64m1_u64m2(__VA_ARGS__)
24064
#define vlmul_ext_v_u64m1_u64m4(...) __riscv_vlmul_ext_v_u64m1_u64m4(__VA_ARGS__)
24065
#define vlmul_ext_v_u64m1_u64m8(...) __riscv_vlmul_ext_v_u64m1_u64m8(__VA_ARGS__)
24066
#define vlmul_ext_v_u64m2_u64m4(...) __riscv_vlmul_ext_v_u64m2_u64m4(__VA_ARGS__)
24067
#define vlmul_ext_v_u64m2_u64m8(...) __riscv_vlmul_ext_v_u64m2_u64m8(__VA_ARGS__)
24068
#define vlmul_ext_v_u64m4_u64m8(...) __riscv_vlmul_ext_v_u64m4_u64m8(__VA_ARGS__)
24069
#define vlmul_trunc_v_f16mf2_f16mf4(...) __riscv_vlmul_trunc_v_f16mf2_f16mf4(__VA_ARGS__)
24070
#define vlmul_trunc_v_f16m1_f16mf4(...) __riscv_vlmul_trunc_v_f16m1_f16mf4(__VA_ARGS__)
24071
#define vlmul_trunc_v_f16m1_f16mf2(...) __riscv_vlmul_trunc_v_f16m1_f16mf2(__VA_ARGS__)
24072
#define vlmul_trunc_v_f16m2_f16mf4(...) __riscv_vlmul_trunc_v_f16m2_f16mf4(__VA_ARGS__)
24073
#define vlmul_trunc_v_f16m2_f16mf2(...) __riscv_vlmul_trunc_v_f16m2_f16mf2(__VA_ARGS__)
24074
#define vlmul_trunc_v_f16m2_f16m1(...) __riscv_vlmul_trunc_v_f16m2_f16m1(__VA_ARGS__)
24075
#define vlmul_trunc_v_f16m4_f16mf4(...) __riscv_vlmul_trunc_v_f16m4_f16mf4(__VA_ARGS__)
24076
#define vlmul_trunc_v_f16m4_f16mf2(...) __riscv_vlmul_trunc_v_f16m4_f16mf2(__VA_ARGS__)
24077
#define vlmul_trunc_v_f16m4_f16m1(...) __riscv_vlmul_trunc_v_f16m4_f16m1(__VA_ARGS__)
24078
#define vlmul_trunc_v_f16m4_f16m2(...) __riscv_vlmul_trunc_v_f16m4_f16m2(__VA_ARGS__)
24079
#define vlmul_trunc_v_f16m8_f16mf4(...) __riscv_vlmul_trunc_v_f16m8_f16mf4(__VA_ARGS__)
24080
#define vlmul_trunc_v_f16m8_f16mf2(...) __riscv_vlmul_trunc_v_f16m8_f16mf2(__VA_ARGS__)
24081
#define vlmul_trunc_v_f16m8_f16m1(...) __riscv_vlmul_trunc_v_f16m8_f16m1(__VA_ARGS__)
24082
#define vlmul_trunc_v_f16m8_f16m2(...) __riscv_vlmul_trunc_v_f16m8_f16m2(__VA_ARGS__)
24083
#define vlmul_trunc_v_f16m8_f16m4(...) __riscv_vlmul_trunc_v_f16m8_f16m4(__VA_ARGS__)
24084
#define vlmul_trunc_v_f32m1_f32mf2(...) __riscv_vlmul_trunc_v_f32m1_f32mf2(__VA_ARGS__)
24085
#define vlmul_trunc_v_f32m2_f32mf2(...) __riscv_vlmul_trunc_v_f32m2_f32mf2(__VA_ARGS__)
24086
#define vlmul_trunc_v_f32m2_f32m1(...) __riscv_vlmul_trunc_v_f32m2_f32m1(__VA_ARGS__)
24087
#define vlmul_trunc_v_f32m4_f32mf2(...) __riscv_vlmul_trunc_v_f32m4_f32mf2(__VA_ARGS__)
24088
#define vlmul_trunc_v_f32m4_f32m1(...) __riscv_vlmul_trunc_v_f32m4_f32m1(__VA_ARGS__)
24089
#define vlmul_trunc_v_f32m4_f32m2(...) __riscv_vlmul_trunc_v_f32m4_f32m2(__VA_ARGS__)
24090
#define vlmul_trunc_v_f32m8_f32mf2(...) __riscv_vlmul_trunc_v_f32m8_f32mf2(__VA_ARGS__)
24091
#define vlmul_trunc_v_f32m8_f32m1(...) __riscv_vlmul_trunc_v_f32m8_f32m1(__VA_ARGS__)
24092
#define vlmul_trunc_v_f32m8_f32m2(...) __riscv_vlmul_trunc_v_f32m8_f32m2(__VA_ARGS__)
24093
#define vlmul_trunc_v_f32m8_f32m4(...) __riscv_vlmul_trunc_v_f32m8_f32m4(__VA_ARGS__)
24094
#define vlmul_trunc_v_f64m2_f64m1(...) __riscv_vlmul_trunc_v_f64m2_f64m1(__VA_ARGS__)
24095
#define vlmul_trunc_v_f64m4_f64m1(...) __riscv_vlmul_trunc_v_f64m4_f64m1(__VA_ARGS__)
24096
#define vlmul_trunc_v_f64m4_f64m2(...) __riscv_vlmul_trunc_v_f64m4_f64m2(__VA_ARGS__)
24097
#define vlmul_trunc_v_f64m8_f64m1(...) __riscv_vlmul_trunc_v_f64m8_f64m1(__VA_ARGS__)
24098
#define vlmul_trunc_v_f64m8_f64m2(...) __riscv_vlmul_trunc_v_f64m8_f64m2(__VA_ARGS__)
24099
#define vlmul_trunc_v_f64m8_f64m4(...) __riscv_vlmul_trunc_v_f64m8_f64m4(__VA_ARGS__)
24100
#define vlmul_trunc_v_i8mf4_i8mf8(...) __riscv_vlmul_trunc_v_i8mf4_i8mf8(__VA_ARGS__)
24101
#define vlmul_trunc_v_i8mf2_i8mf8(...) __riscv_vlmul_trunc_v_i8mf2_i8mf8(__VA_ARGS__)
24102
#define vlmul_trunc_v_i8mf2_i8mf4(...) __riscv_vlmul_trunc_v_i8mf2_i8mf4(__VA_ARGS__)
24103
#define vlmul_trunc_v_i8m1_i8mf8(...) __riscv_vlmul_trunc_v_i8m1_i8mf8(__VA_ARGS__)
24104
#define vlmul_trunc_v_i8m1_i8mf4(...) __riscv_vlmul_trunc_v_i8m1_i8mf4(__VA_ARGS__)
24105
#define vlmul_trunc_v_i8m1_i8mf2(...) __riscv_vlmul_trunc_v_i8m1_i8mf2(__VA_ARGS__)
24106
#define vlmul_trunc_v_i8m2_i8mf8(...) __riscv_vlmul_trunc_v_i8m2_i8mf8(__VA_ARGS__)
24107
#define vlmul_trunc_v_i8m2_i8mf4(...) __riscv_vlmul_trunc_v_i8m2_i8mf4(__VA_ARGS__)
24108
#define vlmul_trunc_v_i8m2_i8mf2(...) __riscv_vlmul_trunc_v_i8m2_i8mf2(__VA_ARGS__)
24109
#define vlmul_trunc_v_i8m2_i8m1(...) __riscv_vlmul_trunc_v_i8m2_i8m1(__VA_ARGS__)
24110
#define vlmul_trunc_v_i8m4_i8mf8(...) __riscv_vlmul_trunc_v_i8m4_i8mf8(__VA_ARGS__)
24111
#define vlmul_trunc_v_i8m4_i8mf4(...) __riscv_vlmul_trunc_v_i8m4_i8mf4(__VA_ARGS__)
24112
#define vlmul_trunc_v_i8m4_i8mf2(...) __riscv_vlmul_trunc_v_i8m4_i8mf2(__VA_ARGS__)
24113
#define vlmul_trunc_v_i8m4_i8m1(...) __riscv_vlmul_trunc_v_i8m4_i8m1(__VA_ARGS__)
24114
#define vlmul_trunc_v_i8m4_i8m2(...) __riscv_vlmul_trunc_v_i8m4_i8m2(__VA_ARGS__)
24115
#define vlmul_trunc_v_i8m8_i8mf8(...) __riscv_vlmul_trunc_v_i8m8_i8mf8(__VA_ARGS__)
24116
#define vlmul_trunc_v_i8m8_i8mf4(...) __riscv_vlmul_trunc_v_i8m8_i8mf4(__VA_ARGS__)
24117
#define vlmul_trunc_v_i8m8_i8mf2(...) __riscv_vlmul_trunc_v_i8m8_i8mf2(__VA_ARGS__)
24118
#define vlmul_trunc_v_i8m8_i8m1(...) __riscv_vlmul_trunc_v_i8m8_i8m1(__VA_ARGS__)
24119
#define vlmul_trunc_v_i8m8_i8m2(...) __riscv_vlmul_trunc_v_i8m8_i8m2(__VA_ARGS__)
24120
#define vlmul_trunc_v_i8m8_i8m4(...) __riscv_vlmul_trunc_v_i8m8_i8m4(__VA_ARGS__)
24121
#define vlmul_trunc_v_i16mf2_i16mf4(...) __riscv_vlmul_trunc_v_i16mf2_i16mf4(__VA_ARGS__)
24122
#define vlmul_trunc_v_i16m1_i16mf4(...) __riscv_vlmul_trunc_v_i16m1_i16mf4(__VA_ARGS__)
24123
#define vlmul_trunc_v_i16m1_i16mf2(...) __riscv_vlmul_trunc_v_i16m1_i16mf2(__VA_ARGS__)
24124
#define vlmul_trunc_v_i16m2_i16mf4(...) __riscv_vlmul_trunc_v_i16m2_i16mf4(__VA_ARGS__)
24125
#define vlmul_trunc_v_i16m2_i16mf2(...) __riscv_vlmul_trunc_v_i16m2_i16mf2(__VA_ARGS__)
24126
#define vlmul_trunc_v_i16m2_i16m1(...) __riscv_vlmul_trunc_v_i16m2_i16m1(__VA_ARGS__)
24127
#define vlmul_trunc_v_i16m4_i16mf4(...) __riscv_vlmul_trunc_v_i16m4_i16mf4(__VA_ARGS__)
24128
#define vlmul_trunc_v_i16m4_i16mf2(...) __riscv_vlmul_trunc_v_i16m4_i16mf2(__VA_ARGS__)
24129
#define vlmul_trunc_v_i16m4_i16m1(...) __riscv_vlmul_trunc_v_i16m4_i16m1(__VA_ARGS__)
24130
#define vlmul_trunc_v_i16m4_i16m2(...) __riscv_vlmul_trunc_v_i16m4_i16m2(__VA_ARGS__)
24131
#define vlmul_trunc_v_i16m8_i16mf4(...) __riscv_vlmul_trunc_v_i16m8_i16mf4(__VA_ARGS__)
24132
#define vlmul_trunc_v_i16m8_i16mf2(...) __riscv_vlmul_trunc_v_i16m8_i16mf2(__VA_ARGS__)
24133
#define vlmul_trunc_v_i16m8_i16m1(...) __riscv_vlmul_trunc_v_i16m8_i16m1(__VA_ARGS__)
24134
#define vlmul_trunc_v_i16m8_i16m2(...) __riscv_vlmul_trunc_v_i16m8_i16m2(__VA_ARGS__)
24135
#define vlmul_trunc_v_i16m8_i16m4(...) __riscv_vlmul_trunc_v_i16m8_i16m4(__VA_ARGS__)
24136
#define vlmul_trunc_v_i32m1_i32mf2(...) __riscv_vlmul_trunc_v_i32m1_i32mf2(__VA_ARGS__)
24137
#define vlmul_trunc_v_i32m2_i32mf2(...) __riscv_vlmul_trunc_v_i32m2_i32mf2(__VA_ARGS__)
24138
#define vlmul_trunc_v_i32m2_i32m1(...) __riscv_vlmul_trunc_v_i32m2_i32m1(__VA_ARGS__)
24139
#define vlmul_trunc_v_i32m4_i32mf2(...) __riscv_vlmul_trunc_v_i32m4_i32mf2(__VA_ARGS__)
24140
#define vlmul_trunc_v_i32m4_i32m1(...) __riscv_vlmul_trunc_v_i32m4_i32m1(__VA_ARGS__)
24141
#define vlmul_trunc_v_i32m4_i32m2(...) __riscv_vlmul_trunc_v_i32m4_i32m2(__VA_ARGS__)
24142
#define vlmul_trunc_v_i32m8_i32mf2(...) __riscv_vlmul_trunc_v_i32m8_i32mf2(__VA_ARGS__)
24143
#define vlmul_trunc_v_i32m8_i32m1(...) __riscv_vlmul_trunc_v_i32m8_i32m1(__VA_ARGS__)
24144
#define vlmul_trunc_v_i32m8_i32m2(...) __riscv_vlmul_trunc_v_i32m8_i32m2(__VA_ARGS__)
24145
#define vlmul_trunc_v_i32m8_i32m4(...) __riscv_vlmul_trunc_v_i32m8_i32m4(__VA_ARGS__)
24146
#define vlmul_trunc_v_i64m2_i64m1(...) __riscv_vlmul_trunc_v_i64m2_i64m1(__VA_ARGS__)
24147
#define vlmul_trunc_v_i64m4_i64m1(...) __riscv_vlmul_trunc_v_i64m4_i64m1(__VA_ARGS__)
24148
#define vlmul_trunc_v_i64m4_i64m2(...) __riscv_vlmul_trunc_v_i64m4_i64m2(__VA_ARGS__)
24149
#define vlmul_trunc_v_i64m8_i64m1(...) __riscv_vlmul_trunc_v_i64m8_i64m1(__VA_ARGS__)
24150
#define vlmul_trunc_v_i64m8_i64m2(...) __riscv_vlmul_trunc_v_i64m8_i64m2(__VA_ARGS__)
24151
#define vlmul_trunc_v_i64m8_i64m4(...) __riscv_vlmul_trunc_v_i64m8_i64m4(__VA_ARGS__)
24152
#define vlmul_trunc_v_u8mf4_u8mf8(...) __riscv_vlmul_trunc_v_u8mf4_u8mf8(__VA_ARGS__)
24153
#define vlmul_trunc_v_u8mf2_u8mf8(...) __riscv_vlmul_trunc_v_u8mf2_u8mf8(__VA_ARGS__)
24154
#define vlmul_trunc_v_u8mf2_u8mf4(...) __riscv_vlmul_trunc_v_u8mf2_u8mf4(__VA_ARGS__)
24155
#define vlmul_trunc_v_u8m1_u8mf8(...) __riscv_vlmul_trunc_v_u8m1_u8mf8(__VA_ARGS__)
24156
#define vlmul_trunc_v_u8m1_u8mf4(...) __riscv_vlmul_trunc_v_u8m1_u8mf4(__VA_ARGS__)
24157
#define vlmul_trunc_v_u8m1_u8mf2(...) __riscv_vlmul_trunc_v_u8m1_u8mf2(__VA_ARGS__)
24158
#define vlmul_trunc_v_u8m2_u8mf8(...) __riscv_vlmul_trunc_v_u8m2_u8mf8(__VA_ARGS__)
24159
#define vlmul_trunc_v_u8m2_u8mf4(...) __riscv_vlmul_trunc_v_u8m2_u8mf4(__VA_ARGS__)
24160
#define vlmul_trunc_v_u8m2_u8mf2(...) __riscv_vlmul_trunc_v_u8m2_u8mf2(__VA_ARGS__)
24161
#define vlmul_trunc_v_u8m2_u8m1(...) __riscv_vlmul_trunc_v_u8m2_u8m1(__VA_ARGS__)
24162
#define vlmul_trunc_v_u8m4_u8mf8(...) __riscv_vlmul_trunc_v_u8m4_u8mf8(__VA_ARGS__)
24163
#define vlmul_trunc_v_u8m4_u8mf4(...) __riscv_vlmul_trunc_v_u8m4_u8mf4(__VA_ARGS__)
24164
#define vlmul_trunc_v_u8m4_u8mf2(...) __riscv_vlmul_trunc_v_u8m4_u8mf2(__VA_ARGS__)
24165
#define vlmul_trunc_v_u8m4_u8m1(...) __riscv_vlmul_trunc_v_u8m4_u8m1(__VA_ARGS__)
24166
#define vlmul_trunc_v_u8m4_u8m2(...) __riscv_vlmul_trunc_v_u8m4_u8m2(__VA_ARGS__)
24167
#define vlmul_trunc_v_u8m8_u8mf8(...) __riscv_vlmul_trunc_v_u8m8_u8mf8(__VA_ARGS__)
24168
#define vlmul_trunc_v_u8m8_u8mf4(...) __riscv_vlmul_trunc_v_u8m8_u8mf4(__VA_ARGS__)
24169
#define vlmul_trunc_v_u8m8_u8mf2(...) __riscv_vlmul_trunc_v_u8m8_u8mf2(__VA_ARGS__)
24170
#define vlmul_trunc_v_u8m8_u8m1(...) __riscv_vlmul_trunc_v_u8m8_u8m1(__VA_ARGS__)
24171
#define vlmul_trunc_v_u8m8_u8m2(...) __riscv_vlmul_trunc_v_u8m8_u8m2(__VA_ARGS__)
24172
#define vlmul_trunc_v_u8m8_u8m4(...) __riscv_vlmul_trunc_v_u8m8_u8m4(__VA_ARGS__)
24173
#define vlmul_trunc_v_u16mf2_u16mf4(...) __riscv_vlmul_trunc_v_u16mf2_u16mf4(__VA_ARGS__)
24174
#define vlmul_trunc_v_u16m1_u16mf4(...) __riscv_vlmul_trunc_v_u16m1_u16mf4(__VA_ARGS__)
24175
#define vlmul_trunc_v_u16m1_u16mf2(...) __riscv_vlmul_trunc_v_u16m1_u16mf2(__VA_ARGS__)
24176
#define vlmul_trunc_v_u16m2_u16mf4(...) __riscv_vlmul_trunc_v_u16m2_u16mf4(__VA_ARGS__)
24177
#define vlmul_trunc_v_u16m2_u16mf2(...) __riscv_vlmul_trunc_v_u16m2_u16mf2(__VA_ARGS__)
24178
#define vlmul_trunc_v_u16m2_u16m1(...) __riscv_vlmul_trunc_v_u16m2_u16m1(__VA_ARGS__)
24179
#define vlmul_trunc_v_u16m4_u16mf4(...) __riscv_vlmul_trunc_v_u16m4_u16mf4(__VA_ARGS__)
24180
#define vlmul_trunc_v_u16m4_u16mf2(...) __riscv_vlmul_trunc_v_u16m4_u16mf2(__VA_ARGS__)
24181
#define vlmul_trunc_v_u16m4_u16m1(...) __riscv_vlmul_trunc_v_u16m4_u16m1(__VA_ARGS__)
24182
#define vlmul_trunc_v_u16m4_u16m2(...) __riscv_vlmul_trunc_v_u16m4_u16m2(__VA_ARGS__)
24183
#define vlmul_trunc_v_u16m8_u16mf4(...) __riscv_vlmul_trunc_v_u16m8_u16mf4(__VA_ARGS__)
24184
#define vlmul_trunc_v_u16m8_u16mf2(...) __riscv_vlmul_trunc_v_u16m8_u16mf2(__VA_ARGS__)
24185
#define vlmul_trunc_v_u16m8_u16m1(...) __riscv_vlmul_trunc_v_u16m8_u16m1(__VA_ARGS__)
24186
#define vlmul_trunc_v_u16m8_u16m2(...) __riscv_vlmul_trunc_v_u16m8_u16m2(__VA_ARGS__)
24187
#define vlmul_trunc_v_u16m8_u16m4(...) __riscv_vlmul_trunc_v_u16m8_u16m4(__VA_ARGS__)
24188
#define vlmul_trunc_v_u32m1_u32mf2(...) __riscv_vlmul_trunc_v_u32m1_u32mf2(__VA_ARGS__)
24189
#define vlmul_trunc_v_u32m2_u32mf2(...) __riscv_vlmul_trunc_v_u32m2_u32mf2(__VA_ARGS__)
24190
#define vlmul_trunc_v_u32m2_u32m1(...) __riscv_vlmul_trunc_v_u32m2_u32m1(__VA_ARGS__)
24191
#define vlmul_trunc_v_u32m4_u32mf2(...) __riscv_vlmul_trunc_v_u32m4_u32mf2(__VA_ARGS__)
24192
#define vlmul_trunc_v_u32m4_u32m1(...) __riscv_vlmul_trunc_v_u32m4_u32m1(__VA_ARGS__)
24193
#define vlmul_trunc_v_u32m4_u32m2(...) __riscv_vlmul_trunc_v_u32m4_u32m2(__VA_ARGS__)
24194
#define vlmul_trunc_v_u32m8_u32mf2(...) __riscv_vlmul_trunc_v_u32m8_u32mf2(__VA_ARGS__)
24195
#define vlmul_trunc_v_u32m8_u32m1(...) __riscv_vlmul_trunc_v_u32m8_u32m1(__VA_ARGS__)
24196
#define vlmul_trunc_v_u32m8_u32m2(...) __riscv_vlmul_trunc_v_u32m8_u32m2(__VA_ARGS__)
24197
#define vlmul_trunc_v_u32m8_u32m4(...) __riscv_vlmul_trunc_v_u32m8_u32m4(__VA_ARGS__)
24198
#define vlmul_trunc_v_u64m2_u64m1(...) __riscv_vlmul_trunc_v_u64m2_u64m1(__VA_ARGS__)
24199
#define vlmul_trunc_v_u64m4_u64m1(...) __riscv_vlmul_trunc_v_u64m4_u64m1(__VA_ARGS__)
24200
#define vlmul_trunc_v_u64m4_u64m2(...) __riscv_vlmul_trunc_v_u64m4_u64m2(__VA_ARGS__)
24201
#define vlmul_trunc_v_u64m8_u64m1(...) __riscv_vlmul_trunc_v_u64m8_u64m1(__VA_ARGS__)
24202
#define vlmul_trunc_v_u64m8_u64m2(...) __riscv_vlmul_trunc_v_u64m8_u64m2(__VA_ARGS__)
24203
#define vlmul_trunc_v_u64m8_u64m4(...) __riscv_vlmul_trunc_v_u64m8_u64m4(__VA_ARGS__)
24204
#define vundefined_f16mf4(...) __riscv_vundefined_f16mf4(__VA_ARGS__)
24205
#define vundefined_f16mf2(...) __riscv_vundefined_f16mf2(__VA_ARGS__)
24206
#define vundefined_f16m1(...) __riscv_vundefined_f16m1(__VA_ARGS__)
24207
#define vundefined_f16m2(...) __riscv_vundefined_f16m2(__VA_ARGS__)
24208
#define vundefined_f16m4(...) __riscv_vundefined_f16m4(__VA_ARGS__)
24209
#define vundefined_f16m8(...) __riscv_vundefined_f16m8(__VA_ARGS__)
24210
#define vundefined_f32mf2(...) __riscv_vundefined_f32mf2(__VA_ARGS__)
24211
#define vundefined_f32m1(...) __riscv_vundefined_f32m1(__VA_ARGS__)
24212
#define vundefined_f32m2(...) __riscv_vundefined_f32m2(__VA_ARGS__)
24213
#define vundefined_f32m4(...) __riscv_vundefined_f32m4(__VA_ARGS__)
24214
#define vundefined_f32m8(...) __riscv_vundefined_f32m8(__VA_ARGS__)
24215
#define vundefined_f64m1(...) __riscv_vundefined_f64m1(__VA_ARGS__)
24216
#define vundefined_f64m2(...) __riscv_vundefined_f64m2(__VA_ARGS__)
24217
#define vundefined_f64m4(...) __riscv_vundefined_f64m4(__VA_ARGS__)
24218
#define vundefined_f64m8(...) __riscv_vundefined_f64m8(__VA_ARGS__)
24219
#define vundefined_i8mf8(...) __riscv_vundefined_i8mf8(__VA_ARGS__)
24220
#define vundefined_i8mf4(...) __riscv_vundefined_i8mf4(__VA_ARGS__)
24221
#define vundefined_i8mf2(...) __riscv_vundefined_i8mf2(__VA_ARGS__)
24222
#define vundefined_i8m1(...) __riscv_vundefined_i8m1(__VA_ARGS__)
24223
#define vundefined_i8m2(...) __riscv_vundefined_i8m2(__VA_ARGS__)
24224
#define vundefined_i8m4(...) __riscv_vundefined_i8m4(__VA_ARGS__)
24225
#define vundefined_i8m8(...) __riscv_vundefined_i8m8(__VA_ARGS__)
24226
#define vundefined_i16mf4(...) __riscv_vundefined_i16mf4(__VA_ARGS__)
24227
#define vundefined_i16mf2(...) __riscv_vundefined_i16mf2(__VA_ARGS__)
24228
#define vundefined_i16m1(...) __riscv_vundefined_i16m1(__VA_ARGS__)
24229
#define vundefined_i16m2(...) __riscv_vundefined_i16m2(__VA_ARGS__)
24230
#define vundefined_i16m4(...) __riscv_vundefined_i16m4(__VA_ARGS__)
24231
#define vundefined_i16m8(...) __riscv_vundefined_i16m8(__VA_ARGS__)
24232
#define vundefined_i32mf2(...) __riscv_vundefined_i32mf2(__VA_ARGS__)
24233
#define vundefined_i32m1(...) __riscv_vundefined_i32m1(__VA_ARGS__)
24234
#define vundefined_i32m2(...) __riscv_vundefined_i32m2(__VA_ARGS__)
24235
#define vundefined_i32m4(...) __riscv_vundefined_i32m4(__VA_ARGS__)
24236
#define vundefined_i32m8(...) __riscv_vundefined_i32m8(__VA_ARGS__)
24237
#define vundefined_i64m1(...) __riscv_vundefined_i64m1(__VA_ARGS__)
24238
#define vundefined_i64m2(...) __riscv_vundefined_i64m2(__VA_ARGS__)
24239
#define vundefined_i64m4(...) __riscv_vundefined_i64m4(__VA_ARGS__)
24240
#define vundefined_i64m8(...) __riscv_vundefined_i64m8(__VA_ARGS__)
24241
#define vundefined_u8mf8(...) __riscv_vundefined_u8mf8(__VA_ARGS__)
24242
#define vundefined_u8mf4(...) __riscv_vundefined_u8mf4(__VA_ARGS__)
24243
#define vundefined_u8mf2(...) __riscv_vundefined_u8mf2(__VA_ARGS__)
24244
#define vundefined_u8m1(...) __riscv_vundefined_u8m1(__VA_ARGS__)
24245
#define vundefined_u8m2(...) __riscv_vundefined_u8m2(__VA_ARGS__)
24246
#define vundefined_u8m4(...) __riscv_vundefined_u8m4(__VA_ARGS__)
24247
#define vundefined_u8m8(...) __riscv_vundefined_u8m8(__VA_ARGS__)
24248
#define vundefined_u16mf4(...) __riscv_vundefined_u16mf4(__VA_ARGS__)
24249
#define vundefined_u16mf2(...) __riscv_vundefined_u16mf2(__VA_ARGS__)
24250
#define vundefined_u16m1(...) __riscv_vundefined_u16m1(__VA_ARGS__)
24251
#define vundefined_u16m2(...) __riscv_vundefined_u16m2(__VA_ARGS__)
24252
#define vundefined_u16m4(...) __riscv_vundefined_u16m4(__VA_ARGS__)
24253
#define vundefined_u16m8(...) __riscv_vundefined_u16m8(__VA_ARGS__)
24254
#define vundefined_u32mf2(...) __riscv_vundefined_u32mf2(__VA_ARGS__)
24255
#define vundefined_u32m1(...) __riscv_vundefined_u32m1(__VA_ARGS__)
24256
#define vundefined_u32m2(...) __riscv_vundefined_u32m2(__VA_ARGS__)
24257
#define vundefined_u32m4(...) __riscv_vundefined_u32m4(__VA_ARGS__)
24258
#define vundefined_u32m8(...) __riscv_vundefined_u32m8(__VA_ARGS__)
24259
#define vundefined_u64m1(...) __riscv_vundefined_u64m1(__VA_ARGS__)
24260
#define vundefined_u64m2(...) __riscv_vundefined_u64m2(__VA_ARGS__)
24261
#define vundefined_u64m4(...) __riscv_vundefined_u64m4(__VA_ARGS__)
24262
#define vundefined_u64m8(...) __riscv_vundefined_u64m8(__VA_ARGS__)
24263
#define vset_v_f16m1_f16m2(...) __riscv_vset_v_f16m1_f16m2(__VA_ARGS__)
24264
#define vset_v_f16m1_f16m4(...) __riscv_vset_v_f16m1_f16m4(__VA_ARGS__)
24265
#define vset_v_f16m2_f16m4(...) __riscv_vset_v_f16m2_f16m4(__VA_ARGS__)
24266
#define vset_v_f16m1_f16m8(...) __riscv_vset_v_f16m1_f16m8(__VA_ARGS__)
24267
#define vset_v_f16m2_f16m8(...) __riscv_vset_v_f16m2_f16m8(__VA_ARGS__)
24268
#define vset_v_f16m4_f16m8(...) __riscv_vset_v_f16m4_f16m8(__VA_ARGS__)
24269
#define vset_v_f32m1_f32m2(...) __riscv_vset_v_f32m1_f32m2(__VA_ARGS__)
24270
#define vset_v_f32m1_f32m4(...) __riscv_vset_v_f32m1_f32m4(__VA_ARGS__)
24271
#define vset_v_f32m2_f32m4(...) __riscv_vset_v_f32m2_f32m4(__VA_ARGS__)
24272
#define vset_v_f32m1_f32m8(...) __riscv_vset_v_f32m1_f32m8(__VA_ARGS__)
24273
#define vset_v_f32m2_f32m8(...) __riscv_vset_v_f32m2_f32m8(__VA_ARGS__)
24274
#define vset_v_f32m4_f32m8(...) __riscv_vset_v_f32m4_f32m8(__VA_ARGS__)
24275
#define vset_v_f64m1_f64m2(...) __riscv_vset_v_f64m1_f64m2(__VA_ARGS__)
24276
#define vset_v_f64m1_f64m4(...) __riscv_vset_v_f64m1_f64m4(__VA_ARGS__)
24277
#define vset_v_f64m2_f64m4(...) __riscv_vset_v_f64m2_f64m4(__VA_ARGS__)
24278
#define vset_v_f64m1_f64m8(...) __riscv_vset_v_f64m1_f64m8(__VA_ARGS__)
24279
#define vset_v_f64m2_f64m8(...) __riscv_vset_v_f64m2_f64m8(__VA_ARGS__)
24280
#define vset_v_f64m4_f64m8(...) __riscv_vset_v_f64m4_f64m8(__VA_ARGS__)
24281
#define vset_v_i8m1_i8m2(...) __riscv_vset_v_i8m1_i8m2(__VA_ARGS__)
24282
#define vset_v_i8m1_i8m4(...) __riscv_vset_v_i8m1_i8m4(__VA_ARGS__)
24283
#define vset_v_i8m2_i8m4(...) __riscv_vset_v_i8m2_i8m4(__VA_ARGS__)
24284
#define vset_v_i8m1_i8m8(...) __riscv_vset_v_i8m1_i8m8(__VA_ARGS__)
24285
#define vset_v_i8m2_i8m8(...) __riscv_vset_v_i8m2_i8m8(__VA_ARGS__)
24286
#define vset_v_i8m4_i8m8(...) __riscv_vset_v_i8m4_i8m8(__VA_ARGS__)
24287
#define vset_v_i16m1_i16m2(...) __riscv_vset_v_i16m1_i16m2(__VA_ARGS__)
24288
#define vset_v_i16m1_i16m4(...) __riscv_vset_v_i16m1_i16m4(__VA_ARGS__)
24289
#define vset_v_i16m2_i16m4(...) __riscv_vset_v_i16m2_i16m4(__VA_ARGS__)
24290
#define vset_v_i16m1_i16m8(...) __riscv_vset_v_i16m1_i16m8(__VA_ARGS__)
24291
#define vset_v_i16m2_i16m8(...) __riscv_vset_v_i16m2_i16m8(__VA_ARGS__)
24292
#define vset_v_i16m4_i16m8(...) __riscv_vset_v_i16m4_i16m8(__VA_ARGS__)
24293
#define vset_v_i32m1_i32m2(...) __riscv_vset_v_i32m1_i32m2(__VA_ARGS__)
24294
#define vset_v_i32m1_i32m4(...) __riscv_vset_v_i32m1_i32m4(__VA_ARGS__)
24295
#define vset_v_i32m2_i32m4(...) __riscv_vset_v_i32m2_i32m4(__VA_ARGS__)
24296
#define vset_v_i32m1_i32m8(...) __riscv_vset_v_i32m1_i32m8(__VA_ARGS__)
24297
#define vset_v_i32m2_i32m8(...) __riscv_vset_v_i32m2_i32m8(__VA_ARGS__)
24298
#define vset_v_i32m4_i32m8(...) __riscv_vset_v_i32m4_i32m8(__VA_ARGS__)
24299
#define vset_v_i64m1_i64m2(...) __riscv_vset_v_i64m1_i64m2(__VA_ARGS__)
24300
#define vset_v_i64m1_i64m4(...) __riscv_vset_v_i64m1_i64m4(__VA_ARGS__)
24301
#define vset_v_i64m2_i64m4(...) __riscv_vset_v_i64m2_i64m4(__VA_ARGS__)
24302
#define vset_v_i64m1_i64m8(...) __riscv_vset_v_i64m1_i64m8(__VA_ARGS__)
24303
#define vset_v_i64m2_i64m8(...) __riscv_vset_v_i64m2_i64m8(__VA_ARGS__)
24304
#define vset_v_i64m4_i64m8(...) __riscv_vset_v_i64m4_i64m8(__VA_ARGS__)
24305
#define vset_v_u8m1_u8m2(...) __riscv_vset_v_u8m1_u8m2(__VA_ARGS__)
24306
#define vset_v_u8m1_u8m4(...) __riscv_vset_v_u8m1_u8m4(__VA_ARGS__)
24307
#define vset_v_u8m2_u8m4(...) __riscv_vset_v_u8m2_u8m4(__VA_ARGS__)
24308
#define vset_v_u8m1_u8m8(...) __riscv_vset_v_u8m1_u8m8(__VA_ARGS__)
24309
#define vset_v_u8m2_u8m8(...) __riscv_vset_v_u8m2_u8m8(__VA_ARGS__)
24310
#define vset_v_u8m4_u8m8(...) __riscv_vset_v_u8m4_u8m8(__VA_ARGS__)
24311
#define vset_v_u16m1_u16m2(...) __riscv_vset_v_u16m1_u16m2(__VA_ARGS__)
24312
#define vset_v_u16m1_u16m4(...) __riscv_vset_v_u16m1_u16m4(__VA_ARGS__)
24313
#define vset_v_u16m2_u16m4(...) __riscv_vset_v_u16m2_u16m4(__VA_ARGS__)
24314
#define vset_v_u16m1_u16m8(...) __riscv_vset_v_u16m1_u16m8(__VA_ARGS__)
24315
#define vset_v_u16m2_u16m8(...) __riscv_vset_v_u16m2_u16m8(__VA_ARGS__)
24316
#define vset_v_u16m4_u16m8(...) __riscv_vset_v_u16m4_u16m8(__VA_ARGS__)
24317
#define vset_v_u32m1_u32m2(...) __riscv_vset_v_u32m1_u32m2(__VA_ARGS__)
24318
#define vset_v_u32m1_u32m4(...) __riscv_vset_v_u32m1_u32m4(__VA_ARGS__)
24319
#define vset_v_u32m2_u32m4(...) __riscv_vset_v_u32m2_u32m4(__VA_ARGS__)
24320
#define vset_v_u32m1_u32m8(...) __riscv_vset_v_u32m1_u32m8(__VA_ARGS__)
24321
#define vset_v_u32m2_u32m8(...) __riscv_vset_v_u32m2_u32m8(__VA_ARGS__)
24322
#define vset_v_u32m4_u32m8(...) __riscv_vset_v_u32m4_u32m8(__VA_ARGS__)
24323
#define vset_v_u64m1_u64m2(...) __riscv_vset_v_u64m1_u64m2(__VA_ARGS__)
24324
#define vset_v_u64m1_u64m4(...) __riscv_vset_v_u64m1_u64m4(__VA_ARGS__)
24325
#define vset_v_u64m2_u64m4(...) __riscv_vset_v_u64m2_u64m4(__VA_ARGS__)
24326
#define vset_v_u64m1_u64m8(...) __riscv_vset_v_u64m1_u64m8(__VA_ARGS__)
24327
#define vset_v_u64m2_u64m8(...) __riscv_vset_v_u64m2_u64m8(__VA_ARGS__)
24328
#define vset_v_u64m4_u64m8(...) __riscv_vset_v_u64m4_u64m8(__VA_ARGS__)
24329
#define vget_v_f16m2_f16m1(...) __riscv_vget_v_f16m2_f16m1(__VA_ARGS__)
24330
#define vget_v_f16m4_f16m1(...) __riscv_vget_v_f16m4_f16m1(__VA_ARGS__)
24331
#define vget_v_f16m8_f16m1(...) __riscv_vget_v_f16m8_f16m1(__VA_ARGS__)
24332
#define vget_v_f16m4_f16m2(...) __riscv_vget_v_f16m4_f16m2(__VA_ARGS__)
24333
#define vget_v_f16m8_f16m2(...) __riscv_vget_v_f16m8_f16m2(__VA_ARGS__)
24334
#define vget_v_f16m8_f16m4(...) __riscv_vget_v_f16m8_f16m4(__VA_ARGS__)
24335
#define vget_v_f32m2_f32m1(...) __riscv_vget_v_f32m2_f32m1(__VA_ARGS__)
24336
#define vget_v_f32m4_f32m1(...) __riscv_vget_v_f32m4_f32m1(__VA_ARGS__)
24337
#define vget_v_f32m8_f32m1(...) __riscv_vget_v_f32m8_f32m1(__VA_ARGS__)
24338
#define vget_v_f32m4_f32m2(...) __riscv_vget_v_f32m4_f32m2(__VA_ARGS__)
24339
#define vget_v_f32m8_f32m2(...) __riscv_vget_v_f32m8_f32m2(__VA_ARGS__)
24340
#define vget_v_f32m8_f32m4(...) __riscv_vget_v_f32m8_f32m4(__VA_ARGS__)
24341
#define vget_v_f64m2_f64m1(...) __riscv_vget_v_f64m2_f64m1(__VA_ARGS__)
24342
#define vget_v_f64m4_f64m1(...) __riscv_vget_v_f64m4_f64m1(__VA_ARGS__)
24343
#define vget_v_f64m8_f64m1(...) __riscv_vget_v_f64m8_f64m1(__VA_ARGS__)
24344
#define vget_v_f64m4_f64m2(...) __riscv_vget_v_f64m4_f64m2(__VA_ARGS__)
24345
#define vget_v_f64m8_f64m2(...) __riscv_vget_v_f64m8_f64m2(__VA_ARGS__)
24346
#define vget_v_f64m8_f64m4(...) __riscv_vget_v_f64m8_f64m4(__VA_ARGS__)
24347
#define vget_v_i8m2_i8m1(...) __riscv_vget_v_i8m2_i8m1(__VA_ARGS__)
24348
#define vget_v_i8m4_i8m1(...) __riscv_vget_v_i8m4_i8m1(__VA_ARGS__)
24349
#define vget_v_i8m8_i8m1(...) __riscv_vget_v_i8m8_i8m1(__VA_ARGS__)
24350
#define vget_v_i8m4_i8m2(...) __riscv_vget_v_i8m4_i8m2(__VA_ARGS__)
24351
#define vget_v_i8m8_i8m2(...) __riscv_vget_v_i8m8_i8m2(__VA_ARGS__)
24352
#define vget_v_i8m8_i8m4(...) __riscv_vget_v_i8m8_i8m4(__VA_ARGS__)
24353
#define vget_v_i16m2_i16m1(...) __riscv_vget_v_i16m2_i16m1(__VA_ARGS__)
24354
#define vget_v_i16m4_i16m1(...) __riscv_vget_v_i16m4_i16m1(__VA_ARGS__)
24355
#define vget_v_i16m8_i16m1(...) __riscv_vget_v_i16m8_i16m1(__VA_ARGS__)
24356
#define vget_v_i16m4_i16m2(...) __riscv_vget_v_i16m4_i16m2(__VA_ARGS__)
24357
#define vget_v_i16m8_i16m2(...) __riscv_vget_v_i16m8_i16m2(__VA_ARGS__)
24358
#define vget_v_i16m8_i16m4(...) __riscv_vget_v_i16m8_i16m4(__VA_ARGS__)
24359
#define vget_v_i32m2_i32m1(...) __riscv_vget_v_i32m2_i32m1(__VA_ARGS__)
24360
#define vget_v_i32m4_i32m1(...) __riscv_vget_v_i32m4_i32m1(__VA_ARGS__)
24361
#define vget_v_i32m8_i32m1(...) __riscv_vget_v_i32m8_i32m1(__VA_ARGS__)
24362
#define vget_v_i32m4_i32m2(...) __riscv_vget_v_i32m4_i32m2(__VA_ARGS__)
24363
#define vget_v_i32m8_i32m2(...) __riscv_vget_v_i32m8_i32m2(__VA_ARGS__)
24364
#define vget_v_i32m8_i32m4(...) __riscv_vget_v_i32m8_i32m4(__VA_ARGS__)
24365
#define vget_v_i64m2_i64m1(...) __riscv_vget_v_i64m2_i64m1(__VA_ARGS__)
24366
#define vget_v_i64m4_i64m1(...) __riscv_vget_v_i64m4_i64m1(__VA_ARGS__)
24367
#define vget_v_i64m8_i64m1(...) __riscv_vget_v_i64m8_i64m1(__VA_ARGS__)
24368
#define vget_v_i64m4_i64m2(...) __riscv_vget_v_i64m4_i64m2(__VA_ARGS__)
24369
#define vget_v_i64m8_i64m2(...) __riscv_vget_v_i64m8_i64m2(__VA_ARGS__)
24370
#define vget_v_i64m8_i64m4(...) __riscv_vget_v_i64m8_i64m4(__VA_ARGS__)
24371
#define vget_v_u8m2_u8m1(...) __riscv_vget_v_u8m2_u8m1(__VA_ARGS__)
24372
#define vget_v_u8m4_u8m1(...) __riscv_vget_v_u8m4_u8m1(__VA_ARGS__)
24373
#define vget_v_u8m8_u8m1(...) __riscv_vget_v_u8m8_u8m1(__VA_ARGS__)
24374
#define vget_v_u8m4_u8m2(...) __riscv_vget_v_u8m4_u8m2(__VA_ARGS__)
24375
#define vget_v_u8m8_u8m2(...) __riscv_vget_v_u8m8_u8m2(__VA_ARGS__)
24376
#define vget_v_u8m8_u8m4(...) __riscv_vget_v_u8m8_u8m4(__VA_ARGS__)
24377
#define vget_v_u16m2_u16m1(...) __riscv_vget_v_u16m2_u16m1(__VA_ARGS__)
24378
#define vget_v_u16m4_u16m1(...) __riscv_vget_v_u16m4_u16m1(__VA_ARGS__)
24379
#define vget_v_u16m8_u16m1(...) __riscv_vget_v_u16m8_u16m1(__VA_ARGS__)
24380
#define vget_v_u16m4_u16m2(...) __riscv_vget_v_u16m4_u16m2(__VA_ARGS__)
24381
#define vget_v_u16m8_u16m2(...) __riscv_vget_v_u16m8_u16m2(__VA_ARGS__)
24382
#define vget_v_u16m8_u16m4(...) __riscv_vget_v_u16m8_u16m4(__VA_ARGS__)
24383
#define vget_v_u32m2_u32m1(...) __riscv_vget_v_u32m2_u32m1(__VA_ARGS__)
24384
#define vget_v_u32m4_u32m1(...) __riscv_vget_v_u32m4_u32m1(__VA_ARGS__)
24385
#define vget_v_u32m8_u32m1(...) __riscv_vget_v_u32m8_u32m1(__VA_ARGS__)
24386
#define vget_v_u32m4_u32m2(...) __riscv_vget_v_u32m4_u32m2(__VA_ARGS__)
24387
#define vget_v_u32m8_u32m2(...) __riscv_vget_v_u32m8_u32m2(__VA_ARGS__)
24388
#define vget_v_u32m8_u32m4(...) __riscv_vget_v_u32m8_u32m4(__VA_ARGS__)
24389
#define vget_v_u64m2_u64m1(...) __riscv_vget_v_u64m2_u64m1(__VA_ARGS__)
24390
#define vget_v_u64m4_u64m1(...) __riscv_vget_v_u64m4_u64m1(__VA_ARGS__)
24391
#define vget_v_u64m8_u64m1(...) __riscv_vget_v_u64m8_u64m1(__VA_ARGS__)
24392
#define vget_v_u64m4_u64m2(...) __riscv_vget_v_u64m4_u64m2(__VA_ARGS__)
24393
#define vget_v_u64m8_u64m2(...) __riscv_vget_v_u64m8_u64m2(__VA_ARGS__)
24394
#define vget_v_u64m8_u64m4(...) __riscv_vget_v_u64m8_u64m4(__VA_ARGS__)
24395
#endif
