EstervQrCode 2.0.0
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intrin_rvv_compat_overloaded.hpp
1// This file is part of OpenCV project.
2// It is subject to the license terms in the LICENSE file found in the top-level directory
3// of this distribution and at http://opencv.org/license.html.
4
5#ifndef OPENCV_HAL_INTRIN_RVV_COMPAT_OVERLOAD_HPP
6#define OPENCV_HAL_INTRIN_RVV_COMPAT_OVERLOAD_HPP
7
8// This file requires VTraits to be defined for vector types
9
10#define OPENCV_HAL_IMPL_RVV_FUN_AND(REG, SUF) \
11inline static REG vand(const REG & op1, const REG & op2, size_t vl) \
12{ \
13 return vand_vv_##SUF(op1, op2, vl); \
14}
15
16OPENCV_HAL_IMPL_RVV_FUN_AND(vint8m1_t, i8m1)
17OPENCV_HAL_IMPL_RVV_FUN_AND(vuint8m1_t, u8m1)
18OPENCV_HAL_IMPL_RVV_FUN_AND(vint16m1_t, i16m1)
19OPENCV_HAL_IMPL_RVV_FUN_AND(vuint16m1_t, u16m1)
20OPENCV_HAL_IMPL_RVV_FUN_AND(vint32m1_t, i32m1)
21OPENCV_HAL_IMPL_RVV_FUN_AND(vuint32m1_t, u32m1)
22OPENCV_HAL_IMPL_RVV_FUN_AND(vint64m1_t, i64m1)
23OPENCV_HAL_IMPL_RVV_FUN_AND(vuint64m1_t, u64m1)
24
25#define OPENCV_HAL_IMPL_RVV_FUN_LOXEI(REG, SUF, INDX, ISUF) \
26inline static REG vloxe##ISUF(const VTraits<REG>::lane_type *base, INDX bindex, size_t vl) \
27{ \
28 return vloxe##ISUF##_v_##SUF(base, bindex, vl); \
29}
30
31OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vint8m1_t, i8m1, vuint8m1_t, i8)
32OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vint8m2_t, i8m2, vuint8m2_t, i8)
33OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vint8m4_t, i8m4, vuint8m4_t, i8)
34OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vint8m8_t, i8m8, vuint8m8_t, i8)
35OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vint8m1_t, i8m1, vuint32m4_t, i32)
36OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vint8m2_t, i8m2, vuint32m8_t, i32)
37OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vint16m1_t, i16m1, vuint32m2_t, i32)
38OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vint32m1_t, i32m1, vuint32m1_t, i32)
39OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vint32m2_t, i32m2, vuint32m2_t, i32)
40OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vint32m4_t, i32m4, vuint32m4_t, i32)
41OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vint32m8_t, i32m8, vuint32m8_t, i32)
42OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vint64m1_t, i64m1, vuint32mf2_t, i32)
43OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vuint8m1_t, u8m1, vuint8m1_t, i8)
44OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vuint8m2_t, u8m2, vuint8m2_t, i8)
45OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vuint8m4_t, u8m4, vuint8m4_t, i8)
46OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vuint8m8_t, u8m8, vuint8m8_t, i8)
47OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vfloat32m1_t, f32m1, vuint32m1_t, i32)
48OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vuint32m1_t, u32m1, vuint32m1_t, i32)
49#if CV_SIMD_SCALABLE_64F
50OPENCV_HAL_IMPL_RVV_FUN_LOXEI(vfloat64m1_t, f64m1, vuint32mf2_t, i32)
51#endif
52
53#define OPENCV_HAL_IMPL_RVV_FUN_MUL(REG, SUF) \
54inline static REG##m1_t vmul(const REG##m1_t & op1, const REG##m1_t & op2, size_t vl) \
55{ \
56 return vmul_vv_##SUF##m1(op1, op2, vl); \
57} \
58inline static REG##m1_t vmul(const REG##m1_t & op1, VTraits<REG##m1_t>::lane_type op2, size_t vl) \
59{ \
60 return vmul_vx_##SUF##m1(op1, op2, vl); \
61} \
62inline static REG##m2_t vmul(const REG##m2_t & op1, const REG##m2_t & op2, size_t vl) \
63{ \
64 return vmul_vv_##SUF##m2(op1, op2, vl); \
65} \
66inline static REG##m2_t vmul(const REG##m2_t & op1, VTraits<REG##m2_t>::lane_type op2, size_t vl) \
67{ \
68 return vmul_vx_##SUF##m2(op1, op2, vl); \
69} \
70inline static REG##m4_t vmul(const REG##m4_t & op1, const REG##m4_t & op2, size_t vl) \
71{ \
72 return vmul_vv_##SUF##m4(op1, op2, vl); \
73} \
74inline static REG##m4_t vmul(const REG##m4_t & op1, VTraits<REG##m4_t>::lane_type op2, size_t vl) \
75{ \
76 return vmul_vx_##SUF##m4(op1, op2, vl); \
77} \
78inline static REG##m8_t vmul(const REG##m8_t & op1, const REG##m8_t & op2, size_t vl) \
79{ \
80 return vmul_vv_##SUF##m8(op1, op2, vl); \
81} \
82inline static REG##m8_t vmul(const REG##m8_t & op1, VTraits<REG##m8_t>::lane_type op2, size_t vl) \
83{ \
84 return vmul_vx_##SUF##m8(op1, op2, vl); \
85}
86
87OPENCV_HAL_IMPL_RVV_FUN_MUL(vint8, i8)
88OPENCV_HAL_IMPL_RVV_FUN_MUL(vuint8, u8)
89OPENCV_HAL_IMPL_RVV_FUN_MUL(vint16, i16)
90OPENCV_HAL_IMPL_RVV_FUN_MUL(vuint16, u16)
91OPENCV_HAL_IMPL_RVV_FUN_MUL(vint32, i32)
92OPENCV_HAL_IMPL_RVV_FUN_MUL(vuint32, u32)
93
94#define OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(REG1, SUF1, REG2, SUF2) \
95inline static REG1##m1_t vreinterpret_##SUF1##m1(const REG2##m1_t & src) \
96{\
97 return vreinterpret_v_##SUF2##m1_##SUF1##m1(src); \
98} \
99inline static REG1##m2_t vreinterpret_##SUF1##m2(const REG2##m2_t & src) \
100{\
101 return vreinterpret_v_##SUF2##m2_##SUF1##m2(src); \
102} \
103inline static REG1##m4_t vreinterpret_##SUF1##m4(const REG2##m4_t & src) \
104{\
105 return vreinterpret_v_##SUF2##m4_##SUF1##m4(src); \
106} \
107inline static REG1##m8_t vreinterpret_##SUF1##m8(const REG2##m8_t & src) \
108{\
109 return vreinterpret_v_##SUF2##m8_##SUF1##m8(src); \
110}
111
112OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vint8, i8, vuint8, u8)
113OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vint16, i16, vuint16, u16)
114OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vint32, i32, vuint32, u32)
115OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vfloat32, f32, vuint32, u32)
116OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vfloat32, f32, vint32, i32)
117OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vuint32, u32, vfloat32, f32)
118OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vint32, i32, vfloat32, f32)
119OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vuint8, u8, vint8, i8)
120OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vuint8, u8, vuint16, u16)
121OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vuint8, u8, vuint32, u32)
122OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vuint8, u8, vuint64, u64)
123OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vuint16, u16, vint16, i16)
124OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vuint16, u16, vuint8, u8)
125OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vuint16, u16, vuint32, u32)
126OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vuint16, u16, vuint64, u64)
127OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vuint32, u32, vint32, i32)
128OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vuint32, u32, vuint8, u8)
129OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vuint32, u32, vuint16, u16)
130OPENCV_HAL_IMPL_RVV_FUN_REINTERPRET(vuint32, u32, vuint64, u64)
131
132#define OPENCV_HAL_IMPL_RVV_FUN_STORE(REG, SUF, SZ) \
133inline static void vse##SZ(VTraits<REG>::lane_type *base, REG value, size_t vl) \
134{ \
135 return vse##SZ##_v_##SUF##m1(base, value, vl); \
136}
137
138OPENCV_HAL_IMPL_RVV_FUN_STORE(v_uint8, u8, 8)
139OPENCV_HAL_IMPL_RVV_FUN_STORE(v_int8, i8, 8)
140OPENCV_HAL_IMPL_RVV_FUN_STORE(v_uint16, u16, 16)
141OPENCV_HAL_IMPL_RVV_FUN_STORE(v_int16, i16, 16)
142OPENCV_HAL_IMPL_RVV_FUN_STORE(v_uint32, u32, 32)
143OPENCV_HAL_IMPL_RVV_FUN_STORE(v_int32, i32, 32)
144OPENCV_HAL_IMPL_RVV_FUN_STORE(v_uint64, u64, 64)
145OPENCV_HAL_IMPL_RVV_FUN_STORE(v_int64, i64, 64)
146OPENCV_HAL_IMPL_RVV_FUN_STORE(v_float32, f32, 32)
147#if CV_SIMD_SCALABLE_64F
148OPENCV_HAL_IMPL_RVV_FUN_STORE(v_float64, f64, 64)
149#endif
150
151#define OPENCV_HAL_IMPL_RVV_FUN_EXTRACT(REG, SUF) \
152inline static VTraits<REG>::lane_type vmv_x(const REG & reg) \
153{\
154 return vmv_x_s_##SUF##m1_##SUF(reg); \
155}
156#define OPENCV_HAL_IMPL_RVV_FUN_EXTRACT_F(REG, SUF) \
157inline static VTraits<REG>::lane_type vfmv_f(const REG & reg) \
158{\
159 return vfmv_f_s_##SUF##m1_##SUF(reg); \
160}
161
162OPENCV_HAL_IMPL_RVV_FUN_EXTRACT(v_uint8, u8)
163OPENCV_HAL_IMPL_RVV_FUN_EXTRACT(v_int8, i8)
164OPENCV_HAL_IMPL_RVV_FUN_EXTRACT(v_uint16, u16)
165OPENCV_HAL_IMPL_RVV_FUN_EXTRACT(v_int16, i16)
166OPENCV_HAL_IMPL_RVV_FUN_EXTRACT(v_uint32, u32)
167OPENCV_HAL_IMPL_RVV_FUN_EXTRACT(v_int32, i32)
168OPENCV_HAL_IMPL_RVV_FUN_EXTRACT(v_uint64, u64)
169OPENCV_HAL_IMPL_RVV_FUN_EXTRACT(v_int64, i64)
170OPENCV_HAL_IMPL_RVV_FUN_EXTRACT_F(v_float32, f32)
171#if CV_SIMD_SCALABLE_64F
172OPENCV_HAL_IMPL_RVV_FUN_EXTRACT_F(v_float64, f64)
173#endif
174
175#define OPENCV_HAL_IMPL_RVV_FUN_SLIDE(REG, SUF) \
176inline static REG vslidedown(const REG & dst, const REG & src, size_t offset, size_t vl) \
177{ \
178 return vslidedown_vx_##SUF##m1(dst, src, offset, vl); \
179} \
180inline static REG vslideup(const REG & dst, const REG & src, size_t offset, size_t vl) \
181{ \
182 return vslideup_vx_##SUF##m1(dst, src, offset, vl); \
183}
184
185OPENCV_HAL_IMPL_RVV_FUN_SLIDE(v_uint8, u8)
186OPENCV_HAL_IMPL_RVV_FUN_SLIDE(v_int8, i8)
187OPENCV_HAL_IMPL_RVV_FUN_SLIDE(v_uint16, u16)
188OPENCV_HAL_IMPL_RVV_FUN_SLIDE(v_int16, i16)
189OPENCV_HAL_IMPL_RVV_FUN_SLIDE(v_uint32, u32)
190OPENCV_HAL_IMPL_RVV_FUN_SLIDE(v_int32, i32)
191OPENCV_HAL_IMPL_RVV_FUN_SLIDE(v_float32, f32)
192OPENCV_HAL_IMPL_RVV_FUN_SLIDE(v_uint64, u64)
193OPENCV_HAL_IMPL_RVV_FUN_SLIDE(v_int64, i64)
194#if CV_SIMD_SCALABLE_64F
195OPENCV_HAL_IMPL_RVV_FUN_SLIDE(v_float64, f64)
196#endif
197
198inline static vuint32mf2_t vmul(const vuint32mf2_t & op1, uint32_t op2, size_t vl)
199{
200 return vmul_vx_u32mf2(op1, op2, vl);
201}
202
203inline static vuint32mf2_t vreinterpret_u32mf2(const vint32mf2_t& val)
204{
205 return vreinterpret_v_i32mf2_u32mf2(val);
206}
207
208inline static vuint32mf2_t vreinterpret_u32mf2(const vuint16mf2_t& val)
209{
210 return vreinterpret_v_u16mf2_u32mf2(val);
211}
212
213#endif //OPENCV_HAL_INTRIN_RVV_COMPAT_OVERLOAD_HPP